Commit | Line | Data |
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74ba9207 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1da177e4 | 2 | /* |
aff6e00e GR |
3 | * w83781d.c - Part of lm_sensors, Linux kernel modules for hardware |
4 | * monitoring | |
5 | * Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>, | |
6 | * Philip Edelbrock <phil@netroedge.com>, | |
7 | * and Mark Studebaker <mdsxyz123@yahoo.com> | |
7c81c60f | 8 | * Copyright (c) 2007 - 2008 Jean Delvare <jdelvare@suse.de> |
aff6e00e | 9 | */ |
1da177e4 LT |
10 | |
11 | /* | |
aff6e00e GR |
12 | * Supports following chips: |
13 | * | |
4101ece3 | 14 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA |
aff6e00e GR |
15 | * as99127f 7 3 0 3 0x31 0x12c3 yes no |
16 | * as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no | |
17 | * w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes | |
18 | * w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes | |
19 | * w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no | |
20 | * | |
21 | */ | |
1da177e4 | 22 | |
1ca28218 JP |
23 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
24 | ||
1da177e4 LT |
25 | #include <linux/module.h> |
26 | #include <linux/init.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/jiffies.h> | |
29 | #include <linux/i2c.h> | |
943b0830 | 30 | #include <linux/hwmon.h> |
303760b4 | 31 | #include <linux/hwmon-vid.h> |
34875337 | 32 | #include <linux/hwmon-sysfs.h> |
311ce2ef | 33 | #include <linux/sysfs.h> |
943b0830 | 34 | #include <linux/err.h> |
9a61bf63 | 35 | #include <linux/mutex.h> |
443850ce WG |
36 | |
37 | #ifdef CONFIG_ISA | |
38 | #include <linux/platform_device.h> | |
39 | #include <linux/ioport.h> | |
6055fae8 | 40 | #include <linux/io.h> |
443850ce | 41 | #endif |
1da177e4 | 42 | |
443850ce | 43 | #include "lm75.h" |
7666c13c | 44 | |
1da177e4 | 45 | /* Addresses to scan */ |
25e9c86d MH |
46 | static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, |
47 | 0x2e, 0x2f, I2C_CLIENT_END }; | |
3aed198c | 48 | |
e5e9f44c JD |
49 | enum chips { w83781d, w83782d, w83783s, as99127f }; |
50 | ||
51 | /* Insmod parameters */ | |
3aed198c JD |
52 | static unsigned short force_subclients[4]; |
53 | module_param_array(force_subclients, short, NULL, 0); | |
b55f3757 GR |
54 | MODULE_PARM_DESC(force_subclients, |
55 | "List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}"); | |
1da177e4 | 56 | |
90ab5ee9 | 57 | static bool reset; |
fabddcd4 JD |
58 | module_param(reset, bool, 0); |
59 | MODULE_PARM_DESC(reset, "Set to one to reset chip on load"); | |
60 | ||
90ab5ee9 | 61 | static bool init = 1; |
1da177e4 LT |
62 | module_param(init, bool, 0); |
63 | MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); | |
64 | ||
65 | /* Constants specified below */ | |
66 | ||
67 | /* Length of ISA address segment */ | |
68 | #define W83781D_EXTENT 8 | |
69 | ||
70 | /* Where are the ISA address/data registers relative to the base address */ | |
71 | #define W83781D_ADDR_REG_OFFSET 5 | |
72 | #define W83781D_DATA_REG_OFFSET 6 | |
73 | ||
34875337 JD |
74 | /* The device registers */ |
75 | /* in nr from 0 to 8 */ | |
1da177e4 LT |
76 | #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ |
77 | (0x554 + (((nr) - 7) * 2))) | |
78 | #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ | |
79 | (0x555 + (((nr) - 7) * 2))) | |
80 | #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ | |
81 | (0x550 + (nr) - 7)) | |
82 | ||
34875337 JD |
83 | /* fan nr from 0 to 2 */ |
84 | #define W83781D_REG_FAN_MIN(nr) (0x3b + (nr)) | |
85 | #define W83781D_REG_FAN(nr) (0x28 + (nr)) | |
1da177e4 LT |
86 | |
87 | #define W83781D_REG_BANK 0x4E | |
88 | #define W83781D_REG_TEMP2_CONFIG 0x152 | |
89 | #define W83781D_REG_TEMP3_CONFIG 0x252 | |
34875337 | 90 | /* temp nr from 1 to 3 */ |
1da177e4 LT |
91 | #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \ |
92 | ((nr == 2) ? (0x0150) : \ | |
93 | (0x27))) | |
94 | #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \ | |
95 | ((nr == 2) ? (0x153) : \ | |
96 | (0x3A))) | |
97 | #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \ | |
98 | ((nr == 2) ? (0x155) : \ | |
99 | (0x39))) | |
100 | ||
101 | #define W83781D_REG_CONFIG 0x40 | |
c7f5d7ed JD |
102 | |
103 | /* Interrupt status (W83781D, AS99127F) */ | |
1da177e4 LT |
104 | #define W83781D_REG_ALARM1 0x41 |
105 | #define W83781D_REG_ALARM2 0x42 | |
1da177e4 | 106 | |
05663368 | 107 | /* Real-time status (W83782D, W83783S) */ |
c7f5d7ed JD |
108 | #define W83782D_REG_ALARM1 0x459 |
109 | #define W83782D_REG_ALARM2 0x45A | |
110 | #define W83782D_REG_ALARM3 0x45B | |
111 | ||
1da177e4 LT |
112 | #define W83781D_REG_BEEP_CONFIG 0x4D |
113 | #define W83781D_REG_BEEP_INTS1 0x56 | |
114 | #define W83781D_REG_BEEP_INTS2 0x57 | |
115 | #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */ | |
116 | ||
117 | #define W83781D_REG_VID_FANDIV 0x47 | |
118 | ||
119 | #define W83781D_REG_CHIPID 0x49 | |
120 | #define W83781D_REG_WCHIPID 0x58 | |
121 | #define W83781D_REG_CHIPMAN 0x4F | |
122 | #define W83781D_REG_PIN 0x4B | |
123 | ||
124 | /* 782D/783S only */ | |
125 | #define W83781D_REG_VBAT 0x5D | |
126 | ||
127 | /* PWM 782D (1-4) and 783S (1-2) only */ | |
34875337 | 128 | static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F }; |
1da177e4 LT |
129 | #define W83781D_REG_PWMCLK12 0x5C |
130 | #define W83781D_REG_PWMCLK34 0x45C | |
1da177e4 LT |
131 | |
132 | #define W83781D_REG_I2C_ADDR 0x48 | |
133 | #define W83781D_REG_I2C_SUBADDR 0x4A | |
134 | ||
aff6e00e GR |
135 | /* |
136 | * The following are undocumented in the data sheets however we | |
137 | * received the information in an email from Winbond tech support | |
138 | */ | |
1da177e4 LT |
139 | /* Sensor selection - not on 781d */ |
140 | #define W83781D_REG_SCFG1 0x5D | |
141 | static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; | |
142 | ||
143 | #define W83781D_REG_SCFG2 0x59 | |
144 | static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; | |
145 | ||
146 | #define W83781D_DEFAULT_BETA 3435 | |
147 | ||
474d00a8 | 148 | /* Conversions */ |
2a844c14 | 149 | #define IN_TO_REG(val) clamp_val(((val) + 8) / 16, 0, 255) |
474d00a8 | 150 | #define IN_FROM_REG(val) ((val) * 16) |
1da177e4 LT |
151 | |
152 | static inline u8 | |
153 | FAN_TO_REG(long rpm, int div) | |
154 | { | |
155 | if (rpm == 0) | |
156 | return 255; | |
2a844c14 GR |
157 | rpm = clamp_val(rpm, 1, 1000000); |
158 | return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); | |
1da177e4 LT |
159 | } |
160 | ||
474d00a8 JD |
161 | static inline long |
162 | FAN_FROM_REG(u8 val, int div) | |
163 | { | |
164 | if (val == 0) | |
165 | return -1; | |
166 | if (val == 255) | |
167 | return 0; | |
168 | return 1350000 / (val * div); | |
169 | } | |
1da177e4 | 170 | |
2a844c14 | 171 | #define TEMP_TO_REG(val) clamp_val((val) / 1000, -127, 128) |
474d00a8 | 172 | #define TEMP_FROM_REG(val) ((val) * 1000) |
1da177e4 | 173 | |
c531eb3f | 174 | #define BEEP_MASK_FROM_REG(val, type) ((type) == as99127f ? \ |
2fbbbf14 | 175 | (~(val)) & 0x7fff : (val) & 0xff7fff) |
c531eb3f | 176 | #define BEEP_MASK_TO_REG(val, type) ((type) == as99127f ? \ |
2fbbbf14 | 177 | (~(val)) & 0x7fff : (val) & 0xff7fff) |
1da177e4 | 178 | |
1da177e4 LT |
179 | #define DIV_FROM_REG(val) (1 << (val)) |
180 | ||
181 | static inline u8 | |
182 | DIV_TO_REG(long val, enum chips type) | |
183 | { | |
184 | int i; | |
2a844c14 GR |
185 | val = clamp_val(val, 1, |
186 | ((type == w83781d || type == as99127f) ? 8 : 128)) >> 1; | |
abc01922 | 187 | for (i = 0; i < 7; i++) { |
1da177e4 LT |
188 | if (val == 0) |
189 | break; | |
190 | val >>= 1; | |
191 | } | |
474d00a8 | 192 | return i; |
1da177e4 LT |
193 | } |
194 | ||
1da177e4 | 195 | struct w83781d_data { |
0217eae3 | 196 | struct i2c_client *client; |
1beeffe4 | 197 | struct device *hwmon_dev; |
9a61bf63 | 198 | struct mutex lock; |
1da177e4 LT |
199 | enum chips type; |
200 | ||
360782dd JD |
201 | /* For ISA device only */ |
202 | const char *name; | |
203 | int isa_addr; | |
204 | ||
9a61bf63 | 205 | struct mutex update_lock; |
952a11ca | 206 | bool valid; /* true if following fields are valid */ |
1da177e4 LT |
207 | unsigned long last_updated; /* In jiffies */ |
208 | ||
209 | struct i2c_client *lm75[2]; /* for secondary I2C addresses */ | |
210 | /* array of 2 pointers to subclients */ | |
211 | ||
212 | u8 in[9]; /* Register value - 8 & 9 for 782D only */ | |
213 | u8 in_max[9]; /* Register value - 8 & 9 for 782D only */ | |
214 | u8 in_min[9]; /* Register value - 8 & 9 for 782D only */ | |
215 | u8 fan[3]; /* Register value */ | |
216 | u8 fan_min[3]; /* Register value */ | |
474d00a8 JD |
217 | s8 temp; /* Register value */ |
218 | s8 temp_max; /* Register value */ | |
219 | s8 temp_max_hyst; /* Register value */ | |
1da177e4 LT |
220 | u16 temp_add[2]; /* Register value */ |
221 | u16 temp_max_add[2]; /* Register value */ | |
222 | u16 temp_max_hyst_add[2]; /* Register value */ | |
223 | u8 fan_div[3]; /* Register encoding, shifted right */ | |
224 | u8 vid; /* Register encoding, combined */ | |
225 | u32 alarms; /* Register encoding, combined */ | |
226 | u32 beep_mask; /* Register encoding, combined */ | |
1da177e4 | 227 | u8 pwm[4]; /* Register value */ |
34875337 | 228 | u8 pwm2_enable; /* Boolean */ |
aff6e00e GR |
229 | u16 sens[3]; /* |
230 | * 782D/783S only. | |
231 | * 1 = pentium diode; 2 = 3904 diode; | |
232 | * 4 = thermistor | |
233 | */ | |
1da177e4 LT |
234 | u8 vrm; |
235 | }; | |
236 | ||
443850ce WG |
237 | static struct w83781d_data *w83781d_data_if_isa(void); |
238 | static int w83781d_alias_detect(struct i2c_client *client, u8 chipid); | |
239 | ||
31b8dc4d JD |
240 | static int w83781d_read_value(struct w83781d_data *data, u16 reg); |
241 | static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value); | |
1da177e4 | 242 | static struct w83781d_data *w83781d_update_device(struct device *dev); |
7666c13c | 243 | static void w83781d_init_device(struct device *dev); |
1da177e4 | 244 | |
1da177e4 LT |
245 | /* following are the sysfs callback functions */ |
246 | #define show_in_reg(reg) \ | |
c531eb3f | 247 | static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \ |
34875337 | 248 | char *buf) \ |
1da177e4 | 249 | { \ |
34875337 | 250 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ |
1da177e4 | 251 | struct w83781d_data *data = w83781d_update_device(dev); \ |
34875337 JD |
252 | return sprintf(buf, "%ld\n", \ |
253 | (long)IN_FROM_REG(data->reg[attr->index])); \ | |
1da177e4 LT |
254 | } |
255 | show_in_reg(in); | |
256 | show_in_reg(in_min); | |
257 | show_in_reg(in_max); | |
258 | ||
259 | #define store_in_reg(REG, reg) \ | |
c531eb3f | 260 | static ssize_t store_in_##reg(struct device *dev, struct device_attribute \ |
34875337 | 261 | *da, const char *buf, size_t count) \ |
1da177e4 | 262 | { \ |
34875337 | 263 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ |
7666c13c | 264 | struct w83781d_data *data = dev_get_drvdata(dev); \ |
34875337 | 265 | int nr = attr->index; \ |
c531eb3f GR |
266 | unsigned long val; \ |
267 | int err = kstrtoul(buf, 10, &val); \ | |
268 | if (err) \ | |
269 | return err; \ | |
9a61bf63 | 270 | mutex_lock(&data->update_lock); \ |
1da177e4 | 271 | data->in_##reg[nr] = IN_TO_REG(val); \ |
c531eb3f GR |
272 | w83781d_write_value(data, W83781D_REG_IN_##REG(nr), \ |
273 | data->in_##reg[nr]); \ | |
274 | \ | |
9a61bf63 | 275 | mutex_unlock(&data->update_lock); \ |
1da177e4 LT |
276 | return count; \ |
277 | } | |
278 | store_in_reg(MIN, min); | |
279 | store_in_reg(MAX, max); | |
280 | ||
1da177e4 | 281 | #define sysfs_in_offsets(offset) \ |
34875337 JD |
282 | static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \ |
283 | show_in, NULL, offset); \ | |
284 | static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \ | |
285 | show_in_min, store_in_min, offset); \ | |
286 | static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \ | |
287 | show_in_max, store_in_max, offset) | |
1da177e4 LT |
288 | |
289 | sysfs_in_offsets(0); | |
290 | sysfs_in_offsets(1); | |
291 | sysfs_in_offsets(2); | |
292 | sysfs_in_offsets(3); | |
293 | sysfs_in_offsets(4); | |
294 | sysfs_in_offsets(5); | |
295 | sysfs_in_offsets(6); | |
296 | sysfs_in_offsets(7); | |
297 | sysfs_in_offsets(8); | |
298 | ||
1da177e4 | 299 | #define show_fan_reg(reg) \ |
c531eb3f | 300 | static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \ |
34875337 | 301 | char *buf) \ |
1da177e4 | 302 | { \ |
34875337 | 303 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ |
1da177e4 | 304 | struct w83781d_data *data = w83781d_update_device(dev); \ |
c531eb3f | 305 | return sprintf(buf, "%ld\n", \ |
34875337 JD |
306 | FAN_FROM_REG(data->reg[attr->index], \ |
307 | DIV_FROM_REG(data->fan_div[attr->index]))); \ | |
1da177e4 LT |
308 | } |
309 | show_fan_reg(fan); | |
310 | show_fan_reg(fan_min); | |
311 | ||
312 | static ssize_t | |
34875337 JD |
313 | store_fan_min(struct device *dev, struct device_attribute *da, |
314 | const char *buf, size_t count) | |
1da177e4 | 315 | { |
34875337 | 316 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
7666c13c | 317 | struct w83781d_data *data = dev_get_drvdata(dev); |
34875337 | 318 | int nr = attr->index; |
c531eb3f GR |
319 | unsigned long val; |
320 | int err; | |
1da177e4 | 321 | |
c531eb3f GR |
322 | err = kstrtoul(buf, 10, &val); |
323 | if (err) | |
324 | return err; | |
1da177e4 | 325 | |
9a61bf63 | 326 | mutex_lock(&data->update_lock); |
34875337 JD |
327 | data->fan_min[nr] = |
328 | FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); | |
31b8dc4d | 329 | w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), |
34875337 | 330 | data->fan_min[nr]); |
1da177e4 | 331 | |
9a61bf63 | 332 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
333 | return count; |
334 | } | |
335 | ||
34875337 JD |
336 | static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0); |
337 | static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR, | |
338 | show_fan_min, store_fan_min, 0); | |
339 | static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1); | |
340 | static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR, | |
341 | show_fan_min, store_fan_min, 1); | |
342 | static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2); | |
343 | static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR, | |
344 | show_fan_min, store_fan_min, 2); | |
1da177e4 | 345 | |
1da177e4 | 346 | #define show_temp_reg(reg) \ |
c531eb3f | 347 | static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \ |
34875337 | 348 | char *buf) \ |
1da177e4 | 349 | { \ |
34875337 | 350 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ |
1da177e4 | 351 | struct w83781d_data *data = w83781d_update_device(dev); \ |
34875337 | 352 | int nr = attr->index; \ |
1da177e4 | 353 | if (nr >= 2) { /* TEMP2 and TEMP3 */ \ |
c531eb3f | 354 | return sprintf(buf, "%d\n", \ |
1da177e4 LT |
355 | LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \ |
356 | } else { /* TEMP1 */ \ | |
c531eb3f | 357 | return sprintf(buf, "%ld\n", (long)TEMP_FROM_REG(data->reg)); \ |
1da177e4 LT |
358 | } \ |
359 | } | |
360 | show_temp_reg(temp); | |
361 | show_temp_reg(temp_max); | |
362 | show_temp_reg(temp_max_hyst); | |
363 | ||
364 | #define store_temp_reg(REG, reg) \ | |
c531eb3f | 365 | static ssize_t store_temp_##reg(struct device *dev, \ |
34875337 | 366 | struct device_attribute *da, const char *buf, size_t count) \ |
1da177e4 | 367 | { \ |
34875337 | 368 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ |
7666c13c | 369 | struct w83781d_data *data = dev_get_drvdata(dev); \ |
34875337 | 370 | int nr = attr->index; \ |
5bfedac0 | 371 | long val; \ |
c531eb3f GR |
372 | int err = kstrtol(buf, 10, &val); \ |
373 | if (err) \ | |
374 | return err; \ | |
9a61bf63 | 375 | mutex_lock(&data->update_lock); \ |
1da177e4 LT |
376 | \ |
377 | if (nr >= 2) { /* TEMP2 and TEMP3 */ \ | |
378 | data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ | |
31b8dc4d | 379 | w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \ |
1da177e4 LT |
380 | data->temp_##reg##_add[nr-2]); \ |
381 | } else { /* TEMP1 */ \ | |
382 | data->temp_##reg = TEMP_TO_REG(val); \ | |
31b8dc4d | 383 | w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \ |
1da177e4 LT |
384 | data->temp_##reg); \ |
385 | } \ | |
386 | \ | |
9a61bf63 | 387 | mutex_unlock(&data->update_lock); \ |
1da177e4 LT |
388 | return count; \ |
389 | } | |
390 | store_temp_reg(OVER, max); | |
391 | store_temp_reg(HYST, max_hyst); | |
392 | ||
1da177e4 | 393 | #define sysfs_temp_offsets(offset) \ |
34875337 JD |
394 | static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \ |
395 | show_temp, NULL, offset); \ | |
396 | static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \ | |
397 | show_temp_max, store_temp_max, offset); \ | |
398 | static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \ | |
399 | show_temp_max_hyst, store_temp_max_hyst, offset); | |
1da177e4 LT |
400 | |
401 | sysfs_temp_offsets(1); | |
402 | sysfs_temp_offsets(2); | |
403 | sysfs_temp_offsets(3); | |
404 | ||
1da177e4 | 405 | static ssize_t |
b80b814b | 406 | cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
407 | { |
408 | struct w83781d_data *data = w83781d_update_device(dev); | |
409 | return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); | |
410 | } | |
411 | ||
b80b814b | 412 | static DEVICE_ATTR_RO(cpu0_vid); |
311ce2ef | 413 | |
1da177e4 | 414 | static ssize_t |
b80b814b | 415 | vrm_show(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 | 416 | { |
90d6619a | 417 | struct w83781d_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
418 | return sprintf(buf, "%ld\n", (long) data->vrm); |
419 | } | |
420 | ||
421 | static ssize_t | |
b80b814b JL |
422 | vrm_store(struct device *dev, struct device_attribute *attr, const char *buf, |
423 | size_t count) | |
1da177e4 | 424 | { |
7666c13c | 425 | struct w83781d_data *data = dev_get_drvdata(dev); |
c531eb3f GR |
426 | unsigned long val; |
427 | int err; | |
1da177e4 | 428 | |
c531eb3f GR |
429 | err = kstrtoul(buf, 10, &val); |
430 | if (err) | |
431 | return err; | |
2a844c14 | 432 | data->vrm = clamp_val(val, 0, 255); |
1da177e4 LT |
433 | |
434 | return count; | |
435 | } | |
436 | ||
b80b814b | 437 | static DEVICE_ATTR_RW(vrm); |
311ce2ef | 438 | |
1da177e4 | 439 | static ssize_t |
b80b814b | 440 | alarms_show(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
441 | { |
442 | struct w83781d_data *data = w83781d_update_device(dev); | |
68188ba7 | 443 | return sprintf(buf, "%u\n", data->alarms); |
1da177e4 LT |
444 | } |
445 | ||
b80b814b | 446 | static DEVICE_ATTR_RO(alarms); |
311ce2ef | 447 | |
7d4a1374 JD |
448 | static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, |
449 | char *buf) | |
450 | { | |
451 | struct w83781d_data *data = w83781d_update_device(dev); | |
452 | int bitnr = to_sensor_dev_attr(attr)->index; | |
453 | return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); | |
454 | } | |
455 | ||
456 | /* The W83781D has a single alarm bit for temp2 and temp3 */ | |
457 | static ssize_t show_temp3_alarm(struct device *dev, | |
458 | struct device_attribute *attr, char *buf) | |
459 | { | |
460 | struct w83781d_data *data = w83781d_update_device(dev); | |
461 | int bitnr = (data->type == w83781d) ? 5 : 13; | |
462 | return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); | |
463 | } | |
464 | ||
465 | static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0); | |
466 | static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1); | |
467 | static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2); | |
468 | static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3); | |
469 | static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8); | |
470 | static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9); | |
471 | static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10); | |
472 | static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16); | |
473 | static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17); | |
474 | static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6); | |
475 | static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7); | |
476 | static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11); | |
477 | static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4); | |
478 | static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5); | |
479 | static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0); | |
480 | ||
b80b814b | 481 | static ssize_t beep_mask_show(struct device *dev, |
c531eb3f | 482 | struct device_attribute *attr, char *buf) |
1da177e4 LT |
483 | { |
484 | struct w83781d_data *data = w83781d_update_device(dev); | |
485 | return sprintf(buf, "%ld\n", | |
486 | (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type)); | |
487 | } | |
1da177e4 | 488 | |
1da177e4 | 489 | static ssize_t |
b80b814b | 490 | beep_mask_store(struct device *dev, struct device_attribute *attr, |
34875337 | 491 | const char *buf, size_t count) |
1da177e4 | 492 | { |
7666c13c | 493 | struct w83781d_data *data = dev_get_drvdata(dev); |
c531eb3f GR |
494 | unsigned long val; |
495 | int err; | |
1da177e4 | 496 | |
c531eb3f GR |
497 | err = kstrtoul(buf, 10, &val); |
498 | if (err) | |
499 | return err; | |
1da177e4 | 500 | |
9a61bf63 | 501 | mutex_lock(&data->update_lock); |
2fbbbf14 JD |
502 | data->beep_mask &= 0x8000; /* preserve beep enable */ |
503 | data->beep_mask |= BEEP_MASK_TO_REG(val, data->type); | |
34875337 JD |
504 | w83781d_write_value(data, W83781D_REG_BEEP_INTS1, |
505 | data->beep_mask & 0xff); | |
506 | w83781d_write_value(data, W83781D_REG_BEEP_INTS2, | |
2fbbbf14 | 507 | (data->beep_mask >> 8) & 0xff); |
34875337 JD |
508 | if (data->type != w83781d && data->type != as99127f) { |
509 | w83781d_write_value(data, W83781D_REG_BEEP_INTS3, | |
510 | ((data->beep_mask) >> 16) & 0xff); | |
511 | } | |
512 | mutex_unlock(&data->update_lock); | |
1da177e4 | 513 | |
34875337 JD |
514 | return count; |
515 | } | |
1da177e4 | 516 | |
b80b814b | 517 | static DEVICE_ATTR_RW(beep_mask); |
1da177e4 | 518 | |
7d4a1374 JD |
519 | static ssize_t show_beep(struct device *dev, struct device_attribute *attr, |
520 | char *buf) | |
521 | { | |
522 | struct w83781d_data *data = w83781d_update_device(dev); | |
523 | int bitnr = to_sensor_dev_attr(attr)->index; | |
524 | return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1); | |
525 | } | |
526 | ||
527 | static ssize_t | |
528 | store_beep(struct device *dev, struct device_attribute *attr, | |
529 | const char *buf, size_t count) | |
530 | { | |
531 | struct w83781d_data *data = dev_get_drvdata(dev); | |
532 | int bitnr = to_sensor_dev_attr(attr)->index; | |
7d4a1374 | 533 | u8 reg; |
c531eb3f GR |
534 | unsigned long bit; |
535 | int err; | |
536 | ||
537 | err = kstrtoul(buf, 10, &bit); | |
538 | if (err) | |
539 | return err; | |
7d4a1374 | 540 | |
7d4a1374 JD |
541 | if (bit & ~1) |
542 | return -EINVAL; | |
543 | ||
544 | mutex_lock(&data->update_lock); | |
545 | if (bit) | |
546 | data->beep_mask |= (1 << bitnr); | |
547 | else | |
548 | data->beep_mask &= ~(1 << bitnr); | |
549 | ||
550 | if (bitnr < 8) { | |
551 | reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1); | |
552 | if (bit) | |
553 | reg |= (1 << bitnr); | |
554 | else | |
555 | reg &= ~(1 << bitnr); | |
556 | w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg); | |
557 | } else if (bitnr < 16) { | |
558 | reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2); | |
559 | if (bit) | |
560 | reg |= (1 << (bitnr - 8)); | |
561 | else | |
562 | reg &= ~(1 << (bitnr - 8)); | |
563 | w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg); | |
564 | } else { | |
565 | reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3); | |
566 | if (bit) | |
567 | reg |= (1 << (bitnr - 16)); | |
568 | else | |
569 | reg &= ~(1 << (bitnr - 16)); | |
570 | w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg); | |
571 | } | |
572 | mutex_unlock(&data->update_lock); | |
573 | ||
574 | return count; | |
575 | } | |
576 | ||
577 | /* The W83781D has a single beep bit for temp2 and temp3 */ | |
578 | static ssize_t show_temp3_beep(struct device *dev, | |
579 | struct device_attribute *attr, char *buf) | |
580 | { | |
581 | struct w83781d_data *data = w83781d_update_device(dev); | |
582 | int bitnr = (data->type == w83781d) ? 5 : 13; | |
583 | return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1); | |
584 | } | |
585 | ||
586 | static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR, | |
587 | show_beep, store_beep, 0); | |
588 | static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR, | |
589 | show_beep, store_beep, 1); | |
590 | static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR, | |
591 | show_beep, store_beep, 2); | |
592 | static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR, | |
593 | show_beep, store_beep, 3); | |
594 | static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR, | |
595 | show_beep, store_beep, 8); | |
596 | static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR, | |
597 | show_beep, store_beep, 9); | |
598 | static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR, | |
599 | show_beep, store_beep, 10); | |
600 | static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR, | |
601 | show_beep, store_beep, 16); | |
602 | static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR, | |
603 | show_beep, store_beep, 17); | |
604 | static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR, | |
605 | show_beep, store_beep, 6); | |
606 | static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR, | |
607 | show_beep, store_beep, 7); | |
608 | static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR, | |
609 | show_beep, store_beep, 11); | |
610 | static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR, | |
611 | show_beep, store_beep, 4); | |
612 | static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR, | |
613 | show_beep, store_beep, 5); | |
614 | static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, | |
615 | show_temp3_beep, store_beep, 13); | |
2fbbbf14 JD |
616 | static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR, |
617 | show_beep, store_beep, 15); | |
7d4a1374 | 618 | |
1da177e4 | 619 | static ssize_t |
34875337 | 620 | show_fan_div(struct device *dev, struct device_attribute *da, char *buf) |
1da177e4 | 621 | { |
34875337 | 622 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
1da177e4 LT |
623 | struct w83781d_data *data = w83781d_update_device(dev); |
624 | return sprintf(buf, "%ld\n", | |
34875337 | 625 | (long) DIV_FROM_REG(data->fan_div[attr->index])); |
1da177e4 LT |
626 | } |
627 | ||
aff6e00e GR |
628 | /* |
629 | * Note: we save and restore the fan minimum here, because its value is | |
630 | * determined in part by the fan divisor. This follows the principle of | |
631 | * least surprise; the user doesn't expect the fan minimum to change just | |
632 | * because the divisor changed. | |
633 | */ | |
1da177e4 | 634 | static ssize_t |
34875337 JD |
635 | store_fan_div(struct device *dev, struct device_attribute *da, |
636 | const char *buf, size_t count) | |
1da177e4 | 637 | { |
34875337 | 638 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
7666c13c | 639 | struct w83781d_data *data = dev_get_drvdata(dev); |
1da177e4 | 640 | unsigned long min; |
34875337 | 641 | int nr = attr->index; |
1da177e4 | 642 | u8 reg; |
c531eb3f GR |
643 | unsigned long val; |
644 | int err; | |
645 | ||
646 | err = kstrtoul(buf, 10, &val); | |
647 | if (err) | |
648 | return err; | |
1da177e4 | 649 | |
9a61bf63 | 650 | mutex_lock(&data->update_lock); |
293c0997 | 651 | |
1da177e4 LT |
652 | /* Save fan_min */ |
653 | min = FAN_FROM_REG(data->fan_min[nr], | |
654 | DIV_FROM_REG(data->fan_div[nr])); | |
655 | ||
656 | data->fan_div[nr] = DIV_TO_REG(val, data->type); | |
657 | ||
c531eb3f GR |
658 | reg = (w83781d_read_value(data, nr == 2 ? |
659 | W83781D_REG_PIN : W83781D_REG_VID_FANDIV) | |
660 | & (nr == 0 ? 0xcf : 0x3f)) | |
661 | | ((data->fan_div[nr] & 0x03) << (nr == 0 ? 4 : 6)); | |
662 | w83781d_write_value(data, nr == 2 ? | |
663 | W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); | |
1da177e4 LT |
664 | |
665 | /* w83781d and as99127f don't have extended divisor bits */ | |
666 | if (data->type != w83781d && data->type != as99127f) { | |
31b8dc4d | 667 | reg = (w83781d_read_value(data, W83781D_REG_VBAT) |
1da177e4 LT |
668 | & ~(1 << (5 + nr))) |
669 | | ((data->fan_div[nr] & 0x04) << (3 + nr)); | |
31b8dc4d | 670 | w83781d_write_value(data, W83781D_REG_VBAT, reg); |
1da177e4 LT |
671 | } |
672 | ||
673 | /* Restore fan_min */ | |
674 | data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); | |
34875337 | 675 | w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]); |
1da177e4 | 676 | |
9a61bf63 | 677 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
678 | return count; |
679 | } | |
680 | ||
34875337 JD |
681 | static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, |
682 | show_fan_div, store_fan_div, 0); | |
683 | static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, | |
684 | show_fan_div, store_fan_div, 1); | |
685 | static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, | |
686 | show_fan_div, store_fan_div, 2); | |
1da177e4 | 687 | |
1da177e4 | 688 | static ssize_t |
34875337 | 689 | show_pwm(struct device *dev, struct device_attribute *da, char *buf) |
1da177e4 | 690 | { |
34875337 | 691 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
1da177e4 | 692 | struct w83781d_data *data = w83781d_update_device(dev); |
34875337 | 693 | return sprintf(buf, "%d\n", (int)data->pwm[attr->index]); |
1da177e4 LT |
694 | } |
695 | ||
696 | static ssize_t | |
b80b814b | 697 | pwm2_enable_show(struct device *dev, struct device_attribute *da, char *buf) |
1da177e4 LT |
698 | { |
699 | struct w83781d_data *data = w83781d_update_device(dev); | |
34875337 | 700 | return sprintf(buf, "%d\n", (int)data->pwm2_enable); |
1da177e4 LT |
701 | } |
702 | ||
703 | static ssize_t | |
34875337 JD |
704 | store_pwm(struct device *dev, struct device_attribute *da, const char *buf, |
705 | size_t count) | |
1da177e4 | 706 | { |
34875337 | 707 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
7666c13c | 708 | struct w83781d_data *data = dev_get_drvdata(dev); |
34875337 | 709 | int nr = attr->index; |
c531eb3f GR |
710 | unsigned long val; |
711 | int err; | |
1da177e4 | 712 | |
c531eb3f GR |
713 | err = kstrtoul(buf, 10, &val); |
714 | if (err) | |
715 | return err; | |
1da177e4 | 716 | |
9a61bf63 | 717 | mutex_lock(&data->update_lock); |
2a844c14 | 718 | data->pwm[nr] = clamp_val(val, 0, 255); |
34875337 | 719 | w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]); |
9a61bf63 | 720 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
721 | return count; |
722 | } | |
723 | ||
724 | static ssize_t | |
b80b814b | 725 | pwm2_enable_store(struct device *dev, struct device_attribute *da, |
34875337 | 726 | const char *buf, size_t count) |
1da177e4 | 727 | { |
7666c13c | 728 | struct w83781d_data *data = dev_get_drvdata(dev); |
c531eb3f GR |
729 | unsigned long val; |
730 | u32 reg; | |
731 | int err; | |
1da177e4 | 732 | |
c531eb3f GR |
733 | err = kstrtoul(buf, 10, &val); |
734 | if (err) | |
735 | return err; | |
1da177e4 | 736 | |
9a61bf63 | 737 | mutex_lock(&data->update_lock); |
1da177e4 LT |
738 | |
739 | switch (val) { | |
740 | case 0: | |
741 | case 1: | |
31b8dc4d JD |
742 | reg = w83781d_read_value(data, W83781D_REG_PWMCLK12); |
743 | w83781d_write_value(data, W83781D_REG_PWMCLK12, | |
1da177e4 LT |
744 | (reg & 0xf7) | (val << 3)); |
745 | ||
31b8dc4d JD |
746 | reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); |
747 | w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, | |
1da177e4 LT |
748 | (reg & 0xef) | (!val << 4)); |
749 | ||
34875337 | 750 | data->pwm2_enable = val; |
1da177e4 LT |
751 | break; |
752 | ||
753 | default: | |
9a61bf63 | 754 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
755 | return -EINVAL; |
756 | } | |
757 | ||
9a61bf63 | 758 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
759 | return count; |
760 | } | |
761 | ||
34875337 JD |
762 | static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0); |
763 | static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1); | |
764 | static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2); | |
765 | static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3); | |
766 | /* only PWM2 can be enabled/disabled */ | |
b80b814b | 767 | static DEVICE_ATTR_RW(pwm2_enable); |
1da177e4 | 768 | |
1da177e4 | 769 | static ssize_t |
34875337 | 770 | show_sensor(struct device *dev, struct device_attribute *da, char *buf) |
1da177e4 | 771 | { |
34875337 | 772 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
1da177e4 | 773 | struct w83781d_data *data = w83781d_update_device(dev); |
34875337 | 774 | return sprintf(buf, "%d\n", (int)data->sens[attr->index]); |
1da177e4 LT |
775 | } |
776 | ||
777 | static ssize_t | |
34875337 JD |
778 | store_sensor(struct device *dev, struct device_attribute *da, |
779 | const char *buf, size_t count) | |
1da177e4 | 780 | { |
34875337 | 781 | struct sensor_device_attribute *attr = to_sensor_dev_attr(da); |
7666c13c | 782 | struct w83781d_data *data = dev_get_drvdata(dev); |
34875337 | 783 | int nr = attr->index; |
c531eb3f GR |
784 | unsigned long val; |
785 | u32 tmp; | |
786 | int err; | |
1da177e4 | 787 | |
c531eb3f GR |
788 | err = kstrtoul(buf, 10, &val); |
789 | if (err) | |
790 | return err; | |
1da177e4 | 791 | |
9a61bf63 | 792 | mutex_lock(&data->update_lock); |
1da177e4 LT |
793 | |
794 | switch (val) { | |
795 | case 1: /* PII/Celeron diode */ | |
31b8dc4d JD |
796 | tmp = w83781d_read_value(data, W83781D_REG_SCFG1); |
797 | w83781d_write_value(data, W83781D_REG_SCFG1, | |
34875337 | 798 | tmp | BIT_SCFG1[nr]); |
31b8dc4d JD |
799 | tmp = w83781d_read_value(data, W83781D_REG_SCFG2); |
800 | w83781d_write_value(data, W83781D_REG_SCFG2, | |
34875337 JD |
801 | tmp | BIT_SCFG2[nr]); |
802 | data->sens[nr] = val; | |
1da177e4 LT |
803 | break; |
804 | case 2: /* 3904 */ | |
31b8dc4d JD |
805 | tmp = w83781d_read_value(data, W83781D_REG_SCFG1); |
806 | w83781d_write_value(data, W83781D_REG_SCFG1, | |
34875337 | 807 | tmp | BIT_SCFG1[nr]); |
31b8dc4d JD |
808 | tmp = w83781d_read_value(data, W83781D_REG_SCFG2); |
809 | w83781d_write_value(data, W83781D_REG_SCFG2, | |
34875337 JD |
810 | tmp & ~BIT_SCFG2[nr]); |
811 | data->sens[nr] = val; | |
1da177e4 | 812 | break; |
b26f9330 | 813 | case W83781D_DEFAULT_BETA: |
b55f3757 GR |
814 | dev_warn(dev, |
815 | "Sensor type %d is deprecated, please use 4 instead\n", | |
816 | W83781D_DEFAULT_BETA); | |
df561f66 | 817 | fallthrough; |
b26f9330 | 818 | case 4: /* thermistor */ |
31b8dc4d JD |
819 | tmp = w83781d_read_value(data, W83781D_REG_SCFG1); |
820 | w83781d_write_value(data, W83781D_REG_SCFG1, | |
34875337 JD |
821 | tmp & ~BIT_SCFG1[nr]); |
822 | data->sens[nr] = val; | |
1da177e4 LT |
823 | break; |
824 | default: | |
b26f9330 JD |
825 | dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n", |
826 | (long) val); | |
1da177e4 LT |
827 | break; |
828 | } | |
829 | ||
9a61bf63 | 830 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
831 | return count; |
832 | } | |
833 | ||
34875337 JD |
834 | static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, |
835 | show_sensor, store_sensor, 0); | |
836 | static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, | |
393cdad6 | 837 | show_sensor, store_sensor, 1); |
34875337 | 838 | static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, |
393cdad6 | 839 | show_sensor, store_sensor, 2); |
1da177e4 | 840 | |
aff6e00e GR |
841 | /* |
842 | * Assumes that adapter is of I2C, not ISA variety. | |
1da177e4 LT |
843 | * OTHERWISE DON'T CALL THIS |
844 | */ | |
845 | static int | |
0217eae3 | 846 | w83781d_detect_subclients(struct i2c_client *new_client) |
1da177e4 LT |
847 | { |
848 | int i, val1 = 0, id; | |
849 | int err; | |
0217eae3 WG |
850 | int address = new_client->addr; |
851 | unsigned short sc_addr[2]; | |
852 | struct i2c_adapter *adapter = new_client->adapter; | |
1da177e4 | 853 | struct w83781d_data *data = i2c_get_clientdata(new_client); |
0217eae3 | 854 | enum chips kind = data->type; |
bbc8a569 | 855 | int num_sc = 1; |
1da177e4 LT |
856 | |
857 | id = i2c_adapter_id(adapter); | |
858 | ||
859 | if (force_subclients[0] == id && force_subclients[1] == address) { | |
860 | for (i = 2; i <= 3; i++) { | |
861 | if (force_subclients[i] < 0x48 || | |
862 | force_subclients[i] > 0x4f) { | |
b55f3757 GR |
863 | dev_err(&new_client->dev, |
864 | "Invalid subclient address %d; must be 0x48-0x4f\n", | |
1da177e4 LT |
865 | force_subclients[i]); |
866 | err = -EINVAL; | |
867 | goto ERROR_SC_1; | |
868 | } | |
869 | } | |
31b8dc4d | 870 | w83781d_write_value(data, W83781D_REG_I2C_SUBADDR, |
1da177e4 LT |
871 | (force_subclients[2] & 0x07) | |
872 | ((force_subclients[3] & 0x07) << 4)); | |
0217eae3 | 873 | sc_addr[0] = force_subclients[2]; |
1da177e4 | 874 | } else { |
31b8dc4d | 875 | val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR); |
0217eae3 | 876 | sc_addr[0] = 0x48 + (val1 & 0x07); |
1da177e4 LT |
877 | } |
878 | ||
879 | if (kind != w83783s) { | |
bbc8a569 | 880 | num_sc = 2; |
1da177e4 LT |
881 | if (force_subclients[0] == id && |
882 | force_subclients[1] == address) { | |
0217eae3 | 883 | sc_addr[1] = force_subclients[3]; |
1da177e4 | 884 | } else { |
0217eae3 | 885 | sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07); |
1da177e4 | 886 | } |
0217eae3 | 887 | if (sc_addr[0] == sc_addr[1]) { |
1da177e4 LT |
888 | dev_err(&new_client->dev, |
889 | "Duplicate addresses 0x%x for subclients.\n", | |
0217eae3 | 890 | sc_addr[0]); |
1da177e4 LT |
891 | err = -EBUSY; |
892 | goto ERROR_SC_2; | |
893 | } | |
894 | } | |
895 | ||
bbc8a569 | 896 | for (i = 0; i < num_sc; i++) { |
22e96ce3 WS |
897 | data->lm75[i] = i2c_new_dummy_device(adapter, sc_addr[i]); |
898 | if (IS_ERR(data->lm75[i])) { | |
b55f3757 GR |
899 | dev_err(&new_client->dev, |
900 | "Subclient %d registration at address 0x%x failed.\n", | |
901 | i, sc_addr[i]); | |
22e96ce3 | 902 | err = PTR_ERR(data->lm75[i]); |
1da177e4 LT |
903 | if (i == 1) |
904 | goto ERROR_SC_3; | |
905 | goto ERROR_SC_2; | |
906 | } | |
1da177e4 LT |
907 | } |
908 | ||
909 | return 0; | |
910 | ||
911 | /* Undo inits in case of errors */ | |
912 | ERROR_SC_3: | |
0217eae3 | 913 | i2c_unregister_device(data->lm75[0]); |
1da177e4 | 914 | ERROR_SC_2: |
1da177e4 | 915 | ERROR_SC_1: |
1da177e4 LT |
916 | return err; |
917 | } | |
918 | ||
34875337 JD |
919 | #define IN_UNIT_ATTRS(X) \ |
920 | &sensor_dev_attr_in##X##_input.dev_attr.attr, \ | |
921 | &sensor_dev_attr_in##X##_min.dev_attr.attr, \ | |
293c0997 | 922 | &sensor_dev_attr_in##X##_max.dev_attr.attr, \ |
7d4a1374 JD |
923 | &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \ |
924 | &sensor_dev_attr_in##X##_beep.dev_attr.attr | |
311ce2ef | 925 | |
34875337 JD |
926 | #define FAN_UNIT_ATTRS(X) \ |
927 | &sensor_dev_attr_fan##X##_input.dev_attr.attr, \ | |
928 | &sensor_dev_attr_fan##X##_min.dev_attr.attr, \ | |
7d4a1374 JD |
929 | &sensor_dev_attr_fan##X##_div.dev_attr.attr, \ |
930 | &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \ | |
931 | &sensor_dev_attr_fan##X##_beep.dev_attr.attr | |
311ce2ef | 932 | |
34875337 JD |
933 | #define TEMP_UNIT_ATTRS(X) \ |
934 | &sensor_dev_attr_temp##X##_input.dev_attr.attr, \ | |
935 | &sensor_dev_attr_temp##X##_max.dev_attr.attr, \ | |
7d4a1374 JD |
936 | &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \ |
937 | &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \ | |
938 | &sensor_dev_attr_temp##X##_beep.dev_attr.attr | |
311ce2ef | 939 | |
c531eb3f | 940 | static struct attribute *w83781d_attributes[] = { |
311ce2ef JC |
941 | IN_UNIT_ATTRS(0), |
942 | IN_UNIT_ATTRS(2), | |
943 | IN_UNIT_ATTRS(3), | |
944 | IN_UNIT_ATTRS(4), | |
945 | IN_UNIT_ATTRS(5), | |
946 | IN_UNIT_ATTRS(6), | |
947 | FAN_UNIT_ATTRS(1), | |
948 | FAN_UNIT_ATTRS(2), | |
949 | FAN_UNIT_ATTRS(3), | |
950 | TEMP_UNIT_ATTRS(1), | |
951 | TEMP_UNIT_ATTRS(2), | |
952 | &dev_attr_cpu0_vid.attr, | |
953 | &dev_attr_vrm.attr, | |
954 | &dev_attr_alarms.attr, | |
955 | &dev_attr_beep_mask.attr, | |
2fbbbf14 | 956 | &sensor_dev_attr_beep_enable.dev_attr.attr, |
311ce2ef JC |
957 | NULL |
958 | }; | |
959 | static const struct attribute_group w83781d_group = { | |
960 | .attrs = w83781d_attributes, | |
961 | }; | |
962 | ||
79501333 | 963 | static struct attribute *w83781d_attributes_in1[] = { |
311ce2ef | 964 | IN_UNIT_ATTRS(1), |
79501333 GR |
965 | NULL |
966 | }; | |
967 | static const struct attribute_group w83781d_group_in1 = { | |
968 | .attrs = w83781d_attributes_in1, | |
969 | }; | |
970 | ||
971 | static struct attribute *w83781d_attributes_in78[] = { | |
311ce2ef JC |
972 | IN_UNIT_ATTRS(7), |
973 | IN_UNIT_ATTRS(8), | |
79501333 GR |
974 | NULL |
975 | }; | |
976 | static const struct attribute_group w83781d_group_in78 = { | |
977 | .attrs = w83781d_attributes_in78, | |
978 | }; | |
979 | ||
980 | static struct attribute *w83781d_attributes_temp3[] = { | |
311ce2ef | 981 | TEMP_UNIT_ATTRS(3), |
79501333 GR |
982 | NULL |
983 | }; | |
984 | static const struct attribute_group w83781d_group_temp3 = { | |
985 | .attrs = w83781d_attributes_temp3, | |
986 | }; | |
987 | ||
988 | static struct attribute *w83781d_attributes_pwm12[] = { | |
34875337 JD |
989 | &sensor_dev_attr_pwm1.dev_attr.attr, |
990 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
79501333 GR |
991 | &dev_attr_pwm2_enable.attr, |
992 | NULL | |
993 | }; | |
994 | static const struct attribute_group w83781d_group_pwm12 = { | |
995 | .attrs = w83781d_attributes_pwm12, | |
996 | }; | |
997 | ||
998 | static struct attribute *w83781d_attributes_pwm34[] = { | |
34875337 JD |
999 | &sensor_dev_attr_pwm3.dev_attr.attr, |
1000 | &sensor_dev_attr_pwm4.dev_attr.attr, | |
79501333 GR |
1001 | NULL |
1002 | }; | |
1003 | static const struct attribute_group w83781d_group_pwm34 = { | |
1004 | .attrs = w83781d_attributes_pwm34, | |
1005 | }; | |
1006 | ||
1007 | static struct attribute *w83781d_attributes_other[] = { | |
34875337 JD |
1008 | &sensor_dev_attr_temp1_type.dev_attr.attr, |
1009 | &sensor_dev_attr_temp2_type.dev_attr.attr, | |
1010 | &sensor_dev_attr_temp3_type.dev_attr.attr, | |
311ce2ef JC |
1011 | NULL |
1012 | }; | |
79501333 GR |
1013 | static const struct attribute_group w83781d_group_other = { |
1014 | .attrs = w83781d_attributes_other, | |
311ce2ef JC |
1015 | }; |
1016 | ||
7666c13c | 1017 | /* No clean up is done on error, it's up to the caller */ |
1da177e4 | 1018 | static int |
7666c13c | 1019 | w83781d_create_files(struct device *dev, int kind, int is_isa) |
1da177e4 | 1020 | { |
1da177e4 | 1021 | int err; |
1da177e4 | 1022 | |
c531eb3f GR |
1023 | err = sysfs_create_group(&dev->kobj, &w83781d_group); |
1024 | if (err) | |
7666c13c JD |
1025 | return err; |
1026 | ||
1027 | if (kind != w83783s) { | |
79501333 GR |
1028 | err = sysfs_create_group(&dev->kobj, &w83781d_group_in1); |
1029 | if (err) | |
7666c13c JD |
1030 | return err; |
1031 | } | |
1032 | if (kind != as99127f && kind != w83781d && kind != w83783s) { | |
79501333 GR |
1033 | err = sysfs_create_group(&dev->kobj, &w83781d_group_in78); |
1034 | if (err) | |
7666c13c JD |
1035 | return err; |
1036 | } | |
1037 | if (kind != w83783s) { | |
79501333 GR |
1038 | err = sysfs_create_group(&dev->kobj, &w83781d_group_temp3); |
1039 | if (err) | |
7666c13c | 1040 | return err; |
7d4a1374 | 1041 | |
7768aa76 | 1042 | if (kind != w83781d) { |
7d4a1374 JD |
1043 | err = sysfs_chmod_file(&dev->kobj, |
1044 | &sensor_dev_attr_temp3_alarm.dev_attr.attr, | |
1045 | S_IRUGO | S_IWUSR); | |
1046 | if (err) | |
1047 | return err; | |
7768aa76 | 1048 | } |
1da177e4 LT |
1049 | } |
1050 | ||
7666c13c | 1051 | if (kind != w83781d && kind != as99127f) { |
79501333 GR |
1052 | err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm12); |
1053 | if (err) | |
7666c13c | 1054 | return err; |
1da177e4 | 1055 | } |
7666c13c | 1056 | if (kind == w83782d && !is_isa) { |
79501333 GR |
1057 | err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm34); |
1058 | if (err) | |
7666c13c JD |
1059 | return err; |
1060 | } | |
1061 | ||
1062 | if (kind != as99127f && kind != w83781d) { | |
79501333 GR |
1063 | err = device_create_file(dev, |
1064 | &sensor_dev_attr_temp1_type.dev_attr); | |
1065 | if (err) | |
1066 | return err; | |
1067 | err = device_create_file(dev, | |
1068 | &sensor_dev_attr_temp2_type.dev_attr); | |
1069 | if (err) | |
7666c13c JD |
1070 | return err; |
1071 | if (kind != w83783s) { | |
c531eb3f | 1072 | err = device_create_file(dev, |
79501333 | 1073 | &sensor_dev_attr_temp3_type.dev_attr); |
c531eb3f | 1074 | if (err) |
7666c13c | 1075 | return err; |
1da177e4 | 1076 | } |
7666c13c | 1077 | } |
1da177e4 | 1078 | |
7666c13c JD |
1079 | return 0; |
1080 | } | |
1da177e4 | 1081 | |
0217eae3 | 1082 | /* Return 0 if detection is successful, -ENODEV otherwise */ |
7666c13c | 1083 | static int |
310ec792 | 1084 | w83781d_detect(struct i2c_client *client, struct i2c_board_info *info) |
7666c13c | 1085 | { |
bab2bf44 | 1086 | int val1, val2; |
0217eae3 WG |
1087 | struct w83781d_data *isa = w83781d_data_if_isa(); |
1088 | struct i2c_adapter *adapter = client->adapter; | |
1089 | int address = client->addr; | |
bab2bf44 | 1090 | const char *client_name; |
7666c13c JD |
1091 | enum vendor { winbond, asus } vendid; |
1092 | ||
0217eae3 WG |
1093 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) |
1094 | return -ENODEV; | |
1da177e4 | 1095 | |
aff6e00e GR |
1096 | /* |
1097 | * We block updates of the ISA device to minimize the risk of | |
1098 | * concurrent access to the same W83781D chip through different | |
1099 | * interfaces. | |
1100 | */ | |
0217eae3 WG |
1101 | if (isa) |
1102 | mutex_lock(&isa->update_lock); | |
1da177e4 | 1103 | |
bab2bf44 JD |
1104 | if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) { |
1105 | dev_dbg(&adapter->dev, | |
1106 | "Detection of w83781d chip failed at step 3\n"); | |
1107 | goto err_nodev; | |
1108 | } | |
1109 | ||
1110 | val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK); | |
1111 | val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN); | |
1112 | /* Check for Winbond or Asus ID if in bank 0 */ | |
1113 | if (!(val1 & 0x07) && | |
1114 | ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) || | |
c531eb3f | 1115 | ((val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) { |
bab2bf44 JD |
1116 | dev_dbg(&adapter->dev, |
1117 | "Detection of w83781d chip failed at step 4\n"); | |
1118 | goto err_nodev; | |
1119 | } | |
aff6e00e GR |
1120 | /* |
1121 | * If Winbond SMBus, check address at 0x48. | |
1122 | * Asus doesn't support, except for as99127f rev.2 | |
1123 | */ | |
bab2bf44 | 1124 | if ((!(val1 & 0x80) && val2 == 0xa3) || |
c531eb3f | 1125 | ((val1 & 0x80) && val2 == 0x5c)) { |
bab2bf44 JD |
1126 | if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR) |
1127 | != address) { | |
1128 | dev_dbg(&adapter->dev, | |
1129 | "Detection of w83781d chip failed at step 5\n"); | |
0217eae3 | 1130 | goto err_nodev; |
1da177e4 | 1131 | } |
1da177e4 LT |
1132 | } |
1133 | ||
bab2bf44 | 1134 | /* Put it now into bank 0 and Vendor ID High Byte */ |
0217eae3 WG |
1135 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, |
1136 | (i2c_smbus_read_byte_data(client, W83781D_REG_BANK) | |
1137 | & 0x78) | 0x80); | |
1da177e4 | 1138 | |
bab2bf44 JD |
1139 | /* Get the vendor ID */ |
1140 | val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN); | |
1141 | if (val2 == 0x5c) | |
1142 | vendid = winbond; | |
1143 | else if (val2 == 0x12) | |
1144 | vendid = asus; | |
1145 | else { | |
1146 | dev_dbg(&adapter->dev, | |
1147 | "w83781d chip vendor is neither Winbond nor Asus\n"); | |
1148 | goto err_nodev; | |
1da177e4 LT |
1149 | } |
1150 | ||
bab2bf44 JD |
1151 | /* Determine the chip type. */ |
1152 | val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID); | |
1153 | if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond) | |
1da177e4 | 1154 | client_name = "w83781d"; |
bab2bf44 | 1155 | else if (val1 == 0x30 && vendid == winbond) |
1da177e4 | 1156 | client_name = "w83782d"; |
bab2bf44 | 1157 | else if (val1 == 0x40 && vendid == winbond && address == 0x2d) |
1da177e4 | 1158 | client_name = "w83783s"; |
bab2bf44 | 1159 | else if (val1 == 0x31) |
1da177e4 | 1160 | client_name = "as99127f"; |
bab2bf44 JD |
1161 | else |
1162 | goto err_nodev; | |
1163 | ||
1164 | if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) { | |
b55f3757 GR |
1165 | dev_dbg(&adapter->dev, |
1166 | "Device at 0x%02x appears to be the same as ISA device\n", | |
1167 | address); | |
bab2bf44 | 1168 | goto err_nodev; |
1da177e4 LT |
1169 | } |
1170 | ||
bab2bf44 JD |
1171 | if (isa) |
1172 | mutex_unlock(&isa->update_lock); | |
1173 | ||
f2f394db | 1174 | strscpy(info->type, client_name, I2C_NAME_SIZE); |
0217eae3 WG |
1175 | |
1176 | return 0; | |
1177 | ||
1178 | err_nodev: | |
1179 | if (isa) | |
1180 | mutex_unlock(&isa->update_lock); | |
1181 | return -ENODEV; | |
1182 | } | |
1183 | ||
79501333 GR |
1184 | static void w83781d_remove_files(struct device *dev) |
1185 | { | |
1186 | sysfs_remove_group(&dev->kobj, &w83781d_group); | |
1187 | sysfs_remove_group(&dev->kobj, &w83781d_group_in1); | |
1188 | sysfs_remove_group(&dev->kobj, &w83781d_group_in78); | |
1189 | sysfs_remove_group(&dev->kobj, &w83781d_group_temp3); | |
1190 | sysfs_remove_group(&dev->kobj, &w83781d_group_pwm12); | |
1191 | sysfs_remove_group(&dev->kobj, &w83781d_group_pwm34); | |
1192 | sysfs_remove_group(&dev->kobj, &w83781d_group_other); | |
1193 | } | |
1194 | ||
67487038 SK |
1195 | static const struct i2c_device_id w83781d_ids[]; |
1196 | ||
1197 | static int w83781d_probe(struct i2c_client *client) | |
0217eae3 WG |
1198 | { |
1199 | struct device *dev = &client->dev; | |
1200 | struct w83781d_data *data; | |
1201 | int err; | |
1202 | ||
144d2b99 GR |
1203 | data = devm_kzalloc(dev, sizeof(struct w83781d_data), GFP_KERNEL); |
1204 | if (!data) | |
1205 | return -ENOMEM; | |
0217eae3 WG |
1206 | |
1207 | i2c_set_clientdata(client, data); | |
1208 | mutex_init(&data->lock); | |
1209 | mutex_init(&data->update_lock); | |
1da177e4 | 1210 | |
67487038 | 1211 | data->type = i2c_match_id(w83781d_ids, client)->driver_data; |
0217eae3 | 1212 | data->client = client; |
1da177e4 LT |
1213 | |
1214 | /* attach secondary i2c lm75-like clients */ | |
0217eae3 WG |
1215 | err = w83781d_detect_subclients(client); |
1216 | if (err) | |
144d2b99 | 1217 | return err; |
1da177e4 LT |
1218 | |
1219 | /* Initialize the chip */ | |
7666c13c | 1220 | w83781d_init_device(dev); |
1da177e4 LT |
1221 | |
1222 | /* Register sysfs hooks */ | |
0217eae3 | 1223 | err = w83781d_create_files(dev, data->type, 0); |
7666c13c | 1224 | if (err) |
144d2b99 | 1225 | goto exit_remove_files; |
943b0830 | 1226 | |
1beeffe4 TJ |
1227 | data->hwmon_dev = hwmon_device_register(dev); |
1228 | if (IS_ERR(data->hwmon_dev)) { | |
1229 | err = PTR_ERR(data->hwmon_dev); | |
144d2b99 | 1230 | goto exit_remove_files; |
1da177e4 LT |
1231 | } |
1232 | ||
1233 | return 0; | |
1234 | ||
144d2b99 | 1235 | exit_remove_files: |
79501333 | 1236 | w83781d_remove_files(dev); |
0ab21d0e AS |
1237 | i2c_unregister_device(data->lm75[0]); |
1238 | i2c_unregister_device(data->lm75[1]); | |
1da177e4 LT |
1239 | return err; |
1240 | } | |
1241 | ||
ed5c2f5f | 1242 | static void |
0217eae3 | 1243 | w83781d_remove(struct i2c_client *client) |
1da177e4 | 1244 | { |
943b0830 | 1245 | struct w83781d_data *data = i2c_get_clientdata(client); |
0217eae3 | 1246 | struct device *dev = &client->dev; |
1da177e4 | 1247 | |
0217eae3 | 1248 | hwmon_device_unregister(data->hwmon_dev); |
79501333 | 1249 | w83781d_remove_files(dev); |
1da177e4 | 1250 | |
0ab21d0e AS |
1251 | i2c_unregister_device(data->lm75[0]); |
1252 | i2c_unregister_device(data->lm75[1]); | |
1da177e4 LT |
1253 | } |
1254 | ||
1da177e4 | 1255 | static int |
443850ce | 1256 | w83781d_read_value_i2c(struct w83781d_data *data, u16 reg) |
1da177e4 | 1257 | { |
0217eae3 | 1258 | struct i2c_client *client = data->client; |
443850ce | 1259 | int res, bank; |
1da177e4 LT |
1260 | struct i2c_client *cl; |
1261 | ||
443850ce WG |
1262 | bank = (reg >> 8) & 0x0f; |
1263 | if (bank > 2) | |
1264 | /* switch banks */ | |
1265 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, | |
1266 | bank); | |
1267 | if (bank == 0 || bank > 2) { | |
1268 | res = i2c_smbus_read_byte_data(client, reg & 0xff); | |
1da177e4 | 1269 | } else { |
443850ce WG |
1270 | /* switch to subclient */ |
1271 | cl = data->lm75[bank - 1]; | |
1272 | /* convert from ISA to LM75 I2C addresses */ | |
1273 | switch (reg & 0xff) { | |
1274 | case 0x50: /* TEMP */ | |
90f4102c | 1275 | res = i2c_smbus_read_word_swapped(cl, 0); |
443850ce WG |
1276 | break; |
1277 | case 0x52: /* CONFIG */ | |
1278 | res = i2c_smbus_read_byte_data(cl, 1); | |
1279 | break; | |
1280 | case 0x53: /* HYST */ | |
90f4102c | 1281 | res = i2c_smbus_read_word_swapped(cl, 2); |
443850ce WG |
1282 | break; |
1283 | case 0x55: /* OVER */ | |
1284 | default: | |
90f4102c | 1285 | res = i2c_smbus_read_word_swapped(cl, 3); |
443850ce | 1286 | break; |
1da177e4 | 1287 | } |
1da177e4 | 1288 | } |
443850ce WG |
1289 | if (bank > 2) |
1290 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); | |
1291 | ||
1da177e4 LT |
1292 | return res; |
1293 | } | |
1294 | ||
1295 | static int | |
443850ce | 1296 | w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value) |
1da177e4 | 1297 | { |
0217eae3 | 1298 | struct i2c_client *client = data->client; |
443850ce | 1299 | int bank; |
1da177e4 LT |
1300 | struct i2c_client *cl; |
1301 | ||
443850ce WG |
1302 | bank = (reg >> 8) & 0x0f; |
1303 | if (bank > 2) | |
1304 | /* switch banks */ | |
1305 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, | |
1306 | bank); | |
1307 | if (bank == 0 || bank > 2) { | |
1308 | i2c_smbus_write_byte_data(client, reg & 0xff, | |
1309 | value & 0xff); | |
1da177e4 | 1310 | } else { |
443850ce WG |
1311 | /* switch to subclient */ |
1312 | cl = data->lm75[bank - 1]; | |
1313 | /* convert from ISA to LM75 I2C addresses */ | |
1314 | switch (reg & 0xff) { | |
1315 | case 0x52: /* CONFIG */ | |
1316 | i2c_smbus_write_byte_data(cl, 1, value & 0xff); | |
1317 | break; | |
1318 | case 0x53: /* HYST */ | |
90f4102c | 1319 | i2c_smbus_write_word_swapped(cl, 2, value); |
443850ce WG |
1320 | break; |
1321 | case 0x55: /* OVER */ | |
90f4102c | 1322 | i2c_smbus_write_word_swapped(cl, 3, value); |
443850ce | 1323 | break; |
1da177e4 | 1324 | } |
1da177e4 | 1325 | } |
443850ce WG |
1326 | if (bank > 2) |
1327 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); | |
1328 | ||
1da177e4 LT |
1329 | return 0; |
1330 | } | |
1331 | ||
1da177e4 | 1332 | static void |
7666c13c | 1333 | w83781d_init_device(struct device *dev) |
1da177e4 | 1334 | { |
7666c13c | 1335 | struct w83781d_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
1336 | int i, p; |
1337 | int type = data->type; | |
1338 | u8 tmp; | |
1339 | ||
aff6e00e GR |
1340 | if (reset && type != as99127f) { /* |
1341 | * this resets registers we don't have | |
1342 | * documentation for on the as99127f | |
1343 | */ | |
1344 | /* | |
1345 | * Resetting the chip has been the default for a long time, | |
1346 | * but it causes the BIOS initializations (fan clock dividers, | |
1347 | * thermal sensor types...) to be lost, so it is now optional. | |
1348 | * It might even go away if nobody reports it as being useful, | |
1349 | * as I see very little reason why this would be needed at | |
1350 | * all. | |
1351 | */ | |
b55f3757 GR |
1352 | dev_info(dev, |
1353 | "If reset=1 solved a problem you were having, please report!\n"); | |
fabddcd4 | 1354 | |
1da177e4 | 1355 | /* save these registers */ |
31b8dc4d JD |
1356 | i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); |
1357 | p = w83781d_read_value(data, W83781D_REG_PWMCLK12); | |
aff6e00e GR |
1358 | /* |
1359 | * Reset all except Watchdog values and last conversion values | |
1360 | * This sets fan-divs to 2, among others | |
1361 | */ | |
31b8dc4d | 1362 | w83781d_write_value(data, W83781D_REG_CONFIG, 0x80); |
aff6e00e GR |
1363 | /* |
1364 | * Restore the registers and disable power-on abnormal beep. | |
1365 | * This saves FAN 1/2/3 input/output values set by BIOS. | |
1366 | */ | |
31b8dc4d JD |
1367 | w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80); |
1368 | w83781d_write_value(data, W83781D_REG_PWMCLK12, p); | |
c531eb3f GR |
1369 | /* |
1370 | * Disable master beep-enable (reset turns it on). | |
1371 | * Individual beep_mask should be reset to off but for some | |
1372 | * reason disabling this bit helps some people not get beeped | |
1373 | */ | |
31b8dc4d | 1374 | w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0); |
1da177e4 LT |
1375 | } |
1376 | ||
aff6e00e GR |
1377 | /* |
1378 | * Disable power-on abnormal beep, as advised by the datasheet. | |
1379 | * Already done if reset=1. | |
1380 | */ | |
fabddcd4 | 1381 | if (init && !reset && type != as99127f) { |
31b8dc4d JD |
1382 | i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); |
1383 | w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80); | |
fabddcd4 JD |
1384 | } |
1385 | ||
303760b4 | 1386 | data->vrm = vid_which_vrm(); |
1da177e4 LT |
1387 | |
1388 | if ((type != w83781d) && (type != as99127f)) { | |
31b8dc4d | 1389 | tmp = w83781d_read_value(data, W83781D_REG_SCFG1); |
1da177e4 LT |
1390 | for (i = 1; i <= 3; i++) { |
1391 | if (!(tmp & BIT_SCFG1[i - 1])) { | |
b26f9330 | 1392 | data->sens[i - 1] = 4; |
1da177e4 LT |
1393 | } else { |
1394 | if (w83781d_read_value | |
31b8dc4d | 1395 | (data, |
1da177e4 LT |
1396 | W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) |
1397 | data->sens[i - 1] = 1; | |
1398 | else | |
1399 | data->sens[i - 1] = 2; | |
1400 | } | |
7c7a5304 | 1401 | if (type == w83783s && i == 2) |
1da177e4 LT |
1402 | break; |
1403 | } | |
1404 | } | |
1405 | ||
1406 | if (init && type != as99127f) { | |
1407 | /* Enable temp2 */ | |
31b8dc4d | 1408 | tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG); |
1da177e4 | 1409 | if (tmp & 0x01) { |
b55f3757 GR |
1410 | dev_warn(dev, |
1411 | "Enabling temp2, readings might not make sense\n"); | |
31b8dc4d | 1412 | w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG, |
1da177e4 LT |
1413 | tmp & 0xfe); |
1414 | } | |
1415 | ||
1416 | /* Enable temp3 */ | |
7c7a5304 | 1417 | if (type != w83783s) { |
31b8dc4d | 1418 | tmp = w83781d_read_value(data, |
1da177e4 LT |
1419 | W83781D_REG_TEMP3_CONFIG); |
1420 | if (tmp & 0x01) { | |
b55f3757 GR |
1421 | dev_warn(dev, |
1422 | "Enabling temp3, readings might not make sense\n"); | |
31b8dc4d | 1423 | w83781d_write_value(data, |
1da177e4 LT |
1424 | W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); |
1425 | } | |
1426 | } | |
1da177e4 LT |
1427 | } |
1428 | ||
1429 | /* Start monitoring */ | |
31b8dc4d JD |
1430 | w83781d_write_value(data, W83781D_REG_CONFIG, |
1431 | (w83781d_read_value(data, | |
1da177e4 LT |
1432 | W83781D_REG_CONFIG) & 0xf7) |
1433 | | 0x01); | |
7666c13c JD |
1434 | |
1435 | /* A few vars need to be filled upon startup */ | |
34875337 JD |
1436 | for (i = 0; i < 3; i++) { |
1437 | data->fan_min[i] = w83781d_read_value(data, | |
7666c13c JD |
1438 | W83781D_REG_FAN_MIN(i)); |
1439 | } | |
7666c13c JD |
1440 | |
1441 | mutex_init(&data->update_lock); | |
1da177e4 LT |
1442 | } |
1443 | ||
1444 | static struct w83781d_data *w83781d_update_device(struct device *dev) | |
1445 | { | |
7666c13c | 1446 | struct w83781d_data *data = dev_get_drvdata(dev); |
0217eae3 | 1447 | struct i2c_client *client = data->client; |
1da177e4 LT |
1448 | int i; |
1449 | ||
9a61bf63 | 1450 | mutex_lock(&data->update_lock); |
1da177e4 LT |
1451 | |
1452 | if (time_after(jiffies, data->last_updated + HZ + HZ / 2) | |
1453 | || !data->valid) { | |
1454 | dev_dbg(dev, "Starting device update\n"); | |
1455 | ||
1456 | for (i = 0; i <= 8; i++) { | |
7c7a5304 | 1457 | if (data->type == w83783s && i == 1) |
1da177e4 LT |
1458 | continue; /* 783S has no in1 */ |
1459 | data->in[i] = | |
31b8dc4d | 1460 | w83781d_read_value(data, W83781D_REG_IN(i)); |
1da177e4 | 1461 | data->in_min[i] = |
31b8dc4d | 1462 | w83781d_read_value(data, W83781D_REG_IN_MIN(i)); |
1da177e4 | 1463 | data->in_max[i] = |
31b8dc4d | 1464 | w83781d_read_value(data, W83781D_REG_IN_MAX(i)); |
05663368 | 1465 | if ((data->type != w83782d) && (i == 6)) |
1da177e4 LT |
1466 | break; |
1467 | } | |
34875337 JD |
1468 | for (i = 0; i < 3; i++) { |
1469 | data->fan[i] = | |
31b8dc4d | 1470 | w83781d_read_value(data, W83781D_REG_FAN(i)); |
34875337 | 1471 | data->fan_min[i] = |
31b8dc4d | 1472 | w83781d_read_value(data, W83781D_REG_FAN_MIN(i)); |
1da177e4 LT |
1473 | } |
1474 | if (data->type != w83781d && data->type != as99127f) { | |
34875337 JD |
1475 | for (i = 0; i < 4; i++) { |
1476 | data->pwm[i] = | |
31b8dc4d | 1477 | w83781d_read_value(data, |
34875337 | 1478 | W83781D_REG_PWM[i]); |
848ddf11 JD |
1479 | /* Only W83782D on SMBus has PWM3 and PWM4 */ |
1480 | if ((data->type != w83782d || !client) | |
34875337 | 1481 | && i == 1) |
1da177e4 LT |
1482 | break; |
1483 | } | |
1484 | /* Only PWM2 can be disabled */ | |
34875337 | 1485 | data->pwm2_enable = (w83781d_read_value(data, |
c531eb3f | 1486 | W83781D_REG_PWMCLK12) & 0x08) >> 3; |
1da177e4 LT |
1487 | } |
1488 | ||
31b8dc4d | 1489 | data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1)); |
1da177e4 | 1490 | data->temp_max = |
31b8dc4d | 1491 | w83781d_read_value(data, W83781D_REG_TEMP_OVER(1)); |
1da177e4 | 1492 | data->temp_max_hyst = |
31b8dc4d | 1493 | w83781d_read_value(data, W83781D_REG_TEMP_HYST(1)); |
1da177e4 | 1494 | data->temp_add[0] = |
31b8dc4d | 1495 | w83781d_read_value(data, W83781D_REG_TEMP(2)); |
1da177e4 | 1496 | data->temp_max_add[0] = |
31b8dc4d | 1497 | w83781d_read_value(data, W83781D_REG_TEMP_OVER(2)); |
1da177e4 | 1498 | data->temp_max_hyst_add[0] = |
31b8dc4d | 1499 | w83781d_read_value(data, W83781D_REG_TEMP_HYST(2)); |
7c7a5304 | 1500 | if (data->type != w83783s) { |
1da177e4 | 1501 | data->temp_add[1] = |
31b8dc4d | 1502 | w83781d_read_value(data, W83781D_REG_TEMP(3)); |
1da177e4 | 1503 | data->temp_max_add[1] = |
31b8dc4d | 1504 | w83781d_read_value(data, |
1da177e4 LT |
1505 | W83781D_REG_TEMP_OVER(3)); |
1506 | data->temp_max_hyst_add[1] = | |
31b8dc4d | 1507 | w83781d_read_value(data, |
1da177e4 LT |
1508 | W83781D_REG_TEMP_HYST(3)); |
1509 | } | |
31b8dc4d | 1510 | i = w83781d_read_value(data, W83781D_REG_VID_FANDIV); |
7c7a5304 | 1511 | data->vid = i & 0x0f; |
31b8dc4d | 1512 | data->vid |= (w83781d_read_value(data, |
7c7a5304 | 1513 | W83781D_REG_CHIPID) & 0x01) << 4; |
1da177e4 LT |
1514 | data->fan_div[0] = (i >> 4) & 0x03; |
1515 | data->fan_div[1] = (i >> 6) & 0x03; | |
31b8dc4d | 1516 | data->fan_div[2] = (w83781d_read_value(data, |
7c7a5304 | 1517 | W83781D_REG_PIN) >> 6) & 0x03; |
1da177e4 | 1518 | if ((data->type != w83781d) && (data->type != as99127f)) { |
31b8dc4d | 1519 | i = w83781d_read_value(data, W83781D_REG_VBAT); |
1da177e4 LT |
1520 | data->fan_div[0] |= (i >> 3) & 0x04; |
1521 | data->fan_div[1] |= (i >> 4) & 0x04; | |
7c7a5304 | 1522 | data->fan_div[2] |= (i >> 5) & 0x04; |
1da177e4 | 1523 | } |
05663368 | 1524 | if (data->type == w83782d) { |
31b8dc4d | 1525 | data->alarms = w83781d_read_value(data, |
c7f5d7ed | 1526 | W83782D_REG_ALARM1) |
31b8dc4d | 1527 | | (w83781d_read_value(data, |
c7f5d7ed | 1528 | W83782D_REG_ALARM2) << 8) |
31b8dc4d | 1529 | | (w83781d_read_value(data, |
c7f5d7ed JD |
1530 | W83782D_REG_ALARM3) << 16); |
1531 | } else if (data->type == w83783s) { | |
31b8dc4d | 1532 | data->alarms = w83781d_read_value(data, |
c7f5d7ed | 1533 | W83782D_REG_ALARM1) |
31b8dc4d | 1534 | | (w83781d_read_value(data, |
c7f5d7ed JD |
1535 | W83782D_REG_ALARM2) << 8); |
1536 | } else { | |
aff6e00e GR |
1537 | /* |
1538 | * No real-time status registers, fall back to | |
1539 | * interrupt status registers | |
1540 | */ | |
31b8dc4d | 1541 | data->alarms = w83781d_read_value(data, |
c7f5d7ed | 1542 | W83781D_REG_ALARM1) |
31b8dc4d | 1543 | | (w83781d_read_value(data, |
c7f5d7ed | 1544 | W83781D_REG_ALARM2) << 8); |
1da177e4 | 1545 | } |
31b8dc4d | 1546 | i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2); |
2fbbbf14 | 1547 | data->beep_mask = (i << 8) + |
31b8dc4d | 1548 | w83781d_read_value(data, W83781D_REG_BEEP_INTS1); |
1da177e4 LT |
1549 | if ((data->type != w83781d) && (data->type != as99127f)) { |
1550 | data->beep_mask |= | |
31b8dc4d | 1551 | w83781d_read_value(data, |
1da177e4 LT |
1552 | W83781D_REG_BEEP_INTS3) << 16; |
1553 | } | |
1554 | data->last_updated = jiffies; | |
952a11ca | 1555 | data->valid = true; |
1da177e4 LT |
1556 | } |
1557 | ||
9a61bf63 | 1558 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1559 | |
1560 | return data; | |
1561 | } | |
1562 | ||
0217eae3 WG |
1563 | static const struct i2c_device_id w83781d_ids[] = { |
1564 | { "w83781d", w83781d, }, | |
1565 | { "w83782d", w83782d, }, | |
1566 | { "w83783s", w83783s, }, | |
1567 | { "as99127f", as99127f }, | |
1568 | { /* LIST END */ } | |
1569 | }; | |
1570 | MODULE_DEVICE_TABLE(i2c, w83781d_ids); | |
1571 | ||
2284ed9f LW |
1572 | static const struct of_device_id w83781d_of_match[] = { |
1573 | { .compatible = "winbond,w83781d" }, | |
1574 | { .compatible = "winbond,w83781g" }, | |
1575 | { .compatible = "winbond,w83782d" }, | |
1576 | { .compatible = "winbond,w83783s" }, | |
1577 | { .compatible = "asus,as99127f" }, | |
1578 | { }, | |
1579 | }; | |
1580 | MODULE_DEVICE_TABLE(of, w83781d_of_match); | |
1581 | ||
0217eae3 WG |
1582 | static struct i2c_driver w83781d_driver = { |
1583 | .class = I2C_CLASS_HWMON, | |
1584 | .driver = { | |
1585 | .name = "w83781d", | |
2284ed9f | 1586 | .of_match_table = w83781d_of_match, |
0217eae3 | 1587 | }, |
67487038 | 1588 | .probe_new = w83781d_probe, |
0217eae3 WG |
1589 | .remove = w83781d_remove, |
1590 | .id_table = w83781d_ids, | |
1591 | .detect = w83781d_detect, | |
c3813d6a | 1592 | .address_list = normal_i2c, |
0217eae3 WG |
1593 | }; |
1594 | ||
1595 | /* | |
1596 | * ISA related code | |
1597 | */ | |
443850ce WG |
1598 | #ifdef CONFIG_ISA |
1599 | ||
1600 | /* ISA device, if found */ | |
1601 | static struct platform_device *pdev; | |
1602 | ||
1603 | static unsigned short isa_address = 0x290; | |
1604 | ||
aff6e00e GR |
1605 | /* |
1606 | * I2C devices get this name attribute automatically, but for ISA devices | |
1607 | * we must create it by ourselves. | |
1608 | */ | |
443850ce | 1609 | static ssize_t |
b80b814b | 1610 | name_show(struct device *dev, struct device_attribute *devattr, char *buf) |
443850ce WG |
1611 | { |
1612 | struct w83781d_data *data = dev_get_drvdata(dev); | |
360782dd | 1613 | return sprintf(buf, "%s\n", data->name); |
443850ce | 1614 | } |
b80b814b | 1615 | static DEVICE_ATTR_RO(name); |
443850ce WG |
1616 | |
1617 | static struct w83781d_data *w83781d_data_if_isa(void) | |
1618 | { | |
1619 | return pdev ? platform_get_drvdata(pdev) : NULL; | |
1620 | } | |
1621 | ||
1622 | /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */ | |
1623 | static int w83781d_alias_detect(struct i2c_client *client, u8 chipid) | |
1624 | { | |
0217eae3 | 1625 | struct w83781d_data *isa; |
443850ce WG |
1626 | int i; |
1627 | ||
1628 | if (!pdev) /* No ISA chip */ | |
1629 | return 0; | |
1630 | ||
443850ce WG |
1631 | isa = platform_get_drvdata(pdev); |
1632 | ||
1633 | if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr) | |
1634 | return 0; /* Address doesn't match */ | |
1635 | if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid) | |
1636 | return 0; /* Chip type doesn't match */ | |
1637 | ||
aff6e00e GR |
1638 | /* |
1639 | * We compare all the limit registers, the config register and the | |
1640 | * interrupt mask registers | |
1641 | */ | |
443850ce | 1642 | for (i = 0x2b; i <= 0x3d; i++) { |
0217eae3 WG |
1643 | if (w83781d_read_value(isa, i) != |
1644 | i2c_smbus_read_byte_data(client, i)) | |
443850ce WG |
1645 | return 0; |
1646 | } | |
1647 | if (w83781d_read_value(isa, W83781D_REG_CONFIG) != | |
0217eae3 | 1648 | i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG)) |
443850ce WG |
1649 | return 0; |
1650 | for (i = 0x43; i <= 0x46; i++) { | |
0217eae3 WG |
1651 | if (w83781d_read_value(isa, i) != |
1652 | i2c_smbus_read_byte_data(client, i)) | |
443850ce WG |
1653 | return 0; |
1654 | } | |
1655 | ||
1656 | return 1; | |
1657 | } | |
1658 | ||
1659 | static int | |
1660 | w83781d_read_value_isa(struct w83781d_data *data, u16 reg) | |
1661 | { | |
443850ce WG |
1662 | int word_sized, res; |
1663 | ||
1664 | word_sized = (((reg & 0xff00) == 0x100) | |
1665 | || ((reg & 0xff00) == 0x200)) | |
1666 | && (((reg & 0x00ff) == 0x50) | |
1667 | || ((reg & 0x00ff) == 0x53) | |
1668 | || ((reg & 0x00ff) == 0x55)); | |
1669 | if (reg & 0xff00) { | |
1670 | outb_p(W83781D_REG_BANK, | |
360782dd | 1671 | data->isa_addr + W83781D_ADDR_REG_OFFSET); |
443850ce | 1672 | outb_p(reg >> 8, |
360782dd | 1673 | data->isa_addr + W83781D_DATA_REG_OFFSET); |
443850ce | 1674 | } |
360782dd JD |
1675 | outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET); |
1676 | res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET); | |
443850ce WG |
1677 | if (word_sized) { |
1678 | outb_p((reg & 0xff) + 1, | |
360782dd | 1679 | data->isa_addr + W83781D_ADDR_REG_OFFSET); |
443850ce | 1680 | res = |
360782dd | 1681 | (res << 8) + inb_p(data->isa_addr + |
443850ce WG |
1682 | W83781D_DATA_REG_OFFSET); |
1683 | } | |
1684 | if (reg & 0xff00) { | |
1685 | outb_p(W83781D_REG_BANK, | |
360782dd JD |
1686 | data->isa_addr + W83781D_ADDR_REG_OFFSET); |
1687 | outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET); | |
443850ce WG |
1688 | } |
1689 | return res; | |
1690 | } | |
1691 | ||
1692 | static void | |
1693 | w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value) | |
1694 | { | |
443850ce WG |
1695 | int word_sized; |
1696 | ||
1697 | word_sized = (((reg & 0xff00) == 0x100) | |
1698 | || ((reg & 0xff00) == 0x200)) | |
1699 | && (((reg & 0x00ff) == 0x53) | |
1700 | || ((reg & 0x00ff) == 0x55)); | |
1701 | if (reg & 0xff00) { | |
1702 | outb_p(W83781D_REG_BANK, | |
360782dd | 1703 | data->isa_addr + W83781D_ADDR_REG_OFFSET); |
443850ce | 1704 | outb_p(reg >> 8, |
360782dd | 1705 | data->isa_addr + W83781D_DATA_REG_OFFSET); |
443850ce | 1706 | } |
360782dd | 1707 | outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET); |
443850ce WG |
1708 | if (word_sized) { |
1709 | outb_p(value >> 8, | |
360782dd | 1710 | data->isa_addr + W83781D_DATA_REG_OFFSET); |
443850ce | 1711 | outb_p((reg & 0xff) + 1, |
360782dd | 1712 | data->isa_addr + W83781D_ADDR_REG_OFFSET); |
443850ce | 1713 | } |
360782dd | 1714 | outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET); |
443850ce WG |
1715 | if (reg & 0xff00) { |
1716 | outb_p(W83781D_REG_BANK, | |
360782dd JD |
1717 | data->isa_addr + W83781D_ADDR_REG_OFFSET); |
1718 | outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET); | |
443850ce WG |
1719 | } |
1720 | } | |
1721 | ||
aff6e00e GR |
1722 | /* |
1723 | * The SMBus locks itself, usually, but nothing may access the Winbond between | |
1724 | * bank switches. ISA access must always be locked explicitly! | |
1725 | * We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks, | |
1726 | * would slow down the W83781D access and should not be necessary. | |
1727 | * There are some ugly typecasts here, but the good news is - they should | |
1728 | * nowhere else be necessary! | |
1729 | */ | |
443850ce WG |
1730 | static int |
1731 | w83781d_read_value(struct w83781d_data *data, u16 reg) | |
1732 | { | |
0217eae3 | 1733 | struct i2c_client *client = data->client; |
443850ce WG |
1734 | int res; |
1735 | ||
1736 | mutex_lock(&data->lock); | |
0217eae3 | 1737 | if (client) |
443850ce WG |
1738 | res = w83781d_read_value_i2c(data, reg); |
1739 | else | |
1740 | res = w83781d_read_value_isa(data, reg); | |
1741 | mutex_unlock(&data->lock); | |
1742 | return res; | |
1743 | } | |
1744 | ||
1745 | static int | |
1746 | w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value) | |
1747 | { | |
0217eae3 | 1748 | struct i2c_client *client = data->client; |
443850ce WG |
1749 | |
1750 | mutex_lock(&data->lock); | |
0217eae3 | 1751 | if (client) |
443850ce WG |
1752 | w83781d_write_value_i2c(data, reg, value); |
1753 | else | |
1754 | w83781d_write_value_isa(data, reg, value); | |
1755 | mutex_unlock(&data->lock); | |
1756 | return 0; | |
1757 | } | |
1758 | ||
6c931ae1 | 1759 | static int |
443850ce WG |
1760 | w83781d_isa_probe(struct platform_device *pdev) |
1761 | { | |
1762 | int err, reg; | |
1763 | struct w83781d_data *data; | |
1764 | struct resource *res; | |
443850ce WG |
1765 | |
1766 | /* Reserve the ISA region */ | |
1767 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
144d2b99 GR |
1768 | if (!devm_request_region(&pdev->dev, |
1769 | res->start + W83781D_ADDR_REG_OFFSET, 2, | |
1770 | "w83781d")) | |
1771 | return -EBUSY; | |
1772 | ||
1773 | data = devm_kzalloc(&pdev->dev, sizeof(struct w83781d_data), | |
1774 | GFP_KERNEL); | |
1775 | if (!data) | |
1776 | return -ENOMEM; | |
443850ce | 1777 | |
443850ce | 1778 | mutex_init(&data->lock); |
360782dd | 1779 | data->isa_addr = res->start; |
443850ce WG |
1780 | platform_set_drvdata(pdev, data); |
1781 | ||
1782 | reg = w83781d_read_value(data, W83781D_REG_WCHIPID); | |
1783 | switch (reg) { | |
1784 | case 0x30: | |
1785 | data->type = w83782d; | |
360782dd | 1786 | data->name = "w83782d"; |
443850ce WG |
1787 | break; |
1788 | default: | |
1789 | data->type = w83781d; | |
360782dd | 1790 | data->name = "w83781d"; |
443850ce | 1791 | } |
443850ce WG |
1792 | |
1793 | /* Initialize the W83781D chip */ | |
1794 | w83781d_init_device(&pdev->dev); | |
1795 | ||
1796 | /* Register sysfs hooks */ | |
1797 | err = w83781d_create_files(&pdev->dev, data->type, 1); | |
1798 | if (err) | |
1799 | goto exit_remove_files; | |
1800 | ||
1801 | err = device_create_file(&pdev->dev, &dev_attr_name); | |
1802 | if (err) | |
1803 | goto exit_remove_files; | |
1804 | ||
1805 | data->hwmon_dev = hwmon_device_register(&pdev->dev); | |
1806 | if (IS_ERR(data->hwmon_dev)) { | |
1807 | err = PTR_ERR(data->hwmon_dev); | |
1808 | goto exit_remove_files; | |
1809 | } | |
1810 | ||
1811 | return 0; | |
1812 | ||
1813 | exit_remove_files: | |
79501333 | 1814 | w83781d_remove_files(&pdev->dev); |
443850ce | 1815 | device_remove_file(&pdev->dev, &dev_attr_name); |
443850ce WG |
1816 | return err; |
1817 | } | |
1818 | ||
281dfd0b | 1819 | static int |
443850ce WG |
1820 | w83781d_isa_remove(struct platform_device *pdev) |
1821 | { | |
1822 | struct w83781d_data *data = platform_get_drvdata(pdev); | |
1823 | ||
1824 | hwmon_device_unregister(data->hwmon_dev); | |
79501333 | 1825 | w83781d_remove_files(&pdev->dev); |
443850ce | 1826 | device_remove_file(&pdev->dev, &dev_attr_name); |
443850ce WG |
1827 | |
1828 | return 0; | |
1829 | } | |
1830 | ||
1831 | static struct platform_driver w83781d_isa_driver = { | |
1832 | .driver = { | |
443850ce WG |
1833 | .name = "w83781d", |
1834 | }, | |
1835 | .probe = w83781d_isa_probe, | |
9e5e9b7a | 1836 | .remove = w83781d_isa_remove, |
443850ce WG |
1837 | }; |
1838 | ||
7666c13c JD |
1839 | /* return 1 if a supported chip is found, 0 otherwise */ |
1840 | static int __init | |
1841 | w83781d_isa_found(unsigned short address) | |
1842 | { | |
1843 | int val, save, found = 0; | |
b0bcdd3c JD |
1844 | int port; |
1845 | ||
aff6e00e GR |
1846 | /* |
1847 | * Some boards declare base+0 to base+7 as a PNP device, some base+4 | |
b0bcdd3c | 1848 | * to base+7 and some base+5 to base+6. So we better request each port |
aff6e00e GR |
1849 | * individually for the probing phase. |
1850 | */ | |
b0bcdd3c JD |
1851 | for (port = address; port < address + W83781D_EXTENT; port++) { |
1852 | if (!request_region(port, 1, "w83781d")) { | |
1ca28218 | 1853 | pr_debug("Failed to request port 0x%x\n", port); |
b0bcdd3c JD |
1854 | goto release; |
1855 | } | |
2961cb22 | 1856 | } |
7666c13c JD |
1857 | |
1858 | #define REALLY_SLOW_IO | |
aff6e00e GR |
1859 | /* |
1860 | * We need the timeouts for at least some W83781D-like | |
1861 | * chips. But only if we read 'undefined' registers. | |
1862 | */ | |
7666c13c JD |
1863 | val = inb_p(address + 1); |
1864 | if (inb_p(address + 2) != val | |
1865 | || inb_p(address + 3) != val | |
1866 | || inb_p(address + 7) != val) { | |
1ca28218 | 1867 | pr_debug("Detection failed at step %d\n", 1); |
7666c13c JD |
1868 | goto release; |
1869 | } | |
1870 | #undef REALLY_SLOW_IO | |
1871 | ||
aff6e00e GR |
1872 | /* |
1873 | * We should be able to change the 7 LSB of the address port. The | |
1874 | * MSB (busy flag) should be clear initially, set after the write. | |
1875 | */ | |
7666c13c JD |
1876 | save = inb_p(address + W83781D_ADDR_REG_OFFSET); |
1877 | if (save & 0x80) { | |
1ca28218 | 1878 | pr_debug("Detection failed at step %d\n", 2); |
7666c13c JD |
1879 | goto release; |
1880 | } | |
1881 | val = ~save & 0x7f; | |
1882 | outb_p(val, address + W83781D_ADDR_REG_OFFSET); | |
1883 | if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) { | |
1884 | outb_p(save, address + W83781D_ADDR_REG_OFFSET); | |
1ca28218 | 1885 | pr_debug("Detection failed at step %d\n", 3); |
7666c13c JD |
1886 | goto release; |
1887 | } | |
1888 | ||
1889 | /* We found a device, now see if it could be a W83781D */ | |
1890 | outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET); | |
1891 | val = inb_p(address + W83781D_DATA_REG_OFFSET); | |
1892 | if (val & 0x80) { | |
1ca28218 | 1893 | pr_debug("Detection failed at step %d\n", 4); |
7666c13c JD |
1894 | goto release; |
1895 | } | |
1896 | outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET); | |
1897 | save = inb_p(address + W83781D_DATA_REG_OFFSET); | |
1898 | outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET); | |
1899 | val = inb_p(address + W83781D_DATA_REG_OFFSET); | |
1900 | if ((!(save & 0x80) && (val != 0xa3)) | |
1901 | || ((save & 0x80) && (val != 0x5c))) { | |
1ca28218 | 1902 | pr_debug("Detection failed at step %d\n", 5); |
7666c13c JD |
1903 | goto release; |
1904 | } | |
1905 | outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET); | |
1906 | val = inb_p(address + W83781D_DATA_REG_OFFSET); | |
1907 | if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */ | |
1ca28218 | 1908 | pr_debug("Detection failed at step %d\n", 6); |
7666c13c JD |
1909 | goto release; |
1910 | } | |
1911 | ||
1912 | /* The busy flag should be clear again */ | |
1913 | if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) { | |
1ca28218 | 1914 | pr_debug("Detection failed at step %d\n", 7); |
7666c13c JD |
1915 | goto release; |
1916 | } | |
1917 | ||
1918 | /* Determine the chip type */ | |
1919 | outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET); | |
1920 | save = inb_p(address + W83781D_DATA_REG_OFFSET); | |
1921 | outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET); | |
1922 | outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET); | |
1923 | val = inb_p(address + W83781D_DATA_REG_OFFSET); | |
1924 | if ((val & 0xfe) == 0x10 /* W83781D */ | |
05663368 | 1925 | || val == 0x30) /* W83782D */ |
7666c13c JD |
1926 | found = 1; |
1927 | ||
1928 | if (found) | |
1ca28218 | 1929 | pr_info("Found a %s chip at %#x\n", |
7666c13c JD |
1930 | val == 0x30 ? "W83782D" : "W83781D", (int)address); |
1931 | ||
1932 | release: | |
b0bcdd3c JD |
1933 | for (port--; port >= address; port--) |
1934 | release_region(port, 1); | |
7666c13c JD |
1935 | return found; |
1936 | } | |
1937 | ||
1938 | static int __init | |
1939 | w83781d_isa_device_add(unsigned short address) | |
1940 | { | |
1941 | struct resource res = { | |
1942 | .start = address, | |
15bde2f1 | 1943 | .end = address + W83781D_EXTENT - 1, |
7666c13c JD |
1944 | .name = "w83781d", |
1945 | .flags = IORESOURCE_IO, | |
1946 | }; | |
1947 | int err; | |
1948 | ||
1949 | pdev = platform_device_alloc("w83781d", address); | |
1950 | if (!pdev) { | |
1951 | err = -ENOMEM; | |
1ca28218 | 1952 | pr_err("Device allocation failed\n"); |
7666c13c JD |
1953 | goto exit; |
1954 | } | |
1955 | ||
1956 | err = platform_device_add_resources(pdev, &res, 1); | |
1957 | if (err) { | |
1ca28218 | 1958 | pr_err("Device resource addition failed (%d)\n", err); |
7666c13c JD |
1959 | goto exit_device_put; |
1960 | } | |
1961 | ||
1962 | err = platform_device_add(pdev); | |
1963 | if (err) { | |
1ca28218 | 1964 | pr_err("Device addition failed (%d)\n", err); |
7666c13c JD |
1965 | goto exit_device_put; |
1966 | } | |
1967 | ||
1968 | return 0; | |
1969 | ||
1970 | exit_device_put: | |
1971 | platform_device_put(pdev); | |
1972 | exit: | |
1973 | pdev = NULL; | |
1974 | return err; | |
1975 | } | |
1976 | ||
1da177e4 | 1977 | static int __init |
443850ce | 1978 | w83781d_isa_register(void) |
1da177e4 | 1979 | { |
fde09509 JD |
1980 | int res; |
1981 | ||
7666c13c JD |
1982 | if (w83781d_isa_found(isa_address)) { |
1983 | res = platform_driver_register(&w83781d_isa_driver); | |
1984 | if (res) | |
c6566206 | 1985 | goto exit; |
fde09509 | 1986 | |
7666c13c JD |
1987 | /* Sets global pdev as a side effect */ |
1988 | res = w83781d_isa_device_add(isa_address); | |
1989 | if (res) | |
1990 | goto exit_unreg_isa_driver; | |
1991 | } | |
fde09509 JD |
1992 | |
1993 | return 0; | |
7666c13c | 1994 | |
443850ce | 1995 | exit_unreg_isa_driver: |
7666c13c | 1996 | platform_driver_unregister(&w83781d_isa_driver); |
443850ce | 1997 | exit: |
7666c13c | 1998 | return res; |
1da177e4 LT |
1999 | } |
2000 | ||
dd56b638 | 2001 | static void |
443850ce | 2002 | w83781d_isa_unregister(void) |
1da177e4 | 2003 | { |
7666c13c JD |
2004 | if (pdev) { |
2005 | platform_device_unregister(pdev); | |
2006 | platform_driver_unregister(&w83781d_isa_driver); | |
2007 | } | |
443850ce WG |
2008 | } |
2009 | #else /* !CONFIG_ISA */ | |
2010 | ||
2011 | static struct w83781d_data *w83781d_data_if_isa(void) | |
2012 | { | |
2013 | return NULL; | |
2014 | } | |
2015 | ||
2016 | static int | |
2017 | w83781d_alias_detect(struct i2c_client *client, u8 chipid) | |
2018 | { | |
2019 | return 0; | |
2020 | } | |
2021 | ||
2022 | static int | |
2023 | w83781d_read_value(struct w83781d_data *data, u16 reg) | |
2024 | { | |
2025 | int res; | |
2026 | ||
2027 | mutex_lock(&data->lock); | |
2028 | res = w83781d_read_value_i2c(data, reg); | |
2029 | mutex_unlock(&data->lock); | |
2030 | ||
2031 | return res; | |
2032 | } | |
2033 | ||
2034 | static int | |
2035 | w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value) | |
2036 | { | |
2037 | mutex_lock(&data->lock); | |
2038 | w83781d_write_value_i2c(data, reg, value); | |
2039 | mutex_unlock(&data->lock); | |
2040 | ||
2041 | return 0; | |
2042 | } | |
2043 | ||
2044 | static int __init | |
2045 | w83781d_isa_register(void) | |
2046 | { | |
2047 | return 0; | |
2048 | } | |
2049 | ||
dd56b638 | 2050 | static void |
443850ce WG |
2051 | w83781d_isa_unregister(void) |
2052 | { | |
2053 | } | |
2054 | #endif /* CONFIG_ISA */ | |
2055 | ||
2056 | static int __init | |
2057 | sensors_w83781d_init(void) | |
2058 | { | |
2059 | int res; | |
2060 | ||
aff6e00e GR |
2061 | /* |
2062 | * We register the ISA device first, so that we can skip the | |
2063 | * registration of an I2C interface to the same device. | |
2064 | */ | |
443850ce WG |
2065 | res = w83781d_isa_register(); |
2066 | if (res) | |
2067 | goto exit; | |
2068 | ||
2069 | res = i2c_add_driver(&w83781d_driver); | |
2070 | if (res) | |
2071 | goto exit_unreg_isa; | |
2072 | ||
2073 | return 0; | |
2074 | ||
2075 | exit_unreg_isa: | |
2076 | w83781d_isa_unregister(); | |
2077 | exit: | |
2078 | return res; | |
2079 | } | |
2080 | ||
2081 | static void __exit | |
2082 | sensors_w83781d_exit(void) | |
2083 | { | |
2084 | w83781d_isa_unregister(); | |
1da177e4 LT |
2085 | i2c_del_driver(&w83781d_driver); |
2086 | } | |
2087 | ||
2088 | MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " | |
2089 | "Philip Edelbrock <phil@netroedge.com>, " | |
2090 | "and Mark Studebaker <mdsxyz123@yahoo.com>"); | |
2091 | MODULE_DESCRIPTION("W83781D driver"); | |
2092 | MODULE_LICENSE("GPL"); | |
2093 | ||
2094 | module_init(sensors_w83781d_init); | |
2095 | module_exit(sensors_w83781d_exit); |