Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | w83781d.c - Part of lm_sensors, Linux kernel modules for hardware | |
3 | monitoring | |
4 | Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>, | |
5 | Philip Edelbrock <phil@netroedge.com>, | |
6 | and Mark Studebaker <mdsxyz123@yahoo.com> | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | /* | |
24 | Supports following chips: | |
25 | ||
26 | Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | |
27 | as99127f 7 3 0 3 0x31 0x12c3 yes no | |
28 | as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no | |
29 | w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes | |
30 | w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC) | |
1da177e4 LT |
31 | w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes |
32 | w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no | |
1da177e4 LT |
33 | |
34 | */ | |
35 | ||
1da177e4 LT |
36 | #include <linux/module.h> |
37 | #include <linux/init.h> | |
38 | #include <linux/slab.h> | |
39 | #include <linux/jiffies.h> | |
40 | #include <linux/i2c.h> | |
fde09509 | 41 | #include <linux/i2c-isa.h> |
943b0830 | 42 | #include <linux/hwmon.h> |
303760b4 | 43 | #include <linux/hwmon-vid.h> |
943b0830 | 44 | #include <linux/err.h> |
1da177e4 LT |
45 | #include <asm/io.h> |
46 | #include "lm75.h" | |
47 | ||
48 | /* Addresses to scan */ | |
49 | static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, | |
50 | 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, | |
51 | 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END }; | |
2d8672c5 | 52 | static unsigned short isa_address = 0x290; |
1da177e4 LT |
53 | |
54 | /* Insmod parameters */ | |
f4b50261 | 55 | I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f); |
1da177e4 LT |
56 | I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: " |
57 | "{bus, clientaddr, subclientaddr1, subclientaddr2}"); | |
58 | ||
59 | static int init = 1; | |
60 | module_param(init, bool, 0); | |
61 | MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); | |
62 | ||
63 | /* Constants specified below */ | |
64 | ||
65 | /* Length of ISA address segment */ | |
66 | #define W83781D_EXTENT 8 | |
67 | ||
68 | /* Where are the ISA address/data registers relative to the base address */ | |
69 | #define W83781D_ADDR_REG_OFFSET 5 | |
70 | #define W83781D_DATA_REG_OFFSET 6 | |
71 | ||
72 | /* The W83781D registers */ | |
73 | /* The W83782D registers for nr=7,8 are in bank 5 */ | |
74 | #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ | |
75 | (0x554 + (((nr) - 7) * 2))) | |
76 | #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ | |
77 | (0x555 + (((nr) - 7) * 2))) | |
78 | #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ | |
79 | (0x550 + (nr) - 7)) | |
80 | ||
81 | #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr)) | |
82 | #define W83781D_REG_FAN(nr) (0x27 + (nr)) | |
83 | ||
84 | #define W83781D_REG_BANK 0x4E | |
85 | #define W83781D_REG_TEMP2_CONFIG 0x152 | |
86 | #define W83781D_REG_TEMP3_CONFIG 0x252 | |
87 | #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \ | |
88 | ((nr == 2) ? (0x0150) : \ | |
89 | (0x27))) | |
90 | #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \ | |
91 | ((nr == 2) ? (0x153) : \ | |
92 | (0x3A))) | |
93 | #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \ | |
94 | ((nr == 2) ? (0x155) : \ | |
95 | (0x39))) | |
96 | ||
97 | #define W83781D_REG_CONFIG 0x40 | |
98 | #define W83781D_REG_ALARM1 0x41 | |
99 | #define W83781D_REG_ALARM2 0x42 | |
100 | #define W83781D_REG_ALARM3 0x450 /* not on W83781D */ | |
101 | ||
102 | #define W83781D_REG_IRQ 0x4C | |
103 | #define W83781D_REG_BEEP_CONFIG 0x4D | |
104 | #define W83781D_REG_BEEP_INTS1 0x56 | |
105 | #define W83781D_REG_BEEP_INTS2 0x57 | |
106 | #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */ | |
107 | ||
108 | #define W83781D_REG_VID_FANDIV 0x47 | |
109 | ||
110 | #define W83781D_REG_CHIPID 0x49 | |
111 | #define W83781D_REG_WCHIPID 0x58 | |
112 | #define W83781D_REG_CHIPMAN 0x4F | |
113 | #define W83781D_REG_PIN 0x4B | |
114 | ||
115 | /* 782D/783S only */ | |
116 | #define W83781D_REG_VBAT 0x5D | |
117 | ||
118 | /* PWM 782D (1-4) and 783S (1-2) only */ | |
119 | #define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */ | |
120 | /* on which is which; */ | |
121 | #define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */ | |
122 | /* However 782d is probably wrong. */ | |
123 | #define W83781D_REG_PWM3 0x5E | |
124 | #define W83781D_REG_PWM4 0x5F | |
125 | #define W83781D_REG_PWMCLK12 0x5C | |
126 | #define W83781D_REG_PWMCLK34 0x45C | |
127 | static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2, | |
128 | W83781D_REG_PWM3, W83781D_REG_PWM4 | |
129 | }; | |
130 | ||
131 | #define W83781D_REG_PWM(nr) (regpwm[(nr) - 1]) | |
132 | ||
133 | #define W83781D_REG_I2C_ADDR 0x48 | |
134 | #define W83781D_REG_I2C_SUBADDR 0x4A | |
135 | ||
136 | /* The following are undocumented in the data sheets however we | |
137 | received the information in an email from Winbond tech support */ | |
138 | /* Sensor selection - not on 781d */ | |
139 | #define W83781D_REG_SCFG1 0x5D | |
140 | static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; | |
141 | ||
142 | #define W83781D_REG_SCFG2 0x59 | |
143 | static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; | |
144 | ||
145 | #define W83781D_DEFAULT_BETA 3435 | |
146 | ||
147 | /* RT Table registers */ | |
148 | #define W83781D_REG_RT_IDX 0x50 | |
149 | #define W83781D_REG_RT_VAL 0x51 | |
150 | ||
151 | /* Conversions. Rounding and limit checking is only done on the TO_REG | |
152 | variants. Note that you should be a bit careful with which arguments | |
153 | these macros are called: arguments may be evaluated more than once. | |
154 | Fixing this is just not worth it. */ | |
155 | #define IN_TO_REG(val) (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255)) | |
156 | #define IN_FROM_REG(val) (((val) * 16) / 10) | |
157 | ||
158 | static inline u8 | |
159 | FAN_TO_REG(long rpm, int div) | |
160 | { | |
161 | if (rpm == 0) | |
162 | return 255; | |
163 | rpm = SENSORS_LIMIT(rpm, 1, 1000000); | |
164 | return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254); | |
165 | } | |
166 | ||
167 | #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \ | |
168 | ((val) == 255 ? 0 : \ | |
169 | 1350000 / ((val) * (div)))) | |
170 | ||
171 | #define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \ | |
172 | : (val)) / 1000, 0, 0xff)) | |
173 | #define TEMP_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000) | |
174 | ||
1da177e4 LT |
175 | #define PWM_FROM_REG(val) (val) |
176 | #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255)) | |
177 | #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \ | |
178 | (val) ^ 0x7fff : (val)) | |
179 | #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \ | |
180 | (~(val)) & 0x7fff : (val) & 0xffffff) | |
181 | ||
182 | #define BEEP_ENABLE_TO_REG(val) ((val) ? 1 : 0) | |
183 | #define BEEP_ENABLE_FROM_REG(val) ((val) ? 1 : 0) | |
184 | ||
185 | #define DIV_FROM_REG(val) (1 << (val)) | |
186 | ||
187 | static inline u8 | |
188 | DIV_TO_REG(long val, enum chips type) | |
189 | { | |
190 | int i; | |
191 | val = SENSORS_LIMIT(val, 1, | |
192 | ((type == w83781d | |
193 | || type == as99127f) ? 8 : 128)) >> 1; | |
abc01922 | 194 | for (i = 0; i < 7; i++) { |
1da177e4 LT |
195 | if (val == 0) |
196 | break; | |
197 | val >>= 1; | |
198 | } | |
199 | return ((u8) i); | |
200 | } | |
201 | ||
202 | /* There are some complications in a module like this. First off, W83781D chips | |
203 | may be both present on the SMBus and the ISA bus, and we have to handle | |
204 | those cases separately at some places. Second, there might be several | |
205 | W83781D chips available (well, actually, that is probably never done; but | |
206 | it is a clean illustration of how to handle a case like that). Finally, | |
207 | a specific chip may be attached to *both* ISA and SMBus, and we would | |
208 | not like to detect it double. Fortunately, in the case of the W83781D at | |
209 | least, a register tells us what SMBus address we are on, so that helps | |
210 | a bit - except if there could be more than one SMBus. Groan. No solution | |
211 | for this yet. */ | |
212 | ||
213 | /* This module may seem overly long and complicated. In fact, it is not so | |
214 | bad. Quite a lot of bookkeeping is done. A real driver can often cut | |
215 | some corners. */ | |
216 | ||
217 | /* For each registered W83781D, we need to keep some data in memory. That | |
218 | data is pointed to by w83781d_list[NR]->data. The structure itself is | |
219 | dynamically allocated, at the same time when a new w83781d client is | |
220 | allocated. */ | |
221 | struct w83781d_data { | |
222 | struct i2c_client client; | |
943b0830 | 223 | struct class_device *class_dev; |
1da177e4 LT |
224 | struct semaphore lock; |
225 | enum chips type; | |
226 | ||
227 | struct semaphore update_lock; | |
228 | char valid; /* !=0 if following fields are valid */ | |
229 | unsigned long last_updated; /* In jiffies */ | |
230 | ||
231 | struct i2c_client *lm75[2]; /* for secondary I2C addresses */ | |
232 | /* array of 2 pointers to subclients */ | |
233 | ||
234 | u8 in[9]; /* Register value - 8 & 9 for 782D only */ | |
235 | u8 in_max[9]; /* Register value - 8 & 9 for 782D only */ | |
236 | u8 in_min[9]; /* Register value - 8 & 9 for 782D only */ | |
237 | u8 fan[3]; /* Register value */ | |
238 | u8 fan_min[3]; /* Register value */ | |
239 | u8 temp; | |
240 | u8 temp_max; /* Register value */ | |
241 | u8 temp_max_hyst; /* Register value */ | |
242 | u16 temp_add[2]; /* Register value */ | |
243 | u16 temp_max_add[2]; /* Register value */ | |
244 | u16 temp_max_hyst_add[2]; /* Register value */ | |
245 | u8 fan_div[3]; /* Register encoding, shifted right */ | |
246 | u8 vid; /* Register encoding, combined */ | |
247 | u32 alarms; /* Register encoding, combined */ | |
248 | u32 beep_mask; /* Register encoding, combined */ | |
249 | u8 beep_enable; /* Boolean */ | |
250 | u8 pwm[4]; /* Register value */ | |
251 | u8 pwmenable[4]; /* Boolean */ | |
252 | u16 sens[3]; /* 782D/783S only. | |
253 | 1 = pentium diode; 2 = 3904 diode; | |
254 | 3000-5000 = thermistor beta. | |
255 | Default = 3435. | |
256 | Other Betas unimplemented */ | |
257 | u8 vrm; | |
258 | }; | |
259 | ||
260 | static int w83781d_attach_adapter(struct i2c_adapter *adapter); | |
2d8672c5 | 261 | static int w83781d_isa_attach_adapter(struct i2c_adapter *adapter); |
1da177e4 LT |
262 | static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind); |
263 | static int w83781d_detach_client(struct i2c_client *client); | |
264 | ||
265 | static int w83781d_read_value(struct i2c_client *client, u16 register); | |
266 | static int w83781d_write_value(struct i2c_client *client, u16 register, | |
267 | u16 value); | |
268 | static struct w83781d_data *w83781d_update_device(struct device *dev); | |
269 | static void w83781d_init_client(struct i2c_client *client); | |
270 | ||
271 | static struct i2c_driver w83781d_driver = { | |
272 | .owner = THIS_MODULE, | |
273 | .name = "w83781d", | |
274 | .id = I2C_DRIVERID_W83781D, | |
275 | .flags = I2C_DF_NOTIFY, | |
276 | .attach_adapter = w83781d_attach_adapter, | |
277 | .detach_client = w83781d_detach_client, | |
278 | }; | |
279 | ||
fde09509 JD |
280 | static struct i2c_driver w83781d_isa_driver = { |
281 | .owner = THIS_MODULE, | |
282 | .name = "w83781d-isa", | |
2d8672c5 | 283 | .attach_adapter = w83781d_isa_attach_adapter, |
fde09509 JD |
284 | .detach_client = w83781d_detach_client, |
285 | }; | |
286 | ||
287 | ||
1da177e4 LT |
288 | /* following are the sysfs callback functions */ |
289 | #define show_in_reg(reg) \ | |
290 | static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ | |
291 | { \ | |
292 | struct w83781d_data *data = w83781d_update_device(dev); \ | |
293 | return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \ | |
294 | } | |
295 | show_in_reg(in); | |
296 | show_in_reg(in_min); | |
297 | show_in_reg(in_max); | |
298 | ||
299 | #define store_in_reg(REG, reg) \ | |
300 | static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \ | |
301 | { \ | |
302 | struct i2c_client *client = to_i2c_client(dev); \ | |
303 | struct w83781d_data *data = i2c_get_clientdata(client); \ | |
304 | u32 val; \ | |
305 | \ | |
306 | val = simple_strtoul(buf, NULL, 10) / 10; \ | |
307 | \ | |
308 | down(&data->update_lock); \ | |
309 | data->in_##reg[nr] = IN_TO_REG(val); \ | |
310 | w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \ | |
311 | \ | |
312 | up(&data->update_lock); \ | |
313 | return count; \ | |
314 | } | |
315 | store_in_reg(MIN, min); | |
316 | store_in_reg(MAX, max); | |
317 | ||
318 | #define sysfs_in_offset(offset) \ | |
319 | static ssize_t \ | |
e404e274 | 320 | show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
321 | { \ |
322 | return show_in(dev, buf, offset); \ | |
323 | } \ | |
324 | static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL); | |
325 | ||
326 | #define sysfs_in_reg_offset(reg, offset) \ | |
e404e274 | 327 | static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
328 | { \ |
329 | return show_in_##reg (dev, buf, offset); \ | |
330 | } \ | |
e404e274 | 331 | static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
332 | { \ |
333 | return store_in_##reg (dev, buf, count, offset); \ | |
334 | } \ | |
335 | static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset); | |
336 | ||
337 | #define sysfs_in_offsets(offset) \ | |
338 | sysfs_in_offset(offset); \ | |
339 | sysfs_in_reg_offset(min, offset); \ | |
340 | sysfs_in_reg_offset(max, offset); | |
341 | ||
342 | sysfs_in_offsets(0); | |
343 | sysfs_in_offsets(1); | |
344 | sysfs_in_offsets(2); | |
345 | sysfs_in_offsets(3); | |
346 | sysfs_in_offsets(4); | |
347 | sysfs_in_offsets(5); | |
348 | sysfs_in_offsets(6); | |
349 | sysfs_in_offsets(7); | |
350 | sysfs_in_offsets(8); | |
351 | ||
352 | #define device_create_file_in(client, offset) \ | |
353 | do { \ | |
354 | device_create_file(&client->dev, &dev_attr_in##offset##_input); \ | |
355 | device_create_file(&client->dev, &dev_attr_in##offset##_min); \ | |
356 | device_create_file(&client->dev, &dev_attr_in##offset##_max); \ | |
357 | } while (0) | |
358 | ||
359 | #define show_fan_reg(reg) \ | |
360 | static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ | |
361 | { \ | |
362 | struct w83781d_data *data = w83781d_update_device(dev); \ | |
363 | return sprintf(buf,"%ld\n", \ | |
364 | FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \ | |
365 | } | |
366 | show_fan_reg(fan); | |
367 | show_fan_reg(fan_min); | |
368 | ||
369 | static ssize_t | |
370 | store_fan_min(struct device *dev, const char *buf, size_t count, int nr) | |
371 | { | |
372 | struct i2c_client *client = to_i2c_client(dev); | |
373 | struct w83781d_data *data = i2c_get_clientdata(client); | |
374 | u32 val; | |
375 | ||
376 | val = simple_strtoul(buf, NULL, 10); | |
377 | ||
378 | down(&data->update_lock); | |
379 | data->fan_min[nr - 1] = | |
380 | FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1])); | |
381 | w83781d_write_value(client, W83781D_REG_FAN_MIN(nr), | |
382 | data->fan_min[nr - 1]); | |
383 | ||
384 | up(&data->update_lock); | |
385 | return count; | |
386 | } | |
387 | ||
388 | #define sysfs_fan_offset(offset) \ | |
e404e274 | 389 | static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
390 | { \ |
391 | return show_fan(dev, buf, offset); \ | |
392 | } \ | |
393 | static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL); | |
394 | ||
395 | #define sysfs_fan_min_offset(offset) \ | |
e404e274 | 396 | static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
397 | { \ |
398 | return show_fan_min(dev, buf, offset); \ | |
399 | } \ | |
e404e274 | 400 | static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
401 | { \ |
402 | return store_fan_min(dev, buf, count, offset); \ | |
403 | } \ | |
404 | static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset); | |
405 | ||
406 | sysfs_fan_offset(1); | |
407 | sysfs_fan_min_offset(1); | |
408 | sysfs_fan_offset(2); | |
409 | sysfs_fan_min_offset(2); | |
410 | sysfs_fan_offset(3); | |
411 | sysfs_fan_min_offset(3); | |
412 | ||
413 | #define device_create_file_fan(client, offset) \ | |
414 | do { \ | |
415 | device_create_file(&client->dev, &dev_attr_fan##offset##_input); \ | |
416 | device_create_file(&client->dev, &dev_attr_fan##offset##_min); \ | |
417 | } while (0) | |
418 | ||
419 | #define show_temp_reg(reg) \ | |
420 | static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ | |
421 | { \ | |
422 | struct w83781d_data *data = w83781d_update_device(dev); \ | |
423 | if (nr >= 2) { /* TEMP2 and TEMP3 */ \ | |
424 | return sprintf(buf,"%d\n", \ | |
425 | LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \ | |
426 | } else { /* TEMP1 */ \ | |
427 | return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \ | |
428 | } \ | |
429 | } | |
430 | show_temp_reg(temp); | |
431 | show_temp_reg(temp_max); | |
432 | show_temp_reg(temp_max_hyst); | |
433 | ||
434 | #define store_temp_reg(REG, reg) \ | |
435 | static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \ | |
436 | { \ | |
437 | struct i2c_client *client = to_i2c_client(dev); \ | |
438 | struct w83781d_data *data = i2c_get_clientdata(client); \ | |
439 | s32 val; \ | |
440 | \ | |
441 | val = simple_strtol(buf, NULL, 10); \ | |
442 | \ | |
443 | down(&data->update_lock); \ | |
444 | \ | |
445 | if (nr >= 2) { /* TEMP2 and TEMP3 */ \ | |
446 | data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ | |
447 | w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \ | |
448 | data->temp_##reg##_add[nr-2]); \ | |
449 | } else { /* TEMP1 */ \ | |
450 | data->temp_##reg = TEMP_TO_REG(val); \ | |
451 | w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \ | |
452 | data->temp_##reg); \ | |
453 | } \ | |
454 | \ | |
455 | up(&data->update_lock); \ | |
456 | return count; \ | |
457 | } | |
458 | store_temp_reg(OVER, max); | |
459 | store_temp_reg(HYST, max_hyst); | |
460 | ||
461 | #define sysfs_temp_offset(offset) \ | |
462 | static ssize_t \ | |
e404e274 | 463 | show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
464 | { \ |
465 | return show_temp(dev, buf, offset); \ | |
466 | } \ | |
467 | static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL); | |
468 | ||
469 | #define sysfs_temp_reg_offset(reg, offset) \ | |
e404e274 | 470 | static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
471 | { \ |
472 | return show_temp_##reg (dev, buf, offset); \ | |
473 | } \ | |
e404e274 | 474 | static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
475 | { \ |
476 | return store_temp_##reg (dev, buf, count, offset); \ | |
477 | } \ | |
478 | static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset); | |
479 | ||
480 | #define sysfs_temp_offsets(offset) \ | |
481 | sysfs_temp_offset(offset); \ | |
482 | sysfs_temp_reg_offset(max, offset); \ | |
483 | sysfs_temp_reg_offset(max_hyst, offset); | |
484 | ||
485 | sysfs_temp_offsets(1); | |
486 | sysfs_temp_offsets(2); | |
487 | sysfs_temp_offsets(3); | |
488 | ||
489 | #define device_create_file_temp(client, offset) \ | |
490 | do { \ | |
491 | device_create_file(&client->dev, &dev_attr_temp##offset##_input); \ | |
492 | device_create_file(&client->dev, &dev_attr_temp##offset##_max); \ | |
493 | device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \ | |
494 | } while (0) | |
495 | ||
496 | static ssize_t | |
e404e274 | 497 | show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
498 | { |
499 | struct w83781d_data *data = w83781d_update_device(dev); | |
500 | return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); | |
501 | } | |
502 | ||
503 | static | |
504 | DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); | |
505 | #define device_create_file_vid(client) \ | |
506 | device_create_file(&client->dev, &dev_attr_cpu0_vid); | |
507 | static ssize_t | |
e404e274 | 508 | show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
509 | { |
510 | struct w83781d_data *data = w83781d_update_device(dev); | |
511 | return sprintf(buf, "%ld\n", (long) data->vrm); | |
512 | } | |
513 | ||
514 | static ssize_t | |
e404e274 | 515 | store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) |
1da177e4 LT |
516 | { |
517 | struct i2c_client *client = to_i2c_client(dev); | |
518 | struct w83781d_data *data = i2c_get_clientdata(client); | |
519 | u32 val; | |
520 | ||
521 | val = simple_strtoul(buf, NULL, 10); | |
522 | data->vrm = val; | |
523 | ||
524 | return count; | |
525 | } | |
526 | ||
527 | static | |
528 | DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); | |
529 | #define device_create_file_vrm(client) \ | |
530 | device_create_file(&client->dev, &dev_attr_vrm); | |
531 | static ssize_t | |
e404e274 | 532 | show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
533 | { |
534 | struct w83781d_data *data = w83781d_update_device(dev); | |
68188ba7 | 535 | return sprintf(buf, "%u\n", data->alarms); |
1da177e4 LT |
536 | } |
537 | ||
538 | static | |
539 | DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); | |
540 | #define device_create_file_alarms(client) \ | |
541 | device_create_file(&client->dev, &dev_attr_alarms); | |
e404e274 | 542 | static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
543 | { |
544 | struct w83781d_data *data = w83781d_update_device(dev); | |
545 | return sprintf(buf, "%ld\n", | |
546 | (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type)); | |
547 | } | |
e404e274 | 548 | static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
549 | { |
550 | struct w83781d_data *data = w83781d_update_device(dev); | |
551 | return sprintf(buf, "%ld\n", | |
552 | (long)BEEP_ENABLE_FROM_REG(data->beep_enable)); | |
553 | } | |
554 | ||
555 | #define BEEP_ENABLE 0 /* Store beep_enable */ | |
556 | #define BEEP_MASK 1 /* Store beep_mask */ | |
557 | ||
558 | static ssize_t | |
559 | store_beep_reg(struct device *dev, const char *buf, size_t count, | |
560 | int update_mask) | |
561 | { | |
562 | struct i2c_client *client = to_i2c_client(dev); | |
563 | struct w83781d_data *data = i2c_get_clientdata(client); | |
564 | u32 val, val2; | |
565 | ||
566 | val = simple_strtoul(buf, NULL, 10); | |
567 | ||
568 | down(&data->update_lock); | |
569 | ||
570 | if (update_mask == BEEP_MASK) { /* We are storing beep_mask */ | |
571 | data->beep_mask = BEEP_MASK_TO_REG(val, data->type); | |
572 | w83781d_write_value(client, W83781D_REG_BEEP_INTS1, | |
573 | data->beep_mask & 0xff); | |
574 | ||
575 | if ((data->type != w83781d) && (data->type != as99127f)) { | |
576 | w83781d_write_value(client, W83781D_REG_BEEP_INTS3, | |
577 | ((data->beep_mask) >> 16) & 0xff); | |
578 | } | |
579 | ||
580 | val2 = (data->beep_mask >> 8) & 0x7f; | |
581 | } else { /* We are storing beep_enable */ | |
582 | val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f; | |
583 | data->beep_enable = BEEP_ENABLE_TO_REG(val); | |
584 | } | |
585 | ||
586 | w83781d_write_value(client, W83781D_REG_BEEP_INTS2, | |
587 | val2 | data->beep_enable << 7); | |
588 | ||
589 | up(&data->update_lock); | |
590 | return count; | |
591 | } | |
592 | ||
593 | #define sysfs_beep(REG, reg) \ | |
e404e274 | 594 | static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 | 595 | { \ |
e404e274 | 596 | return show_beep_##reg(dev, attr, buf); \ |
1da177e4 | 597 | } \ |
e404e274 | 598 | static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
599 | { \ |
600 | return store_beep_reg(dev, buf, count, BEEP_##REG); \ | |
601 | } \ | |
602 | static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg); | |
603 | ||
604 | sysfs_beep(ENABLE, enable); | |
605 | sysfs_beep(MASK, mask); | |
606 | ||
607 | #define device_create_file_beep(client) \ | |
608 | do { \ | |
609 | device_create_file(&client->dev, &dev_attr_beep_enable); \ | |
610 | device_create_file(&client->dev, &dev_attr_beep_mask); \ | |
611 | } while (0) | |
612 | ||
613 | static ssize_t | |
614 | show_fan_div_reg(struct device *dev, char *buf, int nr) | |
615 | { | |
616 | struct w83781d_data *data = w83781d_update_device(dev); | |
617 | return sprintf(buf, "%ld\n", | |
618 | (long) DIV_FROM_REG(data->fan_div[nr - 1])); | |
619 | } | |
620 | ||
621 | /* Note: we save and restore the fan minimum here, because its value is | |
622 | determined in part by the fan divisor. This follows the principle of | |
623 | least suprise; the user doesn't expect the fan minimum to change just | |
624 | because the divisor changed. */ | |
625 | static ssize_t | |
626 | store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr) | |
627 | { | |
628 | struct i2c_client *client = to_i2c_client(dev); | |
629 | struct w83781d_data *data = i2c_get_clientdata(client); | |
630 | unsigned long min; | |
631 | u8 reg; | |
632 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
633 | ||
634 | down(&data->update_lock); | |
635 | ||
636 | /* Save fan_min */ | |
637 | min = FAN_FROM_REG(data->fan_min[nr], | |
638 | DIV_FROM_REG(data->fan_div[nr])); | |
639 | ||
640 | data->fan_div[nr] = DIV_TO_REG(val, data->type); | |
641 | ||
642 | reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) | |
643 | & (nr==0 ? 0xcf : 0x3f)) | |
644 | | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); | |
645 | w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); | |
646 | ||
647 | /* w83781d and as99127f don't have extended divisor bits */ | |
648 | if (data->type != w83781d && data->type != as99127f) { | |
649 | reg = (w83781d_read_value(client, W83781D_REG_VBAT) | |
650 | & ~(1 << (5 + nr))) | |
651 | | ((data->fan_div[nr] & 0x04) << (3 + nr)); | |
652 | w83781d_write_value(client, W83781D_REG_VBAT, reg); | |
653 | } | |
654 | ||
655 | /* Restore fan_min */ | |
656 | data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); | |
657 | w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]); | |
658 | ||
659 | up(&data->update_lock); | |
660 | return count; | |
661 | } | |
662 | ||
663 | #define sysfs_fan_div(offset) \ | |
e404e274 | 664 | static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
665 | { \ |
666 | return show_fan_div_reg(dev, buf, offset); \ | |
667 | } \ | |
e404e274 | 668 | static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
669 | { \ |
670 | return store_fan_div_reg(dev, buf, count, offset - 1); \ | |
671 | } \ | |
672 | static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset); | |
673 | ||
674 | sysfs_fan_div(1); | |
675 | sysfs_fan_div(2); | |
676 | sysfs_fan_div(3); | |
677 | ||
678 | #define device_create_file_fan_div(client, offset) \ | |
679 | do { \ | |
680 | device_create_file(&client->dev, &dev_attr_fan##offset##_div); \ | |
681 | } while (0) | |
682 | ||
683 | static ssize_t | |
684 | show_pwm_reg(struct device *dev, char *buf, int nr) | |
685 | { | |
686 | struct w83781d_data *data = w83781d_update_device(dev); | |
687 | return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1])); | |
688 | } | |
689 | ||
690 | static ssize_t | |
691 | show_pwmenable_reg(struct device *dev, char *buf, int nr) | |
692 | { | |
693 | struct w83781d_data *data = w83781d_update_device(dev); | |
694 | return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]); | |
695 | } | |
696 | ||
697 | static ssize_t | |
698 | store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr) | |
699 | { | |
700 | struct i2c_client *client = to_i2c_client(dev); | |
701 | struct w83781d_data *data = i2c_get_clientdata(client); | |
702 | u32 val; | |
703 | ||
704 | val = simple_strtoul(buf, NULL, 10); | |
705 | ||
706 | down(&data->update_lock); | |
707 | data->pwm[nr - 1] = PWM_TO_REG(val); | |
708 | w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]); | |
709 | up(&data->update_lock); | |
710 | return count; | |
711 | } | |
712 | ||
713 | static ssize_t | |
714 | store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr) | |
715 | { | |
716 | struct i2c_client *client = to_i2c_client(dev); | |
717 | struct w83781d_data *data = i2c_get_clientdata(client); | |
718 | u32 val, reg; | |
719 | ||
720 | val = simple_strtoul(buf, NULL, 10); | |
721 | ||
722 | down(&data->update_lock); | |
723 | ||
724 | switch (val) { | |
725 | case 0: | |
726 | case 1: | |
727 | reg = w83781d_read_value(client, W83781D_REG_PWMCLK12); | |
728 | w83781d_write_value(client, W83781D_REG_PWMCLK12, | |
729 | (reg & 0xf7) | (val << 3)); | |
730 | ||
731 | reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG); | |
732 | w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, | |
733 | (reg & 0xef) | (!val << 4)); | |
734 | ||
735 | data->pwmenable[nr - 1] = val; | |
736 | break; | |
737 | ||
738 | default: | |
739 | up(&data->update_lock); | |
740 | return -EINVAL; | |
741 | } | |
742 | ||
743 | up(&data->update_lock); | |
744 | return count; | |
745 | } | |
746 | ||
747 | #define sysfs_pwm(offset) \ | |
e404e274 | 748 | static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
749 | { \ |
750 | return show_pwm_reg(dev, buf, offset); \ | |
751 | } \ | |
e404e274 | 752 | static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \ |
1da177e4 LT |
753 | const char *buf, size_t count) \ |
754 | { \ | |
755 | return store_pwm_reg(dev, buf, count, offset); \ | |
756 | } \ | |
757 | static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \ | |
758 | show_regs_pwm_##offset, store_regs_pwm_##offset); | |
759 | ||
760 | #define sysfs_pwmenable(offset) \ | |
e404e274 | 761 | static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
762 | { \ |
763 | return show_pwmenable_reg(dev, buf, offset); \ | |
764 | } \ | |
e404e274 | 765 | static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \ |
1da177e4 LT |
766 | const char *buf, size_t count) \ |
767 | { \ | |
768 | return store_pwmenable_reg(dev, buf, count, offset); \ | |
769 | } \ | |
770 | static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \ | |
771 | show_regs_pwmenable_##offset, store_regs_pwmenable_##offset); | |
772 | ||
773 | sysfs_pwm(1); | |
774 | sysfs_pwm(2); | |
775 | sysfs_pwmenable(2); /* only PWM2 can be enabled/disabled */ | |
776 | sysfs_pwm(3); | |
777 | sysfs_pwm(4); | |
778 | ||
779 | #define device_create_file_pwm(client, offset) \ | |
780 | do { \ | |
781 | device_create_file(&client->dev, &dev_attr_pwm##offset); \ | |
782 | } while (0) | |
783 | ||
784 | #define device_create_file_pwmenable(client, offset) \ | |
785 | do { \ | |
786 | device_create_file(&client->dev, &dev_attr_pwm##offset##_enable); \ | |
787 | } while (0) | |
788 | ||
789 | static ssize_t | |
790 | show_sensor_reg(struct device *dev, char *buf, int nr) | |
791 | { | |
792 | struct w83781d_data *data = w83781d_update_device(dev); | |
793 | return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]); | |
794 | } | |
795 | ||
796 | static ssize_t | |
797 | store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr) | |
798 | { | |
799 | struct i2c_client *client = to_i2c_client(dev); | |
800 | struct w83781d_data *data = i2c_get_clientdata(client); | |
801 | u32 val, tmp; | |
802 | ||
803 | val = simple_strtoul(buf, NULL, 10); | |
804 | ||
805 | down(&data->update_lock); | |
806 | ||
807 | switch (val) { | |
808 | case 1: /* PII/Celeron diode */ | |
809 | tmp = w83781d_read_value(client, W83781D_REG_SCFG1); | |
810 | w83781d_write_value(client, W83781D_REG_SCFG1, | |
811 | tmp | BIT_SCFG1[nr - 1]); | |
812 | tmp = w83781d_read_value(client, W83781D_REG_SCFG2); | |
813 | w83781d_write_value(client, W83781D_REG_SCFG2, | |
814 | tmp | BIT_SCFG2[nr - 1]); | |
815 | data->sens[nr - 1] = val; | |
816 | break; | |
817 | case 2: /* 3904 */ | |
818 | tmp = w83781d_read_value(client, W83781D_REG_SCFG1); | |
819 | w83781d_write_value(client, W83781D_REG_SCFG1, | |
820 | tmp | BIT_SCFG1[nr - 1]); | |
821 | tmp = w83781d_read_value(client, W83781D_REG_SCFG2); | |
822 | w83781d_write_value(client, W83781D_REG_SCFG2, | |
823 | tmp & ~BIT_SCFG2[nr - 1]); | |
824 | data->sens[nr - 1] = val; | |
825 | break; | |
826 | case W83781D_DEFAULT_BETA: /* thermistor */ | |
827 | tmp = w83781d_read_value(client, W83781D_REG_SCFG1); | |
828 | w83781d_write_value(client, W83781D_REG_SCFG1, | |
829 | tmp & ~BIT_SCFG1[nr - 1]); | |
830 | data->sens[nr - 1] = val; | |
831 | break; | |
832 | default: | |
833 | dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n", | |
834 | (long) val, W83781D_DEFAULT_BETA); | |
835 | break; | |
836 | } | |
837 | ||
838 | up(&data->update_lock); | |
839 | return count; | |
840 | } | |
841 | ||
842 | #define sysfs_sensor(offset) \ | |
e404e274 | 843 | static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
844 | { \ |
845 | return show_sensor_reg(dev, buf, offset); \ | |
846 | } \ | |
e404e274 | 847 | static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ |
1da177e4 LT |
848 | { \ |
849 | return store_sensor_reg(dev, buf, count, offset); \ | |
850 | } \ | |
851 | static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset); | |
852 | ||
853 | sysfs_sensor(1); | |
854 | sysfs_sensor(2); | |
855 | sysfs_sensor(3); | |
856 | ||
857 | #define device_create_file_sensor(client, offset) \ | |
858 | do { \ | |
859 | device_create_file(&client->dev, &dev_attr_temp##offset##_type); \ | |
860 | } while (0) | |
861 | ||
862 | /* This function is called when: | |
863 | * w83781d_driver is inserted (when this module is loaded), for each | |
864 | available adapter | |
865 | * when a new adapter is inserted (and w83781d_driver is still present) */ | |
866 | static int | |
867 | w83781d_attach_adapter(struct i2c_adapter *adapter) | |
868 | { | |
869 | if (!(adapter->class & I2C_CLASS_HWMON)) | |
870 | return 0; | |
2ed2dc3c | 871 | return i2c_probe(adapter, &addr_data, w83781d_detect); |
1da177e4 LT |
872 | } |
873 | ||
2d8672c5 JD |
874 | static int |
875 | w83781d_isa_attach_adapter(struct i2c_adapter *adapter) | |
876 | { | |
877 | return w83781d_detect(adapter, isa_address, -1); | |
878 | } | |
879 | ||
1da177e4 LT |
880 | /* Assumes that adapter is of I2C, not ISA variety. |
881 | * OTHERWISE DON'T CALL THIS | |
882 | */ | |
883 | static int | |
884 | w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind, | |
885 | struct i2c_client *new_client) | |
886 | { | |
887 | int i, val1 = 0, id; | |
888 | int err; | |
889 | const char *client_name = ""; | |
890 | struct w83781d_data *data = i2c_get_clientdata(new_client); | |
891 | ||
892 | data->lm75[0] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL); | |
893 | if (!(data->lm75[0])) { | |
894 | err = -ENOMEM; | |
895 | goto ERROR_SC_0; | |
896 | } | |
897 | memset(data->lm75[0], 0x00, sizeof (struct i2c_client)); | |
898 | ||
899 | id = i2c_adapter_id(adapter); | |
900 | ||
901 | if (force_subclients[0] == id && force_subclients[1] == address) { | |
902 | for (i = 2; i <= 3; i++) { | |
903 | if (force_subclients[i] < 0x48 || | |
904 | force_subclients[i] > 0x4f) { | |
905 | dev_err(&new_client->dev, "Invalid subclient " | |
906 | "address %d; must be 0x48-0x4f\n", | |
907 | force_subclients[i]); | |
908 | err = -EINVAL; | |
909 | goto ERROR_SC_1; | |
910 | } | |
911 | } | |
912 | w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR, | |
913 | (force_subclients[2] & 0x07) | | |
914 | ((force_subclients[3] & 0x07) << 4)); | |
915 | data->lm75[0]->addr = force_subclients[2]; | |
916 | } else { | |
917 | val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR); | |
918 | data->lm75[0]->addr = 0x48 + (val1 & 0x07); | |
919 | } | |
920 | ||
921 | if (kind != w83783s) { | |
922 | ||
923 | data->lm75[1] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL); | |
924 | if (!(data->lm75[1])) { | |
925 | err = -ENOMEM; | |
926 | goto ERROR_SC_1; | |
927 | } | |
928 | memset(data->lm75[1], 0x0, sizeof(struct i2c_client)); | |
929 | ||
930 | if (force_subclients[0] == id && | |
931 | force_subclients[1] == address) { | |
932 | data->lm75[1]->addr = force_subclients[3]; | |
933 | } else { | |
934 | data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07); | |
935 | } | |
936 | if (data->lm75[0]->addr == data->lm75[1]->addr) { | |
937 | dev_err(&new_client->dev, | |
938 | "Duplicate addresses 0x%x for subclients.\n", | |
939 | data->lm75[0]->addr); | |
940 | err = -EBUSY; | |
941 | goto ERROR_SC_2; | |
942 | } | |
943 | } | |
944 | ||
945 | if (kind == w83781d) | |
946 | client_name = "w83781d subclient"; | |
947 | else if (kind == w83782d) | |
948 | client_name = "w83782d subclient"; | |
949 | else if (kind == w83783s) | |
950 | client_name = "w83783s subclient"; | |
951 | else if (kind == w83627hf) | |
952 | client_name = "w83627hf subclient"; | |
953 | else if (kind == as99127f) | |
954 | client_name = "as99127f subclient"; | |
955 | ||
956 | for (i = 0; i <= 1; i++) { | |
957 | /* store all data in w83781d */ | |
958 | i2c_set_clientdata(data->lm75[i], NULL); | |
959 | data->lm75[i]->adapter = adapter; | |
960 | data->lm75[i]->driver = &w83781d_driver; | |
961 | data->lm75[i]->flags = 0; | |
962 | strlcpy(data->lm75[i]->name, client_name, | |
963 | I2C_NAME_SIZE); | |
964 | if ((err = i2c_attach_client(data->lm75[i]))) { | |
965 | dev_err(&new_client->dev, "Subclient %d " | |
966 | "registration at address 0x%x " | |
967 | "failed.\n", i, data->lm75[i]->addr); | |
968 | if (i == 1) | |
969 | goto ERROR_SC_3; | |
970 | goto ERROR_SC_2; | |
971 | } | |
972 | if (kind == w83783s) | |
973 | break; | |
974 | } | |
975 | ||
976 | return 0; | |
977 | ||
978 | /* Undo inits in case of errors */ | |
979 | ERROR_SC_3: | |
980 | i2c_detach_client(data->lm75[0]); | |
981 | ERROR_SC_2: | |
943b0830 | 982 | if (data->lm75[1]) |
1da177e4 LT |
983 | kfree(data->lm75[1]); |
984 | ERROR_SC_1: | |
943b0830 | 985 | if (data->lm75[0]) |
1da177e4 LT |
986 | kfree(data->lm75[0]); |
987 | ERROR_SC_0: | |
988 | return err; | |
989 | } | |
990 | ||
991 | static int | |
992 | w83781d_detect(struct i2c_adapter *adapter, int address, int kind) | |
993 | { | |
994 | int i = 0, val1 = 0, val2; | |
995 | struct i2c_client *new_client; | |
996 | struct w83781d_data *data; | |
997 | int err; | |
998 | const char *client_name = ""; | |
999 | int is_isa = i2c_is_isa_adapter(adapter); | |
1000 | enum vendor { winbond, asus } vendid; | |
1001 | ||
1002 | if (!is_isa | |
1003 | && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { | |
1004 | err = -EINVAL; | |
1005 | goto ERROR0; | |
1006 | } | |
1007 | ||
1008 | /* Prevent users from forcing a kind for a bus it isn't supposed | |
1009 | to possibly be on */ | |
1010 | if (is_isa && (kind == as99127f || kind == w83783s)) { | |
1011 | dev_err(&adapter->dev, | |
1012 | "Cannot force I2C-only chip for ISA address 0x%02x.\n", | |
1013 | address); | |
1014 | err = -EINVAL; | |
1015 | goto ERROR0; | |
1016 | } | |
1da177e4 LT |
1017 | |
1018 | if (is_isa) | |
1019 | if (!request_region(address, W83781D_EXTENT, | |
fde09509 | 1020 | w83781d_isa_driver.name)) { |
1da177e4 LT |
1021 | dev_dbg(&adapter->dev, "Request of region " |
1022 | "0x%x-0x%x for w83781d failed\n", address, | |
1023 | address + W83781D_EXTENT - 1); | |
1024 | err = -EBUSY; | |
1025 | goto ERROR0; | |
1026 | } | |
1027 | ||
1028 | /* Probe whether there is anything available on this address. Already | |
1029 | done for SMBus clients */ | |
1030 | if (kind < 0) { | |
1031 | if (is_isa) { | |
1032 | ||
1033 | #define REALLY_SLOW_IO | |
1034 | /* We need the timeouts for at least some LM78-like | |
1035 | chips. But only if we read 'undefined' registers. */ | |
1036 | i = inb_p(address + 1); | |
1037 | if (inb_p(address + 2) != i | |
1038 | || inb_p(address + 3) != i | |
1039 | || inb_p(address + 7) != i) { | |
1040 | dev_dbg(&adapter->dev, "Detection of w83781d " | |
1041 | "chip failed at step 1\n"); | |
1042 | err = -ENODEV; | |
1043 | goto ERROR1; | |
1044 | } | |
1045 | #undef REALLY_SLOW_IO | |
1046 | ||
1047 | /* Let's just hope nothing breaks here */ | |
1048 | i = inb_p(address + 5) & 0x7f; | |
1049 | outb_p(~i & 0x7f, address + 5); | |
1050 | val2 = inb_p(address + 5) & 0x7f; | |
1051 | if (val2 != (~i & 0x7f)) { | |
1052 | outb_p(i, address + 5); | |
1053 | dev_dbg(&adapter->dev, "Detection of w83781d " | |
1054 | "chip failed at step 2 (0x%x != " | |
1055 | "0x%x at 0x%x)\n", val2, ~i & 0x7f, | |
1056 | address + 5); | |
1057 | err = -ENODEV; | |
1058 | goto ERROR1; | |
1059 | } | |
1060 | } | |
1061 | } | |
1062 | ||
1063 | /* OK. For now, we presume we have a valid client. We now create the | |
1064 | client structure, even though we cannot fill it completely yet. | |
1065 | But it allows us to access w83781d_{read,write}_value. */ | |
1066 | ||
1067 | if (!(data = kmalloc(sizeof(struct w83781d_data), GFP_KERNEL))) { | |
1068 | err = -ENOMEM; | |
1069 | goto ERROR1; | |
1070 | } | |
1071 | memset(data, 0, sizeof(struct w83781d_data)); | |
1072 | ||
1073 | new_client = &data->client; | |
1074 | i2c_set_clientdata(new_client, data); | |
1075 | new_client->addr = address; | |
1076 | init_MUTEX(&data->lock); | |
1077 | new_client->adapter = adapter; | |
fde09509 | 1078 | new_client->driver = is_isa ? &w83781d_isa_driver : &w83781d_driver; |
1da177e4 LT |
1079 | new_client->flags = 0; |
1080 | ||
1081 | /* Now, we do the remaining detection. */ | |
1082 | ||
1083 | /* The w8378?d may be stuck in some other bank than bank 0. This may | |
1084 | make reading other information impossible. Specify a force=... or | |
1085 | force_*=... parameter, and the Winbond will be reset to the right | |
1086 | bank. */ | |
1087 | if (kind < 0) { | |
1088 | if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80) { | |
1089 | dev_dbg(&new_client->dev, "Detection failed at step " | |
1090 | "3\n"); | |
1091 | err = -ENODEV; | |
1092 | goto ERROR2; | |
1093 | } | |
1094 | val1 = w83781d_read_value(new_client, W83781D_REG_BANK); | |
1095 | val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN); | |
1096 | /* Check for Winbond or Asus ID if in bank 0 */ | |
1097 | if ((!(val1 & 0x07)) && | |
1098 | (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3)) | |
1099 | || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) { | |
1100 | dev_dbg(&new_client->dev, "Detection failed at step " | |
1101 | "4\n"); | |
1102 | err = -ENODEV; | |
1103 | goto ERROR2; | |
1104 | } | |
1105 | /* If Winbond SMBus, check address at 0x48. | |
1106 | Asus doesn't support, except for as99127f rev.2 */ | |
1107 | if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) || | |
1108 | ((val1 & 0x80) && (val2 == 0x5c)))) { | |
1109 | if (w83781d_read_value | |
1110 | (new_client, W83781D_REG_I2C_ADDR) != address) { | |
1111 | dev_dbg(&new_client->dev, "Detection failed " | |
1112 | "at step 5\n"); | |
1113 | err = -ENODEV; | |
1114 | goto ERROR2; | |
1115 | } | |
1116 | } | |
1117 | } | |
1118 | ||
1119 | /* We have either had a force parameter, or we have already detected the | |
1120 | Winbond. Put it now into bank 0 and Vendor ID High Byte */ | |
1121 | w83781d_write_value(new_client, W83781D_REG_BANK, | |
1122 | (w83781d_read_value(new_client, | |
1123 | W83781D_REG_BANK) & 0x78) | | |
1124 | 0x80); | |
1125 | ||
1126 | /* Determine the chip type. */ | |
1127 | if (kind <= 0) { | |
1128 | /* get vendor ID */ | |
1129 | val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN); | |
1130 | if (val2 == 0x5c) | |
1131 | vendid = winbond; | |
1132 | else if (val2 == 0x12) | |
1133 | vendid = asus; | |
1134 | else { | |
1135 | dev_dbg(&new_client->dev, "Chip was made by neither " | |
1136 | "Winbond nor Asus?\n"); | |
1137 | err = -ENODEV; | |
1138 | goto ERROR2; | |
1139 | } | |
1140 | ||
1141 | val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID); | |
1142 | if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond) | |
1143 | kind = w83781d; | |
1144 | else if (val1 == 0x30 && vendid == winbond) | |
1145 | kind = w83782d; | |
1146 | else if (val1 == 0x40 && vendid == winbond && !is_isa | |
1147 | && address == 0x2d) | |
1148 | kind = w83783s; | |
7c7a5304 | 1149 | else if (val1 == 0x21 && vendid == winbond) |
1da177e4 LT |
1150 | kind = w83627hf; |
1151 | else if (val1 == 0x31 && !is_isa && address >= 0x28) | |
1152 | kind = as99127f; | |
1da177e4 LT |
1153 | else { |
1154 | if (kind == 0) | |
1155 | dev_warn(&new_client->dev, "Ignoring 'force' " | |
1156 | "parameter for unknown chip at " | |
1157 | "adapter %d, address 0x%02x\n", | |
1158 | i2c_adapter_id(adapter), address); | |
1159 | err = -EINVAL; | |
1160 | goto ERROR2; | |
1161 | } | |
1162 | } | |
1163 | ||
1164 | if (kind == w83781d) { | |
1165 | client_name = "w83781d"; | |
1166 | } else if (kind == w83782d) { | |
1167 | client_name = "w83782d"; | |
1168 | } else if (kind == w83783s) { | |
1169 | client_name = "w83783s"; | |
1170 | } else if (kind == w83627hf) { | |
7c7a5304 | 1171 | client_name = "w83627hf"; |
1da177e4 LT |
1172 | } else if (kind == as99127f) { |
1173 | client_name = "as99127f"; | |
1da177e4 LT |
1174 | } |
1175 | ||
1176 | /* Fill in the remaining client fields and put into the global list */ | |
1177 | strlcpy(new_client->name, client_name, I2C_NAME_SIZE); | |
1178 | data->type = kind; | |
1179 | ||
1180 | data->valid = 0; | |
1181 | init_MUTEX(&data->update_lock); | |
1182 | ||
1183 | /* Tell the I2C layer a new client has arrived */ | |
1184 | if ((err = i2c_attach_client(new_client))) | |
1185 | goto ERROR2; | |
1186 | ||
1187 | /* attach secondary i2c lm75-like clients */ | |
1188 | if (!is_isa) { | |
1189 | if ((err = w83781d_detect_subclients(adapter, address, | |
1190 | kind, new_client))) | |
1191 | goto ERROR3; | |
1192 | } else { | |
1193 | data->lm75[0] = NULL; | |
1194 | data->lm75[1] = NULL; | |
1195 | } | |
1196 | ||
1197 | /* Initialize the chip */ | |
1198 | w83781d_init_client(new_client); | |
1199 | ||
1200 | /* A few vars need to be filled upon startup */ | |
1201 | for (i = 1; i <= 3; i++) { | |
1202 | data->fan_min[i - 1] = w83781d_read_value(new_client, | |
1203 | W83781D_REG_FAN_MIN(i)); | |
1204 | } | |
1205 | if (kind != w83781d && kind != as99127f) | |
1206 | for (i = 0; i < 4; i++) | |
1207 | data->pwmenable[i] = 1; | |
1208 | ||
1209 | /* Register sysfs hooks */ | |
943b0830 MH |
1210 | data->class_dev = hwmon_device_register(&new_client->dev); |
1211 | if (IS_ERR(data->class_dev)) { | |
1212 | err = PTR_ERR(data->class_dev); | |
1213 | goto ERROR4; | |
1214 | } | |
1215 | ||
1da177e4 | 1216 | device_create_file_in(new_client, 0); |
7c7a5304 | 1217 | if (kind != w83783s) |
1da177e4 LT |
1218 | device_create_file_in(new_client, 1); |
1219 | device_create_file_in(new_client, 2); | |
1220 | device_create_file_in(new_client, 3); | |
1221 | device_create_file_in(new_client, 4); | |
1222 | device_create_file_in(new_client, 5); | |
1223 | device_create_file_in(new_client, 6); | |
1224 | if (kind != as99127f && kind != w83781d && kind != w83783s) { | |
1225 | device_create_file_in(new_client, 7); | |
1226 | device_create_file_in(new_client, 8); | |
1227 | } | |
1228 | ||
1229 | device_create_file_fan(new_client, 1); | |
1230 | device_create_file_fan(new_client, 2); | |
7c7a5304 | 1231 | device_create_file_fan(new_client, 3); |
1da177e4 LT |
1232 | |
1233 | device_create_file_temp(new_client, 1); | |
1234 | device_create_file_temp(new_client, 2); | |
7c7a5304 | 1235 | if (kind != w83783s) |
1da177e4 LT |
1236 | device_create_file_temp(new_client, 3); |
1237 | ||
7c7a5304 JD |
1238 | device_create_file_vid(new_client); |
1239 | device_create_file_vrm(new_client); | |
1da177e4 LT |
1240 | |
1241 | device_create_file_fan_div(new_client, 1); | |
1242 | device_create_file_fan_div(new_client, 2); | |
7c7a5304 | 1243 | device_create_file_fan_div(new_client, 3); |
1da177e4 LT |
1244 | |
1245 | device_create_file_alarms(new_client); | |
1246 | ||
1247 | device_create_file_beep(new_client); | |
1248 | ||
1249 | if (kind != w83781d && kind != as99127f) { | |
1250 | device_create_file_pwm(new_client, 1); | |
1251 | device_create_file_pwm(new_client, 2); | |
1252 | device_create_file_pwmenable(new_client, 2); | |
1253 | } | |
1254 | if (kind == w83782d && !is_isa) { | |
1255 | device_create_file_pwm(new_client, 3); | |
1256 | device_create_file_pwm(new_client, 4); | |
1257 | } | |
1258 | ||
1259 | if (kind != as99127f && kind != w83781d) { | |
1260 | device_create_file_sensor(new_client, 1); | |
1261 | device_create_file_sensor(new_client, 2); | |
7c7a5304 | 1262 | if (kind != w83783s) |
1da177e4 LT |
1263 | device_create_file_sensor(new_client, 3); |
1264 | } | |
1265 | ||
1266 | return 0; | |
1267 | ||
943b0830 MH |
1268 | ERROR4: |
1269 | if (data->lm75[1]) { | |
1270 | i2c_detach_client(data->lm75[1]); | |
1271 | kfree(data->lm75[1]); | |
1272 | } | |
1273 | if (data->lm75[0]) { | |
1274 | i2c_detach_client(data->lm75[0]); | |
1275 | kfree(data->lm75[0]); | |
1276 | } | |
1da177e4 LT |
1277 | ERROR3: |
1278 | i2c_detach_client(new_client); | |
1279 | ERROR2: | |
1280 | kfree(data); | |
1281 | ERROR1: | |
1282 | if (is_isa) | |
1283 | release_region(address, W83781D_EXTENT); | |
1284 | ERROR0: | |
1285 | return err; | |
1286 | } | |
1287 | ||
1288 | static int | |
1289 | w83781d_detach_client(struct i2c_client *client) | |
1290 | { | |
943b0830 | 1291 | struct w83781d_data *data = i2c_get_clientdata(client); |
1da177e4 LT |
1292 | int err; |
1293 | ||
943b0830 MH |
1294 | /* main client */ |
1295 | if (data) | |
1296 | hwmon_device_unregister(data->class_dev); | |
1297 | ||
1da177e4 LT |
1298 | if (i2c_is_isa_client(client)) |
1299 | release_region(client->addr, W83781D_EXTENT); | |
1300 | ||
7bef5594 | 1301 | if ((err = i2c_detach_client(client))) |
1da177e4 | 1302 | return err; |
1da177e4 | 1303 | |
943b0830 MH |
1304 | /* main client */ |
1305 | if (data) | |
1306 | kfree(data); | |
1307 | ||
1308 | /* subclient */ | |
1309 | else | |
1da177e4 | 1310 | kfree(client); |
1da177e4 LT |
1311 | |
1312 | return 0; | |
1313 | } | |
1314 | ||
1315 | /* The SMBus locks itself, usually, but nothing may access the Winbond between | |
1316 | bank switches. ISA access must always be locked explicitly! | |
1317 | We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks, | |
1318 | would slow down the W83781D access and should not be necessary. | |
1319 | There are some ugly typecasts here, but the good news is - they should | |
1320 | nowhere else be necessary! */ | |
1321 | static int | |
1322 | w83781d_read_value(struct i2c_client *client, u16 reg) | |
1323 | { | |
1324 | struct w83781d_data *data = i2c_get_clientdata(client); | |
1325 | int res, word_sized, bank; | |
1326 | struct i2c_client *cl; | |
1327 | ||
1328 | down(&data->lock); | |
1329 | if (i2c_is_isa_client(client)) { | |
1330 | word_sized = (((reg & 0xff00) == 0x100) | |
1331 | || ((reg & 0xff00) == 0x200)) | |
1332 | && (((reg & 0x00ff) == 0x50) | |
1333 | || ((reg & 0x00ff) == 0x53) | |
1334 | || ((reg & 0x00ff) == 0x55)); | |
1335 | if (reg & 0xff00) { | |
1336 | outb_p(W83781D_REG_BANK, | |
1337 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1338 | outb_p(reg >> 8, | |
1339 | client->addr + W83781D_DATA_REG_OFFSET); | |
1340 | } | |
1341 | outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET); | |
1342 | res = inb_p(client->addr + W83781D_DATA_REG_OFFSET); | |
1343 | if (word_sized) { | |
1344 | outb_p((reg & 0xff) + 1, | |
1345 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1346 | res = | |
1347 | (res << 8) + inb_p(client->addr + | |
1348 | W83781D_DATA_REG_OFFSET); | |
1349 | } | |
1350 | if (reg & 0xff00) { | |
1351 | outb_p(W83781D_REG_BANK, | |
1352 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1353 | outb_p(0, client->addr + W83781D_DATA_REG_OFFSET); | |
1354 | } | |
1355 | } else { | |
1356 | bank = (reg >> 8) & 0x0f; | |
1357 | if (bank > 2) | |
1358 | /* switch banks */ | |
1359 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, | |
1360 | bank); | |
1361 | if (bank == 0 || bank > 2) { | |
1362 | res = i2c_smbus_read_byte_data(client, reg & 0xff); | |
1363 | } else { | |
1364 | /* switch to subclient */ | |
1365 | cl = data->lm75[bank - 1]; | |
1366 | /* convert from ISA to LM75 I2C addresses */ | |
1367 | switch (reg & 0xff) { | |
1368 | case 0x50: /* TEMP */ | |
1369 | res = swab16(i2c_smbus_read_word_data(cl, 0)); | |
1370 | break; | |
1371 | case 0x52: /* CONFIG */ | |
1372 | res = i2c_smbus_read_byte_data(cl, 1); | |
1373 | break; | |
1374 | case 0x53: /* HYST */ | |
1375 | res = swab16(i2c_smbus_read_word_data(cl, 2)); | |
1376 | break; | |
1377 | case 0x55: /* OVER */ | |
1378 | default: | |
1379 | res = swab16(i2c_smbus_read_word_data(cl, 3)); | |
1380 | break; | |
1381 | } | |
1382 | } | |
1383 | if (bank > 2) | |
1384 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); | |
1385 | } | |
1386 | up(&data->lock); | |
1387 | return res; | |
1388 | } | |
1389 | ||
1390 | static int | |
1391 | w83781d_write_value(struct i2c_client *client, u16 reg, u16 value) | |
1392 | { | |
1393 | struct w83781d_data *data = i2c_get_clientdata(client); | |
1394 | int word_sized, bank; | |
1395 | struct i2c_client *cl; | |
1396 | ||
1397 | down(&data->lock); | |
1398 | if (i2c_is_isa_client(client)) { | |
1399 | word_sized = (((reg & 0xff00) == 0x100) | |
1400 | || ((reg & 0xff00) == 0x200)) | |
1401 | && (((reg & 0x00ff) == 0x53) | |
1402 | || ((reg & 0x00ff) == 0x55)); | |
1403 | if (reg & 0xff00) { | |
1404 | outb_p(W83781D_REG_BANK, | |
1405 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1406 | outb_p(reg >> 8, | |
1407 | client->addr + W83781D_DATA_REG_OFFSET); | |
1408 | } | |
1409 | outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET); | |
1410 | if (word_sized) { | |
1411 | outb_p(value >> 8, | |
1412 | client->addr + W83781D_DATA_REG_OFFSET); | |
1413 | outb_p((reg & 0xff) + 1, | |
1414 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1415 | } | |
1416 | outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET); | |
1417 | if (reg & 0xff00) { | |
1418 | outb_p(W83781D_REG_BANK, | |
1419 | client->addr + W83781D_ADDR_REG_OFFSET); | |
1420 | outb_p(0, client->addr + W83781D_DATA_REG_OFFSET); | |
1421 | } | |
1422 | } else { | |
1423 | bank = (reg >> 8) & 0x0f; | |
1424 | if (bank > 2) | |
1425 | /* switch banks */ | |
1426 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, | |
1427 | bank); | |
1428 | if (bank == 0 || bank > 2) { | |
1429 | i2c_smbus_write_byte_data(client, reg & 0xff, | |
1430 | value & 0xff); | |
1431 | } else { | |
1432 | /* switch to subclient */ | |
1433 | cl = data->lm75[bank - 1]; | |
1434 | /* convert from ISA to LM75 I2C addresses */ | |
1435 | switch (reg & 0xff) { | |
1436 | case 0x52: /* CONFIG */ | |
1437 | i2c_smbus_write_byte_data(cl, 1, value & 0xff); | |
1438 | break; | |
1439 | case 0x53: /* HYST */ | |
1440 | i2c_smbus_write_word_data(cl, 2, swab16(value)); | |
1441 | break; | |
1442 | case 0x55: /* OVER */ | |
1443 | i2c_smbus_write_word_data(cl, 3, swab16(value)); | |
1444 | break; | |
1445 | } | |
1446 | } | |
1447 | if (bank > 2) | |
1448 | i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); | |
1449 | } | |
1450 | up(&data->lock); | |
1451 | return 0; | |
1452 | } | |
1453 | ||
1454 | /* Called when we have found a new W83781D. It should set limits, etc. */ | |
1455 | static void | |
1456 | w83781d_init_client(struct i2c_client *client) | |
1457 | { | |
1458 | struct w83781d_data *data = i2c_get_clientdata(client); | |
1459 | int i, p; | |
1460 | int type = data->type; | |
1461 | u8 tmp; | |
1462 | ||
1463 | if (init && type != as99127f) { /* this resets registers we don't have | |
1464 | documentation for on the as99127f */ | |
1465 | /* save these registers */ | |
1466 | i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG); | |
1467 | p = w83781d_read_value(client, W83781D_REG_PWMCLK12); | |
1468 | /* Reset all except Watchdog values and last conversion values | |
1469 | This sets fan-divs to 2, among others */ | |
1470 | w83781d_write_value(client, W83781D_REG_CONFIG, 0x80); | |
1471 | /* Restore the registers and disable power-on abnormal beep. | |
1472 | This saves FAN 1/2/3 input/output values set by BIOS. */ | |
1473 | w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80); | |
1474 | w83781d_write_value(client, W83781D_REG_PWMCLK12, p); | |
1475 | /* Disable master beep-enable (reset turns it on). | |
1476 | Individual beep_mask should be reset to off but for some reason | |
1477 | disabling this bit helps some people not get beeped */ | |
1478 | w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0); | |
1479 | } | |
1480 | ||
303760b4 | 1481 | data->vrm = vid_which_vrm(); |
1da177e4 LT |
1482 | |
1483 | if ((type != w83781d) && (type != as99127f)) { | |
1484 | tmp = w83781d_read_value(client, W83781D_REG_SCFG1); | |
1485 | for (i = 1; i <= 3; i++) { | |
1486 | if (!(tmp & BIT_SCFG1[i - 1])) { | |
1487 | data->sens[i - 1] = W83781D_DEFAULT_BETA; | |
1488 | } else { | |
1489 | if (w83781d_read_value | |
1490 | (client, | |
1491 | W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) | |
1492 | data->sens[i - 1] = 1; | |
1493 | else | |
1494 | data->sens[i - 1] = 2; | |
1495 | } | |
7c7a5304 | 1496 | if (type == w83783s && i == 2) |
1da177e4 LT |
1497 | break; |
1498 | } | |
1499 | } | |
1500 | ||
1501 | if (init && type != as99127f) { | |
1502 | /* Enable temp2 */ | |
1503 | tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG); | |
1504 | if (tmp & 0x01) { | |
1505 | dev_warn(&client->dev, "Enabling temp2, readings " | |
1506 | "might not make sense\n"); | |
1507 | w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG, | |
1508 | tmp & 0xfe); | |
1509 | } | |
1510 | ||
1511 | /* Enable temp3 */ | |
7c7a5304 | 1512 | if (type != w83783s) { |
1da177e4 LT |
1513 | tmp = w83781d_read_value(client, |
1514 | W83781D_REG_TEMP3_CONFIG); | |
1515 | if (tmp & 0x01) { | |
1516 | dev_warn(&client->dev, "Enabling temp3, " | |
1517 | "readings might not make sense\n"); | |
1518 | w83781d_write_value(client, | |
1519 | W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); | |
1520 | } | |
1521 | } | |
1522 | ||
1523 | if (type != w83781d) { | |
1524 | /* enable comparator mode for temp2 and temp3 so | |
1525 | alarm indication will work correctly */ | |
1526 | i = w83781d_read_value(client, W83781D_REG_IRQ); | |
1527 | if (!(i & 0x40)) | |
1528 | w83781d_write_value(client, W83781D_REG_IRQ, | |
1529 | i | 0x40); | |
1530 | } | |
1531 | } | |
1532 | ||
1533 | /* Start monitoring */ | |
1534 | w83781d_write_value(client, W83781D_REG_CONFIG, | |
1535 | (w83781d_read_value(client, | |
1536 | W83781D_REG_CONFIG) & 0xf7) | |
1537 | | 0x01); | |
1538 | } | |
1539 | ||
1540 | static struct w83781d_data *w83781d_update_device(struct device *dev) | |
1541 | { | |
1542 | struct i2c_client *client = to_i2c_client(dev); | |
1543 | struct w83781d_data *data = i2c_get_clientdata(client); | |
1544 | int i; | |
1545 | ||
1546 | down(&data->update_lock); | |
1547 | ||
1548 | if (time_after(jiffies, data->last_updated + HZ + HZ / 2) | |
1549 | || !data->valid) { | |
1550 | dev_dbg(dev, "Starting device update\n"); | |
1551 | ||
1552 | for (i = 0; i <= 8; i++) { | |
7c7a5304 | 1553 | if (data->type == w83783s && i == 1) |
1da177e4 LT |
1554 | continue; /* 783S has no in1 */ |
1555 | data->in[i] = | |
1556 | w83781d_read_value(client, W83781D_REG_IN(i)); | |
1557 | data->in_min[i] = | |
1558 | w83781d_read_value(client, W83781D_REG_IN_MIN(i)); | |
1559 | data->in_max[i] = | |
1560 | w83781d_read_value(client, W83781D_REG_IN_MAX(i)); | |
7c7a5304 | 1561 | if ((data->type != w83782d) |
1da177e4 LT |
1562 | && (data->type != w83627hf) && (i == 6)) |
1563 | break; | |
1564 | } | |
1565 | for (i = 1; i <= 3; i++) { | |
1566 | data->fan[i - 1] = | |
1567 | w83781d_read_value(client, W83781D_REG_FAN(i)); | |
1568 | data->fan_min[i - 1] = | |
1569 | w83781d_read_value(client, W83781D_REG_FAN_MIN(i)); | |
1570 | } | |
1571 | if (data->type != w83781d && data->type != as99127f) { | |
1572 | for (i = 1; i <= 4; i++) { | |
1573 | data->pwm[i - 1] = | |
1574 | w83781d_read_value(client, | |
1575 | W83781D_REG_PWM(i)); | |
1576 | if ((data->type != w83782d | |
1577 | || i2c_is_isa_client(client)) | |
1578 | && i == 2) | |
1579 | break; | |
1580 | } | |
1581 | /* Only PWM2 can be disabled */ | |
1582 | data->pwmenable[1] = (w83781d_read_value(client, | |
1583 | W83781D_REG_PWMCLK12) & 0x08) >> 3; | |
1584 | } | |
1585 | ||
1586 | data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1)); | |
1587 | data->temp_max = | |
1588 | w83781d_read_value(client, W83781D_REG_TEMP_OVER(1)); | |
1589 | data->temp_max_hyst = | |
1590 | w83781d_read_value(client, W83781D_REG_TEMP_HYST(1)); | |
1591 | data->temp_add[0] = | |
1592 | w83781d_read_value(client, W83781D_REG_TEMP(2)); | |
1593 | data->temp_max_add[0] = | |
1594 | w83781d_read_value(client, W83781D_REG_TEMP_OVER(2)); | |
1595 | data->temp_max_hyst_add[0] = | |
1596 | w83781d_read_value(client, W83781D_REG_TEMP_HYST(2)); | |
7c7a5304 | 1597 | if (data->type != w83783s) { |
1da177e4 LT |
1598 | data->temp_add[1] = |
1599 | w83781d_read_value(client, W83781D_REG_TEMP(3)); | |
1600 | data->temp_max_add[1] = | |
1601 | w83781d_read_value(client, | |
1602 | W83781D_REG_TEMP_OVER(3)); | |
1603 | data->temp_max_hyst_add[1] = | |
1604 | w83781d_read_value(client, | |
1605 | W83781D_REG_TEMP_HYST(3)); | |
1606 | } | |
1607 | i = w83781d_read_value(client, W83781D_REG_VID_FANDIV); | |
7c7a5304 JD |
1608 | data->vid = i & 0x0f; |
1609 | data->vid |= (w83781d_read_value(client, | |
1610 | W83781D_REG_CHIPID) & 0x01) << 4; | |
1da177e4 LT |
1611 | data->fan_div[0] = (i >> 4) & 0x03; |
1612 | data->fan_div[1] = (i >> 6) & 0x03; | |
7c7a5304 JD |
1613 | data->fan_div[2] = (w83781d_read_value(client, |
1614 | W83781D_REG_PIN) >> 6) & 0x03; | |
1da177e4 LT |
1615 | if ((data->type != w83781d) && (data->type != as99127f)) { |
1616 | i = w83781d_read_value(client, W83781D_REG_VBAT); | |
1617 | data->fan_div[0] |= (i >> 3) & 0x04; | |
1618 | data->fan_div[1] |= (i >> 4) & 0x04; | |
7c7a5304 | 1619 | data->fan_div[2] |= (i >> 5) & 0x04; |
1da177e4 LT |
1620 | } |
1621 | data->alarms = | |
1622 | w83781d_read_value(client, | |
1623 | W83781D_REG_ALARM1) + | |
1624 | (w83781d_read_value(client, W83781D_REG_ALARM2) << 8); | |
1625 | if ((data->type == w83782d) || (data->type == w83627hf)) { | |
1626 | data->alarms |= | |
1627 | w83781d_read_value(client, | |
1628 | W83781D_REG_ALARM3) << 16; | |
1629 | } | |
1630 | i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2); | |
1631 | data->beep_enable = i >> 7; | |
1632 | data->beep_mask = ((i & 0x7f) << 8) + | |
1633 | w83781d_read_value(client, W83781D_REG_BEEP_INTS1); | |
1634 | if ((data->type != w83781d) && (data->type != as99127f)) { | |
1635 | data->beep_mask |= | |
1636 | w83781d_read_value(client, | |
1637 | W83781D_REG_BEEP_INTS3) << 16; | |
1638 | } | |
1639 | data->last_updated = jiffies; | |
1640 | data->valid = 1; | |
1641 | } | |
1642 | ||
1643 | up(&data->update_lock); | |
1644 | ||
1645 | return data; | |
1646 | } | |
1647 | ||
1648 | static int __init | |
1649 | sensors_w83781d_init(void) | |
1650 | { | |
fde09509 JD |
1651 | int res; |
1652 | ||
1653 | res = i2c_add_driver(&w83781d_driver); | |
1654 | if (res) | |
1655 | return res; | |
1656 | ||
1657 | res = i2c_isa_add_driver(&w83781d_isa_driver); | |
1658 | if (res) { | |
1659 | i2c_del_driver(&w83781d_driver); | |
1660 | return res; | |
1661 | } | |
1662 | ||
1663 | return 0; | |
1da177e4 LT |
1664 | } |
1665 | ||
1666 | static void __exit | |
1667 | sensors_w83781d_exit(void) | |
1668 | { | |
fde09509 | 1669 | i2c_isa_del_driver(&w83781d_isa_driver); |
1da177e4 LT |
1670 | i2c_del_driver(&w83781d_driver); |
1671 | } | |
1672 | ||
1673 | MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " | |
1674 | "Philip Edelbrock <phil@netroedge.com>, " | |
1675 | "and Mark Studebaker <mdsxyz123@yahoo.com>"); | |
1676 | MODULE_DESCRIPTION("W83781D driver"); | |
1677 | MODULE_LICENSE("GPL"); | |
1678 | ||
1679 | module_init(sensors_w83781d_init); | |
1680 | module_exit(sensors_w83781d_exit); |