projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
hwmon: (lm70) Add TI TMP121 support
[linux-2.6-block.git] / drivers / hwmon / w83627hf.c
CommitLineData
1da177e4
LT		 1/*
2 w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
787c72b1 8 Copyright (c) 2007 Jean Delvare <khali@linux-fr.org>
1da177e4
LT		 9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23*/
24
25/*
26 Supports following chips:
27
28 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
29 w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
30 w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
31 w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
c2db6ce1 32 w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
1da177e4
LT		 33 w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
34
35 For other winbond chips, and for i2c support in the above chips,
36 use w83781d.c.
37
38 Note: automatic ("cruise") fan control for 697, 637 & 627thf not
39 supported yet.
40*/
41
42#include <linux/module.h>
43#include <linux/init.h>
44#include <linux/slab.h>
45#include <linux/jiffies.h>
787c72b1 46#include <linux/platform_device.h>
943b0830 47#include <linux/hwmon.h>
07584c76 48#include <linux/hwmon-sysfs.h>
303760b4 49#include <linux/hwmon-vid.h>
943b0830 50#include <linux/err.h>
9a61bf63 51#include <linux/mutex.h>
d27c37c0 52#include <linux/ioport.h>
1da177e4
LT		 53#include <asm/io.h>
54#include "lm75.h"
55
787c72b1 56static struct platform_device *pdev;
d27c37c0
JD		 57
58#define DRVNAME "w83627hf"
59enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
60
1da177e4
LT		 61static u16 force_addr;
62module_param(force_addr, ushort, 0);
63MODULE_PARM_DESC(force_addr,
64 "Initialize the base address of the sensors");
65static u8 force_i2c = 0x1f;
66module_param(force_i2c, byte, 0);
67MODULE_PARM_DESC(force_i2c,
68 "Initialize the i2c address of the sensors");
69
1da177e4
LT		 70static int init = 1;
71module_param(init, bool, 0);
72MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
73
67b671bc
JD		 74static unsigned short force_id;
75module_param(force_id, ushort, 0);
76MODULE_PARM_DESC(force_id, "Override the detected device ID");
77
1da177e4
LT		 78/* modified from kernel/include/traps.c */
79static int REG; /* The register to read/write */
80#define DEV 0x07 /* Register: Logical device select */
81static int VAL; /* The value to read/write */
82
83/* logical device numbers for superio_select (below) */
84#define W83627HF_LD_FDC 0x00
85#define W83627HF_LD_PRT 0x01
86#define W83627HF_LD_UART1 0x02
87#define W83627HF_LD_UART2 0x03
88#define W83627HF_LD_KBC 0x05
89#define W83627HF_LD_CIR 0x06 /* w83627hf only */
90#define W83627HF_LD_GAME 0x07
91#define W83627HF_LD_MIDI 0x07
92#define W83627HF_LD_GPIO1 0x07
93#define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
94#define W83627HF_LD_GPIO2 0x08
95#define W83627HF_LD_GPIO3 0x09
96#define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
97#define W83627HF_LD_ACPI 0x0a
98#define W83627HF_LD_HWM 0x0b
99
100#define DEVID 0x20 /* Register: Device ID */
101
102#define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
103#define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
104#define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
105
c2db6ce1
JD		 106#define W83687THF_VID_EN 0x29 /* w83687thf only */
107#define W83687THF_VID_CFG 0xF0 /* w83687thf only */
108#define W83687THF_VID_DATA 0xF1 /* w83687thf only */
109
1da177e4
LT		 110static inline void
111superio_outb(int reg, int val)
112{
113 outb(reg, REG);
114 outb(val, VAL);
115}
116
117static inline int
118superio_inb(int reg)
119{
120 outb(reg, REG);
121 return inb(VAL);
122}
123
124static inline void
125superio_select(int ld)
126{
127 outb(DEV, REG);
128 outb(ld, VAL);
129}
130
131static inline void
132superio_enter(void)
133{
134 outb(0x87, REG);
135 outb(0x87, REG);
136}
137
138static inline void
139superio_exit(void)
140{
141 outb(0xAA, REG);
142}
143
144#define W627_DEVID 0x52
145#define W627THF_DEVID 0x82
146#define W697_DEVID 0x60
147#define W637_DEVID 0x70
c2db6ce1 148#define W687THF_DEVID 0x85
1da177e4
LT		 149#define WINB_ACT_REG 0x30
150#define WINB_BASE_REG 0x60
151/* Constants specified below */
152
ada0c2f8
PV		 153/* Alignment of the base address */
154#define WINB_ALIGNMENT ~7
1da177e4 155
ada0c2f8
PV		 156/* Offset & size of I/O region we are interested in */
157#define WINB_REGION_OFFSET 5
158#define WINB_REGION_SIZE 2
159
787c72b1
JD		 160/* Where are the sensors address/data registers relative to the region offset */
161#define W83781D_ADDR_REG_OFFSET 0
162#define W83781D_DATA_REG_OFFSET 1
1da177e4
LT		 163
164/* The W83781D registers */
165/* The W83782D registers for nr=7,8 are in bank 5 */
166#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
167 (0x554 + (((nr) - 7) * 2)))
168#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
169 (0x555 + (((nr) - 7) * 2)))
170#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
171 (0x550 + (nr) - 7))
172
2ca2fcd1
JC		 173/* nr:0-2 for fans:1-3 */
174#define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr))
175#define W83627HF_REG_FAN(nr) (0x28 + (nr))
1da177e4 176
df48ed80
JC		 177#define W83627HF_REG_TEMP2_CONFIG 0x152
178#define W83627HF_REG_TEMP3_CONFIG 0x252
179/* these are zero-based, unlike config constants above */
180static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 };
181static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 };
182static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 };
1da177e4
LT		 183
184#define W83781D_REG_BANK 0x4E
185
186#define W83781D_REG_CONFIG 0x40
4a1c4447
YM		 187#define W83781D_REG_ALARM1 0x459
188#define W83781D_REG_ALARM2 0x45A
189#define W83781D_REG_ALARM3 0x45B
1da177e4 190
1da177e4
LT		 191#define W83781D_REG_BEEP_CONFIG 0x4D
192#define W83781D_REG_BEEP_INTS1 0x56
193#define W83781D_REG_BEEP_INTS2 0x57
194#define W83781D_REG_BEEP_INTS3 0x453
195
196#define W83781D_REG_VID_FANDIV 0x47
197
198#define W83781D_REG_CHIPID 0x49
199#define W83781D_REG_WCHIPID 0x58
200#define W83781D_REG_CHIPMAN 0x4F
201#define W83781D_REG_PIN 0x4B
202
203#define W83781D_REG_VBAT 0x5D
204
205#define W83627HF_REG_PWM1 0x5A
206#define W83627HF_REG_PWM2 0x5B
1da177e4 207
a95a5ed8
DG		 208static const u8 W83627THF_REG_PWM_ENABLE[] = {
209 0x04, /* FAN 1 mode */
210 0x04, /* FAN 2 mode */
211 0x12, /* FAN AUX mode */
212};
213static const u8 W83627THF_PWM_ENABLE_SHIFT[] = { 2, 4, 1 };
214
c2db6ce1
JD		 215#define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */
216#define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */
217#define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */
1da177e4 218
c2db6ce1 219#define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */
1da177e4
LT		 220
221static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
222static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
223 W83627THF_REG_PWM3 };
224#define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
07584c76 225 regpwm_627hf[nr] : regpwm[nr])
1da177e4 226
1550cb6d
COM		 227#define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */
228
229#define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */
230#define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */
231#define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */
232
233static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1,
234 W83637HF_REG_PWM_FREQ2,
235 W83637HF_REG_PWM_FREQ3 };
236
237#define W83627HF_BASE_PWM_FREQ 46870
238
1da177e4
LT		 239#define W83781D_REG_I2C_ADDR 0x48
240#define W83781D_REG_I2C_SUBADDR 0x4A
241
242/* Sensor selection */
243#define W83781D_REG_SCFG1 0x5D
244static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
245#define W83781D_REG_SCFG2 0x59
246static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
247#define W83781D_DEFAULT_BETA 3435
248
249/* Conversions. Limit checking is only done on the TO_REG
250 variants. Note that you should be a bit careful with which arguments
251 these macros are called: arguments may be evaluated more than once.
252 Fixing this is just not worth it. */
253#define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
254#define IN_FROM_REG(val) ((val) * 16)
255
256static inline u8 FAN_TO_REG(long rpm, int div)
257{
258 if (rpm == 0)
259 return 255;
260 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
261 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
262 254);
263}
264
265#define TEMP_MIN (-128000)
266#define TEMP_MAX ( 127000)
267
268/* TEMP: 0.001C/bit (-128C to +127C)
269 REG: 1C/bit, two's complement */
5bfedac0 270static u8 TEMP_TO_REG(long temp)
1da177e4
LT		 271{
272 int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
273 ntemp += (ntemp<0 ? -500 : 500);
274 return (u8)(ntemp / 1000);
275}
276
277static int TEMP_FROM_REG(u8 reg)
278{
279 return (s8)reg * 1000;
280}
281
282#define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
283
284#define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
285
1550cb6d
COM		 286static inline unsigned long pwm_freq_from_reg_627hf(u8 reg)
287{
288 unsigned long freq;
289 freq = W83627HF_BASE_PWM_FREQ >> reg;
290 return freq;
291}
292static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
293{
294 u8 i;
295 /* Only 5 dividers (1 2 4 8 16)
296 Search for the nearest available frequency */
297 for (i = 0; i < 4; i++) {
298 if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
299 (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2))
300 break;
301 }
302 return i;
303}
304
305static inline unsigned long pwm_freq_from_reg(u8 reg)
306{
307 /* Clock bit 8 -> 180 kHz or 24 MHz */
308 unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;
309
310 reg &= 0x7f;
311 /* This should not happen but anyway... */
312 if (reg == 0)
313 reg++;
314 return (clock / (reg << 8));
315}
316static inline u8 pwm_freq_to_reg(unsigned long val)
317{
318 /* Minimum divider value is 0x01 and maximum is 0x7F */
319 if (val >= 93750) /* The highest we can do */
320 return 0x01;
321 if (val >= 720) /* Use 24 MHz clock */
322 return (24000000UL / (val << 8));
323 if (val < 6) /* The lowest we can do */
324 return 0xFF;
325 else /* Use 180 kHz clock */
326 return (0x80 | (180000UL / (val << 8)));
327}
328
1c138107
JD		 329#define BEEP_MASK_FROM_REG(val) ((val) & 0xff7fff)
330#define BEEP_MASK_TO_REG(val) ((val) & 0xff7fff)
1da177e4
LT		 331
332#define DIV_FROM_REG(val) (1 << (val))
333
334static inline u8 DIV_TO_REG(long val)
335{
336 int i;
337 val = SENSORS_LIMIT(val, 1, 128) >> 1;
abc01922 338 for (i = 0; i < 7; i++) {
1da177e4
LT		 339 if (val == 0)
340 break;
341 val >>= 1;
342 }
343 return ((u8) i);
344}
345
ed6bafbf
JD		 346/* For each registered chip, we need to keep some data in memory.
347 The structure is dynamically allocated. */
1da177e4 348struct w83627hf_data {
787c72b1
JD		 349 unsigned short addr;
350 const char *name;
1beeffe4 351 struct device *hwmon_dev;
9a61bf63 352 struct mutex lock;
1da177e4
LT		 353 enum chips type;
354
9a61bf63 355 struct mutex update_lock;
1da177e4
LT		 356 char valid; /* !=0 if following fields are valid */
357 unsigned long last_updated; /* In jiffies */
358
1da177e4
LT		 359 u8 in[9]; /* Register value */
360 u8 in_max[9]; /* Register value */
361 u8 in_min[9]; /* Register value */
362 u8 fan[3]; /* Register value */
363 u8 fan_min[3]; /* Register value */
df48ed80
JC		 364 u16 temp[3]; /* Register value */
365 u16 temp_max[3]; /* Register value */
366 u16 temp_max_hyst[3]; /* Register value */
1da177e4
LT		 367 u8 fan_div[3]; /* Register encoding, shifted right */
368 u8 vid; /* Register encoding, combined */
369 u32 alarms; /* Register encoding, combined */
370 u32 beep_mask; /* Register encoding, combined */
1da177e4 371 u8 pwm[3]; /* Register value */
a95a5ed8
DG		 372 u8 pwm_enable[3]; /* 1 = manual
373 2 = thermal cruise (also called SmartFan I)
374 3 = fan speed cruise */
1550cb6d 375 u8 pwm_freq[3]; /* Register value */
b26f9330
JD		 376 u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode;
377 4 = thermistor */
1da177e4 378 u8 vrm;
c2db6ce1 379 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
1da177e4
LT		 380};
381
787c72b1
JD		 382struct w83627hf_sio_data {
383 enum chips type;
384};
1da177e4 385
1da177e4 386
787c72b1 387static int w83627hf_probe(struct platform_device *pdev);
d0546128 388static int __devexit w83627hf_remove(struct platform_device *pdev);
787c72b1
JD		 389
390static int w83627hf_read_value(struct w83627hf_data *data, u16 reg);
391static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value);
c09c5184 392static void w83627hf_update_fan_div(struct w83627hf_data *data);
1da177e4 393static struct w83627hf_data *w83627hf_update_device(struct device *dev);
787c72b1 394static void w83627hf_init_device(struct platform_device *pdev);
1da177e4 395
787c72b1 396static struct platform_driver w83627hf_driver = {
cdaf7934 397 .driver = {
87218842 398 .owner = THIS_MODULE,
d27c37c0 399 .name = DRVNAME,
cdaf7934 400 },
787c72b1
JD		 401 .probe = w83627hf_probe,
402 .remove = __devexit_p(w83627hf_remove),
1da177e4
LT		 403};
404
07584c76
JC		 405static ssize_t
406show_in_input(struct device *dev, struct device_attribute *devattr, char *buf)
407{
408 int nr = to_sensor_dev_attr(devattr)->index;
409 struct w83627hf_data *data = w83627hf_update_device(dev);
410 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr]));
1da177e4 411}
07584c76
JC		 412static ssize_t
413show_in_min(struct device *dev, struct device_attribute *devattr, char *buf)
414{
415 int nr = to_sensor_dev_attr(devattr)->index;
416 struct w83627hf_data *data = w83627hf_update_device(dev);
417 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr]));
418}
419static ssize_t
420show_in_max(struct device *dev, struct device_attribute *devattr, char *buf)
421{
422 int nr = to_sensor_dev_attr(devattr)->index;
423 struct w83627hf_data *data = w83627hf_update_device(dev);
424 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr]));
1da177e4 425}
07584c76
JC		 426static ssize_t
427store_in_min(struct device *dev, struct device_attribute *devattr,
428 const char *buf, size_t count)
429{
430 int nr = to_sensor_dev_attr(devattr)->index;
431 struct w83627hf_data *data = dev_get_drvdata(dev);
432 long val = simple_strtol(buf, NULL, 10);
1da177e4 433
07584c76
JC		 434 mutex_lock(&data->update_lock);
435 data->in_min[nr] = IN_TO_REG(val);
436 w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]);
437 mutex_unlock(&data->update_lock);
438 return count;
439}
440static ssize_t
441store_in_max(struct device *dev, struct device_attribute *devattr,
442 const char *buf, size_t count)
443{
444 int nr = to_sensor_dev_attr(devattr)->index;
445 struct w83627hf_data *data = dev_get_drvdata(dev);
446 long val = simple_strtol(buf, NULL, 10);
1da177e4 447
07584c76
JC		 448 mutex_lock(&data->update_lock);
449 data->in_max[nr] = IN_TO_REG(val);
450 w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]);
451 mutex_unlock(&data->update_lock);
452 return count;
453}
454#define sysfs_vin_decl(offset) \
455static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
456 show_in_input, NULL, offset); \
457static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO|S_IWUSR, \
458 show_in_min, store_in_min, offset); \
459static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO|S_IWUSR, \
460 show_in_max, store_in_max, offset);
461
462sysfs_vin_decl(1);
463sysfs_vin_decl(2);
464sysfs_vin_decl(3);
465sysfs_vin_decl(4);
466sysfs_vin_decl(5);
467sysfs_vin_decl(6);
468sysfs_vin_decl(7);
469sysfs_vin_decl(8);
1da177e4
LT		 470
471/* use a different set of functions for in0 */
472static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
473{
474 long in0;
475
476 if ((data->vrm_ovt & 0x01) &&
c2db6ce1
JD		 477 (w83627thf == data->type || w83637hf == data->type
478 || w83687thf == data->type))
1da177e4
LT		 479
480 /* use VRM9 calculation */
481 in0 = (long)((reg * 488 + 70000 + 50) / 100);
482 else
483 /* use VRM8 (standard) calculation */
484 in0 = (long)IN_FROM_REG(reg);
485
486 return sprintf(buf,"%ld\n", in0);
487}
488
a5099cfc 489static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 490{
491 struct w83627hf_data *data = w83627hf_update_device(dev);
492 return show_in_0(data, buf, data->in[0]);
493}
494
a5099cfc 495static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 496{
497 struct w83627hf_data *data = w83627hf_update_device(dev);
498 return show_in_0(data, buf, data->in_min[0]);
499}
500
a5099cfc 501static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 502{
503 struct w83627hf_data *data = w83627hf_update_device(dev);
504 return show_in_0(data, buf, data->in_max[0]);
505}
506
a5099cfc 507static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
1da177e4
LT		 508 const char *buf, size_t count)
509{
787c72b1 510 struct w83627hf_data *data = dev_get_drvdata(dev);
1da177e4
LT		 511 u32 val;
512
513 val = simple_strtoul(buf, NULL, 10);
514
9a61bf63 515 mutex_lock(&data->update_lock);
1da177e4
LT		 516
517 if ((data->vrm_ovt & 0x01) &&
c2db6ce1
JD		 518 (w83627thf == data->type || w83637hf == data->type
519 || w83687thf == data->type))
1da177e4
LT		 520
521 /* use VRM9 calculation */
2723ab91
YM		 522 data->in_min[0] =
523 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
524 255);
1da177e4
LT		 525 else
526 /* use VRM8 (standard) calculation */
527 data->in_min[0] = IN_TO_REG(val);
528
787c72b1 529 w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]);
9a61bf63 530 mutex_unlock(&data->update_lock);
1da177e4
LT		 531 return count;
532}
533
a5099cfc 534static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
1da177e4
LT		 535 const char *buf, size_t count)
536{
787c72b1 537 struct w83627hf_data *data = dev_get_drvdata(dev);
1da177e4
LT		 538 u32 val;
539
540 val = simple_strtoul(buf, NULL, 10);
541
9a61bf63 542 mutex_lock(&data->update_lock);
1da177e4
LT		 543
544 if ((data->vrm_ovt & 0x01) &&
c2db6ce1
JD		 545 (w83627thf == data->type || w83637hf == data->type
546 || w83687thf == data->type))
1da177e4
LT		 547
548 /* use VRM9 calculation */
2723ab91
YM		 549 data->in_max[0] =
550 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
551 255);
1da177e4
LT		 552 else
553 /* use VRM8 (standard) calculation */
554 data->in_max[0] = IN_TO_REG(val);
555
787c72b1 556 w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]);
9a61bf63 557 mutex_unlock(&data->update_lock);
1da177e4
LT		 558 return count;
559}
560
561static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
562static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
563 show_regs_in_min0, store_regs_in_min0);
564static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
565 show_regs_in_max0, store_regs_in_max0);
566
07584c76
JC		 567static ssize_t
568show_fan_input(struct device *dev, struct device_attribute *devattr, char *buf)
569{
570 int nr = to_sensor_dev_attr(devattr)->index;
571 struct w83627hf_data *data = w83627hf_update_device(dev);
572 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr],
573 (long)DIV_FROM_REG(data->fan_div[nr])));
574}
575static ssize_t
576show_fan_min(struct device *dev, struct device_attribute *devattr, char *buf)
577{
578 int nr = to_sensor_dev_attr(devattr)->index;
579 struct w83627hf_data *data = w83627hf_update_device(dev);
580 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr],
581 (long)DIV_FROM_REG(data->fan_div[nr])));
1da177e4 582}
1da177e4 583static ssize_t
07584c76
JC		 584store_fan_min(struct device *dev, struct device_attribute *devattr,
585 const char *buf, size_t count)
1da177e4 586{
07584c76 587 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 588 struct w83627hf_data *data = dev_get_drvdata(dev);
07584c76 589 u32 val = simple_strtoul(buf, NULL, 10);
1da177e4 590
9a61bf63 591 mutex_lock(&data->update_lock);
07584c76 592 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
2ca2fcd1 593 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr),
07584c76 594 data->fan_min[nr]);
1da177e4 595
9a61bf63 596 mutex_unlock(&data->update_lock);
1da177e4
LT		 597 return count;
598}
07584c76
JC		 599#define sysfs_fan_decl(offset) \
600static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
601 show_fan_input, NULL, offset - 1); \
602static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
603 show_fan_min, store_fan_min, offset - 1);
1da177e4 604
07584c76
JC		 605sysfs_fan_decl(1);
606sysfs_fan_decl(2);
607sysfs_fan_decl(3);
1da177e4 608
07584c76
JC		 609static ssize_t
610show_temp(struct device *dev, struct device_attribute *devattr, char *buf)
611{
612 int nr = to_sensor_dev_attr(devattr)->index;
613 struct w83627hf_data *data = w83627hf_update_device(dev);
df48ed80
JC		 614
615 u16 tmp = data->temp[nr];
616 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
617 : (long) TEMP_FROM_REG(tmp));
1da177e4 618}
1da177e4 619
07584c76
JC		 620static ssize_t
621show_temp_max(struct device *dev, struct device_attribute *devattr,
622 char *buf)
623{
624 int nr = to_sensor_dev_attr(devattr)->index;
625 struct w83627hf_data *data = w83627hf_update_device(dev);
df48ed80
JC		 626
627 u16 tmp = data->temp_max[nr];
628 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
629 : (long) TEMP_FROM_REG(tmp));
1da177e4 630}
1da177e4 631
07584c76
JC		 632static ssize_t
633show_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
634 char *buf)
635{
636 int nr = to_sensor_dev_attr(devattr)->index;
637 struct w83627hf_data *data = w83627hf_update_device(dev);
df48ed80
JC		 638
639 u16 tmp = data->temp_max_hyst[nr];
640 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
641 : (long) TEMP_FROM_REG(tmp));
07584c76 642}
1da177e4 643
07584c76
JC		 644static ssize_t
645store_temp_max(struct device *dev, struct device_attribute *devattr,
646 const char *buf, size_t count)
647{
648 int nr = to_sensor_dev_attr(devattr)->index;
649 struct w83627hf_data *data = dev_get_drvdata(dev);
650 long val = simple_strtol(buf, NULL, 10);
df48ed80 651 u16 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
1da177e4 652
07584c76 653 mutex_lock(&data->update_lock);
df48ed80
JC		 654 data->temp_max[nr] = tmp;
655 w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp);
07584c76
JC		 656 mutex_unlock(&data->update_lock);
657 return count;
658}
659
660static ssize_t
661store_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
662 const char *buf, size_t count)
663{
664 int nr = to_sensor_dev_attr(devattr)->index;
665 struct w83627hf_data *data = dev_get_drvdata(dev);
666 long val = simple_strtol(buf, NULL, 10);
df48ed80 667 u16 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
07584c76
JC		 668
669 mutex_lock(&data->update_lock);
df48ed80
JC		 670 data->temp_max_hyst[nr] = tmp;
671 w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp);
07584c76
JC		 672 mutex_unlock(&data->update_lock);
673 return count;
674}
675
676#define sysfs_temp_decl(offset) \
677static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
df48ed80 678 show_temp, NULL, offset - 1); \
07584c76 679static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO|S_IWUSR, \
df48ed80 680 show_temp_max, store_temp_max, offset - 1); \
07584c76 681static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO|S_IWUSR, \
df48ed80 682 show_temp_max_hyst, store_temp_max_hyst, offset - 1);
07584c76
JC		 683
684sysfs_temp_decl(1);
685sysfs_temp_decl(2);
686sysfs_temp_decl(3);
1da177e4 687
1da177e4 688static ssize_t
a5099cfc 689show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 690{
691 struct w83627hf_data *data = w83627hf_update_device(dev);
692 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
693}
694static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1da177e4
LT		 695
696static ssize_t
a5099cfc 697show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4 698{
90d6619a 699 struct w83627hf_data *data = dev_get_drvdata(dev);
1da177e4
LT		 700 return sprintf(buf, "%ld\n", (long) data->vrm);
701}
702static ssize_t
a5099cfc 703store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1da177e4 704{
787c72b1 705 struct w83627hf_data *data = dev_get_drvdata(dev);
1da177e4
LT		 706 u32 val;
707
708 val = simple_strtoul(buf, NULL, 10);
709 data->vrm = val;
710
711 return count;
712}
713static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4
LT		 714
715static ssize_t
a5099cfc 716show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 717{
718 struct w83627hf_data *data = w83627hf_update_device(dev);
719 return sprintf(buf, "%ld\n", (long) data->alarms);
720}
721static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
1da177e4 722
e3604c62
JD		 723static ssize_t
724show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
725{
726 struct w83627hf_data *data = w83627hf_update_device(dev);
727 int bitnr = to_sensor_dev_attr(attr)->index;
728 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
729}
730static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
731static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
732static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
733static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
734static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
735static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
736static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
737static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
738static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
739static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
740static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
741static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
742static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
743static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
744static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
745
1c138107
JD		 746static ssize_t
747show_beep_mask(struct device *dev, struct device_attribute *attr, char *buf)
748{
749 struct w83627hf_data *data = w83627hf_update_device(dev);
750 return sprintf(buf, "%ld\n",
751 (long)BEEP_MASK_FROM_REG(data->beep_mask));
1da177e4 752}
1da177e4
LT		 753
754static ssize_t
1c138107
JD		 755store_beep_mask(struct device *dev, struct device_attribute *attr,
756 const char *buf, size_t count)
1da177e4 757{
787c72b1 758 struct w83627hf_data *data = dev_get_drvdata(dev);
1c138107 759 unsigned long val;
1da177e4
LT		 760
761 val = simple_strtoul(buf, NULL, 10);
762
9a61bf63 763 mutex_lock(&data->update_lock);
1da177e4 764
1c138107
JD		 765 /* preserve beep enable */
766 data->beep_mask = (data->beep_mask & 0x8000)
767 | BEEP_MASK_TO_REG(val);
768 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1,
769 data->beep_mask & 0xff);
770 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3,
771 ((data->beep_mask) >> 16) & 0xff);
787c72b1 772 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2,
1c138107 773 (data->beep_mask >> 8) & 0xff);
1da177e4 774
9a61bf63 775 mutex_unlock(&data->update_lock);
1da177e4
LT		 776 return count;
777}
778
1c138107
JD		 779static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
780 show_beep_mask, store_beep_mask);
1da177e4 781
e3604c62
JD		 782static ssize_t
783show_beep(struct device *dev, struct device_attribute *attr, char *buf)
784{
785 struct w83627hf_data *data = w83627hf_update_device(dev);
786 int bitnr = to_sensor_dev_attr(attr)->index;
787 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
788}
789
790static ssize_t
791store_beep(struct device *dev, struct device_attribute *attr,
792 const char *buf, size_t count)
793{
794 struct w83627hf_data *data = dev_get_drvdata(dev);
795 int bitnr = to_sensor_dev_attr(attr)->index;
796 unsigned long bit;
797 u8 reg;
798
799 bit = simple_strtoul(buf, NULL, 10);
800 if (bit & ~1)
801 return -EINVAL;
802
803 mutex_lock(&data->update_lock);
804 if (bit)
805 data->beep_mask |= (1 << bitnr);
806 else
807 data->beep_mask &= ~(1 << bitnr);
808
809 if (bitnr < 8) {
810 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS1);
811 if (bit)
812 reg |= (1 << bitnr);
813 else
814 reg &= ~(1 << bitnr);
815 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, reg);
816 } else if (bitnr < 16) {
817 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
818 if (bit)
819 reg |= (1 << (bitnr - 8));
820 else
821 reg &= ~(1 << (bitnr - 8));
822 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, reg);
823 } else {
824 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS3);
825 if (bit)
826 reg |= (1 << (bitnr - 16));
827 else
828 reg &= ~(1 << (bitnr - 16));
829 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, reg);
830 }
831 mutex_unlock(&data->update_lock);
832
833 return count;
834}
835
836static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
837 show_beep, store_beep, 0);
838static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
839 show_beep, store_beep, 1);
840static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
841 show_beep, store_beep, 2);
842static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
843 show_beep, store_beep, 3);
844static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
845 show_beep, store_beep, 8);
846static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
847 show_beep, store_beep, 9);
848static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
849 show_beep, store_beep, 10);
850static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
851 show_beep, store_beep, 16);
852static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
853 show_beep, store_beep, 17);
854static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
855 show_beep, store_beep, 6);
856static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
857 show_beep, store_beep, 7);
858static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
859 show_beep, store_beep, 11);
860static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
861 show_beep, store_beep, 4);
862static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
863 show_beep, store_beep, 5);
864static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO | S_IWUSR,
865 show_beep, store_beep, 13);
1c138107
JD		 866static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
867 show_beep, store_beep, 15);
e3604c62 868
1da177e4 869static ssize_t
07584c76 870show_fan_div(struct device *dev, struct device_attribute *devattr, char *buf)
1da177e4 871{
07584c76 872 int nr = to_sensor_dev_attr(devattr)->index;
1da177e4
LT		 873 struct w83627hf_data *data = w83627hf_update_device(dev);
874 return sprintf(buf, "%ld\n",
07584c76 875 (long) DIV_FROM_REG(data->fan_div[nr]));
1da177e4 876}
1da177e4
LT		 877/* Note: we save and restore the fan minimum here, because its value is
878 determined in part by the fan divisor. This follows the principle of
d6e05edc 879 least surprise; the user doesn't expect the fan minimum to change just
1da177e4
LT		 880 because the divisor changed. */
881static ssize_t
07584c76
JC		 882store_fan_div(struct device *dev, struct device_attribute *devattr,
883 const char *buf, size_t count)
1da177e4 884{
07584c76 885 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 886 struct w83627hf_data *data = dev_get_drvdata(dev);
1da177e4
LT		 887 unsigned long min;
888 u8 reg;
889 unsigned long val = simple_strtoul(buf, NULL, 10);
890
9a61bf63 891 mutex_lock(&data->update_lock);
1da177e4
LT		 892
893 /* Save fan_min */
894 min = FAN_FROM_REG(data->fan_min[nr],
895 DIV_FROM_REG(data->fan_div[nr]));
896
897 data->fan_div[nr] = DIV_TO_REG(val);
898
787c72b1 899 reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
1da177e4
LT		 900 & (nr==0 ? 0xcf : 0x3f))
901 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
787c72b1 902 w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
1da177e4 903
787c72b1 904 reg = (w83627hf_read_value(data, W83781D_REG_VBAT)
1da177e4
LT		 905 & ~(1 << (5 + nr)))
906 | ((data->fan_div[nr] & 0x04) << (3 + nr));
787c72b1 907 w83627hf_write_value(data, W83781D_REG_VBAT, reg);
1da177e4
LT		 908
909 /* Restore fan_min */
910 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
2ca2fcd1 911 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]);
1da177e4 912
9a61bf63 913 mutex_unlock(&data->update_lock);
1da177e4
LT		 914 return count;
915}
916
07584c76
JC		 917static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO|S_IWUSR,
918 show_fan_div, store_fan_div, 0);
919static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO|S_IWUSR,
920 show_fan_div, store_fan_div, 1);
921static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO|S_IWUSR,
922 show_fan_div, store_fan_div, 2);
1da177e4 923
1da177e4 924static ssize_t
07584c76 925show_pwm(struct device *dev, struct device_attribute *devattr, char *buf)
1da177e4 926{
07584c76 927 int nr = to_sensor_dev_attr(devattr)->index;
1da177e4 928 struct w83627hf_data *data = w83627hf_update_device(dev);
07584c76 929 return sprintf(buf, "%ld\n", (long) data->pwm[nr]);
1da177e4
LT		 930}
931
932static ssize_t
07584c76
JC		 933store_pwm(struct device *dev, struct device_attribute *devattr,
934 const char *buf, size_t count)
1da177e4 935{
07584c76 936 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 937 struct w83627hf_data *data = dev_get_drvdata(dev);
07584c76 938 u32 val = simple_strtoul(buf, NULL, 10);
1da177e4 939
9a61bf63 940 mutex_lock(&data->update_lock);
1da177e4
LT		 941
942 if (data->type == w83627thf) {
943 /* bits 0-3 are reserved in 627THF */
07584c76 944 data->pwm[nr] = PWM_TO_REG(val) & 0xf0;
787c72b1 945 w83627hf_write_value(data,
1da177e4 946 W836X7HF_REG_PWM(data->type, nr),
07584c76 947 data->pwm[nr] |
787c72b1 948 (w83627hf_read_value(data,
1da177e4
LT		 949 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
950 } else {
07584c76 951 data->pwm[nr] = PWM_TO_REG(val);
787c72b1 952 w83627hf_write_value(data,
1da177e4 953 W836X7HF_REG_PWM(data->type, nr),
07584c76 954 data->pwm[nr]);
1da177e4
LT		 955 }
956
9a61bf63 957 mutex_unlock(&data->update_lock);
1da177e4
LT		 958 return count;
959}
960
07584c76
JC		 961static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0);
962static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1);
963static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2);
1da177e4 964
a95a5ed8
DG		 965static ssize_t
966show_pwm_enable(struct device *dev, struct device_attribute *devattr, char *buf)
967{
968 int nr = to_sensor_dev_attr(devattr)->index;
969 struct w83627hf_data *data = w83627hf_update_device(dev);
970 return sprintf(buf, "%d\n", data->pwm_enable[nr]);
971}
972
973static ssize_t
974store_pwm_enable(struct device *dev, struct device_attribute *devattr,
975 const char *buf, size_t count)
976{
977 int nr = to_sensor_dev_attr(devattr)->index;
978 struct w83627hf_data *data = dev_get_drvdata(dev);
979 unsigned long val = simple_strtoul(buf, NULL, 10);
980 u8 reg;
981
982 if (!val || (val > 3)) /* modes 1, 2 and 3 are supported */
983 return -EINVAL;
984 mutex_lock(&data->update_lock);
985 data->pwm_enable[nr] = val;
986 reg = w83627hf_read_value(data, W83627THF_REG_PWM_ENABLE[nr]);
987 reg &= ~(0x03 << W83627THF_PWM_ENABLE_SHIFT[nr]);
988 reg |= (val - 1) << W83627THF_PWM_ENABLE_SHIFT[nr];
989 w83627hf_write_value(data, W83627THF_REG_PWM_ENABLE[nr], reg);
990 mutex_unlock(&data->update_lock);
991 return count;
992}
993
994static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
995 store_pwm_enable, 0);
996static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
997 store_pwm_enable, 1);
998static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
999 store_pwm_enable, 2);
1000
1550cb6d 1001static ssize_t
07584c76 1002show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf)
1550cb6d 1003{
07584c76 1004 int nr = to_sensor_dev_attr(devattr)->index;
1550cb6d
COM		 1005 struct w83627hf_data *data = w83627hf_update_device(dev);
1006 if (data->type == w83627hf)
1007 return sprintf(buf, "%ld\n",
07584c76 1008 pwm_freq_from_reg_627hf(data->pwm_freq[nr]));
1550cb6d
COM		 1009 else
1010 return sprintf(buf, "%ld\n",
07584c76 1011 pwm_freq_from_reg(data->pwm_freq[nr]));
1550cb6d
COM		 1012}
1013
1014static ssize_t
07584c76
JC		 1015store_pwm_freq(struct device *dev, struct device_attribute *devattr,
1016 const char *buf, size_t count)
1550cb6d 1017{
07584c76 1018 int nr = to_sensor_dev_attr(devattr)->index;
1550cb6d
COM		 1019 struct w83627hf_data *data = dev_get_drvdata(dev);
1020 static const u8 mask[]={0xF8, 0x8F};
1021 u32 val;
1022
1023 val = simple_strtoul(buf, NULL, 10);
1024
1025 mutex_lock(&data->update_lock);
1026
1027 if (data->type == w83627hf) {
07584c76 1028 data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val);
1550cb6d 1029 w83627hf_write_value(data, W83627HF_REG_PWM_FREQ,
07584c76 1030 (data->pwm_freq[nr] << (nr*4)) |
1550cb6d 1031 (w83627hf_read_value(data,
07584c76 1032 W83627HF_REG_PWM_FREQ) & mask[nr]));
1550cb6d 1033 } else {
07584c76
JC		 1034 data->pwm_freq[nr] = pwm_freq_to_reg(val);
1035 w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr],
1036 data->pwm_freq[nr]);
1550cb6d
COM		 1037 }
1038
1039 mutex_unlock(&data->update_lock);
1040 return count;
1041}
1042
07584c76
JC		 1043static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO|S_IWUSR,
1044 show_pwm_freq, store_pwm_freq, 0);
1045static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO|S_IWUSR,
1046 show_pwm_freq, store_pwm_freq, 1);
1047static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO|S_IWUSR,
1048 show_pwm_freq, store_pwm_freq, 2);
1550cb6d 1049
1da177e4 1050static ssize_t
07584c76
JC		 1051show_temp_type(struct device *dev, struct device_attribute *devattr,
1052 char *buf)
1da177e4 1053{
07584c76 1054 int nr = to_sensor_dev_attr(devattr)->index;
1da177e4 1055 struct w83627hf_data *data = w83627hf_update_device(dev);
07584c76 1056 return sprintf(buf, "%ld\n", (long) data->sens[nr]);
1da177e4
LT		 1057}
1058
1059static ssize_t
07584c76
JC		 1060store_temp_type(struct device *dev, struct device_attribute *devattr,
1061 const char *buf, size_t count)
1da177e4 1062{
07584c76 1063 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 1064 struct w83627hf_data *data = dev_get_drvdata(dev);
1da177e4
LT		 1065 u32 val, tmp;
1066
1067 val = simple_strtoul(buf, NULL, 10);
1068
9a61bf63 1069 mutex_lock(&data->update_lock);
1da177e4
LT		 1070
1071 switch (val) {
1072 case 1: /* PII/Celeron diode */
787c72b1
JD		 1073 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1074 w83627hf_write_value(data, W83781D_REG_SCFG1,
07584c76 1075 tmp | BIT_SCFG1[nr]);
787c72b1
JD		 1076 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1077 w83627hf_write_value(data, W83781D_REG_SCFG2,
07584c76
JC		 1078 tmp | BIT_SCFG2[nr]);
1079 data->sens[nr] = val;
1da177e4
LT		 1080 break;
1081 case 2: /* 3904 */
787c72b1
JD		 1082 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1083 w83627hf_write_value(data, W83781D_REG_SCFG1,
07584c76 1084 tmp | BIT_SCFG1[nr]);
787c72b1
JD		 1085 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1086 w83627hf_write_value(data, W83781D_REG_SCFG2,
07584c76
JC		 1087 tmp & ~BIT_SCFG2[nr]);
1088 data->sens[nr] = val;
1da177e4 1089 break;
b26f9330
JD		 1090 case W83781D_DEFAULT_BETA:
1091 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
1092 "instead\n", W83781D_DEFAULT_BETA);
1093 /* fall through */
1094 case 4: /* thermistor */
787c72b1
JD		 1095 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1096 w83627hf_write_value(data, W83781D_REG_SCFG1,
07584c76
JC		 1097 tmp & ~BIT_SCFG1[nr]);
1098 data->sens[nr] = val;
1da177e4
LT		 1099 break;
1100 default:
787c72b1 1101 dev_err(dev,
b26f9330
JD		 1102 "Invalid sensor type %ld; must be 1, 2, or 4\n",
1103 (long) val);
1da177e4
LT		 1104 break;
1105 }
1106
9a61bf63 1107 mutex_unlock(&data->update_lock);
1da177e4
LT		 1108 return count;
1109}
1110
07584c76
JC		 1111#define sysfs_temp_type(offset) \
1112static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
1113 show_temp_type, store_temp_type, offset - 1);
1da177e4 1114
07584c76
JC		 1115sysfs_temp_type(1);
1116sysfs_temp_type(2);
1117sysfs_temp_type(3);
1da177e4 1118
07584c76
JC		 1119static ssize_t
1120show_name(struct device *dev, struct device_attribute *devattr, char *buf)
787c72b1
JD		 1121{
1122 struct w83627hf_data *data = dev_get_drvdata(dev);
1123
1124 return sprintf(buf, "%s\n", data->name);
1125}
1126static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1127
1128static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1129 struct w83627hf_sio_data *sio_data)
1da177e4 1130{
d27c37c0 1131 int err = -ENODEV;
1da177e4
LT		 1132 u16 val;
1133
787c72b1
JD		 1134 static const __initdata char *names[] = {
1135 "W83627HF",
1136 "W83627THF",
1137 "W83697HF",
1138 "W83637HF",
1139 "W83687THF",
1140 };
1141
1da177e4
LT		 1142 REG = sioaddr;
1143 VAL = sioaddr + 1;
1144
1145 superio_enter();
67b671bc 1146 val = force_id ? force_id : superio_inb(DEVID);
787c72b1
JD		 1147 switch (val) {
1148 case W627_DEVID:
1149 sio_data->type = w83627hf;
1150 break;
1151 case W627THF_DEVID:
1152 sio_data->type = w83627thf;
1153 break;
1154 case W697_DEVID:
1155 sio_data->type = w83697hf;
1156 break;
1157 case W637_DEVID:
1158 sio_data->type = w83637hf;
1159 break;
1160 case W687THF_DEVID:
1161 sio_data->type = w83687thf;
1162 break;
e142e2a3
JD		 1163 case 0xff: /* No device at all */
1164 goto exit;
787c72b1 1165 default:
e142e2a3 1166 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val);
d27c37c0 1167 goto exit;
1da177e4
LT		 1168 }
1169
1170 superio_select(W83627HF_LD_HWM);
d27c37c0
JD		 1171 force_addr &= WINB_ALIGNMENT;
1172 if (force_addr) {
1173 printk(KERN_WARNING DRVNAME ": Forcing address 0x%x\n",
1174 force_addr);
1175 superio_outb(WINB_BASE_REG, force_addr >> 8);
1176 superio_outb(WINB_BASE_REG + 1, force_addr & 0xff);
1177 }
1da177e4
LT		 1178 val = (superio_inb(WINB_BASE_REG) << 8) |
1179 superio_inb(WINB_BASE_REG + 1);
ada0c2f8 1180 *addr = val & WINB_ALIGNMENT;
d27c37c0
JD		 1181 if (*addr == 0) {
1182 printk(KERN_WARNING DRVNAME ": Base address not set, "
1183 "skipping\n");
1184 goto exit;
1da177e4 1185 }
1da177e4 1186
d27c37c0
JD		 1187 val = superio_inb(WINB_ACT_REG);
1188 if (!(val & 0x01)) {
1189 printk(KERN_WARNING DRVNAME ": Enabling HWM logical device\n");
1190 superio_outb(WINB_ACT_REG, val | 0x01);
1191 }
1192
1193 err = 0;
787c72b1
JD		 1194 pr_info(DRVNAME ": Found %s chip at %#x\n",
1195 names[sio_data->type], *addr);
d27c37c0
JD		 1196
1197 exit:
1da177e4 1198 superio_exit();
d27c37c0 1199 return err;
1da177e4
LT		 1200}
1201
07584c76
JC		 1202#define VIN_UNIT_ATTRS(_X_) \
1203 &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \
1204 &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \
e3604c62
JD		 1205 &sensor_dev_attr_in##_X_##_max.dev_attr.attr, \
1206 &sensor_dev_attr_in##_X_##_alarm.dev_attr.attr, \
1207 &sensor_dev_attr_in##_X_##_beep.dev_attr.attr
07584c76
JC		 1208
1209#define FAN_UNIT_ATTRS(_X_) \
1210 &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \
1211 &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \
e3604c62
JD		 1212 &sensor_dev_attr_fan##_X_##_div.dev_attr.attr, \
1213 &sensor_dev_attr_fan##_X_##_alarm.dev_attr.attr, \
1214 &sensor_dev_attr_fan##_X_##_beep.dev_attr.attr
07584c76
JC		 1215
1216#define TEMP_UNIT_ATTRS(_X_) \
1217 &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \
1218 &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \
1219 &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \
e3604c62
JD		 1220 &sensor_dev_attr_temp##_X_##_type.dev_attr.attr, \
1221 &sensor_dev_attr_temp##_X_##_alarm.dev_attr.attr, \
1222 &sensor_dev_attr_temp##_X_##_beep.dev_attr.attr
07584c76 1223
c1685f61
MH		 1224static struct attribute *w83627hf_attributes[] = {
1225 &dev_attr_in0_input.attr,
1226 &dev_attr_in0_min.attr,
1227 &dev_attr_in0_max.attr,
e3604c62
JD		 1228 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1229 &sensor_dev_attr_in0_beep.dev_attr.attr,
07584c76
JC		 1230 VIN_UNIT_ATTRS(2),
1231 VIN_UNIT_ATTRS(3),
1232 VIN_UNIT_ATTRS(4),
1233 VIN_UNIT_ATTRS(7),
1234 VIN_UNIT_ATTRS(8),
1235
1236 FAN_UNIT_ATTRS(1),
1237 FAN_UNIT_ATTRS(2),
1238
1239 TEMP_UNIT_ATTRS(1),
1240 TEMP_UNIT_ATTRS(2),
c1685f61
MH		 1241
1242 &dev_attr_alarms.attr,
1c138107 1243 &sensor_dev_attr_beep_enable.dev_attr.attr,
c1685f61
MH		 1244 &dev_attr_beep_mask.attr,
1245
07584c76
JC		 1246 &sensor_dev_attr_pwm1.dev_attr.attr,
1247 &sensor_dev_attr_pwm2.dev_attr.attr,
787c72b1 1248 &dev_attr_name.attr,
c1685f61
MH		 1249 NULL
1250};
1251
1252static const struct attribute_group w83627hf_group = {
1253 .attrs = w83627hf_attributes,
1254};
1255
1256static struct attribute *w83627hf_attributes_opt[] = {
07584c76
JC		 1257 VIN_UNIT_ATTRS(1),
1258 VIN_UNIT_ATTRS(5),
1259 VIN_UNIT_ATTRS(6),
1260
1261 FAN_UNIT_ATTRS(3),
1262 TEMP_UNIT_ATTRS(3),
1263 &sensor_dev_attr_pwm3.dev_attr.attr,
1264
1265 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1266 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1267 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
a95a5ed8
DG		 1268
1269 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1270 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1271 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1272
c1685f61
MH		 1273 NULL
1274};
1275
1276static const struct attribute_group w83627hf_group_opt = {
1277 .attrs = w83627hf_attributes_opt,
1278};
1279
787c72b1 1280static int __devinit w83627hf_probe(struct platform_device *pdev)
1da177e4 1281{
787c72b1
JD		 1282 struct device *dev = &pdev->dev;
1283 struct w83627hf_sio_data *sio_data = dev->platform_data;
1da177e4 1284 struct w83627hf_data *data;
787c72b1 1285 struct resource *res;
2ca2fcd1 1286 int err, i;
1da177e4 1287
787c72b1
JD		 1288 static const char *names[] = {
1289 "w83627hf",
1290 "w83627thf",
1291 "w83697hf",
1292 "w83637hf",
1293 "w83687thf",
1294 };
1295
1296 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1297 if (!request_region(res->start, WINB_REGION_SIZE, DRVNAME)) {
1298 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1299 (unsigned long)res->start,
1300 (unsigned long)(res->start + WINB_REGION_SIZE - 1));
1da177e4
LT		 1301 err = -EBUSY;
1302 goto ERROR0;
1303 }
1304
ba9c2e8d 1305 if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1da177e4
LT		 1306 err = -ENOMEM;
1307 goto ERROR1;
1308 }
787c72b1
JD		 1309 data->addr = res->start;
1310 data->type = sio_data->type;
1311 data->name = names[sio_data->type];
9a61bf63 1312 mutex_init(&data->lock);
9a61bf63 1313 mutex_init(&data->update_lock);
787c72b1 1314 platform_set_drvdata(pdev, data);
1da177e4 1315
1da177e4 1316 /* Initialize the chip */
787c72b1 1317 w83627hf_init_device(pdev);
1da177e4
LT		 1318
1319 /* A few vars need to be filled upon startup */
2ca2fcd1
JC		 1320 for (i = 0; i <= 2; i++)
1321 data->fan_min[i] = w83627hf_read_value(
1322 data, W83627HF_REG_FAN_MIN(i));
c09c5184 1323 w83627hf_update_fan_div(data);
1da177e4 1324
c1685f61 1325 /* Register common device attributes */
787c72b1 1326 if ((err = sysfs_create_group(&dev->kobj, &w83627hf_group)))
943b0830 1327 goto ERROR3;
1da177e4 1328
c1685f61 1329 /* Register chip-specific device attributes */
787c72b1 1330 if (data->type == w83627hf || data->type == w83697hf)
07584c76
JC		 1331 if ((err = device_create_file(dev,
1332 &sensor_dev_attr_in5_input.dev_attr))
1333 || (err = device_create_file(dev,
1334 &sensor_dev_attr_in5_min.dev_attr))
1335 || (err = device_create_file(dev,
1336 &sensor_dev_attr_in5_max.dev_attr))
e3604c62
JD		 1337 || (err = device_create_file(dev,
1338 &sensor_dev_attr_in5_alarm.dev_attr))
1339 || (err = device_create_file(dev,
1340 &sensor_dev_attr_in5_beep.dev_attr))
07584c76
JC		 1341 || (err = device_create_file(dev,
1342 &sensor_dev_attr_in6_input.dev_attr))
1343 || (err = device_create_file(dev,
1344 &sensor_dev_attr_in6_min.dev_attr))
1345 || (err = device_create_file(dev,
1346 &sensor_dev_attr_in6_max.dev_attr))
e3604c62
JD		 1347 || (err = device_create_file(dev,
1348 &sensor_dev_attr_in6_alarm.dev_attr))
1349 || (err = device_create_file(dev,
1350 &sensor_dev_attr_in6_beep.dev_attr))
07584c76
JC		 1351 || (err = device_create_file(dev,
1352 &sensor_dev_attr_pwm1_freq.dev_attr))
1353 || (err = device_create_file(dev,
1354 &sensor_dev_attr_pwm2_freq.dev_attr)))
c1685f61 1355 goto ERROR4;
1da177e4 1356
787c72b1 1357 if (data->type != w83697hf)
07584c76
JC		 1358 if ((err = device_create_file(dev,
1359 &sensor_dev_attr_in1_input.dev_attr))
1360 || (err = device_create_file(dev,
1361 &sensor_dev_attr_in1_min.dev_attr))
1362 || (err = device_create_file(dev,
1363 &sensor_dev_attr_in1_max.dev_attr))
e3604c62
JD		 1364 || (err = device_create_file(dev,
1365 &sensor_dev_attr_in1_alarm.dev_attr))
1366 || (err = device_create_file(dev,
1367 &sensor_dev_attr_in1_beep.dev_attr))
07584c76
JC		 1368 || (err = device_create_file(dev,
1369 &sensor_dev_attr_fan3_input.dev_attr))
1370 || (err = device_create_file(dev,
1371 &sensor_dev_attr_fan3_min.dev_attr))
1372 || (err = device_create_file(dev,
1373 &sensor_dev_attr_fan3_div.dev_attr))
e3604c62
JD		 1374 || (err = device_create_file(dev,
1375 &sensor_dev_attr_fan3_alarm.dev_attr))
1376 || (err = device_create_file(dev,
1377 &sensor_dev_attr_fan3_beep.dev_attr))
07584c76
JC		 1378 || (err = device_create_file(dev,
1379 &sensor_dev_attr_temp3_input.dev_attr))
1380 || (err = device_create_file(dev,
1381 &sensor_dev_attr_temp3_max.dev_attr))
1382 || (err = device_create_file(dev,
1383 &sensor_dev_attr_temp3_max_hyst.dev_attr))
e3604c62
JD		 1384 || (err = device_create_file(dev,
1385 &sensor_dev_attr_temp3_alarm.dev_attr))
1386 || (err = device_create_file(dev,
1387 &sensor_dev_attr_temp3_beep.dev_attr))
07584c76
JC		 1388 || (err = device_create_file(dev,
1389 &sensor_dev_attr_temp3_type.dev_attr)))
c1685f61
MH		 1390 goto ERROR4;
1391
787c72b1 1392 if (data->type != w83697hf && data->vid != 0xff) {
8a665a05
JD		 1393 /* Convert VID to voltage based on VRM */
1394 data->vrm = vid_which_vrm();
1395
787c72b1
JD		 1396 if ((err = device_create_file(dev, &dev_attr_cpu0_vid))
1397 || (err = device_create_file(dev, &dev_attr_vrm)))
c1685f61 1398 goto ERROR4;
8a665a05 1399 }
1da177e4 1400
787c72b1
JD		 1401 if (data->type == w83627thf || data->type == w83637hf
1402 || data->type == w83687thf)
07584c76
JC		 1403 if ((err = device_create_file(dev,
1404 &sensor_dev_attr_pwm3.dev_attr)))
c1685f61 1405 goto ERROR4;
1da177e4 1406
1550cb6d 1407 if (data->type == w83637hf || data->type == w83687thf)
07584c76
JC		 1408 if ((err = device_create_file(dev,
1409 &sensor_dev_attr_pwm1_freq.dev_attr))
1410 || (err = device_create_file(dev,
1411 &sensor_dev_attr_pwm2_freq.dev_attr))
1412 || (err = device_create_file(dev,
1413 &sensor_dev_attr_pwm3_freq.dev_attr)))
1550cb6d
COM		 1414 goto ERROR4;
1415
a95a5ed8
DG		 1416 if (data->type != w83627hf)
1417 if ((err = device_create_file(dev,
1418 &sensor_dev_attr_pwm1_enable.dev_attr))
1419 || (err = device_create_file(dev,
1420 &sensor_dev_attr_pwm2_enable.dev_attr)))
1421 goto ERROR4;
1422
1423 if (data->type == w83627thf || data->type == w83637hf
1424 || data->type == w83687thf)
1425 if ((err = device_create_file(dev,
1426 &sensor_dev_attr_pwm3_enable.dev_attr)))
1427 goto ERROR4;
1428
1beeffe4
TJ		 1429 data->hwmon_dev = hwmon_device_register(dev);
1430 if (IS_ERR(data->hwmon_dev)) {
1431 err = PTR_ERR(data->hwmon_dev);
c1685f61
MH		 1432 goto ERROR4;
1433 }
1da177e4
LT		 1434
1435 return 0;
1436
c1685f61 1437 ERROR4:
787c72b1
JD		 1438 sysfs_remove_group(&dev->kobj, &w83627hf_group);
1439 sysfs_remove_group(&dev->kobj, &w83627hf_group_opt);
943b0830 1440 ERROR3:
04a6217d 1441 platform_set_drvdata(pdev, NULL);
1da177e4
LT		 1442 kfree(data);
1443 ERROR1:
787c72b1 1444 release_region(res->start, WINB_REGION_SIZE);
1da177e4
LT		 1445 ERROR0:
1446 return err;
1447}
1448
787c72b1 1449static int __devexit w83627hf_remove(struct platform_device *pdev)
1da177e4 1450{
787c72b1
JD		 1451 struct w83627hf_data *data = platform_get_drvdata(pdev);
1452 struct resource *res;
1da177e4 1453
1beeffe4 1454 hwmon_device_unregister(data->hwmon_dev);
943b0830 1455
787c72b1
JD		 1456 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group);
1457 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt);
04a6217d 1458 platform_set_drvdata(pdev, NULL);
943b0830 1459 kfree(data);
1da177e4 1460
787c72b1
JD		 1461 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1462 release_region(res->start, WINB_REGION_SIZE);
1463
1da177e4
LT		 1464 return 0;
1465}
1466
1467
d58df9cd
JD		 1468/* Registers 0x50-0x5f are banked */
1469static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg)
1470{
1471 if ((reg & 0x00f0) == 0x50) {
1472 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1473 outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET);
1474 }
1475}
1476
1477/* Not strictly necessary, but play it safe for now */
1478static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg)
1479{
1480 if (reg & 0xff00) {
1481 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1482 outb_p(0, data->addr + W83781D_DATA_REG_OFFSET);
1483 }
1484}
1485
787c72b1 1486static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
1da177e4 1487{
1da177e4
LT		 1488 int res, word_sized;
1489
9a61bf63 1490 mutex_lock(&data->lock);
1da177e4
LT		 1491 word_sized = (((reg & 0xff00) == 0x100)
1492 || ((reg & 0xff00) == 0x200))
1493 && (((reg & 0x00ff) == 0x50)
1494 || ((reg & 0x00ff) == 0x53)
1495 || ((reg & 0x00ff) == 0x55));
d58df9cd 1496 w83627hf_set_bank(data, reg);
787c72b1
JD		 1497 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1498 res = inb_p(data->addr + W83781D_DATA_REG_OFFSET);
1da177e4
LT		 1499 if (word_sized) {
1500 outb_p((reg & 0xff) + 1,
787c72b1 1501 data->addr + W83781D_ADDR_REG_OFFSET);
1da177e4 1502 res =
787c72b1 1503 (res << 8) + inb_p(data->addr +
1da177e4
LT		 1504 W83781D_DATA_REG_OFFSET);
1505 }
d58df9cd 1506 w83627hf_reset_bank(data, reg);
9a61bf63 1507 mutex_unlock(&data->lock);
1da177e4
LT		 1508 return res;
1509}
1510
787c72b1 1511static int __devinit w83627thf_read_gpio5(struct platform_device *pdev)
1da177e4
LT		 1512{
1513 int res = 0xff, sel;
1514
1515 superio_enter();
1516 superio_select(W83627HF_LD_GPIO5);
1517
1518 /* Make sure these GPIO pins are enabled */
1519 if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
787c72b1 1520 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
1da177e4
LT		 1521 goto exit;
1522 }
1523
1524 /* Make sure the pins are configured for input
1525 There must be at least five (VRM 9), and possibly 6 (VRM 10) */
dd149c52 1526 sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f;
1da177e4 1527 if ((sel & 0x1f) != 0x1f) {
787c72b1 1528 dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
1da177e4
LT		 1529 "function\n");
1530 goto exit;
1531 }
1532
787c72b1 1533 dev_info(&pdev->dev, "Reading VID from GPIO5\n");
1da177e4
LT		 1534 res = superio_inb(W83627THF_GPIO5_DR) & sel;
1535
1536exit:
1537 superio_exit();
1538 return res;
1539}
1540
787c72b1 1541static int __devinit w83687thf_read_vid(struct platform_device *pdev)
c2db6ce1
JD		 1542{
1543 int res = 0xff;
1544
1545 superio_enter();
1546 superio_select(W83627HF_LD_HWM);
1547
1548 /* Make sure these GPIO pins are enabled */
1549 if (!(superio_inb(W83687THF_VID_EN) & (1 << 2))) {
787c72b1 1550 dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
c2db6ce1
JD		 1551 goto exit;
1552 }
1553
1554 /* Make sure the pins are configured for input */
1555 if (!(superio_inb(W83687THF_VID_CFG) & (1 << 4))) {
787c72b1 1556 dev_dbg(&pdev->dev, "VID configured as output, "
c2db6ce1
JD		 1557 "no VID function\n");
1558 goto exit;
1559 }
1560
1561 res = superio_inb(W83687THF_VID_DATA) & 0x3f;
1562
1563exit:
1564 superio_exit();
1565 return res;
1566}
1567
787c72b1 1568static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value)
1da177e4 1569{
1da177e4
LT		 1570 int word_sized;
1571
9a61bf63 1572 mutex_lock(&data->lock);
1da177e4
LT		 1573 word_sized = (((reg & 0xff00) == 0x100)
1574 || ((reg & 0xff00) == 0x200))
1575 && (((reg & 0x00ff) == 0x53)
1576 || ((reg & 0x00ff) == 0x55));
d58df9cd 1577 w83627hf_set_bank(data, reg);
787c72b1 1578 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1da177e4
LT		 1579 if (word_sized) {
1580 outb_p(value >> 8,
787c72b1 1581 data->addr + W83781D_DATA_REG_OFFSET);
1da177e4 1582 outb_p((reg & 0xff) + 1,
787c72b1 1583 data->addr + W83781D_ADDR_REG_OFFSET);
1da177e4
LT		 1584 }
1585 outb_p(value & 0xff,
787c72b1 1586 data->addr + W83781D_DATA_REG_OFFSET);
d58df9cd 1587 w83627hf_reset_bank(data, reg);
9a61bf63 1588 mutex_unlock(&data->lock);
1da177e4
LT		 1589 return 0;
1590}
1591
787c72b1 1592static void __devinit w83627hf_init_device(struct platform_device *pdev)
1da177e4 1593{
787c72b1 1594 struct w83627hf_data *data = platform_get_drvdata(pdev);
1da177e4 1595 int i;
d27c37c0 1596 enum chips type = data->type;
1da177e4
LT		 1597 u8 tmp;
1598
1da177e4
LT		 1599 /* Minimize conflicts with other winbond i2c-only clients... */
1600 /* disable i2c subclients... how to disable main i2c client?? */
1601 /* force i2c address to relatively uncommon address */
787c72b1
JD		 1602 w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
1603 w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
1da177e4
LT		 1604
1605 /* Read VID only once */
d27c37c0 1606 if (type == w83627hf || type == w83637hf) {
787c72b1
JD		 1607 int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1608 int hi = w83627hf_read_value(data, W83781D_REG_CHIPID);
1da177e4 1609 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
d27c37c0 1610 } else if (type == w83627thf) {
787c72b1 1611 data->vid = w83627thf_read_gpio5(pdev);
d27c37c0 1612 } else if (type == w83687thf) {
787c72b1 1613 data->vid = w83687thf_read_vid(pdev);
1da177e4
LT		 1614 }
1615
1616 /* Read VRM & OVT Config only once */
d27c37c0 1617 if (type == w83627thf || type == w83637hf || type == w83687thf) {
1da177e4 1618 data->vrm_ovt =
787c72b1 1619 w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG);
1da177e4
LT		 1620 }
1621
787c72b1 1622 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1da177e4
LT		 1623 for (i = 1; i <= 3; i++) {
1624 if (!(tmp & BIT_SCFG1[i - 1])) {
b26f9330 1625 data->sens[i - 1] = 4;
1da177e4
LT		 1626 } else {
1627 if (w83627hf_read_value
787c72b1 1628 (data,
1da177e4
LT		 1629 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1630 data->sens[i - 1] = 1;
1631 else
1632 data->sens[i - 1] = 2;
1633 }
1634 if ((type == w83697hf) && (i == 2))
1635 break;
1636 }
1637
1638 if(init) {
1639 /* Enable temp2 */
df48ed80 1640 tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG);
1da177e4 1641 if (tmp & 0x01) {
787c72b1 1642 dev_warn(&pdev->dev, "Enabling temp2, readings "
1da177e4 1643 "might not make sense\n");
df48ed80 1644 w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG,
1da177e4
LT		 1645 tmp & 0xfe);
1646 }
1647
1648 /* Enable temp3 */
1649 if (type != w83697hf) {
787c72b1 1650 tmp = w83627hf_read_value(data,
df48ed80 1651 W83627HF_REG_TEMP3_CONFIG);
1da177e4 1652 if (tmp & 0x01) {
787c72b1 1653 dev_warn(&pdev->dev, "Enabling temp3, "
1da177e4 1654 "readings might not make sense\n");
787c72b1 1655 w83627hf_write_value(data,
df48ed80 1656 W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe);
1da177e4
LT		 1657 }
1658 }
1da177e4
LT		 1659 }
1660
1661 /* Start monitoring */
787c72b1
JD		 1662 w83627hf_write_value(data, W83781D_REG_CONFIG,
1663 (w83627hf_read_value(data,
1da177e4
LT		 1664 W83781D_REG_CONFIG) & 0xf7)
1665 | 0x01);
ef878b11
JD		 1666
1667 /* Enable VBAT monitoring if needed */
1668 tmp = w83627hf_read_value(data, W83781D_REG_VBAT);
1669 if (!(tmp & 0x01))
1670 w83627hf_write_value(data, W83781D_REG_VBAT, tmp | 0x01);
1da177e4
LT		 1671}
1672
c09c5184
JD		 1673static void w83627hf_update_fan_div(struct w83627hf_data *data)
1674{
1675 int reg;
1676
1677 reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1678 data->fan_div[0] = (reg >> 4) & 0x03;
1679 data->fan_div[1] = (reg >> 6) & 0x03;
1680 if (data->type != w83697hf) {
1681 data->fan_div[2] = (w83627hf_read_value(data,
1682 W83781D_REG_PIN) >> 6) & 0x03;
1683 }
1684 reg = w83627hf_read_value(data, W83781D_REG_VBAT);
1685 data->fan_div[0] |= (reg >> 3) & 0x04;
1686 data->fan_div[1] |= (reg >> 4) & 0x04;
1687 if (data->type != w83697hf)
1688 data->fan_div[2] |= (reg >> 5) & 0x04;
1689}
1690
1da177e4
LT		 1691static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1692{
787c72b1 1693 struct w83627hf_data *data = dev_get_drvdata(dev);
df48ed80 1694 int i, num_temps = (data->type == w83697hf) ? 2 : 3;
a95a5ed8 1695 int num_pwms = (data->type == w83697hf) ? 2 : 3;
1da177e4 1696
9a61bf63 1697 mutex_lock(&data->update_lock);
1da177e4
LT		 1698
1699 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1700 || !data->valid) {
1701 for (i = 0; i <= 8; i++) {
1702 /* skip missing sensors */
1703 if (((data->type == w83697hf) && (i == 1)) ||
c2db6ce1 1704 ((data->type != w83627hf && data->type != w83697hf)
4a1c4447 1705 && (i == 5 || i == 6)))
1da177e4
LT		 1706 continue;
1707 data->in[i] =
787c72b1 1708 w83627hf_read_value(data, W83781D_REG_IN(i));
1da177e4 1709 data->in_min[i] =
787c72b1 1710 w83627hf_read_value(data,
1da177e4
LT		 1711 W83781D_REG_IN_MIN(i));
1712 data->in_max[i] =
787c72b1 1713 w83627hf_read_value(data,
1da177e4
LT		 1714 W83781D_REG_IN_MAX(i));
1715 }
2ca2fcd1
JC		 1716 for (i = 0; i <= 2; i++) {
1717 data->fan[i] =
1718 w83627hf_read_value(data, W83627HF_REG_FAN(i));
1719 data->fan_min[i] =
787c72b1 1720 w83627hf_read_value(data,
2ca2fcd1 1721 W83627HF_REG_FAN_MIN(i));
1da177e4 1722 }
07584c76 1723 for (i = 0; i <= 2; i++) {
787c72b1 1724 u8 tmp = w83627hf_read_value(data,
1da177e4
LT		 1725 W836X7HF_REG_PWM(data->type, i));
1726 /* bits 0-3 are reserved in 627THF */
1727 if (data->type == w83627thf)
1728 tmp &= 0xf0;
07584c76
JC		 1729 data->pwm[i] = tmp;
1730 if (i == 1 &&
1731 (data->type == w83627hf || data->type == w83697hf))
1da177e4
LT		 1732 break;
1733 }
1550cb6d
COM		 1734 if (data->type == w83627hf) {
1735 u8 tmp = w83627hf_read_value(data,
1736 W83627HF_REG_PWM_FREQ);
1737 data->pwm_freq[0] = tmp & 0x07;
1738 data->pwm_freq[1] = (tmp >> 4) & 0x07;
1739 } else if (data->type != w83627thf) {
1740 for (i = 1; i <= 3; i++) {
1741 data->pwm_freq[i - 1] =
1742 w83627hf_read_value(data,
1743 W83637HF_REG_PWM_FREQ[i - 1]);
1744 if (i == 2 && (data->type == w83697hf))
1745 break;
1746 }
1747 }
a95a5ed8
DG		 1748 if (data->type != w83627hf) {
1749 for (i = 0; i < num_pwms; i++) {
1750 u8 tmp = w83627hf_read_value(data,
1751 W83627THF_REG_PWM_ENABLE[i]);
1752 data->pwm_enable[i] =
1753 ((tmp >> W83627THF_PWM_ENABLE_SHIFT[i])
1754 & 0x03) + 1;
1755 }
1756 }
df48ed80
JC		 1757 for (i = 0; i < num_temps; i++) {
1758 data->temp[i] = w83627hf_read_value(
1759 data, w83627hf_reg_temp[i]);
1760 data->temp_max[i] = w83627hf_read_value(
1761 data, w83627hf_reg_temp_over[i]);
1762 data->temp_max_hyst[i] = w83627hf_read_value(
1763 data, w83627hf_reg_temp_hyst[i]);
1da177e4
LT		 1764 }
1765
c09c5184
JD		 1766 w83627hf_update_fan_div(data);
1767
1da177e4 1768 data->alarms =
787c72b1
JD		 1769 w83627hf_read_value(data, W83781D_REG_ALARM1) |
1770 (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) |
1771 (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16);
1772 i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
1c138107 1773 data->beep_mask = (i << 8) |
787c72b1
JD		 1774 w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) |
1775 w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16;
1da177e4
LT		 1776 data->last_updated = jiffies;
1777 data->valid = 1;
1778 }
1779
9a61bf63 1780 mutex_unlock(&data->update_lock);
1da177e4
LT		 1781
1782 return data;
1783}
1784
787c72b1
JD		 1785static int __init w83627hf_device_add(unsigned short address,
1786 const struct w83627hf_sio_data *sio_data)
1787{
1788 struct resource res = {
1789 .start = address + WINB_REGION_OFFSET,
1790 .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1,
1791 .name = DRVNAME,
1792 .flags = IORESOURCE_IO,
1793 };
1794 int err;
1795
1796 pdev = platform_device_alloc(DRVNAME, address);
1797 if (!pdev) {
1798 err = -ENOMEM;
1799 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1800 goto exit;
1801 }
1802
1803 err = platform_device_add_resources(pdev, &res, 1);
1804 if (err) {
1805 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1806 "(%d)\n", err);
1807 goto exit_device_put;
1808 }
1809
2df6d811
JD		 1810 err = platform_device_add_data(pdev, sio_data,
1811 sizeof(struct w83627hf_sio_data));
1812 if (err) {
787c72b1
JD		 1813 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1814 goto exit_device_put;
1815 }
787c72b1
JD		 1816
1817 err = platform_device_add(pdev);
1818 if (err) {
1819 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1820 err);
1821 goto exit_device_put;
1822 }
1823
1824 return 0;
1825
1826exit_device_put:
1827 platform_device_put(pdev);
1828exit:
1829 return err;
1830}
1831
1da177e4
LT		 1832static int __init sensors_w83627hf_init(void)
1833{
787c72b1
JD		 1834 int err;
1835 unsigned short address;
1836 struct w83627hf_sio_data sio_data;
1837
1838 if (w83627hf_find(0x2e, &address, &sio_data)
1839 && w83627hf_find(0x4e, &address, &sio_data))
1da177e4 1840 return -ENODEV;
1da177e4 1841
787c72b1
JD		 1842 err = platform_driver_register(&w83627hf_driver);
1843 if (err)
1844 goto exit;
1845
1846 /* Sets global pdev as a side effect */
1847 err = w83627hf_device_add(address, &sio_data);
1848 if (err)
1849 goto exit_driver;
1850
1851 return 0;
1852
1853exit_driver:
1854 platform_driver_unregister(&w83627hf_driver);
1855exit:
1856 return err;
1da177e4
LT		 1857}
1858
1859static void __exit sensors_w83627hf_exit(void)
1860{
787c72b1
JD		 1861 platform_device_unregister(pdev);
1862 platform_driver_unregister(&w83627hf_driver);
1da177e4
LT		 1863}
1864
1865MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1866 "Philip Edelbrock <phil@netroedge.com>, "
1867 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1868MODULE_DESCRIPTION("W83627HF driver");
1869MODULE_LICENSE("GPL");
1870
1871module_init(sensors_w83627hf_init);
1872module_exit(sensors_w83627hf_exit);
Linux 6.x block layer and io_uring tree(s)