Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware | |
3 | monitoring | |
4 | Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>, | |
5 | Philip Edelbrock <phil@netroedge.com>, | |
6 | and Mark Studebaker <mdsxyz123@yahoo.com> | |
7 | Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org> | |
787c72b1 | 8 | Copyright (c) 2007 Jean Delvare <khali@linux-fr.org> |
1da177e4 LT |
9 | |
10 | This program is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
12 | the Free Software Foundation; either version 2 of the License, or | |
13 | (at your option) any later version. | |
14 | ||
15 | This program is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
21 | along with this program; if not, write to the Free Software | |
22 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
24 | ||
25 | /* | |
26 | Supports following chips: | |
27 | ||
28 | Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | |
29 | w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC) | |
30 | w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) | |
31 | w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC) | |
c2db6ce1 | 32 | w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) |
1da177e4 LT |
33 | w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC) |
34 | ||
35 | For other winbond chips, and for i2c support in the above chips, | |
36 | use w83781d.c. | |
37 | ||
38 | Note: automatic ("cruise") fan control for 697, 637 & 627thf not | |
39 | supported yet. | |
40 | */ | |
41 | ||
42 | #include <linux/module.h> | |
43 | #include <linux/init.h> | |
44 | #include <linux/slab.h> | |
45 | #include <linux/jiffies.h> | |
787c72b1 | 46 | #include <linux/platform_device.h> |
943b0830 | 47 | #include <linux/hwmon.h> |
07584c76 | 48 | #include <linux/hwmon-sysfs.h> |
303760b4 | 49 | #include <linux/hwmon-vid.h> |
943b0830 | 50 | #include <linux/err.h> |
9a61bf63 | 51 | #include <linux/mutex.h> |
d27c37c0 | 52 | #include <linux/ioport.h> |
1da177e4 LT |
53 | #include <asm/io.h> |
54 | #include "lm75.h" | |
55 | ||
787c72b1 | 56 | static struct platform_device *pdev; |
d27c37c0 JD |
57 | |
58 | #define DRVNAME "w83627hf" | |
59 | enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf }; | |
60 | ||
1da177e4 LT |
61 | static u16 force_addr; |
62 | module_param(force_addr, ushort, 0); | |
63 | MODULE_PARM_DESC(force_addr, | |
64 | "Initialize the base address of the sensors"); | |
65 | static u8 force_i2c = 0x1f; | |
66 | module_param(force_i2c, byte, 0); | |
67 | MODULE_PARM_DESC(force_i2c, | |
68 | "Initialize the i2c address of the sensors"); | |
69 | ||
2251cf1a JD |
70 | static int reset; |
71 | module_param(reset, bool, 0); | |
72 | MODULE_PARM_DESC(reset, "Set to one to reset chip on load"); | |
73 | ||
1da177e4 LT |
74 | static int init = 1; |
75 | module_param(init, bool, 0); | |
76 | MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); | |
77 | ||
67b671bc JD |
78 | static unsigned short force_id; |
79 | module_param(force_id, ushort, 0); | |
80 | MODULE_PARM_DESC(force_id, "Override the detected device ID"); | |
81 | ||
1da177e4 LT |
82 | /* modified from kernel/include/traps.c */ |
83 | static int REG; /* The register to read/write */ | |
84 | #define DEV 0x07 /* Register: Logical device select */ | |
85 | static int VAL; /* The value to read/write */ | |
86 | ||
87 | /* logical device numbers for superio_select (below) */ | |
88 | #define W83627HF_LD_FDC 0x00 | |
89 | #define W83627HF_LD_PRT 0x01 | |
90 | #define W83627HF_LD_UART1 0x02 | |
91 | #define W83627HF_LD_UART2 0x03 | |
92 | #define W83627HF_LD_KBC 0x05 | |
93 | #define W83627HF_LD_CIR 0x06 /* w83627hf only */ | |
94 | #define W83627HF_LD_GAME 0x07 | |
95 | #define W83627HF_LD_MIDI 0x07 | |
96 | #define W83627HF_LD_GPIO1 0x07 | |
97 | #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */ | |
98 | #define W83627HF_LD_GPIO2 0x08 | |
99 | #define W83627HF_LD_GPIO3 0x09 | |
100 | #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */ | |
101 | #define W83627HF_LD_ACPI 0x0a | |
102 | #define W83627HF_LD_HWM 0x0b | |
103 | ||
104 | #define DEVID 0x20 /* Register: Device ID */ | |
105 | ||
106 | #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */ | |
107 | #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */ | |
108 | #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */ | |
109 | ||
c2db6ce1 JD |
110 | #define W83687THF_VID_EN 0x29 /* w83687thf only */ |
111 | #define W83687THF_VID_CFG 0xF0 /* w83687thf only */ | |
112 | #define W83687THF_VID_DATA 0xF1 /* w83687thf only */ | |
113 | ||
1da177e4 LT |
114 | static inline void |
115 | superio_outb(int reg, int val) | |
116 | { | |
117 | outb(reg, REG); | |
118 | outb(val, VAL); | |
119 | } | |
120 | ||
121 | static inline int | |
122 | superio_inb(int reg) | |
123 | { | |
124 | outb(reg, REG); | |
125 | return inb(VAL); | |
126 | } | |
127 | ||
128 | static inline void | |
129 | superio_select(int ld) | |
130 | { | |
131 | outb(DEV, REG); | |
132 | outb(ld, VAL); | |
133 | } | |
134 | ||
135 | static inline void | |
136 | superio_enter(void) | |
137 | { | |
138 | outb(0x87, REG); | |
139 | outb(0x87, REG); | |
140 | } | |
141 | ||
142 | static inline void | |
143 | superio_exit(void) | |
144 | { | |
145 | outb(0xAA, REG); | |
146 | } | |
147 | ||
148 | #define W627_DEVID 0x52 | |
149 | #define W627THF_DEVID 0x82 | |
150 | #define W697_DEVID 0x60 | |
151 | #define W637_DEVID 0x70 | |
c2db6ce1 | 152 | #define W687THF_DEVID 0x85 |
1da177e4 LT |
153 | #define WINB_ACT_REG 0x30 |
154 | #define WINB_BASE_REG 0x60 | |
155 | /* Constants specified below */ | |
156 | ||
ada0c2f8 PV |
157 | /* Alignment of the base address */ |
158 | #define WINB_ALIGNMENT ~7 | |
1da177e4 | 159 | |
ada0c2f8 PV |
160 | /* Offset & size of I/O region we are interested in */ |
161 | #define WINB_REGION_OFFSET 5 | |
162 | #define WINB_REGION_SIZE 2 | |
163 | ||
787c72b1 JD |
164 | /* Where are the sensors address/data registers relative to the region offset */ |
165 | #define W83781D_ADDR_REG_OFFSET 0 | |
166 | #define W83781D_DATA_REG_OFFSET 1 | |
1da177e4 LT |
167 | |
168 | /* The W83781D registers */ | |
169 | /* The W83782D registers for nr=7,8 are in bank 5 */ | |
170 | #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ | |
171 | (0x554 + (((nr) - 7) * 2))) | |
172 | #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ | |
173 | (0x555 + (((nr) - 7) * 2))) | |
174 | #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ | |
175 | (0x550 + (nr) - 7)) | |
176 | ||
2ca2fcd1 JC |
177 | /* nr:0-2 for fans:1-3 */ |
178 | #define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr)) | |
179 | #define W83627HF_REG_FAN(nr) (0x28 + (nr)) | |
1da177e4 | 180 | |
df48ed80 JC |
181 | #define W83627HF_REG_TEMP2_CONFIG 0x152 |
182 | #define W83627HF_REG_TEMP3_CONFIG 0x252 | |
183 | /* these are zero-based, unlike config constants above */ | |
184 | static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 }; | |
185 | static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 }; | |
186 | static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 }; | |
1da177e4 LT |
187 | |
188 | #define W83781D_REG_BANK 0x4E | |
189 | ||
190 | #define W83781D_REG_CONFIG 0x40 | |
4a1c4447 YM |
191 | #define W83781D_REG_ALARM1 0x459 |
192 | #define W83781D_REG_ALARM2 0x45A | |
193 | #define W83781D_REG_ALARM3 0x45B | |
1da177e4 | 194 | |
1da177e4 LT |
195 | #define W83781D_REG_BEEP_CONFIG 0x4D |
196 | #define W83781D_REG_BEEP_INTS1 0x56 | |
197 | #define W83781D_REG_BEEP_INTS2 0x57 | |
198 | #define W83781D_REG_BEEP_INTS3 0x453 | |
199 | ||
200 | #define W83781D_REG_VID_FANDIV 0x47 | |
201 | ||
202 | #define W83781D_REG_CHIPID 0x49 | |
203 | #define W83781D_REG_WCHIPID 0x58 | |
204 | #define W83781D_REG_CHIPMAN 0x4F | |
205 | #define W83781D_REG_PIN 0x4B | |
206 | ||
207 | #define W83781D_REG_VBAT 0x5D | |
208 | ||
209 | #define W83627HF_REG_PWM1 0x5A | |
210 | #define W83627HF_REG_PWM2 0x5B | |
1da177e4 | 211 | |
c2db6ce1 JD |
212 | #define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */ |
213 | #define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */ | |
214 | #define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */ | |
1da177e4 | 215 | |
c2db6ce1 | 216 | #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */ |
1da177e4 LT |
217 | |
218 | static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 }; | |
219 | static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2, | |
220 | W83627THF_REG_PWM3 }; | |
221 | #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \ | |
07584c76 | 222 | regpwm_627hf[nr] : regpwm[nr]) |
1da177e4 | 223 | |
1550cb6d COM |
224 | #define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */ |
225 | ||
226 | #define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */ | |
227 | #define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */ | |
228 | #define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */ | |
229 | ||
230 | static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1, | |
231 | W83637HF_REG_PWM_FREQ2, | |
232 | W83637HF_REG_PWM_FREQ3 }; | |
233 | ||
234 | #define W83627HF_BASE_PWM_FREQ 46870 | |
235 | ||
1da177e4 LT |
236 | #define W83781D_REG_I2C_ADDR 0x48 |
237 | #define W83781D_REG_I2C_SUBADDR 0x4A | |
238 | ||
239 | /* Sensor selection */ | |
240 | #define W83781D_REG_SCFG1 0x5D | |
241 | static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; | |
242 | #define W83781D_REG_SCFG2 0x59 | |
243 | static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; | |
244 | #define W83781D_DEFAULT_BETA 3435 | |
245 | ||
246 | /* Conversions. Limit checking is only done on the TO_REG | |
247 | variants. Note that you should be a bit careful with which arguments | |
248 | these macros are called: arguments may be evaluated more than once. | |
249 | Fixing this is just not worth it. */ | |
250 | #define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255)) | |
251 | #define IN_FROM_REG(val) ((val) * 16) | |
252 | ||
253 | static inline u8 FAN_TO_REG(long rpm, int div) | |
254 | { | |
255 | if (rpm == 0) | |
256 | return 255; | |
257 | rpm = SENSORS_LIMIT(rpm, 1, 1000000); | |
258 | return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, | |
259 | 254); | |
260 | } | |
261 | ||
262 | #define TEMP_MIN (-128000) | |
263 | #define TEMP_MAX ( 127000) | |
264 | ||
265 | /* TEMP: 0.001C/bit (-128C to +127C) | |
266 | REG: 1C/bit, two's complement */ | |
5bfedac0 | 267 | static u8 TEMP_TO_REG(long temp) |
1da177e4 LT |
268 | { |
269 | int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX); | |
270 | ntemp += (ntemp<0 ? -500 : 500); | |
271 | return (u8)(ntemp / 1000); | |
272 | } | |
273 | ||
274 | static int TEMP_FROM_REG(u8 reg) | |
275 | { | |
276 | return (s8)reg * 1000; | |
277 | } | |
278 | ||
279 | #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div))) | |
280 | ||
281 | #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255)) | |
282 | ||
1550cb6d COM |
283 | static inline unsigned long pwm_freq_from_reg_627hf(u8 reg) |
284 | { | |
285 | unsigned long freq; | |
286 | freq = W83627HF_BASE_PWM_FREQ >> reg; | |
287 | return freq; | |
288 | } | |
289 | static inline u8 pwm_freq_to_reg_627hf(unsigned long val) | |
290 | { | |
291 | u8 i; | |
292 | /* Only 5 dividers (1 2 4 8 16) | |
293 | Search for the nearest available frequency */ | |
294 | for (i = 0; i < 4; i++) { | |
295 | if (val > (((W83627HF_BASE_PWM_FREQ >> i) + | |
296 | (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2)) | |
297 | break; | |
298 | } | |
299 | return i; | |
300 | } | |
301 | ||
302 | static inline unsigned long pwm_freq_from_reg(u8 reg) | |
303 | { | |
304 | /* Clock bit 8 -> 180 kHz or 24 MHz */ | |
305 | unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL; | |
306 | ||
307 | reg &= 0x7f; | |
308 | /* This should not happen but anyway... */ | |
309 | if (reg == 0) | |
310 | reg++; | |
311 | return (clock / (reg << 8)); | |
312 | } | |
313 | static inline u8 pwm_freq_to_reg(unsigned long val) | |
314 | { | |
315 | /* Minimum divider value is 0x01 and maximum is 0x7F */ | |
316 | if (val >= 93750) /* The highest we can do */ | |
317 | return 0x01; | |
318 | if (val >= 720) /* Use 24 MHz clock */ | |
319 | return (24000000UL / (val << 8)); | |
320 | if (val < 6) /* The lowest we can do */ | |
321 | return 0xFF; | |
322 | else /* Use 180 kHz clock */ | |
323 | return (0x80 | (180000UL / (val << 8))); | |
324 | } | |
325 | ||
1c138107 JD |
326 | #define BEEP_MASK_FROM_REG(val) ((val) & 0xff7fff) |
327 | #define BEEP_MASK_TO_REG(val) ((val) & 0xff7fff) | |
1da177e4 LT |
328 | |
329 | #define DIV_FROM_REG(val) (1 << (val)) | |
330 | ||
331 | static inline u8 DIV_TO_REG(long val) | |
332 | { | |
333 | int i; | |
334 | val = SENSORS_LIMIT(val, 1, 128) >> 1; | |
abc01922 | 335 | for (i = 0; i < 7; i++) { |
1da177e4 LT |
336 | if (val == 0) |
337 | break; | |
338 | val >>= 1; | |
339 | } | |
340 | return ((u8) i); | |
341 | } | |
342 | ||
ed6bafbf JD |
343 | /* For each registered chip, we need to keep some data in memory. |
344 | The structure is dynamically allocated. */ | |
1da177e4 | 345 | struct w83627hf_data { |
787c72b1 JD |
346 | unsigned short addr; |
347 | const char *name; | |
1beeffe4 | 348 | struct device *hwmon_dev; |
9a61bf63 | 349 | struct mutex lock; |
1da177e4 LT |
350 | enum chips type; |
351 | ||
9a61bf63 | 352 | struct mutex update_lock; |
1da177e4 LT |
353 | char valid; /* !=0 if following fields are valid */ |
354 | unsigned long last_updated; /* In jiffies */ | |
355 | ||
1da177e4 LT |
356 | u8 in[9]; /* Register value */ |
357 | u8 in_max[9]; /* Register value */ | |
358 | u8 in_min[9]; /* Register value */ | |
359 | u8 fan[3]; /* Register value */ | |
360 | u8 fan_min[3]; /* Register value */ | |
df48ed80 JC |
361 | u16 temp[3]; /* Register value */ |
362 | u16 temp_max[3]; /* Register value */ | |
363 | u16 temp_max_hyst[3]; /* Register value */ | |
1da177e4 LT |
364 | u8 fan_div[3]; /* Register encoding, shifted right */ |
365 | u8 vid; /* Register encoding, combined */ | |
366 | u32 alarms; /* Register encoding, combined */ | |
367 | u32 beep_mask; /* Register encoding, combined */ | |
1da177e4 | 368 | u8 pwm[3]; /* Register value */ |
1550cb6d | 369 | u8 pwm_freq[3]; /* Register value */ |
b26f9330 JD |
370 | u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode; |
371 | 4 = thermistor */ | |
1da177e4 | 372 | u8 vrm; |
c2db6ce1 | 373 | u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */ |
1da177e4 LT |
374 | }; |
375 | ||
787c72b1 JD |
376 | struct w83627hf_sio_data { |
377 | enum chips type; | |
378 | }; | |
1da177e4 | 379 | |
1da177e4 | 380 | |
787c72b1 | 381 | static int w83627hf_probe(struct platform_device *pdev); |
d0546128 | 382 | static int __devexit w83627hf_remove(struct platform_device *pdev); |
787c72b1 JD |
383 | |
384 | static int w83627hf_read_value(struct w83627hf_data *data, u16 reg); | |
385 | static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value); | |
c09c5184 | 386 | static void w83627hf_update_fan_div(struct w83627hf_data *data); |
1da177e4 | 387 | static struct w83627hf_data *w83627hf_update_device(struct device *dev); |
787c72b1 | 388 | static void w83627hf_init_device(struct platform_device *pdev); |
1da177e4 | 389 | |
787c72b1 | 390 | static struct platform_driver w83627hf_driver = { |
cdaf7934 | 391 | .driver = { |
87218842 | 392 | .owner = THIS_MODULE, |
d27c37c0 | 393 | .name = DRVNAME, |
cdaf7934 | 394 | }, |
787c72b1 JD |
395 | .probe = w83627hf_probe, |
396 | .remove = __devexit_p(w83627hf_remove), | |
1da177e4 LT |
397 | }; |
398 | ||
07584c76 JC |
399 | static ssize_t |
400 | show_in_input(struct device *dev, struct device_attribute *devattr, char *buf) | |
401 | { | |
402 | int nr = to_sensor_dev_attr(devattr)->index; | |
403 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
404 | return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr])); | |
1da177e4 | 405 | } |
07584c76 JC |
406 | static ssize_t |
407 | show_in_min(struct device *dev, struct device_attribute *devattr, char *buf) | |
408 | { | |
409 | int nr = to_sensor_dev_attr(devattr)->index; | |
410 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
411 | return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr])); | |
412 | } | |
413 | static ssize_t | |
414 | show_in_max(struct device *dev, struct device_attribute *devattr, char *buf) | |
415 | { | |
416 | int nr = to_sensor_dev_attr(devattr)->index; | |
417 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
418 | return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr])); | |
1da177e4 | 419 | } |
07584c76 JC |
420 | static ssize_t |
421 | store_in_min(struct device *dev, struct device_attribute *devattr, | |
422 | const char *buf, size_t count) | |
423 | { | |
424 | int nr = to_sensor_dev_attr(devattr)->index; | |
425 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
426 | long val = simple_strtol(buf, NULL, 10); | |
1da177e4 | 427 | |
07584c76 JC |
428 | mutex_lock(&data->update_lock); |
429 | data->in_min[nr] = IN_TO_REG(val); | |
430 | w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]); | |
431 | mutex_unlock(&data->update_lock); | |
432 | return count; | |
433 | } | |
434 | static ssize_t | |
435 | store_in_max(struct device *dev, struct device_attribute *devattr, | |
436 | const char *buf, size_t count) | |
437 | { | |
438 | int nr = to_sensor_dev_attr(devattr)->index; | |
439 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
440 | long val = simple_strtol(buf, NULL, 10); | |
1da177e4 | 441 | |
07584c76 JC |
442 | mutex_lock(&data->update_lock); |
443 | data->in_max[nr] = IN_TO_REG(val); | |
444 | w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]); | |
445 | mutex_unlock(&data->update_lock); | |
446 | return count; | |
447 | } | |
448 | #define sysfs_vin_decl(offset) \ | |
449 | static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \ | |
450 | show_in_input, NULL, offset); \ | |
451 | static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO|S_IWUSR, \ | |
452 | show_in_min, store_in_min, offset); \ | |
453 | static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO|S_IWUSR, \ | |
454 | show_in_max, store_in_max, offset); | |
455 | ||
456 | sysfs_vin_decl(1); | |
457 | sysfs_vin_decl(2); | |
458 | sysfs_vin_decl(3); | |
459 | sysfs_vin_decl(4); | |
460 | sysfs_vin_decl(5); | |
461 | sysfs_vin_decl(6); | |
462 | sysfs_vin_decl(7); | |
463 | sysfs_vin_decl(8); | |
1da177e4 LT |
464 | |
465 | /* use a different set of functions for in0 */ | |
466 | static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg) | |
467 | { | |
468 | long in0; | |
469 | ||
470 | if ((data->vrm_ovt & 0x01) && | |
c2db6ce1 JD |
471 | (w83627thf == data->type || w83637hf == data->type |
472 | || w83687thf == data->type)) | |
1da177e4 LT |
473 | |
474 | /* use VRM9 calculation */ | |
475 | in0 = (long)((reg * 488 + 70000 + 50) / 100); | |
476 | else | |
477 | /* use VRM8 (standard) calculation */ | |
478 | in0 = (long)IN_FROM_REG(reg); | |
479 | ||
480 | return sprintf(buf,"%ld\n", in0); | |
481 | } | |
482 | ||
a5099cfc | 483 | static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
484 | { |
485 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
486 | return show_in_0(data, buf, data->in[0]); | |
487 | } | |
488 | ||
a5099cfc | 489 | static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
490 | { |
491 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
492 | return show_in_0(data, buf, data->in_min[0]); | |
493 | } | |
494 | ||
a5099cfc | 495 | static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
496 | { |
497 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
498 | return show_in_0(data, buf, data->in_max[0]); | |
499 | } | |
500 | ||
a5099cfc | 501 | static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr, |
1da177e4 LT |
502 | const char *buf, size_t count) |
503 | { | |
787c72b1 | 504 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
505 | u32 val; |
506 | ||
507 | val = simple_strtoul(buf, NULL, 10); | |
508 | ||
9a61bf63 | 509 | mutex_lock(&data->update_lock); |
1da177e4 LT |
510 | |
511 | if ((data->vrm_ovt & 0x01) && | |
c2db6ce1 JD |
512 | (w83627thf == data->type || w83637hf == data->type |
513 | || w83687thf == data->type)) | |
1da177e4 LT |
514 | |
515 | /* use VRM9 calculation */ | |
2723ab91 YM |
516 | data->in_min[0] = |
517 | SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0, | |
518 | 255); | |
1da177e4 LT |
519 | else |
520 | /* use VRM8 (standard) calculation */ | |
521 | data->in_min[0] = IN_TO_REG(val); | |
522 | ||
787c72b1 | 523 | w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]); |
9a61bf63 | 524 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
525 | return count; |
526 | } | |
527 | ||
a5099cfc | 528 | static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr, |
1da177e4 LT |
529 | const char *buf, size_t count) |
530 | { | |
787c72b1 | 531 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
532 | u32 val; |
533 | ||
534 | val = simple_strtoul(buf, NULL, 10); | |
535 | ||
9a61bf63 | 536 | mutex_lock(&data->update_lock); |
1da177e4 LT |
537 | |
538 | if ((data->vrm_ovt & 0x01) && | |
c2db6ce1 JD |
539 | (w83627thf == data->type || w83637hf == data->type |
540 | || w83687thf == data->type)) | |
1da177e4 LT |
541 | |
542 | /* use VRM9 calculation */ | |
2723ab91 YM |
543 | data->in_max[0] = |
544 | SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0, | |
545 | 255); | |
1da177e4 LT |
546 | else |
547 | /* use VRM8 (standard) calculation */ | |
548 | data->in_max[0] = IN_TO_REG(val); | |
549 | ||
787c72b1 | 550 | w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]); |
9a61bf63 | 551 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
552 | return count; |
553 | } | |
554 | ||
555 | static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL); | |
556 | static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR, | |
557 | show_regs_in_min0, store_regs_in_min0); | |
558 | static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR, | |
559 | show_regs_in_max0, store_regs_in_max0); | |
560 | ||
07584c76 JC |
561 | static ssize_t |
562 | show_fan_input(struct device *dev, struct device_attribute *devattr, char *buf) | |
563 | { | |
564 | int nr = to_sensor_dev_attr(devattr)->index; | |
565 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
566 | return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr], | |
567 | (long)DIV_FROM_REG(data->fan_div[nr]))); | |
568 | } | |
569 | static ssize_t | |
570 | show_fan_min(struct device *dev, struct device_attribute *devattr, char *buf) | |
571 | { | |
572 | int nr = to_sensor_dev_attr(devattr)->index; | |
573 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
574 | return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr], | |
575 | (long)DIV_FROM_REG(data->fan_div[nr]))); | |
1da177e4 | 576 | } |
1da177e4 | 577 | static ssize_t |
07584c76 JC |
578 | store_fan_min(struct device *dev, struct device_attribute *devattr, |
579 | const char *buf, size_t count) | |
1da177e4 | 580 | { |
07584c76 | 581 | int nr = to_sensor_dev_attr(devattr)->index; |
787c72b1 | 582 | struct w83627hf_data *data = dev_get_drvdata(dev); |
07584c76 | 583 | u32 val = simple_strtoul(buf, NULL, 10); |
1da177e4 | 584 | |
9a61bf63 | 585 | mutex_lock(&data->update_lock); |
07584c76 | 586 | data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); |
2ca2fcd1 | 587 | w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), |
07584c76 | 588 | data->fan_min[nr]); |
1da177e4 | 589 | |
9a61bf63 | 590 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
591 | return count; |
592 | } | |
07584c76 JC |
593 | #define sysfs_fan_decl(offset) \ |
594 | static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \ | |
595 | show_fan_input, NULL, offset - 1); \ | |
596 | static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \ | |
597 | show_fan_min, store_fan_min, offset - 1); | |
1da177e4 | 598 | |
07584c76 JC |
599 | sysfs_fan_decl(1); |
600 | sysfs_fan_decl(2); | |
601 | sysfs_fan_decl(3); | |
1da177e4 | 602 | |
07584c76 JC |
603 | static ssize_t |
604 | show_temp(struct device *dev, struct device_attribute *devattr, char *buf) | |
605 | { | |
606 | int nr = to_sensor_dev_attr(devattr)->index; | |
607 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
df48ed80 JC |
608 | |
609 | u16 tmp = data->temp[nr]; | |
610 | return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp) | |
611 | : (long) TEMP_FROM_REG(tmp)); | |
1da177e4 | 612 | } |
1da177e4 | 613 | |
07584c76 JC |
614 | static ssize_t |
615 | show_temp_max(struct device *dev, struct device_attribute *devattr, | |
616 | char *buf) | |
617 | { | |
618 | int nr = to_sensor_dev_attr(devattr)->index; | |
619 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
df48ed80 JC |
620 | |
621 | u16 tmp = data->temp_max[nr]; | |
622 | return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp) | |
623 | : (long) TEMP_FROM_REG(tmp)); | |
1da177e4 | 624 | } |
1da177e4 | 625 | |
07584c76 JC |
626 | static ssize_t |
627 | show_temp_max_hyst(struct device *dev, struct device_attribute *devattr, | |
628 | char *buf) | |
629 | { | |
630 | int nr = to_sensor_dev_attr(devattr)->index; | |
631 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
df48ed80 JC |
632 | |
633 | u16 tmp = data->temp_max_hyst[nr]; | |
634 | return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp) | |
635 | : (long) TEMP_FROM_REG(tmp)); | |
07584c76 | 636 | } |
1da177e4 | 637 | |
07584c76 JC |
638 | static ssize_t |
639 | store_temp_max(struct device *dev, struct device_attribute *devattr, | |
640 | const char *buf, size_t count) | |
641 | { | |
642 | int nr = to_sensor_dev_attr(devattr)->index; | |
643 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
644 | long val = simple_strtol(buf, NULL, 10); | |
df48ed80 | 645 | u16 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val); |
1da177e4 | 646 | |
07584c76 | 647 | mutex_lock(&data->update_lock); |
df48ed80 JC |
648 | data->temp_max[nr] = tmp; |
649 | w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp); | |
07584c76 JC |
650 | mutex_unlock(&data->update_lock); |
651 | return count; | |
652 | } | |
653 | ||
654 | static ssize_t | |
655 | store_temp_max_hyst(struct device *dev, struct device_attribute *devattr, | |
656 | const char *buf, size_t count) | |
657 | { | |
658 | int nr = to_sensor_dev_attr(devattr)->index; | |
659 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
660 | long val = simple_strtol(buf, NULL, 10); | |
df48ed80 | 661 | u16 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val); |
07584c76 JC |
662 | |
663 | mutex_lock(&data->update_lock); | |
df48ed80 JC |
664 | data->temp_max_hyst[nr] = tmp; |
665 | w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp); | |
07584c76 JC |
666 | mutex_unlock(&data->update_lock); |
667 | return count; | |
668 | } | |
669 | ||
670 | #define sysfs_temp_decl(offset) \ | |
671 | static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \ | |
df48ed80 | 672 | show_temp, NULL, offset - 1); \ |
07584c76 | 673 | static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO|S_IWUSR, \ |
df48ed80 | 674 | show_temp_max, store_temp_max, offset - 1); \ |
07584c76 | 675 | static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO|S_IWUSR, \ |
df48ed80 | 676 | show_temp_max_hyst, store_temp_max_hyst, offset - 1); |
07584c76 JC |
677 | |
678 | sysfs_temp_decl(1); | |
679 | sysfs_temp_decl(2); | |
680 | sysfs_temp_decl(3); | |
1da177e4 | 681 | |
1da177e4 | 682 | static ssize_t |
a5099cfc | 683 | show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
684 | { |
685 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
686 | return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); | |
687 | } | |
688 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); | |
1da177e4 LT |
689 | |
690 | static ssize_t | |
a5099cfc | 691 | show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 | 692 | { |
90d6619a | 693 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
694 | return sprintf(buf, "%ld\n", (long) data->vrm); |
695 | } | |
696 | static ssize_t | |
a5099cfc | 697 | store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) |
1da177e4 | 698 | { |
787c72b1 | 699 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
700 | u32 val; |
701 | ||
702 | val = simple_strtoul(buf, NULL, 10); | |
703 | data->vrm = val; | |
704 | ||
705 | return count; | |
706 | } | |
707 | static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); | |
1da177e4 LT |
708 | |
709 | static ssize_t | |
a5099cfc | 710 | show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf) |
1da177e4 LT |
711 | { |
712 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
713 | return sprintf(buf, "%ld\n", (long) data->alarms); | |
714 | } | |
715 | static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); | |
1da177e4 | 716 | |
e3604c62 JD |
717 | static ssize_t |
718 | show_alarm(struct device *dev, struct device_attribute *attr, char *buf) | |
719 | { | |
720 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
721 | int bitnr = to_sensor_dev_attr(attr)->index; | |
722 | return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); | |
723 | } | |
724 | static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0); | |
725 | static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1); | |
726 | static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2); | |
727 | static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3); | |
728 | static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8); | |
729 | static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9); | |
730 | static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10); | |
731 | static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16); | |
732 | static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17); | |
733 | static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6); | |
734 | static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7); | |
735 | static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11); | |
736 | static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4); | |
737 | static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5); | |
738 | static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13); | |
739 | ||
1c138107 JD |
740 | static ssize_t |
741 | show_beep_mask(struct device *dev, struct device_attribute *attr, char *buf) | |
742 | { | |
743 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
744 | return sprintf(buf, "%ld\n", | |
745 | (long)BEEP_MASK_FROM_REG(data->beep_mask)); | |
1da177e4 | 746 | } |
1da177e4 LT |
747 | |
748 | static ssize_t | |
1c138107 JD |
749 | store_beep_mask(struct device *dev, struct device_attribute *attr, |
750 | const char *buf, size_t count) | |
1da177e4 | 751 | { |
787c72b1 | 752 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1c138107 | 753 | unsigned long val; |
1da177e4 LT |
754 | |
755 | val = simple_strtoul(buf, NULL, 10); | |
756 | ||
9a61bf63 | 757 | mutex_lock(&data->update_lock); |
1da177e4 | 758 | |
1c138107 JD |
759 | /* preserve beep enable */ |
760 | data->beep_mask = (data->beep_mask & 0x8000) | |
761 | | BEEP_MASK_TO_REG(val); | |
762 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, | |
763 | data->beep_mask & 0xff); | |
764 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, | |
765 | ((data->beep_mask) >> 16) & 0xff); | |
787c72b1 | 766 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, |
1c138107 | 767 | (data->beep_mask >> 8) & 0xff); |
1da177e4 | 768 | |
9a61bf63 | 769 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
770 | return count; |
771 | } | |
772 | ||
1c138107 JD |
773 | static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR, |
774 | show_beep_mask, store_beep_mask); | |
1da177e4 | 775 | |
e3604c62 JD |
776 | static ssize_t |
777 | show_beep(struct device *dev, struct device_attribute *attr, char *buf) | |
778 | { | |
779 | struct w83627hf_data *data = w83627hf_update_device(dev); | |
780 | int bitnr = to_sensor_dev_attr(attr)->index; | |
781 | return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1); | |
782 | } | |
783 | ||
784 | static ssize_t | |
785 | store_beep(struct device *dev, struct device_attribute *attr, | |
786 | const char *buf, size_t count) | |
787 | { | |
788 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
789 | int bitnr = to_sensor_dev_attr(attr)->index; | |
790 | unsigned long bit; | |
791 | u8 reg; | |
792 | ||
793 | bit = simple_strtoul(buf, NULL, 10); | |
794 | if (bit & ~1) | |
795 | return -EINVAL; | |
796 | ||
797 | mutex_lock(&data->update_lock); | |
798 | if (bit) | |
799 | data->beep_mask |= (1 << bitnr); | |
800 | else | |
801 | data->beep_mask &= ~(1 << bitnr); | |
802 | ||
803 | if (bitnr < 8) { | |
804 | reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS1); | |
805 | if (bit) | |
806 | reg |= (1 << bitnr); | |
807 | else | |
808 | reg &= ~(1 << bitnr); | |
809 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, reg); | |
810 | } else if (bitnr < 16) { | |
811 | reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2); | |
812 | if (bit) | |
813 | reg |= (1 << (bitnr - 8)); | |
814 | else | |
815 | reg &= ~(1 << (bitnr - 8)); | |
816 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, reg); | |
817 | } else { | |
818 | reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS3); | |
819 | if (bit) | |
820 | reg |= (1 << (bitnr - 16)); | |
821 | else | |
822 | reg &= ~(1 << (bitnr - 16)); | |
823 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, reg); | |
824 | } | |
825 | mutex_unlock(&data->update_lock); | |
826 | ||
827 | return count; | |
828 | } | |
829 | ||
830 | static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR, | |
831 | show_beep, store_beep, 0); | |
832 | static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR, | |
833 | show_beep, store_beep, 1); | |
834 | static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR, | |
835 | show_beep, store_beep, 2); | |
836 | static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR, | |
837 | show_beep, store_beep, 3); | |
838 | static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR, | |
839 | show_beep, store_beep, 8); | |
840 | static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR, | |
841 | show_beep, store_beep, 9); | |
842 | static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR, | |
843 | show_beep, store_beep, 10); | |
844 | static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR, | |
845 | show_beep, store_beep, 16); | |
846 | static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR, | |
847 | show_beep, store_beep, 17); | |
848 | static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR, | |
849 | show_beep, store_beep, 6); | |
850 | static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR, | |
851 | show_beep, store_beep, 7); | |
852 | static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR, | |
853 | show_beep, store_beep, 11); | |
854 | static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR, | |
855 | show_beep, store_beep, 4); | |
856 | static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR, | |
857 | show_beep, store_beep, 5); | |
858 | static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO | S_IWUSR, | |
859 | show_beep, store_beep, 13); | |
1c138107 JD |
860 | static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR, |
861 | show_beep, store_beep, 15); | |
e3604c62 | 862 | |
1da177e4 | 863 | static ssize_t |
07584c76 | 864 | show_fan_div(struct device *dev, struct device_attribute *devattr, char *buf) |
1da177e4 | 865 | { |
07584c76 | 866 | int nr = to_sensor_dev_attr(devattr)->index; |
1da177e4 LT |
867 | struct w83627hf_data *data = w83627hf_update_device(dev); |
868 | return sprintf(buf, "%ld\n", | |
07584c76 | 869 | (long) DIV_FROM_REG(data->fan_div[nr])); |
1da177e4 | 870 | } |
1da177e4 LT |
871 | /* Note: we save and restore the fan minimum here, because its value is |
872 | determined in part by the fan divisor. This follows the principle of | |
d6e05edc | 873 | least surprise; the user doesn't expect the fan minimum to change just |
1da177e4 LT |
874 | because the divisor changed. */ |
875 | static ssize_t | |
07584c76 JC |
876 | store_fan_div(struct device *dev, struct device_attribute *devattr, |
877 | const char *buf, size_t count) | |
1da177e4 | 878 | { |
07584c76 | 879 | int nr = to_sensor_dev_attr(devattr)->index; |
787c72b1 | 880 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
881 | unsigned long min; |
882 | u8 reg; | |
883 | unsigned long val = simple_strtoul(buf, NULL, 10); | |
884 | ||
9a61bf63 | 885 | mutex_lock(&data->update_lock); |
1da177e4 LT |
886 | |
887 | /* Save fan_min */ | |
888 | min = FAN_FROM_REG(data->fan_min[nr], | |
889 | DIV_FROM_REG(data->fan_div[nr])); | |
890 | ||
891 | data->fan_div[nr] = DIV_TO_REG(val); | |
892 | ||
787c72b1 | 893 | reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) |
1da177e4 LT |
894 | & (nr==0 ? 0xcf : 0x3f)) |
895 | | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); | |
787c72b1 | 896 | w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); |
1da177e4 | 897 | |
787c72b1 | 898 | reg = (w83627hf_read_value(data, W83781D_REG_VBAT) |
1da177e4 LT |
899 | & ~(1 << (5 + nr))) |
900 | | ((data->fan_div[nr] & 0x04) << (3 + nr)); | |
787c72b1 | 901 | w83627hf_write_value(data, W83781D_REG_VBAT, reg); |
1da177e4 LT |
902 | |
903 | /* Restore fan_min */ | |
904 | data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); | |
2ca2fcd1 | 905 | w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]); |
1da177e4 | 906 | |
9a61bf63 | 907 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
908 | return count; |
909 | } | |
910 | ||
07584c76 JC |
911 | static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO|S_IWUSR, |
912 | show_fan_div, store_fan_div, 0); | |
913 | static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO|S_IWUSR, | |
914 | show_fan_div, store_fan_div, 1); | |
915 | static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO|S_IWUSR, | |
916 | show_fan_div, store_fan_div, 2); | |
1da177e4 | 917 | |
1da177e4 | 918 | static ssize_t |
07584c76 | 919 | show_pwm(struct device *dev, struct device_attribute *devattr, char *buf) |
1da177e4 | 920 | { |
07584c76 | 921 | int nr = to_sensor_dev_attr(devattr)->index; |
1da177e4 | 922 | struct w83627hf_data *data = w83627hf_update_device(dev); |
07584c76 | 923 | return sprintf(buf, "%ld\n", (long) data->pwm[nr]); |
1da177e4 LT |
924 | } |
925 | ||
926 | static ssize_t | |
07584c76 JC |
927 | store_pwm(struct device *dev, struct device_attribute *devattr, |
928 | const char *buf, size_t count) | |
1da177e4 | 929 | { |
07584c76 | 930 | int nr = to_sensor_dev_attr(devattr)->index; |
787c72b1 | 931 | struct w83627hf_data *data = dev_get_drvdata(dev); |
07584c76 | 932 | u32 val = simple_strtoul(buf, NULL, 10); |
1da177e4 | 933 | |
9a61bf63 | 934 | mutex_lock(&data->update_lock); |
1da177e4 LT |
935 | |
936 | if (data->type == w83627thf) { | |
937 | /* bits 0-3 are reserved in 627THF */ | |
07584c76 | 938 | data->pwm[nr] = PWM_TO_REG(val) & 0xf0; |
787c72b1 | 939 | w83627hf_write_value(data, |
1da177e4 | 940 | W836X7HF_REG_PWM(data->type, nr), |
07584c76 | 941 | data->pwm[nr] | |
787c72b1 | 942 | (w83627hf_read_value(data, |
1da177e4 LT |
943 | W836X7HF_REG_PWM(data->type, nr)) & 0x0f)); |
944 | } else { | |
07584c76 | 945 | data->pwm[nr] = PWM_TO_REG(val); |
787c72b1 | 946 | w83627hf_write_value(data, |
1da177e4 | 947 | W836X7HF_REG_PWM(data->type, nr), |
07584c76 | 948 | data->pwm[nr]); |
1da177e4 LT |
949 | } |
950 | ||
9a61bf63 | 951 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
952 | return count; |
953 | } | |
954 | ||
07584c76 JC |
955 | static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0); |
956 | static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1); | |
957 | static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2); | |
1da177e4 | 958 | |
1550cb6d | 959 | static ssize_t |
07584c76 | 960 | show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf) |
1550cb6d | 961 | { |
07584c76 | 962 | int nr = to_sensor_dev_attr(devattr)->index; |
1550cb6d COM |
963 | struct w83627hf_data *data = w83627hf_update_device(dev); |
964 | if (data->type == w83627hf) | |
965 | return sprintf(buf, "%ld\n", | |
07584c76 | 966 | pwm_freq_from_reg_627hf(data->pwm_freq[nr])); |
1550cb6d COM |
967 | else |
968 | return sprintf(buf, "%ld\n", | |
07584c76 | 969 | pwm_freq_from_reg(data->pwm_freq[nr])); |
1550cb6d COM |
970 | } |
971 | ||
972 | static ssize_t | |
07584c76 JC |
973 | store_pwm_freq(struct device *dev, struct device_attribute *devattr, |
974 | const char *buf, size_t count) | |
1550cb6d | 975 | { |
07584c76 | 976 | int nr = to_sensor_dev_attr(devattr)->index; |
1550cb6d COM |
977 | struct w83627hf_data *data = dev_get_drvdata(dev); |
978 | static const u8 mask[]={0xF8, 0x8F}; | |
979 | u32 val; | |
980 | ||
981 | val = simple_strtoul(buf, NULL, 10); | |
982 | ||
983 | mutex_lock(&data->update_lock); | |
984 | ||
985 | if (data->type == w83627hf) { | |
07584c76 | 986 | data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val); |
1550cb6d | 987 | w83627hf_write_value(data, W83627HF_REG_PWM_FREQ, |
07584c76 | 988 | (data->pwm_freq[nr] << (nr*4)) | |
1550cb6d | 989 | (w83627hf_read_value(data, |
07584c76 | 990 | W83627HF_REG_PWM_FREQ) & mask[nr])); |
1550cb6d | 991 | } else { |
07584c76 JC |
992 | data->pwm_freq[nr] = pwm_freq_to_reg(val); |
993 | w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr], | |
994 | data->pwm_freq[nr]); | |
1550cb6d COM |
995 | } |
996 | ||
997 | mutex_unlock(&data->update_lock); | |
998 | return count; | |
999 | } | |
1000 | ||
07584c76 JC |
1001 | static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO|S_IWUSR, |
1002 | show_pwm_freq, store_pwm_freq, 0); | |
1003 | static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO|S_IWUSR, | |
1004 | show_pwm_freq, store_pwm_freq, 1); | |
1005 | static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO|S_IWUSR, | |
1006 | show_pwm_freq, store_pwm_freq, 2); | |
1550cb6d | 1007 | |
1da177e4 | 1008 | static ssize_t |
07584c76 JC |
1009 | show_temp_type(struct device *dev, struct device_attribute *devattr, |
1010 | char *buf) | |
1da177e4 | 1011 | { |
07584c76 | 1012 | int nr = to_sensor_dev_attr(devattr)->index; |
1da177e4 | 1013 | struct w83627hf_data *data = w83627hf_update_device(dev); |
07584c76 | 1014 | return sprintf(buf, "%ld\n", (long) data->sens[nr]); |
1da177e4 LT |
1015 | } |
1016 | ||
1017 | static ssize_t | |
07584c76 JC |
1018 | store_temp_type(struct device *dev, struct device_attribute *devattr, |
1019 | const char *buf, size_t count) | |
1da177e4 | 1020 | { |
07584c76 | 1021 | int nr = to_sensor_dev_attr(devattr)->index; |
787c72b1 | 1022 | struct w83627hf_data *data = dev_get_drvdata(dev); |
1da177e4 LT |
1023 | u32 val, tmp; |
1024 | ||
1025 | val = simple_strtoul(buf, NULL, 10); | |
1026 | ||
9a61bf63 | 1027 | mutex_lock(&data->update_lock); |
1da177e4 LT |
1028 | |
1029 | switch (val) { | |
1030 | case 1: /* PII/Celeron diode */ | |
787c72b1 JD |
1031 | tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); |
1032 | w83627hf_write_value(data, W83781D_REG_SCFG1, | |
07584c76 | 1033 | tmp | BIT_SCFG1[nr]); |
787c72b1 JD |
1034 | tmp = w83627hf_read_value(data, W83781D_REG_SCFG2); |
1035 | w83627hf_write_value(data, W83781D_REG_SCFG2, | |
07584c76 JC |
1036 | tmp | BIT_SCFG2[nr]); |
1037 | data->sens[nr] = val; | |
1da177e4 LT |
1038 | break; |
1039 | case 2: /* 3904 */ | |
787c72b1 JD |
1040 | tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); |
1041 | w83627hf_write_value(data, W83781D_REG_SCFG1, | |
07584c76 | 1042 | tmp | BIT_SCFG1[nr]); |
787c72b1 JD |
1043 | tmp = w83627hf_read_value(data, W83781D_REG_SCFG2); |
1044 | w83627hf_write_value(data, W83781D_REG_SCFG2, | |
07584c76 JC |
1045 | tmp & ~BIT_SCFG2[nr]); |
1046 | data->sens[nr] = val; | |
1da177e4 | 1047 | break; |
b26f9330 JD |
1048 | case W83781D_DEFAULT_BETA: |
1049 | dev_warn(dev, "Sensor type %d is deprecated, please use 4 " | |
1050 | "instead\n", W83781D_DEFAULT_BETA); | |
1051 | /* fall through */ | |
1052 | case 4: /* thermistor */ | |
787c72b1 JD |
1053 | tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); |
1054 | w83627hf_write_value(data, W83781D_REG_SCFG1, | |
07584c76 JC |
1055 | tmp & ~BIT_SCFG1[nr]); |
1056 | data->sens[nr] = val; | |
1da177e4 LT |
1057 | break; |
1058 | default: | |
787c72b1 | 1059 | dev_err(dev, |
b26f9330 JD |
1060 | "Invalid sensor type %ld; must be 1, 2, or 4\n", |
1061 | (long) val); | |
1da177e4 LT |
1062 | break; |
1063 | } | |
1064 | ||
9a61bf63 | 1065 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1066 | return count; |
1067 | } | |
1068 | ||
07584c76 JC |
1069 | #define sysfs_temp_type(offset) \ |
1070 | static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \ | |
1071 | show_temp_type, store_temp_type, offset - 1); | |
1da177e4 | 1072 | |
07584c76 JC |
1073 | sysfs_temp_type(1); |
1074 | sysfs_temp_type(2); | |
1075 | sysfs_temp_type(3); | |
1da177e4 | 1076 | |
07584c76 JC |
1077 | static ssize_t |
1078 | show_name(struct device *dev, struct device_attribute *devattr, char *buf) | |
787c72b1 JD |
1079 | { |
1080 | struct w83627hf_data *data = dev_get_drvdata(dev); | |
1081 | ||
1082 | return sprintf(buf, "%s\n", data->name); | |
1083 | } | |
1084 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); | |
1085 | ||
1086 | static int __init w83627hf_find(int sioaddr, unsigned short *addr, | |
1087 | struct w83627hf_sio_data *sio_data) | |
1da177e4 | 1088 | { |
d27c37c0 | 1089 | int err = -ENODEV; |
1da177e4 LT |
1090 | u16 val; |
1091 | ||
787c72b1 JD |
1092 | static const __initdata char *names[] = { |
1093 | "W83627HF", | |
1094 | "W83627THF", | |
1095 | "W83697HF", | |
1096 | "W83637HF", | |
1097 | "W83687THF", | |
1098 | }; | |
1099 | ||
1da177e4 LT |
1100 | REG = sioaddr; |
1101 | VAL = sioaddr + 1; | |
1102 | ||
1103 | superio_enter(); | |
67b671bc | 1104 | val = force_id ? force_id : superio_inb(DEVID); |
787c72b1 JD |
1105 | switch (val) { |
1106 | case W627_DEVID: | |
1107 | sio_data->type = w83627hf; | |
1108 | break; | |
1109 | case W627THF_DEVID: | |
1110 | sio_data->type = w83627thf; | |
1111 | break; | |
1112 | case W697_DEVID: | |
1113 | sio_data->type = w83697hf; | |
1114 | break; | |
1115 | case W637_DEVID: | |
1116 | sio_data->type = w83637hf; | |
1117 | break; | |
1118 | case W687THF_DEVID: | |
1119 | sio_data->type = w83687thf; | |
1120 | break; | |
e142e2a3 JD |
1121 | case 0xff: /* No device at all */ |
1122 | goto exit; | |
787c72b1 | 1123 | default: |
e142e2a3 | 1124 | pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val); |
d27c37c0 | 1125 | goto exit; |
1da177e4 LT |
1126 | } |
1127 | ||
1128 | superio_select(W83627HF_LD_HWM); | |
d27c37c0 JD |
1129 | force_addr &= WINB_ALIGNMENT; |
1130 | if (force_addr) { | |
1131 | printk(KERN_WARNING DRVNAME ": Forcing address 0x%x\n", | |
1132 | force_addr); | |
1133 | superio_outb(WINB_BASE_REG, force_addr >> 8); | |
1134 | superio_outb(WINB_BASE_REG + 1, force_addr & 0xff); | |
1135 | } | |
1da177e4 LT |
1136 | val = (superio_inb(WINB_BASE_REG) << 8) | |
1137 | superio_inb(WINB_BASE_REG + 1); | |
ada0c2f8 | 1138 | *addr = val & WINB_ALIGNMENT; |
d27c37c0 JD |
1139 | if (*addr == 0) { |
1140 | printk(KERN_WARNING DRVNAME ": Base address not set, " | |
1141 | "skipping\n"); | |
1142 | goto exit; | |
1da177e4 | 1143 | } |
1da177e4 | 1144 | |
d27c37c0 JD |
1145 | val = superio_inb(WINB_ACT_REG); |
1146 | if (!(val & 0x01)) { | |
1147 | printk(KERN_WARNING DRVNAME ": Enabling HWM logical device\n"); | |
1148 | superio_outb(WINB_ACT_REG, val | 0x01); | |
1149 | } | |
1150 | ||
1151 | err = 0; | |
787c72b1 JD |
1152 | pr_info(DRVNAME ": Found %s chip at %#x\n", |
1153 | names[sio_data->type], *addr); | |
d27c37c0 JD |
1154 | |
1155 | exit: | |
1da177e4 | 1156 | superio_exit(); |
d27c37c0 | 1157 | return err; |
1da177e4 LT |
1158 | } |
1159 | ||
07584c76 JC |
1160 | #define VIN_UNIT_ATTRS(_X_) \ |
1161 | &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \ | |
1162 | &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \ | |
e3604c62 JD |
1163 | &sensor_dev_attr_in##_X_##_max.dev_attr.attr, \ |
1164 | &sensor_dev_attr_in##_X_##_alarm.dev_attr.attr, \ | |
1165 | &sensor_dev_attr_in##_X_##_beep.dev_attr.attr | |
07584c76 JC |
1166 | |
1167 | #define FAN_UNIT_ATTRS(_X_) \ | |
1168 | &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \ | |
1169 | &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \ | |
e3604c62 JD |
1170 | &sensor_dev_attr_fan##_X_##_div.dev_attr.attr, \ |
1171 | &sensor_dev_attr_fan##_X_##_alarm.dev_attr.attr, \ | |
1172 | &sensor_dev_attr_fan##_X_##_beep.dev_attr.attr | |
07584c76 JC |
1173 | |
1174 | #define TEMP_UNIT_ATTRS(_X_) \ | |
1175 | &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \ | |
1176 | &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \ | |
1177 | &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \ | |
e3604c62 JD |
1178 | &sensor_dev_attr_temp##_X_##_type.dev_attr.attr, \ |
1179 | &sensor_dev_attr_temp##_X_##_alarm.dev_attr.attr, \ | |
1180 | &sensor_dev_attr_temp##_X_##_beep.dev_attr.attr | |
07584c76 | 1181 | |
c1685f61 MH |
1182 | static struct attribute *w83627hf_attributes[] = { |
1183 | &dev_attr_in0_input.attr, | |
1184 | &dev_attr_in0_min.attr, | |
1185 | &dev_attr_in0_max.attr, | |
e3604c62 JD |
1186 | &sensor_dev_attr_in0_alarm.dev_attr.attr, |
1187 | &sensor_dev_attr_in0_beep.dev_attr.attr, | |
07584c76 JC |
1188 | VIN_UNIT_ATTRS(2), |
1189 | VIN_UNIT_ATTRS(3), | |
1190 | VIN_UNIT_ATTRS(4), | |
1191 | VIN_UNIT_ATTRS(7), | |
1192 | VIN_UNIT_ATTRS(8), | |
1193 | ||
1194 | FAN_UNIT_ATTRS(1), | |
1195 | FAN_UNIT_ATTRS(2), | |
1196 | ||
1197 | TEMP_UNIT_ATTRS(1), | |
1198 | TEMP_UNIT_ATTRS(2), | |
c1685f61 MH |
1199 | |
1200 | &dev_attr_alarms.attr, | |
1c138107 | 1201 | &sensor_dev_attr_beep_enable.dev_attr.attr, |
c1685f61 MH |
1202 | &dev_attr_beep_mask.attr, |
1203 | ||
07584c76 JC |
1204 | &sensor_dev_attr_pwm1.dev_attr.attr, |
1205 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
787c72b1 | 1206 | &dev_attr_name.attr, |
c1685f61 MH |
1207 | NULL |
1208 | }; | |
1209 | ||
1210 | static const struct attribute_group w83627hf_group = { | |
1211 | .attrs = w83627hf_attributes, | |
1212 | }; | |
1213 | ||
1214 | static struct attribute *w83627hf_attributes_opt[] = { | |
07584c76 JC |
1215 | VIN_UNIT_ATTRS(1), |
1216 | VIN_UNIT_ATTRS(5), | |
1217 | VIN_UNIT_ATTRS(6), | |
1218 | ||
1219 | FAN_UNIT_ATTRS(3), | |
1220 | TEMP_UNIT_ATTRS(3), | |
1221 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
1222 | ||
1223 | &sensor_dev_attr_pwm1_freq.dev_attr.attr, | |
1224 | &sensor_dev_attr_pwm2_freq.dev_attr.attr, | |
1225 | &sensor_dev_attr_pwm3_freq.dev_attr.attr, | |
c1685f61 MH |
1226 | NULL |
1227 | }; | |
1228 | ||
1229 | static const struct attribute_group w83627hf_group_opt = { | |
1230 | .attrs = w83627hf_attributes_opt, | |
1231 | }; | |
1232 | ||
787c72b1 | 1233 | static int __devinit w83627hf_probe(struct platform_device *pdev) |
1da177e4 | 1234 | { |
787c72b1 JD |
1235 | struct device *dev = &pdev->dev; |
1236 | struct w83627hf_sio_data *sio_data = dev->platform_data; | |
1da177e4 | 1237 | struct w83627hf_data *data; |
787c72b1 | 1238 | struct resource *res; |
2ca2fcd1 | 1239 | int err, i; |
1da177e4 | 1240 | |
787c72b1 JD |
1241 | static const char *names[] = { |
1242 | "w83627hf", | |
1243 | "w83627thf", | |
1244 | "w83697hf", | |
1245 | "w83637hf", | |
1246 | "w83687thf", | |
1247 | }; | |
1248 | ||
1249 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
1250 | if (!request_region(res->start, WINB_REGION_SIZE, DRVNAME)) { | |
1251 | dev_err(dev, "Failed to request region 0x%lx-0x%lx\n", | |
1252 | (unsigned long)res->start, | |
1253 | (unsigned long)(res->start + WINB_REGION_SIZE - 1)); | |
1da177e4 LT |
1254 | err = -EBUSY; |
1255 | goto ERROR0; | |
1256 | } | |
1257 | ||
ba9c2e8d | 1258 | if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) { |
1da177e4 LT |
1259 | err = -ENOMEM; |
1260 | goto ERROR1; | |
1261 | } | |
787c72b1 JD |
1262 | data->addr = res->start; |
1263 | data->type = sio_data->type; | |
1264 | data->name = names[sio_data->type]; | |
9a61bf63 | 1265 | mutex_init(&data->lock); |
9a61bf63 | 1266 | mutex_init(&data->update_lock); |
787c72b1 | 1267 | platform_set_drvdata(pdev, data); |
1da177e4 | 1268 | |
1da177e4 | 1269 | /* Initialize the chip */ |
787c72b1 | 1270 | w83627hf_init_device(pdev); |
1da177e4 LT |
1271 | |
1272 | /* A few vars need to be filled upon startup */ | |
2ca2fcd1 JC |
1273 | for (i = 0; i <= 2; i++) |
1274 | data->fan_min[i] = w83627hf_read_value( | |
1275 | data, W83627HF_REG_FAN_MIN(i)); | |
c09c5184 | 1276 | w83627hf_update_fan_div(data); |
1da177e4 | 1277 | |
c1685f61 | 1278 | /* Register common device attributes */ |
787c72b1 | 1279 | if ((err = sysfs_create_group(&dev->kobj, &w83627hf_group))) |
943b0830 | 1280 | goto ERROR3; |
1da177e4 | 1281 | |
c1685f61 | 1282 | /* Register chip-specific device attributes */ |
787c72b1 | 1283 | if (data->type == w83627hf || data->type == w83697hf) |
07584c76 JC |
1284 | if ((err = device_create_file(dev, |
1285 | &sensor_dev_attr_in5_input.dev_attr)) | |
1286 | || (err = device_create_file(dev, | |
1287 | &sensor_dev_attr_in5_min.dev_attr)) | |
1288 | || (err = device_create_file(dev, | |
1289 | &sensor_dev_attr_in5_max.dev_attr)) | |
e3604c62 JD |
1290 | || (err = device_create_file(dev, |
1291 | &sensor_dev_attr_in5_alarm.dev_attr)) | |
1292 | || (err = device_create_file(dev, | |
1293 | &sensor_dev_attr_in5_beep.dev_attr)) | |
07584c76 JC |
1294 | || (err = device_create_file(dev, |
1295 | &sensor_dev_attr_in6_input.dev_attr)) | |
1296 | || (err = device_create_file(dev, | |
1297 | &sensor_dev_attr_in6_min.dev_attr)) | |
1298 | || (err = device_create_file(dev, | |
1299 | &sensor_dev_attr_in6_max.dev_attr)) | |
e3604c62 JD |
1300 | || (err = device_create_file(dev, |
1301 | &sensor_dev_attr_in6_alarm.dev_attr)) | |
1302 | || (err = device_create_file(dev, | |
1303 | &sensor_dev_attr_in6_beep.dev_attr)) | |
07584c76 JC |
1304 | || (err = device_create_file(dev, |
1305 | &sensor_dev_attr_pwm1_freq.dev_attr)) | |
1306 | || (err = device_create_file(dev, | |
1307 | &sensor_dev_attr_pwm2_freq.dev_attr))) | |
c1685f61 | 1308 | goto ERROR4; |
1da177e4 | 1309 | |
787c72b1 | 1310 | if (data->type != w83697hf) |
07584c76 JC |
1311 | if ((err = device_create_file(dev, |
1312 | &sensor_dev_attr_in1_input.dev_attr)) | |
1313 | || (err = device_create_file(dev, | |
1314 | &sensor_dev_attr_in1_min.dev_attr)) | |
1315 | || (err = device_create_file(dev, | |
1316 | &sensor_dev_attr_in1_max.dev_attr)) | |
e3604c62 JD |
1317 | || (err = device_create_file(dev, |
1318 | &sensor_dev_attr_in1_alarm.dev_attr)) | |
1319 | || (err = device_create_file(dev, | |
1320 | &sensor_dev_attr_in1_beep.dev_attr)) | |
07584c76 JC |
1321 | || (err = device_create_file(dev, |
1322 | &sensor_dev_attr_fan3_input.dev_attr)) | |
1323 | || (err = device_create_file(dev, | |
1324 | &sensor_dev_attr_fan3_min.dev_attr)) | |
1325 | || (err = device_create_file(dev, | |
1326 | &sensor_dev_attr_fan3_div.dev_attr)) | |
e3604c62 JD |
1327 | || (err = device_create_file(dev, |
1328 | &sensor_dev_attr_fan3_alarm.dev_attr)) | |
1329 | || (err = device_create_file(dev, | |
1330 | &sensor_dev_attr_fan3_beep.dev_attr)) | |
07584c76 JC |
1331 | || (err = device_create_file(dev, |
1332 | &sensor_dev_attr_temp3_input.dev_attr)) | |
1333 | || (err = device_create_file(dev, | |
1334 | &sensor_dev_attr_temp3_max.dev_attr)) | |
1335 | || (err = device_create_file(dev, | |
1336 | &sensor_dev_attr_temp3_max_hyst.dev_attr)) | |
e3604c62 JD |
1337 | || (err = device_create_file(dev, |
1338 | &sensor_dev_attr_temp3_alarm.dev_attr)) | |
1339 | || (err = device_create_file(dev, | |
1340 | &sensor_dev_attr_temp3_beep.dev_attr)) | |
07584c76 JC |
1341 | || (err = device_create_file(dev, |
1342 | &sensor_dev_attr_temp3_type.dev_attr))) | |
c1685f61 MH |
1343 | goto ERROR4; |
1344 | ||
787c72b1 | 1345 | if (data->type != w83697hf && data->vid != 0xff) { |
8a665a05 JD |
1346 | /* Convert VID to voltage based on VRM */ |
1347 | data->vrm = vid_which_vrm(); | |
1348 | ||
787c72b1 JD |
1349 | if ((err = device_create_file(dev, &dev_attr_cpu0_vid)) |
1350 | || (err = device_create_file(dev, &dev_attr_vrm))) | |
c1685f61 | 1351 | goto ERROR4; |
8a665a05 | 1352 | } |
1da177e4 | 1353 | |
787c72b1 JD |
1354 | if (data->type == w83627thf || data->type == w83637hf |
1355 | || data->type == w83687thf) | |
07584c76 JC |
1356 | if ((err = device_create_file(dev, |
1357 | &sensor_dev_attr_pwm3.dev_attr))) | |
c1685f61 | 1358 | goto ERROR4; |
1da177e4 | 1359 | |
1550cb6d | 1360 | if (data->type == w83637hf || data->type == w83687thf) |
07584c76 JC |
1361 | if ((err = device_create_file(dev, |
1362 | &sensor_dev_attr_pwm1_freq.dev_attr)) | |
1363 | || (err = device_create_file(dev, | |
1364 | &sensor_dev_attr_pwm2_freq.dev_attr)) | |
1365 | || (err = device_create_file(dev, | |
1366 | &sensor_dev_attr_pwm3_freq.dev_attr))) | |
1550cb6d COM |
1367 | goto ERROR4; |
1368 | ||
1beeffe4 TJ |
1369 | data->hwmon_dev = hwmon_device_register(dev); |
1370 | if (IS_ERR(data->hwmon_dev)) { | |
1371 | err = PTR_ERR(data->hwmon_dev); | |
c1685f61 MH |
1372 | goto ERROR4; |
1373 | } | |
1da177e4 LT |
1374 | |
1375 | return 0; | |
1376 | ||
c1685f61 | 1377 | ERROR4: |
787c72b1 JD |
1378 | sysfs_remove_group(&dev->kobj, &w83627hf_group); |
1379 | sysfs_remove_group(&dev->kobj, &w83627hf_group_opt); | |
943b0830 | 1380 | ERROR3: |
04a6217d | 1381 | platform_set_drvdata(pdev, NULL); |
1da177e4 LT |
1382 | kfree(data); |
1383 | ERROR1: | |
787c72b1 | 1384 | release_region(res->start, WINB_REGION_SIZE); |
1da177e4 LT |
1385 | ERROR0: |
1386 | return err; | |
1387 | } | |
1388 | ||
787c72b1 | 1389 | static int __devexit w83627hf_remove(struct platform_device *pdev) |
1da177e4 | 1390 | { |
787c72b1 JD |
1391 | struct w83627hf_data *data = platform_get_drvdata(pdev); |
1392 | struct resource *res; | |
1da177e4 | 1393 | |
1beeffe4 | 1394 | hwmon_device_unregister(data->hwmon_dev); |
943b0830 | 1395 | |
787c72b1 JD |
1396 | sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group); |
1397 | sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt); | |
04a6217d | 1398 | platform_set_drvdata(pdev, NULL); |
943b0830 | 1399 | kfree(data); |
1da177e4 | 1400 | |
787c72b1 JD |
1401 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); |
1402 | release_region(res->start, WINB_REGION_SIZE); | |
1403 | ||
1da177e4 LT |
1404 | return 0; |
1405 | } | |
1406 | ||
1407 | ||
d58df9cd JD |
1408 | /* Registers 0x50-0x5f are banked */ |
1409 | static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg) | |
1410 | { | |
1411 | if ((reg & 0x00f0) == 0x50) { | |
1412 | outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET); | |
1413 | outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET); | |
1414 | } | |
1415 | } | |
1416 | ||
1417 | /* Not strictly necessary, but play it safe for now */ | |
1418 | static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg) | |
1419 | { | |
1420 | if (reg & 0xff00) { | |
1421 | outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET); | |
1422 | outb_p(0, data->addr + W83781D_DATA_REG_OFFSET); | |
1423 | } | |
1424 | } | |
1425 | ||
787c72b1 | 1426 | static int w83627hf_read_value(struct w83627hf_data *data, u16 reg) |
1da177e4 | 1427 | { |
1da177e4 LT |
1428 | int res, word_sized; |
1429 | ||
9a61bf63 | 1430 | mutex_lock(&data->lock); |
1da177e4 LT |
1431 | word_sized = (((reg & 0xff00) == 0x100) |
1432 | || ((reg & 0xff00) == 0x200)) | |
1433 | && (((reg & 0x00ff) == 0x50) | |
1434 | || ((reg & 0x00ff) == 0x53) | |
1435 | || ((reg & 0x00ff) == 0x55)); | |
d58df9cd | 1436 | w83627hf_set_bank(data, reg); |
787c72b1 JD |
1437 | outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET); |
1438 | res = inb_p(data->addr + W83781D_DATA_REG_OFFSET); | |
1da177e4 LT |
1439 | if (word_sized) { |
1440 | outb_p((reg & 0xff) + 1, | |
787c72b1 | 1441 | data->addr + W83781D_ADDR_REG_OFFSET); |
1da177e4 | 1442 | res = |
787c72b1 | 1443 | (res << 8) + inb_p(data->addr + |
1da177e4 LT |
1444 | W83781D_DATA_REG_OFFSET); |
1445 | } | |
d58df9cd | 1446 | w83627hf_reset_bank(data, reg); |
9a61bf63 | 1447 | mutex_unlock(&data->lock); |
1da177e4 LT |
1448 | return res; |
1449 | } | |
1450 | ||
787c72b1 | 1451 | static int __devinit w83627thf_read_gpio5(struct platform_device *pdev) |
1da177e4 LT |
1452 | { |
1453 | int res = 0xff, sel; | |
1454 | ||
1455 | superio_enter(); | |
1456 | superio_select(W83627HF_LD_GPIO5); | |
1457 | ||
1458 | /* Make sure these GPIO pins are enabled */ | |
1459 | if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) { | |
787c72b1 | 1460 | dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n"); |
1da177e4 LT |
1461 | goto exit; |
1462 | } | |
1463 | ||
1464 | /* Make sure the pins are configured for input | |
1465 | There must be at least five (VRM 9), and possibly 6 (VRM 10) */ | |
dd149c52 | 1466 | sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f; |
1da177e4 | 1467 | if ((sel & 0x1f) != 0x1f) { |
787c72b1 | 1468 | dev_dbg(&pdev->dev, "GPIO5 not configured for VID " |
1da177e4 LT |
1469 | "function\n"); |
1470 | goto exit; | |
1471 | } | |
1472 | ||
787c72b1 | 1473 | dev_info(&pdev->dev, "Reading VID from GPIO5\n"); |
1da177e4 LT |
1474 | res = superio_inb(W83627THF_GPIO5_DR) & sel; |
1475 | ||
1476 | exit: | |
1477 | superio_exit(); | |
1478 | return res; | |
1479 | } | |
1480 | ||
787c72b1 | 1481 | static int __devinit w83687thf_read_vid(struct platform_device *pdev) |
c2db6ce1 JD |
1482 | { |
1483 | int res = 0xff; | |
1484 | ||
1485 | superio_enter(); | |
1486 | superio_select(W83627HF_LD_HWM); | |
1487 | ||
1488 | /* Make sure these GPIO pins are enabled */ | |
1489 | if (!(superio_inb(W83687THF_VID_EN) & (1 << 2))) { | |
787c72b1 | 1490 | dev_dbg(&pdev->dev, "VID disabled, no VID function\n"); |
c2db6ce1 JD |
1491 | goto exit; |
1492 | } | |
1493 | ||
1494 | /* Make sure the pins are configured for input */ | |
1495 | if (!(superio_inb(W83687THF_VID_CFG) & (1 << 4))) { | |
787c72b1 | 1496 | dev_dbg(&pdev->dev, "VID configured as output, " |
c2db6ce1 JD |
1497 | "no VID function\n"); |
1498 | goto exit; | |
1499 | } | |
1500 | ||
1501 | res = superio_inb(W83687THF_VID_DATA) & 0x3f; | |
1502 | ||
1503 | exit: | |
1504 | superio_exit(); | |
1505 | return res; | |
1506 | } | |
1507 | ||
787c72b1 | 1508 | static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value) |
1da177e4 | 1509 | { |
1da177e4 LT |
1510 | int word_sized; |
1511 | ||
9a61bf63 | 1512 | mutex_lock(&data->lock); |
1da177e4 LT |
1513 | word_sized = (((reg & 0xff00) == 0x100) |
1514 | || ((reg & 0xff00) == 0x200)) | |
1515 | && (((reg & 0x00ff) == 0x53) | |
1516 | || ((reg & 0x00ff) == 0x55)); | |
d58df9cd | 1517 | w83627hf_set_bank(data, reg); |
787c72b1 | 1518 | outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET); |
1da177e4 LT |
1519 | if (word_sized) { |
1520 | outb_p(value >> 8, | |
787c72b1 | 1521 | data->addr + W83781D_DATA_REG_OFFSET); |
1da177e4 | 1522 | outb_p((reg & 0xff) + 1, |
787c72b1 | 1523 | data->addr + W83781D_ADDR_REG_OFFSET); |
1da177e4 LT |
1524 | } |
1525 | outb_p(value & 0xff, | |
787c72b1 | 1526 | data->addr + W83781D_DATA_REG_OFFSET); |
d58df9cd | 1527 | w83627hf_reset_bank(data, reg); |
9a61bf63 | 1528 | mutex_unlock(&data->lock); |
1da177e4 LT |
1529 | return 0; |
1530 | } | |
1531 | ||
787c72b1 | 1532 | static void __devinit w83627hf_init_device(struct platform_device *pdev) |
1da177e4 | 1533 | { |
787c72b1 | 1534 | struct w83627hf_data *data = platform_get_drvdata(pdev); |
1da177e4 | 1535 | int i; |
d27c37c0 | 1536 | enum chips type = data->type; |
1da177e4 LT |
1537 | u8 tmp; |
1538 | ||
2251cf1a JD |
1539 | if (reset) { |
1540 | /* Resetting the chip has been the default for a long time, | |
1541 | but repeatedly caused problems (fans going to full | |
1542 | speed...) so it is now optional. It might even go away if | |
1543 | nobody reports it as being useful, as I see very little | |
1544 | reason why this would be needed at all. */ | |
787c72b1 | 1545 | dev_info(&pdev->dev, "If reset=1 solved a problem you were " |
2251cf1a JD |
1546 | "having, please report!\n"); |
1547 | ||
1da177e4 | 1548 | /* save this register */ |
787c72b1 | 1549 | i = w83627hf_read_value(data, W83781D_REG_BEEP_CONFIG); |
1da177e4 LT |
1550 | /* Reset all except Watchdog values and last conversion values |
1551 | This sets fan-divs to 2, among others */ | |
787c72b1 | 1552 | w83627hf_write_value(data, W83781D_REG_CONFIG, 0x80); |
1da177e4 LT |
1553 | /* Restore the register and disable power-on abnormal beep. |
1554 | This saves FAN 1/2/3 input/output values set by BIOS. */ | |
787c72b1 | 1555 | w83627hf_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80); |
1da177e4 LT |
1556 | /* Disable master beep-enable (reset turns it on). |
1557 | Individual beeps should be reset to off but for some reason | |
1558 | disabling this bit helps some people not get beeped */ | |
787c72b1 | 1559 | w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, 0); |
1da177e4 LT |
1560 | } |
1561 | ||
1562 | /* Minimize conflicts with other winbond i2c-only clients... */ | |
1563 | /* disable i2c subclients... how to disable main i2c client?? */ | |
1564 | /* force i2c address to relatively uncommon address */ | |
787c72b1 JD |
1565 | w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89); |
1566 | w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c); | |
1da177e4 LT |
1567 | |
1568 | /* Read VID only once */ | |
d27c37c0 | 1569 | if (type == w83627hf || type == w83637hf) { |
787c72b1 JD |
1570 | int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV); |
1571 | int hi = w83627hf_read_value(data, W83781D_REG_CHIPID); | |
1da177e4 | 1572 | data->vid = (lo & 0x0f) | ((hi & 0x01) << 4); |
d27c37c0 | 1573 | } else if (type == w83627thf) { |
787c72b1 | 1574 | data->vid = w83627thf_read_gpio5(pdev); |
d27c37c0 | 1575 | } else if (type == w83687thf) { |
787c72b1 | 1576 | data->vid = w83687thf_read_vid(pdev); |
1da177e4 LT |
1577 | } |
1578 | ||
1579 | /* Read VRM & OVT Config only once */ | |
d27c37c0 | 1580 | if (type == w83627thf || type == w83637hf || type == w83687thf) { |
1da177e4 | 1581 | data->vrm_ovt = |
787c72b1 | 1582 | w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG); |
1da177e4 LT |
1583 | } |
1584 | ||
787c72b1 | 1585 | tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); |
1da177e4 LT |
1586 | for (i = 1; i <= 3; i++) { |
1587 | if (!(tmp & BIT_SCFG1[i - 1])) { | |
b26f9330 | 1588 | data->sens[i - 1] = 4; |
1da177e4 LT |
1589 | } else { |
1590 | if (w83627hf_read_value | |
787c72b1 | 1591 | (data, |
1da177e4 LT |
1592 | W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) |
1593 | data->sens[i - 1] = 1; | |
1594 | else | |
1595 | data->sens[i - 1] = 2; | |
1596 | } | |
1597 | if ((type == w83697hf) && (i == 2)) | |
1598 | break; | |
1599 | } | |
1600 | ||
1601 | if(init) { | |
1602 | /* Enable temp2 */ | |
df48ed80 | 1603 | tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG); |
1da177e4 | 1604 | if (tmp & 0x01) { |
787c72b1 | 1605 | dev_warn(&pdev->dev, "Enabling temp2, readings " |
1da177e4 | 1606 | "might not make sense\n"); |
df48ed80 | 1607 | w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG, |
1da177e4 LT |
1608 | tmp & 0xfe); |
1609 | } | |
1610 | ||
1611 | /* Enable temp3 */ | |
1612 | if (type != w83697hf) { | |
787c72b1 | 1613 | tmp = w83627hf_read_value(data, |
df48ed80 | 1614 | W83627HF_REG_TEMP3_CONFIG); |
1da177e4 | 1615 | if (tmp & 0x01) { |
787c72b1 | 1616 | dev_warn(&pdev->dev, "Enabling temp3, " |
1da177e4 | 1617 | "readings might not make sense\n"); |
787c72b1 | 1618 | w83627hf_write_value(data, |
df48ed80 | 1619 | W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe); |
1da177e4 LT |
1620 | } |
1621 | } | |
1da177e4 LT |
1622 | } |
1623 | ||
1624 | /* Start monitoring */ | |
787c72b1 JD |
1625 | w83627hf_write_value(data, W83781D_REG_CONFIG, |
1626 | (w83627hf_read_value(data, | |
1da177e4 LT |
1627 | W83781D_REG_CONFIG) & 0xf7) |
1628 | | 0x01); | |
ef878b11 JD |
1629 | |
1630 | /* Enable VBAT monitoring if needed */ | |
1631 | tmp = w83627hf_read_value(data, W83781D_REG_VBAT); | |
1632 | if (!(tmp & 0x01)) | |
1633 | w83627hf_write_value(data, W83781D_REG_VBAT, tmp | 0x01); | |
1da177e4 LT |
1634 | } |
1635 | ||
c09c5184 JD |
1636 | static void w83627hf_update_fan_div(struct w83627hf_data *data) |
1637 | { | |
1638 | int reg; | |
1639 | ||
1640 | reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV); | |
1641 | data->fan_div[0] = (reg >> 4) & 0x03; | |
1642 | data->fan_div[1] = (reg >> 6) & 0x03; | |
1643 | if (data->type != w83697hf) { | |
1644 | data->fan_div[2] = (w83627hf_read_value(data, | |
1645 | W83781D_REG_PIN) >> 6) & 0x03; | |
1646 | } | |
1647 | reg = w83627hf_read_value(data, W83781D_REG_VBAT); | |
1648 | data->fan_div[0] |= (reg >> 3) & 0x04; | |
1649 | data->fan_div[1] |= (reg >> 4) & 0x04; | |
1650 | if (data->type != w83697hf) | |
1651 | data->fan_div[2] |= (reg >> 5) & 0x04; | |
1652 | } | |
1653 | ||
1da177e4 LT |
1654 | static struct w83627hf_data *w83627hf_update_device(struct device *dev) |
1655 | { | |
787c72b1 | 1656 | struct w83627hf_data *data = dev_get_drvdata(dev); |
df48ed80 | 1657 | int i, num_temps = (data->type == w83697hf) ? 2 : 3; |
1da177e4 | 1658 | |
9a61bf63 | 1659 | mutex_lock(&data->update_lock); |
1da177e4 LT |
1660 | |
1661 | if (time_after(jiffies, data->last_updated + HZ + HZ / 2) | |
1662 | || !data->valid) { | |
1663 | for (i = 0; i <= 8; i++) { | |
1664 | /* skip missing sensors */ | |
1665 | if (((data->type == w83697hf) && (i == 1)) || | |
c2db6ce1 | 1666 | ((data->type != w83627hf && data->type != w83697hf) |
4a1c4447 | 1667 | && (i == 5 || i == 6))) |
1da177e4 LT |
1668 | continue; |
1669 | data->in[i] = | |
787c72b1 | 1670 | w83627hf_read_value(data, W83781D_REG_IN(i)); |
1da177e4 | 1671 | data->in_min[i] = |
787c72b1 | 1672 | w83627hf_read_value(data, |
1da177e4 LT |
1673 | W83781D_REG_IN_MIN(i)); |
1674 | data->in_max[i] = | |
787c72b1 | 1675 | w83627hf_read_value(data, |
1da177e4 LT |
1676 | W83781D_REG_IN_MAX(i)); |
1677 | } | |
2ca2fcd1 JC |
1678 | for (i = 0; i <= 2; i++) { |
1679 | data->fan[i] = | |
1680 | w83627hf_read_value(data, W83627HF_REG_FAN(i)); | |
1681 | data->fan_min[i] = | |
787c72b1 | 1682 | w83627hf_read_value(data, |
2ca2fcd1 | 1683 | W83627HF_REG_FAN_MIN(i)); |
1da177e4 | 1684 | } |
07584c76 | 1685 | for (i = 0; i <= 2; i++) { |
787c72b1 | 1686 | u8 tmp = w83627hf_read_value(data, |
1da177e4 LT |
1687 | W836X7HF_REG_PWM(data->type, i)); |
1688 | /* bits 0-3 are reserved in 627THF */ | |
1689 | if (data->type == w83627thf) | |
1690 | tmp &= 0xf0; | |
07584c76 JC |
1691 | data->pwm[i] = tmp; |
1692 | if (i == 1 && | |
1693 | (data->type == w83627hf || data->type == w83697hf)) | |
1da177e4 LT |
1694 | break; |
1695 | } | |
1550cb6d COM |
1696 | if (data->type == w83627hf) { |
1697 | u8 tmp = w83627hf_read_value(data, | |
1698 | W83627HF_REG_PWM_FREQ); | |
1699 | data->pwm_freq[0] = tmp & 0x07; | |
1700 | data->pwm_freq[1] = (tmp >> 4) & 0x07; | |
1701 | } else if (data->type != w83627thf) { | |
1702 | for (i = 1; i <= 3; i++) { | |
1703 | data->pwm_freq[i - 1] = | |
1704 | w83627hf_read_value(data, | |
1705 | W83637HF_REG_PWM_FREQ[i - 1]); | |
1706 | if (i == 2 && (data->type == w83697hf)) | |
1707 | break; | |
1708 | } | |
1709 | } | |
df48ed80 JC |
1710 | for (i = 0; i < num_temps; i++) { |
1711 | data->temp[i] = w83627hf_read_value( | |
1712 | data, w83627hf_reg_temp[i]); | |
1713 | data->temp_max[i] = w83627hf_read_value( | |
1714 | data, w83627hf_reg_temp_over[i]); | |
1715 | data->temp_max_hyst[i] = w83627hf_read_value( | |
1716 | data, w83627hf_reg_temp_hyst[i]); | |
1da177e4 LT |
1717 | } |
1718 | ||
c09c5184 JD |
1719 | w83627hf_update_fan_div(data); |
1720 | ||
1da177e4 | 1721 | data->alarms = |
787c72b1 JD |
1722 | w83627hf_read_value(data, W83781D_REG_ALARM1) | |
1723 | (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) | | |
1724 | (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16); | |
1725 | i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2); | |
1c138107 | 1726 | data->beep_mask = (i << 8) | |
787c72b1 JD |
1727 | w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) | |
1728 | w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16; | |
1da177e4 LT |
1729 | data->last_updated = jiffies; |
1730 | data->valid = 1; | |
1731 | } | |
1732 | ||
9a61bf63 | 1733 | mutex_unlock(&data->update_lock); |
1da177e4 LT |
1734 | |
1735 | return data; | |
1736 | } | |
1737 | ||
787c72b1 JD |
1738 | static int __init w83627hf_device_add(unsigned short address, |
1739 | const struct w83627hf_sio_data *sio_data) | |
1740 | { | |
1741 | struct resource res = { | |
1742 | .start = address + WINB_REGION_OFFSET, | |
1743 | .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1, | |
1744 | .name = DRVNAME, | |
1745 | .flags = IORESOURCE_IO, | |
1746 | }; | |
1747 | int err; | |
1748 | ||
1749 | pdev = platform_device_alloc(DRVNAME, address); | |
1750 | if (!pdev) { | |
1751 | err = -ENOMEM; | |
1752 | printk(KERN_ERR DRVNAME ": Device allocation failed\n"); | |
1753 | goto exit; | |
1754 | } | |
1755 | ||
1756 | err = platform_device_add_resources(pdev, &res, 1); | |
1757 | if (err) { | |
1758 | printk(KERN_ERR DRVNAME ": Device resource addition failed " | |
1759 | "(%d)\n", err); | |
1760 | goto exit_device_put; | |
1761 | } | |
1762 | ||
2df6d811 JD |
1763 | err = platform_device_add_data(pdev, sio_data, |
1764 | sizeof(struct w83627hf_sio_data)); | |
1765 | if (err) { | |
787c72b1 JD |
1766 | printk(KERN_ERR DRVNAME ": Platform data allocation failed\n"); |
1767 | goto exit_device_put; | |
1768 | } | |
787c72b1 JD |
1769 | |
1770 | err = platform_device_add(pdev); | |
1771 | if (err) { | |
1772 | printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n", | |
1773 | err); | |
1774 | goto exit_device_put; | |
1775 | } | |
1776 | ||
1777 | return 0; | |
1778 | ||
1779 | exit_device_put: | |
1780 | platform_device_put(pdev); | |
1781 | exit: | |
1782 | return err; | |
1783 | } | |
1784 | ||
1da177e4 LT |
1785 | static int __init sensors_w83627hf_init(void) |
1786 | { | |
787c72b1 JD |
1787 | int err; |
1788 | unsigned short address; | |
1789 | struct w83627hf_sio_data sio_data; | |
1790 | ||
1791 | if (w83627hf_find(0x2e, &address, &sio_data) | |
1792 | && w83627hf_find(0x4e, &address, &sio_data)) | |
1da177e4 | 1793 | return -ENODEV; |
1da177e4 | 1794 | |
787c72b1 JD |
1795 | err = platform_driver_register(&w83627hf_driver); |
1796 | if (err) | |
1797 | goto exit; | |
1798 | ||
1799 | /* Sets global pdev as a side effect */ | |
1800 | err = w83627hf_device_add(address, &sio_data); | |
1801 | if (err) | |
1802 | goto exit_driver; | |
1803 | ||
1804 | return 0; | |
1805 | ||
1806 | exit_driver: | |
1807 | platform_driver_unregister(&w83627hf_driver); | |
1808 | exit: | |
1809 | return err; | |
1da177e4 LT |
1810 | } |
1811 | ||
1812 | static void __exit sensors_w83627hf_exit(void) | |
1813 | { | |
787c72b1 JD |
1814 | platform_device_unregister(pdev); |
1815 | platform_driver_unregister(&w83627hf_driver); | |
1da177e4 LT |
1816 | } |
1817 | ||
1818 | MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " | |
1819 | "Philip Edelbrock <phil@netroedge.com>, " | |
1820 | "and Mark Studebaker <mdsxyz123@yahoo.com>"); | |
1821 | MODULE_DESCRIPTION("W83627HF driver"); | |
1822 | MODULE_LICENSE("GPL"); | |
1823 | ||
1824 | module_init(sensors_w83627hf_init); | |
1825 | module_exit(sensors_w83627hf_exit); |