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[PATCH] i2c: Drop i2c_driver.{owner,name}, 2 of 11
[linux-2.6-block.git] / drivers / hwmon / w83627hf.c
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1da177e4
LT		 1/*
2 w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22*/
23
24/*
25 Supports following chips:
26
27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
29 w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
30 w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
31 w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
32
33 For other winbond chips, and for i2c support in the above chips,
34 use w83781d.c.
35
36 Note: automatic ("cruise") fan control for 697, 637 & 627thf not
37 supported yet.
38*/
39
40#include <linux/module.h>
41#include <linux/init.h>
42#include <linux/slab.h>
43#include <linux/jiffies.h>
44#include <linux/i2c.h>
fde09509 45#include <linux/i2c-isa.h>
943b0830 46#include <linux/hwmon.h>
303760b4 47#include <linux/hwmon-vid.h>
943b0830 48#include <linux/err.h>
1da177e4
LT		 49#include <asm/io.h>
50#include "lm75.h"
51
52static u16 force_addr;
53module_param(force_addr, ushort, 0);
54MODULE_PARM_DESC(force_addr,
55 "Initialize the base address of the sensors");
56static u8 force_i2c = 0x1f;
57module_param(force_i2c, byte, 0);
58MODULE_PARM_DESC(force_i2c,
59 "Initialize the i2c address of the sensors");
60
2d8672c5
JD		 61/* The actual ISA address is read from Super-I/O configuration space */
62static unsigned short address;
1da177e4
LT		 63
64/* Insmod parameters */
2d8672c5 65enum chips { any_chip, w83627hf, w83627thf, w83697hf, w83637hf };
1da177e4 66
2251cf1a
JD		 67static int reset;
68module_param(reset, bool, 0);
69MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
70
1da177e4
LT		 71static int init = 1;
72module_param(init, bool, 0);
73MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
74
75/* modified from kernel/include/traps.c */
76static int REG; /* The register to read/write */
77#define DEV 0x07 /* Register: Logical device select */
78static int VAL; /* The value to read/write */
79
80/* logical device numbers for superio_select (below) */
81#define W83627HF_LD_FDC 0x00
82#define W83627HF_LD_PRT 0x01
83#define W83627HF_LD_UART1 0x02
84#define W83627HF_LD_UART2 0x03
85#define W83627HF_LD_KBC 0x05
86#define W83627HF_LD_CIR 0x06 /* w83627hf only */
87#define W83627HF_LD_GAME 0x07
88#define W83627HF_LD_MIDI 0x07
89#define W83627HF_LD_GPIO1 0x07
90#define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
91#define W83627HF_LD_GPIO2 0x08
92#define W83627HF_LD_GPIO3 0x09
93#define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
94#define W83627HF_LD_ACPI 0x0a
95#define W83627HF_LD_HWM 0x0b
96
97#define DEVID 0x20 /* Register: Device ID */
98
99#define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
100#define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
101#define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
102
103static inline void
104superio_outb(int reg, int val)
105{
106 outb(reg, REG);
107 outb(val, VAL);
108}
109
110static inline int
111superio_inb(int reg)
112{
113 outb(reg, REG);
114 return inb(VAL);
115}
116
117static inline void
118superio_select(int ld)
119{
120 outb(DEV, REG);
121 outb(ld, VAL);
122}
123
124static inline void
125superio_enter(void)
126{
127 outb(0x87, REG);
128 outb(0x87, REG);
129}
130
131static inline void
132superio_exit(void)
133{
134 outb(0xAA, REG);
135}
136
137#define W627_DEVID 0x52
138#define W627THF_DEVID 0x82
139#define W697_DEVID 0x60
140#define W637_DEVID 0x70
141#define WINB_ACT_REG 0x30
142#define WINB_BASE_REG 0x60
143/* Constants specified below */
144
ada0c2f8
PV		 145/* Alignment of the base address */
146#define WINB_ALIGNMENT ~7
1da177e4 147
ada0c2f8
PV		 148/* Offset & size of I/O region we are interested in */
149#define WINB_REGION_OFFSET 5
150#define WINB_REGION_SIZE 2
151
152/* Where are the sensors address/data registers relative to the base address */
1da177e4
LT		 153#define W83781D_ADDR_REG_OFFSET 5
154#define W83781D_DATA_REG_OFFSET 6
155
156/* The W83781D registers */
157/* The W83782D registers for nr=7,8 are in bank 5 */
158#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
159 (0x554 + (((nr) - 7) * 2)))
160#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
161 (0x555 + (((nr) - 7) * 2)))
162#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
163 (0x550 + (nr) - 7))
164
165#define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
166#define W83781D_REG_FAN(nr) (0x27 + (nr))
167
168#define W83781D_REG_TEMP2_CONFIG 0x152
169#define W83781D_REG_TEMP3_CONFIG 0x252
170#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
171 ((nr == 2) ? (0x0150) : \
172 (0x27)))
173#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
174 ((nr == 2) ? (0x153) : \
175 (0x3A)))
176#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
177 ((nr == 2) ? (0x155) : \
178 (0x39)))
179
180#define W83781D_REG_BANK 0x4E
181
182#define W83781D_REG_CONFIG 0x40
4a1c4447
YM		 183#define W83781D_REG_ALARM1 0x459
184#define W83781D_REG_ALARM2 0x45A
185#define W83781D_REG_ALARM3 0x45B
1da177e4 186
1da177e4
LT		 187#define W83781D_REG_BEEP_CONFIG 0x4D
188#define W83781D_REG_BEEP_INTS1 0x56
189#define W83781D_REG_BEEP_INTS2 0x57
190#define W83781D_REG_BEEP_INTS3 0x453
191
192#define W83781D_REG_VID_FANDIV 0x47
193
194#define W83781D_REG_CHIPID 0x49
195#define W83781D_REG_WCHIPID 0x58
196#define W83781D_REG_CHIPMAN 0x4F
197#define W83781D_REG_PIN 0x4B
198
199#define W83781D_REG_VBAT 0x5D
200
201#define W83627HF_REG_PWM1 0x5A
202#define W83627HF_REG_PWM2 0x5B
1da177e4
LT		 203
204#define W83627THF_REG_PWM1 0x01 /* 697HF and 637HF too */
205#define W83627THF_REG_PWM2 0x03 /* 697HF and 637HF too */
206#define W83627THF_REG_PWM3 0x11 /* 637HF too */
207
208#define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF too */
209
210static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
211static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
212 W83627THF_REG_PWM3 };
213#define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
214 regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1])
215
216#define W83781D_REG_I2C_ADDR 0x48
217#define W83781D_REG_I2C_SUBADDR 0x4A
218
219/* Sensor selection */
220#define W83781D_REG_SCFG1 0x5D
221static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
222#define W83781D_REG_SCFG2 0x59
223static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
224#define W83781D_DEFAULT_BETA 3435
225
226/* Conversions. Limit checking is only done on the TO_REG
227 variants. Note that you should be a bit careful with which arguments
228 these macros are called: arguments may be evaluated more than once.
229 Fixing this is just not worth it. */
230#define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
231#define IN_FROM_REG(val) ((val) * 16)
232
233static inline u8 FAN_TO_REG(long rpm, int div)
234{
235 if (rpm == 0)
236 return 255;
237 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
238 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
239 254);
240}
241
242#define TEMP_MIN (-128000)
243#define TEMP_MAX ( 127000)
244
245/* TEMP: 0.001C/bit (-128C to +127C)
246 REG: 1C/bit, two's complement */
247static u8 TEMP_TO_REG(int temp)
248{
249 int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
250 ntemp += (ntemp<0 ? -500 : 500);
251 return (u8)(ntemp / 1000);
252}
253
254static int TEMP_FROM_REG(u8 reg)
255{
256 return (s8)reg * 1000;
257}
258
259#define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
260
261#define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
262
263#define BEEP_MASK_FROM_REG(val) (val)
264#define BEEP_MASK_TO_REG(val) ((val) & 0xffffff)
265#define BEEP_ENABLE_TO_REG(val) ((val)?1:0)
266#define BEEP_ENABLE_FROM_REG(val) ((val)?1:0)
267
268#define DIV_FROM_REG(val) (1 << (val))
269
270static inline u8 DIV_TO_REG(long val)
271{
272 int i;
273 val = SENSORS_LIMIT(val, 1, 128) >> 1;
abc01922 274 for (i = 0; i < 7; i++) {
1da177e4
LT		 275 if (val == 0)
276 break;
277 val >>= 1;
278 }
279 return ((u8) i);
280}
281
282/* For each registered chip, we need to keep some data in memory. That
283 data is pointed to by w83627hf_list[NR]->data. The structure itself is
284 dynamically allocated, at the same time when a new client is allocated. */
285struct w83627hf_data {
286 struct i2c_client client;
943b0830 287 struct class_device *class_dev;
1da177e4
LT		 288 struct semaphore lock;
289 enum chips type;
290
291 struct semaphore update_lock;
292 char valid; /* !=0 if following fields are valid */
293 unsigned long last_updated; /* In jiffies */
294
295 struct i2c_client *lm75; /* for secondary I2C addresses */
296 /* pointer to array of 2 subclients */
297
298 u8 in[9]; /* Register value */
299 u8 in_max[9]; /* Register value */
300 u8 in_min[9]; /* Register value */
301 u8 fan[3]; /* Register value */
302 u8 fan_min[3]; /* Register value */
303 u8 temp;
304 u8 temp_max; /* Register value */
305 u8 temp_max_hyst; /* Register value */
306 u16 temp_add[2]; /* Register value */
307 u16 temp_max_add[2]; /* Register value */
308 u16 temp_max_hyst_add[2]; /* Register value */
309 u8 fan_div[3]; /* Register encoding, shifted right */
310 u8 vid; /* Register encoding, combined */
311 u32 alarms; /* Register encoding, combined */
312 u32 beep_mask; /* Register encoding, combined */
313 u8 beep_enable; /* Boolean */
314 u8 pwm[3]; /* Register value */
315 u16 sens[3]; /* 782D/783S only.
316 1 = pentium diode; 2 = 3904 diode;
317 3000-5000 = thermistor beta.
318 Default = 3435.
319 Other Betas unimplemented */
320 u8 vrm;
321 u8 vrm_ovt; /* Register value, 627thf & 637hf only */
322};
323
324
2d8672c5 325static int w83627hf_detect(struct i2c_adapter *adapter);
1da177e4
LT		 326static int w83627hf_detach_client(struct i2c_client *client);
327
328static int w83627hf_read_value(struct i2c_client *client, u16 register);
329static int w83627hf_write_value(struct i2c_client *client, u16 register,
330 u16 value);
331static struct w83627hf_data *w83627hf_update_device(struct device *dev);
332static void w83627hf_init_client(struct i2c_client *client);
333
334static struct i2c_driver w83627hf_driver = {
335 .owner = THIS_MODULE,
336 .name = "w83627hf",
2d8672c5 337 .attach_adapter = w83627hf_detect,
1da177e4
LT		 338 .detach_client = w83627hf_detach_client,
339};
340
341/* following are the sysfs callback functions */
342#define show_in_reg(reg) \
343static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
344{ \
345 struct w83627hf_data *data = w83627hf_update_device(dev); \
346 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr])); \
347}
348show_in_reg(in)
349show_in_reg(in_min)
350show_in_reg(in_max)
351
352#define store_in_reg(REG, reg) \
353static ssize_t \
354store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
355{ \
356 struct i2c_client *client = to_i2c_client(dev); \
357 struct w83627hf_data *data = i2c_get_clientdata(client); \
358 u32 val; \
359 \
360 val = simple_strtoul(buf, NULL, 10); \
361 \
362 down(&data->update_lock); \
363 data->in_##reg[nr] = IN_TO_REG(val); \
364 w83627hf_write_value(client, W83781D_REG_IN_##REG(nr), \
365 data->in_##reg[nr]); \
366 \
367 up(&data->update_lock); \
368 return count; \
369}
370store_in_reg(MIN, min)
371store_in_reg(MAX, max)
372
373#define sysfs_in_offset(offset) \
374static ssize_t \
a5099cfc 375show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 376{ \
377 return show_in(dev, buf, offset); \
378} \
379static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
380
381#define sysfs_in_reg_offset(reg, offset) \
a5099cfc 382static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 383{ \
384 return show_in_##reg (dev, buf, offset); \
385} \
386static ssize_t \
a5099cfc 387store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, \
1da177e4
LT		 388 const char *buf, size_t count) \
389{ \
390 return store_in_##reg (dev, buf, count, offset); \
391} \
392static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, \
393 show_regs_in_##reg##offset, store_regs_in_##reg##offset);
394
395#define sysfs_in_offsets(offset) \
396sysfs_in_offset(offset) \
397sysfs_in_reg_offset(min, offset) \
398sysfs_in_reg_offset(max, offset)
399
400sysfs_in_offsets(1);
401sysfs_in_offsets(2);
402sysfs_in_offsets(3);
403sysfs_in_offsets(4);
404sysfs_in_offsets(5);
405sysfs_in_offsets(6);
406sysfs_in_offsets(7);
407sysfs_in_offsets(8);
408
409/* use a different set of functions for in0 */
410static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
411{
412 long in0;
413
414 if ((data->vrm_ovt & 0x01) &&
415 (w83627thf == data->type || w83637hf == data->type))
416
417 /* use VRM9 calculation */
418 in0 = (long)((reg * 488 + 70000 + 50) / 100);
419 else
420 /* use VRM8 (standard) calculation */
421 in0 = (long)IN_FROM_REG(reg);
422
423 return sprintf(buf,"%ld\n", in0);
424}
425
a5099cfc 426static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 427{
428 struct w83627hf_data *data = w83627hf_update_device(dev);
429 return show_in_0(data, buf, data->in[0]);
430}
431
a5099cfc 432static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 433{
434 struct w83627hf_data *data = w83627hf_update_device(dev);
435 return show_in_0(data, buf, data->in_min[0]);
436}
437
a5099cfc 438static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 439{
440 struct w83627hf_data *data = w83627hf_update_device(dev);
441 return show_in_0(data, buf, data->in_max[0]);
442}
443
a5099cfc 444static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
1da177e4
LT		 445 const char *buf, size_t count)
446{
447 struct i2c_client *client = to_i2c_client(dev);
448 struct w83627hf_data *data = i2c_get_clientdata(client);
449 u32 val;
450
451 val = simple_strtoul(buf, NULL, 10);
452
453 down(&data->update_lock);
454
455 if ((data->vrm_ovt & 0x01) &&
456 (w83627thf == data->type || w83637hf == data->type))
457
458 /* use VRM9 calculation */
2723ab91
YM		 459 data->in_min[0] =
460 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
461 255);
1da177e4
LT		 462 else
463 /* use VRM8 (standard) calculation */
464 data->in_min[0] = IN_TO_REG(val);
465
466 w83627hf_write_value(client, W83781D_REG_IN_MIN(0), data->in_min[0]);
467 up(&data->update_lock);
468 return count;
469}
470
a5099cfc 471static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
1da177e4
LT		 472 const char *buf, size_t count)
473{
474 struct i2c_client *client = to_i2c_client(dev);
475 struct w83627hf_data *data = i2c_get_clientdata(client);
476 u32 val;
477
478 val = simple_strtoul(buf, NULL, 10);
479
480 down(&data->update_lock);
481
482 if ((data->vrm_ovt & 0x01) &&
483 (w83627thf == data->type || w83637hf == data->type))
484
485 /* use VRM9 calculation */
2723ab91
YM		 486 data->in_max[0] =
487 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
488 255);
1da177e4
LT		 489 else
490 /* use VRM8 (standard) calculation */
491 data->in_max[0] = IN_TO_REG(val);
492
493 w83627hf_write_value(client, W83781D_REG_IN_MAX(0), data->in_max[0]);
494 up(&data->update_lock);
495 return count;
496}
497
498static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
499static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
500 show_regs_in_min0, store_regs_in_min0);
501static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
502 show_regs_in_max0, store_regs_in_max0);
503
504#define device_create_file_in(client, offset) \
505do { \
506device_create_file(&client->dev, &dev_attr_in##offset##_input); \
507device_create_file(&client->dev, &dev_attr_in##offset##_min); \
508device_create_file(&client->dev, &dev_attr_in##offset##_max); \
509} while (0)
510
511#define show_fan_reg(reg) \
512static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
513{ \
514 struct w83627hf_data *data = w83627hf_update_device(dev); \
515 return sprintf(buf,"%ld\n", \
516 FAN_FROM_REG(data->reg[nr-1], \
517 (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
518}
519show_fan_reg(fan);
520show_fan_reg(fan_min);
521
522static ssize_t
523store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
524{
525 struct i2c_client *client = to_i2c_client(dev);
526 struct w83627hf_data *data = i2c_get_clientdata(client);
527 u32 val;
528
529 val = simple_strtoul(buf, NULL, 10);
530
531 down(&data->update_lock);
532 data->fan_min[nr - 1] =
533 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
534 w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr),
535 data->fan_min[nr - 1]);
536
537 up(&data->update_lock);
538 return count;
539}
540
541#define sysfs_fan_offset(offset) \
a5099cfc 542static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 543{ \
544 return show_fan(dev, buf, offset); \
545} \
546static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
547
548#define sysfs_fan_min_offset(offset) \
a5099cfc 549static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 550{ \
551 return show_fan_min(dev, buf, offset); \
552} \
553static ssize_t \
a5099cfc 554store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT		 555{ \
556 return store_fan_min(dev, buf, count, offset); \
557} \
558static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
559 show_regs_fan_min##offset, store_regs_fan_min##offset);
560
561sysfs_fan_offset(1);
562sysfs_fan_min_offset(1);
563sysfs_fan_offset(2);
564sysfs_fan_min_offset(2);
565sysfs_fan_offset(3);
566sysfs_fan_min_offset(3);
567
568#define device_create_file_fan(client, offset) \
569do { \
570device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
571device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
572} while (0)
573
574#define show_temp_reg(reg) \
575static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
576{ \
577 struct w83627hf_data *data = w83627hf_update_device(dev); \
578 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
579 return sprintf(buf,"%ld\n", \
580 (long)LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
581 } else { /* TEMP1 */ \
582 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
583 } \
584}
585show_temp_reg(temp);
586show_temp_reg(temp_max);
587show_temp_reg(temp_max_hyst);
588
589#define store_temp_reg(REG, reg) \
590static ssize_t \
591store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
592{ \
593 struct i2c_client *client = to_i2c_client(dev); \
594 struct w83627hf_data *data = i2c_get_clientdata(client); \
595 u32 val; \
596 \
597 val = simple_strtoul(buf, NULL, 10); \
598 \
599 down(&data->update_lock); \
600 \
601 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
602 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
603 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
604 data->temp_##reg##_add[nr-2]); \
605 } else { /* TEMP1 */ \
606 data->temp_##reg = TEMP_TO_REG(val); \
607 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
608 data->temp_##reg); \
609 } \
610 \
611 up(&data->update_lock); \
612 return count; \
613}
614store_temp_reg(OVER, max);
615store_temp_reg(HYST, max_hyst);
616
617#define sysfs_temp_offset(offset) \
618static ssize_t \
a5099cfc 619show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 620{ \
621 return show_temp(dev, buf, offset); \
622} \
623static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
624
625#define sysfs_temp_reg_offset(reg, offset) \
a5099cfc 626static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 627{ \
628 return show_temp_##reg (dev, buf, offset); \
629} \
630static ssize_t \
a5099cfc 631store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, \
1da177e4
LT		 632 const char *buf, size_t count) \
633{ \
634 return store_temp_##reg (dev, buf, count, offset); \
635} \
636static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, \
637 show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
638
639#define sysfs_temp_offsets(offset) \
640sysfs_temp_offset(offset) \
641sysfs_temp_reg_offset(max, offset) \
642sysfs_temp_reg_offset(max_hyst, offset)
643
644sysfs_temp_offsets(1);
645sysfs_temp_offsets(2);
646sysfs_temp_offsets(3);
647
648#define device_create_file_temp(client, offset) \
649do { \
650device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
651device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
652device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
653} while (0)
654
655static ssize_t
a5099cfc 656show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 657{
658 struct w83627hf_data *data = w83627hf_update_device(dev);
659 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
660}
661static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
662#define device_create_file_vid(client) \
663device_create_file(&client->dev, &dev_attr_cpu0_vid)
664
665static ssize_t
a5099cfc 666show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 667{
668 struct w83627hf_data *data = w83627hf_update_device(dev);
669 return sprintf(buf, "%ld\n", (long) data->vrm);
670}
671static ssize_t
a5099cfc 672store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1da177e4
LT		 673{
674 struct i2c_client *client = to_i2c_client(dev);
675 struct w83627hf_data *data = i2c_get_clientdata(client);
676 u32 val;
677
678 val = simple_strtoul(buf, NULL, 10);
679 data->vrm = val;
680
681 return count;
682}
683static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
684#define device_create_file_vrm(client) \
685device_create_file(&client->dev, &dev_attr_vrm)
686
687static ssize_t
a5099cfc 688show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 689{
690 struct w83627hf_data *data = w83627hf_update_device(dev);
691 return sprintf(buf, "%ld\n", (long) data->alarms);
692}
693static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
694#define device_create_file_alarms(client) \
695device_create_file(&client->dev, &dev_attr_alarms)
696
697#define show_beep_reg(REG, reg) \
a5099cfc 698static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 699{ \
700 struct w83627hf_data *data = w83627hf_update_device(dev); \
701 return sprintf(buf,"%ld\n", \
702 (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
703}
704show_beep_reg(ENABLE, enable)
705show_beep_reg(MASK, mask)
706
707#define BEEP_ENABLE 0 /* Store beep_enable */
708#define BEEP_MASK 1 /* Store beep_mask */
709
710static ssize_t
711store_beep_reg(struct device *dev, const char *buf, size_t count,
712 int update_mask)
713{
714 struct i2c_client *client = to_i2c_client(dev);
715 struct w83627hf_data *data = i2c_get_clientdata(client);
716 u32 val, val2;
717
718 val = simple_strtoul(buf, NULL, 10);
719
720 down(&data->update_lock);
721
722 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
723 data->beep_mask = BEEP_MASK_TO_REG(val);
724 w83627hf_write_value(client, W83781D_REG_BEEP_INTS1,
725 data->beep_mask & 0xff);
726 w83627hf_write_value(client, W83781D_REG_BEEP_INTS3,
727 ((data->beep_mask) >> 16) & 0xff);
728 val2 = (data->beep_mask >> 8) & 0x7f;
729 } else { /* We are storing beep_enable */
730 val2 =
731 w83627hf_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
732 data->beep_enable = BEEP_ENABLE_TO_REG(val);
733 }
734
735 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2,
736 val2 | data->beep_enable << 7);
737
738 up(&data->update_lock);
739 return count;
740}
741
742#define sysfs_beep(REG, reg) \
a5099cfc 743static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4 744{ \
a5099cfc 745 return show_beep_##reg(dev, attr, buf); \
1da177e4
LT		 746} \
747static ssize_t \
a5099cfc 748store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT		 749{ \
750 return store_beep_reg(dev, buf, count, BEEP_##REG); \
751} \
752static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \
753 show_regs_beep_##reg, store_regs_beep_##reg);
754
755sysfs_beep(ENABLE, enable);
756sysfs_beep(MASK, mask);
757
758#define device_create_file_beep(client) \
759do { \
760device_create_file(&client->dev, &dev_attr_beep_enable); \
761device_create_file(&client->dev, &dev_attr_beep_mask); \
762} while (0)
763
764static ssize_t
765show_fan_div_reg(struct device *dev, char *buf, int nr)
766{
767 struct w83627hf_data *data = w83627hf_update_device(dev);
768 return sprintf(buf, "%ld\n",
769 (long) DIV_FROM_REG(data->fan_div[nr - 1]));
770}
771
772/* Note: we save and restore the fan minimum here, because its value is
773 determined in part by the fan divisor. This follows the principle of
774 least suprise; the user doesn't expect the fan minimum to change just
775 because the divisor changed. */
776static ssize_t
777store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
778{
779 struct i2c_client *client = to_i2c_client(dev);
780 struct w83627hf_data *data = i2c_get_clientdata(client);
781 unsigned long min;
782 u8 reg;
783 unsigned long val = simple_strtoul(buf, NULL, 10);
784
785 down(&data->update_lock);
786
787 /* Save fan_min */
788 min = FAN_FROM_REG(data->fan_min[nr],
789 DIV_FROM_REG(data->fan_div[nr]));
790
791 data->fan_div[nr] = DIV_TO_REG(val);
792
793 reg = (w83627hf_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
794 & (nr==0 ? 0xcf : 0x3f))
795 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
796 w83627hf_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
797
798 reg = (w83627hf_read_value(client, W83781D_REG_VBAT)
799 & ~(1 << (5 + nr)))
800 | ((data->fan_div[nr] & 0x04) << (3 + nr));
801 w83627hf_write_value(client, W83781D_REG_VBAT, reg);
802
803 /* Restore fan_min */
804 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
805 w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
806
807 up(&data->update_lock);
808 return count;
809}
810
811#define sysfs_fan_div(offset) \
a5099cfc 812static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 813{ \
814 return show_fan_div_reg(dev, buf, offset); \
815} \
816static ssize_t \
a5099cfc 817store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, \
1da177e4
LT		 818 const char *buf, size_t count) \
819{ \
820 return store_fan_div_reg(dev, buf, count, offset - 1); \
821} \
822static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
823 show_regs_fan_div_##offset, store_regs_fan_div_##offset);
824
825sysfs_fan_div(1);
826sysfs_fan_div(2);
827sysfs_fan_div(3);
828
829#define device_create_file_fan_div(client, offset) \
830do { \
831device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
832} while (0)
833
834static ssize_t
835show_pwm_reg(struct device *dev, char *buf, int nr)
836{
837 struct w83627hf_data *data = w83627hf_update_device(dev);
838 return sprintf(buf, "%ld\n", (long) data->pwm[nr - 1]);
839}
840
841static ssize_t
842store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
843{
844 struct i2c_client *client = to_i2c_client(dev);
845 struct w83627hf_data *data = i2c_get_clientdata(client);
846 u32 val;
847
848 val = simple_strtoul(buf, NULL, 10);
849
850 down(&data->update_lock);
851
852 if (data->type == w83627thf) {
853 /* bits 0-3 are reserved in 627THF */
854 data->pwm[nr - 1] = PWM_TO_REG(val) & 0xf0;
855 w83627hf_write_value(client,
856 W836X7HF_REG_PWM(data->type, nr),
857 data->pwm[nr - 1] |
858 (w83627hf_read_value(client,
859 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
860 } else {
861 data->pwm[nr - 1] = PWM_TO_REG(val);
862 w83627hf_write_value(client,
863 W836X7HF_REG_PWM(data->type, nr),
864 data->pwm[nr - 1]);
865 }
866
867 up(&data->update_lock);
868 return count;
869}
870
871#define sysfs_pwm(offset) \
a5099cfc 872static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 873{ \
874 return show_pwm_reg(dev, buf, offset); \
875} \
876static ssize_t \
a5099cfc 877store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT		 878{ \
879 return store_pwm_reg(dev, buf, count, offset); \
880} \
881static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
882 show_regs_pwm_##offset, store_regs_pwm_##offset);
883
884sysfs_pwm(1);
885sysfs_pwm(2);
886sysfs_pwm(3);
887
888#define device_create_file_pwm(client, offset) \
889do { \
890device_create_file(&client->dev, &dev_attr_pwm##offset); \
891} while (0)
892
893static ssize_t
894show_sensor_reg(struct device *dev, char *buf, int nr)
895{
896 struct w83627hf_data *data = w83627hf_update_device(dev);
897 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
898}
899
900static ssize_t
901store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
902{
903 struct i2c_client *client = to_i2c_client(dev);
904 struct w83627hf_data *data = i2c_get_clientdata(client);
905 u32 val, tmp;
906
907 val = simple_strtoul(buf, NULL, 10);
908
909 down(&data->update_lock);
910
911 switch (val) {
912 case 1: /* PII/Celeron diode */
913 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
914 w83627hf_write_value(client, W83781D_REG_SCFG1,
915 tmp | BIT_SCFG1[nr - 1]);
916 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
917 w83627hf_write_value(client, W83781D_REG_SCFG2,
918 tmp | BIT_SCFG2[nr - 1]);
919 data->sens[nr - 1] = val;
920 break;
921 case 2: /* 3904 */
922 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
923 w83627hf_write_value(client, W83781D_REG_SCFG1,
924 tmp | BIT_SCFG1[nr - 1]);
925 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
926 w83627hf_write_value(client, W83781D_REG_SCFG2,
927 tmp & ~BIT_SCFG2[nr - 1]);
928 data->sens[nr - 1] = val;
929 break;
930 case W83781D_DEFAULT_BETA: /* thermistor */
931 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
932 w83627hf_write_value(client, W83781D_REG_SCFG1,
933 tmp & ~BIT_SCFG1[nr - 1]);
934 data->sens[nr - 1] = val;
935 break;
936 default:
937 dev_err(&client->dev,
938 "Invalid sensor type %ld; must be 1, 2, or %d\n",
939 (long) val, W83781D_DEFAULT_BETA);
940 break;
941 }
942
943 up(&data->update_lock);
944 return count;
945}
946
947#define sysfs_sensor(offset) \
a5099cfc 948static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT		 949{ \
950 return show_sensor_reg(dev, buf, offset); \
951} \
952static ssize_t \
a5099cfc 953store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
1da177e4
LT		 954{ \
955 return store_sensor_reg(dev, buf, count, offset); \
956} \
957static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
958 show_regs_sensor_##offset, store_regs_sensor_##offset);
959
960sysfs_sensor(1);
961sysfs_sensor(2);
962sysfs_sensor(3);
963
964#define device_create_file_sensor(client, offset) \
965do { \
966device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
967} while (0)
968
969
e6cfb3ad 970static int __init w83627hf_find(int sioaddr, unsigned short *addr)
1da177e4
LT		 971{
972 u16 val;
973
974 REG = sioaddr;
975 VAL = sioaddr + 1;
976
977 superio_enter();
978 val= superio_inb(DEVID);
979 if(val != W627_DEVID &&
980 val != W627THF_DEVID &&
981 val != W697_DEVID &&
982 val != W637_DEVID) {
983 superio_exit();
984 return -ENODEV;
985 }
986
987 superio_select(W83627HF_LD_HWM);
988 val = (superio_inb(WINB_BASE_REG) << 8) |
989 superio_inb(WINB_BASE_REG + 1);
ada0c2f8 990 *addr = val & WINB_ALIGNMENT;
2d8672c5 991 if (*addr == 0 && force_addr == 0) {
1da177e4
LT		 992 superio_exit();
993 return -ENODEV;
994 }
1da177e4
LT		 995
996 superio_exit();
997 return 0;
998}
999
2d8672c5 1000static int w83627hf_detect(struct i2c_adapter *adapter)
1da177e4 1001{
2d8672c5 1002 int val, kind;
1da177e4
LT		 1003 struct i2c_client *new_client;
1004 struct w83627hf_data *data;
1005 int err = 0;
1006 const char *client_name = "";
1007
1da177e4 1008 if(force_addr)
ada0c2f8 1009 address = force_addr & WINB_ALIGNMENT;
1da177e4 1010
ada0c2f8
PV		 1011 if (!request_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE,
1012 w83627hf_driver.name)) {
1da177e4
LT		 1013 err = -EBUSY;
1014 goto ERROR0;
1015 }
1016
1017 if(force_addr) {
1018 printk("w83627hf.o: forcing ISA address 0x%04X\n", address);
1019 superio_enter();
1020 superio_select(W83627HF_LD_HWM);
1021 superio_outb(WINB_BASE_REG, address >> 8);
1022 superio_outb(WINB_BASE_REG+1, address & 0xff);
1023 superio_exit();
1024 }
1025
1026 superio_enter();
1027 val= superio_inb(DEVID);
1028 if(val == W627_DEVID)
1029 kind = w83627hf;
1030 else if(val == W697_DEVID)
1031 kind = w83697hf;
1032 else if(val == W627THF_DEVID)
1033 kind = w83627thf;
1034 else if(val == W637_DEVID)
1035 kind = w83637hf;
1036 else {
1037 dev_info(&adapter->dev,
1038 "Unsupported chip (dev_id=0x%02X).\n", val);
1039 goto ERROR1;
1040 }
1041
1042 superio_select(W83627HF_LD_HWM);
1043 if((val = 0x01 & superio_inb(WINB_ACT_REG)) == 0)
1044 superio_outb(WINB_ACT_REG, 1);
1045 superio_exit();
1046
1047 /* OK. For now, we presume we have a valid client. We now create the
1048 client structure, even though we cannot fill it completely yet.
1049 But it allows us to access w83627hf_{read,write}_value. */
1050
ba9c2e8d 1051 if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1da177e4
LT		 1052 err = -ENOMEM;
1053 goto ERROR1;
1054 }
1da177e4
LT		 1055
1056 new_client = &data->client;
1057 i2c_set_clientdata(new_client, data);
1058 new_client->addr = address;
1059 init_MUTEX(&data->lock);
1060 new_client->adapter = adapter;
1061 new_client->driver = &w83627hf_driver;
1062 new_client->flags = 0;
1063
1064
1065 if (kind == w83627hf) {
1066 client_name = "w83627hf";
1067 } else if (kind == w83627thf) {
1068 client_name = "w83627thf";
1069 } else if (kind == w83697hf) {
1070 client_name = "w83697hf";
1071 } else if (kind == w83637hf) {
1072 client_name = "w83637hf";
1073 }
1074
1075 /* Fill in the remaining client fields and put into the global list */
1076 strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1077 data->type = kind;
1078 data->valid = 0;
1079 init_MUTEX(&data->update_lock);
1080
1081 /* Tell the I2C layer a new client has arrived */
1082 if ((err = i2c_attach_client(new_client)))
1083 goto ERROR2;
1084
1085 data->lm75 = NULL;
1086
1087 /* Initialize the chip */
1088 w83627hf_init_client(new_client);
1089
1090 /* A few vars need to be filled upon startup */
1091 data->fan_min[0] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(1));
1092 data->fan_min[1] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(2));
1093 data->fan_min[2] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(3));
1094
1095 /* Register sysfs hooks */
943b0830
MH		 1096 data->class_dev = hwmon_device_register(&new_client->dev);
1097 if (IS_ERR(data->class_dev)) {
1098 err = PTR_ERR(data->class_dev);
1099 goto ERROR3;
1100 }
1101
1da177e4
LT		 1102 device_create_file_in(new_client, 0);
1103 if (kind != w83697hf)
1104 device_create_file_in(new_client, 1);
1105 device_create_file_in(new_client, 2);
1106 device_create_file_in(new_client, 3);
1107 device_create_file_in(new_client, 4);
1108 if (kind != w83627thf && kind != w83637hf) {
1109 device_create_file_in(new_client, 5);
1110 device_create_file_in(new_client, 6);
1111 }
1112 device_create_file_in(new_client, 7);
1113 device_create_file_in(new_client, 8);
1114
1115 device_create_file_fan(new_client, 1);
1116 device_create_file_fan(new_client, 2);
1117 if (kind != w83697hf)
1118 device_create_file_fan(new_client, 3);
1119
1120 device_create_file_temp(new_client, 1);
1121 device_create_file_temp(new_client, 2);
1122 if (kind != w83697hf)
1123 device_create_file_temp(new_client, 3);
1124
dd149c52 1125 if (kind != w83697hf && data->vid != 0xff) {
1da177e4 1126 device_create_file_vid(new_client);
1da177e4 1127 device_create_file_vrm(new_client);
dd149c52 1128 }
1da177e4
LT		 1129
1130 device_create_file_fan_div(new_client, 1);
1131 device_create_file_fan_div(new_client, 2);
1132 if (kind != w83697hf)
1133 device_create_file_fan_div(new_client, 3);
1134
1135 device_create_file_alarms(new_client);
1136
1137 device_create_file_beep(new_client);
1138
1139 device_create_file_pwm(new_client, 1);
1140 device_create_file_pwm(new_client, 2);
1141 if (kind == w83627thf || kind == w83637hf)
1142 device_create_file_pwm(new_client, 3);
1143
1144 device_create_file_sensor(new_client, 1);
1145 device_create_file_sensor(new_client, 2);
1146 if (kind != w83697hf)
1147 device_create_file_sensor(new_client, 3);
1148
1149 return 0;
1150
943b0830
MH		 1151 ERROR3:
1152 i2c_detach_client(new_client);
1da177e4
LT		 1153 ERROR2:
1154 kfree(data);
1155 ERROR1:
ada0c2f8 1156 release_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE);
1da177e4
LT		 1157 ERROR0:
1158 return err;
1159}
1160
1161static int w83627hf_detach_client(struct i2c_client *client)
1162{
943b0830 1163 struct w83627hf_data *data = i2c_get_clientdata(client);
1da177e4
LT		 1164 int err;
1165
943b0830
MH		 1166 hwmon_device_unregister(data->class_dev);
1167
7bef5594 1168 if ((err = i2c_detach_client(client)))
1da177e4 1169 return err;
1da177e4 1170
ada0c2f8 1171 release_region(client->addr + WINB_REGION_OFFSET, WINB_REGION_SIZE);
943b0830 1172 kfree(data);
1da177e4
LT		 1173
1174 return 0;
1175}
1176
1177
1178/*
1179 ISA access must always be locked explicitly!
1180 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1181 would slow down the W83781D access and should not be necessary.
1182 There are some ugly typecasts here, but the good news is - they should
1183 nowhere else be necessary! */
1184static int w83627hf_read_value(struct i2c_client *client, u16 reg)
1185{
1186 struct w83627hf_data *data = i2c_get_clientdata(client);
1187 int res, word_sized;
1188
1189 down(&data->lock);
1190 word_sized = (((reg & 0xff00) == 0x100)
1191 || ((reg & 0xff00) == 0x200))
1192 && (((reg & 0x00ff) == 0x50)
1193 || ((reg & 0x00ff) == 0x53)
1194 || ((reg & 0x00ff) == 0x55));
1195 if (reg & 0xff00) {
1196 outb_p(W83781D_REG_BANK,
1197 client->addr + W83781D_ADDR_REG_OFFSET);
1198 outb_p(reg >> 8,
1199 client->addr + W83781D_DATA_REG_OFFSET);
1200 }
1201 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1202 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1203 if (word_sized) {
1204 outb_p((reg & 0xff) + 1,
1205 client->addr + W83781D_ADDR_REG_OFFSET);
1206 res =
1207 (res << 8) + inb_p(client->addr +
1208 W83781D_DATA_REG_OFFSET);
1209 }
1210 if (reg & 0xff00) {
1211 outb_p(W83781D_REG_BANK,
1212 client->addr + W83781D_ADDR_REG_OFFSET);
1213 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1214 }
1215 up(&data->lock);
1216 return res;
1217}
1218
1219static int w83627thf_read_gpio5(struct i2c_client *client)
1220{
1221 int res = 0xff, sel;
1222
1223 superio_enter();
1224 superio_select(W83627HF_LD_GPIO5);
1225
1226 /* Make sure these GPIO pins are enabled */
1227 if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
1228 dev_dbg(&client->dev, "GPIO5 disabled, no VID function\n");
1229 goto exit;
1230 }
1231
1232 /* Make sure the pins are configured for input
1233 There must be at least five (VRM 9), and possibly 6 (VRM 10) */
dd149c52 1234 sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f;
1da177e4
LT		 1235 if ((sel & 0x1f) != 0x1f) {
1236 dev_dbg(&client->dev, "GPIO5 not configured for VID "
1237 "function\n");
1238 goto exit;
1239 }
1240
1241 dev_info(&client->dev, "Reading VID from GPIO5\n");
1242 res = superio_inb(W83627THF_GPIO5_DR) & sel;
1243
1244exit:
1245 superio_exit();
1246 return res;
1247}
1248
1249static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value)
1250{
1251 struct w83627hf_data *data = i2c_get_clientdata(client);
1252 int word_sized;
1253
1254 down(&data->lock);
1255 word_sized = (((reg & 0xff00) == 0x100)
1256 || ((reg & 0xff00) == 0x200))
1257 && (((reg & 0x00ff) == 0x53)
1258 || ((reg & 0x00ff) == 0x55));
1259 if (reg & 0xff00) {
1260 outb_p(W83781D_REG_BANK,
1261 client->addr + W83781D_ADDR_REG_OFFSET);
1262 outb_p(reg >> 8,
1263 client->addr + W83781D_DATA_REG_OFFSET);
1264 }
1265 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1266 if (word_sized) {
1267 outb_p(value >> 8,
1268 client->addr + W83781D_DATA_REG_OFFSET);
1269 outb_p((reg & 0xff) + 1,
1270 client->addr + W83781D_ADDR_REG_OFFSET);
1271 }
1272 outb_p(value & 0xff,
1273 client->addr + W83781D_DATA_REG_OFFSET);
1274 if (reg & 0xff00) {
1275 outb_p(W83781D_REG_BANK,
1276 client->addr + W83781D_ADDR_REG_OFFSET);
1277 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1278 }
1279 up(&data->lock);
1280 return 0;
1281}
1282
1da177e4
LT		 1283static void w83627hf_init_client(struct i2c_client *client)
1284{
1285 struct w83627hf_data *data = i2c_get_clientdata(client);
1286 int i;
1287 int type = data->type;
1288 u8 tmp;
1289
2251cf1a
JD		 1290 if (reset) {
1291 /* Resetting the chip has been the default for a long time,
1292 but repeatedly caused problems (fans going to full
1293 speed...) so it is now optional. It might even go away if
1294 nobody reports it as being useful, as I see very little
1295 reason why this would be needed at all. */
1296 dev_info(&client->dev, "If reset=1 solved a problem you were "
1297 "having, please report!\n");
1298
1da177e4
LT		 1299 /* save this register */
1300 i = w83627hf_read_value(client, W83781D_REG_BEEP_CONFIG);
1301 /* Reset all except Watchdog values and last conversion values
1302 This sets fan-divs to 2, among others */
1303 w83627hf_write_value(client, W83781D_REG_CONFIG, 0x80);
1304 /* Restore the register and disable power-on abnormal beep.
1305 This saves FAN 1/2/3 input/output values set by BIOS. */
1306 w83627hf_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1307 /* Disable master beep-enable (reset turns it on).
1308 Individual beeps should be reset to off but for some reason
1309 disabling this bit helps some people not get beeped */
1310 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1311 }
1312
1313 /* Minimize conflicts with other winbond i2c-only clients... */
1314 /* disable i2c subclients... how to disable main i2c client?? */
1315 /* force i2c address to relatively uncommon address */
1316 w83627hf_write_value(client, W83781D_REG_I2C_SUBADDR, 0x89);
1317 w83627hf_write_value(client, W83781D_REG_I2C_ADDR, force_i2c);
1318
1319 /* Read VID only once */
1320 if (w83627hf == data->type || w83637hf == data->type) {
1321 int lo = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1322 int hi = w83627hf_read_value(client, W83781D_REG_CHIPID);
1323 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1324 } else if (w83627thf == data->type) {
dd149c52 1325 data->vid = w83627thf_read_gpio5(client);
1da177e4
LT		 1326 }
1327
1328 /* Read VRM & OVT Config only once */
1329 if (w83627thf == data->type || w83637hf == data->type) {
1330 data->vrm_ovt =
1331 w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG);
1da177e4
LT		 1332 }
1333
dd149c52
YM		 1334 /* Convert VID to voltage based on VRM */
1335 data->vrm = vid_which_vrm();
1336
1da177e4
LT		 1337 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
1338 for (i = 1; i <= 3; i++) {
1339 if (!(tmp & BIT_SCFG1[i - 1])) {
1340 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1341 } else {
1342 if (w83627hf_read_value
1343 (client,
1344 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1345 data->sens[i - 1] = 1;
1346 else
1347 data->sens[i - 1] = 2;
1348 }
1349 if ((type == w83697hf) && (i == 2))
1350 break;
1351 }
1352
1353 if(init) {
1354 /* Enable temp2 */
1355 tmp = w83627hf_read_value(client, W83781D_REG_TEMP2_CONFIG);
1356 if (tmp & 0x01) {
1357 dev_warn(&client->dev, "Enabling temp2, readings "
1358 "might not make sense\n");
1359 w83627hf_write_value(client, W83781D_REG_TEMP2_CONFIG,
1360 tmp & 0xfe);
1361 }
1362
1363 /* Enable temp3 */
1364 if (type != w83697hf) {
1365 tmp = w83627hf_read_value(client,
1366 W83781D_REG_TEMP3_CONFIG);
1367 if (tmp & 0x01) {
1368 dev_warn(&client->dev, "Enabling temp3, "
1369 "readings might not make sense\n");
1370 w83627hf_write_value(client,
1371 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1372 }
1373 }
1da177e4
LT		 1374 }
1375
1376 /* Start monitoring */
1377 w83627hf_write_value(client, W83781D_REG_CONFIG,
1378 (w83627hf_read_value(client,
1379 W83781D_REG_CONFIG) & 0xf7)
1380 | 0x01);
1381}
1382
1383static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1384{
1385 struct i2c_client *client = to_i2c_client(dev);
1386 struct w83627hf_data *data = i2c_get_clientdata(client);
1387 int i;
1388
1389 down(&data->update_lock);
1390
1391 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1392 || !data->valid) {
1393 for (i = 0; i <= 8; i++) {
1394 /* skip missing sensors */
1395 if (((data->type == w83697hf) && (i == 1)) ||
1396 ((data->type == w83627thf || data->type == w83637hf)
4a1c4447 1397 && (i == 5 || i == 6)))
1da177e4
LT		 1398 continue;
1399 data->in[i] =
1400 w83627hf_read_value(client, W83781D_REG_IN(i));
1401 data->in_min[i] =
1402 w83627hf_read_value(client,
1403 W83781D_REG_IN_MIN(i));
1404 data->in_max[i] =
1405 w83627hf_read_value(client,
1406 W83781D_REG_IN_MAX(i));
1407 }
1408 for (i = 1; i <= 3; i++) {
1409 data->fan[i - 1] =
1410 w83627hf_read_value(client, W83781D_REG_FAN(i));
1411 data->fan_min[i - 1] =
1412 w83627hf_read_value(client,
1413 W83781D_REG_FAN_MIN(i));
1414 }
1415 for (i = 1; i <= 3; i++) {
1416 u8 tmp = w83627hf_read_value(client,
1417 W836X7HF_REG_PWM(data->type, i));
1418 /* bits 0-3 are reserved in 627THF */
1419 if (data->type == w83627thf)
1420 tmp &= 0xf0;
1421 data->pwm[i - 1] = tmp;
1422 if(i == 2 &&
1423 (data->type == w83627hf || data->type == w83697hf))
1424 break;
1425 }
1426
1427 data->temp = w83627hf_read_value(client, W83781D_REG_TEMP(1));
1428 data->temp_max =
1429 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(1));
1430 data->temp_max_hyst =
1431 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(1));
1432 data->temp_add[0] =
1433 w83627hf_read_value(client, W83781D_REG_TEMP(2));
1434 data->temp_max_add[0] =
1435 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(2));
1436 data->temp_max_hyst_add[0] =
1437 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(2));
1438 if (data->type != w83697hf) {
1439 data->temp_add[1] =
1440 w83627hf_read_value(client, W83781D_REG_TEMP(3));
1441 data->temp_max_add[1] =
1442 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(3));
1443 data->temp_max_hyst_add[1] =
1444 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(3));
1445 }
1446
1447 i = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1448 data->fan_div[0] = (i >> 4) & 0x03;
1449 data->fan_div[1] = (i >> 6) & 0x03;
1450 if (data->type != w83697hf) {
1451 data->fan_div[2] = (w83627hf_read_value(client,
1452 W83781D_REG_PIN) >> 6) & 0x03;
1453 }
1454 i = w83627hf_read_value(client, W83781D_REG_VBAT);
1455 data->fan_div[0] |= (i >> 3) & 0x04;
1456 data->fan_div[1] |= (i >> 4) & 0x04;
1457 if (data->type != w83697hf)
1458 data->fan_div[2] |= (i >> 5) & 0x04;
1459 data->alarms =
1460 w83627hf_read_value(client, W83781D_REG_ALARM1) |
1461 (w83627hf_read_value(client, W83781D_REG_ALARM2) << 8) |
1462 (w83627hf_read_value(client, W83781D_REG_ALARM3) << 16);
1463 i = w83627hf_read_value(client, W83781D_REG_BEEP_INTS2);
1464 data->beep_enable = i >> 7;
1465 data->beep_mask = ((i & 0x7f) << 8) |
1466 w83627hf_read_value(client, W83781D_REG_BEEP_INTS1) |
1467 w83627hf_read_value(client, W83781D_REG_BEEP_INTS3) << 16;
1468 data->last_updated = jiffies;
1469 data->valid = 1;
1470 }
1471
1472 up(&data->update_lock);
1473
1474 return data;
1475}
1476
1477static int __init sensors_w83627hf_init(void)
1478{
2d8672c5
JD		 1479 if (w83627hf_find(0x2e, &address)
1480 && w83627hf_find(0x4e, &address)) {
1da177e4
LT		 1481 return -ENODEV;
1482 }
1da177e4 1483
fde09509 1484 return i2c_isa_add_driver(&w83627hf_driver);
1da177e4
LT		 1485}
1486
1487static void __exit sensors_w83627hf_exit(void)
1488{
fde09509 1489 i2c_isa_del_driver(&w83627hf_driver);
1da177e4
LT		 1490}
1491
1492MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1493 "Philip Edelbrock <phil@netroedge.com>, "
1494 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1495MODULE_DESCRIPTION("W83627HF driver");
1496MODULE_LICENSE("GPL");
1497
1498module_init(sensors_w83627hf_init);
1499module_exit(sensors_w83627hf_exit);
Linux 6.x block layer and io_uring tree(s)