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hwmon: remove use of __devinitdata
[linux-2.6-block.git] / drivers / hwmon / w83627hf.c
CommitLineData
1da177e4 1/*
27b9de3c
GR		 2 * w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring
4 * Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 * Philip Edelbrock <phil@netroedge.com>,
6 * and Mark Studebaker <mdsxyz123@yahoo.com>
7 * Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
8 * Copyright (c) 2007 Jean Delvare <khali@linux-fr.org>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
1da177e4
LT		 24
25/*
27b9de3c
GR		 26 * Supports following chips:
27 *
4101ece3 28 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
27b9de3c
GR		 29 * w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
30 * w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
31 * w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
32 * w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
33 * w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
34 *
35 * For other winbond chips, and for i2c support in the above chips,
36 * use w83781d.c.
37 *
38 * Note: automatic ("cruise") fan control for 697, 637 & 627thf not
39 * supported yet.
40 */
1da177e4 41
18de030f
JP		 42#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
43
1da177e4
LT		 44#include <linux/module.h>
45#include <linux/init.h>
46#include <linux/slab.h>
47#include <linux/jiffies.h>
787c72b1 48#include <linux/platform_device.h>
943b0830 49#include <linux/hwmon.h>
07584c76 50#include <linux/hwmon-sysfs.h>
303760b4 51#include <linux/hwmon-vid.h>
943b0830 52#include <linux/err.h>
9a61bf63 53#include <linux/mutex.h>
d27c37c0 54#include <linux/ioport.h>
b9acb64a 55#include <linux/acpi.h>
6055fae8 56#include <linux/io.h>
1da177e4
LT		 57#include "lm75.h"
58
787c72b1 59static struct platform_device *pdev;
d27c37c0
JD		 60
61#define DRVNAME "w83627hf"
62enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
63
b72656db
JD		 64struct w83627hf_sio_data {
65 enum chips type;
66 int sioaddr;
67};
68
1da177e4
LT		 69static u8 force_i2c = 0x1f;
70module_param(force_i2c, byte, 0);
71MODULE_PARM_DESC(force_i2c,
72 "Initialize the i2c address of the sensors");
73
90ab5ee9 74static bool init = 1;
1da177e4
LT		 75module_param(init, bool, 0);
76MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
77
67b671bc
JD		 78static unsigned short force_id;
79module_param(force_id, ushort, 0);
80MODULE_PARM_DESC(force_id, "Override the detected device ID");
81
1da177e4 82/* modified from kernel/include/traps.c */
27b9de3c 83#define DEV 0x07 /* Register: Logical device select */
1da177e4
LT		 84
85/* logical device numbers for superio_select (below) */
86#define W83627HF_LD_FDC 0x00
87#define W83627HF_LD_PRT 0x01
88#define W83627HF_LD_UART1 0x02
89#define W83627HF_LD_UART2 0x03
90#define W83627HF_LD_KBC 0x05
91#define W83627HF_LD_CIR 0x06 /* w83627hf only */
92#define W83627HF_LD_GAME 0x07
93#define W83627HF_LD_MIDI 0x07
94#define W83627HF_LD_GPIO1 0x07
95#define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
96#define W83627HF_LD_GPIO2 0x08
97#define W83627HF_LD_GPIO3 0x09
98#define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
99#define W83627HF_LD_ACPI 0x0a
100#define W83627HF_LD_HWM 0x0b
101
27b9de3c 102#define DEVID 0x20 /* Register: Device ID */
1da177e4
LT		 103
104#define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
105#define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
106#define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
107
c2db6ce1
JD		 108#define W83687THF_VID_EN 0x29 /* w83687thf only */
109#define W83687THF_VID_CFG 0xF0 /* w83687thf only */
110#define W83687THF_VID_DATA 0xF1 /* w83687thf only */
111
1da177e4 112static inline void
b72656db 113superio_outb(struct w83627hf_sio_data *sio, int reg, int val)
1da177e4 114{
b72656db
JD		 115 outb(reg, sio->sioaddr);
116 outb(val, sio->sioaddr + 1);
1da177e4
LT		 117}
118
119static inline int
b72656db 120superio_inb(struct w83627hf_sio_data *sio, int reg)
1da177e4 121{
b72656db
JD		 122 outb(reg, sio->sioaddr);
123 return inb(sio->sioaddr + 1);
1da177e4
LT		 124}
125
126static inline void
b72656db 127superio_select(struct w83627hf_sio_data *sio, int ld)
1da177e4 128{
b72656db
JD		 129 outb(DEV, sio->sioaddr);
130 outb(ld, sio->sioaddr + 1);
1da177e4
LT		 131}
132
133static inline void
b72656db 134superio_enter(struct w83627hf_sio_data *sio)
1da177e4 135{
b72656db
JD		 136 outb(0x87, sio->sioaddr);
137 outb(0x87, sio->sioaddr);
1da177e4
LT		 138}
139
140static inline void
b72656db 141superio_exit(struct w83627hf_sio_data *sio)
1da177e4 142{
b72656db 143 outb(0xAA, sio->sioaddr);
1da177e4
LT		 144}
145
146#define W627_DEVID 0x52
147#define W627THF_DEVID 0x82
148#define W697_DEVID 0x60
149#define W637_DEVID 0x70
c2db6ce1 150#define W687THF_DEVID 0x85
1da177e4
LT		 151#define WINB_ACT_REG 0x30
152#define WINB_BASE_REG 0x60
153/* Constants specified below */
154
ada0c2f8
PV		 155/* Alignment of the base address */
156#define WINB_ALIGNMENT ~7
1da177e4 157
ada0c2f8
PV		 158/* Offset & size of I/O region we are interested in */
159#define WINB_REGION_OFFSET 5
160#define WINB_REGION_SIZE 2
161
787c72b1
JD		 162/* Where are the sensors address/data registers relative to the region offset */
163#define W83781D_ADDR_REG_OFFSET 0
164#define W83781D_DATA_REG_OFFSET 1
1da177e4
LT		 165
166/* The W83781D registers */
167/* The W83782D registers for nr=7,8 are in bank 5 */
168#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
169 (0x554 + (((nr) - 7) * 2)))
170#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
171 (0x555 + (((nr) - 7) * 2)))
172#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
173 (0x550 + (nr) - 7))
174
2ca2fcd1
JC		 175/* nr:0-2 for fans:1-3 */
176#define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr))
177#define W83627HF_REG_FAN(nr) (0x28 + (nr))
1da177e4 178
df48ed80
JC		 179#define W83627HF_REG_TEMP2_CONFIG 0x152
180#define W83627HF_REG_TEMP3_CONFIG 0x252
181/* these are zero-based, unlike config constants above */
182static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 };
183static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 };
184static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 };
1da177e4
LT		 185
186#define W83781D_REG_BANK 0x4E
187
188#define W83781D_REG_CONFIG 0x40
4a1c4447
YM		 189#define W83781D_REG_ALARM1 0x459
190#define W83781D_REG_ALARM2 0x45A
191#define W83781D_REG_ALARM3 0x45B
1da177e4 192
1da177e4
LT		 193#define W83781D_REG_BEEP_CONFIG 0x4D
194#define W83781D_REG_BEEP_INTS1 0x56
195#define W83781D_REG_BEEP_INTS2 0x57
196#define W83781D_REG_BEEP_INTS3 0x453
197
198#define W83781D_REG_VID_FANDIV 0x47
199
200#define W83781D_REG_CHIPID 0x49
201#define W83781D_REG_WCHIPID 0x58
202#define W83781D_REG_CHIPMAN 0x4F
203#define W83781D_REG_PIN 0x4B
204
205#define W83781D_REG_VBAT 0x5D
206
207#define W83627HF_REG_PWM1 0x5A
208#define W83627HF_REG_PWM2 0x5B
1da177e4 209
a95a5ed8
DG		 210static const u8 W83627THF_REG_PWM_ENABLE[] = {
211 0x04, /* FAN 1 mode */
212 0x04, /* FAN 2 mode */
213 0x12, /* FAN AUX mode */
214};
215static const u8 W83627THF_PWM_ENABLE_SHIFT[] = { 2, 4, 1 };
216
c2db6ce1
JD		 217#define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */
218#define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */
219#define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */
1da177e4 220
c2db6ce1 221#define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */
1da177e4
LT		 222
223static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
224static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
225 W83627THF_REG_PWM3 };
226#define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
07584c76 227 regpwm_627hf[nr] : regpwm[nr])
1da177e4 228
1550cb6d
COM		 229#define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */
230
231#define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */
232#define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */
233#define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */
234
235static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1,
236 W83637HF_REG_PWM_FREQ2,
237 W83637HF_REG_PWM_FREQ3 };
238
239#define W83627HF_BASE_PWM_FREQ 46870
240
1da177e4
LT		 241#define W83781D_REG_I2C_ADDR 0x48
242#define W83781D_REG_I2C_SUBADDR 0x4A
243
244/* Sensor selection */
245#define W83781D_REG_SCFG1 0x5D
246static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
247#define W83781D_REG_SCFG2 0x59
248static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
249#define W83781D_DEFAULT_BETA 3435
250
27b9de3c
GR		 251/*
252 * Conversions. Limit checking is only done on the TO_REG
253 * variants. Note that you should be a bit careful with which arguments
254 * these macros are called: arguments may be evaluated more than once.
255 * Fixing this is just not worth it.
256 */
1da177e4
LT		 257#define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
258#define IN_FROM_REG(val) ((val) * 16)
259
260static inline u8 FAN_TO_REG(long rpm, int div)
261{
262 if (rpm == 0)
263 return 255;
264 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
265 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
266 254);
267}
268
269#define TEMP_MIN (-128000)
270#define TEMP_MAX ( 127000)
271
27b9de3c
GR		 272/*
273 * TEMP: 0.001C/bit (-128C to +127C)
274 * REG: 1C/bit, two's complement
275 */
5bfedac0 276static u8 TEMP_TO_REG(long temp)
1da177e4
LT		 277{
278 int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
279 ntemp += (ntemp<0 ? -500 : 500);
280 return (u8)(ntemp / 1000);
281}
282
283static int TEMP_FROM_REG(u8 reg)
284{
285 return (s8)reg * 1000;
286}
287
288#define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
289
290#define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
291
1550cb6d
COM		 292static inline unsigned long pwm_freq_from_reg_627hf(u8 reg)
293{
294 unsigned long freq;
295 freq = W83627HF_BASE_PWM_FREQ >> reg;
296 return freq;
297}
298static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
299{
300 u8 i;
27b9de3c
GR		 301 /*
302 * Only 5 dividers (1 2 4 8 16)
303 * Search for the nearest available frequency
304 */
1550cb6d
COM		 305 for (i = 0; i < 4; i++) {
306 if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
307 (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2))
308 break;
309 }
310 return i;
311}
312
313static inline unsigned long pwm_freq_from_reg(u8 reg)
314{
315 /* Clock bit 8 -> 180 kHz or 24 MHz */
316 unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;
317
318 reg &= 0x7f;
319 /* This should not happen but anyway... */
320 if (reg == 0)
321 reg++;
7fe83ad8 322 return clock / (reg << 8);
1550cb6d
COM		 323}
324static inline u8 pwm_freq_to_reg(unsigned long val)
325{
326 /* Minimum divider value is 0x01 and maximum is 0x7F */
327 if (val >= 93750) /* The highest we can do */
328 return 0x01;
329 if (val >= 720) /* Use 24 MHz clock */
7fe83ad8 330 return 24000000UL / (val << 8);
1550cb6d
COM		 331 if (val < 6) /* The lowest we can do */
332 return 0xFF;
333 else /* Use 180 kHz clock */
7fe83ad8 334 return 0x80 | (180000UL / (val << 8));
1550cb6d
COM		 335}
336
1c138107
JD		 337#define BEEP_MASK_FROM_REG(val) ((val) & 0xff7fff)
338#define BEEP_MASK_TO_REG(val) ((val) & 0xff7fff)
1da177e4
LT		 339
340#define DIV_FROM_REG(val) (1 << (val))
341
342static inline u8 DIV_TO_REG(long val)
343{
344 int i;
345 val = SENSORS_LIMIT(val, 1, 128) >> 1;
abc01922 346 for (i = 0; i < 7; i++) {
1da177e4
LT		 347 if (val == 0)
348 break;
349 val >>= 1;
350 }
7fe83ad8 351 return (u8)i;
1da177e4
LT		 352}
353
27b9de3c
GR		 354/*
355 * For each registered chip, we need to keep some data in memory.
356 * The structure is dynamically allocated.
357 */
1da177e4 358struct w83627hf_data {
787c72b1
JD		 359 unsigned short addr;
360 const char *name;
1beeffe4 361 struct device *hwmon_dev;
9a61bf63 362 struct mutex lock;
1da177e4
LT		 363 enum chips type;
364
9a61bf63 365 struct mutex update_lock;
1da177e4
LT		 366 char valid; /* !=0 if following fields are valid */
367 unsigned long last_updated; /* In jiffies */
368
1da177e4
LT		 369 u8 in[9]; /* Register value */
370 u8 in_max[9]; /* Register value */
371 u8 in_min[9]; /* Register value */
372 u8 fan[3]; /* Register value */
373 u8 fan_min[3]; /* Register value */
df48ed80
JC		 374 u16 temp[3]; /* Register value */
375 u16 temp_max[3]; /* Register value */
376 u16 temp_max_hyst[3]; /* Register value */
1da177e4
LT		 377 u8 fan_div[3]; /* Register encoding, shifted right */
378 u8 vid; /* Register encoding, combined */
379 u32 alarms; /* Register encoding, combined */
380 u32 beep_mask; /* Register encoding, combined */
1da177e4 381 u8 pwm[3]; /* Register value */
a95a5ed8 382 u8 pwm_enable[3]; /* 1 = manual
27b9de3c
GR		 383 * 2 = thermal cruise (also called SmartFan I)
384 * 3 = fan speed cruise
385 */
1550cb6d 386 u8 pwm_freq[3]; /* Register value */
b26f9330 387 u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode;
27b9de3c
GR		 388 * 4 = thermistor
389 */
1da177e4 390 u8 vrm;
c2db6ce1 391 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
1da177e4
LT		 392};
393
1da177e4 394
787c72b1 395static int w83627hf_probe(struct platform_device *pdev);
d0546128 396static int __devexit w83627hf_remove(struct platform_device *pdev);
787c72b1
JD		 397
398static int w83627hf_read_value(struct w83627hf_data *data, u16 reg);
399static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value);
c09c5184 400static void w83627hf_update_fan_div(struct w83627hf_data *data);
1da177e4 401static struct w83627hf_data *w83627hf_update_device(struct device *dev);
787c72b1 402static void w83627hf_init_device(struct platform_device *pdev);
1da177e4 403
787c72b1 404static struct platform_driver w83627hf_driver = {
cdaf7934 405 .driver = {
87218842 406 .owner = THIS_MODULE,
d27c37c0 407 .name = DRVNAME,
cdaf7934 408 },
787c72b1 409 .probe = w83627hf_probe,
9e5e9b7a 410 .remove = w83627hf_remove,
1da177e4
LT		 411};
412
07584c76
JC		 413static ssize_t
414show_in_input(struct device *dev, struct device_attribute *devattr, char *buf)
415{
416 int nr = to_sensor_dev_attr(devattr)->index;
417 struct w83627hf_data *data = w83627hf_update_device(dev);
418 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr]));
1da177e4 419}
07584c76
JC		 420static ssize_t
421show_in_min(struct device *dev, struct device_attribute *devattr, char *buf)
422{
423 int nr = to_sensor_dev_attr(devattr)->index;
424 struct w83627hf_data *data = w83627hf_update_device(dev);
425 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr]));
426}
427static ssize_t
428show_in_max(struct device *dev, struct device_attribute *devattr, char *buf)
429{
430 int nr = to_sensor_dev_attr(devattr)->index;
431 struct w83627hf_data *data = w83627hf_update_device(dev);
432 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr]));
1da177e4 433}
07584c76
JC		 434static ssize_t
435store_in_min(struct device *dev, struct device_attribute *devattr,
436 const char *buf, size_t count)
437{
438 int nr = to_sensor_dev_attr(devattr)->index;
439 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR		 440 long val;
441 int err;
442
443 err = kstrtol(buf, 10, &val);
444 if (err)
445 return err;
1da177e4 446
07584c76
JC		 447 mutex_lock(&data->update_lock);
448 data->in_min[nr] = IN_TO_REG(val);
449 w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]);
450 mutex_unlock(&data->update_lock);
451 return count;
452}
453static ssize_t
454store_in_max(struct device *dev, struct device_attribute *devattr,
455 const char *buf, size_t count)
456{
457 int nr = to_sensor_dev_attr(devattr)->index;
458 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR		 459 long val;
460 int err;
461
462 err = kstrtol(buf, 10, &val);
463 if (err)
464 return err;
1da177e4 465
07584c76
JC		 466 mutex_lock(&data->update_lock);
467 data->in_max[nr] = IN_TO_REG(val);
468 w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]);
469 mutex_unlock(&data->update_lock);
470 return count;
471}
472#define sysfs_vin_decl(offset) \
473static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
474 show_in_input, NULL, offset); \
475static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO|S_IWUSR, \
476 show_in_min, store_in_min, offset); \
477static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO|S_IWUSR, \
478 show_in_max, store_in_max, offset);
479
480sysfs_vin_decl(1);
481sysfs_vin_decl(2);
482sysfs_vin_decl(3);
483sysfs_vin_decl(4);
484sysfs_vin_decl(5);
485sysfs_vin_decl(6);
486sysfs_vin_decl(7);
487sysfs_vin_decl(8);
1da177e4
LT		 488
489/* use a different set of functions for in0 */
490static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
491{
492 long in0;
493
494 if ((data->vrm_ovt & 0x01) &&
c2db6ce1
JD		 495 (w83627thf == data->type || w83637hf == data->type
496 || w83687thf == data->type))
1da177e4
LT		 497
498 /* use VRM9 calculation */
499 in0 = (long)((reg * 488 + 70000 + 50) / 100);
500 else
501 /* use VRM8 (standard) calculation */
502 in0 = (long)IN_FROM_REG(reg);
503
504 return sprintf(buf,"%ld\n", in0);
505}
506
a5099cfc 507static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 508{
509 struct w83627hf_data *data = w83627hf_update_device(dev);
510 return show_in_0(data, buf, data->in[0]);
511}
512
a5099cfc 513static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 514{
515 struct w83627hf_data *data = w83627hf_update_device(dev);
516 return show_in_0(data, buf, data->in_min[0]);
517}
518
a5099cfc 519static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 520{
521 struct w83627hf_data *data = w83627hf_update_device(dev);
522 return show_in_0(data, buf, data->in_max[0]);
523}
524
a5099cfc 525static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
1da177e4
LT		 526 const char *buf, size_t count)
527{
787c72b1 528 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR		 529 unsigned long val;
530 int err;
1da177e4 531
27b9de3c
GR		 532 err = kstrtoul(buf, 10, &val);
533 if (err)
534 return err;
1da177e4 535
9a61bf63 536 mutex_lock(&data->update_lock);
1da177e4
LT		 537
538 if ((data->vrm_ovt & 0x01) &&
c2db6ce1
JD		 539 (w83627thf == data->type || w83637hf == data->type
540 || w83687thf == data->type))
1da177e4
LT		 541
542 /* use VRM9 calculation */
2723ab91
YM		 543 data->in_min[0] =
544 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
545 255);
1da177e4
LT		 546 else
547 /* use VRM8 (standard) calculation */
548 data->in_min[0] = IN_TO_REG(val);
549
787c72b1 550 w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]);
9a61bf63 551 mutex_unlock(&data->update_lock);
1da177e4
LT		 552 return count;
553}
554
a5099cfc 555static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
1da177e4
LT		 556 const char *buf, size_t count)
557{
787c72b1 558 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR		 559 unsigned long val;
560 int err;
1da177e4 561
27b9de3c
GR		 562 err = kstrtoul(buf, 10, &val);
563 if (err)
564 return err;
1da177e4 565
9a61bf63 566 mutex_lock(&data->update_lock);
1da177e4
LT		 567
568 if ((data->vrm_ovt & 0x01) &&
c2db6ce1
JD		 569 (w83627thf == data->type || w83637hf == data->type
570 || w83687thf == data->type))
1da177e4
LT		 571
572 /* use VRM9 calculation */
2723ab91
YM		 573 data->in_max[0] =
574 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
575 255);
1da177e4
LT		 576 else
577 /* use VRM8 (standard) calculation */
578 data->in_max[0] = IN_TO_REG(val);
579
787c72b1 580 w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]);
9a61bf63 581 mutex_unlock(&data->update_lock);
1da177e4
LT		 582 return count;
583}
584
585static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
586static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
587 show_regs_in_min0, store_regs_in_min0);
588static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
589 show_regs_in_max0, store_regs_in_max0);
590
07584c76
JC		 591static ssize_t
592show_fan_input(struct device *dev, struct device_attribute *devattr, char *buf)
593{
594 int nr = to_sensor_dev_attr(devattr)->index;
595 struct w83627hf_data *data = w83627hf_update_device(dev);
596 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr],
597 (long)DIV_FROM_REG(data->fan_div[nr])));
598}
599static ssize_t
600show_fan_min(struct device *dev, struct device_attribute *devattr, char *buf)
601{
602 int nr = to_sensor_dev_attr(devattr)->index;
603 struct w83627hf_data *data = w83627hf_update_device(dev);
604 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr],
605 (long)DIV_FROM_REG(data->fan_div[nr])));
1da177e4 606}
1da177e4 607static ssize_t
07584c76
JC		 608store_fan_min(struct device *dev, struct device_attribute *devattr,
609 const char *buf, size_t count)
1da177e4 610{
07584c76 611 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 612 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR		 613 unsigned long val;
614 int err;
615
616 err = kstrtoul(buf, 10, &val);
617 if (err)
618 return err;
1da177e4 619
9a61bf63 620 mutex_lock(&data->update_lock);
07584c76 621 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
2ca2fcd1 622 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr),
07584c76 623 data->fan_min[nr]);
1da177e4 624
9a61bf63 625 mutex_unlock(&data->update_lock);
1da177e4
LT		 626 return count;
627}
07584c76
JC		 628#define sysfs_fan_decl(offset) \
629static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
630 show_fan_input, NULL, offset - 1); \
631static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
632 show_fan_min, store_fan_min, offset - 1);
1da177e4 633
07584c76
JC		 634sysfs_fan_decl(1);
635sysfs_fan_decl(2);
636sysfs_fan_decl(3);
1da177e4 637
07584c76
JC		 638static ssize_t
639show_temp(struct device *dev, struct device_attribute *devattr, char *buf)
640{
641 int nr = to_sensor_dev_attr(devattr)->index;
642 struct w83627hf_data *data = w83627hf_update_device(dev);
df48ed80
JC		 643
644 u16 tmp = data->temp[nr];
645 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
646 : (long) TEMP_FROM_REG(tmp));
1da177e4 647}
1da177e4 648
07584c76
JC		 649static ssize_t
650show_temp_max(struct device *dev, struct device_attribute *devattr,
651 char *buf)
652{
653 int nr = to_sensor_dev_attr(devattr)->index;
654 struct w83627hf_data *data = w83627hf_update_device(dev);
df48ed80
JC		 655
656 u16 tmp = data->temp_max[nr];
657 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
658 : (long) TEMP_FROM_REG(tmp));
1da177e4 659}
1da177e4 660
07584c76
JC		 661static ssize_t
662show_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
663 char *buf)
664{
665 int nr = to_sensor_dev_attr(devattr)->index;
666 struct w83627hf_data *data = w83627hf_update_device(dev);
df48ed80
JC		 667
668 u16 tmp = data->temp_max_hyst[nr];
669 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
670 : (long) TEMP_FROM_REG(tmp));
07584c76 671}
1da177e4 672
07584c76
JC		 673static ssize_t
674store_temp_max(struct device *dev, struct device_attribute *devattr,
675 const char *buf, size_t count)
676{
677 int nr = to_sensor_dev_attr(devattr)->index;
678 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR		 679 u16 tmp;
680 long val;
681 int err;
1da177e4 682
27b9de3c
GR		 683 err = kstrtol(buf, 10, &val);
684 if (err)
685 return err;
686
687 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
07584c76 688 mutex_lock(&data->update_lock);
df48ed80
JC		 689 data->temp_max[nr] = tmp;
690 w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp);
07584c76
JC		 691 mutex_unlock(&data->update_lock);
692 return count;
693}
694
695static ssize_t
696store_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
697 const char *buf, size_t count)
698{
699 int nr = to_sensor_dev_attr(devattr)->index;
700 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR		 701 u16 tmp;
702 long val;
703 int err;
704
705 err = kstrtol(buf, 10, &val);
706 if (err)
707 return err;
07584c76 708
27b9de3c 709 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
07584c76 710 mutex_lock(&data->update_lock);
df48ed80
JC		 711 data->temp_max_hyst[nr] = tmp;
712 w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp);
07584c76
JC		 713 mutex_unlock(&data->update_lock);
714 return count;
715}
716
717#define sysfs_temp_decl(offset) \
718static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
df48ed80 719 show_temp, NULL, offset - 1); \
07584c76 720static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO|S_IWUSR, \
df48ed80 721 show_temp_max, store_temp_max, offset - 1); \
07584c76 722static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO|S_IWUSR, \
df48ed80 723 show_temp_max_hyst, store_temp_max_hyst, offset - 1);
07584c76
JC		 724
725sysfs_temp_decl(1);
726sysfs_temp_decl(2);
727sysfs_temp_decl(3);
1da177e4 728
1da177e4 729static ssize_t
a5099cfc 730show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 731{
732 struct w83627hf_data *data = w83627hf_update_device(dev);
733 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
734}
735static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1da177e4
LT		 736
737static ssize_t
a5099cfc 738show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4 739{
90d6619a 740 struct w83627hf_data *data = dev_get_drvdata(dev);
1da177e4
LT		 741 return sprintf(buf, "%ld\n", (long) data->vrm);
742}
743static ssize_t
a5099cfc 744store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1da177e4 745{
787c72b1 746 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR		 747 unsigned long val;
748 int err;
1da177e4 749
27b9de3c
GR		 750 err = kstrtoul(buf, 10, &val);
751 if (err)
752 return err;
1da177e4
LT		 753 data->vrm = val;
754
755 return count;
756}
757static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4
LT		 758
759static ssize_t
a5099cfc 760show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT		 761{
762 struct w83627hf_data *data = w83627hf_update_device(dev);
763 return sprintf(buf, "%ld\n", (long) data->alarms);
764}
765static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
1da177e4 766
e3604c62
JD		 767static ssize_t
768show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
769{
770 struct w83627hf_data *data = w83627hf_update_device(dev);
771 int bitnr = to_sensor_dev_attr(attr)->index;
772 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
773}
774static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
775static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
776static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
777static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
778static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
779static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
780static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
781static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
782static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
783static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
784static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
785static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
786static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
787static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
788static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
789
1c138107
JD		 790static ssize_t
791show_beep_mask(struct device *dev, struct device_attribute *attr, char *buf)
792{
793 struct w83627hf_data *data = w83627hf_update_device(dev);
794 return sprintf(buf, "%ld\n",
795 (long)BEEP_MASK_FROM_REG(data->beep_mask));
1da177e4 796}
1da177e4
LT		 797
798static ssize_t
1c138107
JD		 799store_beep_mask(struct device *dev, struct device_attribute *attr,
800 const char *buf, size_t count)
1da177e4 801{
787c72b1 802 struct w83627hf_data *data = dev_get_drvdata(dev);
1c138107 803 unsigned long val;
27b9de3c 804 int err;
1da177e4 805
27b9de3c
GR		 806 err = kstrtoul(buf, 10, &val);
807 if (err)
808 return err;
1da177e4 809
9a61bf63 810 mutex_lock(&data->update_lock);
1da177e4 811
1c138107
JD		 812 /* preserve beep enable */
813 data->beep_mask = (data->beep_mask & 0x8000)
814 | BEEP_MASK_TO_REG(val);
815 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1,
816 data->beep_mask & 0xff);
817 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3,
818 ((data->beep_mask) >> 16) & 0xff);
787c72b1 819 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2,
1c138107 820 (data->beep_mask >> 8) & 0xff);
1da177e4 821
9a61bf63 822 mutex_unlock(&data->update_lock);
1da177e4
LT		 823 return count;
824}
825
1c138107
JD		 826static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
827 show_beep_mask, store_beep_mask);
1da177e4 828
e3604c62
JD		 829static ssize_t
830show_beep(struct device *dev, struct device_attribute *attr, char *buf)
831{
832 struct w83627hf_data *data = w83627hf_update_device(dev);
833 int bitnr = to_sensor_dev_attr(attr)->index;
834 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
835}
836
837static ssize_t
838store_beep(struct device *dev, struct device_attribute *attr,
839 const char *buf, size_t count)
840{
841 struct w83627hf_data *data = dev_get_drvdata(dev);
842 int bitnr = to_sensor_dev_attr(attr)->index;
e3604c62 843 u8 reg;
27b9de3c
GR		 844 unsigned long bit;
845 int err;
846
847 err = kstrtoul(buf, 10, &bit);
848 if (err)
849 return err;
e3604c62 850
e3604c62
JD		 851 if (bit & ~1)
852 return -EINVAL;
853
854 mutex_lock(&data->update_lock);
855 if (bit)
856 data->beep_mask |= (1 << bitnr);
857 else
858 data->beep_mask &= ~(1 << bitnr);
859
860 if (bitnr < 8) {
861 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS1);
862 if (bit)
863 reg |= (1 << bitnr);
864 else
865 reg &= ~(1 << bitnr);
866 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, reg);
867 } else if (bitnr < 16) {
868 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
869 if (bit)
870 reg |= (1 << (bitnr - 8));
871 else
872 reg &= ~(1 << (bitnr - 8));
873 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, reg);
874 } else {
875 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS3);
876 if (bit)
877 reg |= (1 << (bitnr - 16));
878 else
879 reg &= ~(1 << (bitnr - 16));
880 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, reg);
881 }
882 mutex_unlock(&data->update_lock);
883
884 return count;
885}
886
887static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
888 show_beep, store_beep, 0);
889static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
890 show_beep, store_beep, 1);
891static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
892 show_beep, store_beep, 2);
893static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
894 show_beep, store_beep, 3);
895static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
896 show_beep, store_beep, 8);
897static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
898 show_beep, store_beep, 9);
899static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
900 show_beep, store_beep, 10);
901static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
902 show_beep, store_beep, 16);
903static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
904 show_beep, store_beep, 17);
905static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
906 show_beep, store_beep, 6);
907static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
908 show_beep, store_beep, 7);
909static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
910 show_beep, store_beep, 11);
911static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
912 show_beep, store_beep, 4);
913static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
914 show_beep, store_beep, 5);
915static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO | S_IWUSR,
916 show_beep, store_beep, 13);
1c138107
JD		 917static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
918 show_beep, store_beep, 15);
e3604c62 919
1da177e4 920static ssize_t
07584c76 921show_fan_div(struct device *dev, struct device_attribute *devattr, char *buf)
1da177e4 922{
07584c76 923 int nr = to_sensor_dev_attr(devattr)->index;
1da177e4
LT		 924 struct w83627hf_data *data = w83627hf_update_device(dev);
925 return sprintf(buf, "%ld\n",
07584c76 926 (long) DIV_FROM_REG(data->fan_div[nr]));
1da177e4 927}
27b9de3c
GR		 928/*
929 * Note: we save and restore the fan minimum here, because its value is
930 * determined in part by the fan divisor. This follows the principle of
931 * least surprise; the user doesn't expect the fan minimum to change just
932 * because the divisor changed.
933 */
1da177e4 934static ssize_t
07584c76
JC		 935store_fan_div(struct device *dev, struct device_attribute *devattr,
936 const char *buf, size_t count)
1da177e4 937{
07584c76 938 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 939 struct w83627hf_data *data = dev_get_drvdata(dev);
1da177e4
LT		 940 unsigned long min;
941 u8 reg;
27b9de3c
GR		 942 unsigned long val;
943 int err;
944
945 err = kstrtoul(buf, 10, &val);
946 if (err)
947 return err;
1da177e4 948
9a61bf63 949 mutex_lock(&data->update_lock);
1da177e4
LT		 950
951 /* Save fan_min */
952 min = FAN_FROM_REG(data->fan_min[nr],
953 DIV_FROM_REG(data->fan_div[nr]));
954
955 data->fan_div[nr] = DIV_TO_REG(val);
956
787c72b1 957 reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
1da177e4
LT		 958 & (nr==0 ? 0xcf : 0x3f))
959 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
787c72b1 960 w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
1da177e4 961
787c72b1 962 reg = (w83627hf_read_value(data, W83781D_REG_VBAT)
1da177e4
LT		 963 & ~(1 << (5 + nr)))
964 | ((data->fan_div[nr] & 0x04) << (3 + nr));
787c72b1 965 w83627hf_write_value(data, W83781D_REG_VBAT, reg);
1da177e4
LT		 966
967 /* Restore fan_min */
968 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
2ca2fcd1 969 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]);
1da177e4 970
9a61bf63 971 mutex_unlock(&data->update_lock);
1da177e4
LT		 972 return count;
973}
974
07584c76
JC		 975static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO|S_IWUSR,
976 show_fan_div, store_fan_div, 0);
977static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO|S_IWUSR,
978 show_fan_div, store_fan_div, 1);
979static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO|S_IWUSR,
980 show_fan_div, store_fan_div, 2);
1da177e4 981
1da177e4 982static ssize_t
07584c76 983show_pwm(struct device *dev, struct device_attribute *devattr, char *buf)
1da177e4 984{
07584c76 985 int nr = to_sensor_dev_attr(devattr)->index;
1da177e4 986 struct w83627hf_data *data = w83627hf_update_device(dev);
07584c76 987 return sprintf(buf, "%ld\n", (long) data->pwm[nr]);
1da177e4
LT		 988}
989
990static ssize_t
07584c76
JC		 991store_pwm(struct device *dev, struct device_attribute *devattr,
992 const char *buf, size_t count)
1da177e4 993{
07584c76 994 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 995 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR		 996 unsigned long val;
997 int err;
998
999 err = kstrtoul(buf, 10, &val);
1000 if (err)
1001 return err;
1da177e4 1002
9a61bf63 1003 mutex_lock(&data->update_lock);
1da177e4
LT		 1004
1005 if (data->type == w83627thf) {
1006 /* bits 0-3 are reserved in 627THF */
07584c76 1007 data->pwm[nr] = PWM_TO_REG(val) & 0xf0;
787c72b1 1008 w83627hf_write_value(data,
1da177e4 1009 W836X7HF_REG_PWM(data->type, nr),
07584c76 1010 data->pwm[nr] |
787c72b1 1011 (w83627hf_read_value(data,
1da177e4
LT		 1012 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
1013 } else {
07584c76 1014 data->pwm[nr] = PWM_TO_REG(val);
787c72b1 1015 w83627hf_write_value(data,
1da177e4 1016 W836X7HF_REG_PWM(data->type, nr),
07584c76 1017 data->pwm[nr]);
1da177e4
LT		 1018 }
1019
9a61bf63 1020 mutex_unlock(&data->update_lock);
1da177e4
LT		 1021 return count;
1022}
1023
07584c76
JC		 1024static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0);
1025static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1);
1026static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2);
1da177e4 1027
a95a5ed8
DG		 1028static ssize_t
1029show_pwm_enable(struct device *dev, struct device_attribute *devattr, char *buf)
1030{
1031 int nr = to_sensor_dev_attr(devattr)->index;
1032 struct w83627hf_data *data = w83627hf_update_device(dev);
1033 return sprintf(buf, "%d\n", data->pwm_enable[nr]);
1034}
1035
1036static ssize_t
1037store_pwm_enable(struct device *dev, struct device_attribute *devattr,
1038 const char *buf, size_t count)
1039{
1040 int nr = to_sensor_dev_attr(devattr)->index;
1041 struct w83627hf_data *data = dev_get_drvdata(dev);
a95a5ed8 1042 u8 reg;
27b9de3c
GR		 1043 unsigned long val;
1044 int err;
a95a5ed8 1045
27b9de3c
GR		 1046 err = kstrtoul(buf, 10, &val);
1047 if (err)
1048 return err;
1049
1050 if (!val || val > 3) /* modes 1, 2 and 3 are supported */
a95a5ed8
DG		 1051 return -EINVAL;
1052 mutex_lock(&data->update_lock);
1053 data->pwm_enable[nr] = val;
1054 reg = w83627hf_read_value(data, W83627THF_REG_PWM_ENABLE[nr]);
1055 reg &= ~(0x03 << W83627THF_PWM_ENABLE_SHIFT[nr]);
1056 reg |= (val - 1) << W83627THF_PWM_ENABLE_SHIFT[nr];
1057 w83627hf_write_value(data, W83627THF_REG_PWM_ENABLE[nr], reg);
1058 mutex_unlock(&data->update_lock);
1059 return count;
1060}
1061
1062static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1063 store_pwm_enable, 0);
1064static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1065 store_pwm_enable, 1);
1066static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1067 store_pwm_enable, 2);
1068
1550cb6d 1069static ssize_t
07584c76 1070show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf)
1550cb6d 1071{
07584c76 1072 int nr = to_sensor_dev_attr(devattr)->index;
1550cb6d
COM		 1073 struct w83627hf_data *data = w83627hf_update_device(dev);
1074 if (data->type == w83627hf)
1075 return sprintf(buf, "%ld\n",
07584c76 1076 pwm_freq_from_reg_627hf(data->pwm_freq[nr]));
1550cb6d
COM		 1077 else
1078 return sprintf(buf, "%ld\n",
07584c76 1079 pwm_freq_from_reg(data->pwm_freq[nr]));
1550cb6d
COM		 1080}
1081
1082static ssize_t
07584c76
JC		 1083store_pwm_freq(struct device *dev, struct device_attribute *devattr,
1084 const char *buf, size_t count)
1550cb6d 1085{
07584c76 1086 int nr = to_sensor_dev_attr(devattr)->index;
1550cb6d
COM		 1087 struct w83627hf_data *data = dev_get_drvdata(dev);
1088 static const u8 mask[]={0xF8, 0x8F};
27b9de3c
GR		 1089 unsigned long val;
1090 int err;
1550cb6d 1091
27b9de3c
GR		 1092 err = kstrtoul(buf, 10, &val);
1093 if (err)
1094 return err;
1550cb6d
COM		 1095
1096 mutex_lock(&data->update_lock);
1097
1098 if (data->type == w83627hf) {
07584c76 1099 data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val);
1550cb6d 1100 w83627hf_write_value(data, W83627HF_REG_PWM_FREQ,
07584c76 1101 (data->pwm_freq[nr] << (nr*4)) |
1550cb6d 1102 (w83627hf_read_value(data,
07584c76 1103 W83627HF_REG_PWM_FREQ) & mask[nr]));
1550cb6d 1104 } else {
07584c76
JC		 1105 data->pwm_freq[nr] = pwm_freq_to_reg(val);
1106 w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr],
1107 data->pwm_freq[nr]);
1550cb6d
COM		 1108 }
1109
1110 mutex_unlock(&data->update_lock);
1111 return count;
1112}
1113
07584c76
JC		 1114static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO|S_IWUSR,
1115 show_pwm_freq, store_pwm_freq, 0);
1116static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO|S_IWUSR,
1117 show_pwm_freq, store_pwm_freq, 1);
1118static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO|S_IWUSR,
1119 show_pwm_freq, store_pwm_freq, 2);
1550cb6d 1120
1da177e4 1121static ssize_t
07584c76
JC		 1122show_temp_type(struct device *dev, struct device_attribute *devattr,
1123 char *buf)
1da177e4 1124{
07584c76 1125 int nr = to_sensor_dev_attr(devattr)->index;
1da177e4 1126 struct w83627hf_data *data = w83627hf_update_device(dev);
07584c76 1127 return sprintf(buf, "%ld\n", (long) data->sens[nr]);
1da177e4
LT		 1128}
1129
1130static ssize_t
07584c76
JC		 1131store_temp_type(struct device *dev, struct device_attribute *devattr,
1132 const char *buf, size_t count)
1da177e4 1133{
07584c76 1134 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 1135 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR		 1136 unsigned long val;
1137 u32 tmp;
1138 int err;
1da177e4 1139
27b9de3c
GR		 1140 err = kstrtoul(buf, 10, &val);
1141 if (err)
1142 return err;
1da177e4 1143
9a61bf63 1144 mutex_lock(&data->update_lock);
1da177e4
LT		 1145
1146 switch (val) {
1147 case 1: /* PII/Celeron diode */
787c72b1
JD		 1148 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1149 w83627hf_write_value(data, W83781D_REG_SCFG1,
07584c76 1150 tmp | BIT_SCFG1[nr]);
787c72b1
JD		 1151 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1152 w83627hf_write_value(data, W83781D_REG_SCFG2,
07584c76
JC		 1153 tmp | BIT_SCFG2[nr]);
1154 data->sens[nr] = val;
1da177e4
LT		 1155 break;
1156 case 2: /* 3904 */
787c72b1
JD		 1157 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1158 w83627hf_write_value(data, W83781D_REG_SCFG1,
07584c76 1159 tmp | BIT_SCFG1[nr]);
787c72b1
JD		 1160 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1161 w83627hf_write_value(data, W83781D_REG_SCFG2,
07584c76
JC		 1162 tmp & ~BIT_SCFG2[nr]);
1163 data->sens[nr] = val;
1da177e4 1164 break;
b26f9330
JD		 1165 case W83781D_DEFAULT_BETA:
1166 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
1167 "instead\n", W83781D_DEFAULT_BETA);
1168 /* fall through */
1169 case 4: /* thermistor */
787c72b1
JD		 1170 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1171 w83627hf_write_value(data, W83781D_REG_SCFG1,
07584c76
JC		 1172 tmp & ~BIT_SCFG1[nr]);
1173 data->sens[nr] = val;
1da177e4
LT		 1174 break;
1175 default:
787c72b1 1176 dev_err(dev,
b26f9330
JD		 1177 "Invalid sensor type %ld; must be 1, 2, or 4\n",
1178 (long) val);
1da177e4
LT		 1179 break;
1180 }
1181
9a61bf63 1182 mutex_unlock(&data->update_lock);
1da177e4
LT		 1183 return count;
1184}
1185
07584c76
JC		 1186#define sysfs_temp_type(offset) \
1187static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
1188 show_temp_type, store_temp_type, offset - 1);
1da177e4 1189
07584c76
JC		 1190sysfs_temp_type(1);
1191sysfs_temp_type(2);
1192sysfs_temp_type(3);
1da177e4 1193
07584c76
JC		 1194static ssize_t
1195show_name(struct device *dev, struct device_attribute *devattr, char *buf)
787c72b1
JD		 1196{
1197 struct w83627hf_data *data = dev_get_drvdata(dev);
1198
1199 return sprintf(buf, "%s\n", data->name);
1200}
1201static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1202
1203static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1204 struct w83627hf_sio_data *sio_data)
1da177e4 1205{
d27c37c0 1206 int err = -ENODEV;
1da177e4
LT		 1207 u16 val;
1208
64f50307 1209 static __initconst char *const names[] = {
787c72b1
JD		 1210 "W83627HF",
1211 "W83627THF",
1212 "W83697HF",
1213 "W83637HF",
1214 "W83687THF",
1215 };
1216
c46c0e91 1217 sio_data->sioaddr = sioaddr;
b72656db
JD		 1218 superio_enter(sio_data);
1219 val = force_id ? force_id : superio_inb(sio_data, DEVID);
787c72b1
JD		 1220 switch (val) {
1221 case W627_DEVID:
1222 sio_data->type = w83627hf;
1223 break;
1224 case W627THF_DEVID:
1225 sio_data->type = w83627thf;
1226 break;
1227 case W697_DEVID:
1228 sio_data->type = w83697hf;
1229 break;
1230 case W637_DEVID:
1231 sio_data->type = w83637hf;
1232 break;
1233 case W687THF_DEVID:
1234 sio_data->type = w83687thf;
1235 break;
e142e2a3
JD		 1236 case 0xff: /* No device at all */
1237 goto exit;
787c72b1 1238 default:
e142e2a3 1239 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val);
d27c37c0 1240 goto exit;
1da177e4
LT		 1241 }
1242
b72656db
JD		 1243 superio_select(sio_data, W83627HF_LD_HWM);
1244 val = (superio_inb(sio_data, WINB_BASE_REG) << 8) |
1245 superio_inb(sio_data, WINB_BASE_REG + 1);
ada0c2f8 1246 *addr = val & WINB_ALIGNMENT;
d27c37c0 1247 if (*addr == 0) {
18de030f 1248 pr_warn("Base address not set, skipping\n");
d27c37c0 1249 goto exit;
1da177e4 1250 }
1da177e4 1251
b72656db 1252 val = superio_inb(sio_data, WINB_ACT_REG);
d27c37c0 1253 if (!(val & 0x01)) {
18de030f 1254 pr_warn("Enabling HWM logical device\n");
b72656db 1255 superio_outb(sio_data, WINB_ACT_REG, val | 0x01);
d27c37c0
JD		 1256 }
1257
1258 err = 0;
787c72b1
JD		 1259 pr_info(DRVNAME ": Found %s chip at %#x\n",
1260 names[sio_data->type], *addr);
d27c37c0
JD		 1261
1262 exit:
b72656db 1263 superio_exit(sio_data);
d27c37c0 1264 return err;
1da177e4
LT		 1265}
1266
07584c76
JC		 1267#define VIN_UNIT_ATTRS(_X_) \
1268 &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \
1269 &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \
e3604c62
JD		 1270 &sensor_dev_attr_in##_X_##_max.dev_attr.attr, \
1271 &sensor_dev_attr_in##_X_##_alarm.dev_attr.attr, \
1272 &sensor_dev_attr_in##_X_##_beep.dev_attr.attr
07584c76
JC		 1273
1274#define FAN_UNIT_ATTRS(_X_) \
1275 &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \
1276 &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \
e3604c62
JD		 1277 &sensor_dev_attr_fan##_X_##_div.dev_attr.attr, \
1278 &sensor_dev_attr_fan##_X_##_alarm.dev_attr.attr, \
1279 &sensor_dev_attr_fan##_X_##_beep.dev_attr.attr
07584c76
JC		 1280
1281#define TEMP_UNIT_ATTRS(_X_) \
1282 &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \
1283 &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \
1284 &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \
e3604c62
JD		 1285 &sensor_dev_attr_temp##_X_##_type.dev_attr.attr, \
1286 &sensor_dev_attr_temp##_X_##_alarm.dev_attr.attr, \
1287 &sensor_dev_attr_temp##_X_##_beep.dev_attr.attr
07584c76 1288
c1685f61
MH		 1289static struct attribute *w83627hf_attributes[] = {
1290 &dev_attr_in0_input.attr,
1291 &dev_attr_in0_min.attr,
1292 &dev_attr_in0_max.attr,
e3604c62
JD		 1293 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1294 &sensor_dev_attr_in0_beep.dev_attr.attr,
07584c76
JC		 1295 VIN_UNIT_ATTRS(2),
1296 VIN_UNIT_ATTRS(3),
1297 VIN_UNIT_ATTRS(4),
1298 VIN_UNIT_ATTRS(7),
1299 VIN_UNIT_ATTRS(8),
1300
1301 FAN_UNIT_ATTRS(1),
1302 FAN_UNIT_ATTRS(2),
1303
1304 TEMP_UNIT_ATTRS(1),
1305 TEMP_UNIT_ATTRS(2),
c1685f61
MH		 1306
1307 &dev_attr_alarms.attr,
1c138107 1308 &sensor_dev_attr_beep_enable.dev_attr.attr,
c1685f61
MH		 1309 &dev_attr_beep_mask.attr,
1310
07584c76
JC		 1311 &sensor_dev_attr_pwm1.dev_attr.attr,
1312 &sensor_dev_attr_pwm2.dev_attr.attr,
787c72b1 1313 &dev_attr_name.attr,
c1685f61
MH		 1314 NULL
1315};
1316
1317static const struct attribute_group w83627hf_group = {
1318 .attrs = w83627hf_attributes,
1319};
1320
1321static struct attribute *w83627hf_attributes_opt[] = {
07584c76
JC		 1322 VIN_UNIT_ATTRS(1),
1323 VIN_UNIT_ATTRS(5),
1324 VIN_UNIT_ATTRS(6),
1325
1326 FAN_UNIT_ATTRS(3),
1327 TEMP_UNIT_ATTRS(3),
1328 &sensor_dev_attr_pwm3.dev_attr.attr,
1329
1330 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1331 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1332 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
a95a5ed8
DG		 1333
1334 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1335 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1336 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1337
c1685f61
MH		 1338 NULL
1339};
1340
1341static const struct attribute_group w83627hf_group_opt = {
1342 .attrs = w83627hf_attributes_opt,
1343};
1344
6c931ae1 1345static int w83627hf_probe(struct platform_device *pdev)
1da177e4 1346{
787c72b1
JD		 1347 struct device *dev = &pdev->dev;
1348 struct w83627hf_sio_data *sio_data = dev->platform_data;
1da177e4 1349 struct w83627hf_data *data;
787c72b1 1350 struct resource *res;
2ca2fcd1 1351 int err, i;
1da177e4 1352
787c72b1
JD		 1353 static const char *names[] = {
1354 "w83627hf",
1355 "w83627thf",
1356 "w83697hf",
1357 "w83637hf",
1358 "w83687thf",
1359 };
1360
1361 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
0cf46997 1362 if (!devm_request_region(dev, res->start, WINB_REGION_SIZE, DRVNAME)) {
787c72b1
JD		 1363 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1364 (unsigned long)res->start,
1365 (unsigned long)(res->start + WINB_REGION_SIZE - 1));
0cf46997 1366 return -EBUSY;
1da177e4
LT		 1367 }
1368
0cf46997
GR		 1369 data = devm_kzalloc(dev, sizeof(struct w83627hf_data), GFP_KERNEL);
1370 if (!data)
1371 return -ENOMEM;
1372
787c72b1
JD		 1373 data->addr = res->start;
1374 data->type = sio_data->type;
1375 data->name = names[sio_data->type];
9a61bf63 1376 mutex_init(&data->lock);
9a61bf63 1377 mutex_init(&data->update_lock);
787c72b1 1378 platform_set_drvdata(pdev, data);
1da177e4 1379
1da177e4 1380 /* Initialize the chip */
787c72b1 1381 w83627hf_init_device(pdev);
1da177e4
LT		 1382
1383 /* A few vars need to be filled upon startup */
2ca2fcd1
JC		 1384 for (i = 0; i <= 2; i++)
1385 data->fan_min[i] = w83627hf_read_value(
1386 data, W83627HF_REG_FAN_MIN(i));
c09c5184 1387 w83627hf_update_fan_div(data);
1da177e4 1388
c1685f61 1389 /* Register common device attributes */
27b9de3c
GR		 1390 err = sysfs_create_group(&dev->kobj, &w83627hf_group);
1391 if (err)
0cf46997 1392 return err;
1da177e4 1393
c1685f61 1394 /* Register chip-specific device attributes */
787c72b1 1395 if (data->type == w83627hf || data->type == w83697hf)
07584c76
JC		 1396 if ((err = device_create_file(dev,
1397 &sensor_dev_attr_in5_input.dev_attr))
1398 || (err = device_create_file(dev,
1399 &sensor_dev_attr_in5_min.dev_attr))
1400 || (err = device_create_file(dev,
1401 &sensor_dev_attr_in5_max.dev_attr))
e3604c62
JD		 1402 || (err = device_create_file(dev,
1403 &sensor_dev_attr_in5_alarm.dev_attr))
1404 || (err = device_create_file(dev,
1405 &sensor_dev_attr_in5_beep.dev_attr))
07584c76
JC		 1406 || (err = device_create_file(dev,
1407 &sensor_dev_attr_in6_input.dev_attr))
1408 || (err = device_create_file(dev,
1409 &sensor_dev_attr_in6_min.dev_attr))
1410 || (err = device_create_file(dev,
1411 &sensor_dev_attr_in6_max.dev_attr))
e3604c62
JD		 1412 || (err = device_create_file(dev,
1413 &sensor_dev_attr_in6_alarm.dev_attr))
1414 || (err = device_create_file(dev,
1415 &sensor_dev_attr_in6_beep.dev_attr))
07584c76
JC		 1416 || (err = device_create_file(dev,
1417 &sensor_dev_attr_pwm1_freq.dev_attr))
1418 || (err = device_create_file(dev,
1419 &sensor_dev_attr_pwm2_freq.dev_attr)))
0cf46997 1420 goto error;
1da177e4 1421
787c72b1 1422 if (data->type != w83697hf)
07584c76
JC		 1423 if ((err = device_create_file(dev,
1424 &sensor_dev_attr_in1_input.dev_attr))
1425 || (err = device_create_file(dev,
1426 &sensor_dev_attr_in1_min.dev_attr))
1427 || (err = device_create_file(dev,
1428 &sensor_dev_attr_in1_max.dev_attr))
e3604c62
JD		 1429 || (err = device_create_file(dev,
1430 &sensor_dev_attr_in1_alarm.dev_attr))
1431 || (err = device_create_file(dev,
1432 &sensor_dev_attr_in1_beep.dev_attr))
07584c76
JC		 1433 || (err = device_create_file(dev,
1434 &sensor_dev_attr_fan3_input.dev_attr))
1435 || (err = device_create_file(dev,
1436 &sensor_dev_attr_fan3_min.dev_attr))
1437 || (err = device_create_file(dev,
1438 &sensor_dev_attr_fan3_div.dev_attr))
e3604c62
JD		 1439 || (err = device_create_file(dev,
1440 &sensor_dev_attr_fan3_alarm.dev_attr))
1441 || (err = device_create_file(dev,
1442 &sensor_dev_attr_fan3_beep.dev_attr))
07584c76
JC		 1443 || (err = device_create_file(dev,
1444 &sensor_dev_attr_temp3_input.dev_attr))
1445 || (err = device_create_file(dev,
1446 &sensor_dev_attr_temp3_max.dev_attr))
1447 || (err = device_create_file(dev,
1448 &sensor_dev_attr_temp3_max_hyst.dev_attr))
e3604c62
JD		 1449 || (err = device_create_file(dev,
1450 &sensor_dev_attr_temp3_alarm.dev_attr))
1451 || (err = device_create_file(dev,
1452 &sensor_dev_attr_temp3_beep.dev_attr))
07584c76
JC		 1453 || (err = device_create_file(dev,
1454 &sensor_dev_attr_temp3_type.dev_attr)))
0cf46997 1455 goto error;
c1685f61 1456
787c72b1 1457 if (data->type != w83697hf && data->vid != 0xff) {
8a665a05
JD		 1458 /* Convert VID to voltage based on VRM */
1459 data->vrm = vid_which_vrm();
1460
787c72b1
JD		 1461 if ((err = device_create_file(dev, &dev_attr_cpu0_vid))
1462 || (err = device_create_file(dev, &dev_attr_vrm)))
0cf46997 1463 goto error;
8a665a05 1464 }
1da177e4 1465
787c72b1 1466 if (data->type == w83627thf || data->type == w83637hf
27b9de3c
GR		 1467 || data->type == w83687thf) {
1468 err = device_create_file(dev, &sensor_dev_attr_pwm3.dev_attr);
1469 if (err)
0cf46997 1470 goto error;
27b9de3c 1471 }
1da177e4 1472
1550cb6d 1473 if (data->type == w83637hf || data->type == w83687thf)
07584c76
JC		 1474 if ((err = device_create_file(dev,
1475 &sensor_dev_attr_pwm1_freq.dev_attr))
1476 || (err = device_create_file(dev,
1477 &sensor_dev_attr_pwm2_freq.dev_attr))
1478 || (err = device_create_file(dev,
1479 &sensor_dev_attr_pwm3_freq.dev_attr)))
0cf46997 1480 goto error;
1550cb6d 1481
a95a5ed8
DG		 1482 if (data->type != w83627hf)
1483 if ((err = device_create_file(dev,
1484 &sensor_dev_attr_pwm1_enable.dev_attr))
1485 || (err = device_create_file(dev,
1486 &sensor_dev_attr_pwm2_enable.dev_attr)))
0cf46997 1487 goto error;
a95a5ed8
DG		 1488
1489 if (data->type == w83627thf || data->type == w83637hf
27b9de3c
GR		 1490 || data->type == w83687thf) {
1491 err = device_create_file(dev,
1492 &sensor_dev_attr_pwm3_enable.dev_attr);
1493 if (err)
0cf46997 1494 goto error;
27b9de3c 1495 }
a95a5ed8 1496
1beeffe4
TJ		 1497 data->hwmon_dev = hwmon_device_register(dev);
1498 if (IS_ERR(data->hwmon_dev)) {
1499 err = PTR_ERR(data->hwmon_dev);
0cf46997 1500 goto error;
c1685f61 1501 }
1da177e4
LT		 1502
1503 return 0;
1504
0cf46997 1505 error:
787c72b1
JD		 1506 sysfs_remove_group(&dev->kobj, &w83627hf_group);
1507 sysfs_remove_group(&dev->kobj, &w83627hf_group_opt);
1da177e4
LT		 1508 return err;
1509}
1510
787c72b1 1511static int __devexit w83627hf_remove(struct platform_device *pdev)
1da177e4 1512{
787c72b1 1513 struct w83627hf_data *data = platform_get_drvdata(pdev);
1da177e4 1514
1beeffe4 1515 hwmon_device_unregister(data->hwmon_dev);
943b0830 1516
787c72b1
JD		 1517 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group);
1518 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt);
787c72b1 1519
1da177e4
LT		 1520 return 0;
1521}
1522
1523
d58df9cd
JD		 1524/* Registers 0x50-0x5f are banked */
1525static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg)
1526{
1527 if ((reg & 0x00f0) == 0x50) {
1528 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1529 outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET);
1530 }
1531}
1532
1533/* Not strictly necessary, but play it safe for now */
1534static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg)
1535{
1536 if (reg & 0xff00) {
1537 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1538 outb_p(0, data->addr + W83781D_DATA_REG_OFFSET);
1539 }
1540}
1541
787c72b1 1542static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
1da177e4 1543{
1da177e4
LT		 1544 int res, word_sized;
1545
9a61bf63 1546 mutex_lock(&data->lock);
1da177e4
LT		 1547 word_sized = (((reg & 0xff00) == 0x100)
1548 || ((reg & 0xff00) == 0x200))
1549 && (((reg & 0x00ff) == 0x50)
1550 || ((reg & 0x00ff) == 0x53)
1551 || ((reg & 0x00ff) == 0x55));
d58df9cd 1552 w83627hf_set_bank(data, reg);
787c72b1
JD		 1553 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1554 res = inb_p(data->addr + W83781D_DATA_REG_OFFSET);
1da177e4
LT		 1555 if (word_sized) {
1556 outb_p((reg & 0xff) + 1,
787c72b1 1557 data->addr + W83781D_ADDR_REG_OFFSET);
1da177e4 1558 res =
787c72b1 1559 (res << 8) + inb_p(data->addr +
1da177e4
LT		 1560 W83781D_DATA_REG_OFFSET);
1561 }
d58df9cd 1562 w83627hf_reset_bank(data, reg);
9a61bf63 1563 mutex_unlock(&data->lock);
1da177e4
LT		 1564 return res;
1565}
1566
6c931ae1 1567static int w83627thf_read_gpio5(struct platform_device *pdev)
1da177e4 1568{
b72656db 1569 struct w83627hf_sio_data *sio_data = pdev->dev.platform_data;
1da177e4
LT		 1570 int res = 0xff, sel;
1571
b72656db
JD		 1572 superio_enter(sio_data);
1573 superio_select(sio_data, W83627HF_LD_GPIO5);
1da177e4
LT		 1574
1575 /* Make sure these GPIO pins are enabled */
b72656db 1576 if (!(superio_inb(sio_data, W83627THF_GPIO5_EN) & (1<<3))) {
787c72b1 1577 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
1da177e4
LT		 1578 goto exit;
1579 }
1580
27b9de3c
GR		 1581 /*
1582 * Make sure the pins are configured for input
1583 * There must be at least five (VRM 9), and possibly 6 (VRM 10)
1584 */
b72656db 1585 sel = superio_inb(sio_data, W83627THF_GPIO5_IOSR) & 0x3f;
1da177e4 1586 if ((sel & 0x1f) != 0x1f) {
787c72b1 1587 dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
1da177e4
LT		 1588 "function\n");
1589 goto exit;
1590 }
1591
787c72b1 1592 dev_info(&pdev->dev, "Reading VID from GPIO5\n");
b72656db 1593 res = superio_inb(sio_data, W83627THF_GPIO5_DR) & sel;
1da177e4
LT		 1594
1595exit:
b72656db 1596 superio_exit(sio_data);
1da177e4
LT		 1597 return res;
1598}
1599
6c931ae1 1600static int w83687thf_read_vid(struct platform_device *pdev)
c2db6ce1 1601{
b72656db 1602 struct w83627hf_sio_data *sio_data = pdev->dev.platform_data;
c2db6ce1
JD		 1603 int res = 0xff;
1604
b72656db
JD		 1605 superio_enter(sio_data);
1606 superio_select(sio_data, W83627HF_LD_HWM);
c2db6ce1
JD		 1607
1608 /* Make sure these GPIO pins are enabled */
b72656db 1609 if (!(superio_inb(sio_data, W83687THF_VID_EN) & (1 << 2))) {
787c72b1 1610 dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
c2db6ce1
JD		 1611 goto exit;
1612 }
1613
1614 /* Make sure the pins are configured for input */
b72656db 1615 if (!(superio_inb(sio_data, W83687THF_VID_CFG) & (1 << 4))) {
787c72b1 1616 dev_dbg(&pdev->dev, "VID configured as output, "
c2db6ce1
JD		 1617 "no VID function\n");
1618 goto exit;
1619 }
1620
b72656db 1621 res = superio_inb(sio_data, W83687THF_VID_DATA) & 0x3f;
c2db6ce1
JD		 1622
1623exit:
b72656db 1624 superio_exit(sio_data);
c2db6ce1
JD		 1625 return res;
1626}
1627
787c72b1 1628static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value)
1da177e4 1629{
1da177e4
LT		 1630 int word_sized;
1631
9a61bf63 1632 mutex_lock(&data->lock);
1da177e4
LT		 1633 word_sized = (((reg & 0xff00) == 0x100)
1634 || ((reg & 0xff00) == 0x200))
1635 && (((reg & 0x00ff) == 0x53)
1636 || ((reg & 0x00ff) == 0x55));
d58df9cd 1637 w83627hf_set_bank(data, reg);
787c72b1 1638 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1da177e4
LT		 1639 if (word_sized) {
1640 outb_p(value >> 8,
787c72b1 1641 data->addr + W83781D_DATA_REG_OFFSET);
1da177e4 1642 outb_p((reg & 0xff) + 1,
787c72b1 1643 data->addr + W83781D_ADDR_REG_OFFSET);
1da177e4
LT		 1644 }
1645 outb_p(value & 0xff,
787c72b1 1646 data->addr + W83781D_DATA_REG_OFFSET);
d58df9cd 1647 w83627hf_reset_bank(data, reg);
9a61bf63 1648 mutex_unlock(&data->lock);
1da177e4
LT		 1649 return 0;
1650}
1651
6c931ae1 1652static void w83627hf_init_device(struct platform_device *pdev)
1da177e4 1653{
787c72b1 1654 struct w83627hf_data *data = platform_get_drvdata(pdev);
1da177e4 1655 int i;
d27c37c0 1656 enum chips type = data->type;
1da177e4
LT		 1657 u8 tmp;
1658
1da177e4
LT		 1659 /* Minimize conflicts with other winbond i2c-only clients... */
1660 /* disable i2c subclients... how to disable main i2c client?? */
1661 /* force i2c address to relatively uncommon address */
787c72b1
JD		 1662 w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
1663 w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
1da177e4
LT		 1664
1665 /* Read VID only once */
d27c37c0 1666 if (type == w83627hf || type == w83637hf) {
787c72b1
JD		 1667 int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1668 int hi = w83627hf_read_value(data, W83781D_REG_CHIPID);
1da177e4 1669 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
d27c37c0 1670 } else if (type == w83627thf) {
787c72b1 1671 data->vid = w83627thf_read_gpio5(pdev);
d27c37c0 1672 } else if (type == w83687thf) {
787c72b1 1673 data->vid = w83687thf_read_vid(pdev);
1da177e4
LT		 1674 }
1675
1676 /* Read VRM & OVT Config only once */
d27c37c0 1677 if (type == w83627thf || type == w83637hf || type == w83687thf) {
1da177e4 1678 data->vrm_ovt =
787c72b1 1679 w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG);
1da177e4
LT		 1680 }
1681
787c72b1 1682 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1da177e4
LT		 1683 for (i = 1; i <= 3; i++) {
1684 if (!(tmp & BIT_SCFG1[i - 1])) {
b26f9330 1685 data->sens[i - 1] = 4;
1da177e4
LT		 1686 } else {
1687 if (w83627hf_read_value
787c72b1 1688 (data,
1da177e4
LT		 1689 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1690 data->sens[i - 1] = 1;
1691 else
1692 data->sens[i - 1] = 2;
1693 }
1694 if ((type == w83697hf) && (i == 2))
1695 break;
1696 }
1697
1698 if(init) {
1699 /* Enable temp2 */
df48ed80 1700 tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG);
1da177e4 1701 if (tmp & 0x01) {
787c72b1 1702 dev_warn(&pdev->dev, "Enabling temp2, readings "
1da177e4 1703 "might not make sense\n");
df48ed80 1704 w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG,
1da177e4
LT		 1705 tmp & 0xfe);
1706 }
1707
1708 /* Enable temp3 */
1709 if (type != w83697hf) {
787c72b1 1710 tmp = w83627hf_read_value(data,
df48ed80 1711 W83627HF_REG_TEMP3_CONFIG);
1da177e4 1712 if (tmp & 0x01) {
787c72b1 1713 dev_warn(&pdev->dev, "Enabling temp3, "
1da177e4 1714 "readings might not make sense\n");
787c72b1 1715 w83627hf_write_value(data,
df48ed80 1716 W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe);
1da177e4
LT		 1717 }
1718 }
1da177e4
LT		 1719 }
1720
1721 /* Start monitoring */
787c72b1
JD		 1722 w83627hf_write_value(data, W83781D_REG_CONFIG,
1723 (w83627hf_read_value(data,
1da177e4
LT		 1724 W83781D_REG_CONFIG) & 0xf7)
1725 | 0x01);
ef878b11
JD		 1726
1727 /* Enable VBAT monitoring if needed */
1728 tmp = w83627hf_read_value(data, W83781D_REG_VBAT);
1729 if (!(tmp & 0x01))
1730 w83627hf_write_value(data, W83781D_REG_VBAT, tmp | 0x01);
1da177e4
LT		 1731}
1732
c09c5184
JD		 1733static void w83627hf_update_fan_div(struct w83627hf_data *data)
1734{
1735 int reg;
1736
1737 reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1738 data->fan_div[0] = (reg >> 4) & 0x03;
1739 data->fan_div[1] = (reg >> 6) & 0x03;
1740 if (data->type != w83697hf) {
1741 data->fan_div[2] = (w83627hf_read_value(data,
1742 W83781D_REG_PIN) >> 6) & 0x03;
1743 }
1744 reg = w83627hf_read_value(data, W83781D_REG_VBAT);
1745 data->fan_div[0] |= (reg >> 3) & 0x04;
1746 data->fan_div[1] |= (reg >> 4) & 0x04;
1747 if (data->type != w83697hf)
1748 data->fan_div[2] |= (reg >> 5) & 0x04;
1749}
1750
1da177e4
LT		 1751static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1752{
787c72b1 1753 struct w83627hf_data *data = dev_get_drvdata(dev);
df48ed80 1754 int i, num_temps = (data->type == w83697hf) ? 2 : 3;
a95a5ed8 1755 int num_pwms = (data->type == w83697hf) ? 2 : 3;
1da177e4 1756
9a61bf63 1757 mutex_lock(&data->update_lock);
1da177e4
LT		 1758
1759 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1760 || !data->valid) {
1761 for (i = 0; i <= 8; i++) {
1762 /* skip missing sensors */
1763 if (((data->type == w83697hf) && (i == 1)) ||
c2db6ce1 1764 ((data->type != w83627hf && data->type != w83697hf)
4a1c4447 1765 && (i == 5 || i == 6)))
1da177e4
LT		 1766 continue;
1767 data->in[i] =
787c72b1 1768 w83627hf_read_value(data, W83781D_REG_IN(i));
1da177e4 1769 data->in_min[i] =
787c72b1 1770 w83627hf_read_value(data,
1da177e4
LT		 1771 W83781D_REG_IN_MIN(i));
1772 data->in_max[i] =
787c72b1 1773 w83627hf_read_value(data,
1da177e4
LT		 1774 W83781D_REG_IN_MAX(i));
1775 }
2ca2fcd1
JC		 1776 for (i = 0; i <= 2; i++) {
1777 data->fan[i] =
1778 w83627hf_read_value(data, W83627HF_REG_FAN(i));
1779 data->fan_min[i] =
787c72b1 1780 w83627hf_read_value(data,
2ca2fcd1 1781 W83627HF_REG_FAN_MIN(i));
1da177e4 1782 }
07584c76 1783 for (i = 0; i <= 2; i++) {
787c72b1 1784 u8 tmp = w83627hf_read_value(data,
1da177e4
LT		 1785 W836X7HF_REG_PWM(data->type, i));
1786 /* bits 0-3 are reserved in 627THF */
1787 if (data->type == w83627thf)
1788 tmp &= 0xf0;
07584c76
JC		 1789 data->pwm[i] = tmp;
1790 if (i == 1 &&
1791 (data->type == w83627hf || data->type == w83697hf))
1da177e4
LT		 1792 break;
1793 }
1550cb6d
COM		 1794 if (data->type == w83627hf) {
1795 u8 tmp = w83627hf_read_value(data,
1796 W83627HF_REG_PWM_FREQ);
1797 data->pwm_freq[0] = tmp & 0x07;
1798 data->pwm_freq[1] = (tmp >> 4) & 0x07;
1799 } else if (data->type != w83627thf) {
1800 for (i = 1; i <= 3; i++) {
1801 data->pwm_freq[i - 1] =
1802 w83627hf_read_value(data,
1803 W83637HF_REG_PWM_FREQ[i - 1]);
1804 if (i == 2 && (data->type == w83697hf))
1805 break;
1806 }
1807 }
a95a5ed8
DG		 1808 if (data->type != w83627hf) {
1809 for (i = 0; i < num_pwms; i++) {
1810 u8 tmp = w83627hf_read_value(data,
1811 W83627THF_REG_PWM_ENABLE[i]);
1812 data->pwm_enable[i] =
1813 ((tmp >> W83627THF_PWM_ENABLE_SHIFT[i])
1814 & 0x03) + 1;
1815 }
1816 }
df48ed80
JC		 1817 for (i = 0; i < num_temps; i++) {
1818 data->temp[i] = w83627hf_read_value(
1819 data, w83627hf_reg_temp[i]);
1820 data->temp_max[i] = w83627hf_read_value(
1821 data, w83627hf_reg_temp_over[i]);
1822 data->temp_max_hyst[i] = w83627hf_read_value(
1823 data, w83627hf_reg_temp_hyst[i]);
1da177e4
LT		 1824 }
1825
c09c5184
JD		 1826 w83627hf_update_fan_div(data);
1827
1da177e4 1828 data->alarms =
787c72b1
JD		 1829 w83627hf_read_value(data, W83781D_REG_ALARM1) |
1830 (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) |
1831 (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16);
1832 i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
1c138107 1833 data->beep_mask = (i << 8) |
787c72b1
JD		 1834 w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) |
1835 w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16;
1da177e4
LT		 1836 data->last_updated = jiffies;
1837 data->valid = 1;
1838 }
1839
9a61bf63 1840 mutex_unlock(&data->update_lock);
1da177e4
LT		 1841
1842 return data;
1843}
1844
787c72b1
JD		 1845static int __init w83627hf_device_add(unsigned short address,
1846 const struct w83627hf_sio_data *sio_data)
1847{
1848 struct resource res = {
1849 .start = address + WINB_REGION_OFFSET,
1850 .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1,
1851 .name = DRVNAME,
1852 .flags = IORESOURCE_IO,
1853 };
1854 int err;
1855
b9acb64a
JD		 1856 err = acpi_check_resource_conflict(&res);
1857 if (err)
1858 goto exit;
1859
787c72b1
JD		 1860 pdev = platform_device_alloc(DRVNAME, address);
1861 if (!pdev) {
1862 err = -ENOMEM;
18de030f 1863 pr_err("Device allocation failed\n");
787c72b1
JD		 1864 goto exit;
1865 }
1866
1867 err = platform_device_add_resources(pdev, &res, 1);
1868 if (err) {
18de030f 1869 pr_err("Device resource addition failed (%d)\n", err);
787c72b1
JD		 1870 goto exit_device_put;
1871 }
1872
2df6d811
JD		 1873 err = platform_device_add_data(pdev, sio_data,
1874 sizeof(struct w83627hf_sio_data));
1875 if (err) {
18de030f 1876 pr_err("Platform data allocation failed\n");
787c72b1
JD		 1877 goto exit_device_put;
1878 }
787c72b1
JD		 1879
1880 err = platform_device_add(pdev);
1881 if (err) {
18de030f 1882 pr_err("Device addition failed (%d)\n", err);
787c72b1
JD		 1883 goto exit_device_put;
1884 }
1885
1886 return 0;
1887
1888exit_device_put:
1889 platform_device_put(pdev);
1890exit:
1891 return err;
1892}
1893
1da177e4
LT		 1894static int __init sensors_w83627hf_init(void)
1895{
787c72b1
JD		 1896 int err;
1897 unsigned short address;
1898 struct w83627hf_sio_data sio_data;
1899
1900 if (w83627hf_find(0x2e, &address, &sio_data)
1901 && w83627hf_find(0x4e, &address, &sio_data))
1da177e4 1902 return -ENODEV;
1da177e4 1903
787c72b1
JD		 1904 err = platform_driver_register(&w83627hf_driver);
1905 if (err)
1906 goto exit;
1907
1908 /* Sets global pdev as a side effect */
1909 err = w83627hf_device_add(address, &sio_data);
1910 if (err)
1911 goto exit_driver;
1912
1913 return 0;
1914
1915exit_driver:
1916 platform_driver_unregister(&w83627hf_driver);
1917exit:
1918 return err;
1da177e4
LT		 1919}
1920
1921static void __exit sensors_w83627hf_exit(void)
1922{
787c72b1
JD		 1923 platform_device_unregister(pdev);
1924 platform_driver_unregister(&w83627hf_driver);
1da177e4
LT		 1925}
1926
1927MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1928 "Philip Edelbrock <phil@netroedge.com>, "
1929 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1930MODULE_DESCRIPTION("W83627HF driver");
1931MODULE_LICENSE("GPL");
1932
1933module_init(sensors_w83627hf_init);
1934module_exit(sensors_w83627hf_exit);
Linux 6.x block layer and io_uring tree(s)