Merge branch 'asoc-5.3' into asoc-linus
[linux-2.6-block.git] / drivers / hwmon / w83627hf.c
CommitLineData
74ba9207 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4 2/*
27b9de3c
GR
3 * w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
4 * monitoring
5 * Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
6 * Philip Edelbrock <phil@netroedge.com>,
7 * and Mark Studebaker <mdsxyz123@yahoo.com>
8 * Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
7c81c60f 9 * Copyright (c) 2007 - 1012 Jean Delvare <jdelvare@suse.de>
27b9de3c 10 */
1da177e4
LT
11
12/*
27b9de3c
GR
13 * Supports following chips:
14 *
4101ece3 15 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
27b9de3c
GR
16 * w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
17 * w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
18 * w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
19 * w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
20 * w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
21 *
22 * For other winbond chips, and for i2c support in the above chips,
23 * use w83781d.c.
24 *
25 * Note: automatic ("cruise") fan control for 697, 637 & 627thf not
26 * supported yet.
27 */
1da177e4 28
18de030f
JP
29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
1da177e4
LT
31#include <linux/module.h>
32#include <linux/init.h>
33#include <linux/slab.h>
34#include <linux/jiffies.h>
787c72b1 35#include <linux/platform_device.h>
943b0830 36#include <linux/hwmon.h>
07584c76 37#include <linux/hwmon-sysfs.h>
303760b4 38#include <linux/hwmon-vid.h>
943b0830 39#include <linux/err.h>
9a61bf63 40#include <linux/mutex.h>
d27c37c0 41#include <linux/ioport.h>
b9acb64a 42#include <linux/acpi.h>
6055fae8 43#include <linux/io.h>
1da177e4
LT
44#include "lm75.h"
45
787c72b1 46static struct platform_device *pdev;
d27c37c0
JD
47
48#define DRVNAME "w83627hf"
49enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
50
b72656db
JD
51struct w83627hf_sio_data {
52 enum chips type;
53 int sioaddr;
54};
55
1da177e4
LT
56static u8 force_i2c = 0x1f;
57module_param(force_i2c, byte, 0);
58MODULE_PARM_DESC(force_i2c,
59 "Initialize the i2c address of the sensors");
60
90ab5ee9 61static bool init = 1;
1da177e4
LT
62module_param(init, bool, 0);
63MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
64
67b671bc
JD
65static unsigned short force_id;
66module_param(force_id, ushort, 0);
67MODULE_PARM_DESC(force_id, "Override the detected device ID");
68
1da177e4 69/* modified from kernel/include/traps.c */
27b9de3c 70#define DEV 0x07 /* Register: Logical device select */
1da177e4
LT
71
72/* logical device numbers for superio_select (below) */
73#define W83627HF_LD_FDC 0x00
74#define W83627HF_LD_PRT 0x01
75#define W83627HF_LD_UART1 0x02
76#define W83627HF_LD_UART2 0x03
77#define W83627HF_LD_KBC 0x05
78#define W83627HF_LD_CIR 0x06 /* w83627hf only */
79#define W83627HF_LD_GAME 0x07
80#define W83627HF_LD_MIDI 0x07
81#define W83627HF_LD_GPIO1 0x07
82#define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
83#define W83627HF_LD_GPIO2 0x08
84#define W83627HF_LD_GPIO3 0x09
85#define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
86#define W83627HF_LD_ACPI 0x0a
87#define W83627HF_LD_HWM 0x0b
88
27b9de3c 89#define DEVID 0x20 /* Register: Device ID */
1da177e4
LT
90
91#define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
92#define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
93#define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
94
c2db6ce1
JD
95#define W83687THF_VID_EN 0x29 /* w83687thf only */
96#define W83687THF_VID_CFG 0xF0 /* w83687thf only */
97#define W83687THF_VID_DATA 0xF1 /* w83687thf only */
98
1da177e4 99static inline void
b72656db 100superio_outb(struct w83627hf_sio_data *sio, int reg, int val)
1da177e4 101{
b72656db
JD
102 outb(reg, sio->sioaddr);
103 outb(val, sio->sioaddr + 1);
1da177e4
LT
104}
105
106static inline int
b72656db 107superio_inb(struct w83627hf_sio_data *sio, int reg)
1da177e4 108{
b72656db
JD
109 outb(reg, sio->sioaddr);
110 return inb(sio->sioaddr + 1);
1da177e4
LT
111}
112
113static inline void
b72656db 114superio_select(struct w83627hf_sio_data *sio, int ld)
1da177e4 115{
b72656db
JD
116 outb(DEV, sio->sioaddr);
117 outb(ld, sio->sioaddr + 1);
1da177e4
LT
118}
119
e95fd518 120static inline int
b72656db 121superio_enter(struct w83627hf_sio_data *sio)
1da177e4 122{
e95fd518
GR
123 if (!request_muxed_region(sio->sioaddr, 2, DRVNAME))
124 return -EBUSY;
125
b72656db
JD
126 outb(0x87, sio->sioaddr);
127 outb(0x87, sio->sioaddr);
e95fd518
GR
128
129 return 0;
1da177e4
LT
130}
131
132static inline void
b72656db 133superio_exit(struct w83627hf_sio_data *sio)
1da177e4 134{
b72656db 135 outb(0xAA, sio->sioaddr);
e95fd518 136 release_region(sio->sioaddr, 2);
1da177e4
LT
137}
138
139#define W627_DEVID 0x52
140#define W627THF_DEVID 0x82
141#define W697_DEVID 0x60
142#define W637_DEVID 0x70
c2db6ce1 143#define W687THF_DEVID 0x85
1da177e4
LT
144#define WINB_ACT_REG 0x30
145#define WINB_BASE_REG 0x60
146/* Constants specified below */
147
ada0c2f8
PV
148/* Alignment of the base address */
149#define WINB_ALIGNMENT ~7
1da177e4 150
ada0c2f8
PV
151/* Offset & size of I/O region we are interested in */
152#define WINB_REGION_OFFSET 5
153#define WINB_REGION_SIZE 2
154
787c72b1
JD
155/* Where are the sensors address/data registers relative to the region offset */
156#define W83781D_ADDR_REG_OFFSET 0
157#define W83781D_DATA_REG_OFFSET 1
1da177e4
LT
158
159/* The W83781D registers */
160/* The W83782D registers for nr=7,8 are in bank 5 */
161#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
162 (0x554 + (((nr) - 7) * 2)))
163#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
164 (0x555 + (((nr) - 7) * 2)))
165#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
166 (0x550 + (nr) - 7))
167
2ca2fcd1
JC
168/* nr:0-2 for fans:1-3 */
169#define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr))
170#define W83627HF_REG_FAN(nr) (0x28 + (nr))
1da177e4 171
df48ed80
JC
172#define W83627HF_REG_TEMP2_CONFIG 0x152
173#define W83627HF_REG_TEMP3_CONFIG 0x252
174/* these are zero-based, unlike config constants above */
175static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 };
176static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 };
177static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 };
1da177e4
LT
178
179#define W83781D_REG_BANK 0x4E
180
181#define W83781D_REG_CONFIG 0x40
4a1c4447
YM
182#define W83781D_REG_ALARM1 0x459
183#define W83781D_REG_ALARM2 0x45A
184#define W83781D_REG_ALARM3 0x45B
1da177e4 185
1da177e4
LT
186#define W83781D_REG_BEEP_CONFIG 0x4D
187#define W83781D_REG_BEEP_INTS1 0x56
188#define W83781D_REG_BEEP_INTS2 0x57
189#define W83781D_REG_BEEP_INTS3 0x453
190
191#define W83781D_REG_VID_FANDIV 0x47
192
193#define W83781D_REG_CHIPID 0x49
194#define W83781D_REG_WCHIPID 0x58
195#define W83781D_REG_CHIPMAN 0x4F
196#define W83781D_REG_PIN 0x4B
197
198#define W83781D_REG_VBAT 0x5D
199
200#define W83627HF_REG_PWM1 0x5A
201#define W83627HF_REG_PWM2 0x5B
1da177e4 202
a95a5ed8
DG
203static const u8 W83627THF_REG_PWM_ENABLE[] = {
204 0x04, /* FAN 1 mode */
205 0x04, /* FAN 2 mode */
206 0x12, /* FAN AUX mode */
207};
208static const u8 W83627THF_PWM_ENABLE_SHIFT[] = { 2, 4, 1 };
209
c2db6ce1
JD
210#define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */
211#define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */
212#define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */
1da177e4 213
c2db6ce1 214#define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */
1da177e4
LT
215
216static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
217static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
218 W83627THF_REG_PWM3 };
219#define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
07584c76 220 regpwm_627hf[nr] : regpwm[nr])
1da177e4 221
1550cb6d
COM
222#define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */
223
224#define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */
225#define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */
226#define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */
227
228static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1,
229 W83637HF_REG_PWM_FREQ2,
230 W83637HF_REG_PWM_FREQ3 };
231
232#define W83627HF_BASE_PWM_FREQ 46870
233
1da177e4
LT
234#define W83781D_REG_I2C_ADDR 0x48
235#define W83781D_REG_I2C_SUBADDR 0x4A
236
237/* Sensor selection */
238#define W83781D_REG_SCFG1 0x5D
239static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
240#define W83781D_REG_SCFG2 0x59
241static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
242#define W83781D_DEFAULT_BETA 3435
243
27b9de3c
GR
244/*
245 * Conversions. Limit checking is only done on the TO_REG
246 * variants. Note that you should be a bit careful with which arguments
247 * these macros are called: arguments may be evaluated more than once.
248 * Fixing this is just not worth it.
249 */
2a844c14 250#define IN_TO_REG(val) (clamp_val((((val) + 8) / 16), 0, 255))
1da177e4
LT
251#define IN_FROM_REG(val) ((val) * 16)
252
253static inline u8 FAN_TO_REG(long rpm, int div)
254{
255 if (rpm == 0)
256 return 255;
2a844c14
GR
257 rpm = clamp_val(rpm, 1, 1000000);
258 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
1da177e4
LT
259}
260
261#define TEMP_MIN (-128000)
262#define TEMP_MAX ( 127000)
263
27b9de3c
GR
264/*
265 * TEMP: 0.001C/bit (-128C to +127C)
266 * REG: 1C/bit, two's complement
267 */
5bfedac0 268static u8 TEMP_TO_REG(long temp)
1da177e4 269{
2a844c14
GR
270 int ntemp = clamp_val(temp, TEMP_MIN, TEMP_MAX);
271 ntemp += (ntemp < 0 ? -500 : 500);
272 return (u8)(ntemp / 1000);
1da177e4
LT
273}
274
275static int TEMP_FROM_REG(u8 reg)
276{
277 return (s8)reg * 1000;
278}
279
280#define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
281
2a844c14 282#define PWM_TO_REG(val) (clamp_val((val), 0, 255))
1da177e4 283
1550cb6d
COM
284static inline unsigned long pwm_freq_from_reg_627hf(u8 reg)
285{
286 unsigned long freq;
287 freq = W83627HF_BASE_PWM_FREQ >> reg;
288 return freq;
289}
290static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
291{
292 u8 i;
27b9de3c
GR
293 /*
294 * Only 5 dividers (1 2 4 8 16)
295 * Search for the nearest available frequency
296 */
1550cb6d
COM
297 for (i = 0; i < 4; i++) {
298 if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
299 (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2))
300 break;
301 }
302 return i;
303}
304
305static inline unsigned long pwm_freq_from_reg(u8 reg)
306{
307 /* Clock bit 8 -> 180 kHz or 24 MHz */
308 unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;
309
310 reg &= 0x7f;
311 /* This should not happen but anyway... */
312 if (reg == 0)
313 reg++;
7fe83ad8 314 return clock / (reg << 8);
1550cb6d
COM
315}
316static inline u8 pwm_freq_to_reg(unsigned long val)
317{
318 /* Minimum divider value is 0x01 and maximum is 0x7F */
319 if (val >= 93750) /* The highest we can do */
320 return 0x01;
321 if (val >= 720) /* Use 24 MHz clock */
7fe83ad8 322 return 24000000UL / (val << 8);
1550cb6d
COM
323 if (val < 6) /* The lowest we can do */
324 return 0xFF;
325 else /* Use 180 kHz clock */
7fe83ad8 326 return 0x80 | (180000UL / (val << 8));
1550cb6d
COM
327}
328
1c138107
JD
329#define BEEP_MASK_FROM_REG(val) ((val) & 0xff7fff)
330#define BEEP_MASK_TO_REG(val) ((val) & 0xff7fff)
1da177e4
LT
331
332#define DIV_FROM_REG(val) (1 << (val))
333
334static inline u8 DIV_TO_REG(long val)
335{
336 int i;
2a844c14 337 val = clamp_val(val, 1, 128) >> 1;
abc01922 338 for (i = 0; i < 7; i++) {
1da177e4
LT
339 if (val == 0)
340 break;
341 val >>= 1;
342 }
7fe83ad8 343 return (u8)i;
1da177e4
LT
344}
345
27b9de3c
GR
346/*
347 * For each registered chip, we need to keep some data in memory.
348 * The structure is dynamically allocated.
349 */
1da177e4 350struct w83627hf_data {
787c72b1
JD
351 unsigned short addr;
352 const char *name;
1beeffe4 353 struct device *hwmon_dev;
9a61bf63 354 struct mutex lock;
1da177e4
LT
355 enum chips type;
356
9a61bf63 357 struct mutex update_lock;
1da177e4
LT
358 char valid; /* !=0 if following fields are valid */
359 unsigned long last_updated; /* In jiffies */
360
1da177e4
LT
361 u8 in[9]; /* Register value */
362 u8 in_max[9]; /* Register value */
363 u8 in_min[9]; /* Register value */
364 u8 fan[3]; /* Register value */
365 u8 fan_min[3]; /* Register value */
df48ed80
JC
366 u16 temp[3]; /* Register value */
367 u16 temp_max[3]; /* Register value */
368 u16 temp_max_hyst[3]; /* Register value */
1da177e4
LT
369 u8 fan_div[3]; /* Register encoding, shifted right */
370 u8 vid; /* Register encoding, combined */
371 u32 alarms; /* Register encoding, combined */
372 u32 beep_mask; /* Register encoding, combined */
1da177e4 373 u8 pwm[3]; /* Register value */
a95a5ed8 374 u8 pwm_enable[3]; /* 1 = manual
27b9de3c
GR
375 * 2 = thermal cruise (also called SmartFan I)
376 * 3 = fan speed cruise
377 */
1550cb6d 378 u8 pwm_freq[3]; /* Register value */
b26f9330 379 u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode;
27b9de3c
GR
380 * 4 = thermistor
381 */
1da177e4 382 u8 vrm;
c2db6ce1 383 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
275b7d6e
JD
384
385#ifdef CONFIG_PM
386 /* Remember extra register values over suspend/resume */
387 u8 scfg1;
388 u8 scfg2;
389#endif
1da177e4
LT
390};
391
787c72b1 392static int w83627hf_probe(struct platform_device *pdev);
281dfd0b 393static int w83627hf_remove(struct platform_device *pdev);
787c72b1
JD
394
395static int w83627hf_read_value(struct w83627hf_data *data, u16 reg);
396static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value);
c09c5184 397static void w83627hf_update_fan_div(struct w83627hf_data *data);
1da177e4 398static struct w83627hf_data *w83627hf_update_device(struct device *dev);
787c72b1 399static void w83627hf_init_device(struct platform_device *pdev);
1da177e4 400
275b7d6e
JD
401#ifdef CONFIG_PM
402static int w83627hf_suspend(struct device *dev)
403{
404 struct w83627hf_data *data = w83627hf_update_device(dev);
405
406 mutex_lock(&data->update_lock);
407 data->scfg1 = w83627hf_read_value(data, W83781D_REG_SCFG1);
408 data->scfg2 = w83627hf_read_value(data, W83781D_REG_SCFG2);
409 mutex_unlock(&data->update_lock);
410
411 return 0;
412}
413
414static int w83627hf_resume(struct device *dev)
415{
416 struct w83627hf_data *data = dev_get_drvdata(dev);
417 int i, num_temps = (data->type == w83697hf) ? 2 : 3;
418
419 /* Restore limits */
420 mutex_lock(&data->update_lock);
421 for (i = 0; i <= 8; i++) {
422 /* skip missing sensors */
423 if (((data->type == w83697hf) && (i == 1)) ||
424 ((data->type != w83627hf && data->type != w83697hf)
425 && (i == 5 || i == 6)))
426 continue;
427 w83627hf_write_value(data, W83781D_REG_IN_MAX(i),
428 data->in_max[i]);
429 w83627hf_write_value(data, W83781D_REG_IN_MIN(i),
430 data->in_min[i]);
431 }
432 for (i = 0; i <= 2; i++)
433 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(i),
434 data->fan_min[i]);
435 for (i = 0; i < num_temps; i++) {
436 w83627hf_write_value(data, w83627hf_reg_temp_over[i],
437 data->temp_max[i]);
438 w83627hf_write_value(data, w83627hf_reg_temp_hyst[i],
439 data->temp_max_hyst[i]);
440 }
441
442 /* Fixup BIOS bugs */
443 if (data->type == w83627thf || data->type == w83637hf ||
444 data->type == w83687thf)
445 w83627hf_write_value(data, W83627THF_REG_VRM_OVT_CFG,
446 data->vrm_ovt);
447 w83627hf_write_value(data, W83781D_REG_SCFG1, data->scfg1);
448 w83627hf_write_value(data, W83781D_REG_SCFG2, data->scfg2);
449
450 /* Force re-reading all values */
451 data->valid = 0;
452 mutex_unlock(&data->update_lock);
453
454 return 0;
455}
456
457static const struct dev_pm_ops w83627hf_dev_pm_ops = {
458 .suspend = w83627hf_suspend,
459 .resume = w83627hf_resume,
460};
461
462#define W83627HF_DEV_PM_OPS (&w83627hf_dev_pm_ops)
463#else
464#define W83627HF_DEV_PM_OPS NULL
465#endif /* CONFIG_PM */
466
787c72b1 467static struct platform_driver w83627hf_driver = {
cdaf7934 468 .driver = {
d27c37c0 469 .name = DRVNAME,
275b7d6e 470 .pm = W83627HF_DEV_PM_OPS,
cdaf7934 471 },
787c72b1 472 .probe = w83627hf_probe,
9e5e9b7a 473 .remove = w83627hf_remove,
1da177e4
LT
474};
475
07584c76 476static ssize_t
502a92ff 477in_input_show(struct device *dev, struct device_attribute *devattr, char *buf)
07584c76
JC
478{
479 int nr = to_sensor_dev_attr(devattr)->index;
480 struct w83627hf_data *data = w83627hf_update_device(dev);
481 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr]));
1da177e4 482}
07584c76 483static ssize_t
502a92ff 484in_min_show(struct device *dev, struct device_attribute *devattr, char *buf)
07584c76
JC
485{
486 int nr = to_sensor_dev_attr(devattr)->index;
487 struct w83627hf_data *data = w83627hf_update_device(dev);
488 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr]));
489}
490static ssize_t
502a92ff 491in_max_show(struct device *dev, struct device_attribute *devattr, char *buf)
07584c76
JC
492{
493 int nr = to_sensor_dev_attr(devattr)->index;
494 struct w83627hf_data *data = w83627hf_update_device(dev);
495 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr]));
1da177e4 496}
07584c76 497static ssize_t
502a92ff 498in_min_store(struct device *dev, struct device_attribute *devattr,
07584c76
JC
499 const char *buf, size_t count)
500{
501 int nr = to_sensor_dev_attr(devattr)->index;
502 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
503 long val;
504 int err;
505
506 err = kstrtol(buf, 10, &val);
507 if (err)
508 return err;
1da177e4 509
07584c76
JC
510 mutex_lock(&data->update_lock);
511 data->in_min[nr] = IN_TO_REG(val);
512 w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]);
513 mutex_unlock(&data->update_lock);
514 return count;
515}
516static ssize_t
502a92ff 517in_max_store(struct device *dev, struct device_attribute *devattr,
07584c76
JC
518 const char *buf, size_t count)
519{
520 int nr = to_sensor_dev_attr(devattr)->index;
521 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
522 long val;
523 int err;
524
525 err = kstrtol(buf, 10, &val);
526 if (err)
527 return err;
1da177e4 528
07584c76
JC
529 mutex_lock(&data->update_lock);
530 data->in_max[nr] = IN_TO_REG(val);
531 w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]);
532 mutex_unlock(&data->update_lock);
533 return count;
534}
502a92ff
GR
535
536static SENSOR_DEVICE_ATTR_RO(in1_input, in_input, 1);
537static SENSOR_DEVICE_ATTR_RW(in1_min, in_min, 1);
538static SENSOR_DEVICE_ATTR_RW(in1_max, in_max, 1);
539static SENSOR_DEVICE_ATTR_RO(in2_input, in_input, 2);
540static SENSOR_DEVICE_ATTR_RW(in2_min, in_min, 2);
541static SENSOR_DEVICE_ATTR_RW(in2_max, in_max, 2);
542static SENSOR_DEVICE_ATTR_RO(in3_input, in_input, 3);
543static SENSOR_DEVICE_ATTR_RW(in3_min, in_min, 3);
544static SENSOR_DEVICE_ATTR_RW(in3_max, in_max, 3);
545static SENSOR_DEVICE_ATTR_RO(in4_input, in_input, 4);
546static SENSOR_DEVICE_ATTR_RW(in4_min, in_min, 4);
547static SENSOR_DEVICE_ATTR_RW(in4_max, in_max, 4);
548static SENSOR_DEVICE_ATTR_RO(in5_input, in_input, 5);
549static SENSOR_DEVICE_ATTR_RW(in5_min, in_min, 5);
550static SENSOR_DEVICE_ATTR_RW(in5_max, in_max, 5);
551static SENSOR_DEVICE_ATTR_RO(in6_input, in_input, 6);
552static SENSOR_DEVICE_ATTR_RW(in6_min, in_min, 6);
553static SENSOR_DEVICE_ATTR_RW(in6_max, in_max, 6);
554static SENSOR_DEVICE_ATTR_RO(in7_input, in_input, 7);
555static SENSOR_DEVICE_ATTR_RW(in7_min, in_min, 7);
556static SENSOR_DEVICE_ATTR_RW(in7_max, in_max, 7);
557static SENSOR_DEVICE_ATTR_RO(in8_input, in_input, 8);
558static SENSOR_DEVICE_ATTR_RW(in8_min, in_min, 8);
559static SENSOR_DEVICE_ATTR_RW(in8_max, in_max, 8);
1da177e4
LT
560
561/* use a different set of functions for in0 */
562static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
563{
564 long in0;
565
566 if ((data->vrm_ovt & 0x01) &&
c2db6ce1
JD
567 (w83627thf == data->type || w83637hf == data->type
568 || w83687thf == data->type))
1da177e4
LT
569
570 /* use VRM9 calculation */
571 in0 = (long)((reg * 488 + 70000 + 50) / 100);
572 else
573 /* use VRM8 (standard) calculation */
574 in0 = (long)IN_FROM_REG(reg);
575
576 return sprintf(buf,"%ld\n", in0);
577}
578
8dfcdfc1
JL
579static ssize_t in0_input_show(struct device *dev,
580 struct device_attribute *attr, char *buf)
1da177e4
LT
581{
582 struct w83627hf_data *data = w83627hf_update_device(dev);
583 return show_in_0(data, buf, data->in[0]);
584}
585
8dfcdfc1
JL
586static ssize_t in0_min_show(struct device *dev, struct device_attribute *attr,
587 char *buf)
1da177e4
LT
588{
589 struct w83627hf_data *data = w83627hf_update_device(dev);
590 return show_in_0(data, buf, data->in_min[0]);
591}
592
8dfcdfc1
JL
593static ssize_t in0_max_show(struct device *dev, struct device_attribute *attr,
594 char *buf)
1da177e4
LT
595{
596 struct w83627hf_data *data = w83627hf_update_device(dev);
597 return show_in_0(data, buf, data->in_max[0]);
598}
599
8dfcdfc1
JL
600static ssize_t in0_min_store(struct device *dev,
601 struct device_attribute *attr, const char *buf,
602 size_t count)
1da177e4 603{
787c72b1 604 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
605 unsigned long val;
606 int err;
1da177e4 607
27b9de3c
GR
608 err = kstrtoul(buf, 10, &val);
609 if (err)
610 return err;
1da177e4 611
9a61bf63 612 mutex_lock(&data->update_lock);
1da177e4
LT
613
614 if ((data->vrm_ovt & 0x01) &&
c2db6ce1
JD
615 (w83627thf == data->type || w83637hf == data->type
616 || w83687thf == data->type))
1da177e4
LT
617
618 /* use VRM9 calculation */
2723ab91 619 data->in_min[0] =
2a844c14 620 clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255);
1da177e4
LT
621 else
622 /* use VRM8 (standard) calculation */
623 data->in_min[0] = IN_TO_REG(val);
624
787c72b1 625 w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]);
9a61bf63 626 mutex_unlock(&data->update_lock);
1da177e4
LT
627 return count;
628}
629
8dfcdfc1
JL
630static ssize_t in0_max_store(struct device *dev,
631 struct device_attribute *attr, const char *buf,
632 size_t count)
1da177e4 633{
787c72b1 634 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
635 unsigned long val;
636 int err;
1da177e4 637
27b9de3c
GR
638 err = kstrtoul(buf, 10, &val);
639 if (err)
640 return err;
1da177e4 641
9a61bf63 642 mutex_lock(&data->update_lock);
1da177e4
LT
643
644 if ((data->vrm_ovt & 0x01) &&
c2db6ce1
JD
645 (w83627thf == data->type || w83637hf == data->type
646 || w83687thf == data->type))
1da177e4
LT
647
648 /* use VRM9 calculation */
2723ab91 649 data->in_max[0] =
2a844c14 650 clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255);
1da177e4
LT
651 else
652 /* use VRM8 (standard) calculation */
653 data->in_max[0] = IN_TO_REG(val);
654
787c72b1 655 w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]);
9a61bf63 656 mutex_unlock(&data->update_lock);
1da177e4
LT
657 return count;
658}
659
8dfcdfc1
JL
660static DEVICE_ATTR_RO(in0_input);
661static DEVICE_ATTR_RW(in0_min);
662static DEVICE_ATTR_RW(in0_max);
1da177e4 663
07584c76 664static ssize_t
502a92ff
GR
665fan_input_show(struct device *dev, struct device_attribute *devattr,
666 char *buf)
07584c76
JC
667{
668 int nr = to_sensor_dev_attr(devattr)->index;
669 struct w83627hf_data *data = w83627hf_update_device(dev);
670 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr],
671 (long)DIV_FROM_REG(data->fan_div[nr])));
672}
673static ssize_t
502a92ff 674fan_min_show(struct device *dev, struct device_attribute *devattr, char *buf)
07584c76
JC
675{
676 int nr = to_sensor_dev_attr(devattr)->index;
677 struct w83627hf_data *data = w83627hf_update_device(dev);
678 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr],
679 (long)DIV_FROM_REG(data->fan_div[nr])));
1da177e4 680}
1da177e4 681static ssize_t
502a92ff 682fan_min_store(struct device *dev, struct device_attribute *devattr,
07584c76 683 const char *buf, size_t count)
1da177e4 684{
07584c76 685 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 686 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
687 unsigned long val;
688 int err;
689
690 err = kstrtoul(buf, 10, &val);
691 if (err)
692 return err;
1da177e4 693
9a61bf63 694 mutex_lock(&data->update_lock);
07584c76 695 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
2ca2fcd1 696 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr),
07584c76 697 data->fan_min[nr]);
1da177e4 698
9a61bf63 699 mutex_unlock(&data->update_lock);
1da177e4
LT
700 return count;
701}
702
502a92ff
GR
703static SENSOR_DEVICE_ATTR_RO(fan1_input, fan_input, 0);
704static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
705static SENSOR_DEVICE_ATTR_RO(fan2_input, fan_input, 1);
706static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
707static SENSOR_DEVICE_ATTR_RO(fan3_input, fan_input, 2);
708static SENSOR_DEVICE_ATTR_RW(fan3_min, fan_min, 2);
1da177e4 709
07584c76 710static ssize_t
502a92ff 711temp_show(struct device *dev, struct device_attribute *devattr, char *buf)
07584c76
JC
712{
713 int nr = to_sensor_dev_attr(devattr)->index;
714 struct w83627hf_data *data = w83627hf_update_device(dev);
df48ed80
JC
715
716 u16 tmp = data->temp[nr];
717 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
718 : (long) TEMP_FROM_REG(tmp));
1da177e4 719}
1da177e4 720
07584c76 721static ssize_t
502a92ff 722temp_max_show(struct device *dev, struct device_attribute *devattr, char *buf)
07584c76
JC
723{
724 int nr = to_sensor_dev_attr(devattr)->index;
725 struct w83627hf_data *data = w83627hf_update_device(dev);
df48ed80
JC
726
727 u16 tmp = data->temp_max[nr];
728 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
729 : (long) TEMP_FROM_REG(tmp));
1da177e4 730}
1da177e4 731
07584c76 732static ssize_t
502a92ff 733temp_max_hyst_show(struct device *dev, struct device_attribute *devattr,
07584c76
JC
734 char *buf)
735{
736 int nr = to_sensor_dev_attr(devattr)->index;
737 struct w83627hf_data *data = w83627hf_update_device(dev);
df48ed80
JC
738
739 u16 tmp = data->temp_max_hyst[nr];
740 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
741 : (long) TEMP_FROM_REG(tmp));
07584c76 742}
1da177e4 743
07584c76 744static ssize_t
502a92ff 745temp_max_store(struct device *dev, struct device_attribute *devattr,
07584c76
JC
746 const char *buf, size_t count)
747{
748 int nr = to_sensor_dev_attr(devattr)->index;
749 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
750 u16 tmp;
751 long val;
752 int err;
1da177e4 753
27b9de3c
GR
754 err = kstrtol(buf, 10, &val);
755 if (err)
756 return err;
757
758 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
07584c76 759 mutex_lock(&data->update_lock);
df48ed80
JC
760 data->temp_max[nr] = tmp;
761 w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp);
07584c76
JC
762 mutex_unlock(&data->update_lock);
763 return count;
764}
765
766static ssize_t
502a92ff 767temp_max_hyst_store(struct device *dev, struct device_attribute *devattr,
07584c76
JC
768 const char *buf, size_t count)
769{
770 int nr = to_sensor_dev_attr(devattr)->index;
771 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
772 u16 tmp;
773 long val;
774 int err;
775
776 err = kstrtol(buf, 10, &val);
777 if (err)
778 return err;
07584c76 779
27b9de3c 780 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
07584c76 781 mutex_lock(&data->update_lock);
df48ed80
JC
782 data->temp_max_hyst[nr] = tmp;
783 w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp);
07584c76
JC
784 mutex_unlock(&data->update_lock);
785 return count;
786}
787
502a92ff
GR
788static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
789static SENSOR_DEVICE_ATTR_RW(temp1_max, temp_max, 0);
790static SENSOR_DEVICE_ATTR_RW(temp1_max_hyst, temp_max_hyst, 0);
791static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, 1);
792static SENSOR_DEVICE_ATTR_RW(temp2_max, temp_max, 1);
793static SENSOR_DEVICE_ATTR_RW(temp2_max_hyst, temp_max_hyst, 1);
794static SENSOR_DEVICE_ATTR_RO(temp3_input, temp, 2);
795static SENSOR_DEVICE_ATTR_RW(temp3_max, temp_max, 2);
796static SENSOR_DEVICE_ATTR_RW(temp3_max_hyst, temp_max_hyst, 2);
1da177e4 797
1da177e4 798static ssize_t
8dfcdfc1 799cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
800{
801 struct w83627hf_data *data = w83627hf_update_device(dev);
802 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
803}
8dfcdfc1 804static DEVICE_ATTR_RO(cpu0_vid);
1da177e4
LT
805
806static ssize_t
8dfcdfc1 807vrm_show(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4 808{
90d6619a 809 struct w83627hf_data *data = dev_get_drvdata(dev);
1da177e4
LT
810 return sprintf(buf, "%ld\n", (long) data->vrm);
811}
812static ssize_t
8dfcdfc1
JL
813vrm_store(struct device *dev, struct device_attribute *attr, const char *buf,
814 size_t count)
1da177e4 815{
787c72b1 816 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
817 unsigned long val;
818 int err;
1da177e4 819
27b9de3c
GR
820 err = kstrtoul(buf, 10, &val);
821 if (err)
822 return err;
970255b7
AL
823
824 if (val > 255)
825 return -EINVAL;
1da177e4
LT
826 data->vrm = val;
827
828 return count;
829}
8dfcdfc1 830static DEVICE_ATTR_RW(vrm);
1da177e4
LT
831
832static ssize_t
8dfcdfc1 833alarms_show(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
834{
835 struct w83627hf_data *data = w83627hf_update_device(dev);
836 return sprintf(buf, "%ld\n", (long) data->alarms);
837}
8dfcdfc1 838static DEVICE_ATTR_RO(alarms);
1da177e4 839
e3604c62 840static ssize_t
502a92ff 841alarm_show(struct device *dev, struct device_attribute *attr, char *buf)
e3604c62
JD
842{
843 struct w83627hf_data *data = w83627hf_update_device(dev);
844 int bitnr = to_sensor_dev_attr(attr)->index;
845 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
846}
502a92ff
GR
847static SENSOR_DEVICE_ATTR_RO(in0_alarm, alarm, 0);
848static SENSOR_DEVICE_ATTR_RO(in1_alarm, alarm, 1);
849static SENSOR_DEVICE_ATTR_RO(in2_alarm, alarm, 2);
850static SENSOR_DEVICE_ATTR_RO(in3_alarm, alarm, 3);
851static SENSOR_DEVICE_ATTR_RO(in4_alarm, alarm, 8);
852static SENSOR_DEVICE_ATTR_RO(in5_alarm, alarm, 9);
853static SENSOR_DEVICE_ATTR_RO(in6_alarm, alarm, 10);
854static SENSOR_DEVICE_ATTR_RO(in7_alarm, alarm, 16);
855static SENSOR_DEVICE_ATTR_RO(in8_alarm, alarm, 17);
856static SENSOR_DEVICE_ATTR_RO(fan1_alarm, alarm, 6);
857static SENSOR_DEVICE_ATTR_RO(fan2_alarm, alarm, 7);
858static SENSOR_DEVICE_ATTR_RO(fan3_alarm, alarm, 11);
859static SENSOR_DEVICE_ATTR_RO(temp1_alarm, alarm, 4);
860static SENSOR_DEVICE_ATTR_RO(temp2_alarm, alarm, 5);
861static SENSOR_DEVICE_ATTR_RO(temp3_alarm, alarm, 13);
e3604c62 862
1c138107 863static ssize_t
8dfcdfc1 864beep_mask_show(struct device *dev, struct device_attribute *attr, char *buf)
1c138107
JD
865{
866 struct w83627hf_data *data = w83627hf_update_device(dev);
867 return sprintf(buf, "%ld\n",
868 (long)BEEP_MASK_FROM_REG(data->beep_mask));
1da177e4 869}
1da177e4
LT
870
871static ssize_t
8dfcdfc1 872beep_mask_store(struct device *dev, struct device_attribute *attr,
1c138107 873 const char *buf, size_t count)
1da177e4 874{
787c72b1 875 struct w83627hf_data *data = dev_get_drvdata(dev);
1c138107 876 unsigned long val;
27b9de3c 877 int err;
1da177e4 878
27b9de3c
GR
879 err = kstrtoul(buf, 10, &val);
880 if (err)
881 return err;
1da177e4 882
9a61bf63 883 mutex_lock(&data->update_lock);
1da177e4 884
1c138107
JD
885 /* preserve beep enable */
886 data->beep_mask = (data->beep_mask & 0x8000)
887 | BEEP_MASK_TO_REG(val);
888 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1,
889 data->beep_mask & 0xff);
890 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3,
891 ((data->beep_mask) >> 16) & 0xff);
787c72b1 892 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2,
1c138107 893 (data->beep_mask >> 8) & 0xff);
1da177e4 894
9a61bf63 895 mutex_unlock(&data->update_lock);
1da177e4
LT
896 return count;
897}
898
8dfcdfc1 899static DEVICE_ATTR_RW(beep_mask);
1da177e4 900
e3604c62 901static ssize_t
502a92ff 902beep_show(struct device *dev, struct device_attribute *attr, char *buf)
e3604c62
JD
903{
904 struct w83627hf_data *data = w83627hf_update_device(dev);
905 int bitnr = to_sensor_dev_attr(attr)->index;
906 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
907}
908
909static ssize_t
502a92ff
GR
910beep_store(struct device *dev, struct device_attribute *attr, const char *buf,
911 size_t count)
e3604c62
JD
912{
913 struct w83627hf_data *data = dev_get_drvdata(dev);
914 int bitnr = to_sensor_dev_attr(attr)->index;
e3604c62 915 u8 reg;
27b9de3c
GR
916 unsigned long bit;
917 int err;
918
919 err = kstrtoul(buf, 10, &bit);
920 if (err)
921 return err;
e3604c62 922
e3604c62
JD
923 if (bit & ~1)
924 return -EINVAL;
925
926 mutex_lock(&data->update_lock);
927 if (bit)
928 data->beep_mask |= (1 << bitnr);
929 else
930 data->beep_mask &= ~(1 << bitnr);
931
932 if (bitnr < 8) {
933 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS1);
934 if (bit)
935 reg |= (1 << bitnr);
936 else
937 reg &= ~(1 << bitnr);
938 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, reg);
939 } else if (bitnr < 16) {
940 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
941 if (bit)
942 reg |= (1 << (bitnr - 8));
943 else
944 reg &= ~(1 << (bitnr - 8));
945 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, reg);
946 } else {
947 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS3);
948 if (bit)
949 reg |= (1 << (bitnr - 16));
950 else
951 reg &= ~(1 << (bitnr - 16));
952 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, reg);
953 }
954 mutex_unlock(&data->update_lock);
955
956 return count;
957}
958
502a92ff
GR
959static SENSOR_DEVICE_ATTR_RW(in0_beep, beep, 0);
960static SENSOR_DEVICE_ATTR_RW(in1_beep, beep, 1);
961static SENSOR_DEVICE_ATTR_RW(in2_beep, beep, 2);
962static SENSOR_DEVICE_ATTR_RW(in3_beep, beep, 3);
963static SENSOR_DEVICE_ATTR_RW(in4_beep, beep, 8);
964static SENSOR_DEVICE_ATTR_RW(in5_beep, beep, 9);
965static SENSOR_DEVICE_ATTR_RW(in6_beep, beep, 10);
966static SENSOR_DEVICE_ATTR_RW(in7_beep, beep, 16);
967static SENSOR_DEVICE_ATTR_RW(in8_beep, beep, 17);
968static SENSOR_DEVICE_ATTR_RW(fan1_beep, beep, 6);
969static SENSOR_DEVICE_ATTR_RW(fan2_beep, beep, 7);
970static SENSOR_DEVICE_ATTR_RW(fan3_beep, beep, 11);
971static SENSOR_DEVICE_ATTR_RW(temp1_beep, beep, 4);
972static SENSOR_DEVICE_ATTR_RW(temp2_beep, beep, 5);
973static SENSOR_DEVICE_ATTR_RW(temp3_beep, beep, 13);
974static SENSOR_DEVICE_ATTR_RW(beep_enable, beep, 15);
e3604c62 975
1da177e4 976static ssize_t
502a92ff 977fan_div_show(struct device *dev, struct device_attribute *devattr, char *buf)
1da177e4 978{
07584c76 979 int nr = to_sensor_dev_attr(devattr)->index;
1da177e4
LT
980 struct w83627hf_data *data = w83627hf_update_device(dev);
981 return sprintf(buf, "%ld\n",
07584c76 982 (long) DIV_FROM_REG(data->fan_div[nr]));
1da177e4 983}
27b9de3c
GR
984/*
985 * Note: we save and restore the fan minimum here, because its value is
986 * determined in part by the fan divisor. This follows the principle of
987 * least surprise; the user doesn't expect the fan minimum to change just
988 * because the divisor changed.
989 */
1da177e4 990static ssize_t
502a92ff 991fan_div_store(struct device *dev, struct device_attribute *devattr,
07584c76 992 const char *buf, size_t count)
1da177e4 993{
07584c76 994 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 995 struct w83627hf_data *data = dev_get_drvdata(dev);
1da177e4
LT
996 unsigned long min;
997 u8 reg;
27b9de3c
GR
998 unsigned long val;
999 int err;
1000
1001 err = kstrtoul(buf, 10, &val);
1002 if (err)
1003 return err;
1da177e4 1004
9a61bf63 1005 mutex_lock(&data->update_lock);
1da177e4
LT
1006
1007 /* Save fan_min */
1008 min = FAN_FROM_REG(data->fan_min[nr],
1009 DIV_FROM_REG(data->fan_div[nr]));
1010
1011 data->fan_div[nr] = DIV_TO_REG(val);
1012
787c72b1 1013 reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
1da177e4
LT
1014 & (nr==0 ? 0xcf : 0x3f))
1015 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
787c72b1 1016 w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
1da177e4 1017
787c72b1 1018 reg = (w83627hf_read_value(data, W83781D_REG_VBAT)
1da177e4
LT
1019 & ~(1 << (5 + nr)))
1020 | ((data->fan_div[nr] & 0x04) << (3 + nr));
787c72b1 1021 w83627hf_write_value(data, W83781D_REG_VBAT, reg);
1da177e4
LT
1022
1023 /* Restore fan_min */
1024 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
2ca2fcd1 1025 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]);
1da177e4 1026
9a61bf63 1027 mutex_unlock(&data->update_lock);
1da177e4
LT
1028 return count;
1029}
1030
502a92ff
GR
1031static SENSOR_DEVICE_ATTR_RW(fan1_div, fan_div, 0);
1032static SENSOR_DEVICE_ATTR_RW(fan2_div, fan_div, 1);
1033static SENSOR_DEVICE_ATTR_RW(fan3_div, fan_div, 2);
1da177e4 1034
1da177e4 1035static ssize_t
502a92ff 1036pwm_show(struct device *dev, struct device_attribute *devattr, char *buf)
1da177e4 1037{
07584c76 1038 int nr = to_sensor_dev_attr(devattr)->index;
1da177e4 1039 struct w83627hf_data *data = w83627hf_update_device(dev);
07584c76 1040 return sprintf(buf, "%ld\n", (long) data->pwm[nr]);
1da177e4
LT
1041}
1042
1043static ssize_t
502a92ff 1044pwm_store(struct device *dev, struct device_attribute *devattr,
07584c76 1045 const char *buf, size_t count)
1da177e4 1046{
07584c76 1047 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 1048 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
1049 unsigned long val;
1050 int err;
1051
1052 err = kstrtoul(buf, 10, &val);
1053 if (err)
1054 return err;
1da177e4 1055
9a61bf63 1056 mutex_lock(&data->update_lock);
1da177e4
LT
1057
1058 if (data->type == w83627thf) {
1059 /* bits 0-3 are reserved in 627THF */
07584c76 1060 data->pwm[nr] = PWM_TO_REG(val) & 0xf0;
787c72b1 1061 w83627hf_write_value(data,
1da177e4 1062 W836X7HF_REG_PWM(data->type, nr),
07584c76 1063 data->pwm[nr] |
787c72b1 1064 (w83627hf_read_value(data,
1da177e4
LT
1065 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
1066 } else {
07584c76 1067 data->pwm[nr] = PWM_TO_REG(val);
787c72b1 1068 w83627hf_write_value(data,
1da177e4 1069 W836X7HF_REG_PWM(data->type, nr),
07584c76 1070 data->pwm[nr]);
1da177e4
LT
1071 }
1072
9a61bf63 1073 mutex_unlock(&data->update_lock);
1da177e4
LT
1074 return count;
1075}
1076
502a92ff
GR
1077static SENSOR_DEVICE_ATTR_RW(pwm1, pwm, 0);
1078static SENSOR_DEVICE_ATTR_RW(pwm2, pwm, 1);
1079static SENSOR_DEVICE_ATTR_RW(pwm3, pwm, 2);
1da177e4 1080
a95a5ed8 1081static ssize_t
502a92ff
GR
1082pwm_enable_show(struct device *dev, struct device_attribute *devattr,
1083 char *buf)
a95a5ed8
DG
1084{
1085 int nr = to_sensor_dev_attr(devattr)->index;
1086 struct w83627hf_data *data = w83627hf_update_device(dev);
1087 return sprintf(buf, "%d\n", data->pwm_enable[nr]);
1088}
1089
1090static ssize_t
502a92ff
GR
1091pwm_enable_store(struct device *dev, struct device_attribute *devattr,
1092 const char *buf, size_t count)
a95a5ed8
DG
1093{
1094 int nr = to_sensor_dev_attr(devattr)->index;
1095 struct w83627hf_data *data = dev_get_drvdata(dev);
a95a5ed8 1096 u8 reg;
27b9de3c
GR
1097 unsigned long val;
1098 int err;
a95a5ed8 1099
27b9de3c
GR
1100 err = kstrtoul(buf, 10, &val);
1101 if (err)
1102 return err;
1103
1104 if (!val || val > 3) /* modes 1, 2 and 3 are supported */
a95a5ed8
DG
1105 return -EINVAL;
1106 mutex_lock(&data->update_lock);
1107 data->pwm_enable[nr] = val;
1108 reg = w83627hf_read_value(data, W83627THF_REG_PWM_ENABLE[nr]);
1109 reg &= ~(0x03 << W83627THF_PWM_ENABLE_SHIFT[nr]);
1110 reg |= (val - 1) << W83627THF_PWM_ENABLE_SHIFT[nr];
1111 w83627hf_write_value(data, W83627THF_REG_PWM_ENABLE[nr], reg);
1112 mutex_unlock(&data->update_lock);
1113 return count;
1114}
1115
502a92ff
GR
1116static SENSOR_DEVICE_ATTR_RW(pwm1_enable, pwm_enable, 0);
1117static SENSOR_DEVICE_ATTR_RW(pwm2_enable, pwm_enable, 1);
1118static SENSOR_DEVICE_ATTR_RW(pwm3_enable, pwm_enable, 2);
a95a5ed8 1119
1550cb6d 1120static ssize_t
502a92ff 1121pwm_freq_show(struct device *dev, struct device_attribute *devattr, char *buf)
1550cb6d 1122{
07584c76 1123 int nr = to_sensor_dev_attr(devattr)->index;
1550cb6d
COM
1124 struct w83627hf_data *data = w83627hf_update_device(dev);
1125 if (data->type == w83627hf)
1126 return sprintf(buf, "%ld\n",
07584c76 1127 pwm_freq_from_reg_627hf(data->pwm_freq[nr]));
1550cb6d
COM
1128 else
1129 return sprintf(buf, "%ld\n",
07584c76 1130 pwm_freq_from_reg(data->pwm_freq[nr]));
1550cb6d
COM
1131}
1132
1133static ssize_t
502a92ff 1134pwm_freq_store(struct device *dev, struct device_attribute *devattr,
07584c76 1135 const char *buf, size_t count)
1550cb6d 1136{
07584c76 1137 int nr = to_sensor_dev_attr(devattr)->index;
1550cb6d
COM
1138 struct w83627hf_data *data = dev_get_drvdata(dev);
1139 static const u8 mask[]={0xF8, 0x8F};
27b9de3c
GR
1140 unsigned long val;
1141 int err;
1550cb6d 1142
27b9de3c
GR
1143 err = kstrtoul(buf, 10, &val);
1144 if (err)
1145 return err;
1550cb6d
COM
1146
1147 mutex_lock(&data->update_lock);
1148
1149 if (data->type == w83627hf) {
07584c76 1150 data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val);
1550cb6d 1151 w83627hf_write_value(data, W83627HF_REG_PWM_FREQ,
07584c76 1152 (data->pwm_freq[nr] << (nr*4)) |
1550cb6d 1153 (w83627hf_read_value(data,
07584c76 1154 W83627HF_REG_PWM_FREQ) & mask[nr]));
1550cb6d 1155 } else {
07584c76
JC
1156 data->pwm_freq[nr] = pwm_freq_to_reg(val);
1157 w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr],
1158 data->pwm_freq[nr]);
1550cb6d
COM
1159 }
1160
1161 mutex_unlock(&data->update_lock);
1162 return count;
1163}
1164
502a92ff
GR
1165static SENSOR_DEVICE_ATTR_RW(pwm1_freq, pwm_freq, 0);
1166static SENSOR_DEVICE_ATTR_RW(pwm2_freq, pwm_freq, 1);
1167static SENSOR_DEVICE_ATTR_RW(pwm3_freq, pwm_freq, 2);
1550cb6d 1168
1da177e4 1169static ssize_t
502a92ff 1170temp_type_show(struct device *dev, struct device_attribute *devattr,
07584c76 1171 char *buf)
1da177e4 1172{
07584c76 1173 int nr = to_sensor_dev_attr(devattr)->index;
1da177e4 1174 struct w83627hf_data *data = w83627hf_update_device(dev);
07584c76 1175 return sprintf(buf, "%ld\n", (long) data->sens[nr]);
1da177e4
LT
1176}
1177
1178static ssize_t
502a92ff 1179temp_type_store(struct device *dev, struct device_attribute *devattr,
07584c76 1180 const char *buf, size_t count)
1da177e4 1181{
07584c76 1182 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 1183 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
1184 unsigned long val;
1185 u32 tmp;
1186 int err;
1da177e4 1187
27b9de3c
GR
1188 err = kstrtoul(buf, 10, &val);
1189 if (err)
1190 return err;
1da177e4 1191
9a61bf63 1192 mutex_lock(&data->update_lock);
1da177e4
LT
1193
1194 switch (val) {
1195 case 1: /* PII/Celeron diode */
787c72b1
JD
1196 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1197 w83627hf_write_value(data, W83781D_REG_SCFG1,
07584c76 1198 tmp | BIT_SCFG1[nr]);
787c72b1
JD
1199 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1200 w83627hf_write_value(data, W83781D_REG_SCFG2,
07584c76
JC
1201 tmp | BIT_SCFG2[nr]);
1202 data->sens[nr] = val;
1da177e4
LT
1203 break;
1204 case 2: /* 3904 */
787c72b1
JD
1205 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1206 w83627hf_write_value(data, W83781D_REG_SCFG1,
07584c76 1207 tmp | BIT_SCFG1[nr]);
787c72b1
JD
1208 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1209 w83627hf_write_value(data, W83781D_REG_SCFG2,
07584c76
JC
1210 tmp & ~BIT_SCFG2[nr]);
1211 data->sens[nr] = val;
1da177e4 1212 break;
b26f9330
JD
1213 case W83781D_DEFAULT_BETA:
1214 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
1215 "instead\n", W83781D_DEFAULT_BETA);
1216 /* fall through */
1217 case 4: /* thermistor */
787c72b1
JD
1218 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1219 w83627hf_write_value(data, W83781D_REG_SCFG1,
07584c76
JC
1220 tmp & ~BIT_SCFG1[nr]);
1221 data->sens[nr] = val;
1da177e4
LT
1222 break;
1223 default:
787c72b1 1224 dev_err(dev,
b26f9330
JD
1225 "Invalid sensor type %ld; must be 1, 2, or 4\n",
1226 (long) val);
1da177e4
LT
1227 break;
1228 }
1229
9a61bf63 1230 mutex_unlock(&data->update_lock);
1da177e4
LT
1231 return count;
1232}
1233
502a92ff
GR
1234static SENSOR_DEVICE_ATTR_RW(temp1_type, temp_type, 0);
1235static SENSOR_DEVICE_ATTR_RW(temp2_type, temp_type, 1);
1236static SENSOR_DEVICE_ATTR_RW(temp3_type, temp_type, 2);
1da177e4 1237
07584c76 1238static ssize_t
8dfcdfc1 1239name_show(struct device *dev, struct device_attribute *devattr, char *buf)
787c72b1
JD
1240{
1241 struct w83627hf_data *data = dev_get_drvdata(dev);
1242
1243 return sprintf(buf, "%s\n", data->name);
1244}
8dfcdfc1 1245static DEVICE_ATTR_RO(name);
787c72b1
JD
1246
1247static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1248 struct w83627hf_sio_data *sio_data)
1da177e4 1249{
e95fd518 1250 int err;
1da177e4
LT
1251 u16 val;
1252
64f50307 1253 static __initconst char *const names[] = {
787c72b1
JD
1254 "W83627HF",
1255 "W83627THF",
1256 "W83697HF",
1257 "W83637HF",
1258 "W83687THF",
1259 };
1260
c46c0e91 1261 sio_data->sioaddr = sioaddr;
e95fd518
GR
1262 err = superio_enter(sio_data);
1263 if (err)
1264 return err;
1265
1266 err = -ENODEV;
b72656db 1267 val = force_id ? force_id : superio_inb(sio_data, DEVID);
787c72b1
JD
1268 switch (val) {
1269 case W627_DEVID:
1270 sio_data->type = w83627hf;
1271 break;
1272 case W627THF_DEVID:
1273 sio_data->type = w83627thf;
1274 break;
1275 case W697_DEVID:
1276 sio_data->type = w83697hf;
1277 break;
1278 case W637_DEVID:
1279 sio_data->type = w83637hf;
1280 break;
1281 case W687THF_DEVID:
1282 sio_data->type = w83687thf;
1283 break;
e142e2a3
JD
1284 case 0xff: /* No device at all */
1285 goto exit;
787c72b1 1286 default:
e142e2a3 1287 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val);
d27c37c0 1288 goto exit;
1da177e4
LT
1289 }
1290
b72656db
JD
1291 superio_select(sio_data, W83627HF_LD_HWM);
1292 val = (superio_inb(sio_data, WINB_BASE_REG) << 8) |
1293 superio_inb(sio_data, WINB_BASE_REG + 1);
ada0c2f8 1294 *addr = val & WINB_ALIGNMENT;
d27c37c0 1295 if (*addr == 0) {
18de030f 1296 pr_warn("Base address not set, skipping\n");
d27c37c0 1297 goto exit;
1da177e4 1298 }
1da177e4 1299
b72656db 1300 val = superio_inb(sio_data, WINB_ACT_REG);
d27c37c0 1301 if (!(val & 0x01)) {
18de030f 1302 pr_warn("Enabling HWM logical device\n");
b72656db 1303 superio_outb(sio_data, WINB_ACT_REG, val | 0x01);
d27c37c0
JD
1304 }
1305
1306 err = 0;
787c72b1
JD
1307 pr_info(DRVNAME ": Found %s chip at %#x\n",
1308 names[sio_data->type], *addr);
d27c37c0
JD
1309
1310 exit:
b72656db 1311 superio_exit(sio_data);
d27c37c0 1312 return err;
1da177e4
LT
1313}
1314
07584c76
JC
1315#define VIN_UNIT_ATTRS(_X_) \
1316 &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \
1317 &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \
e3604c62
JD
1318 &sensor_dev_attr_in##_X_##_max.dev_attr.attr, \
1319 &sensor_dev_attr_in##_X_##_alarm.dev_attr.attr, \
1320 &sensor_dev_attr_in##_X_##_beep.dev_attr.attr
07584c76
JC
1321
1322#define FAN_UNIT_ATTRS(_X_) \
1323 &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \
1324 &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \
e3604c62
JD
1325 &sensor_dev_attr_fan##_X_##_div.dev_attr.attr, \
1326 &sensor_dev_attr_fan##_X_##_alarm.dev_attr.attr, \
1327 &sensor_dev_attr_fan##_X_##_beep.dev_attr.attr
07584c76
JC
1328
1329#define TEMP_UNIT_ATTRS(_X_) \
1330 &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \
1331 &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \
1332 &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \
e3604c62
JD
1333 &sensor_dev_attr_temp##_X_##_type.dev_attr.attr, \
1334 &sensor_dev_attr_temp##_X_##_alarm.dev_attr.attr, \
1335 &sensor_dev_attr_temp##_X_##_beep.dev_attr.attr
07584c76 1336
c1685f61
MH
1337static struct attribute *w83627hf_attributes[] = {
1338 &dev_attr_in0_input.attr,
1339 &dev_attr_in0_min.attr,
1340 &dev_attr_in0_max.attr,
e3604c62
JD
1341 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1342 &sensor_dev_attr_in0_beep.dev_attr.attr,
07584c76
JC
1343 VIN_UNIT_ATTRS(2),
1344 VIN_UNIT_ATTRS(3),
1345 VIN_UNIT_ATTRS(4),
1346 VIN_UNIT_ATTRS(7),
1347 VIN_UNIT_ATTRS(8),
1348
1349 FAN_UNIT_ATTRS(1),
1350 FAN_UNIT_ATTRS(2),
1351
1352 TEMP_UNIT_ATTRS(1),
1353 TEMP_UNIT_ATTRS(2),
c1685f61
MH
1354
1355 &dev_attr_alarms.attr,
1c138107 1356 &sensor_dev_attr_beep_enable.dev_attr.attr,
c1685f61
MH
1357 &dev_attr_beep_mask.attr,
1358
07584c76
JC
1359 &sensor_dev_attr_pwm1.dev_attr.attr,
1360 &sensor_dev_attr_pwm2.dev_attr.attr,
787c72b1 1361 &dev_attr_name.attr,
c1685f61
MH
1362 NULL
1363};
1364
1365static const struct attribute_group w83627hf_group = {
1366 .attrs = w83627hf_attributes,
1367};
1368
1369static struct attribute *w83627hf_attributes_opt[] = {
07584c76
JC
1370 VIN_UNIT_ATTRS(1),
1371 VIN_UNIT_ATTRS(5),
1372 VIN_UNIT_ATTRS(6),
1373
1374 FAN_UNIT_ATTRS(3),
1375 TEMP_UNIT_ATTRS(3),
1376 &sensor_dev_attr_pwm3.dev_attr.attr,
1377
1378 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1379 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1380 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
a95a5ed8
DG
1381
1382 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1383 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1384 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1385
c1685f61
MH
1386 NULL
1387};
1388
1389static const struct attribute_group w83627hf_group_opt = {
1390 .attrs = w83627hf_attributes_opt,
1391};
1392
6c931ae1 1393static int w83627hf_probe(struct platform_device *pdev)
1da177e4 1394{
787c72b1 1395 struct device *dev = &pdev->dev;
a8b3a3a5 1396 struct w83627hf_sio_data *sio_data = dev_get_platdata(dev);
1da177e4 1397 struct w83627hf_data *data;
787c72b1 1398 struct resource *res;
2ca2fcd1 1399 int err, i;
1da177e4 1400
787c72b1
JD
1401 static const char *names[] = {
1402 "w83627hf",
1403 "w83627thf",
1404 "w83697hf",
1405 "w83637hf",
1406 "w83687thf",
1407 };
1408
1409 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
0cf46997 1410 if (!devm_request_region(dev, res->start, WINB_REGION_SIZE, DRVNAME)) {
787c72b1
JD
1411 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1412 (unsigned long)res->start,
1413 (unsigned long)(res->start + WINB_REGION_SIZE - 1));
0cf46997 1414 return -EBUSY;
1da177e4
LT
1415 }
1416
0cf46997
GR
1417 data = devm_kzalloc(dev, sizeof(struct w83627hf_data), GFP_KERNEL);
1418 if (!data)
1419 return -ENOMEM;
1420
787c72b1
JD
1421 data->addr = res->start;
1422 data->type = sio_data->type;
1423 data->name = names[sio_data->type];
9a61bf63 1424 mutex_init(&data->lock);
9a61bf63 1425 mutex_init(&data->update_lock);
787c72b1 1426 platform_set_drvdata(pdev, data);
1da177e4 1427
1da177e4 1428 /* Initialize the chip */
787c72b1 1429 w83627hf_init_device(pdev);
1da177e4
LT
1430
1431 /* A few vars need to be filled upon startup */
2ca2fcd1
JC
1432 for (i = 0; i <= 2; i++)
1433 data->fan_min[i] = w83627hf_read_value(
1434 data, W83627HF_REG_FAN_MIN(i));
c09c5184 1435 w83627hf_update_fan_div(data);
1da177e4 1436
c1685f61 1437 /* Register common device attributes */
27b9de3c
GR
1438 err = sysfs_create_group(&dev->kobj, &w83627hf_group);
1439 if (err)
0cf46997 1440 return err;
1da177e4 1441
c1685f61 1442 /* Register chip-specific device attributes */
787c72b1 1443 if (data->type == w83627hf || data->type == w83697hf)
07584c76
JC
1444 if ((err = device_create_file(dev,
1445 &sensor_dev_attr_in5_input.dev_attr))
1446 || (err = device_create_file(dev,
1447 &sensor_dev_attr_in5_min.dev_attr))
1448 || (err = device_create_file(dev,
1449 &sensor_dev_attr_in5_max.dev_attr))
e3604c62
JD
1450 || (err = device_create_file(dev,
1451 &sensor_dev_attr_in5_alarm.dev_attr))
1452 || (err = device_create_file(dev,
1453 &sensor_dev_attr_in5_beep.dev_attr))
07584c76
JC
1454 || (err = device_create_file(dev,
1455 &sensor_dev_attr_in6_input.dev_attr))
1456 || (err = device_create_file(dev,
1457 &sensor_dev_attr_in6_min.dev_attr))
1458 || (err = device_create_file(dev,
1459 &sensor_dev_attr_in6_max.dev_attr))
e3604c62
JD
1460 || (err = device_create_file(dev,
1461 &sensor_dev_attr_in6_alarm.dev_attr))
1462 || (err = device_create_file(dev,
1463 &sensor_dev_attr_in6_beep.dev_attr))
07584c76
JC
1464 || (err = device_create_file(dev,
1465 &sensor_dev_attr_pwm1_freq.dev_attr))
1466 || (err = device_create_file(dev,
1467 &sensor_dev_attr_pwm2_freq.dev_attr)))
0cf46997 1468 goto error;
1da177e4 1469
787c72b1 1470 if (data->type != w83697hf)
07584c76
JC
1471 if ((err = device_create_file(dev,
1472 &sensor_dev_attr_in1_input.dev_attr))
1473 || (err = device_create_file(dev,
1474 &sensor_dev_attr_in1_min.dev_attr))
1475 || (err = device_create_file(dev,
1476 &sensor_dev_attr_in1_max.dev_attr))
e3604c62
JD
1477 || (err = device_create_file(dev,
1478 &sensor_dev_attr_in1_alarm.dev_attr))
1479 || (err = device_create_file(dev,
1480 &sensor_dev_attr_in1_beep.dev_attr))
07584c76
JC
1481 || (err = device_create_file(dev,
1482 &sensor_dev_attr_fan3_input.dev_attr))
1483 || (err = device_create_file(dev,
1484 &sensor_dev_attr_fan3_min.dev_attr))
1485 || (err = device_create_file(dev,
1486 &sensor_dev_attr_fan3_div.dev_attr))
e3604c62
JD
1487 || (err = device_create_file(dev,
1488 &sensor_dev_attr_fan3_alarm.dev_attr))
1489 || (err = device_create_file(dev,
1490 &sensor_dev_attr_fan3_beep.dev_attr))
07584c76
JC
1491 || (err = device_create_file(dev,
1492 &sensor_dev_attr_temp3_input.dev_attr))
1493 || (err = device_create_file(dev,
1494 &sensor_dev_attr_temp3_max.dev_attr))
1495 || (err = device_create_file(dev,
1496 &sensor_dev_attr_temp3_max_hyst.dev_attr))
e3604c62
JD
1497 || (err = device_create_file(dev,
1498 &sensor_dev_attr_temp3_alarm.dev_attr))
1499 || (err = device_create_file(dev,
1500 &sensor_dev_attr_temp3_beep.dev_attr))
07584c76
JC
1501 || (err = device_create_file(dev,
1502 &sensor_dev_attr_temp3_type.dev_attr)))
0cf46997 1503 goto error;
c1685f61 1504
787c72b1 1505 if (data->type != w83697hf && data->vid != 0xff) {
8a665a05
JD
1506 /* Convert VID to voltage based on VRM */
1507 data->vrm = vid_which_vrm();
1508
787c72b1
JD
1509 if ((err = device_create_file(dev, &dev_attr_cpu0_vid))
1510 || (err = device_create_file(dev, &dev_attr_vrm)))
0cf46997 1511 goto error;
8a665a05 1512 }
1da177e4 1513
787c72b1 1514 if (data->type == w83627thf || data->type == w83637hf
27b9de3c
GR
1515 || data->type == w83687thf) {
1516 err = device_create_file(dev, &sensor_dev_attr_pwm3.dev_attr);
1517 if (err)
0cf46997 1518 goto error;
27b9de3c 1519 }
1da177e4 1520
1550cb6d 1521 if (data->type == w83637hf || data->type == w83687thf)
07584c76
JC
1522 if ((err = device_create_file(dev,
1523 &sensor_dev_attr_pwm1_freq.dev_attr))
1524 || (err = device_create_file(dev,
1525 &sensor_dev_attr_pwm2_freq.dev_attr))
1526 || (err = device_create_file(dev,
1527 &sensor_dev_attr_pwm3_freq.dev_attr)))
0cf46997 1528 goto error;
1550cb6d 1529
a95a5ed8
DG
1530 if (data->type != w83627hf)
1531 if ((err = device_create_file(dev,
1532 &sensor_dev_attr_pwm1_enable.dev_attr))
1533 || (err = device_create_file(dev,
1534 &sensor_dev_attr_pwm2_enable.dev_attr)))
0cf46997 1535 goto error;
a95a5ed8
DG
1536
1537 if (data->type == w83627thf || data->type == w83637hf
27b9de3c
GR
1538 || data->type == w83687thf) {
1539 err = device_create_file(dev,
1540 &sensor_dev_attr_pwm3_enable.dev_attr);
1541 if (err)
0cf46997 1542 goto error;
27b9de3c 1543 }
a95a5ed8 1544
1beeffe4
TJ
1545 data->hwmon_dev = hwmon_device_register(dev);
1546 if (IS_ERR(data->hwmon_dev)) {
1547 err = PTR_ERR(data->hwmon_dev);
0cf46997 1548 goto error;
c1685f61 1549 }
1da177e4
LT
1550
1551 return 0;
1552
0cf46997 1553 error:
787c72b1
JD
1554 sysfs_remove_group(&dev->kobj, &w83627hf_group);
1555 sysfs_remove_group(&dev->kobj, &w83627hf_group_opt);
1da177e4
LT
1556 return err;
1557}
1558
281dfd0b 1559static int w83627hf_remove(struct platform_device *pdev)
1da177e4 1560{
787c72b1 1561 struct w83627hf_data *data = platform_get_drvdata(pdev);
1da177e4 1562
1beeffe4 1563 hwmon_device_unregister(data->hwmon_dev);
943b0830 1564
787c72b1
JD
1565 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group);
1566 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt);
787c72b1 1567
1da177e4
LT
1568 return 0;
1569}
1570
d58df9cd
JD
1571/* Registers 0x50-0x5f are banked */
1572static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg)
1573{
1574 if ((reg & 0x00f0) == 0x50) {
1575 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1576 outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET);
1577 }
1578}
1579
1580/* Not strictly necessary, but play it safe for now */
1581static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg)
1582{
1583 if (reg & 0xff00) {
1584 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1585 outb_p(0, data->addr + W83781D_DATA_REG_OFFSET);
1586 }
1587}
1588
787c72b1 1589static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
1da177e4 1590{
1da177e4
LT
1591 int res, word_sized;
1592
9a61bf63 1593 mutex_lock(&data->lock);
1da177e4
LT
1594 word_sized = (((reg & 0xff00) == 0x100)
1595 || ((reg & 0xff00) == 0x200))
1596 && (((reg & 0x00ff) == 0x50)
1597 || ((reg & 0x00ff) == 0x53)
1598 || ((reg & 0x00ff) == 0x55));
d58df9cd 1599 w83627hf_set_bank(data, reg);
787c72b1
JD
1600 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1601 res = inb_p(data->addr + W83781D_DATA_REG_OFFSET);
1da177e4
LT
1602 if (word_sized) {
1603 outb_p((reg & 0xff) + 1,
787c72b1 1604 data->addr + W83781D_ADDR_REG_OFFSET);
1da177e4 1605 res =
787c72b1 1606 (res << 8) + inb_p(data->addr +
1da177e4
LT
1607 W83781D_DATA_REG_OFFSET);
1608 }
d58df9cd 1609 w83627hf_reset_bank(data, reg);
9a61bf63 1610 mutex_unlock(&data->lock);
1da177e4
LT
1611 return res;
1612}
1613
6c931ae1 1614static int w83627thf_read_gpio5(struct platform_device *pdev)
1da177e4 1615{
a8b3a3a5 1616 struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev);
1da177e4
LT
1617 int res = 0xff, sel;
1618
e95fd518
GR
1619 if (superio_enter(sio_data)) {
1620 /*
1621 * Some other driver reserved the address space for itself.
1622 * We don't want to fail driver instantiation because of that,
1623 * so display a warning and keep going.
1624 */
1625 dev_warn(&pdev->dev,
1626 "Can not read VID data: Failed to enable SuperIO access\n");
1627 return res;
1628 }
1629
b72656db 1630 superio_select(sio_data, W83627HF_LD_GPIO5);
1da177e4 1631
e95fd518
GR
1632 res = 0xff;
1633
1da177e4 1634 /* Make sure these GPIO pins are enabled */
b72656db 1635 if (!(superio_inb(sio_data, W83627THF_GPIO5_EN) & (1<<3))) {
787c72b1 1636 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
1da177e4
LT
1637 goto exit;
1638 }
1639
27b9de3c
GR
1640 /*
1641 * Make sure the pins are configured for input
1642 * There must be at least five (VRM 9), and possibly 6 (VRM 10)
1643 */
b72656db 1644 sel = superio_inb(sio_data, W83627THF_GPIO5_IOSR) & 0x3f;
1da177e4 1645 if ((sel & 0x1f) != 0x1f) {
787c72b1 1646 dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
1da177e4
LT
1647 "function\n");
1648 goto exit;
1649 }
1650
787c72b1 1651 dev_info(&pdev->dev, "Reading VID from GPIO5\n");
b72656db 1652 res = superio_inb(sio_data, W83627THF_GPIO5_DR) & sel;
1da177e4
LT
1653
1654exit:
b72656db 1655 superio_exit(sio_data);
1da177e4
LT
1656 return res;
1657}
1658
6c931ae1 1659static int w83687thf_read_vid(struct platform_device *pdev)
c2db6ce1 1660{
a8b3a3a5 1661 struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev);
c2db6ce1
JD
1662 int res = 0xff;
1663
e95fd518
GR
1664 if (superio_enter(sio_data)) {
1665 /*
1666 * Some other driver reserved the address space for itself.
1667 * We don't want to fail driver instantiation because of that,
1668 * so display a warning and keep going.
1669 */
1670 dev_warn(&pdev->dev,
1671 "Can not read VID data: Failed to enable SuperIO access\n");
1672 return res;
1673 }
1674
b72656db 1675 superio_select(sio_data, W83627HF_LD_HWM);
c2db6ce1
JD
1676
1677 /* Make sure these GPIO pins are enabled */
b72656db 1678 if (!(superio_inb(sio_data, W83687THF_VID_EN) & (1 << 2))) {
787c72b1 1679 dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
c2db6ce1
JD
1680 goto exit;
1681 }
1682
1683 /* Make sure the pins are configured for input */
b72656db 1684 if (!(superio_inb(sio_data, W83687THF_VID_CFG) & (1 << 4))) {
787c72b1 1685 dev_dbg(&pdev->dev, "VID configured as output, "
c2db6ce1
JD
1686 "no VID function\n");
1687 goto exit;
1688 }
1689
b72656db 1690 res = superio_inb(sio_data, W83687THF_VID_DATA) & 0x3f;
c2db6ce1
JD
1691
1692exit:
b72656db 1693 superio_exit(sio_data);
c2db6ce1
JD
1694 return res;
1695}
1696
787c72b1 1697static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value)
1da177e4 1698{
1da177e4
LT
1699 int word_sized;
1700
9a61bf63 1701 mutex_lock(&data->lock);
1da177e4
LT
1702 word_sized = (((reg & 0xff00) == 0x100)
1703 || ((reg & 0xff00) == 0x200))
1704 && (((reg & 0x00ff) == 0x53)
1705 || ((reg & 0x00ff) == 0x55));
d58df9cd 1706 w83627hf_set_bank(data, reg);
787c72b1 1707 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1da177e4
LT
1708 if (word_sized) {
1709 outb_p(value >> 8,
787c72b1 1710 data->addr + W83781D_DATA_REG_OFFSET);
1da177e4 1711 outb_p((reg & 0xff) + 1,
787c72b1 1712 data->addr + W83781D_ADDR_REG_OFFSET);
1da177e4
LT
1713 }
1714 outb_p(value & 0xff,
787c72b1 1715 data->addr + W83781D_DATA_REG_OFFSET);
d58df9cd 1716 w83627hf_reset_bank(data, reg);
9a61bf63 1717 mutex_unlock(&data->lock);
1da177e4
LT
1718 return 0;
1719}
1720
6c931ae1 1721static void w83627hf_init_device(struct platform_device *pdev)
1da177e4 1722{
787c72b1 1723 struct w83627hf_data *data = platform_get_drvdata(pdev);
1da177e4 1724 int i;
d27c37c0 1725 enum chips type = data->type;
1da177e4
LT
1726 u8 tmp;
1727
1da177e4
LT
1728 /* Minimize conflicts with other winbond i2c-only clients... */
1729 /* disable i2c subclients... how to disable main i2c client?? */
1730 /* force i2c address to relatively uncommon address */
8f3c7c54
JD
1731 if (type == w83627hf) {
1732 w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
1733 w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
1734 }
1da177e4
LT
1735
1736 /* Read VID only once */
d27c37c0 1737 if (type == w83627hf || type == w83637hf) {
787c72b1
JD
1738 int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1739 int hi = w83627hf_read_value(data, W83781D_REG_CHIPID);
1da177e4 1740 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
d27c37c0 1741 } else if (type == w83627thf) {
787c72b1 1742 data->vid = w83627thf_read_gpio5(pdev);
d27c37c0 1743 } else if (type == w83687thf) {
787c72b1 1744 data->vid = w83687thf_read_vid(pdev);
1da177e4
LT
1745 }
1746
1747 /* Read VRM & OVT Config only once */
d27c37c0 1748 if (type == w83627thf || type == w83637hf || type == w83687thf) {
1da177e4 1749 data->vrm_ovt =
787c72b1 1750 w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG);
1da177e4
LT
1751 }
1752
787c72b1 1753 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1da177e4
LT
1754 for (i = 1; i <= 3; i++) {
1755 if (!(tmp & BIT_SCFG1[i - 1])) {
b26f9330 1756 data->sens[i - 1] = 4;
1da177e4
LT
1757 } else {
1758 if (w83627hf_read_value
787c72b1 1759 (data,
1da177e4
LT
1760 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1761 data->sens[i - 1] = 1;
1762 else
1763 data->sens[i - 1] = 2;
1764 }
1765 if ((type == w83697hf) && (i == 2))
1766 break;
1767 }
1768
1769 if(init) {
1770 /* Enable temp2 */
df48ed80 1771 tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG);
1da177e4 1772 if (tmp & 0x01) {
787c72b1 1773 dev_warn(&pdev->dev, "Enabling temp2, readings "
1da177e4 1774 "might not make sense\n");
df48ed80 1775 w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG,
1da177e4
LT
1776 tmp & 0xfe);
1777 }
1778
1779 /* Enable temp3 */
1780 if (type != w83697hf) {
787c72b1 1781 tmp = w83627hf_read_value(data,
df48ed80 1782 W83627HF_REG_TEMP3_CONFIG);
1da177e4 1783 if (tmp & 0x01) {
787c72b1 1784 dev_warn(&pdev->dev, "Enabling temp3, "
1da177e4 1785 "readings might not make sense\n");
787c72b1 1786 w83627hf_write_value(data,
df48ed80 1787 W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe);
1da177e4
LT
1788 }
1789 }
1da177e4
LT
1790 }
1791
1792 /* Start monitoring */
787c72b1
JD
1793 w83627hf_write_value(data, W83781D_REG_CONFIG,
1794 (w83627hf_read_value(data,
1da177e4
LT
1795 W83781D_REG_CONFIG) & 0xf7)
1796 | 0x01);
ef878b11
JD
1797
1798 /* Enable VBAT monitoring if needed */
1799 tmp = w83627hf_read_value(data, W83781D_REG_VBAT);
1800 if (!(tmp & 0x01))
1801 w83627hf_write_value(data, W83781D_REG_VBAT, tmp | 0x01);
1da177e4
LT
1802}
1803
c09c5184
JD
1804static void w83627hf_update_fan_div(struct w83627hf_data *data)
1805{
1806 int reg;
1807
1808 reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1809 data->fan_div[0] = (reg >> 4) & 0x03;
1810 data->fan_div[1] = (reg >> 6) & 0x03;
1811 if (data->type != w83697hf) {
1812 data->fan_div[2] = (w83627hf_read_value(data,
1813 W83781D_REG_PIN) >> 6) & 0x03;
1814 }
1815 reg = w83627hf_read_value(data, W83781D_REG_VBAT);
1816 data->fan_div[0] |= (reg >> 3) & 0x04;
1817 data->fan_div[1] |= (reg >> 4) & 0x04;
1818 if (data->type != w83697hf)
1819 data->fan_div[2] |= (reg >> 5) & 0x04;
1820}
1821
1da177e4
LT
1822static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1823{
787c72b1 1824 struct w83627hf_data *data = dev_get_drvdata(dev);
df48ed80 1825 int i, num_temps = (data->type == w83697hf) ? 2 : 3;
a95a5ed8 1826 int num_pwms = (data->type == w83697hf) ? 2 : 3;
1da177e4 1827
9a61bf63 1828 mutex_lock(&data->update_lock);
1da177e4
LT
1829
1830 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1831 || !data->valid) {
1832 for (i = 0; i <= 8; i++) {
1833 /* skip missing sensors */
1834 if (((data->type == w83697hf) && (i == 1)) ||
c2db6ce1 1835 ((data->type != w83627hf && data->type != w83697hf)
4a1c4447 1836 && (i == 5 || i == 6)))
1da177e4
LT
1837 continue;
1838 data->in[i] =
787c72b1 1839 w83627hf_read_value(data, W83781D_REG_IN(i));
1da177e4 1840 data->in_min[i] =
787c72b1 1841 w83627hf_read_value(data,
1da177e4
LT
1842 W83781D_REG_IN_MIN(i));
1843 data->in_max[i] =
787c72b1 1844 w83627hf_read_value(data,
1da177e4
LT
1845 W83781D_REG_IN_MAX(i));
1846 }
2ca2fcd1
JC
1847 for (i = 0; i <= 2; i++) {
1848 data->fan[i] =
1849 w83627hf_read_value(data, W83627HF_REG_FAN(i));
1850 data->fan_min[i] =
787c72b1 1851 w83627hf_read_value(data,
2ca2fcd1 1852 W83627HF_REG_FAN_MIN(i));
1da177e4 1853 }
07584c76 1854 for (i = 0; i <= 2; i++) {
787c72b1 1855 u8 tmp = w83627hf_read_value(data,
1da177e4
LT
1856 W836X7HF_REG_PWM(data->type, i));
1857 /* bits 0-3 are reserved in 627THF */
1858 if (data->type == w83627thf)
1859 tmp &= 0xf0;
07584c76
JC
1860 data->pwm[i] = tmp;
1861 if (i == 1 &&
1862 (data->type == w83627hf || data->type == w83697hf))
1da177e4
LT
1863 break;
1864 }
1550cb6d
COM
1865 if (data->type == w83627hf) {
1866 u8 tmp = w83627hf_read_value(data,
1867 W83627HF_REG_PWM_FREQ);
1868 data->pwm_freq[0] = tmp & 0x07;
1869 data->pwm_freq[1] = (tmp >> 4) & 0x07;
1870 } else if (data->type != w83627thf) {
1871 for (i = 1; i <= 3; i++) {
1872 data->pwm_freq[i - 1] =
1873 w83627hf_read_value(data,
1874 W83637HF_REG_PWM_FREQ[i - 1]);
1875 if (i == 2 && (data->type == w83697hf))
1876 break;
1877 }
1878 }
a95a5ed8
DG
1879 if (data->type != w83627hf) {
1880 for (i = 0; i < num_pwms; i++) {
1881 u8 tmp = w83627hf_read_value(data,
1882 W83627THF_REG_PWM_ENABLE[i]);
1883 data->pwm_enable[i] =
1884 ((tmp >> W83627THF_PWM_ENABLE_SHIFT[i])
1885 & 0x03) + 1;
1886 }
1887 }
df48ed80
JC
1888 for (i = 0; i < num_temps; i++) {
1889 data->temp[i] = w83627hf_read_value(
1890 data, w83627hf_reg_temp[i]);
1891 data->temp_max[i] = w83627hf_read_value(
1892 data, w83627hf_reg_temp_over[i]);
1893 data->temp_max_hyst[i] = w83627hf_read_value(
1894 data, w83627hf_reg_temp_hyst[i]);
1da177e4
LT
1895 }
1896
c09c5184
JD
1897 w83627hf_update_fan_div(data);
1898
1da177e4 1899 data->alarms =
787c72b1
JD
1900 w83627hf_read_value(data, W83781D_REG_ALARM1) |
1901 (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) |
1902 (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16);
1903 i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
1c138107 1904 data->beep_mask = (i << 8) |
787c72b1
JD
1905 w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) |
1906 w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16;
1da177e4
LT
1907 data->last_updated = jiffies;
1908 data->valid = 1;
1909 }
1910
9a61bf63 1911 mutex_unlock(&data->update_lock);
1da177e4
LT
1912
1913 return data;
1914}
1915
787c72b1
JD
1916static int __init w83627hf_device_add(unsigned short address,
1917 const struct w83627hf_sio_data *sio_data)
1918{
1919 struct resource res = {
1920 .start = address + WINB_REGION_OFFSET,
1921 .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1,
1922 .name = DRVNAME,
1923 .flags = IORESOURCE_IO,
1924 };
1925 int err;
1926
b9acb64a
JD
1927 err = acpi_check_resource_conflict(&res);
1928 if (err)
1929 goto exit;
1930
787c72b1
JD
1931 pdev = platform_device_alloc(DRVNAME, address);
1932 if (!pdev) {
1933 err = -ENOMEM;
18de030f 1934 pr_err("Device allocation failed\n");
787c72b1
JD
1935 goto exit;
1936 }
1937
1938 err = platform_device_add_resources(pdev, &res, 1);
1939 if (err) {
18de030f 1940 pr_err("Device resource addition failed (%d)\n", err);
787c72b1
JD
1941 goto exit_device_put;
1942 }
1943
2df6d811
JD
1944 err = platform_device_add_data(pdev, sio_data,
1945 sizeof(struct w83627hf_sio_data));
1946 if (err) {
18de030f 1947 pr_err("Platform data allocation failed\n");
787c72b1
JD
1948 goto exit_device_put;
1949 }
787c72b1
JD
1950
1951 err = platform_device_add(pdev);
1952 if (err) {
18de030f 1953 pr_err("Device addition failed (%d)\n", err);
787c72b1
JD
1954 goto exit_device_put;
1955 }
1956
1957 return 0;
1958
1959exit_device_put:
1960 platform_device_put(pdev);
1961exit:
1962 return err;
1963}
1964
1da177e4
LT
1965static int __init sensors_w83627hf_init(void)
1966{
787c72b1
JD
1967 int err;
1968 unsigned short address;
1969 struct w83627hf_sio_data sio_data;
1970
1971 if (w83627hf_find(0x2e, &address, &sio_data)
1972 && w83627hf_find(0x4e, &address, &sio_data))
1da177e4 1973 return -ENODEV;
1da177e4 1974
787c72b1
JD
1975 err = platform_driver_register(&w83627hf_driver);
1976 if (err)
1977 goto exit;
1978
1979 /* Sets global pdev as a side effect */
1980 err = w83627hf_device_add(address, &sio_data);
1981 if (err)
1982 goto exit_driver;
1983
1984 return 0;
1985
1986exit_driver:
1987 platform_driver_unregister(&w83627hf_driver);
1988exit:
1989 return err;
1da177e4
LT
1990}
1991
1992static void __exit sensors_w83627hf_exit(void)
1993{
787c72b1
JD
1994 platform_device_unregister(pdev);
1995 platform_driver_unregister(&w83627hf_driver);
1da177e4
LT
1996}
1997
1998MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1999 "Philip Edelbrock <phil@netroedge.com>, "
2000 "and Mark Studebaker <mdsxyz123@yahoo.com>");
2001MODULE_DESCRIPTION("W83627HF driver");
2002MODULE_LICENSE("GPL");
2003
2004module_init(sensors_w83627hf_init);
2005module_exit(sensors_w83627hf_exit);