hwmon: (s3c) Use dev_get_drvdata()
[linux-2.6-block.git] / drivers / hwmon / w83627hf.c
CommitLineData
1da177e4 1/*
27b9de3c
GR
2 * w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring
4 * Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 * Philip Edelbrock <phil@netroedge.com>,
6 * and Mark Studebaker <mdsxyz123@yahoo.com>
7 * Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
7c81c60f 8 * Copyright (c) 2007 - 1012 Jean Delvare <jdelvare@suse.de>
27b9de3c
GR
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
1da177e4
LT
24
25/*
27b9de3c
GR
26 * Supports following chips:
27 *
4101ece3 28 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
27b9de3c
GR
29 * w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
30 * w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
31 * w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
32 * w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
33 * w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
34 *
35 * For other winbond chips, and for i2c support in the above chips,
36 * use w83781d.c.
37 *
38 * Note: automatic ("cruise") fan control for 697, 637 & 627thf not
39 * supported yet.
40 */
1da177e4 41
18de030f
JP
42#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
43
1da177e4
LT
44#include <linux/module.h>
45#include <linux/init.h>
46#include <linux/slab.h>
47#include <linux/jiffies.h>
787c72b1 48#include <linux/platform_device.h>
943b0830 49#include <linux/hwmon.h>
07584c76 50#include <linux/hwmon-sysfs.h>
303760b4 51#include <linux/hwmon-vid.h>
943b0830 52#include <linux/err.h>
9a61bf63 53#include <linux/mutex.h>
d27c37c0 54#include <linux/ioport.h>
b9acb64a 55#include <linux/acpi.h>
6055fae8 56#include <linux/io.h>
1da177e4
LT
57#include "lm75.h"
58
787c72b1 59static struct platform_device *pdev;
d27c37c0
JD
60
61#define DRVNAME "w83627hf"
62enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
63
b72656db
JD
64struct w83627hf_sio_data {
65 enum chips type;
66 int sioaddr;
67};
68
1da177e4
LT
69static u8 force_i2c = 0x1f;
70module_param(force_i2c, byte, 0);
71MODULE_PARM_DESC(force_i2c,
72 "Initialize the i2c address of the sensors");
73
90ab5ee9 74static bool init = 1;
1da177e4
LT
75module_param(init, bool, 0);
76MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
77
67b671bc
JD
78static unsigned short force_id;
79module_param(force_id, ushort, 0);
80MODULE_PARM_DESC(force_id, "Override the detected device ID");
81
1da177e4 82/* modified from kernel/include/traps.c */
27b9de3c 83#define DEV 0x07 /* Register: Logical device select */
1da177e4
LT
84
85/* logical device numbers for superio_select (below) */
86#define W83627HF_LD_FDC 0x00
87#define W83627HF_LD_PRT 0x01
88#define W83627HF_LD_UART1 0x02
89#define W83627HF_LD_UART2 0x03
90#define W83627HF_LD_KBC 0x05
91#define W83627HF_LD_CIR 0x06 /* w83627hf only */
92#define W83627HF_LD_GAME 0x07
93#define W83627HF_LD_MIDI 0x07
94#define W83627HF_LD_GPIO1 0x07
95#define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
96#define W83627HF_LD_GPIO2 0x08
97#define W83627HF_LD_GPIO3 0x09
98#define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
99#define W83627HF_LD_ACPI 0x0a
100#define W83627HF_LD_HWM 0x0b
101
27b9de3c 102#define DEVID 0x20 /* Register: Device ID */
1da177e4
LT
103
104#define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
105#define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
106#define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
107
c2db6ce1
JD
108#define W83687THF_VID_EN 0x29 /* w83687thf only */
109#define W83687THF_VID_CFG 0xF0 /* w83687thf only */
110#define W83687THF_VID_DATA 0xF1 /* w83687thf only */
111
1da177e4 112static inline void
b72656db 113superio_outb(struct w83627hf_sio_data *sio, int reg, int val)
1da177e4 114{
b72656db
JD
115 outb(reg, sio->sioaddr);
116 outb(val, sio->sioaddr + 1);
1da177e4
LT
117}
118
119static inline int
b72656db 120superio_inb(struct w83627hf_sio_data *sio, int reg)
1da177e4 121{
b72656db
JD
122 outb(reg, sio->sioaddr);
123 return inb(sio->sioaddr + 1);
1da177e4
LT
124}
125
126static inline void
b72656db 127superio_select(struct w83627hf_sio_data *sio, int ld)
1da177e4 128{
b72656db
JD
129 outb(DEV, sio->sioaddr);
130 outb(ld, sio->sioaddr + 1);
1da177e4
LT
131}
132
e95fd518 133static inline int
b72656db 134superio_enter(struct w83627hf_sio_data *sio)
1da177e4 135{
e95fd518
GR
136 if (!request_muxed_region(sio->sioaddr, 2, DRVNAME))
137 return -EBUSY;
138
b72656db
JD
139 outb(0x87, sio->sioaddr);
140 outb(0x87, sio->sioaddr);
e95fd518
GR
141
142 return 0;
1da177e4
LT
143}
144
145static inline void
b72656db 146superio_exit(struct w83627hf_sio_data *sio)
1da177e4 147{
b72656db 148 outb(0xAA, sio->sioaddr);
e95fd518 149 release_region(sio->sioaddr, 2);
1da177e4
LT
150}
151
152#define W627_DEVID 0x52
153#define W627THF_DEVID 0x82
154#define W697_DEVID 0x60
155#define W637_DEVID 0x70
c2db6ce1 156#define W687THF_DEVID 0x85
1da177e4
LT
157#define WINB_ACT_REG 0x30
158#define WINB_BASE_REG 0x60
159/* Constants specified below */
160
ada0c2f8
PV
161/* Alignment of the base address */
162#define WINB_ALIGNMENT ~7
1da177e4 163
ada0c2f8
PV
164/* Offset & size of I/O region we are interested in */
165#define WINB_REGION_OFFSET 5
166#define WINB_REGION_SIZE 2
167
787c72b1
JD
168/* Where are the sensors address/data registers relative to the region offset */
169#define W83781D_ADDR_REG_OFFSET 0
170#define W83781D_DATA_REG_OFFSET 1
1da177e4
LT
171
172/* The W83781D registers */
173/* The W83782D registers for nr=7,8 are in bank 5 */
174#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
175 (0x554 + (((nr) - 7) * 2)))
176#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
177 (0x555 + (((nr) - 7) * 2)))
178#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
179 (0x550 + (nr) - 7))
180
2ca2fcd1
JC
181/* nr:0-2 for fans:1-3 */
182#define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr))
183#define W83627HF_REG_FAN(nr) (0x28 + (nr))
1da177e4 184
df48ed80
JC
185#define W83627HF_REG_TEMP2_CONFIG 0x152
186#define W83627HF_REG_TEMP3_CONFIG 0x252
187/* these are zero-based, unlike config constants above */
188static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 };
189static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 };
190static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 };
1da177e4
LT
191
192#define W83781D_REG_BANK 0x4E
193
194#define W83781D_REG_CONFIG 0x40
4a1c4447
YM
195#define W83781D_REG_ALARM1 0x459
196#define W83781D_REG_ALARM2 0x45A
197#define W83781D_REG_ALARM3 0x45B
1da177e4 198
1da177e4
LT
199#define W83781D_REG_BEEP_CONFIG 0x4D
200#define W83781D_REG_BEEP_INTS1 0x56
201#define W83781D_REG_BEEP_INTS2 0x57
202#define W83781D_REG_BEEP_INTS3 0x453
203
204#define W83781D_REG_VID_FANDIV 0x47
205
206#define W83781D_REG_CHIPID 0x49
207#define W83781D_REG_WCHIPID 0x58
208#define W83781D_REG_CHIPMAN 0x4F
209#define W83781D_REG_PIN 0x4B
210
211#define W83781D_REG_VBAT 0x5D
212
213#define W83627HF_REG_PWM1 0x5A
214#define W83627HF_REG_PWM2 0x5B
1da177e4 215
a95a5ed8
DG
216static const u8 W83627THF_REG_PWM_ENABLE[] = {
217 0x04, /* FAN 1 mode */
218 0x04, /* FAN 2 mode */
219 0x12, /* FAN AUX mode */
220};
221static const u8 W83627THF_PWM_ENABLE_SHIFT[] = { 2, 4, 1 };
222
c2db6ce1
JD
223#define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */
224#define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */
225#define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */
1da177e4 226
c2db6ce1 227#define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */
1da177e4
LT
228
229static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
230static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
231 W83627THF_REG_PWM3 };
232#define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
07584c76 233 regpwm_627hf[nr] : regpwm[nr])
1da177e4 234
1550cb6d
COM
235#define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */
236
237#define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */
238#define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */
239#define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */
240
241static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1,
242 W83637HF_REG_PWM_FREQ2,
243 W83637HF_REG_PWM_FREQ3 };
244
245#define W83627HF_BASE_PWM_FREQ 46870
246
1da177e4
LT
247#define W83781D_REG_I2C_ADDR 0x48
248#define W83781D_REG_I2C_SUBADDR 0x4A
249
250/* Sensor selection */
251#define W83781D_REG_SCFG1 0x5D
252static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
253#define W83781D_REG_SCFG2 0x59
254static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
255#define W83781D_DEFAULT_BETA 3435
256
27b9de3c
GR
257/*
258 * Conversions. Limit checking is only done on the TO_REG
259 * variants. Note that you should be a bit careful with which arguments
260 * these macros are called: arguments may be evaluated more than once.
261 * Fixing this is just not worth it.
262 */
2a844c14 263#define IN_TO_REG(val) (clamp_val((((val) + 8) / 16), 0, 255))
1da177e4
LT
264#define IN_FROM_REG(val) ((val) * 16)
265
266static inline u8 FAN_TO_REG(long rpm, int div)
267{
268 if (rpm == 0)
269 return 255;
2a844c14
GR
270 rpm = clamp_val(rpm, 1, 1000000);
271 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
1da177e4
LT
272}
273
274#define TEMP_MIN (-128000)
275#define TEMP_MAX ( 127000)
276
27b9de3c
GR
277/*
278 * TEMP: 0.001C/bit (-128C to +127C)
279 * REG: 1C/bit, two's complement
280 */
5bfedac0 281static u8 TEMP_TO_REG(long temp)
1da177e4 282{
2a844c14
GR
283 int ntemp = clamp_val(temp, TEMP_MIN, TEMP_MAX);
284 ntemp += (ntemp < 0 ? -500 : 500);
285 return (u8)(ntemp / 1000);
1da177e4
LT
286}
287
288static int TEMP_FROM_REG(u8 reg)
289{
290 return (s8)reg * 1000;
291}
292
293#define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
294
2a844c14 295#define PWM_TO_REG(val) (clamp_val((val), 0, 255))
1da177e4 296
1550cb6d
COM
297static inline unsigned long pwm_freq_from_reg_627hf(u8 reg)
298{
299 unsigned long freq;
300 freq = W83627HF_BASE_PWM_FREQ >> reg;
301 return freq;
302}
303static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
304{
305 u8 i;
27b9de3c
GR
306 /*
307 * Only 5 dividers (1 2 4 8 16)
308 * Search for the nearest available frequency
309 */
1550cb6d
COM
310 for (i = 0; i < 4; i++) {
311 if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
312 (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2))
313 break;
314 }
315 return i;
316}
317
318static inline unsigned long pwm_freq_from_reg(u8 reg)
319{
320 /* Clock bit 8 -> 180 kHz or 24 MHz */
321 unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;
322
323 reg &= 0x7f;
324 /* This should not happen but anyway... */
325 if (reg == 0)
326 reg++;
7fe83ad8 327 return clock / (reg << 8);
1550cb6d
COM
328}
329static inline u8 pwm_freq_to_reg(unsigned long val)
330{
331 /* Minimum divider value is 0x01 and maximum is 0x7F */
332 if (val >= 93750) /* The highest we can do */
333 return 0x01;
334 if (val >= 720) /* Use 24 MHz clock */
7fe83ad8 335 return 24000000UL / (val << 8);
1550cb6d
COM
336 if (val < 6) /* The lowest we can do */
337 return 0xFF;
338 else /* Use 180 kHz clock */
7fe83ad8 339 return 0x80 | (180000UL / (val << 8));
1550cb6d
COM
340}
341
1c138107
JD
342#define BEEP_MASK_FROM_REG(val) ((val) & 0xff7fff)
343#define BEEP_MASK_TO_REG(val) ((val) & 0xff7fff)
1da177e4
LT
344
345#define DIV_FROM_REG(val) (1 << (val))
346
347static inline u8 DIV_TO_REG(long val)
348{
349 int i;
2a844c14 350 val = clamp_val(val, 1, 128) >> 1;
abc01922 351 for (i = 0; i < 7; i++) {
1da177e4
LT
352 if (val == 0)
353 break;
354 val >>= 1;
355 }
7fe83ad8 356 return (u8)i;
1da177e4
LT
357}
358
27b9de3c
GR
359/*
360 * For each registered chip, we need to keep some data in memory.
361 * The structure is dynamically allocated.
362 */
1da177e4 363struct w83627hf_data {
787c72b1
JD
364 unsigned short addr;
365 const char *name;
1beeffe4 366 struct device *hwmon_dev;
9a61bf63 367 struct mutex lock;
1da177e4
LT
368 enum chips type;
369
9a61bf63 370 struct mutex update_lock;
1da177e4
LT
371 char valid; /* !=0 if following fields are valid */
372 unsigned long last_updated; /* In jiffies */
373
1da177e4
LT
374 u8 in[9]; /* Register value */
375 u8 in_max[9]; /* Register value */
376 u8 in_min[9]; /* Register value */
377 u8 fan[3]; /* Register value */
378 u8 fan_min[3]; /* Register value */
df48ed80
JC
379 u16 temp[3]; /* Register value */
380 u16 temp_max[3]; /* Register value */
381 u16 temp_max_hyst[3]; /* Register value */
1da177e4
LT
382 u8 fan_div[3]; /* Register encoding, shifted right */
383 u8 vid; /* Register encoding, combined */
384 u32 alarms; /* Register encoding, combined */
385 u32 beep_mask; /* Register encoding, combined */
1da177e4 386 u8 pwm[3]; /* Register value */
a95a5ed8 387 u8 pwm_enable[3]; /* 1 = manual
27b9de3c
GR
388 * 2 = thermal cruise (also called SmartFan I)
389 * 3 = fan speed cruise
390 */
1550cb6d 391 u8 pwm_freq[3]; /* Register value */
b26f9330 392 u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode;
27b9de3c
GR
393 * 4 = thermistor
394 */
1da177e4 395 u8 vrm;
c2db6ce1 396 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
275b7d6e
JD
397
398#ifdef CONFIG_PM
399 /* Remember extra register values over suspend/resume */
400 u8 scfg1;
401 u8 scfg2;
402#endif
1da177e4
LT
403};
404
787c72b1 405static int w83627hf_probe(struct platform_device *pdev);
281dfd0b 406static int w83627hf_remove(struct platform_device *pdev);
787c72b1
JD
407
408static int w83627hf_read_value(struct w83627hf_data *data, u16 reg);
409static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value);
c09c5184 410static void w83627hf_update_fan_div(struct w83627hf_data *data);
1da177e4 411static struct w83627hf_data *w83627hf_update_device(struct device *dev);
787c72b1 412static void w83627hf_init_device(struct platform_device *pdev);
1da177e4 413
275b7d6e
JD
414#ifdef CONFIG_PM
415static int w83627hf_suspend(struct device *dev)
416{
417 struct w83627hf_data *data = w83627hf_update_device(dev);
418
419 mutex_lock(&data->update_lock);
420 data->scfg1 = w83627hf_read_value(data, W83781D_REG_SCFG1);
421 data->scfg2 = w83627hf_read_value(data, W83781D_REG_SCFG2);
422 mutex_unlock(&data->update_lock);
423
424 return 0;
425}
426
427static int w83627hf_resume(struct device *dev)
428{
429 struct w83627hf_data *data = dev_get_drvdata(dev);
430 int i, num_temps = (data->type == w83697hf) ? 2 : 3;
431
432 /* Restore limits */
433 mutex_lock(&data->update_lock);
434 for (i = 0; i <= 8; i++) {
435 /* skip missing sensors */
436 if (((data->type == w83697hf) && (i == 1)) ||
437 ((data->type != w83627hf && data->type != w83697hf)
438 && (i == 5 || i == 6)))
439 continue;
440 w83627hf_write_value(data, W83781D_REG_IN_MAX(i),
441 data->in_max[i]);
442 w83627hf_write_value(data, W83781D_REG_IN_MIN(i),
443 data->in_min[i]);
444 }
445 for (i = 0; i <= 2; i++)
446 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(i),
447 data->fan_min[i]);
448 for (i = 0; i < num_temps; i++) {
449 w83627hf_write_value(data, w83627hf_reg_temp_over[i],
450 data->temp_max[i]);
451 w83627hf_write_value(data, w83627hf_reg_temp_hyst[i],
452 data->temp_max_hyst[i]);
453 }
454
455 /* Fixup BIOS bugs */
456 if (data->type == w83627thf || data->type == w83637hf ||
457 data->type == w83687thf)
458 w83627hf_write_value(data, W83627THF_REG_VRM_OVT_CFG,
459 data->vrm_ovt);
460 w83627hf_write_value(data, W83781D_REG_SCFG1, data->scfg1);
461 w83627hf_write_value(data, W83781D_REG_SCFG2, data->scfg2);
462
463 /* Force re-reading all values */
464 data->valid = 0;
465 mutex_unlock(&data->update_lock);
466
467 return 0;
468}
469
470static const struct dev_pm_ops w83627hf_dev_pm_ops = {
471 .suspend = w83627hf_suspend,
472 .resume = w83627hf_resume,
473};
474
475#define W83627HF_DEV_PM_OPS (&w83627hf_dev_pm_ops)
476#else
477#define W83627HF_DEV_PM_OPS NULL
478#endif /* CONFIG_PM */
479
787c72b1 480static struct platform_driver w83627hf_driver = {
cdaf7934 481 .driver = {
d27c37c0 482 .name = DRVNAME,
275b7d6e 483 .pm = W83627HF_DEV_PM_OPS,
cdaf7934 484 },
787c72b1 485 .probe = w83627hf_probe,
9e5e9b7a 486 .remove = w83627hf_remove,
1da177e4
LT
487};
488
07584c76 489static ssize_t
502a92ff 490in_input_show(struct device *dev, struct device_attribute *devattr, char *buf)
07584c76
JC
491{
492 int nr = to_sensor_dev_attr(devattr)->index;
493 struct w83627hf_data *data = w83627hf_update_device(dev);
494 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr]));
1da177e4 495}
07584c76 496static ssize_t
502a92ff 497in_min_show(struct device *dev, struct device_attribute *devattr, char *buf)
07584c76
JC
498{
499 int nr = to_sensor_dev_attr(devattr)->index;
500 struct w83627hf_data *data = w83627hf_update_device(dev);
501 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr]));
502}
503static ssize_t
502a92ff 504in_max_show(struct device *dev, struct device_attribute *devattr, char *buf)
07584c76
JC
505{
506 int nr = to_sensor_dev_attr(devattr)->index;
507 struct w83627hf_data *data = w83627hf_update_device(dev);
508 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr]));
1da177e4 509}
07584c76 510static ssize_t
502a92ff 511in_min_store(struct device *dev, struct device_attribute *devattr,
07584c76
JC
512 const char *buf, size_t count)
513{
514 int nr = to_sensor_dev_attr(devattr)->index;
515 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
516 long val;
517 int err;
518
519 err = kstrtol(buf, 10, &val);
520 if (err)
521 return err;
1da177e4 522
07584c76
JC
523 mutex_lock(&data->update_lock);
524 data->in_min[nr] = IN_TO_REG(val);
525 w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]);
526 mutex_unlock(&data->update_lock);
527 return count;
528}
529static ssize_t
502a92ff 530in_max_store(struct device *dev, struct device_attribute *devattr,
07584c76
JC
531 const char *buf, size_t count)
532{
533 int nr = to_sensor_dev_attr(devattr)->index;
534 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
535 long val;
536 int err;
537
538 err = kstrtol(buf, 10, &val);
539 if (err)
540 return err;
1da177e4 541
07584c76
JC
542 mutex_lock(&data->update_lock);
543 data->in_max[nr] = IN_TO_REG(val);
544 w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]);
545 mutex_unlock(&data->update_lock);
546 return count;
547}
502a92ff
GR
548
549static SENSOR_DEVICE_ATTR_RO(in1_input, in_input, 1);
550static SENSOR_DEVICE_ATTR_RW(in1_min, in_min, 1);
551static SENSOR_DEVICE_ATTR_RW(in1_max, in_max, 1);
552static SENSOR_DEVICE_ATTR_RO(in2_input, in_input, 2);
553static SENSOR_DEVICE_ATTR_RW(in2_min, in_min, 2);
554static SENSOR_DEVICE_ATTR_RW(in2_max, in_max, 2);
555static SENSOR_DEVICE_ATTR_RO(in3_input, in_input, 3);
556static SENSOR_DEVICE_ATTR_RW(in3_min, in_min, 3);
557static SENSOR_DEVICE_ATTR_RW(in3_max, in_max, 3);
558static SENSOR_DEVICE_ATTR_RO(in4_input, in_input, 4);
559static SENSOR_DEVICE_ATTR_RW(in4_min, in_min, 4);
560static SENSOR_DEVICE_ATTR_RW(in4_max, in_max, 4);
561static SENSOR_DEVICE_ATTR_RO(in5_input, in_input, 5);
562static SENSOR_DEVICE_ATTR_RW(in5_min, in_min, 5);
563static SENSOR_DEVICE_ATTR_RW(in5_max, in_max, 5);
564static SENSOR_DEVICE_ATTR_RO(in6_input, in_input, 6);
565static SENSOR_DEVICE_ATTR_RW(in6_min, in_min, 6);
566static SENSOR_DEVICE_ATTR_RW(in6_max, in_max, 6);
567static SENSOR_DEVICE_ATTR_RO(in7_input, in_input, 7);
568static SENSOR_DEVICE_ATTR_RW(in7_min, in_min, 7);
569static SENSOR_DEVICE_ATTR_RW(in7_max, in_max, 7);
570static SENSOR_DEVICE_ATTR_RO(in8_input, in_input, 8);
571static SENSOR_DEVICE_ATTR_RW(in8_min, in_min, 8);
572static SENSOR_DEVICE_ATTR_RW(in8_max, in_max, 8);
1da177e4
LT
573
574/* use a different set of functions for in0 */
575static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
576{
577 long in0;
578
579 if ((data->vrm_ovt & 0x01) &&
c2db6ce1
JD
580 (w83627thf == data->type || w83637hf == data->type
581 || w83687thf == data->type))
1da177e4
LT
582
583 /* use VRM9 calculation */
584 in0 = (long)((reg * 488 + 70000 + 50) / 100);
585 else
586 /* use VRM8 (standard) calculation */
587 in0 = (long)IN_FROM_REG(reg);
588
589 return sprintf(buf,"%ld\n", in0);
590}
591
8dfcdfc1
JL
592static ssize_t in0_input_show(struct device *dev,
593 struct device_attribute *attr, char *buf)
1da177e4
LT
594{
595 struct w83627hf_data *data = w83627hf_update_device(dev);
596 return show_in_0(data, buf, data->in[0]);
597}
598
8dfcdfc1
JL
599static ssize_t in0_min_show(struct device *dev, struct device_attribute *attr,
600 char *buf)
1da177e4
LT
601{
602 struct w83627hf_data *data = w83627hf_update_device(dev);
603 return show_in_0(data, buf, data->in_min[0]);
604}
605
8dfcdfc1
JL
606static ssize_t in0_max_show(struct device *dev, struct device_attribute *attr,
607 char *buf)
1da177e4
LT
608{
609 struct w83627hf_data *data = w83627hf_update_device(dev);
610 return show_in_0(data, buf, data->in_max[0]);
611}
612
8dfcdfc1
JL
613static ssize_t in0_min_store(struct device *dev,
614 struct device_attribute *attr, const char *buf,
615 size_t count)
1da177e4 616{
787c72b1 617 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
618 unsigned long val;
619 int err;
1da177e4 620
27b9de3c
GR
621 err = kstrtoul(buf, 10, &val);
622 if (err)
623 return err;
1da177e4 624
9a61bf63 625 mutex_lock(&data->update_lock);
1da177e4
LT
626
627 if ((data->vrm_ovt & 0x01) &&
c2db6ce1
JD
628 (w83627thf == data->type || w83637hf == data->type
629 || w83687thf == data->type))
1da177e4
LT
630
631 /* use VRM9 calculation */
2723ab91 632 data->in_min[0] =
2a844c14 633 clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255);
1da177e4
LT
634 else
635 /* use VRM8 (standard) calculation */
636 data->in_min[0] = IN_TO_REG(val);
637
787c72b1 638 w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]);
9a61bf63 639 mutex_unlock(&data->update_lock);
1da177e4
LT
640 return count;
641}
642
8dfcdfc1
JL
643static ssize_t in0_max_store(struct device *dev,
644 struct device_attribute *attr, const char *buf,
645 size_t count)
1da177e4 646{
787c72b1 647 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
648 unsigned long val;
649 int err;
1da177e4 650
27b9de3c
GR
651 err = kstrtoul(buf, 10, &val);
652 if (err)
653 return err;
1da177e4 654
9a61bf63 655 mutex_lock(&data->update_lock);
1da177e4
LT
656
657 if ((data->vrm_ovt & 0x01) &&
c2db6ce1
JD
658 (w83627thf == data->type || w83637hf == data->type
659 || w83687thf == data->type))
1da177e4
LT
660
661 /* use VRM9 calculation */
2723ab91 662 data->in_max[0] =
2a844c14 663 clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255);
1da177e4
LT
664 else
665 /* use VRM8 (standard) calculation */
666 data->in_max[0] = IN_TO_REG(val);
667
787c72b1 668 w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]);
9a61bf63 669 mutex_unlock(&data->update_lock);
1da177e4
LT
670 return count;
671}
672
8dfcdfc1
JL
673static DEVICE_ATTR_RO(in0_input);
674static DEVICE_ATTR_RW(in0_min);
675static DEVICE_ATTR_RW(in0_max);
1da177e4 676
07584c76 677static ssize_t
502a92ff
GR
678fan_input_show(struct device *dev, struct device_attribute *devattr,
679 char *buf)
07584c76
JC
680{
681 int nr = to_sensor_dev_attr(devattr)->index;
682 struct w83627hf_data *data = w83627hf_update_device(dev);
683 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr],
684 (long)DIV_FROM_REG(data->fan_div[nr])));
685}
686static ssize_t
502a92ff 687fan_min_show(struct device *dev, struct device_attribute *devattr, char *buf)
07584c76
JC
688{
689 int nr = to_sensor_dev_attr(devattr)->index;
690 struct w83627hf_data *data = w83627hf_update_device(dev);
691 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr],
692 (long)DIV_FROM_REG(data->fan_div[nr])));
1da177e4 693}
1da177e4 694static ssize_t
502a92ff 695fan_min_store(struct device *dev, struct device_attribute *devattr,
07584c76 696 const char *buf, size_t count)
1da177e4 697{
07584c76 698 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 699 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
700 unsigned long val;
701 int err;
702
703 err = kstrtoul(buf, 10, &val);
704 if (err)
705 return err;
1da177e4 706
9a61bf63 707 mutex_lock(&data->update_lock);
07584c76 708 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
2ca2fcd1 709 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr),
07584c76 710 data->fan_min[nr]);
1da177e4 711
9a61bf63 712 mutex_unlock(&data->update_lock);
1da177e4
LT
713 return count;
714}
715
502a92ff
GR
716static SENSOR_DEVICE_ATTR_RO(fan1_input, fan_input, 0);
717static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
718static SENSOR_DEVICE_ATTR_RO(fan2_input, fan_input, 1);
719static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
720static SENSOR_DEVICE_ATTR_RO(fan3_input, fan_input, 2);
721static SENSOR_DEVICE_ATTR_RW(fan3_min, fan_min, 2);
1da177e4 722
07584c76 723static ssize_t
502a92ff 724temp_show(struct device *dev, struct device_attribute *devattr, char *buf)
07584c76
JC
725{
726 int nr = to_sensor_dev_attr(devattr)->index;
727 struct w83627hf_data *data = w83627hf_update_device(dev);
df48ed80
JC
728
729 u16 tmp = data->temp[nr];
730 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
731 : (long) TEMP_FROM_REG(tmp));
1da177e4 732}
1da177e4 733
07584c76 734static ssize_t
502a92ff 735temp_max_show(struct device *dev, struct device_attribute *devattr, char *buf)
07584c76
JC
736{
737 int nr = to_sensor_dev_attr(devattr)->index;
738 struct w83627hf_data *data = w83627hf_update_device(dev);
df48ed80
JC
739
740 u16 tmp = data->temp_max[nr];
741 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
742 : (long) TEMP_FROM_REG(tmp));
1da177e4 743}
1da177e4 744
07584c76 745static ssize_t
502a92ff 746temp_max_hyst_show(struct device *dev, struct device_attribute *devattr,
07584c76
JC
747 char *buf)
748{
749 int nr = to_sensor_dev_attr(devattr)->index;
750 struct w83627hf_data *data = w83627hf_update_device(dev);
df48ed80
JC
751
752 u16 tmp = data->temp_max_hyst[nr];
753 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
754 : (long) TEMP_FROM_REG(tmp));
07584c76 755}
1da177e4 756
07584c76 757static ssize_t
502a92ff 758temp_max_store(struct device *dev, struct device_attribute *devattr,
07584c76
JC
759 const char *buf, size_t count)
760{
761 int nr = to_sensor_dev_attr(devattr)->index;
762 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
763 u16 tmp;
764 long val;
765 int err;
1da177e4 766
27b9de3c
GR
767 err = kstrtol(buf, 10, &val);
768 if (err)
769 return err;
770
771 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
07584c76 772 mutex_lock(&data->update_lock);
df48ed80
JC
773 data->temp_max[nr] = tmp;
774 w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp);
07584c76
JC
775 mutex_unlock(&data->update_lock);
776 return count;
777}
778
779static ssize_t
502a92ff 780temp_max_hyst_store(struct device *dev, struct device_attribute *devattr,
07584c76
JC
781 const char *buf, size_t count)
782{
783 int nr = to_sensor_dev_attr(devattr)->index;
784 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
785 u16 tmp;
786 long val;
787 int err;
788
789 err = kstrtol(buf, 10, &val);
790 if (err)
791 return err;
07584c76 792
27b9de3c 793 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
07584c76 794 mutex_lock(&data->update_lock);
df48ed80
JC
795 data->temp_max_hyst[nr] = tmp;
796 w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp);
07584c76
JC
797 mutex_unlock(&data->update_lock);
798 return count;
799}
800
502a92ff
GR
801static SENSOR_DEVICE_ATTR_RO(temp1_input, temp, 0);
802static SENSOR_DEVICE_ATTR_RW(temp1_max, temp_max, 0);
803static SENSOR_DEVICE_ATTR_RW(temp1_max_hyst, temp_max_hyst, 0);
804static SENSOR_DEVICE_ATTR_RO(temp2_input, temp, 1);
805static SENSOR_DEVICE_ATTR_RW(temp2_max, temp_max, 1);
806static SENSOR_DEVICE_ATTR_RW(temp2_max_hyst, temp_max_hyst, 1);
807static SENSOR_DEVICE_ATTR_RO(temp3_input, temp, 2);
808static SENSOR_DEVICE_ATTR_RW(temp3_max, temp_max, 2);
809static SENSOR_DEVICE_ATTR_RW(temp3_max_hyst, temp_max_hyst, 2);
1da177e4 810
1da177e4 811static ssize_t
8dfcdfc1 812cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
813{
814 struct w83627hf_data *data = w83627hf_update_device(dev);
815 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
816}
8dfcdfc1 817static DEVICE_ATTR_RO(cpu0_vid);
1da177e4
LT
818
819static ssize_t
8dfcdfc1 820vrm_show(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4 821{
90d6619a 822 struct w83627hf_data *data = dev_get_drvdata(dev);
1da177e4
LT
823 return sprintf(buf, "%ld\n", (long) data->vrm);
824}
825static ssize_t
8dfcdfc1
JL
826vrm_store(struct device *dev, struct device_attribute *attr, const char *buf,
827 size_t count)
1da177e4 828{
787c72b1 829 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
830 unsigned long val;
831 int err;
1da177e4 832
27b9de3c
GR
833 err = kstrtoul(buf, 10, &val);
834 if (err)
835 return err;
970255b7
AL
836
837 if (val > 255)
838 return -EINVAL;
1da177e4
LT
839 data->vrm = val;
840
841 return count;
842}
8dfcdfc1 843static DEVICE_ATTR_RW(vrm);
1da177e4
LT
844
845static ssize_t
8dfcdfc1 846alarms_show(struct device *dev, struct device_attribute *attr, char *buf)
1da177e4
LT
847{
848 struct w83627hf_data *data = w83627hf_update_device(dev);
849 return sprintf(buf, "%ld\n", (long) data->alarms);
850}
8dfcdfc1 851static DEVICE_ATTR_RO(alarms);
1da177e4 852
e3604c62 853static ssize_t
502a92ff 854alarm_show(struct device *dev, struct device_attribute *attr, char *buf)
e3604c62
JD
855{
856 struct w83627hf_data *data = w83627hf_update_device(dev);
857 int bitnr = to_sensor_dev_attr(attr)->index;
858 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
859}
502a92ff
GR
860static SENSOR_DEVICE_ATTR_RO(in0_alarm, alarm, 0);
861static SENSOR_DEVICE_ATTR_RO(in1_alarm, alarm, 1);
862static SENSOR_DEVICE_ATTR_RO(in2_alarm, alarm, 2);
863static SENSOR_DEVICE_ATTR_RO(in3_alarm, alarm, 3);
864static SENSOR_DEVICE_ATTR_RO(in4_alarm, alarm, 8);
865static SENSOR_DEVICE_ATTR_RO(in5_alarm, alarm, 9);
866static SENSOR_DEVICE_ATTR_RO(in6_alarm, alarm, 10);
867static SENSOR_DEVICE_ATTR_RO(in7_alarm, alarm, 16);
868static SENSOR_DEVICE_ATTR_RO(in8_alarm, alarm, 17);
869static SENSOR_DEVICE_ATTR_RO(fan1_alarm, alarm, 6);
870static SENSOR_DEVICE_ATTR_RO(fan2_alarm, alarm, 7);
871static SENSOR_DEVICE_ATTR_RO(fan3_alarm, alarm, 11);
872static SENSOR_DEVICE_ATTR_RO(temp1_alarm, alarm, 4);
873static SENSOR_DEVICE_ATTR_RO(temp2_alarm, alarm, 5);
874static SENSOR_DEVICE_ATTR_RO(temp3_alarm, alarm, 13);
e3604c62 875
1c138107 876static ssize_t
8dfcdfc1 877beep_mask_show(struct device *dev, struct device_attribute *attr, char *buf)
1c138107
JD
878{
879 struct w83627hf_data *data = w83627hf_update_device(dev);
880 return sprintf(buf, "%ld\n",
881 (long)BEEP_MASK_FROM_REG(data->beep_mask));
1da177e4 882}
1da177e4
LT
883
884static ssize_t
8dfcdfc1 885beep_mask_store(struct device *dev, struct device_attribute *attr,
1c138107 886 const char *buf, size_t count)
1da177e4 887{
787c72b1 888 struct w83627hf_data *data = dev_get_drvdata(dev);
1c138107 889 unsigned long val;
27b9de3c 890 int err;
1da177e4 891
27b9de3c
GR
892 err = kstrtoul(buf, 10, &val);
893 if (err)
894 return err;
1da177e4 895
9a61bf63 896 mutex_lock(&data->update_lock);
1da177e4 897
1c138107
JD
898 /* preserve beep enable */
899 data->beep_mask = (data->beep_mask & 0x8000)
900 | BEEP_MASK_TO_REG(val);
901 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1,
902 data->beep_mask & 0xff);
903 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3,
904 ((data->beep_mask) >> 16) & 0xff);
787c72b1 905 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2,
1c138107 906 (data->beep_mask >> 8) & 0xff);
1da177e4 907
9a61bf63 908 mutex_unlock(&data->update_lock);
1da177e4
LT
909 return count;
910}
911
8dfcdfc1 912static DEVICE_ATTR_RW(beep_mask);
1da177e4 913
e3604c62 914static ssize_t
502a92ff 915beep_show(struct device *dev, struct device_attribute *attr, char *buf)
e3604c62
JD
916{
917 struct w83627hf_data *data = w83627hf_update_device(dev);
918 int bitnr = to_sensor_dev_attr(attr)->index;
919 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
920}
921
922static ssize_t
502a92ff
GR
923beep_store(struct device *dev, struct device_attribute *attr, const char *buf,
924 size_t count)
e3604c62
JD
925{
926 struct w83627hf_data *data = dev_get_drvdata(dev);
927 int bitnr = to_sensor_dev_attr(attr)->index;
e3604c62 928 u8 reg;
27b9de3c
GR
929 unsigned long bit;
930 int err;
931
932 err = kstrtoul(buf, 10, &bit);
933 if (err)
934 return err;
e3604c62 935
e3604c62
JD
936 if (bit & ~1)
937 return -EINVAL;
938
939 mutex_lock(&data->update_lock);
940 if (bit)
941 data->beep_mask |= (1 << bitnr);
942 else
943 data->beep_mask &= ~(1 << bitnr);
944
945 if (bitnr < 8) {
946 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS1);
947 if (bit)
948 reg |= (1 << bitnr);
949 else
950 reg &= ~(1 << bitnr);
951 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, reg);
952 } else if (bitnr < 16) {
953 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
954 if (bit)
955 reg |= (1 << (bitnr - 8));
956 else
957 reg &= ~(1 << (bitnr - 8));
958 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, reg);
959 } else {
960 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS3);
961 if (bit)
962 reg |= (1 << (bitnr - 16));
963 else
964 reg &= ~(1 << (bitnr - 16));
965 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, reg);
966 }
967 mutex_unlock(&data->update_lock);
968
969 return count;
970}
971
502a92ff
GR
972static SENSOR_DEVICE_ATTR_RW(in0_beep, beep, 0);
973static SENSOR_DEVICE_ATTR_RW(in1_beep, beep, 1);
974static SENSOR_DEVICE_ATTR_RW(in2_beep, beep, 2);
975static SENSOR_DEVICE_ATTR_RW(in3_beep, beep, 3);
976static SENSOR_DEVICE_ATTR_RW(in4_beep, beep, 8);
977static SENSOR_DEVICE_ATTR_RW(in5_beep, beep, 9);
978static SENSOR_DEVICE_ATTR_RW(in6_beep, beep, 10);
979static SENSOR_DEVICE_ATTR_RW(in7_beep, beep, 16);
980static SENSOR_DEVICE_ATTR_RW(in8_beep, beep, 17);
981static SENSOR_DEVICE_ATTR_RW(fan1_beep, beep, 6);
982static SENSOR_DEVICE_ATTR_RW(fan2_beep, beep, 7);
983static SENSOR_DEVICE_ATTR_RW(fan3_beep, beep, 11);
984static SENSOR_DEVICE_ATTR_RW(temp1_beep, beep, 4);
985static SENSOR_DEVICE_ATTR_RW(temp2_beep, beep, 5);
986static SENSOR_DEVICE_ATTR_RW(temp3_beep, beep, 13);
987static SENSOR_DEVICE_ATTR_RW(beep_enable, beep, 15);
e3604c62 988
1da177e4 989static ssize_t
502a92ff 990fan_div_show(struct device *dev, struct device_attribute *devattr, char *buf)
1da177e4 991{
07584c76 992 int nr = to_sensor_dev_attr(devattr)->index;
1da177e4
LT
993 struct w83627hf_data *data = w83627hf_update_device(dev);
994 return sprintf(buf, "%ld\n",
07584c76 995 (long) DIV_FROM_REG(data->fan_div[nr]));
1da177e4 996}
27b9de3c
GR
997/*
998 * Note: we save and restore the fan minimum here, because its value is
999 * determined in part by the fan divisor. This follows the principle of
1000 * least surprise; the user doesn't expect the fan minimum to change just
1001 * because the divisor changed.
1002 */
1da177e4 1003static ssize_t
502a92ff 1004fan_div_store(struct device *dev, struct device_attribute *devattr,
07584c76 1005 const char *buf, size_t count)
1da177e4 1006{
07584c76 1007 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 1008 struct w83627hf_data *data = dev_get_drvdata(dev);
1da177e4
LT
1009 unsigned long min;
1010 u8 reg;
27b9de3c
GR
1011 unsigned long val;
1012 int err;
1013
1014 err = kstrtoul(buf, 10, &val);
1015 if (err)
1016 return err;
1da177e4 1017
9a61bf63 1018 mutex_lock(&data->update_lock);
1da177e4
LT
1019
1020 /* Save fan_min */
1021 min = FAN_FROM_REG(data->fan_min[nr],
1022 DIV_FROM_REG(data->fan_div[nr]));
1023
1024 data->fan_div[nr] = DIV_TO_REG(val);
1025
787c72b1 1026 reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
1da177e4
LT
1027 & (nr==0 ? 0xcf : 0x3f))
1028 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
787c72b1 1029 w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
1da177e4 1030
787c72b1 1031 reg = (w83627hf_read_value(data, W83781D_REG_VBAT)
1da177e4
LT
1032 & ~(1 << (5 + nr)))
1033 | ((data->fan_div[nr] & 0x04) << (3 + nr));
787c72b1 1034 w83627hf_write_value(data, W83781D_REG_VBAT, reg);
1da177e4
LT
1035
1036 /* Restore fan_min */
1037 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
2ca2fcd1 1038 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]);
1da177e4 1039
9a61bf63 1040 mutex_unlock(&data->update_lock);
1da177e4
LT
1041 return count;
1042}
1043
502a92ff
GR
1044static SENSOR_DEVICE_ATTR_RW(fan1_div, fan_div, 0);
1045static SENSOR_DEVICE_ATTR_RW(fan2_div, fan_div, 1);
1046static SENSOR_DEVICE_ATTR_RW(fan3_div, fan_div, 2);
1da177e4 1047
1da177e4 1048static ssize_t
502a92ff 1049pwm_show(struct device *dev, struct device_attribute *devattr, char *buf)
1da177e4 1050{
07584c76 1051 int nr = to_sensor_dev_attr(devattr)->index;
1da177e4 1052 struct w83627hf_data *data = w83627hf_update_device(dev);
07584c76 1053 return sprintf(buf, "%ld\n", (long) data->pwm[nr]);
1da177e4
LT
1054}
1055
1056static ssize_t
502a92ff 1057pwm_store(struct device *dev, struct device_attribute *devattr,
07584c76 1058 const char *buf, size_t count)
1da177e4 1059{
07584c76 1060 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 1061 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
1062 unsigned long val;
1063 int err;
1064
1065 err = kstrtoul(buf, 10, &val);
1066 if (err)
1067 return err;
1da177e4 1068
9a61bf63 1069 mutex_lock(&data->update_lock);
1da177e4
LT
1070
1071 if (data->type == w83627thf) {
1072 /* bits 0-3 are reserved in 627THF */
07584c76 1073 data->pwm[nr] = PWM_TO_REG(val) & 0xf0;
787c72b1 1074 w83627hf_write_value(data,
1da177e4 1075 W836X7HF_REG_PWM(data->type, nr),
07584c76 1076 data->pwm[nr] |
787c72b1 1077 (w83627hf_read_value(data,
1da177e4
LT
1078 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
1079 } else {
07584c76 1080 data->pwm[nr] = PWM_TO_REG(val);
787c72b1 1081 w83627hf_write_value(data,
1da177e4 1082 W836X7HF_REG_PWM(data->type, nr),
07584c76 1083 data->pwm[nr]);
1da177e4
LT
1084 }
1085
9a61bf63 1086 mutex_unlock(&data->update_lock);
1da177e4
LT
1087 return count;
1088}
1089
502a92ff
GR
1090static SENSOR_DEVICE_ATTR_RW(pwm1, pwm, 0);
1091static SENSOR_DEVICE_ATTR_RW(pwm2, pwm, 1);
1092static SENSOR_DEVICE_ATTR_RW(pwm3, pwm, 2);
1da177e4 1093
a95a5ed8 1094static ssize_t
502a92ff
GR
1095pwm_enable_show(struct device *dev, struct device_attribute *devattr,
1096 char *buf)
a95a5ed8
DG
1097{
1098 int nr = to_sensor_dev_attr(devattr)->index;
1099 struct w83627hf_data *data = w83627hf_update_device(dev);
1100 return sprintf(buf, "%d\n", data->pwm_enable[nr]);
1101}
1102
1103static ssize_t
502a92ff
GR
1104pwm_enable_store(struct device *dev, struct device_attribute *devattr,
1105 const char *buf, size_t count)
a95a5ed8
DG
1106{
1107 int nr = to_sensor_dev_attr(devattr)->index;
1108 struct w83627hf_data *data = dev_get_drvdata(dev);
a95a5ed8 1109 u8 reg;
27b9de3c
GR
1110 unsigned long val;
1111 int err;
a95a5ed8 1112
27b9de3c
GR
1113 err = kstrtoul(buf, 10, &val);
1114 if (err)
1115 return err;
1116
1117 if (!val || val > 3) /* modes 1, 2 and 3 are supported */
a95a5ed8
DG
1118 return -EINVAL;
1119 mutex_lock(&data->update_lock);
1120 data->pwm_enable[nr] = val;
1121 reg = w83627hf_read_value(data, W83627THF_REG_PWM_ENABLE[nr]);
1122 reg &= ~(0x03 << W83627THF_PWM_ENABLE_SHIFT[nr]);
1123 reg |= (val - 1) << W83627THF_PWM_ENABLE_SHIFT[nr];
1124 w83627hf_write_value(data, W83627THF_REG_PWM_ENABLE[nr], reg);
1125 mutex_unlock(&data->update_lock);
1126 return count;
1127}
1128
502a92ff
GR
1129static SENSOR_DEVICE_ATTR_RW(pwm1_enable, pwm_enable, 0);
1130static SENSOR_DEVICE_ATTR_RW(pwm2_enable, pwm_enable, 1);
1131static SENSOR_DEVICE_ATTR_RW(pwm3_enable, pwm_enable, 2);
a95a5ed8 1132
1550cb6d 1133static ssize_t
502a92ff 1134pwm_freq_show(struct device *dev, struct device_attribute *devattr, char *buf)
1550cb6d 1135{
07584c76 1136 int nr = to_sensor_dev_attr(devattr)->index;
1550cb6d
COM
1137 struct w83627hf_data *data = w83627hf_update_device(dev);
1138 if (data->type == w83627hf)
1139 return sprintf(buf, "%ld\n",
07584c76 1140 pwm_freq_from_reg_627hf(data->pwm_freq[nr]));
1550cb6d
COM
1141 else
1142 return sprintf(buf, "%ld\n",
07584c76 1143 pwm_freq_from_reg(data->pwm_freq[nr]));
1550cb6d
COM
1144}
1145
1146static ssize_t
502a92ff 1147pwm_freq_store(struct device *dev, struct device_attribute *devattr,
07584c76 1148 const char *buf, size_t count)
1550cb6d 1149{
07584c76 1150 int nr = to_sensor_dev_attr(devattr)->index;
1550cb6d
COM
1151 struct w83627hf_data *data = dev_get_drvdata(dev);
1152 static const u8 mask[]={0xF8, 0x8F};
27b9de3c
GR
1153 unsigned long val;
1154 int err;
1550cb6d 1155
27b9de3c
GR
1156 err = kstrtoul(buf, 10, &val);
1157 if (err)
1158 return err;
1550cb6d
COM
1159
1160 mutex_lock(&data->update_lock);
1161
1162 if (data->type == w83627hf) {
07584c76 1163 data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val);
1550cb6d 1164 w83627hf_write_value(data, W83627HF_REG_PWM_FREQ,
07584c76 1165 (data->pwm_freq[nr] << (nr*4)) |
1550cb6d 1166 (w83627hf_read_value(data,
07584c76 1167 W83627HF_REG_PWM_FREQ) & mask[nr]));
1550cb6d 1168 } else {
07584c76
JC
1169 data->pwm_freq[nr] = pwm_freq_to_reg(val);
1170 w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr],
1171 data->pwm_freq[nr]);
1550cb6d
COM
1172 }
1173
1174 mutex_unlock(&data->update_lock);
1175 return count;
1176}
1177
502a92ff
GR
1178static SENSOR_DEVICE_ATTR_RW(pwm1_freq, pwm_freq, 0);
1179static SENSOR_DEVICE_ATTR_RW(pwm2_freq, pwm_freq, 1);
1180static SENSOR_DEVICE_ATTR_RW(pwm3_freq, pwm_freq, 2);
1550cb6d 1181
1da177e4 1182static ssize_t
502a92ff 1183temp_type_show(struct device *dev, struct device_attribute *devattr,
07584c76 1184 char *buf)
1da177e4 1185{
07584c76 1186 int nr = to_sensor_dev_attr(devattr)->index;
1da177e4 1187 struct w83627hf_data *data = w83627hf_update_device(dev);
07584c76 1188 return sprintf(buf, "%ld\n", (long) data->sens[nr]);
1da177e4
LT
1189}
1190
1191static ssize_t
502a92ff 1192temp_type_store(struct device *dev, struct device_attribute *devattr,
07584c76 1193 const char *buf, size_t count)
1da177e4 1194{
07584c76 1195 int nr = to_sensor_dev_attr(devattr)->index;
787c72b1 1196 struct w83627hf_data *data = dev_get_drvdata(dev);
27b9de3c
GR
1197 unsigned long val;
1198 u32 tmp;
1199 int err;
1da177e4 1200
27b9de3c
GR
1201 err = kstrtoul(buf, 10, &val);
1202 if (err)
1203 return err;
1da177e4 1204
9a61bf63 1205 mutex_lock(&data->update_lock);
1da177e4
LT
1206
1207 switch (val) {
1208 case 1: /* PII/Celeron diode */
787c72b1
JD
1209 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1210 w83627hf_write_value(data, W83781D_REG_SCFG1,
07584c76 1211 tmp | BIT_SCFG1[nr]);
787c72b1
JD
1212 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1213 w83627hf_write_value(data, W83781D_REG_SCFG2,
07584c76
JC
1214 tmp | BIT_SCFG2[nr]);
1215 data->sens[nr] = val;
1da177e4
LT
1216 break;
1217 case 2: /* 3904 */
787c72b1
JD
1218 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1219 w83627hf_write_value(data, W83781D_REG_SCFG1,
07584c76 1220 tmp | BIT_SCFG1[nr]);
787c72b1
JD
1221 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1222 w83627hf_write_value(data, W83781D_REG_SCFG2,
07584c76
JC
1223 tmp & ~BIT_SCFG2[nr]);
1224 data->sens[nr] = val;
1da177e4 1225 break;
b26f9330
JD
1226 case W83781D_DEFAULT_BETA:
1227 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
1228 "instead\n", W83781D_DEFAULT_BETA);
1229 /* fall through */
1230 case 4: /* thermistor */
787c72b1
JD
1231 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1232 w83627hf_write_value(data, W83781D_REG_SCFG1,
07584c76
JC
1233 tmp & ~BIT_SCFG1[nr]);
1234 data->sens[nr] = val;
1da177e4
LT
1235 break;
1236 default:
787c72b1 1237 dev_err(dev,
b26f9330
JD
1238 "Invalid sensor type %ld; must be 1, 2, or 4\n",
1239 (long) val);
1da177e4
LT
1240 break;
1241 }
1242
9a61bf63 1243 mutex_unlock(&data->update_lock);
1da177e4
LT
1244 return count;
1245}
1246
502a92ff
GR
1247static SENSOR_DEVICE_ATTR_RW(temp1_type, temp_type, 0);
1248static SENSOR_DEVICE_ATTR_RW(temp2_type, temp_type, 1);
1249static SENSOR_DEVICE_ATTR_RW(temp3_type, temp_type, 2);
1da177e4 1250
07584c76 1251static ssize_t
8dfcdfc1 1252name_show(struct device *dev, struct device_attribute *devattr, char *buf)
787c72b1
JD
1253{
1254 struct w83627hf_data *data = dev_get_drvdata(dev);
1255
1256 return sprintf(buf, "%s\n", data->name);
1257}
8dfcdfc1 1258static DEVICE_ATTR_RO(name);
787c72b1
JD
1259
1260static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1261 struct w83627hf_sio_data *sio_data)
1da177e4 1262{
e95fd518 1263 int err;
1da177e4
LT
1264 u16 val;
1265
64f50307 1266 static __initconst char *const names[] = {
787c72b1
JD
1267 "W83627HF",
1268 "W83627THF",
1269 "W83697HF",
1270 "W83637HF",
1271 "W83687THF",
1272 };
1273
c46c0e91 1274 sio_data->sioaddr = sioaddr;
e95fd518
GR
1275 err = superio_enter(sio_data);
1276 if (err)
1277 return err;
1278
1279 err = -ENODEV;
b72656db 1280 val = force_id ? force_id : superio_inb(sio_data, DEVID);
787c72b1
JD
1281 switch (val) {
1282 case W627_DEVID:
1283 sio_data->type = w83627hf;
1284 break;
1285 case W627THF_DEVID:
1286 sio_data->type = w83627thf;
1287 break;
1288 case W697_DEVID:
1289 sio_data->type = w83697hf;
1290 break;
1291 case W637_DEVID:
1292 sio_data->type = w83637hf;
1293 break;
1294 case W687THF_DEVID:
1295 sio_data->type = w83687thf;
1296 break;
e142e2a3
JD
1297 case 0xff: /* No device at all */
1298 goto exit;
787c72b1 1299 default:
e142e2a3 1300 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val);
d27c37c0 1301 goto exit;
1da177e4
LT
1302 }
1303
b72656db
JD
1304 superio_select(sio_data, W83627HF_LD_HWM);
1305 val = (superio_inb(sio_data, WINB_BASE_REG) << 8) |
1306 superio_inb(sio_data, WINB_BASE_REG + 1);
ada0c2f8 1307 *addr = val & WINB_ALIGNMENT;
d27c37c0 1308 if (*addr == 0) {
18de030f 1309 pr_warn("Base address not set, skipping\n");
d27c37c0 1310 goto exit;
1da177e4 1311 }
1da177e4 1312
b72656db 1313 val = superio_inb(sio_data, WINB_ACT_REG);
d27c37c0 1314 if (!(val & 0x01)) {
18de030f 1315 pr_warn("Enabling HWM logical device\n");
b72656db 1316 superio_outb(sio_data, WINB_ACT_REG, val | 0x01);
d27c37c0
JD
1317 }
1318
1319 err = 0;
787c72b1
JD
1320 pr_info(DRVNAME ": Found %s chip at %#x\n",
1321 names[sio_data->type], *addr);
d27c37c0
JD
1322
1323 exit:
b72656db 1324 superio_exit(sio_data);
d27c37c0 1325 return err;
1da177e4
LT
1326}
1327
07584c76
JC
1328#define VIN_UNIT_ATTRS(_X_) \
1329 &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \
1330 &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \
e3604c62
JD
1331 &sensor_dev_attr_in##_X_##_max.dev_attr.attr, \
1332 &sensor_dev_attr_in##_X_##_alarm.dev_attr.attr, \
1333 &sensor_dev_attr_in##_X_##_beep.dev_attr.attr
07584c76
JC
1334
1335#define FAN_UNIT_ATTRS(_X_) \
1336 &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \
1337 &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \
e3604c62
JD
1338 &sensor_dev_attr_fan##_X_##_div.dev_attr.attr, \
1339 &sensor_dev_attr_fan##_X_##_alarm.dev_attr.attr, \
1340 &sensor_dev_attr_fan##_X_##_beep.dev_attr.attr
07584c76
JC
1341
1342#define TEMP_UNIT_ATTRS(_X_) \
1343 &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \
1344 &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \
1345 &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \
e3604c62
JD
1346 &sensor_dev_attr_temp##_X_##_type.dev_attr.attr, \
1347 &sensor_dev_attr_temp##_X_##_alarm.dev_attr.attr, \
1348 &sensor_dev_attr_temp##_X_##_beep.dev_attr.attr
07584c76 1349
c1685f61
MH
1350static struct attribute *w83627hf_attributes[] = {
1351 &dev_attr_in0_input.attr,
1352 &dev_attr_in0_min.attr,
1353 &dev_attr_in0_max.attr,
e3604c62
JD
1354 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1355 &sensor_dev_attr_in0_beep.dev_attr.attr,
07584c76
JC
1356 VIN_UNIT_ATTRS(2),
1357 VIN_UNIT_ATTRS(3),
1358 VIN_UNIT_ATTRS(4),
1359 VIN_UNIT_ATTRS(7),
1360 VIN_UNIT_ATTRS(8),
1361
1362 FAN_UNIT_ATTRS(1),
1363 FAN_UNIT_ATTRS(2),
1364
1365 TEMP_UNIT_ATTRS(1),
1366 TEMP_UNIT_ATTRS(2),
c1685f61
MH
1367
1368 &dev_attr_alarms.attr,
1c138107 1369 &sensor_dev_attr_beep_enable.dev_attr.attr,
c1685f61
MH
1370 &dev_attr_beep_mask.attr,
1371
07584c76
JC
1372 &sensor_dev_attr_pwm1.dev_attr.attr,
1373 &sensor_dev_attr_pwm2.dev_attr.attr,
787c72b1 1374 &dev_attr_name.attr,
c1685f61
MH
1375 NULL
1376};
1377
1378static const struct attribute_group w83627hf_group = {
1379 .attrs = w83627hf_attributes,
1380};
1381
1382static struct attribute *w83627hf_attributes_opt[] = {
07584c76
JC
1383 VIN_UNIT_ATTRS(1),
1384 VIN_UNIT_ATTRS(5),
1385 VIN_UNIT_ATTRS(6),
1386
1387 FAN_UNIT_ATTRS(3),
1388 TEMP_UNIT_ATTRS(3),
1389 &sensor_dev_attr_pwm3.dev_attr.attr,
1390
1391 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1392 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1393 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
a95a5ed8
DG
1394
1395 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1396 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1397 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1398
c1685f61
MH
1399 NULL
1400};
1401
1402static const struct attribute_group w83627hf_group_opt = {
1403 .attrs = w83627hf_attributes_opt,
1404};
1405
6c931ae1 1406static int w83627hf_probe(struct platform_device *pdev)
1da177e4 1407{
787c72b1 1408 struct device *dev = &pdev->dev;
a8b3a3a5 1409 struct w83627hf_sio_data *sio_data = dev_get_platdata(dev);
1da177e4 1410 struct w83627hf_data *data;
787c72b1 1411 struct resource *res;
2ca2fcd1 1412 int err, i;
1da177e4 1413
787c72b1
JD
1414 static const char *names[] = {
1415 "w83627hf",
1416 "w83627thf",
1417 "w83697hf",
1418 "w83637hf",
1419 "w83687thf",
1420 };
1421
1422 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
0cf46997 1423 if (!devm_request_region(dev, res->start, WINB_REGION_SIZE, DRVNAME)) {
787c72b1
JD
1424 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1425 (unsigned long)res->start,
1426 (unsigned long)(res->start + WINB_REGION_SIZE - 1));
0cf46997 1427 return -EBUSY;
1da177e4
LT
1428 }
1429
0cf46997
GR
1430 data = devm_kzalloc(dev, sizeof(struct w83627hf_data), GFP_KERNEL);
1431 if (!data)
1432 return -ENOMEM;
1433
787c72b1
JD
1434 data->addr = res->start;
1435 data->type = sio_data->type;
1436 data->name = names[sio_data->type];
9a61bf63 1437 mutex_init(&data->lock);
9a61bf63 1438 mutex_init(&data->update_lock);
787c72b1 1439 platform_set_drvdata(pdev, data);
1da177e4 1440
1da177e4 1441 /* Initialize the chip */
787c72b1 1442 w83627hf_init_device(pdev);
1da177e4
LT
1443
1444 /* A few vars need to be filled upon startup */
2ca2fcd1
JC
1445 for (i = 0; i <= 2; i++)
1446 data->fan_min[i] = w83627hf_read_value(
1447 data, W83627HF_REG_FAN_MIN(i));
c09c5184 1448 w83627hf_update_fan_div(data);
1da177e4 1449
c1685f61 1450 /* Register common device attributes */
27b9de3c
GR
1451 err = sysfs_create_group(&dev->kobj, &w83627hf_group);
1452 if (err)
0cf46997 1453 return err;
1da177e4 1454
c1685f61 1455 /* Register chip-specific device attributes */
787c72b1 1456 if (data->type == w83627hf || data->type == w83697hf)
07584c76
JC
1457 if ((err = device_create_file(dev,
1458 &sensor_dev_attr_in5_input.dev_attr))
1459 || (err = device_create_file(dev,
1460 &sensor_dev_attr_in5_min.dev_attr))
1461 || (err = device_create_file(dev,
1462 &sensor_dev_attr_in5_max.dev_attr))
e3604c62
JD
1463 || (err = device_create_file(dev,
1464 &sensor_dev_attr_in5_alarm.dev_attr))
1465 || (err = device_create_file(dev,
1466 &sensor_dev_attr_in5_beep.dev_attr))
07584c76
JC
1467 || (err = device_create_file(dev,
1468 &sensor_dev_attr_in6_input.dev_attr))
1469 || (err = device_create_file(dev,
1470 &sensor_dev_attr_in6_min.dev_attr))
1471 || (err = device_create_file(dev,
1472 &sensor_dev_attr_in6_max.dev_attr))
e3604c62
JD
1473 || (err = device_create_file(dev,
1474 &sensor_dev_attr_in6_alarm.dev_attr))
1475 || (err = device_create_file(dev,
1476 &sensor_dev_attr_in6_beep.dev_attr))
07584c76
JC
1477 || (err = device_create_file(dev,
1478 &sensor_dev_attr_pwm1_freq.dev_attr))
1479 || (err = device_create_file(dev,
1480 &sensor_dev_attr_pwm2_freq.dev_attr)))
0cf46997 1481 goto error;
1da177e4 1482
787c72b1 1483 if (data->type != w83697hf)
07584c76
JC
1484 if ((err = device_create_file(dev,
1485 &sensor_dev_attr_in1_input.dev_attr))
1486 || (err = device_create_file(dev,
1487 &sensor_dev_attr_in1_min.dev_attr))
1488 || (err = device_create_file(dev,
1489 &sensor_dev_attr_in1_max.dev_attr))
e3604c62
JD
1490 || (err = device_create_file(dev,
1491 &sensor_dev_attr_in1_alarm.dev_attr))
1492 || (err = device_create_file(dev,
1493 &sensor_dev_attr_in1_beep.dev_attr))
07584c76
JC
1494 || (err = device_create_file(dev,
1495 &sensor_dev_attr_fan3_input.dev_attr))
1496 || (err = device_create_file(dev,
1497 &sensor_dev_attr_fan3_min.dev_attr))
1498 || (err = device_create_file(dev,
1499 &sensor_dev_attr_fan3_div.dev_attr))
e3604c62
JD
1500 || (err = device_create_file(dev,
1501 &sensor_dev_attr_fan3_alarm.dev_attr))
1502 || (err = device_create_file(dev,
1503 &sensor_dev_attr_fan3_beep.dev_attr))
07584c76
JC
1504 || (err = device_create_file(dev,
1505 &sensor_dev_attr_temp3_input.dev_attr))
1506 || (err = device_create_file(dev,
1507 &sensor_dev_attr_temp3_max.dev_attr))
1508 || (err = device_create_file(dev,
1509 &sensor_dev_attr_temp3_max_hyst.dev_attr))
e3604c62
JD
1510 || (err = device_create_file(dev,
1511 &sensor_dev_attr_temp3_alarm.dev_attr))
1512 || (err = device_create_file(dev,
1513 &sensor_dev_attr_temp3_beep.dev_attr))
07584c76
JC
1514 || (err = device_create_file(dev,
1515 &sensor_dev_attr_temp3_type.dev_attr)))
0cf46997 1516 goto error;
c1685f61 1517
787c72b1 1518 if (data->type != w83697hf && data->vid != 0xff) {
8a665a05
JD
1519 /* Convert VID to voltage based on VRM */
1520 data->vrm = vid_which_vrm();
1521
787c72b1
JD
1522 if ((err = device_create_file(dev, &dev_attr_cpu0_vid))
1523 || (err = device_create_file(dev, &dev_attr_vrm)))
0cf46997 1524 goto error;
8a665a05 1525 }
1da177e4 1526
787c72b1 1527 if (data->type == w83627thf || data->type == w83637hf
27b9de3c
GR
1528 || data->type == w83687thf) {
1529 err = device_create_file(dev, &sensor_dev_attr_pwm3.dev_attr);
1530 if (err)
0cf46997 1531 goto error;
27b9de3c 1532 }
1da177e4 1533
1550cb6d 1534 if (data->type == w83637hf || data->type == w83687thf)
07584c76
JC
1535 if ((err = device_create_file(dev,
1536 &sensor_dev_attr_pwm1_freq.dev_attr))
1537 || (err = device_create_file(dev,
1538 &sensor_dev_attr_pwm2_freq.dev_attr))
1539 || (err = device_create_file(dev,
1540 &sensor_dev_attr_pwm3_freq.dev_attr)))
0cf46997 1541 goto error;
1550cb6d 1542
a95a5ed8
DG
1543 if (data->type != w83627hf)
1544 if ((err = device_create_file(dev,
1545 &sensor_dev_attr_pwm1_enable.dev_attr))
1546 || (err = device_create_file(dev,
1547 &sensor_dev_attr_pwm2_enable.dev_attr)))
0cf46997 1548 goto error;
a95a5ed8
DG
1549
1550 if (data->type == w83627thf || data->type == w83637hf
27b9de3c
GR
1551 || data->type == w83687thf) {
1552 err = device_create_file(dev,
1553 &sensor_dev_attr_pwm3_enable.dev_attr);
1554 if (err)
0cf46997 1555 goto error;
27b9de3c 1556 }
a95a5ed8 1557
1beeffe4
TJ
1558 data->hwmon_dev = hwmon_device_register(dev);
1559 if (IS_ERR(data->hwmon_dev)) {
1560 err = PTR_ERR(data->hwmon_dev);
0cf46997 1561 goto error;
c1685f61 1562 }
1da177e4
LT
1563
1564 return 0;
1565
0cf46997 1566 error:
787c72b1
JD
1567 sysfs_remove_group(&dev->kobj, &w83627hf_group);
1568 sysfs_remove_group(&dev->kobj, &w83627hf_group_opt);
1da177e4
LT
1569 return err;
1570}
1571
281dfd0b 1572static int w83627hf_remove(struct platform_device *pdev)
1da177e4 1573{
787c72b1 1574 struct w83627hf_data *data = platform_get_drvdata(pdev);
1da177e4 1575
1beeffe4 1576 hwmon_device_unregister(data->hwmon_dev);
943b0830 1577
787c72b1
JD
1578 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group);
1579 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt);
787c72b1 1580
1da177e4
LT
1581 return 0;
1582}
1583
d58df9cd
JD
1584/* Registers 0x50-0x5f are banked */
1585static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg)
1586{
1587 if ((reg & 0x00f0) == 0x50) {
1588 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1589 outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET);
1590 }
1591}
1592
1593/* Not strictly necessary, but play it safe for now */
1594static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg)
1595{
1596 if (reg & 0xff00) {
1597 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1598 outb_p(0, data->addr + W83781D_DATA_REG_OFFSET);
1599 }
1600}
1601
787c72b1 1602static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
1da177e4 1603{
1da177e4
LT
1604 int res, word_sized;
1605
9a61bf63 1606 mutex_lock(&data->lock);
1da177e4
LT
1607 word_sized = (((reg & 0xff00) == 0x100)
1608 || ((reg & 0xff00) == 0x200))
1609 && (((reg & 0x00ff) == 0x50)
1610 || ((reg & 0x00ff) == 0x53)
1611 || ((reg & 0x00ff) == 0x55));
d58df9cd 1612 w83627hf_set_bank(data, reg);
787c72b1
JD
1613 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1614 res = inb_p(data->addr + W83781D_DATA_REG_OFFSET);
1da177e4
LT
1615 if (word_sized) {
1616 outb_p((reg & 0xff) + 1,
787c72b1 1617 data->addr + W83781D_ADDR_REG_OFFSET);
1da177e4 1618 res =
787c72b1 1619 (res << 8) + inb_p(data->addr +
1da177e4
LT
1620 W83781D_DATA_REG_OFFSET);
1621 }
d58df9cd 1622 w83627hf_reset_bank(data, reg);
9a61bf63 1623 mutex_unlock(&data->lock);
1da177e4
LT
1624 return res;
1625}
1626
6c931ae1 1627static int w83627thf_read_gpio5(struct platform_device *pdev)
1da177e4 1628{
a8b3a3a5 1629 struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev);
1da177e4
LT
1630 int res = 0xff, sel;
1631
e95fd518
GR
1632 if (superio_enter(sio_data)) {
1633 /*
1634 * Some other driver reserved the address space for itself.
1635 * We don't want to fail driver instantiation because of that,
1636 * so display a warning and keep going.
1637 */
1638 dev_warn(&pdev->dev,
1639 "Can not read VID data: Failed to enable SuperIO access\n");
1640 return res;
1641 }
1642
b72656db 1643 superio_select(sio_data, W83627HF_LD_GPIO5);
1da177e4 1644
e95fd518
GR
1645 res = 0xff;
1646
1da177e4 1647 /* Make sure these GPIO pins are enabled */
b72656db 1648 if (!(superio_inb(sio_data, W83627THF_GPIO5_EN) & (1<<3))) {
787c72b1 1649 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
1da177e4
LT
1650 goto exit;
1651 }
1652
27b9de3c
GR
1653 /*
1654 * Make sure the pins are configured for input
1655 * There must be at least five (VRM 9), and possibly 6 (VRM 10)
1656 */
b72656db 1657 sel = superio_inb(sio_data, W83627THF_GPIO5_IOSR) & 0x3f;
1da177e4 1658 if ((sel & 0x1f) != 0x1f) {
787c72b1 1659 dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
1da177e4
LT
1660 "function\n");
1661 goto exit;
1662 }
1663
787c72b1 1664 dev_info(&pdev->dev, "Reading VID from GPIO5\n");
b72656db 1665 res = superio_inb(sio_data, W83627THF_GPIO5_DR) & sel;
1da177e4
LT
1666
1667exit:
b72656db 1668 superio_exit(sio_data);
1da177e4
LT
1669 return res;
1670}
1671
6c931ae1 1672static int w83687thf_read_vid(struct platform_device *pdev)
c2db6ce1 1673{
a8b3a3a5 1674 struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev);
c2db6ce1
JD
1675 int res = 0xff;
1676
e95fd518
GR
1677 if (superio_enter(sio_data)) {
1678 /*
1679 * Some other driver reserved the address space for itself.
1680 * We don't want to fail driver instantiation because of that,
1681 * so display a warning and keep going.
1682 */
1683 dev_warn(&pdev->dev,
1684 "Can not read VID data: Failed to enable SuperIO access\n");
1685 return res;
1686 }
1687
b72656db 1688 superio_select(sio_data, W83627HF_LD_HWM);
c2db6ce1
JD
1689
1690 /* Make sure these GPIO pins are enabled */
b72656db 1691 if (!(superio_inb(sio_data, W83687THF_VID_EN) & (1 << 2))) {
787c72b1 1692 dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
c2db6ce1
JD
1693 goto exit;
1694 }
1695
1696 /* Make sure the pins are configured for input */
b72656db 1697 if (!(superio_inb(sio_data, W83687THF_VID_CFG) & (1 << 4))) {
787c72b1 1698 dev_dbg(&pdev->dev, "VID configured as output, "
c2db6ce1
JD
1699 "no VID function\n");
1700 goto exit;
1701 }
1702
b72656db 1703 res = superio_inb(sio_data, W83687THF_VID_DATA) & 0x3f;
c2db6ce1
JD
1704
1705exit:
b72656db 1706 superio_exit(sio_data);
c2db6ce1
JD
1707 return res;
1708}
1709
787c72b1 1710static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value)
1da177e4 1711{
1da177e4
LT
1712 int word_sized;
1713
9a61bf63 1714 mutex_lock(&data->lock);
1da177e4
LT
1715 word_sized = (((reg & 0xff00) == 0x100)
1716 || ((reg & 0xff00) == 0x200))
1717 && (((reg & 0x00ff) == 0x53)
1718 || ((reg & 0x00ff) == 0x55));
d58df9cd 1719 w83627hf_set_bank(data, reg);
787c72b1 1720 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1da177e4
LT
1721 if (word_sized) {
1722 outb_p(value >> 8,
787c72b1 1723 data->addr + W83781D_DATA_REG_OFFSET);
1da177e4 1724 outb_p((reg & 0xff) + 1,
787c72b1 1725 data->addr + W83781D_ADDR_REG_OFFSET);
1da177e4
LT
1726 }
1727 outb_p(value & 0xff,
787c72b1 1728 data->addr + W83781D_DATA_REG_OFFSET);
d58df9cd 1729 w83627hf_reset_bank(data, reg);
9a61bf63 1730 mutex_unlock(&data->lock);
1da177e4
LT
1731 return 0;
1732}
1733
6c931ae1 1734static void w83627hf_init_device(struct platform_device *pdev)
1da177e4 1735{
787c72b1 1736 struct w83627hf_data *data = platform_get_drvdata(pdev);
1da177e4 1737 int i;
d27c37c0 1738 enum chips type = data->type;
1da177e4
LT
1739 u8 tmp;
1740
1da177e4
LT
1741 /* Minimize conflicts with other winbond i2c-only clients... */
1742 /* disable i2c subclients... how to disable main i2c client?? */
1743 /* force i2c address to relatively uncommon address */
8f3c7c54
JD
1744 if (type == w83627hf) {
1745 w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
1746 w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
1747 }
1da177e4
LT
1748
1749 /* Read VID only once */
d27c37c0 1750 if (type == w83627hf || type == w83637hf) {
787c72b1
JD
1751 int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1752 int hi = w83627hf_read_value(data, W83781D_REG_CHIPID);
1da177e4 1753 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
d27c37c0 1754 } else if (type == w83627thf) {
787c72b1 1755 data->vid = w83627thf_read_gpio5(pdev);
d27c37c0 1756 } else if (type == w83687thf) {
787c72b1 1757 data->vid = w83687thf_read_vid(pdev);
1da177e4
LT
1758 }
1759
1760 /* Read VRM & OVT Config only once */
d27c37c0 1761 if (type == w83627thf || type == w83637hf || type == w83687thf) {
1da177e4 1762 data->vrm_ovt =
787c72b1 1763 w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG);
1da177e4
LT
1764 }
1765
787c72b1 1766 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1da177e4
LT
1767 for (i = 1; i <= 3; i++) {
1768 if (!(tmp & BIT_SCFG1[i - 1])) {
b26f9330 1769 data->sens[i - 1] = 4;
1da177e4
LT
1770 } else {
1771 if (w83627hf_read_value
787c72b1 1772 (data,
1da177e4
LT
1773 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1774 data->sens[i - 1] = 1;
1775 else
1776 data->sens[i - 1] = 2;
1777 }
1778 if ((type == w83697hf) && (i == 2))
1779 break;
1780 }
1781
1782 if(init) {
1783 /* Enable temp2 */
df48ed80 1784 tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG);
1da177e4 1785 if (tmp & 0x01) {
787c72b1 1786 dev_warn(&pdev->dev, "Enabling temp2, readings "
1da177e4 1787 "might not make sense\n");
df48ed80 1788 w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG,
1da177e4
LT
1789 tmp & 0xfe);
1790 }
1791
1792 /* Enable temp3 */
1793 if (type != w83697hf) {
787c72b1 1794 tmp = w83627hf_read_value(data,
df48ed80 1795 W83627HF_REG_TEMP3_CONFIG);
1da177e4 1796 if (tmp & 0x01) {
787c72b1 1797 dev_warn(&pdev->dev, "Enabling temp3, "
1da177e4 1798 "readings might not make sense\n");
787c72b1 1799 w83627hf_write_value(data,
df48ed80 1800 W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe);
1da177e4
LT
1801 }
1802 }
1da177e4
LT
1803 }
1804
1805 /* Start monitoring */
787c72b1
JD
1806 w83627hf_write_value(data, W83781D_REG_CONFIG,
1807 (w83627hf_read_value(data,
1da177e4
LT
1808 W83781D_REG_CONFIG) & 0xf7)
1809 | 0x01);
ef878b11
JD
1810
1811 /* Enable VBAT monitoring if needed */
1812 tmp = w83627hf_read_value(data, W83781D_REG_VBAT);
1813 if (!(tmp & 0x01))
1814 w83627hf_write_value(data, W83781D_REG_VBAT, tmp | 0x01);
1da177e4
LT
1815}
1816
c09c5184
JD
1817static void w83627hf_update_fan_div(struct w83627hf_data *data)
1818{
1819 int reg;
1820
1821 reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1822 data->fan_div[0] = (reg >> 4) & 0x03;
1823 data->fan_div[1] = (reg >> 6) & 0x03;
1824 if (data->type != w83697hf) {
1825 data->fan_div[2] = (w83627hf_read_value(data,
1826 W83781D_REG_PIN) >> 6) & 0x03;
1827 }
1828 reg = w83627hf_read_value(data, W83781D_REG_VBAT);
1829 data->fan_div[0] |= (reg >> 3) & 0x04;
1830 data->fan_div[1] |= (reg >> 4) & 0x04;
1831 if (data->type != w83697hf)
1832 data->fan_div[2] |= (reg >> 5) & 0x04;
1833}
1834
1da177e4
LT
1835static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1836{
787c72b1 1837 struct w83627hf_data *data = dev_get_drvdata(dev);
df48ed80 1838 int i, num_temps = (data->type == w83697hf) ? 2 : 3;
a95a5ed8 1839 int num_pwms = (data->type == w83697hf) ? 2 : 3;
1da177e4 1840
9a61bf63 1841 mutex_lock(&data->update_lock);
1da177e4
LT
1842
1843 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1844 || !data->valid) {
1845 for (i = 0; i <= 8; i++) {
1846 /* skip missing sensors */
1847 if (((data->type == w83697hf) && (i == 1)) ||
c2db6ce1 1848 ((data->type != w83627hf && data->type != w83697hf)
4a1c4447 1849 && (i == 5 || i == 6)))
1da177e4
LT
1850 continue;
1851 data->in[i] =
787c72b1 1852 w83627hf_read_value(data, W83781D_REG_IN(i));
1da177e4 1853 data->in_min[i] =
787c72b1 1854 w83627hf_read_value(data,
1da177e4
LT
1855 W83781D_REG_IN_MIN(i));
1856 data->in_max[i] =
787c72b1 1857 w83627hf_read_value(data,
1da177e4
LT
1858 W83781D_REG_IN_MAX(i));
1859 }
2ca2fcd1
JC
1860 for (i = 0; i <= 2; i++) {
1861 data->fan[i] =
1862 w83627hf_read_value(data, W83627HF_REG_FAN(i));
1863 data->fan_min[i] =
787c72b1 1864 w83627hf_read_value(data,
2ca2fcd1 1865 W83627HF_REG_FAN_MIN(i));
1da177e4 1866 }
07584c76 1867 for (i = 0; i <= 2; i++) {
787c72b1 1868 u8 tmp = w83627hf_read_value(data,
1da177e4
LT
1869 W836X7HF_REG_PWM(data->type, i));
1870 /* bits 0-3 are reserved in 627THF */
1871 if (data->type == w83627thf)
1872 tmp &= 0xf0;
07584c76
JC
1873 data->pwm[i] = tmp;
1874 if (i == 1 &&
1875 (data->type == w83627hf || data->type == w83697hf))
1da177e4
LT
1876 break;
1877 }
1550cb6d
COM
1878 if (data->type == w83627hf) {
1879 u8 tmp = w83627hf_read_value(data,
1880 W83627HF_REG_PWM_FREQ);
1881 data->pwm_freq[0] = tmp & 0x07;
1882 data->pwm_freq[1] = (tmp >> 4) & 0x07;
1883 } else if (data->type != w83627thf) {
1884 for (i = 1; i <= 3; i++) {
1885 data->pwm_freq[i - 1] =
1886 w83627hf_read_value(data,
1887 W83637HF_REG_PWM_FREQ[i - 1]);
1888 if (i == 2 && (data->type == w83697hf))
1889 break;
1890 }
1891 }
a95a5ed8
DG
1892 if (data->type != w83627hf) {
1893 for (i = 0; i < num_pwms; i++) {
1894 u8 tmp = w83627hf_read_value(data,
1895 W83627THF_REG_PWM_ENABLE[i]);
1896 data->pwm_enable[i] =
1897 ((tmp >> W83627THF_PWM_ENABLE_SHIFT[i])
1898 & 0x03) + 1;
1899 }
1900 }
df48ed80
JC
1901 for (i = 0; i < num_temps; i++) {
1902 data->temp[i] = w83627hf_read_value(
1903 data, w83627hf_reg_temp[i]);
1904 data->temp_max[i] = w83627hf_read_value(
1905 data, w83627hf_reg_temp_over[i]);
1906 data->temp_max_hyst[i] = w83627hf_read_value(
1907 data, w83627hf_reg_temp_hyst[i]);
1da177e4
LT
1908 }
1909
c09c5184
JD
1910 w83627hf_update_fan_div(data);
1911
1da177e4 1912 data->alarms =
787c72b1
JD
1913 w83627hf_read_value(data, W83781D_REG_ALARM1) |
1914 (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) |
1915 (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16);
1916 i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
1c138107 1917 data->beep_mask = (i << 8) |
787c72b1
JD
1918 w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) |
1919 w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16;
1da177e4
LT
1920 data->last_updated = jiffies;
1921 data->valid = 1;
1922 }
1923
9a61bf63 1924 mutex_unlock(&data->update_lock);
1da177e4
LT
1925
1926 return data;
1927}
1928
787c72b1
JD
1929static int __init w83627hf_device_add(unsigned short address,
1930 const struct w83627hf_sio_data *sio_data)
1931{
1932 struct resource res = {
1933 .start = address + WINB_REGION_OFFSET,
1934 .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1,
1935 .name = DRVNAME,
1936 .flags = IORESOURCE_IO,
1937 };
1938 int err;
1939
b9acb64a
JD
1940 err = acpi_check_resource_conflict(&res);
1941 if (err)
1942 goto exit;
1943
787c72b1
JD
1944 pdev = platform_device_alloc(DRVNAME, address);
1945 if (!pdev) {
1946 err = -ENOMEM;
18de030f 1947 pr_err("Device allocation failed\n");
787c72b1
JD
1948 goto exit;
1949 }
1950
1951 err = platform_device_add_resources(pdev, &res, 1);
1952 if (err) {
18de030f 1953 pr_err("Device resource addition failed (%d)\n", err);
787c72b1
JD
1954 goto exit_device_put;
1955 }
1956
2df6d811
JD
1957 err = platform_device_add_data(pdev, sio_data,
1958 sizeof(struct w83627hf_sio_data));
1959 if (err) {
18de030f 1960 pr_err("Platform data allocation failed\n");
787c72b1
JD
1961 goto exit_device_put;
1962 }
787c72b1
JD
1963
1964 err = platform_device_add(pdev);
1965 if (err) {
18de030f 1966 pr_err("Device addition failed (%d)\n", err);
787c72b1
JD
1967 goto exit_device_put;
1968 }
1969
1970 return 0;
1971
1972exit_device_put:
1973 platform_device_put(pdev);
1974exit:
1975 return err;
1976}
1977
1da177e4
LT
1978static int __init sensors_w83627hf_init(void)
1979{
787c72b1
JD
1980 int err;
1981 unsigned short address;
1982 struct w83627hf_sio_data sio_data;
1983
1984 if (w83627hf_find(0x2e, &address, &sio_data)
1985 && w83627hf_find(0x4e, &address, &sio_data))
1da177e4 1986 return -ENODEV;
1da177e4 1987
787c72b1
JD
1988 err = platform_driver_register(&w83627hf_driver);
1989 if (err)
1990 goto exit;
1991
1992 /* Sets global pdev as a side effect */
1993 err = w83627hf_device_add(address, &sio_data);
1994 if (err)
1995 goto exit_driver;
1996
1997 return 0;
1998
1999exit_driver:
2000 platform_driver_unregister(&w83627hf_driver);
2001exit:
2002 return err;
1da177e4
LT
2003}
2004
2005static void __exit sensors_w83627hf_exit(void)
2006{
787c72b1
JD
2007 platform_device_unregister(pdev);
2008 platform_driver_unregister(&w83627hf_driver);
1da177e4
LT
2009}
2010
2011MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
2012 "Philip Edelbrock <phil@netroedge.com>, "
2013 "and Mark Studebaker <mdsxyz123@yahoo.com>");
2014MODULE_DESCRIPTION("W83627HF driver");
2015MODULE_LICENSE("GPL");
2016
2017module_init(sensors_w83627hf_init);
2018module_exit(sensors_w83627hf_exit);