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ab2b79d5 HG |
1 | /* tmp401.c |
2 | * | |
3 | * Copyright (C) 2007,2008 Hans de Goede <hdegoede@redhat.com> | |
fce0758f AP |
4 | * Preliminary tmp411 support by: |
5 | * Gabriel Konat, Sander Leget, Wouter Willems | |
6 | * Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de> | |
ab2b79d5 HG |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | /* | |
24 | * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC. | |
25 | * | |
26 | * Note this IC is in some aspect similar to the LM90, but it has quite a | |
27 | * few differences too, for example the local temp has a higher resolution | |
28 | * and thus has 16 bits registers for its value and limit instead of 8 bits. | |
29 | */ | |
30 | ||
31 | #include <linux/module.h> | |
32 | #include <linux/init.h> | |
947e9271 | 33 | #include <linux/bitops.h> |
ab2b79d5 HG |
34 | #include <linux/slab.h> |
35 | #include <linux/jiffies.h> | |
36 | #include <linux/i2c.h> | |
37 | #include <linux/hwmon.h> | |
38 | #include <linux/hwmon-sysfs.h> | |
39 | #include <linux/err.h> | |
40 | #include <linux/mutex.h> | |
41 | #include <linux/sysfs.h> | |
42 | ||
43 | /* Addresses to scan */ | |
a1fac92b | 44 | static const unsigned short normal_i2c[] = { 0x4c, 0x4d, 0x4e, I2C_CLIENT_END }; |
ab2b79d5 | 45 | |
a1fac92b | 46 | enum chips { tmp401, tmp411, tmp431 }; |
ab2b79d5 HG |
47 | |
48 | /* | |
49 | * The TMP401 registers, note some registers have different addresses for | |
50 | * reading and writing | |
51 | */ | |
52 | #define TMP401_STATUS 0x02 | |
53 | #define TMP401_CONFIG_READ 0x03 | |
54 | #define TMP401_CONFIG_WRITE 0x09 | |
55 | #define TMP401_CONVERSION_RATE_READ 0x04 | |
56 | #define TMP401_CONVERSION_RATE_WRITE 0x0A | |
57 | #define TMP401_TEMP_CRIT_HYST 0x21 | |
ab2b79d5 HG |
58 | #define TMP401_MANUFACTURER_ID_REG 0xFE |
59 | #define TMP401_DEVICE_ID_REG 0xFF | |
60 | ||
61 | static const u8 TMP401_TEMP_MSB[2] = { 0x00, 0x01 }; | |
62 | static const u8 TMP401_TEMP_LSB[2] = { 0x15, 0x10 }; | |
63 | static const u8 TMP401_TEMP_LOW_LIMIT_MSB_READ[2] = { 0x06, 0x08 }; | |
64 | static const u8 TMP401_TEMP_LOW_LIMIT_MSB_WRITE[2] = { 0x0C, 0x0E }; | |
65 | static const u8 TMP401_TEMP_LOW_LIMIT_LSB[2] = { 0x17, 0x14 }; | |
66 | static const u8 TMP401_TEMP_HIGH_LIMIT_MSB_READ[2] = { 0x05, 0x07 }; | |
67 | static const u8 TMP401_TEMP_HIGH_LIMIT_MSB_WRITE[2] = { 0x0B, 0x0D }; | |
68 | static const u8 TMP401_TEMP_HIGH_LIMIT_LSB[2] = { 0x16, 0x13 }; | |
69 | /* These are called the THERM limit / hysteresis / mask in the datasheet */ | |
70 | static const u8 TMP401_TEMP_CRIT_LIMIT[2] = { 0x20, 0x19 }; | |
71 | ||
fce0758f AP |
72 | static const u8 TMP411_TEMP_LOWEST_MSB[2] = { 0x30, 0x34 }; |
73 | static const u8 TMP411_TEMP_LOWEST_LSB[2] = { 0x31, 0x35 }; | |
74 | static const u8 TMP411_TEMP_HIGHEST_MSB[2] = { 0x32, 0x36 }; | |
75 | static const u8 TMP411_TEMP_HIGHEST_LSB[2] = { 0x33, 0x37 }; | |
76 | ||
ab2b79d5 | 77 | /* Flags */ |
947e9271 GR |
78 | #define TMP401_CONFIG_RANGE BIT(2) |
79 | #define TMP401_CONFIG_SHUTDOWN BIT(6) | |
80 | #define TMP401_STATUS_LOCAL_CRIT BIT(0) | |
81 | #define TMP401_STATUS_REMOTE_CRIT BIT(1) | |
82 | #define TMP401_STATUS_REMOTE_OPEN BIT(2) | |
83 | #define TMP401_STATUS_REMOTE_LOW BIT(3) | |
84 | #define TMP401_STATUS_REMOTE_HIGH BIT(4) | |
85 | #define TMP401_STATUS_LOCAL_LOW BIT(5) | |
86 | #define TMP401_STATUS_LOCAL_HIGH BIT(6) | |
ab2b79d5 HG |
87 | |
88 | /* Manufacturer / Device ID's */ | |
89 | #define TMP401_MANUFACTURER_ID 0x55 | |
90 | #define TMP401_DEVICE_ID 0x11 | |
4ce5b1fe GR |
91 | #define TMP411A_DEVICE_ID 0x12 |
92 | #define TMP411B_DEVICE_ID 0x13 | |
93 | #define TMP411C_DEVICE_ID 0x10 | |
a1fac92b | 94 | #define TMP431_DEVICE_ID 0x31 |
ab2b79d5 | 95 | |
ab2b79d5 HG |
96 | /* |
97 | * Driver data (common to all clients) | |
98 | */ | |
99 | ||
100 | static const struct i2c_device_id tmp401_id[] = { | |
101 | { "tmp401", tmp401 }, | |
fce0758f | 102 | { "tmp411", tmp411 }, |
a1fac92b | 103 | { "tmp431", tmp431 }, |
ab2b79d5 HG |
104 | { } |
105 | }; | |
106 | MODULE_DEVICE_TABLE(i2c, tmp401_id); | |
107 | ||
ab2b79d5 HG |
108 | /* |
109 | * Client data (each client gets its own) | |
110 | */ | |
111 | ||
112 | struct tmp401_data { | |
113 | struct device *hwmon_dev; | |
114 | struct mutex update_lock; | |
115 | char valid; /* zero until following fields are valid */ | |
116 | unsigned long last_updated; /* in jiffies */ | |
dc71afe5 | 117 | enum chips kind; |
ab2b79d5 HG |
118 | |
119 | /* register values */ | |
120 | u8 status; | |
121 | u8 config; | |
122 | u16 temp[2]; | |
123 | u16 temp_low[2]; | |
124 | u16 temp_high[2]; | |
125 | u8 temp_crit[2]; | |
126 | u8 temp_crit_hyst; | |
fce0758f AP |
127 | u16 temp_lowest[2]; |
128 | u16 temp_highest[2]; | |
ab2b79d5 HG |
129 | }; |
130 | ||
131 | /* | |
132 | * Sysfs attr show / store functions | |
133 | */ | |
134 | ||
135 | static int tmp401_register_to_temp(u16 reg, u8 config) | |
136 | { | |
137 | int temp = reg; | |
138 | ||
139 | if (config & TMP401_CONFIG_RANGE) | |
140 | temp -= 64 * 256; | |
141 | ||
142 | return (temp * 625 + 80) / 160; | |
143 | } | |
144 | ||
145 | static u16 tmp401_temp_to_register(long temp, u8 config) | |
146 | { | |
147 | if (config & TMP401_CONFIG_RANGE) { | |
2a844c14 | 148 | temp = clamp_val(temp, -64000, 191000); |
ab2b79d5 HG |
149 | temp += 64000; |
150 | } else | |
2a844c14 | 151 | temp = clamp_val(temp, 0, 127000); |
ab2b79d5 HG |
152 | |
153 | return (temp * 160 + 312) / 625; | |
154 | } | |
155 | ||
156 | static int tmp401_crit_register_to_temp(u8 reg, u8 config) | |
157 | { | |
158 | int temp = reg; | |
159 | ||
160 | if (config & TMP401_CONFIG_RANGE) | |
161 | temp -= 64; | |
162 | ||
163 | return temp * 1000; | |
164 | } | |
165 | ||
166 | static u8 tmp401_crit_temp_to_register(long temp, u8 config) | |
167 | { | |
168 | if (config & TMP401_CONFIG_RANGE) { | |
2a844c14 | 169 | temp = clamp_val(temp, -64000, 191000); |
ab2b79d5 HG |
170 | temp += 64000; |
171 | } else | |
2a844c14 | 172 | temp = clamp_val(temp, 0, 127000); |
ab2b79d5 HG |
173 | |
174 | return (temp + 500) / 1000; | |
175 | } | |
176 | ||
ea63c2b9 AP |
177 | static struct tmp401_data *tmp401_update_device_reg16( |
178 | struct i2c_client *client, struct tmp401_data *data) | |
179 | { | |
180 | int i; | |
181 | ||
182 | for (i = 0; i < 2; i++) { | |
183 | /* | |
184 | * High byte must be read first immediately followed | |
185 | * by the low byte | |
186 | */ | |
187 | data->temp[i] = i2c_smbus_read_byte_data(client, | |
188 | TMP401_TEMP_MSB[i]) << 8; | |
189 | data->temp[i] |= i2c_smbus_read_byte_data(client, | |
190 | TMP401_TEMP_LSB[i]); | |
191 | data->temp_low[i] = i2c_smbus_read_byte_data(client, | |
192 | TMP401_TEMP_LOW_LIMIT_MSB_READ[i]) << 8; | |
193 | data->temp_low[i] |= i2c_smbus_read_byte_data(client, | |
194 | TMP401_TEMP_LOW_LIMIT_LSB[i]); | |
195 | data->temp_high[i] = i2c_smbus_read_byte_data(client, | |
196 | TMP401_TEMP_HIGH_LIMIT_MSB_READ[i]) << 8; | |
197 | data->temp_high[i] |= i2c_smbus_read_byte_data(client, | |
198 | TMP401_TEMP_HIGH_LIMIT_LSB[i]); | |
199 | data->temp_crit[i] = i2c_smbus_read_byte_data(client, | |
200 | TMP401_TEMP_CRIT_LIMIT[i]); | |
201 | ||
202 | if (data->kind == tmp411) { | |
203 | data->temp_lowest[i] = i2c_smbus_read_byte_data(client, | |
204 | TMP411_TEMP_LOWEST_MSB[i]) << 8; | |
205 | data->temp_lowest[i] |= i2c_smbus_read_byte_data( | |
206 | client, TMP411_TEMP_LOWEST_LSB[i]); | |
207 | ||
208 | data->temp_highest[i] = i2c_smbus_read_byte_data( | |
209 | client, TMP411_TEMP_HIGHEST_MSB[i]) << 8; | |
210 | data->temp_highest[i] |= i2c_smbus_read_byte_data( | |
211 | client, TMP411_TEMP_HIGHEST_LSB[i]); | |
212 | } | |
213 | } | |
214 | return data; | |
215 | } | |
216 | ||
217 | static struct tmp401_data *tmp401_update_device(struct device *dev) | |
218 | { | |
219 | struct i2c_client *client = to_i2c_client(dev); | |
220 | struct tmp401_data *data = i2c_get_clientdata(client); | |
221 | ||
222 | mutex_lock(&data->update_lock); | |
223 | ||
224 | if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { | |
225 | data->status = i2c_smbus_read_byte_data(client, TMP401_STATUS); | |
226 | data->config = i2c_smbus_read_byte_data(client, | |
227 | TMP401_CONFIG_READ); | |
228 | tmp401_update_device_reg16(client, data); | |
229 | ||
230 | data->temp_crit_hyst = i2c_smbus_read_byte_data(client, | |
231 | TMP401_TEMP_CRIT_HYST); | |
232 | ||
233 | data->last_updated = jiffies; | |
234 | data->valid = 1; | |
235 | } | |
236 | ||
237 | mutex_unlock(&data->update_lock); | |
238 | ||
239 | return data; | |
240 | } | |
241 | ||
ab2b79d5 HG |
242 | static ssize_t show_temp_value(struct device *dev, |
243 | struct device_attribute *devattr, char *buf) | |
244 | { | |
245 | int index = to_sensor_dev_attr(devattr)->index; | |
246 | struct tmp401_data *data = tmp401_update_device(dev); | |
247 | ||
248 | return sprintf(buf, "%d\n", | |
249 | tmp401_register_to_temp(data->temp[index], data->config)); | |
250 | } | |
251 | ||
252 | static ssize_t show_temp_min(struct device *dev, | |
253 | struct device_attribute *devattr, char *buf) | |
254 | { | |
255 | int index = to_sensor_dev_attr(devattr)->index; | |
256 | struct tmp401_data *data = tmp401_update_device(dev); | |
257 | ||
258 | return sprintf(buf, "%d\n", | |
259 | tmp401_register_to_temp(data->temp_low[index], data->config)); | |
260 | } | |
261 | ||
262 | static ssize_t show_temp_max(struct device *dev, | |
263 | struct device_attribute *devattr, char *buf) | |
264 | { | |
265 | int index = to_sensor_dev_attr(devattr)->index; | |
266 | struct tmp401_data *data = tmp401_update_device(dev); | |
267 | ||
268 | return sprintf(buf, "%d\n", | |
269 | tmp401_register_to_temp(data->temp_high[index], data->config)); | |
270 | } | |
271 | ||
272 | static ssize_t show_temp_crit(struct device *dev, | |
273 | struct device_attribute *devattr, char *buf) | |
274 | { | |
275 | int index = to_sensor_dev_attr(devattr)->index; | |
276 | struct tmp401_data *data = tmp401_update_device(dev); | |
277 | ||
278 | return sprintf(buf, "%d\n", | |
279 | tmp401_crit_register_to_temp(data->temp_crit[index], | |
280 | data->config)); | |
281 | } | |
282 | ||
283 | static ssize_t show_temp_crit_hyst(struct device *dev, | |
284 | struct device_attribute *devattr, char *buf) | |
285 | { | |
286 | int temp, index = to_sensor_dev_attr(devattr)->index; | |
287 | struct tmp401_data *data = tmp401_update_device(dev); | |
288 | ||
289 | mutex_lock(&data->update_lock); | |
290 | temp = tmp401_crit_register_to_temp(data->temp_crit[index], | |
291 | data->config); | |
292 | temp -= data->temp_crit_hyst * 1000; | |
293 | mutex_unlock(&data->update_lock); | |
294 | ||
295 | return sprintf(buf, "%d\n", temp); | |
296 | } | |
297 | ||
fce0758f AP |
298 | static ssize_t show_temp_lowest(struct device *dev, |
299 | struct device_attribute *devattr, char *buf) | |
300 | { | |
301 | int index = to_sensor_dev_attr(devattr)->index; | |
302 | struct tmp401_data *data = tmp401_update_device(dev); | |
303 | ||
304 | return sprintf(buf, "%d\n", | |
305 | tmp401_register_to_temp(data->temp_lowest[index], | |
306 | data->config)); | |
307 | } | |
308 | ||
309 | static ssize_t show_temp_highest(struct device *dev, | |
310 | struct device_attribute *devattr, char *buf) | |
311 | { | |
312 | int index = to_sensor_dev_attr(devattr)->index; | |
313 | struct tmp401_data *data = tmp401_update_device(dev); | |
314 | ||
315 | return sprintf(buf, "%d\n", | |
316 | tmp401_register_to_temp(data->temp_highest[index], | |
317 | data->config)); | |
318 | } | |
319 | ||
ab2b79d5 HG |
320 | static ssize_t show_status(struct device *dev, |
321 | struct device_attribute *devattr, char *buf) | |
322 | { | |
323 | int mask = to_sensor_dev_attr(devattr)->index; | |
324 | struct tmp401_data *data = tmp401_update_device(dev); | |
325 | ||
326 | if (data->status & mask) | |
327 | return sprintf(buf, "1\n"); | |
328 | else | |
329 | return sprintf(buf, "0\n"); | |
330 | } | |
331 | ||
332 | static ssize_t store_temp_min(struct device *dev, struct device_attribute | |
333 | *devattr, const char *buf, size_t count) | |
334 | { | |
335 | int index = to_sensor_dev_attr(devattr)->index; | |
336 | struct tmp401_data *data = tmp401_update_device(dev); | |
337 | long val; | |
338 | u16 reg; | |
339 | ||
179c4fdb | 340 | if (kstrtol(buf, 10, &val)) |
ab2b79d5 HG |
341 | return -EINVAL; |
342 | ||
343 | reg = tmp401_temp_to_register(val, data->config); | |
344 | ||
345 | mutex_lock(&data->update_lock); | |
346 | ||
347 | i2c_smbus_write_byte_data(to_i2c_client(dev), | |
348 | TMP401_TEMP_LOW_LIMIT_MSB_WRITE[index], reg >> 8); | |
349 | i2c_smbus_write_byte_data(to_i2c_client(dev), | |
350 | TMP401_TEMP_LOW_LIMIT_LSB[index], reg & 0xFF); | |
351 | ||
352 | data->temp_low[index] = reg; | |
353 | ||
354 | mutex_unlock(&data->update_lock); | |
355 | ||
356 | return count; | |
357 | } | |
358 | ||
359 | static ssize_t store_temp_max(struct device *dev, struct device_attribute | |
360 | *devattr, const char *buf, size_t count) | |
361 | { | |
362 | int index = to_sensor_dev_attr(devattr)->index; | |
363 | struct tmp401_data *data = tmp401_update_device(dev); | |
364 | long val; | |
365 | u16 reg; | |
366 | ||
179c4fdb | 367 | if (kstrtol(buf, 10, &val)) |
ab2b79d5 HG |
368 | return -EINVAL; |
369 | ||
370 | reg = tmp401_temp_to_register(val, data->config); | |
371 | ||
372 | mutex_lock(&data->update_lock); | |
373 | ||
374 | i2c_smbus_write_byte_data(to_i2c_client(dev), | |
375 | TMP401_TEMP_HIGH_LIMIT_MSB_WRITE[index], reg >> 8); | |
376 | i2c_smbus_write_byte_data(to_i2c_client(dev), | |
377 | TMP401_TEMP_HIGH_LIMIT_LSB[index], reg & 0xFF); | |
378 | ||
379 | data->temp_high[index] = reg; | |
380 | ||
381 | mutex_unlock(&data->update_lock); | |
382 | ||
383 | return count; | |
384 | } | |
385 | ||
386 | static ssize_t store_temp_crit(struct device *dev, struct device_attribute | |
387 | *devattr, const char *buf, size_t count) | |
388 | { | |
389 | int index = to_sensor_dev_attr(devattr)->index; | |
390 | struct tmp401_data *data = tmp401_update_device(dev); | |
391 | long val; | |
392 | u8 reg; | |
393 | ||
179c4fdb | 394 | if (kstrtol(buf, 10, &val)) |
ab2b79d5 HG |
395 | return -EINVAL; |
396 | ||
397 | reg = tmp401_crit_temp_to_register(val, data->config); | |
398 | ||
399 | mutex_lock(&data->update_lock); | |
400 | ||
401 | i2c_smbus_write_byte_data(to_i2c_client(dev), | |
402 | TMP401_TEMP_CRIT_LIMIT[index], reg); | |
403 | ||
404 | data->temp_crit[index] = reg; | |
405 | ||
406 | mutex_unlock(&data->update_lock); | |
407 | ||
408 | return count; | |
409 | } | |
410 | ||
411 | static ssize_t store_temp_crit_hyst(struct device *dev, struct device_attribute | |
412 | *devattr, const char *buf, size_t count) | |
413 | { | |
414 | int temp, index = to_sensor_dev_attr(devattr)->index; | |
415 | struct tmp401_data *data = tmp401_update_device(dev); | |
416 | long val; | |
417 | u8 reg; | |
418 | ||
179c4fdb | 419 | if (kstrtol(buf, 10, &val)) |
ab2b79d5 HG |
420 | return -EINVAL; |
421 | ||
422 | if (data->config & TMP401_CONFIG_RANGE) | |
2a844c14 | 423 | val = clamp_val(val, -64000, 191000); |
ab2b79d5 | 424 | else |
2a844c14 | 425 | val = clamp_val(val, 0, 127000); |
ab2b79d5 HG |
426 | |
427 | mutex_lock(&data->update_lock); | |
428 | temp = tmp401_crit_register_to_temp(data->temp_crit[index], | |
429 | data->config); | |
2a844c14 | 430 | val = clamp_val(val, temp - 255000, temp); |
ab2b79d5 HG |
431 | reg = ((temp - val) + 500) / 1000; |
432 | ||
433 | i2c_smbus_write_byte_data(to_i2c_client(dev), | |
434 | TMP401_TEMP_CRIT_HYST, reg); | |
435 | ||
436 | data->temp_crit_hyst = reg; | |
437 | ||
438 | mutex_unlock(&data->update_lock); | |
439 | ||
440 | return count; | |
441 | } | |
442 | ||
fce0758f AP |
443 | /* |
444 | * Resets the historical measurements of minimum and maximum temperatures. | |
445 | * This is done by writing any value to any of the minimum/maximum registers | |
446 | * (0x30-0x37). | |
447 | */ | |
448 | static ssize_t reset_temp_history(struct device *dev, | |
449 | struct device_attribute *devattr, const char *buf, size_t count) | |
450 | { | |
451 | long val; | |
452 | ||
179c4fdb | 453 | if (kstrtol(buf, 10, &val)) |
fce0758f AP |
454 | return -EINVAL; |
455 | ||
456 | if (val != 1) { | |
b55f3757 GR |
457 | dev_err(dev, |
458 | "temp_reset_history value %ld not supported. Use 1 to reset the history!\n", | |
459 | val); | |
fce0758f AP |
460 | return -EINVAL; |
461 | } | |
462 | i2c_smbus_write_byte_data(to_i2c_client(dev), | |
463 | TMP411_TEMP_LOWEST_MSB[0], val); | |
464 | ||
465 | return count; | |
466 | } | |
467 | ||
ab2b79d5 | 468 | static struct sensor_device_attribute tmp401_attr[] = { |
2b76d80a AP |
469 | SENSOR_ATTR(temp1_input, S_IRUGO, show_temp_value, NULL, 0), |
470 | SENSOR_ATTR(temp1_min, S_IWUSR | S_IRUGO, show_temp_min, | |
471 | store_temp_min, 0), | |
472 | SENSOR_ATTR(temp1_max, S_IWUSR | S_IRUGO, show_temp_max, | |
473 | store_temp_max, 0), | |
474 | SENSOR_ATTR(temp1_crit, S_IWUSR | S_IRUGO, show_temp_crit, | |
475 | store_temp_crit, 0), | |
476 | SENSOR_ATTR(temp1_crit_hyst, S_IWUSR | S_IRUGO, show_temp_crit_hyst, | |
ab2b79d5 | 477 | store_temp_crit_hyst, 0), |
2b76d80a | 478 | SENSOR_ATTR(temp1_min_alarm, S_IRUGO, show_status, NULL, |
ab2b79d5 | 479 | TMP401_STATUS_LOCAL_LOW), |
2b76d80a | 480 | SENSOR_ATTR(temp1_max_alarm, S_IRUGO, show_status, NULL, |
ab2b79d5 | 481 | TMP401_STATUS_LOCAL_HIGH), |
2b76d80a | 482 | SENSOR_ATTR(temp1_crit_alarm, S_IRUGO, show_status, NULL, |
ab2b79d5 | 483 | TMP401_STATUS_LOCAL_CRIT), |
2b76d80a AP |
484 | SENSOR_ATTR(temp2_input, S_IRUGO, show_temp_value, NULL, 1), |
485 | SENSOR_ATTR(temp2_min, S_IWUSR | S_IRUGO, show_temp_min, | |
486 | store_temp_min, 1), | |
487 | SENSOR_ATTR(temp2_max, S_IWUSR | S_IRUGO, show_temp_max, | |
488 | store_temp_max, 1), | |
489 | SENSOR_ATTR(temp2_crit, S_IWUSR | S_IRUGO, show_temp_crit, | |
490 | store_temp_crit, 1), | |
491 | SENSOR_ATTR(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 1), | |
492 | SENSOR_ATTR(temp2_fault, S_IRUGO, show_status, NULL, | |
ab2b79d5 | 493 | TMP401_STATUS_REMOTE_OPEN), |
2b76d80a | 494 | SENSOR_ATTR(temp2_min_alarm, S_IRUGO, show_status, NULL, |
ab2b79d5 | 495 | TMP401_STATUS_REMOTE_LOW), |
2b76d80a | 496 | SENSOR_ATTR(temp2_max_alarm, S_IRUGO, show_status, NULL, |
ab2b79d5 | 497 | TMP401_STATUS_REMOTE_HIGH), |
2b76d80a | 498 | SENSOR_ATTR(temp2_crit_alarm, S_IRUGO, show_status, NULL, |
ab2b79d5 HG |
499 | TMP401_STATUS_REMOTE_CRIT), |
500 | }; | |
501 | ||
fce0758f AP |
502 | /* |
503 | * Additional features of the TMP411 chip. | |
504 | * The TMP411 stores the minimum and maximum | |
505 | * temperature measured since power-on, chip-reset, or | |
506 | * minimum and maximum register reset for both the local | |
507 | * and remote channels. | |
508 | */ | |
509 | static struct sensor_device_attribute tmp411_attr[] = { | |
2b76d80a AP |
510 | SENSOR_ATTR(temp1_highest, S_IRUGO, show_temp_highest, NULL, 0), |
511 | SENSOR_ATTR(temp1_lowest, S_IRUGO, show_temp_lowest, NULL, 0), | |
512 | SENSOR_ATTR(temp2_highest, S_IRUGO, show_temp_highest, NULL, 1), | |
513 | SENSOR_ATTR(temp2_lowest, S_IRUGO, show_temp_lowest, NULL, 1), | |
514 | SENSOR_ATTR(temp_reset_history, S_IWUSR, NULL, reset_temp_history, 0), | |
fce0758f AP |
515 | }; |
516 | ||
ab2b79d5 HG |
517 | /* |
518 | * Begin non sysfs callback code (aka Real code) | |
519 | */ | |
520 | ||
521 | static void tmp401_init_client(struct i2c_client *client) | |
522 | { | |
523 | int config, config_orig; | |
524 | ||
525 | /* Set the conversion rate to 2 Hz */ | |
526 | i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, 5); | |
527 | ||
528 | /* Start conversions (disable shutdown if necessary) */ | |
529 | config = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ); | |
530 | if (config < 0) { | |
531 | dev_warn(&client->dev, "Initialization failed!\n"); | |
532 | return; | |
533 | } | |
534 | ||
535 | config_orig = config; | |
536 | config &= ~TMP401_CONFIG_SHUTDOWN; | |
537 | ||
538 | if (config != config_orig) | |
539 | i2c_smbus_write_byte_data(client, TMP401_CONFIG_WRITE, config); | |
540 | } | |
541 | ||
310ec792 | 542 | static int tmp401_detect(struct i2c_client *client, |
ab2b79d5 HG |
543 | struct i2c_board_info *info) |
544 | { | |
dbe73c8f | 545 | enum chips kind; |
ab2b79d5 | 546 | struct i2c_adapter *adapter = client->adapter; |
dbe73c8f | 547 | u8 reg; |
ab2b79d5 HG |
548 | |
549 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | |
550 | return -ENODEV; | |
551 | ||
552 | /* Detect and identify the chip */ | |
dbe73c8f JD |
553 | reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG); |
554 | if (reg != TMP401_MANUFACTURER_ID) | |
555 | return -ENODEV; | |
ab2b79d5 | 556 | |
dbe73c8f | 557 | reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG); |
ab2b79d5 | 558 | |
dbe73c8f JD |
559 | switch (reg) { |
560 | case TMP401_DEVICE_ID: | |
a1fac92b GR |
561 | if (client->addr != 0x4c) |
562 | return -ENODEV; | |
dbe73c8f JD |
563 | kind = tmp401; |
564 | break; | |
4ce5b1fe GR |
565 | case TMP411A_DEVICE_ID: |
566 | if (client->addr != 0x4c) | |
567 | return -ENODEV; | |
568 | kind = tmp411; | |
569 | break; | |
570 | case TMP411B_DEVICE_ID: | |
571 | if (client->addr != 0x4d) | |
572 | return -ENODEV; | |
573 | kind = tmp411; | |
574 | break; | |
575 | case TMP411C_DEVICE_ID: | |
576 | if (client->addr != 0x4e) | |
577 | return -ENODEV; | |
dbe73c8f JD |
578 | kind = tmp411; |
579 | break; | |
a1fac92b GR |
580 | case TMP431_DEVICE_ID: |
581 | if (client->addr == 0x4e) | |
582 | return -ENODEV; | |
583 | kind = tmp431; | |
584 | break; | |
dbe73c8f JD |
585 | default: |
586 | return -ENODEV; | |
ab2b79d5 | 587 | } |
dbe73c8f JD |
588 | |
589 | reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ); | |
590 | if (reg & 0x1b) | |
591 | return -ENODEV; | |
592 | ||
593 | reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE_READ); | |
594 | /* Datasheet says: 0x1-0x6 */ | |
595 | if (reg > 15) | |
596 | return -ENODEV; | |
597 | ||
dc71afe5 | 598 | strlcpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE); |
ab2b79d5 HG |
599 | |
600 | return 0; | |
601 | } | |
602 | ||
ea63c2b9 AP |
603 | static int tmp401_remove(struct i2c_client *client) |
604 | { | |
605 | struct tmp401_data *data = i2c_get_clientdata(client); | |
606 | int i; | |
607 | ||
608 | if (data->hwmon_dev) | |
609 | hwmon_device_unregister(data->hwmon_dev); | |
610 | ||
611 | for (i = 0; i < ARRAY_SIZE(tmp401_attr); i++) | |
612 | device_remove_file(&client->dev, &tmp401_attr[i].dev_attr); | |
613 | ||
614 | if (data->kind == tmp411) { | |
615 | for (i = 0; i < ARRAY_SIZE(tmp411_attr); i++) | |
616 | device_remove_file(&client->dev, | |
617 | &tmp411_attr[i].dev_attr); | |
618 | } | |
619 | ||
ea63c2b9 AP |
620 | return 0; |
621 | } | |
622 | ||
ab2b79d5 HG |
623 | static int tmp401_probe(struct i2c_client *client, |
624 | const struct i2c_device_id *id) | |
625 | { | |
626 | int i, err = 0; | |
627 | struct tmp401_data *data; | |
a1fac92b | 628 | const char *names[] = { "TMP401", "TMP411", "TMP431" }; |
ab2b79d5 | 629 | |
0df9fc7b GR |
630 | data = devm_kzalloc(&client->dev, sizeof(struct tmp401_data), |
631 | GFP_KERNEL); | |
ab2b79d5 HG |
632 | if (!data) |
633 | return -ENOMEM; | |
634 | ||
635 | i2c_set_clientdata(client, data); | |
636 | mutex_init(&data->update_lock); | |
fce0758f | 637 | data->kind = id->driver_data; |
ab2b79d5 HG |
638 | |
639 | /* Initialize the TMP401 chip */ | |
640 | tmp401_init_client(client); | |
641 | ||
642 | /* Register sysfs hooks */ | |
643 | for (i = 0; i < ARRAY_SIZE(tmp401_attr); i++) { | |
644 | err = device_create_file(&client->dev, | |
645 | &tmp401_attr[i].dev_attr); | |
646 | if (err) | |
647 | goto exit_remove; | |
648 | } | |
649 | ||
a80581d0 | 650 | /* Register additional tmp411 sysfs hooks */ |
fce0758f AP |
651 | if (data->kind == tmp411) { |
652 | for (i = 0; i < ARRAY_SIZE(tmp411_attr); i++) { | |
653 | err = device_create_file(&client->dev, | |
654 | &tmp411_attr[i].dev_attr); | |
655 | if (err) | |
656 | goto exit_remove; | |
657 | } | |
658 | } | |
659 | ||
ab2b79d5 HG |
660 | data->hwmon_dev = hwmon_device_register(&client->dev); |
661 | if (IS_ERR(data->hwmon_dev)) { | |
662 | err = PTR_ERR(data->hwmon_dev); | |
663 | data->hwmon_dev = NULL; | |
664 | goto exit_remove; | |
665 | } | |
666 | ||
dc71afe5 | 667 | dev_info(&client->dev, "Detected TI %s chip\n", names[data->kind]); |
ab2b79d5 HG |
668 | |
669 | return 0; | |
670 | ||
671 | exit_remove: | |
0df9fc7b | 672 | tmp401_remove(client); |
ab2b79d5 HG |
673 | return err; |
674 | } | |
675 | ||
ea63c2b9 AP |
676 | static struct i2c_driver tmp401_driver = { |
677 | .class = I2C_CLASS_HWMON, | |
678 | .driver = { | |
679 | .name = "tmp401", | |
680 | }, | |
681 | .probe = tmp401_probe, | |
682 | .remove = tmp401_remove, | |
683 | .id_table = tmp401_id, | |
684 | .detect = tmp401_detect, | |
685 | .address_list = normal_i2c, | |
686 | }; | |
ab2b79d5 | 687 | |
f0967eea | 688 | module_i2c_driver(tmp401_driver); |
ab2b79d5 HG |
689 | |
690 | MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); | |
691 | MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver"); | |
692 | MODULE_LICENSE("GPL"); |