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ab2b79d5 HG |
1 | /* tmp401.c |
2 | * | |
3 | * Copyright (C) 2007,2008 Hans de Goede <hdegoede@redhat.com> | |
fce0758f AP |
4 | * Preliminary tmp411 support by: |
5 | * Gabriel Konat, Sander Leget, Wouter Willems | |
6 | * Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de> | |
ab2b79d5 | 7 | * |
29dd3b64 GR |
8 | * Cleanup and support for TMP431 and TMP432 by Guenter Roeck |
9 | * Copyright (c) 2013 Guenter Roeck <linux@roeck-us.net> | |
10 | * | |
ab2b79d5 HG |
11 | * This program is free software; you can redistribute it and/or modify |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
24 | */ | |
25 | ||
26 | /* | |
27 | * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC. | |
28 | * | |
29 | * Note this IC is in some aspect similar to the LM90, but it has quite a | |
30 | * few differences too, for example the local temp has a higher resolution | |
31 | * and thus has 16 bits registers for its value and limit instead of 8 bits. | |
32 | */ | |
33 | ||
34 | #include <linux/module.h> | |
35 | #include <linux/init.h> | |
947e9271 | 36 | #include <linux/bitops.h> |
ab2b79d5 HG |
37 | #include <linux/slab.h> |
38 | #include <linux/jiffies.h> | |
39 | #include <linux/i2c.h> | |
40 | #include <linux/hwmon.h> | |
41 | #include <linux/hwmon-sysfs.h> | |
42 | #include <linux/err.h> | |
43 | #include <linux/mutex.h> | |
44 | #include <linux/sysfs.h> | |
45 | ||
46 | /* Addresses to scan */ | |
9aecac04 | 47 | static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d, |
907a6d58 | 48 | 0x4e, 0x4f, I2C_CLIENT_END }; |
ab2b79d5 | 49 | |
c0a68601 | 50 | enum chips { tmp401, tmp411, tmp431, tmp432, tmp435, tmp461 }; |
ab2b79d5 HG |
51 | |
52 | /* | |
53 | * The TMP401 registers, note some registers have different addresses for | |
54 | * reading and writing | |
55 | */ | |
56 | #define TMP401_STATUS 0x02 | |
57 | #define TMP401_CONFIG_READ 0x03 | |
58 | #define TMP401_CONFIG_WRITE 0x09 | |
59 | #define TMP401_CONVERSION_RATE_READ 0x04 | |
60 | #define TMP401_CONVERSION_RATE_WRITE 0x0A | |
61 | #define TMP401_TEMP_CRIT_HYST 0x21 | |
ab2b79d5 HG |
62 | #define TMP401_MANUFACTURER_ID_REG 0xFE |
63 | #define TMP401_DEVICE_ID_REG 0xFF | |
64 | ||
c0a68601 | 65 | static const u8 TMP401_TEMP_MSB_READ[7][2] = { |
14f2a665 GR |
66 | { 0x00, 0x01 }, /* temp */ |
67 | { 0x06, 0x08 }, /* low limit */ | |
68 | { 0x05, 0x07 }, /* high limit */ | |
69 | { 0x20, 0x19 }, /* therm (crit) limit */ | |
70 | { 0x30, 0x34 }, /* lowest */ | |
71 | { 0x32, 0x36 }, /* highest */ | |
c0a68601 | 72 | { 0, 0x11 }, /* offset */ |
14f2a665 GR |
73 | }; |
74 | ||
c0a68601 | 75 | static const u8 TMP401_TEMP_MSB_WRITE[7][2] = { |
14f2a665 GR |
76 | { 0, 0 }, /* temp (unused) */ |
77 | { 0x0C, 0x0E }, /* low limit */ | |
78 | { 0x0B, 0x0D }, /* high limit */ | |
79 | { 0x20, 0x19 }, /* therm (crit) limit */ | |
80 | { 0x30, 0x34 }, /* lowest */ | |
81 | { 0x32, 0x36 }, /* highest */ | |
c0a68601 | 82 | { 0, 0x11 }, /* offset */ |
14f2a665 GR |
83 | }; |
84 | ||
29dd3b64 GR |
85 | static const u8 TMP432_TEMP_MSB_READ[4][3] = { |
86 | { 0x00, 0x01, 0x23 }, /* temp */ | |
87 | { 0x06, 0x08, 0x16 }, /* low limit */ | |
88 | { 0x05, 0x07, 0x15 }, /* high limit */ | |
89 | { 0x20, 0x19, 0x1A }, /* therm (crit) limit */ | |
90 | }; | |
91 | ||
92 | static const u8 TMP432_TEMP_MSB_WRITE[4][3] = { | |
93 | { 0, 0, 0 }, /* temp - unused */ | |
94 | { 0x0C, 0x0E, 0x16 }, /* low limit */ | |
95 | { 0x0B, 0x0D, 0x15 }, /* high limit */ | |
96 | { 0x20, 0x19, 0x1A }, /* therm (crit) limit */ | |
97 | }; | |
98 | ||
29dd3b64 GR |
99 | /* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */ |
100 | static const u8 TMP432_STATUS_REG[] = { | |
101 | 0x1b, 0x36, 0x35, 0x37 }; | |
102 | ||
ab2b79d5 | 103 | /* Flags */ |
947e9271 GR |
104 | #define TMP401_CONFIG_RANGE BIT(2) |
105 | #define TMP401_CONFIG_SHUTDOWN BIT(6) | |
106 | #define TMP401_STATUS_LOCAL_CRIT BIT(0) | |
107 | #define TMP401_STATUS_REMOTE_CRIT BIT(1) | |
108 | #define TMP401_STATUS_REMOTE_OPEN BIT(2) | |
109 | #define TMP401_STATUS_REMOTE_LOW BIT(3) | |
110 | #define TMP401_STATUS_REMOTE_HIGH BIT(4) | |
111 | #define TMP401_STATUS_LOCAL_LOW BIT(5) | |
112 | #define TMP401_STATUS_LOCAL_HIGH BIT(6) | |
ab2b79d5 | 113 | |
29dd3b64 GR |
114 | /* On TMP432, each status has its own register */ |
115 | #define TMP432_STATUS_LOCAL BIT(0) | |
116 | #define TMP432_STATUS_REMOTE1 BIT(1) | |
117 | #define TMP432_STATUS_REMOTE2 BIT(2) | |
118 | ||
ab2b79d5 HG |
119 | /* Manufacturer / Device ID's */ |
120 | #define TMP401_MANUFACTURER_ID 0x55 | |
121 | #define TMP401_DEVICE_ID 0x11 | |
4ce5b1fe GR |
122 | #define TMP411A_DEVICE_ID 0x12 |
123 | #define TMP411B_DEVICE_ID 0x13 | |
124 | #define TMP411C_DEVICE_ID 0x10 | |
a1fac92b | 125 | #define TMP431_DEVICE_ID 0x31 |
29dd3b64 | 126 | #define TMP432_DEVICE_ID 0x32 |
06adbaec | 127 | #define TMP435_DEVICE_ID 0x35 |
ab2b79d5 | 128 | |
ab2b79d5 HG |
129 | /* |
130 | * Driver data (common to all clients) | |
131 | */ | |
132 | ||
133 | static const struct i2c_device_id tmp401_id[] = { | |
134 | { "tmp401", tmp401 }, | |
fce0758f | 135 | { "tmp411", tmp411 }, |
a1fac92b | 136 | { "tmp431", tmp431 }, |
29dd3b64 | 137 | { "tmp432", tmp432 }, |
06adbaec | 138 | { "tmp435", tmp435 }, |
c0a68601 | 139 | { "tmp461", tmp461 }, |
ab2b79d5 HG |
140 | { } |
141 | }; | |
142 | MODULE_DEVICE_TABLE(i2c, tmp401_id); | |
143 | ||
ab2b79d5 HG |
144 | /* |
145 | * Client data (each client gets its own) | |
146 | */ | |
147 | ||
148 | struct tmp401_data { | |
f3643ac7 GR |
149 | struct i2c_client *client; |
150 | const struct attribute_group *groups[3]; | |
ab2b79d5 HG |
151 | struct mutex update_lock; |
152 | char valid; /* zero until following fields are valid */ | |
153 | unsigned long last_updated; /* in jiffies */ | |
dc71afe5 | 154 | enum chips kind; |
ab2b79d5 | 155 | |
0846e30d GR |
156 | unsigned int update_interval; /* in milliseconds */ |
157 | ||
ab2b79d5 | 158 | /* register values */ |
29dd3b64 | 159 | u8 status[4]; |
ab2b79d5 | 160 | u8 config; |
c0a68601 | 161 | u16 temp[7][3]; |
ab2b79d5 HG |
162 | u8 temp_crit_hyst; |
163 | }; | |
164 | ||
165 | /* | |
166 | * Sysfs attr show / store functions | |
167 | */ | |
168 | ||
169 | static int tmp401_register_to_temp(u16 reg, u8 config) | |
170 | { | |
171 | int temp = reg; | |
172 | ||
173 | if (config & TMP401_CONFIG_RANGE) | |
174 | temp -= 64 * 256; | |
175 | ||
14f2a665 | 176 | return DIV_ROUND_CLOSEST(temp * 125, 32); |
ab2b79d5 HG |
177 | } |
178 | ||
14f2a665 | 179 | static u16 tmp401_temp_to_register(long temp, u8 config, int zbits) |
ab2b79d5 HG |
180 | { |
181 | if (config & TMP401_CONFIG_RANGE) { | |
2a844c14 | 182 | temp = clamp_val(temp, -64000, 191000); |
ab2b79d5 HG |
183 | temp += 64000; |
184 | } else | |
2a844c14 | 185 | temp = clamp_val(temp, 0, 127000); |
ab2b79d5 | 186 | |
14f2a665 | 187 | return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits; |
ab2b79d5 HG |
188 | } |
189 | ||
14f2a665 GR |
190 | static int tmp401_update_device_reg16(struct i2c_client *client, |
191 | struct tmp401_data *data) | |
ea63c2b9 | 192 | { |
14f2a665 GR |
193 | int i, j, val; |
194 | int num_regs = data->kind == tmp411 ? 6 : 4; | |
29dd3b64 | 195 | int num_sensors = data->kind == tmp432 ? 3 : 2; |
14f2a665 | 196 | |
29dd3b64 | 197 | for (i = 0; i < num_sensors; i++) { /* local / r1 / r2 */ |
14f2a665 | 198 | for (j = 0; j < num_regs; j++) { /* temp / low / ... */ |
29dd3b64 | 199 | u8 regaddr; |
24333ac2 | 200 | |
29dd3b64 GR |
201 | regaddr = data->kind == tmp432 ? |
202 | TMP432_TEMP_MSB_READ[j][i] : | |
203 | TMP401_TEMP_MSB_READ[j][i]; | |
24333ac2 JDW |
204 | if (j == 3) { /* crit is msb only */ |
205 | val = i2c_smbus_read_byte_data(client, regaddr); | |
206 | } else { | |
207 | val = i2c_smbus_read_word_swapped(client, | |
208 | regaddr); | |
209 | } | |
14f2a665 GR |
210 | if (val < 0) |
211 | return val; | |
24333ac2 JDW |
212 | |
213 | data->temp[j][i] = j == 3 ? val << 8 : val; | |
ea63c2b9 AP |
214 | } |
215 | } | |
14f2a665 | 216 | return 0; |
ea63c2b9 AP |
217 | } |
218 | ||
219 | static struct tmp401_data *tmp401_update_device(struct device *dev) | |
220 | { | |
f3643ac7 GR |
221 | struct tmp401_data *data = dev_get_drvdata(dev); |
222 | struct i2c_client *client = data->client; | |
14f2a665 | 223 | struct tmp401_data *ret = data; |
29dd3b64 | 224 | int i, val; |
0846e30d | 225 | unsigned long next_update; |
ea63c2b9 AP |
226 | |
227 | mutex_lock(&data->update_lock); | |
228 | ||
0846e30d | 229 | next_update = data->last_updated + |
4e2284d2 | 230 | msecs_to_jiffies(data->update_interval); |
0846e30d | 231 | if (time_after(jiffies, next_update) || !data->valid) { |
29dd3b64 GR |
232 | if (data->kind != tmp432) { |
233 | /* | |
234 | * The driver uses the TMP432 status format internally. | |
235 | * Convert status to TMP432 format for other chips. | |
236 | */ | |
237 | val = i2c_smbus_read_byte_data(client, TMP401_STATUS); | |
238 | if (val < 0) { | |
239 | ret = ERR_PTR(val); | |
240 | goto abort; | |
241 | } | |
242 | data->status[0] = | |
243 | (val & TMP401_STATUS_REMOTE_OPEN) >> 1; | |
244 | data->status[1] = | |
245 | ((val & TMP401_STATUS_REMOTE_LOW) >> 2) | | |
246 | ((val & TMP401_STATUS_LOCAL_LOW) >> 5); | |
247 | data->status[2] = | |
248 | ((val & TMP401_STATUS_REMOTE_HIGH) >> 3) | | |
249 | ((val & TMP401_STATUS_LOCAL_HIGH) >> 6); | |
250 | data->status[3] = val & (TMP401_STATUS_LOCAL_CRIT | |
251 | | TMP401_STATUS_REMOTE_CRIT); | |
252 | } else { | |
253 | for (i = 0; i < ARRAY_SIZE(data->status); i++) { | |
254 | val = i2c_smbus_read_byte_data(client, | |
255 | TMP432_STATUS_REG[i]); | |
256 | if (val < 0) { | |
257 | ret = ERR_PTR(val); | |
258 | goto abort; | |
259 | } | |
260 | data->status[i] = val; | |
261 | } | |
14f2a665 | 262 | } |
29dd3b64 | 263 | |
14f2a665 GR |
264 | val = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ); |
265 | if (val < 0) { | |
266 | ret = ERR_PTR(val); | |
267 | goto abort; | |
268 | } | |
269 | data->config = val; | |
270 | val = tmp401_update_device_reg16(client, data); | |
271 | if (val < 0) { | |
272 | ret = ERR_PTR(val); | |
273 | goto abort; | |
274 | } | |
275 | val = i2c_smbus_read_byte_data(client, TMP401_TEMP_CRIT_HYST); | |
276 | if (val < 0) { | |
277 | ret = ERR_PTR(val); | |
278 | goto abort; | |
279 | } | |
280 | data->temp_crit_hyst = val; | |
ea63c2b9 AP |
281 | |
282 | data->last_updated = jiffies; | |
283 | data->valid = 1; | |
284 | } | |
285 | ||
14f2a665 | 286 | abort: |
ea63c2b9 | 287 | mutex_unlock(&data->update_lock); |
14f2a665 | 288 | return ret; |
ab2b79d5 HG |
289 | } |
290 | ||
e36917f4 GR |
291 | static ssize_t temp_show(struct device *dev, struct device_attribute *devattr, |
292 | char *buf) | |
ab2b79d5 | 293 | { |
14f2a665 GR |
294 | int nr = to_sensor_dev_attr_2(devattr)->nr; |
295 | int index = to_sensor_dev_attr_2(devattr)->index; | |
ab2b79d5 HG |
296 | struct tmp401_data *data = tmp401_update_device(dev); |
297 | ||
14f2a665 GR |
298 | if (IS_ERR(data)) |
299 | return PTR_ERR(data); | |
ab2b79d5 HG |
300 | |
301 | return sprintf(buf, "%d\n", | |
14f2a665 | 302 | tmp401_register_to_temp(data->temp[nr][index], data->config)); |
ab2b79d5 HG |
303 | } |
304 | ||
e36917f4 GR |
305 | static ssize_t temp_crit_hyst_show(struct device *dev, |
306 | struct device_attribute *devattr, | |
307 | char *buf) | |
ab2b79d5 HG |
308 | { |
309 | int temp, index = to_sensor_dev_attr(devattr)->index; | |
310 | struct tmp401_data *data = tmp401_update_device(dev); | |
311 | ||
14f2a665 GR |
312 | if (IS_ERR(data)) |
313 | return PTR_ERR(data); | |
314 | ||
ab2b79d5 | 315 | mutex_lock(&data->update_lock); |
14f2a665 | 316 | temp = tmp401_register_to_temp(data->temp[3][index], data->config); |
ab2b79d5 HG |
317 | temp -= data->temp_crit_hyst * 1000; |
318 | mutex_unlock(&data->update_lock); | |
319 | ||
320 | return sprintf(buf, "%d\n", temp); | |
321 | } | |
322 | ||
e36917f4 GR |
323 | static ssize_t status_show(struct device *dev, |
324 | struct device_attribute *devattr, char *buf) | |
ab2b79d5 | 325 | { |
29dd3b64 GR |
326 | int nr = to_sensor_dev_attr_2(devattr)->nr; |
327 | int mask = to_sensor_dev_attr_2(devattr)->index; | |
ab2b79d5 HG |
328 | struct tmp401_data *data = tmp401_update_device(dev); |
329 | ||
14f2a665 GR |
330 | if (IS_ERR(data)) |
331 | return PTR_ERR(data); | |
ab2b79d5 | 332 | |
29dd3b64 | 333 | return sprintf(buf, "%d\n", !!(data->status[nr] & mask)); |
ab2b79d5 HG |
334 | } |
335 | ||
e36917f4 GR |
336 | static ssize_t temp_store(struct device *dev, |
337 | struct device_attribute *devattr, const char *buf, | |
338 | size_t count) | |
ab2b79d5 | 339 | { |
14f2a665 GR |
340 | int nr = to_sensor_dev_attr_2(devattr)->nr; |
341 | int index = to_sensor_dev_attr_2(devattr)->index; | |
f3643ac7 GR |
342 | struct tmp401_data *data = dev_get_drvdata(dev); |
343 | struct i2c_client *client = data->client; | |
ab2b79d5 HG |
344 | long val; |
345 | u16 reg; | |
29dd3b64 | 346 | u8 regaddr; |
ab2b79d5 | 347 | |
179c4fdb | 348 | if (kstrtol(buf, 10, &val)) |
ab2b79d5 HG |
349 | return -EINVAL; |
350 | ||
14f2a665 | 351 | reg = tmp401_temp_to_register(val, data->config, nr == 3 ? 8 : 4); |
ab2b79d5 HG |
352 | |
353 | mutex_lock(&data->update_lock); | |
354 | ||
29dd3b64 GR |
355 | regaddr = data->kind == tmp432 ? TMP432_TEMP_MSB_WRITE[nr][index] |
356 | : TMP401_TEMP_MSB_WRITE[nr][index]; | |
24333ac2 JDW |
357 | if (nr == 3) { /* crit is msb only */ |
358 | i2c_smbus_write_byte_data(client, regaddr, reg >> 8); | |
359 | } else { | |
360 | /* Hardware expects big endian data --> use _swapped */ | |
361 | i2c_smbus_write_word_swapped(client, regaddr, reg); | |
14f2a665 GR |
362 | } |
363 | data->temp[nr][index] = reg; | |
ab2b79d5 HG |
364 | |
365 | mutex_unlock(&data->update_lock); | |
366 | ||
367 | return count; | |
368 | } | |
369 | ||
e36917f4 GR |
370 | static ssize_t temp_crit_hyst_store(struct device *dev, |
371 | struct device_attribute *devattr, | |
372 | const char *buf, size_t count) | |
ab2b79d5 HG |
373 | { |
374 | int temp, index = to_sensor_dev_attr(devattr)->index; | |
375 | struct tmp401_data *data = tmp401_update_device(dev); | |
376 | long val; | |
377 | u8 reg; | |
378 | ||
14f2a665 GR |
379 | if (IS_ERR(data)) |
380 | return PTR_ERR(data); | |
381 | ||
179c4fdb | 382 | if (kstrtol(buf, 10, &val)) |
ab2b79d5 HG |
383 | return -EINVAL; |
384 | ||
385 | if (data->config & TMP401_CONFIG_RANGE) | |
2a844c14 | 386 | val = clamp_val(val, -64000, 191000); |
ab2b79d5 | 387 | else |
2a844c14 | 388 | val = clamp_val(val, 0, 127000); |
ab2b79d5 HG |
389 | |
390 | mutex_lock(&data->update_lock); | |
14f2a665 | 391 | temp = tmp401_register_to_temp(data->temp[3][index], data->config); |
2a844c14 | 392 | val = clamp_val(val, temp - 255000, temp); |
ab2b79d5 HG |
393 | reg = ((temp - val) + 500) / 1000; |
394 | ||
f3643ac7 | 395 | i2c_smbus_write_byte_data(data->client, TMP401_TEMP_CRIT_HYST, |
14f2a665 | 396 | reg); |
ab2b79d5 HG |
397 | |
398 | data->temp_crit_hyst = reg; | |
399 | ||
400 | mutex_unlock(&data->update_lock); | |
401 | ||
402 | return count; | |
403 | } | |
404 | ||
fce0758f AP |
405 | /* |
406 | * Resets the historical measurements of minimum and maximum temperatures. | |
407 | * This is done by writing any value to any of the minimum/maximum registers | |
408 | * (0x30-0x37). | |
409 | */ | |
e36917f4 GR |
410 | static ssize_t reset_temp_history_store(struct device *dev, |
411 | struct device_attribute *devattr, | |
412 | const char *buf, size_t count) | |
fce0758f | 413 | { |
f3643ac7 GR |
414 | struct tmp401_data *data = dev_get_drvdata(dev); |
415 | struct i2c_client *client = data->client; | |
fce0758f AP |
416 | long val; |
417 | ||
179c4fdb | 418 | if (kstrtol(buf, 10, &val)) |
fce0758f AP |
419 | return -EINVAL; |
420 | ||
421 | if (val != 1) { | |
b55f3757 GR |
422 | dev_err(dev, |
423 | "temp_reset_history value %ld not supported. Use 1 to reset the history!\n", | |
424 | val); | |
fce0758f AP |
425 | return -EINVAL; |
426 | } | |
8eb6d90f GR |
427 | mutex_lock(&data->update_lock); |
428 | i2c_smbus_write_byte_data(client, TMP401_TEMP_MSB_WRITE[5][0], val); | |
429 | data->valid = 0; | |
430 | mutex_unlock(&data->update_lock); | |
fce0758f AP |
431 | |
432 | return count; | |
433 | } | |
434 | ||
5343aed1 | 435 | static ssize_t update_interval_show(struct device *dev, |
0846e30d GR |
436 | struct device_attribute *attr, char *buf) |
437 | { | |
f3643ac7 | 438 | struct tmp401_data *data = dev_get_drvdata(dev); |
0846e30d GR |
439 | |
440 | return sprintf(buf, "%u\n", data->update_interval); | |
441 | } | |
442 | ||
5343aed1 JL |
443 | static ssize_t update_interval_store(struct device *dev, |
444 | struct device_attribute *attr, | |
445 | const char *buf, size_t count) | |
0846e30d | 446 | { |
f3643ac7 GR |
447 | struct tmp401_data *data = dev_get_drvdata(dev); |
448 | struct i2c_client *client = data->client; | |
0846e30d GR |
449 | unsigned long val; |
450 | int err, rate; | |
451 | ||
452 | err = kstrtoul(buf, 10, &val); | |
453 | if (err) | |
454 | return err; | |
455 | ||
456 | /* | |
457 | * For valid rates, interval can be calculated as | |
458 | * interval = (1 << (7 - rate)) * 125; | |
459 | * Rounded rate is therefore | |
460 | * rate = 7 - __fls(interval * 4 / (125 * 3)); | |
461 | * Use clamp_val() to avoid overflows, and to ensure valid input | |
462 | * for __fls. | |
463 | */ | |
464 | val = clamp_val(val, 125, 16000); | |
465 | rate = 7 - __fls(val * 4 / (125 * 3)); | |
466 | mutex_lock(&data->update_lock); | |
467 | i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, rate); | |
468 | data->update_interval = (1 << (7 - rate)) * 125; | |
469 | mutex_unlock(&data->update_lock); | |
470 | ||
471 | return count; | |
472 | } | |
473 | ||
e36917f4 GR |
474 | static SENSOR_DEVICE_ATTR_2_RO(temp1_input, temp, 0, 0); |
475 | static SENSOR_DEVICE_ATTR_2_RW(temp1_min, temp, 1, 0); | |
476 | static SENSOR_DEVICE_ATTR_2_RW(temp1_max, temp, 2, 0); | |
477 | static SENSOR_DEVICE_ATTR_2_RW(temp1_crit, temp, 3, 0); | |
478 | static SENSOR_DEVICE_ATTR_RW(temp1_crit_hyst, temp_crit_hyst, 0); | |
479 | static SENSOR_DEVICE_ATTR_2_RO(temp1_min_alarm, status, 1, | |
480 | TMP432_STATUS_LOCAL); | |
481 | static SENSOR_DEVICE_ATTR_2_RO(temp1_max_alarm, status, 2, | |
482 | TMP432_STATUS_LOCAL); | |
483 | static SENSOR_DEVICE_ATTR_2_RO(temp1_crit_alarm, status, 3, | |
484 | TMP432_STATUS_LOCAL); | |
485 | static SENSOR_DEVICE_ATTR_2_RO(temp2_input, temp, 0, 1); | |
486 | static SENSOR_DEVICE_ATTR_2_RW(temp2_min, temp, 1, 1); | |
487 | static SENSOR_DEVICE_ATTR_2_RW(temp2_max, temp, 2, 1); | |
488 | static SENSOR_DEVICE_ATTR_2_RW(temp2_crit, temp, 3, 1); | |
489 | static SENSOR_DEVICE_ATTR_RO(temp2_crit_hyst, temp_crit_hyst, 1); | |
490 | static SENSOR_DEVICE_ATTR_2_RO(temp2_fault, status, 0, TMP432_STATUS_REMOTE1); | |
491 | static SENSOR_DEVICE_ATTR_2_RO(temp2_min_alarm, status, 1, | |
492 | TMP432_STATUS_REMOTE1); | |
493 | static SENSOR_DEVICE_ATTR_2_RO(temp2_max_alarm, status, 2, | |
494 | TMP432_STATUS_REMOTE1); | |
495 | static SENSOR_DEVICE_ATTR_2_RO(temp2_crit_alarm, status, 3, | |
496 | TMP432_STATUS_REMOTE1); | |
b4e665c7 | 497 | |
5343aed1 | 498 | static DEVICE_ATTR_RW(update_interval); |
0846e30d | 499 | |
b4e665c7 GR |
500 | static struct attribute *tmp401_attributes[] = { |
501 | &sensor_dev_attr_temp1_input.dev_attr.attr, | |
502 | &sensor_dev_attr_temp1_min.dev_attr.attr, | |
503 | &sensor_dev_attr_temp1_max.dev_attr.attr, | |
504 | &sensor_dev_attr_temp1_crit.dev_attr.attr, | |
505 | &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr, | |
506 | &sensor_dev_attr_temp1_max_alarm.dev_attr.attr, | |
507 | &sensor_dev_attr_temp1_min_alarm.dev_attr.attr, | |
508 | &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr, | |
509 | ||
510 | &sensor_dev_attr_temp2_input.dev_attr.attr, | |
511 | &sensor_dev_attr_temp2_min.dev_attr.attr, | |
512 | &sensor_dev_attr_temp2_max.dev_attr.attr, | |
513 | &sensor_dev_attr_temp2_crit.dev_attr.attr, | |
514 | &sensor_dev_attr_temp2_crit_hyst.dev_attr.attr, | |
515 | &sensor_dev_attr_temp2_fault.dev_attr.attr, | |
516 | &sensor_dev_attr_temp2_max_alarm.dev_attr.attr, | |
517 | &sensor_dev_attr_temp2_min_alarm.dev_attr.attr, | |
518 | &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr, | |
519 | ||
0846e30d GR |
520 | &dev_attr_update_interval.attr, |
521 | ||
b4e665c7 GR |
522 | NULL |
523 | }; | |
524 | ||
525 | static const struct attribute_group tmp401_group = { | |
526 | .attrs = tmp401_attributes, | |
ab2b79d5 HG |
527 | }; |
528 | ||
fce0758f AP |
529 | /* |
530 | * Additional features of the TMP411 chip. | |
531 | * The TMP411 stores the minimum and maximum | |
532 | * temperature measured since power-on, chip-reset, or | |
533 | * minimum and maximum register reset for both the local | |
534 | * and remote channels. | |
535 | */ | |
e36917f4 GR |
536 | static SENSOR_DEVICE_ATTR_2_RO(temp1_lowest, temp, 4, 0); |
537 | static SENSOR_DEVICE_ATTR_2_RO(temp1_highest, temp, 5, 0); | |
538 | static SENSOR_DEVICE_ATTR_2_RO(temp2_lowest, temp, 4, 1); | |
539 | static SENSOR_DEVICE_ATTR_2_RO(temp2_highest, temp, 5, 1); | |
540 | static SENSOR_DEVICE_ATTR_WO(temp_reset_history, reset_temp_history, 0); | |
b4e665c7 GR |
541 | |
542 | static struct attribute *tmp411_attributes[] = { | |
543 | &sensor_dev_attr_temp1_highest.dev_attr.attr, | |
544 | &sensor_dev_attr_temp1_lowest.dev_attr.attr, | |
545 | &sensor_dev_attr_temp2_highest.dev_attr.attr, | |
546 | &sensor_dev_attr_temp2_lowest.dev_attr.attr, | |
547 | &sensor_dev_attr_temp_reset_history.dev_attr.attr, | |
548 | NULL | |
549 | }; | |
550 | ||
551 | static const struct attribute_group tmp411_group = { | |
552 | .attrs = tmp411_attributes, | |
fce0758f AP |
553 | }; |
554 | ||
e36917f4 GR |
555 | static SENSOR_DEVICE_ATTR_2_RO(temp3_input, temp, 0, 2); |
556 | static SENSOR_DEVICE_ATTR_2_RW(temp3_min, temp, 1, 2); | |
557 | static SENSOR_DEVICE_ATTR_2_RW(temp3_max, temp, 2, 2); | |
558 | static SENSOR_DEVICE_ATTR_2_RW(temp3_crit, temp, 3, 2); | |
559 | static SENSOR_DEVICE_ATTR_RO(temp3_crit_hyst, temp_crit_hyst, 2); | |
560 | static SENSOR_DEVICE_ATTR_2_RO(temp3_fault, status, 0, TMP432_STATUS_REMOTE2); | |
561 | static SENSOR_DEVICE_ATTR_2_RO(temp3_min_alarm, status, 1, | |
562 | TMP432_STATUS_REMOTE2); | |
563 | static SENSOR_DEVICE_ATTR_2_RO(temp3_max_alarm, status, 2, | |
564 | TMP432_STATUS_REMOTE2); | |
565 | static SENSOR_DEVICE_ATTR_2_RO(temp3_crit_alarm, status, 3, | |
566 | TMP432_STATUS_REMOTE2); | |
29dd3b64 GR |
567 | |
568 | static struct attribute *tmp432_attributes[] = { | |
569 | &sensor_dev_attr_temp3_input.dev_attr.attr, | |
570 | &sensor_dev_attr_temp3_min.dev_attr.attr, | |
571 | &sensor_dev_attr_temp3_max.dev_attr.attr, | |
572 | &sensor_dev_attr_temp3_crit.dev_attr.attr, | |
573 | &sensor_dev_attr_temp3_crit_hyst.dev_attr.attr, | |
574 | &sensor_dev_attr_temp3_fault.dev_attr.attr, | |
575 | &sensor_dev_attr_temp3_max_alarm.dev_attr.attr, | |
576 | &sensor_dev_attr_temp3_min_alarm.dev_attr.attr, | |
577 | &sensor_dev_attr_temp3_crit_alarm.dev_attr.attr, | |
578 | ||
579 | NULL | |
580 | }; | |
581 | ||
582 | static const struct attribute_group tmp432_group = { | |
583 | .attrs = tmp432_attributes, | |
584 | }; | |
585 | ||
c0a68601 AD |
586 | /* |
587 | * Additional features of the TMP461 chip. | |
588 | * The TMP461 temperature offset for the remote channel. | |
589 | */ | |
e36917f4 | 590 | static SENSOR_DEVICE_ATTR_2_RW(temp2_offset, temp, 6, 1); |
c0a68601 AD |
591 | |
592 | static struct attribute *tmp461_attributes[] = { | |
593 | &sensor_dev_attr_temp2_offset.dev_attr.attr, | |
594 | NULL | |
595 | }; | |
596 | ||
597 | static const struct attribute_group tmp461_group = { | |
598 | .attrs = tmp461_attributes, | |
599 | }; | |
600 | ||
ab2b79d5 HG |
601 | /* |
602 | * Begin non sysfs callback code (aka Real code) | |
603 | */ | |
604 | ||
90652efe BG |
605 | static int tmp401_init_client(struct tmp401_data *data, |
606 | struct i2c_client *client) | |
ab2b79d5 | 607 | { |
90652efe | 608 | int config, config_orig, status = 0; |
ab2b79d5 HG |
609 | |
610 | /* Set the conversion rate to 2 Hz */ | |
611 | i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, 5); | |
0846e30d | 612 | data->update_interval = 500; |
ab2b79d5 HG |
613 | |
614 | /* Start conversions (disable shutdown if necessary) */ | |
615 | config = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ); | |
90652efe BG |
616 | if (config < 0) |
617 | return config; | |
ab2b79d5 HG |
618 | |
619 | config_orig = config; | |
620 | config &= ~TMP401_CONFIG_SHUTDOWN; | |
621 | ||
622 | if (config != config_orig) | |
90652efe BG |
623 | status = i2c_smbus_write_byte_data(client, |
624 | TMP401_CONFIG_WRITE, | |
625 | config); | |
626 | ||
627 | return status; | |
ab2b79d5 HG |
628 | } |
629 | ||
310ec792 | 630 | static int tmp401_detect(struct i2c_client *client, |
ab2b79d5 HG |
631 | struct i2c_board_info *info) |
632 | { | |
dbe73c8f | 633 | enum chips kind; |
ab2b79d5 | 634 | struct i2c_adapter *adapter = client->adapter; |
dbe73c8f | 635 | u8 reg; |
ab2b79d5 HG |
636 | |
637 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | |
638 | return -ENODEV; | |
639 | ||
640 | /* Detect and identify the chip */ | |
dbe73c8f JD |
641 | reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG); |
642 | if (reg != TMP401_MANUFACTURER_ID) | |
643 | return -ENODEV; | |
ab2b79d5 | 644 | |
dbe73c8f | 645 | reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG); |
ab2b79d5 | 646 | |
dbe73c8f JD |
647 | switch (reg) { |
648 | case TMP401_DEVICE_ID: | |
a1fac92b GR |
649 | if (client->addr != 0x4c) |
650 | return -ENODEV; | |
dbe73c8f JD |
651 | kind = tmp401; |
652 | break; | |
4ce5b1fe GR |
653 | case TMP411A_DEVICE_ID: |
654 | if (client->addr != 0x4c) | |
655 | return -ENODEV; | |
656 | kind = tmp411; | |
657 | break; | |
658 | case TMP411B_DEVICE_ID: | |
659 | if (client->addr != 0x4d) | |
660 | return -ENODEV; | |
661 | kind = tmp411; | |
662 | break; | |
663 | case TMP411C_DEVICE_ID: | |
664 | if (client->addr != 0x4e) | |
665 | return -ENODEV; | |
dbe73c8f JD |
666 | kind = tmp411; |
667 | break; | |
a1fac92b | 668 | case TMP431_DEVICE_ID: |
907a6d58 | 669 | if (client->addr != 0x4c && client->addr != 0x4d) |
a1fac92b GR |
670 | return -ENODEV; |
671 | kind = tmp431; | |
672 | break; | |
29dd3b64 | 673 | case TMP432_DEVICE_ID: |
907a6d58 | 674 | if (client->addr != 0x4c && client->addr != 0x4d) |
29dd3b64 GR |
675 | return -ENODEV; |
676 | kind = tmp432; | |
677 | break; | |
06adbaec | 678 | case TMP435_DEVICE_ID: |
06adbaec PT |
679 | kind = tmp435; |
680 | break; | |
dbe73c8f JD |
681 | default: |
682 | return -ENODEV; | |
ab2b79d5 | 683 | } |
dbe73c8f JD |
684 | |
685 | reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ); | |
686 | if (reg & 0x1b) | |
687 | return -ENODEV; | |
688 | ||
689 | reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE_READ); | |
690 | /* Datasheet says: 0x1-0x6 */ | |
691 | if (reg > 15) | |
692 | return -ENODEV; | |
693 | ||
dc71afe5 | 694 | strlcpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE); |
ab2b79d5 HG |
695 | |
696 | return 0; | |
697 | } | |
698 | ||
699 | static int tmp401_probe(struct i2c_client *client, | |
700 | const struct i2c_device_id *id) | |
701 | { | |
06adbaec | 702 | static const char * const names[] = { |
c0a68601 | 703 | "TMP401", "TMP411", "TMP431", "TMP432", "TMP435", "TMP461" |
06adbaec | 704 | }; |
b4e665c7 | 705 | struct device *dev = &client->dev; |
f3643ac7 | 706 | struct device *hwmon_dev; |
ab2b79d5 | 707 | struct tmp401_data *data; |
90652efe | 708 | int groups = 0, status; |
ab2b79d5 | 709 | |
b4e665c7 | 710 | data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL); |
ab2b79d5 HG |
711 | if (!data) |
712 | return -ENOMEM; | |
713 | ||
f3643ac7 | 714 | data->client = client; |
ab2b79d5 | 715 | mutex_init(&data->update_lock); |
fce0758f | 716 | data->kind = id->driver_data; |
ab2b79d5 HG |
717 | |
718 | /* Initialize the TMP401 chip */ | |
90652efe BG |
719 | status = tmp401_init_client(data, client); |
720 | if (status < 0) | |
721 | return status; | |
ab2b79d5 HG |
722 | |
723 | /* Register sysfs hooks */ | |
f3643ac7 | 724 | data->groups[groups++] = &tmp401_group; |
ab2b79d5 | 725 | |
a80581d0 | 726 | /* Register additional tmp411 sysfs hooks */ |
f3643ac7 GR |
727 | if (data->kind == tmp411) |
728 | data->groups[groups++] = &tmp411_group; | |
fce0758f | 729 | |
29dd3b64 | 730 | /* Register additional tmp432 sysfs hooks */ |
f3643ac7 GR |
731 | if (data->kind == tmp432) |
732 | data->groups[groups++] = &tmp432_group; | |
29dd3b64 | 733 | |
c0a68601 AD |
734 | if (data->kind == tmp461) |
735 | data->groups[groups++] = &tmp461_group; | |
736 | ||
f3643ac7 GR |
737 | hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name, |
738 | data, data->groups); | |
739 | if (IS_ERR(hwmon_dev)) | |
740 | return PTR_ERR(hwmon_dev); | |
ab2b79d5 | 741 | |
b4e665c7 | 742 | dev_info(dev, "Detected TI %s chip\n", names[data->kind]); |
ab2b79d5 HG |
743 | |
744 | return 0; | |
ab2b79d5 HG |
745 | } |
746 | ||
ea63c2b9 AP |
747 | static struct i2c_driver tmp401_driver = { |
748 | .class = I2C_CLASS_HWMON, | |
749 | .driver = { | |
750 | .name = "tmp401", | |
751 | }, | |
752 | .probe = tmp401_probe, | |
ea63c2b9 AP |
753 | .id_table = tmp401_id, |
754 | .detect = tmp401_detect, | |
755 | .address_list = normal_i2c, | |
756 | }; | |
ab2b79d5 | 757 | |
f0967eea | 758 | module_i2c_driver(tmp401_driver); |
ab2b79d5 HG |
759 | |
760 | MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); | |
761 | MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver"); | |
762 | MODULE_LICENSE("GPL"); |