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ab2b79d5 HG |
1 | /* tmp401.c |
2 | * | |
3 | * Copyright (C) 2007,2008 Hans de Goede <hdegoede@redhat.com> | |
fce0758f AP |
4 | * Preliminary tmp411 support by: |
5 | * Gabriel Konat, Sander Leget, Wouter Willems | |
6 | * Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de> | |
ab2b79d5 | 7 | * |
29dd3b64 GR |
8 | * Cleanup and support for TMP431 and TMP432 by Guenter Roeck |
9 | * Copyright (c) 2013 Guenter Roeck <linux@roeck-us.net> | |
10 | * | |
ab2b79d5 HG |
11 | * This program is free software; you can redistribute it and/or modify |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
24 | */ | |
25 | ||
26 | /* | |
27 | * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC. | |
28 | * | |
29 | * Note this IC is in some aspect similar to the LM90, but it has quite a | |
30 | * few differences too, for example the local temp has a higher resolution | |
31 | * and thus has 16 bits registers for its value and limit instead of 8 bits. | |
32 | */ | |
33 | ||
34 | #include <linux/module.h> | |
35 | #include <linux/init.h> | |
947e9271 | 36 | #include <linux/bitops.h> |
ab2b79d5 HG |
37 | #include <linux/slab.h> |
38 | #include <linux/jiffies.h> | |
39 | #include <linux/i2c.h> | |
40 | #include <linux/hwmon.h> | |
41 | #include <linux/hwmon-sysfs.h> | |
42 | #include <linux/err.h> | |
43 | #include <linux/mutex.h> | |
44 | #include <linux/sysfs.h> | |
45 | ||
46 | /* Addresses to scan */ | |
a1fac92b | 47 | static const unsigned short normal_i2c[] = { 0x4c, 0x4d, 0x4e, I2C_CLIENT_END }; |
ab2b79d5 | 48 | |
29dd3b64 | 49 | enum chips { tmp401, tmp411, tmp431, tmp432 }; |
ab2b79d5 HG |
50 | |
51 | /* | |
52 | * The TMP401 registers, note some registers have different addresses for | |
53 | * reading and writing | |
54 | */ | |
55 | #define TMP401_STATUS 0x02 | |
56 | #define TMP401_CONFIG_READ 0x03 | |
57 | #define TMP401_CONFIG_WRITE 0x09 | |
58 | #define TMP401_CONVERSION_RATE_READ 0x04 | |
59 | #define TMP401_CONVERSION_RATE_WRITE 0x0A | |
60 | #define TMP401_TEMP_CRIT_HYST 0x21 | |
ab2b79d5 HG |
61 | #define TMP401_MANUFACTURER_ID_REG 0xFE |
62 | #define TMP401_DEVICE_ID_REG 0xFF | |
63 | ||
14f2a665 GR |
64 | static const u8 TMP401_TEMP_MSB_READ[6][2] = { |
65 | { 0x00, 0x01 }, /* temp */ | |
66 | { 0x06, 0x08 }, /* low limit */ | |
67 | { 0x05, 0x07 }, /* high limit */ | |
68 | { 0x20, 0x19 }, /* therm (crit) limit */ | |
69 | { 0x30, 0x34 }, /* lowest */ | |
70 | { 0x32, 0x36 }, /* highest */ | |
71 | }; | |
72 | ||
73 | static const u8 TMP401_TEMP_MSB_WRITE[6][2] = { | |
74 | { 0, 0 }, /* temp (unused) */ | |
75 | { 0x0C, 0x0E }, /* low limit */ | |
76 | { 0x0B, 0x0D }, /* high limit */ | |
77 | { 0x20, 0x19 }, /* therm (crit) limit */ | |
78 | { 0x30, 0x34 }, /* lowest */ | |
79 | { 0x32, 0x36 }, /* highest */ | |
80 | }; | |
81 | ||
82 | static const u8 TMP401_TEMP_LSB[6][2] = { | |
83 | { 0x15, 0x10 }, /* temp */ | |
84 | { 0x17, 0x14 }, /* low limit */ | |
85 | { 0x16, 0x13 }, /* high limit */ | |
86 | { 0, 0 }, /* therm (crit) limit (unused) */ | |
87 | { 0x31, 0x35 }, /* lowest */ | |
88 | { 0x33, 0x37 }, /* highest */ | |
89 | }; | |
fce0758f | 90 | |
29dd3b64 GR |
91 | static const u8 TMP432_TEMP_MSB_READ[4][3] = { |
92 | { 0x00, 0x01, 0x23 }, /* temp */ | |
93 | { 0x06, 0x08, 0x16 }, /* low limit */ | |
94 | { 0x05, 0x07, 0x15 }, /* high limit */ | |
95 | { 0x20, 0x19, 0x1A }, /* therm (crit) limit */ | |
96 | }; | |
97 | ||
98 | static const u8 TMP432_TEMP_MSB_WRITE[4][3] = { | |
99 | { 0, 0, 0 }, /* temp - unused */ | |
100 | { 0x0C, 0x0E, 0x16 }, /* low limit */ | |
101 | { 0x0B, 0x0D, 0x15 }, /* high limit */ | |
102 | { 0x20, 0x19, 0x1A }, /* therm (crit) limit */ | |
103 | }; | |
104 | ||
105 | static const u8 TMP432_TEMP_LSB[3][3] = { | |
106 | { 0x29, 0x10, 0x24 }, /* temp */ | |
107 | { 0x3E, 0x14, 0x18 }, /* low limit */ | |
108 | { 0x3D, 0x13, 0x17 }, /* high limit */ | |
109 | }; | |
110 | ||
111 | /* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */ | |
112 | static const u8 TMP432_STATUS_REG[] = { | |
113 | 0x1b, 0x36, 0x35, 0x37 }; | |
114 | ||
ab2b79d5 | 115 | /* Flags */ |
947e9271 GR |
116 | #define TMP401_CONFIG_RANGE BIT(2) |
117 | #define TMP401_CONFIG_SHUTDOWN BIT(6) | |
118 | #define TMP401_STATUS_LOCAL_CRIT BIT(0) | |
119 | #define TMP401_STATUS_REMOTE_CRIT BIT(1) | |
120 | #define TMP401_STATUS_REMOTE_OPEN BIT(2) | |
121 | #define TMP401_STATUS_REMOTE_LOW BIT(3) | |
122 | #define TMP401_STATUS_REMOTE_HIGH BIT(4) | |
123 | #define TMP401_STATUS_LOCAL_LOW BIT(5) | |
124 | #define TMP401_STATUS_LOCAL_HIGH BIT(6) | |
ab2b79d5 | 125 | |
29dd3b64 GR |
126 | /* On TMP432, each status has its own register */ |
127 | #define TMP432_STATUS_LOCAL BIT(0) | |
128 | #define TMP432_STATUS_REMOTE1 BIT(1) | |
129 | #define TMP432_STATUS_REMOTE2 BIT(2) | |
130 | ||
ab2b79d5 HG |
131 | /* Manufacturer / Device ID's */ |
132 | #define TMP401_MANUFACTURER_ID 0x55 | |
133 | #define TMP401_DEVICE_ID 0x11 | |
4ce5b1fe GR |
134 | #define TMP411A_DEVICE_ID 0x12 |
135 | #define TMP411B_DEVICE_ID 0x13 | |
136 | #define TMP411C_DEVICE_ID 0x10 | |
a1fac92b | 137 | #define TMP431_DEVICE_ID 0x31 |
29dd3b64 | 138 | #define TMP432_DEVICE_ID 0x32 |
ab2b79d5 | 139 | |
ab2b79d5 HG |
140 | /* |
141 | * Driver data (common to all clients) | |
142 | */ | |
143 | ||
144 | static const struct i2c_device_id tmp401_id[] = { | |
145 | { "tmp401", tmp401 }, | |
fce0758f | 146 | { "tmp411", tmp411 }, |
a1fac92b | 147 | { "tmp431", tmp431 }, |
29dd3b64 | 148 | { "tmp432", tmp432 }, |
ab2b79d5 HG |
149 | { } |
150 | }; | |
151 | MODULE_DEVICE_TABLE(i2c, tmp401_id); | |
152 | ||
ab2b79d5 HG |
153 | /* |
154 | * Client data (each client gets its own) | |
155 | */ | |
156 | ||
157 | struct tmp401_data { | |
f3643ac7 GR |
158 | struct i2c_client *client; |
159 | const struct attribute_group *groups[3]; | |
ab2b79d5 HG |
160 | struct mutex update_lock; |
161 | char valid; /* zero until following fields are valid */ | |
162 | unsigned long last_updated; /* in jiffies */ | |
dc71afe5 | 163 | enum chips kind; |
ab2b79d5 | 164 | |
0846e30d GR |
165 | unsigned int update_interval; /* in milliseconds */ |
166 | ||
ab2b79d5 | 167 | /* register values */ |
29dd3b64 | 168 | u8 status[4]; |
ab2b79d5 | 169 | u8 config; |
29dd3b64 | 170 | u16 temp[6][3]; |
ab2b79d5 HG |
171 | u8 temp_crit_hyst; |
172 | }; | |
173 | ||
174 | /* | |
175 | * Sysfs attr show / store functions | |
176 | */ | |
177 | ||
178 | static int tmp401_register_to_temp(u16 reg, u8 config) | |
179 | { | |
180 | int temp = reg; | |
181 | ||
182 | if (config & TMP401_CONFIG_RANGE) | |
183 | temp -= 64 * 256; | |
184 | ||
14f2a665 | 185 | return DIV_ROUND_CLOSEST(temp * 125, 32); |
ab2b79d5 HG |
186 | } |
187 | ||
14f2a665 | 188 | static u16 tmp401_temp_to_register(long temp, u8 config, int zbits) |
ab2b79d5 HG |
189 | { |
190 | if (config & TMP401_CONFIG_RANGE) { | |
2a844c14 | 191 | temp = clamp_val(temp, -64000, 191000); |
ab2b79d5 HG |
192 | temp += 64000; |
193 | } else | |
2a844c14 | 194 | temp = clamp_val(temp, 0, 127000); |
ab2b79d5 | 195 | |
14f2a665 | 196 | return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits; |
ab2b79d5 HG |
197 | } |
198 | ||
14f2a665 GR |
199 | static int tmp401_update_device_reg16(struct i2c_client *client, |
200 | struct tmp401_data *data) | |
ea63c2b9 | 201 | { |
14f2a665 GR |
202 | int i, j, val; |
203 | int num_regs = data->kind == tmp411 ? 6 : 4; | |
29dd3b64 | 204 | int num_sensors = data->kind == tmp432 ? 3 : 2; |
14f2a665 | 205 | |
29dd3b64 | 206 | for (i = 0; i < num_sensors; i++) { /* local / r1 / r2 */ |
14f2a665 | 207 | for (j = 0; j < num_regs; j++) { /* temp / low / ... */ |
29dd3b64 | 208 | u8 regaddr; |
14f2a665 GR |
209 | /* |
210 | * High byte must be read first immediately followed | |
211 | * by the low byte | |
212 | */ | |
29dd3b64 GR |
213 | regaddr = data->kind == tmp432 ? |
214 | TMP432_TEMP_MSB_READ[j][i] : | |
215 | TMP401_TEMP_MSB_READ[j][i]; | |
216 | val = i2c_smbus_read_byte_data(client, regaddr); | |
14f2a665 GR |
217 | if (val < 0) |
218 | return val; | |
219 | data->temp[j][i] = val << 8; | |
220 | if (j == 3) /* crit is msb only */ | |
221 | continue; | |
29dd3b64 GR |
222 | regaddr = data->kind == tmp432 ? TMP432_TEMP_LSB[j][i] |
223 | : TMP401_TEMP_LSB[j][i]; | |
224 | val = i2c_smbus_read_byte_data(client, regaddr); | |
14f2a665 GR |
225 | if (val < 0) |
226 | return val; | |
227 | data->temp[j][i] |= val; | |
ea63c2b9 AP |
228 | } |
229 | } | |
14f2a665 | 230 | return 0; |
ea63c2b9 AP |
231 | } |
232 | ||
233 | static struct tmp401_data *tmp401_update_device(struct device *dev) | |
234 | { | |
f3643ac7 GR |
235 | struct tmp401_data *data = dev_get_drvdata(dev); |
236 | struct i2c_client *client = data->client; | |
14f2a665 | 237 | struct tmp401_data *ret = data; |
29dd3b64 | 238 | int i, val; |
0846e30d | 239 | unsigned long next_update; |
ea63c2b9 AP |
240 | |
241 | mutex_lock(&data->update_lock); | |
242 | ||
0846e30d | 243 | next_update = data->last_updated + |
4e2284d2 | 244 | msecs_to_jiffies(data->update_interval); |
0846e30d | 245 | if (time_after(jiffies, next_update) || !data->valid) { |
29dd3b64 GR |
246 | if (data->kind != tmp432) { |
247 | /* | |
248 | * The driver uses the TMP432 status format internally. | |
249 | * Convert status to TMP432 format for other chips. | |
250 | */ | |
251 | val = i2c_smbus_read_byte_data(client, TMP401_STATUS); | |
252 | if (val < 0) { | |
253 | ret = ERR_PTR(val); | |
254 | goto abort; | |
255 | } | |
256 | data->status[0] = | |
257 | (val & TMP401_STATUS_REMOTE_OPEN) >> 1; | |
258 | data->status[1] = | |
259 | ((val & TMP401_STATUS_REMOTE_LOW) >> 2) | | |
260 | ((val & TMP401_STATUS_LOCAL_LOW) >> 5); | |
261 | data->status[2] = | |
262 | ((val & TMP401_STATUS_REMOTE_HIGH) >> 3) | | |
263 | ((val & TMP401_STATUS_LOCAL_HIGH) >> 6); | |
264 | data->status[3] = val & (TMP401_STATUS_LOCAL_CRIT | |
265 | | TMP401_STATUS_REMOTE_CRIT); | |
266 | } else { | |
267 | for (i = 0; i < ARRAY_SIZE(data->status); i++) { | |
268 | val = i2c_smbus_read_byte_data(client, | |
269 | TMP432_STATUS_REG[i]); | |
270 | if (val < 0) { | |
271 | ret = ERR_PTR(val); | |
272 | goto abort; | |
273 | } | |
274 | data->status[i] = val; | |
275 | } | |
14f2a665 | 276 | } |
29dd3b64 | 277 | |
14f2a665 GR |
278 | val = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ); |
279 | if (val < 0) { | |
280 | ret = ERR_PTR(val); | |
281 | goto abort; | |
282 | } | |
283 | data->config = val; | |
284 | val = tmp401_update_device_reg16(client, data); | |
285 | if (val < 0) { | |
286 | ret = ERR_PTR(val); | |
287 | goto abort; | |
288 | } | |
289 | val = i2c_smbus_read_byte_data(client, TMP401_TEMP_CRIT_HYST); | |
290 | if (val < 0) { | |
291 | ret = ERR_PTR(val); | |
292 | goto abort; | |
293 | } | |
294 | data->temp_crit_hyst = val; | |
ea63c2b9 AP |
295 | |
296 | data->last_updated = jiffies; | |
297 | data->valid = 1; | |
298 | } | |
299 | ||
14f2a665 | 300 | abort: |
ea63c2b9 | 301 | mutex_unlock(&data->update_lock); |
14f2a665 | 302 | return ret; |
ab2b79d5 HG |
303 | } |
304 | ||
14f2a665 GR |
305 | static ssize_t show_temp(struct device *dev, |
306 | struct device_attribute *devattr, char *buf) | |
ab2b79d5 | 307 | { |
14f2a665 GR |
308 | int nr = to_sensor_dev_attr_2(devattr)->nr; |
309 | int index = to_sensor_dev_attr_2(devattr)->index; | |
ab2b79d5 HG |
310 | struct tmp401_data *data = tmp401_update_device(dev); |
311 | ||
14f2a665 GR |
312 | if (IS_ERR(data)) |
313 | return PTR_ERR(data); | |
ab2b79d5 HG |
314 | |
315 | return sprintf(buf, "%d\n", | |
14f2a665 | 316 | tmp401_register_to_temp(data->temp[nr][index], data->config)); |
ab2b79d5 HG |
317 | } |
318 | ||
319 | static ssize_t show_temp_crit_hyst(struct device *dev, | |
320 | struct device_attribute *devattr, char *buf) | |
321 | { | |
322 | int temp, index = to_sensor_dev_attr(devattr)->index; | |
323 | struct tmp401_data *data = tmp401_update_device(dev); | |
324 | ||
14f2a665 GR |
325 | if (IS_ERR(data)) |
326 | return PTR_ERR(data); | |
327 | ||
ab2b79d5 | 328 | mutex_lock(&data->update_lock); |
14f2a665 | 329 | temp = tmp401_register_to_temp(data->temp[3][index], data->config); |
ab2b79d5 HG |
330 | temp -= data->temp_crit_hyst * 1000; |
331 | mutex_unlock(&data->update_lock); | |
332 | ||
333 | return sprintf(buf, "%d\n", temp); | |
334 | } | |
335 | ||
336 | static ssize_t show_status(struct device *dev, | |
337 | struct device_attribute *devattr, char *buf) | |
338 | { | |
29dd3b64 GR |
339 | int nr = to_sensor_dev_attr_2(devattr)->nr; |
340 | int mask = to_sensor_dev_attr_2(devattr)->index; | |
ab2b79d5 HG |
341 | struct tmp401_data *data = tmp401_update_device(dev); |
342 | ||
14f2a665 GR |
343 | if (IS_ERR(data)) |
344 | return PTR_ERR(data); | |
ab2b79d5 | 345 | |
29dd3b64 | 346 | return sprintf(buf, "%d\n", !!(data->status[nr] & mask)); |
ab2b79d5 HG |
347 | } |
348 | ||
14f2a665 GR |
349 | static ssize_t store_temp(struct device *dev, struct device_attribute *devattr, |
350 | const char *buf, size_t count) | |
ab2b79d5 | 351 | { |
14f2a665 GR |
352 | int nr = to_sensor_dev_attr_2(devattr)->nr; |
353 | int index = to_sensor_dev_attr_2(devattr)->index; | |
f3643ac7 GR |
354 | struct tmp401_data *data = dev_get_drvdata(dev); |
355 | struct i2c_client *client = data->client; | |
ab2b79d5 HG |
356 | long val; |
357 | u16 reg; | |
29dd3b64 | 358 | u8 regaddr; |
ab2b79d5 | 359 | |
179c4fdb | 360 | if (kstrtol(buf, 10, &val)) |
ab2b79d5 HG |
361 | return -EINVAL; |
362 | ||
14f2a665 | 363 | reg = tmp401_temp_to_register(val, data->config, nr == 3 ? 8 : 4); |
ab2b79d5 HG |
364 | |
365 | mutex_lock(&data->update_lock); | |
366 | ||
29dd3b64 GR |
367 | regaddr = data->kind == tmp432 ? TMP432_TEMP_MSB_WRITE[nr][index] |
368 | : TMP401_TEMP_MSB_WRITE[nr][index]; | |
369 | i2c_smbus_write_byte_data(client, regaddr, reg >> 8); | |
14f2a665 | 370 | if (nr != 3) { |
29dd3b64 GR |
371 | regaddr = data->kind == tmp432 ? TMP432_TEMP_LSB[nr][index] |
372 | : TMP401_TEMP_LSB[nr][index]; | |
373 | i2c_smbus_write_byte_data(client, regaddr, reg & 0xFF); | |
14f2a665 GR |
374 | } |
375 | data->temp[nr][index] = reg; | |
ab2b79d5 HG |
376 | |
377 | mutex_unlock(&data->update_lock); | |
378 | ||
379 | return count; | |
380 | } | |
381 | ||
382 | static ssize_t store_temp_crit_hyst(struct device *dev, struct device_attribute | |
383 | *devattr, const char *buf, size_t count) | |
384 | { | |
385 | int temp, index = to_sensor_dev_attr(devattr)->index; | |
386 | struct tmp401_data *data = tmp401_update_device(dev); | |
387 | long val; | |
388 | u8 reg; | |
389 | ||
14f2a665 GR |
390 | if (IS_ERR(data)) |
391 | return PTR_ERR(data); | |
392 | ||
179c4fdb | 393 | if (kstrtol(buf, 10, &val)) |
ab2b79d5 HG |
394 | return -EINVAL; |
395 | ||
396 | if (data->config & TMP401_CONFIG_RANGE) | |
2a844c14 | 397 | val = clamp_val(val, -64000, 191000); |
ab2b79d5 | 398 | else |
2a844c14 | 399 | val = clamp_val(val, 0, 127000); |
ab2b79d5 HG |
400 | |
401 | mutex_lock(&data->update_lock); | |
14f2a665 | 402 | temp = tmp401_register_to_temp(data->temp[3][index], data->config); |
2a844c14 | 403 | val = clamp_val(val, temp - 255000, temp); |
ab2b79d5 HG |
404 | reg = ((temp - val) + 500) / 1000; |
405 | ||
f3643ac7 | 406 | i2c_smbus_write_byte_data(data->client, TMP401_TEMP_CRIT_HYST, |
14f2a665 | 407 | reg); |
ab2b79d5 HG |
408 | |
409 | data->temp_crit_hyst = reg; | |
410 | ||
411 | mutex_unlock(&data->update_lock); | |
412 | ||
413 | return count; | |
414 | } | |
415 | ||
fce0758f AP |
416 | /* |
417 | * Resets the historical measurements of minimum and maximum temperatures. | |
418 | * This is done by writing any value to any of the minimum/maximum registers | |
419 | * (0x30-0x37). | |
420 | */ | |
421 | static ssize_t reset_temp_history(struct device *dev, | |
422 | struct device_attribute *devattr, const char *buf, size_t count) | |
423 | { | |
f3643ac7 GR |
424 | struct tmp401_data *data = dev_get_drvdata(dev); |
425 | struct i2c_client *client = data->client; | |
fce0758f AP |
426 | long val; |
427 | ||
179c4fdb | 428 | if (kstrtol(buf, 10, &val)) |
fce0758f AP |
429 | return -EINVAL; |
430 | ||
431 | if (val != 1) { | |
b55f3757 GR |
432 | dev_err(dev, |
433 | "temp_reset_history value %ld not supported. Use 1 to reset the history!\n", | |
434 | val); | |
fce0758f AP |
435 | return -EINVAL; |
436 | } | |
8eb6d90f GR |
437 | mutex_lock(&data->update_lock); |
438 | i2c_smbus_write_byte_data(client, TMP401_TEMP_MSB_WRITE[5][0], val); | |
439 | data->valid = 0; | |
440 | mutex_unlock(&data->update_lock); | |
fce0758f AP |
441 | |
442 | return count; | |
443 | } | |
444 | ||
0846e30d GR |
445 | static ssize_t show_update_interval(struct device *dev, |
446 | struct device_attribute *attr, char *buf) | |
447 | { | |
f3643ac7 | 448 | struct tmp401_data *data = dev_get_drvdata(dev); |
0846e30d GR |
449 | |
450 | return sprintf(buf, "%u\n", data->update_interval); | |
451 | } | |
452 | ||
453 | static ssize_t set_update_interval(struct device *dev, | |
454 | struct device_attribute *attr, | |
455 | const char *buf, size_t count) | |
456 | { | |
f3643ac7 GR |
457 | struct tmp401_data *data = dev_get_drvdata(dev); |
458 | struct i2c_client *client = data->client; | |
0846e30d GR |
459 | unsigned long val; |
460 | int err, rate; | |
461 | ||
462 | err = kstrtoul(buf, 10, &val); | |
463 | if (err) | |
464 | return err; | |
465 | ||
466 | /* | |
467 | * For valid rates, interval can be calculated as | |
468 | * interval = (1 << (7 - rate)) * 125; | |
469 | * Rounded rate is therefore | |
470 | * rate = 7 - __fls(interval * 4 / (125 * 3)); | |
471 | * Use clamp_val() to avoid overflows, and to ensure valid input | |
472 | * for __fls. | |
473 | */ | |
474 | val = clamp_val(val, 125, 16000); | |
475 | rate = 7 - __fls(val * 4 / (125 * 3)); | |
476 | mutex_lock(&data->update_lock); | |
477 | i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, rate); | |
478 | data->update_interval = (1 << (7 - rate)) * 125; | |
479 | mutex_unlock(&data->update_lock); | |
480 | ||
481 | return count; | |
482 | } | |
483 | ||
14f2a665 GR |
484 | static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0); |
485 | static SENSOR_DEVICE_ATTR_2(temp1_min, S_IWUSR | S_IRUGO, show_temp, | |
486 | store_temp, 1, 0); | |
487 | static SENSOR_DEVICE_ATTR_2(temp1_max, S_IWUSR | S_IRUGO, show_temp, | |
488 | store_temp, 2, 0); | |
489 | static SENSOR_DEVICE_ATTR_2(temp1_crit, S_IWUSR | S_IRUGO, show_temp, | |
490 | store_temp, 3, 0); | |
b4e665c7 GR |
491 | static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IWUSR | S_IRUGO, |
492 | show_temp_crit_hyst, store_temp_crit_hyst, 0); | |
29dd3b64 GR |
493 | static SENSOR_DEVICE_ATTR_2(temp1_min_alarm, S_IRUGO, show_status, NULL, |
494 | 1, TMP432_STATUS_LOCAL); | |
495 | static SENSOR_DEVICE_ATTR_2(temp1_max_alarm, S_IRUGO, show_status, NULL, | |
496 | 2, TMP432_STATUS_LOCAL); | |
497 | static SENSOR_DEVICE_ATTR_2(temp1_crit_alarm, S_IRUGO, show_status, NULL, | |
498 | 3, TMP432_STATUS_LOCAL); | |
14f2a665 GR |
499 | static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1); |
500 | static SENSOR_DEVICE_ATTR_2(temp2_min, S_IWUSR | S_IRUGO, show_temp, | |
501 | store_temp, 1, 1); | |
502 | static SENSOR_DEVICE_ATTR_2(temp2_max, S_IWUSR | S_IRUGO, show_temp, | |
503 | store_temp, 2, 1); | |
504 | static SENSOR_DEVICE_ATTR_2(temp2_crit, S_IWUSR | S_IRUGO, show_temp, | |
505 | store_temp, 3, 1); | |
b4e665c7 GR |
506 | static SENSOR_DEVICE_ATTR(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, |
507 | NULL, 1); | |
29dd3b64 GR |
508 | static SENSOR_DEVICE_ATTR_2(temp2_fault, S_IRUGO, show_status, NULL, |
509 | 0, TMP432_STATUS_REMOTE1); | |
510 | static SENSOR_DEVICE_ATTR_2(temp2_min_alarm, S_IRUGO, show_status, NULL, | |
511 | 1, TMP432_STATUS_REMOTE1); | |
512 | static SENSOR_DEVICE_ATTR_2(temp2_max_alarm, S_IRUGO, show_status, NULL, | |
513 | 2, TMP432_STATUS_REMOTE1); | |
514 | static SENSOR_DEVICE_ATTR_2(temp2_crit_alarm, S_IRUGO, show_status, NULL, | |
515 | 3, TMP432_STATUS_REMOTE1); | |
b4e665c7 | 516 | |
0846e30d GR |
517 | static DEVICE_ATTR(update_interval, S_IRUGO | S_IWUSR, show_update_interval, |
518 | set_update_interval); | |
519 | ||
b4e665c7 GR |
520 | static struct attribute *tmp401_attributes[] = { |
521 | &sensor_dev_attr_temp1_input.dev_attr.attr, | |
522 | &sensor_dev_attr_temp1_min.dev_attr.attr, | |
523 | &sensor_dev_attr_temp1_max.dev_attr.attr, | |
524 | &sensor_dev_attr_temp1_crit.dev_attr.attr, | |
525 | &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr, | |
526 | &sensor_dev_attr_temp1_max_alarm.dev_attr.attr, | |
527 | &sensor_dev_attr_temp1_min_alarm.dev_attr.attr, | |
528 | &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr, | |
529 | ||
530 | &sensor_dev_attr_temp2_input.dev_attr.attr, | |
531 | &sensor_dev_attr_temp2_min.dev_attr.attr, | |
532 | &sensor_dev_attr_temp2_max.dev_attr.attr, | |
533 | &sensor_dev_attr_temp2_crit.dev_attr.attr, | |
534 | &sensor_dev_attr_temp2_crit_hyst.dev_attr.attr, | |
535 | &sensor_dev_attr_temp2_fault.dev_attr.attr, | |
536 | &sensor_dev_attr_temp2_max_alarm.dev_attr.attr, | |
537 | &sensor_dev_attr_temp2_min_alarm.dev_attr.attr, | |
538 | &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr, | |
539 | ||
0846e30d GR |
540 | &dev_attr_update_interval.attr, |
541 | ||
b4e665c7 GR |
542 | NULL |
543 | }; | |
544 | ||
545 | static const struct attribute_group tmp401_group = { | |
546 | .attrs = tmp401_attributes, | |
ab2b79d5 HG |
547 | }; |
548 | ||
fce0758f AP |
549 | /* |
550 | * Additional features of the TMP411 chip. | |
551 | * The TMP411 stores the minimum and maximum | |
552 | * temperature measured since power-on, chip-reset, or | |
553 | * minimum and maximum register reset for both the local | |
554 | * and remote channels. | |
555 | */ | |
14f2a665 GR |
556 | static SENSOR_DEVICE_ATTR_2(temp1_lowest, S_IRUGO, show_temp, NULL, 4, 0); |
557 | static SENSOR_DEVICE_ATTR_2(temp1_highest, S_IRUGO, show_temp, NULL, 5, 0); | |
558 | static SENSOR_DEVICE_ATTR_2(temp2_lowest, S_IRUGO, show_temp, NULL, 4, 1); | |
559 | static SENSOR_DEVICE_ATTR_2(temp2_highest, S_IRUGO, show_temp, NULL, 5, 1); | |
b4e665c7 GR |
560 | static SENSOR_DEVICE_ATTR(temp_reset_history, S_IWUSR, NULL, reset_temp_history, |
561 | 0); | |
562 | ||
563 | static struct attribute *tmp411_attributes[] = { | |
564 | &sensor_dev_attr_temp1_highest.dev_attr.attr, | |
565 | &sensor_dev_attr_temp1_lowest.dev_attr.attr, | |
566 | &sensor_dev_attr_temp2_highest.dev_attr.attr, | |
567 | &sensor_dev_attr_temp2_lowest.dev_attr.attr, | |
568 | &sensor_dev_attr_temp_reset_history.dev_attr.attr, | |
569 | NULL | |
570 | }; | |
571 | ||
572 | static const struct attribute_group tmp411_group = { | |
573 | .attrs = tmp411_attributes, | |
fce0758f AP |
574 | }; |
575 | ||
29dd3b64 GR |
576 | static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2); |
577 | static SENSOR_DEVICE_ATTR_2(temp3_min, S_IWUSR | S_IRUGO, show_temp, | |
578 | store_temp, 1, 2); | |
579 | static SENSOR_DEVICE_ATTR_2(temp3_max, S_IWUSR | S_IRUGO, show_temp, | |
580 | store_temp, 2, 2); | |
581 | static SENSOR_DEVICE_ATTR_2(temp3_crit, S_IWUSR | S_IRUGO, show_temp, | |
582 | store_temp, 3, 2); | |
583 | static SENSOR_DEVICE_ATTR(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, | |
584 | NULL, 2); | |
585 | static SENSOR_DEVICE_ATTR_2(temp3_fault, S_IRUGO, show_status, NULL, | |
586 | 0, TMP432_STATUS_REMOTE2); | |
587 | static SENSOR_DEVICE_ATTR_2(temp3_min_alarm, S_IRUGO, show_status, NULL, | |
588 | 1, TMP432_STATUS_REMOTE2); | |
589 | static SENSOR_DEVICE_ATTR_2(temp3_max_alarm, S_IRUGO, show_status, NULL, | |
590 | 2, TMP432_STATUS_REMOTE2); | |
591 | static SENSOR_DEVICE_ATTR_2(temp3_crit_alarm, S_IRUGO, show_status, NULL, | |
592 | 3, TMP432_STATUS_REMOTE2); | |
593 | ||
594 | static struct attribute *tmp432_attributes[] = { | |
595 | &sensor_dev_attr_temp3_input.dev_attr.attr, | |
596 | &sensor_dev_attr_temp3_min.dev_attr.attr, | |
597 | &sensor_dev_attr_temp3_max.dev_attr.attr, | |
598 | &sensor_dev_attr_temp3_crit.dev_attr.attr, | |
599 | &sensor_dev_attr_temp3_crit_hyst.dev_attr.attr, | |
600 | &sensor_dev_attr_temp3_fault.dev_attr.attr, | |
601 | &sensor_dev_attr_temp3_max_alarm.dev_attr.attr, | |
602 | &sensor_dev_attr_temp3_min_alarm.dev_attr.attr, | |
603 | &sensor_dev_attr_temp3_crit_alarm.dev_attr.attr, | |
604 | ||
605 | NULL | |
606 | }; | |
607 | ||
608 | static const struct attribute_group tmp432_group = { | |
609 | .attrs = tmp432_attributes, | |
610 | }; | |
611 | ||
ab2b79d5 HG |
612 | /* |
613 | * Begin non sysfs callback code (aka Real code) | |
614 | */ | |
615 | ||
f3643ac7 GR |
616 | static void tmp401_init_client(struct tmp401_data *data, |
617 | struct i2c_client *client) | |
ab2b79d5 HG |
618 | { |
619 | int config, config_orig; | |
620 | ||
621 | /* Set the conversion rate to 2 Hz */ | |
622 | i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, 5); | |
0846e30d | 623 | data->update_interval = 500; |
ab2b79d5 HG |
624 | |
625 | /* Start conversions (disable shutdown if necessary) */ | |
626 | config = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ); | |
627 | if (config < 0) { | |
628 | dev_warn(&client->dev, "Initialization failed!\n"); | |
629 | return; | |
630 | } | |
631 | ||
632 | config_orig = config; | |
633 | config &= ~TMP401_CONFIG_SHUTDOWN; | |
634 | ||
635 | if (config != config_orig) | |
636 | i2c_smbus_write_byte_data(client, TMP401_CONFIG_WRITE, config); | |
637 | } | |
638 | ||
310ec792 | 639 | static int tmp401_detect(struct i2c_client *client, |
ab2b79d5 HG |
640 | struct i2c_board_info *info) |
641 | { | |
dbe73c8f | 642 | enum chips kind; |
ab2b79d5 | 643 | struct i2c_adapter *adapter = client->adapter; |
dbe73c8f | 644 | u8 reg; |
ab2b79d5 HG |
645 | |
646 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | |
647 | return -ENODEV; | |
648 | ||
649 | /* Detect and identify the chip */ | |
dbe73c8f JD |
650 | reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG); |
651 | if (reg != TMP401_MANUFACTURER_ID) | |
652 | return -ENODEV; | |
ab2b79d5 | 653 | |
dbe73c8f | 654 | reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG); |
ab2b79d5 | 655 | |
dbe73c8f JD |
656 | switch (reg) { |
657 | case TMP401_DEVICE_ID: | |
a1fac92b GR |
658 | if (client->addr != 0x4c) |
659 | return -ENODEV; | |
dbe73c8f JD |
660 | kind = tmp401; |
661 | break; | |
4ce5b1fe GR |
662 | case TMP411A_DEVICE_ID: |
663 | if (client->addr != 0x4c) | |
664 | return -ENODEV; | |
665 | kind = tmp411; | |
666 | break; | |
667 | case TMP411B_DEVICE_ID: | |
668 | if (client->addr != 0x4d) | |
669 | return -ENODEV; | |
670 | kind = tmp411; | |
671 | break; | |
672 | case TMP411C_DEVICE_ID: | |
673 | if (client->addr != 0x4e) | |
674 | return -ENODEV; | |
dbe73c8f JD |
675 | kind = tmp411; |
676 | break; | |
a1fac92b GR |
677 | case TMP431_DEVICE_ID: |
678 | if (client->addr == 0x4e) | |
679 | return -ENODEV; | |
680 | kind = tmp431; | |
681 | break; | |
29dd3b64 GR |
682 | case TMP432_DEVICE_ID: |
683 | if (client->addr == 0x4e) | |
684 | return -ENODEV; | |
685 | kind = tmp432; | |
686 | break; | |
dbe73c8f JD |
687 | default: |
688 | return -ENODEV; | |
ab2b79d5 | 689 | } |
dbe73c8f JD |
690 | |
691 | reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ); | |
692 | if (reg & 0x1b) | |
693 | return -ENODEV; | |
694 | ||
695 | reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE_READ); | |
696 | /* Datasheet says: 0x1-0x6 */ | |
697 | if (reg > 15) | |
698 | return -ENODEV; | |
699 | ||
dc71afe5 | 700 | strlcpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE); |
ab2b79d5 HG |
701 | |
702 | return 0; | |
703 | } | |
704 | ||
705 | static int tmp401_probe(struct i2c_client *client, | |
706 | const struct i2c_device_id *id) | |
707 | { | |
f3643ac7 | 708 | const char *names[] = { "TMP401", "TMP411", "TMP431", "TMP432" }; |
b4e665c7 | 709 | struct device *dev = &client->dev; |
f3643ac7 | 710 | struct device *hwmon_dev; |
ab2b79d5 | 711 | struct tmp401_data *data; |
f3643ac7 | 712 | int groups = 0; |
ab2b79d5 | 713 | |
b4e665c7 | 714 | data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL); |
ab2b79d5 HG |
715 | if (!data) |
716 | return -ENOMEM; | |
717 | ||
f3643ac7 | 718 | data->client = client; |
ab2b79d5 | 719 | mutex_init(&data->update_lock); |
fce0758f | 720 | data->kind = id->driver_data; |
ab2b79d5 HG |
721 | |
722 | /* Initialize the TMP401 chip */ | |
f3643ac7 | 723 | tmp401_init_client(data, client); |
ab2b79d5 HG |
724 | |
725 | /* Register sysfs hooks */ | |
f3643ac7 | 726 | data->groups[groups++] = &tmp401_group; |
ab2b79d5 | 727 | |
a80581d0 | 728 | /* Register additional tmp411 sysfs hooks */ |
f3643ac7 GR |
729 | if (data->kind == tmp411) |
730 | data->groups[groups++] = &tmp411_group; | |
fce0758f | 731 | |
29dd3b64 | 732 | /* Register additional tmp432 sysfs hooks */ |
f3643ac7 GR |
733 | if (data->kind == tmp432) |
734 | data->groups[groups++] = &tmp432_group; | |
29dd3b64 | 735 | |
f3643ac7 GR |
736 | hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name, |
737 | data, data->groups); | |
738 | if (IS_ERR(hwmon_dev)) | |
739 | return PTR_ERR(hwmon_dev); | |
ab2b79d5 | 740 | |
b4e665c7 | 741 | dev_info(dev, "Detected TI %s chip\n", names[data->kind]); |
ab2b79d5 HG |
742 | |
743 | return 0; | |
ab2b79d5 HG |
744 | } |
745 | ||
ea63c2b9 AP |
746 | static struct i2c_driver tmp401_driver = { |
747 | .class = I2C_CLASS_HWMON, | |
748 | .driver = { | |
749 | .name = "tmp401", | |
750 | }, | |
751 | .probe = tmp401_probe, | |
ea63c2b9 AP |
752 | .id_table = tmp401_id, |
753 | .detect = tmp401_detect, | |
754 | .address_list = normal_i2c, | |
755 | }; | |
ab2b79d5 | 756 | |
f0967eea | 757 | module_i2c_driver(tmp401_driver); |
ab2b79d5 HG |
758 | |
759 | MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); | |
760 | MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver"); | |
761 | MODULE_LICENSE("GPL"); |