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Merge tag 'dma' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[linux-2.6-block.git] / drivers / hwmon / smm665.c
CommitLineData
920fa1ff
GR		 1/*
2 * Driver for SMM665 Power Controller / Monitor
3 *
4 * Copyright (C) 2010 Ericsson AB.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This driver should also work for SMM465, SMM764, and SMM766, but is untested
11 * for those chips. Only monitoring functionality is implemented.
12 *
13 * Datasheets:
14 * http://www.summitmicro.com/prod_select/summary/SMM665/SMM665B_2089_20.pdf
15 * http://www.summitmicro.com/prod_select/summary/SMM766B/SMM766B_2122.pdf
16 */
17
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/err.h>
22#include <linux/slab.h>
23#include <linux/i2c.h>
24#include <linux/hwmon.h>
25#include <linux/hwmon-sysfs.h>
26#include <linux/delay.h>
27
28/* Internal reference voltage (VREF, x 1000 */
29#define SMM665_VREF_ADC_X1000 1250
30
31/* module parameters */
32static int vref = SMM665_VREF_ADC_X1000;
33module_param(vref, int, 0);
34MODULE_PARM_DESC(vref, "Reference voltage in mV");
35
36enum chips { smm465, smm665, smm665c, smm764, smm766 };
37
38/*
39 * ADC channel addresses
40 */
41#define SMM665_MISC16_ADC_DATA_A 0x00
42#define SMM665_MISC16_ADC_DATA_B 0x01
43#define SMM665_MISC16_ADC_DATA_C 0x02
44#define SMM665_MISC16_ADC_DATA_D 0x03
45#define SMM665_MISC16_ADC_DATA_E 0x04
46#define SMM665_MISC16_ADC_DATA_F 0x05
47#define SMM665_MISC16_ADC_DATA_VDD 0x06
48#define SMM665_MISC16_ADC_DATA_12V 0x07
49#define SMM665_MISC16_ADC_DATA_INT_TEMP 0x08
50#define SMM665_MISC16_ADC_DATA_AIN1 0x09
51#define SMM665_MISC16_ADC_DATA_AIN2 0x0a
52
53/*
54 * Command registers
55 */
56#define SMM665_MISC8_CMD_STS 0x80
57#define SMM665_MISC8_STATUS1 0x81
58#define SMM665_MISC8_STATUSS2 0x82
59#define SMM665_MISC8_IO_POLARITY 0x83
60#define SMM665_MISC8_PUP_POLARITY 0x84
61#define SMM665_MISC8_ADOC_STATUS1 0x85
62#define SMM665_MISC8_ADOC_STATUS2 0x86
63#define SMM665_MISC8_WRITE_PROT 0x87
64#define SMM665_MISC8_STS_TRACK 0x88
65
66/*
67 * Configuration registers and register groups
68 */
69#define SMM665_ADOC_ENABLE 0x0d
70#define SMM665_LIMIT_BASE 0x80 /* First limit register */
71
72/*
73 * Limit register bit masks
74 */
75#define SMM665_TRIGGER_RST 0x8000
76#define SMM665_TRIGGER_HEALTHY 0x4000
77#define SMM665_TRIGGER_POWEROFF 0x2000
78#define SMM665_TRIGGER_SHUTDOWN 0x1000
79#define SMM665_ADC_MASK 0x03ff
80
81#define smm665_is_critical(lim) ((lim) & (SMM665_TRIGGER_RST \
82 | SMM665_TRIGGER_POWEROFF \
83 | SMM665_TRIGGER_SHUTDOWN))
84/*
85 * Fault register bit definitions
86 * Values are merged from status registers 1/2,
87 * with status register 1 providing the upper 8 bits.
88 */
89#define SMM665_FAULT_A 0x0001
90#define SMM665_FAULT_B 0x0002
91#define SMM665_FAULT_C 0x0004
92#define SMM665_FAULT_D 0x0008
93#define SMM665_FAULT_E 0x0010
94#define SMM665_FAULT_F 0x0020
95#define SMM665_FAULT_VDD 0x0040
96#define SMM665_FAULT_12V 0x0080
97#define SMM665_FAULT_TEMP 0x0100
98#define SMM665_FAULT_AIN1 0x0200
99#define SMM665_FAULT_AIN2 0x0400
100
101/*
102 * I2C Register addresses
103 *
104 * The configuration register needs to be the configured base register.
105 * The command/status register address is derived from it.
106 */
107#define SMM665_REGMASK 0x78
108#define SMM665_CMDREG_BASE 0x48
109#define SMM665_CONFREG_BASE 0x50
110
111/*
112 * Equations given by chip manufacturer to calculate voltage/temperature values
113 * vref = Reference voltage on VREF_ADC pin (module parameter)
114 * adc = 10bit ADC value read back from registers
115 */
116
117/* Voltage A-F and VDD */
118#define SMM665_VMON_ADC_TO_VOLTS(adc) ((adc) * vref / 256)
119
120/* Voltage 12VIN */
121#define SMM665_12VIN_ADC_TO_VOLTS(adc) ((adc) * vref * 3 / 256)
122
123/* Voltage AIN1, AIN2 */
124#define SMM665_AIN_ADC_TO_VOLTS(adc) ((adc) * vref / 512)
125
126/* Temp Sensor */
3c22e232 127#define SMM665_TEMP_ADC_TO_CELSIUS(adc) (((adc) <= 511) ? \
920fa1ff 128 ((int)(adc) * 1000 / 4) : \
3c22e232 129 (((int)(adc) - 0x400) * 1000 / 4))
920fa1ff
GR		 130
131#define SMM665_NUM_ADC 11
132
133/*
134 * Chip dependent ADC conversion time, in uS
135 */
136#define SMM665_ADC_WAIT_SMM665 70
137#define SMM665_ADC_WAIT_SMM766 185
138
139struct smm665_data {
140 enum chips type;
141 int conversion_time; /* ADC conversion time */
142 struct device *hwmon_dev;
143 struct mutex update_lock;
144 bool valid;
145 unsigned long last_updated; /* in jiffies */
146 u16 adc[SMM665_NUM_ADC]; /* adc values (raw) */
147 u16 faults; /* fault status */
148 /* The following values are in mV */
149 int critical_min_limit[SMM665_NUM_ADC];
150 int alarm_min_limit[SMM665_NUM_ADC];
151 int critical_max_limit[SMM665_NUM_ADC];
152 int alarm_max_limit[SMM665_NUM_ADC];
153 struct i2c_client *cmdreg;
154};
155
156/*
157 * smm665_read16()
158 *
159 * Read 16 bit value from <reg>, <reg+1>. Upper 8 bits are in <reg>.
160 */
161static int smm665_read16(struct i2c_client *client, int reg)
162{
163 int rv, val;
164
165 rv = i2c_smbus_read_byte_data(client, reg);
166 if (rv < 0)
167 return rv;
168 val = rv << 8;
169 rv = i2c_smbus_read_byte_data(client, reg + 1);
170 if (rv < 0)
171 return rv;
172 val |= rv;
173 return val;
174}
175
176/*
177 * Read adc value.
178 */
179static int smm665_read_adc(struct smm665_data *data, int adc)
180{
181 struct i2c_client *client = data->cmdreg;
182 int rv;
183 int radc;
184
185 /*
186 * Algorithm for reading ADC, per SMM665 datasheet
187 *
188 * {[S][addr][W][Ack]} {[offset][Ack]} {[S][addr][R][Nack]}
189 * [wait conversion time]
190 * {[S][addr][R][Ack]} {[datahi][Ack]} {[datalo][Ack][P]}
191 *
192 * To implement the first part of this exchange,
193 * do a full read transaction and expect a failure/Nack.
194 * This sets up the address pointer on the SMM665
195 * and starts the ADC conversion.
196 * Then do a two-byte read transaction.
197 */
198 rv = i2c_smbus_read_byte_data(client, adc << 3);
199 if (rv != -ENXIO) {
200 /*
201 * We expect ENXIO to reflect NACK
202 * (per Documentation/i2c/fault-codes).
203 * Everything else is an error.
204 */
205 dev_dbg(&client->dev,
206 "Unexpected return code %d when setting ADC index", rv);
207 return (rv < 0) ? rv : -EIO;
208 }
209
210 udelay(data->conversion_time);
211
212 /*
213 * Now read two bytes.
214 *
215 * Neither i2c_smbus_read_byte() nor
216 * i2c_smbus_read_block_data() worked here,
90f4102c 217 * so use i2c_smbus_read_word_swapped() instead.
920fa1ff
GR		 218 * We could also try to use i2c_master_recv(),
219 * but that is not always supported.
220 */
90f4102c 221 rv = i2c_smbus_read_word_swapped(client, 0);
920fa1ff
GR		 222 if (rv < 0) {
223 dev_dbg(&client->dev, "Failed to read ADC value: error %d", rv);
224 return -1;
225 }
226 /*
227 * Validate/verify readback adc channel (in bit 11..14).
920fa1ff 228 */
90f4102c 229 radc = (rv >> 11) & 0x0f;
920fa1ff
GR		 230 if (radc != adc) {
231 dev_dbg(&client->dev, "Unexpected RADC: Expected %d got %d",
232 adc, radc);
233 return -EIO;
234 }
920fa1ff 235
90f4102c 236 return rv & SMM665_ADC_MASK;
920fa1ff
GR		 237}
238
239static struct smm665_data *smm665_update_device(struct device *dev)
240{
241 struct i2c_client *client = to_i2c_client(dev);
242 struct smm665_data *data = i2c_get_clientdata(client);
243 struct smm665_data *ret = data;
244
245 mutex_lock(&data->update_lock);
246
247 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
248 int i, val;
249
250 /*
251 * read status registers
252 */
253 val = smm665_read16(client, SMM665_MISC8_STATUS1);
254 if (unlikely(val < 0)) {
255 ret = ERR_PTR(val);
256 goto abort;
257 }
258 data->faults = val;
259
260 /* Read adc registers */
261 for (i = 0; i < SMM665_NUM_ADC; i++) {
262 val = smm665_read_adc(data, i);
263 if (unlikely(val < 0)) {
264 ret = ERR_PTR(val);
265 goto abort;
266 }
267 data->adc[i] = val;
268 }
269 data->last_updated = jiffies;
270 data->valid = 1;
271 }
272abort:
273 mutex_unlock(&data->update_lock);
274 return ret;
275}
276
277/* Return converted value from given adc */
278static int smm665_convert(u16 adcval, int index)
279{
280 int val = 0;
281
282 switch (index) {
283 case SMM665_MISC16_ADC_DATA_12V:
284 val = SMM665_12VIN_ADC_TO_VOLTS(adcval & SMM665_ADC_MASK);
285 break;
286
287 case SMM665_MISC16_ADC_DATA_VDD:
288 case SMM665_MISC16_ADC_DATA_A:
289 case SMM665_MISC16_ADC_DATA_B:
290 case SMM665_MISC16_ADC_DATA_C:
291 case SMM665_MISC16_ADC_DATA_D:
292 case SMM665_MISC16_ADC_DATA_E:
293 case SMM665_MISC16_ADC_DATA_F:
294 val = SMM665_VMON_ADC_TO_VOLTS(adcval & SMM665_ADC_MASK);
295 break;
296
297 case SMM665_MISC16_ADC_DATA_AIN1:
298 case SMM665_MISC16_ADC_DATA_AIN2:
299 val = SMM665_AIN_ADC_TO_VOLTS(adcval & SMM665_ADC_MASK);
300 break;
301
302 case SMM665_MISC16_ADC_DATA_INT_TEMP:
303 val = SMM665_TEMP_ADC_TO_CELSIUS(adcval & SMM665_ADC_MASK);
304 break;
305
306 default:
307 /* If we get here, the developer messed up */
308 WARN_ON_ONCE(1);
309 break;
310 }
311
312 return val;
313}
314
315static int smm665_get_min(struct device *dev, int index)
316{
317 struct i2c_client *client = to_i2c_client(dev);
318 struct smm665_data *data = i2c_get_clientdata(client);
319
320 return data->alarm_min_limit[index];
321}
322
323static int smm665_get_max(struct device *dev, int index)
324{
325 struct i2c_client *client = to_i2c_client(dev);
326 struct smm665_data *data = i2c_get_clientdata(client);
327
328 return data->alarm_max_limit[index];
329}
330
331static int smm665_get_lcrit(struct device *dev, int index)
332{
333 struct i2c_client *client = to_i2c_client(dev);
334 struct smm665_data *data = i2c_get_clientdata(client);
335
336 return data->critical_min_limit[index];
337}
338
339static int smm665_get_crit(struct device *dev, int index)
340{
341 struct i2c_client *client = to_i2c_client(dev);
342 struct smm665_data *data = i2c_get_clientdata(client);
343
344 return data->critical_max_limit[index];
345}
346
347static ssize_t smm665_show_crit_alarm(struct device *dev,
348 struct device_attribute *da, char *buf)
349{
350 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
351 struct smm665_data *data = smm665_update_device(dev);
352 int val = 0;
353
354 if (IS_ERR(data))
355 return PTR_ERR(data);
356
357 if (data->faults & (1 << attr->index))
358 val = 1;
359
360 return snprintf(buf, PAGE_SIZE, "%d\n", val);
361}
362
363static ssize_t smm665_show_input(struct device *dev,
364 struct device_attribute *da, char *buf)
365{
366 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
367 struct smm665_data *data = smm665_update_device(dev);
368 int adc = attr->index;
369 int val;
370
371 if (IS_ERR(data))
372 return PTR_ERR(data);
373
374 val = smm665_convert(data->adc[adc], adc);
375 return snprintf(buf, PAGE_SIZE, "%d\n", val);
376}
377
378#define SMM665_SHOW(what) \
b2ae8f87 379static ssize_t smm665_show_##what(struct device *dev, \
920fa1ff
GR		 380 struct device_attribute *da, char *buf) \
381{ \
382 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
383 const int val = smm665_get_##what(dev, attr->index); \
384 return snprintf(buf, PAGE_SIZE, "%d\n", val); \
385}
386
387SMM665_SHOW(min);
388SMM665_SHOW(max);
389SMM665_SHOW(lcrit);
390SMM665_SHOW(crit);
391
3c22e232
GR		 392/*
393 * These macros are used below in constructing device attribute objects
920fa1ff
GR		 394 * for use with sysfs_create_group() to make a sysfs device file
395 * for each register.
396 */
397
398#define SMM665_ATTR(name, type, cmd_idx) \
399 static SENSOR_DEVICE_ATTR(name##_##type, S_IRUGO, \
400 smm665_show_##type, NULL, cmd_idx)
401
402/* Construct a sensor_device_attribute structure for each register */
403
404/* Input voltages */
405SMM665_ATTR(in1, input, SMM665_MISC16_ADC_DATA_12V);
406SMM665_ATTR(in2, input, SMM665_MISC16_ADC_DATA_VDD);
407SMM665_ATTR(in3, input, SMM665_MISC16_ADC_DATA_A);
408SMM665_ATTR(in4, input, SMM665_MISC16_ADC_DATA_B);
409SMM665_ATTR(in5, input, SMM665_MISC16_ADC_DATA_C);
410SMM665_ATTR(in6, input, SMM665_MISC16_ADC_DATA_D);
411SMM665_ATTR(in7, input, SMM665_MISC16_ADC_DATA_E);
412SMM665_ATTR(in8, input, SMM665_MISC16_ADC_DATA_F);
413SMM665_ATTR(in9, input, SMM665_MISC16_ADC_DATA_AIN1);
414SMM665_ATTR(in10, input, SMM665_MISC16_ADC_DATA_AIN2);
415
416/* Input voltages min */
417SMM665_ATTR(in1, min, SMM665_MISC16_ADC_DATA_12V);
418SMM665_ATTR(in2, min, SMM665_MISC16_ADC_DATA_VDD);
419SMM665_ATTR(in3, min, SMM665_MISC16_ADC_DATA_A);
420SMM665_ATTR(in4, min, SMM665_MISC16_ADC_DATA_B);
421SMM665_ATTR(in5, min, SMM665_MISC16_ADC_DATA_C);
422SMM665_ATTR(in6, min, SMM665_MISC16_ADC_DATA_D);
423SMM665_ATTR(in7, min, SMM665_MISC16_ADC_DATA_E);
424SMM665_ATTR(in8, min, SMM665_MISC16_ADC_DATA_F);
425SMM665_ATTR(in9, min, SMM665_MISC16_ADC_DATA_AIN1);
426SMM665_ATTR(in10, min, SMM665_MISC16_ADC_DATA_AIN2);
427
428/* Input voltages max */
429SMM665_ATTR(in1, max, SMM665_MISC16_ADC_DATA_12V);
430SMM665_ATTR(in2, max, SMM665_MISC16_ADC_DATA_VDD);
431SMM665_ATTR(in3, max, SMM665_MISC16_ADC_DATA_A);
432SMM665_ATTR(in4, max, SMM665_MISC16_ADC_DATA_B);
433SMM665_ATTR(in5, max, SMM665_MISC16_ADC_DATA_C);
434SMM665_ATTR(in6, max, SMM665_MISC16_ADC_DATA_D);
435SMM665_ATTR(in7, max, SMM665_MISC16_ADC_DATA_E);
436SMM665_ATTR(in8, max, SMM665_MISC16_ADC_DATA_F);
437SMM665_ATTR(in9, max, SMM665_MISC16_ADC_DATA_AIN1);
438SMM665_ATTR(in10, max, SMM665_MISC16_ADC_DATA_AIN2);
439
440/* Input voltages lcrit */
441SMM665_ATTR(in1, lcrit, SMM665_MISC16_ADC_DATA_12V);
442SMM665_ATTR(in2, lcrit, SMM665_MISC16_ADC_DATA_VDD);
443SMM665_ATTR(in3, lcrit, SMM665_MISC16_ADC_DATA_A);
444SMM665_ATTR(in4, lcrit, SMM665_MISC16_ADC_DATA_B);
445SMM665_ATTR(in5, lcrit, SMM665_MISC16_ADC_DATA_C);
446SMM665_ATTR(in6, lcrit, SMM665_MISC16_ADC_DATA_D);
447SMM665_ATTR(in7, lcrit, SMM665_MISC16_ADC_DATA_E);
448SMM665_ATTR(in8, lcrit, SMM665_MISC16_ADC_DATA_F);
449SMM665_ATTR(in9, lcrit, SMM665_MISC16_ADC_DATA_AIN1);
450SMM665_ATTR(in10, lcrit, SMM665_MISC16_ADC_DATA_AIN2);
451
452/* Input voltages crit */
453SMM665_ATTR(in1, crit, SMM665_MISC16_ADC_DATA_12V);
454SMM665_ATTR(in2, crit, SMM665_MISC16_ADC_DATA_VDD);
455SMM665_ATTR(in3, crit, SMM665_MISC16_ADC_DATA_A);
456SMM665_ATTR(in4, crit, SMM665_MISC16_ADC_DATA_B);
457SMM665_ATTR(in5, crit, SMM665_MISC16_ADC_DATA_C);
458SMM665_ATTR(in6, crit, SMM665_MISC16_ADC_DATA_D);
459SMM665_ATTR(in7, crit, SMM665_MISC16_ADC_DATA_E);
460SMM665_ATTR(in8, crit, SMM665_MISC16_ADC_DATA_F);
461SMM665_ATTR(in9, crit, SMM665_MISC16_ADC_DATA_AIN1);
462SMM665_ATTR(in10, crit, SMM665_MISC16_ADC_DATA_AIN2);
463
464/* critical alarms */
465SMM665_ATTR(in1, crit_alarm, SMM665_FAULT_12V);
466SMM665_ATTR(in2, crit_alarm, SMM665_FAULT_VDD);
467SMM665_ATTR(in3, crit_alarm, SMM665_FAULT_A);
468SMM665_ATTR(in4, crit_alarm, SMM665_FAULT_B);
469SMM665_ATTR(in5, crit_alarm, SMM665_FAULT_C);
470SMM665_ATTR(in6, crit_alarm, SMM665_FAULT_D);
471SMM665_ATTR(in7, crit_alarm, SMM665_FAULT_E);
472SMM665_ATTR(in8, crit_alarm, SMM665_FAULT_F);
473SMM665_ATTR(in9, crit_alarm, SMM665_FAULT_AIN1);
474SMM665_ATTR(in10, crit_alarm, SMM665_FAULT_AIN2);
475
476/* Temperature */
477SMM665_ATTR(temp1, input, SMM665_MISC16_ADC_DATA_INT_TEMP);
478SMM665_ATTR(temp1, min, SMM665_MISC16_ADC_DATA_INT_TEMP);
479SMM665_ATTR(temp1, max, SMM665_MISC16_ADC_DATA_INT_TEMP);
480SMM665_ATTR(temp1, lcrit, SMM665_MISC16_ADC_DATA_INT_TEMP);
481SMM665_ATTR(temp1, crit, SMM665_MISC16_ADC_DATA_INT_TEMP);
482SMM665_ATTR(temp1, crit_alarm, SMM665_FAULT_TEMP);
483
484/*
485 * Finally, construct an array of pointers to members of the above objects,
486 * as required for sysfs_create_group()
487 */
488static struct attribute *smm665_attributes[] = {
489 &sensor_dev_attr_in1_input.dev_attr.attr,
490 &sensor_dev_attr_in1_min.dev_attr.attr,
491 &sensor_dev_attr_in1_max.dev_attr.attr,
492 &sensor_dev_attr_in1_lcrit.dev_attr.attr,
493 &sensor_dev_attr_in1_crit.dev_attr.attr,
494 &sensor_dev_attr_in1_crit_alarm.dev_attr.attr,
495
496 &sensor_dev_attr_in2_input.dev_attr.attr,
497 &sensor_dev_attr_in2_min.dev_attr.attr,
498 &sensor_dev_attr_in2_max.dev_attr.attr,
499 &sensor_dev_attr_in2_lcrit.dev_attr.attr,
500 &sensor_dev_attr_in2_crit.dev_attr.attr,
501 &sensor_dev_attr_in2_crit_alarm.dev_attr.attr,
502
503 &sensor_dev_attr_in3_input.dev_attr.attr,
504 &sensor_dev_attr_in3_min.dev_attr.attr,
505 &sensor_dev_attr_in3_max.dev_attr.attr,
506 &sensor_dev_attr_in3_lcrit.dev_attr.attr,
507 &sensor_dev_attr_in3_crit.dev_attr.attr,
508 &sensor_dev_attr_in3_crit_alarm.dev_attr.attr,
509
510 &sensor_dev_attr_in4_input.dev_attr.attr,
511 &sensor_dev_attr_in4_min.dev_attr.attr,
512 &sensor_dev_attr_in4_max.dev_attr.attr,
513 &sensor_dev_attr_in4_lcrit.dev_attr.attr,
514 &sensor_dev_attr_in4_crit.dev_attr.attr,
515 &sensor_dev_attr_in4_crit_alarm.dev_attr.attr,
516
517 &sensor_dev_attr_in5_input.dev_attr.attr,
518 &sensor_dev_attr_in5_min.dev_attr.attr,
519 &sensor_dev_attr_in5_max.dev_attr.attr,
520 &sensor_dev_attr_in5_lcrit.dev_attr.attr,
521 &sensor_dev_attr_in5_crit.dev_attr.attr,
522 &sensor_dev_attr_in5_crit_alarm.dev_attr.attr,
523
524 &sensor_dev_attr_in6_input.dev_attr.attr,
525 &sensor_dev_attr_in6_min.dev_attr.attr,
526 &sensor_dev_attr_in6_max.dev_attr.attr,
527 &sensor_dev_attr_in6_lcrit.dev_attr.attr,
528 &sensor_dev_attr_in6_crit.dev_attr.attr,
529 &sensor_dev_attr_in6_crit_alarm.dev_attr.attr,
530
531 &sensor_dev_attr_in7_input.dev_attr.attr,
532 &sensor_dev_attr_in7_min.dev_attr.attr,
533 &sensor_dev_attr_in7_max.dev_attr.attr,
534 &sensor_dev_attr_in7_lcrit.dev_attr.attr,
535 &sensor_dev_attr_in7_crit.dev_attr.attr,
536 &sensor_dev_attr_in7_crit_alarm.dev_attr.attr,
537
538 &sensor_dev_attr_in8_input.dev_attr.attr,
539 &sensor_dev_attr_in8_min.dev_attr.attr,
540 &sensor_dev_attr_in8_max.dev_attr.attr,
541 &sensor_dev_attr_in8_lcrit.dev_attr.attr,
542 &sensor_dev_attr_in8_crit.dev_attr.attr,
543 &sensor_dev_attr_in8_crit_alarm.dev_attr.attr,
544
545 &sensor_dev_attr_in9_input.dev_attr.attr,
546 &sensor_dev_attr_in9_min.dev_attr.attr,
547 &sensor_dev_attr_in9_max.dev_attr.attr,
548 &sensor_dev_attr_in9_lcrit.dev_attr.attr,
549 &sensor_dev_attr_in9_crit.dev_attr.attr,
550 &sensor_dev_attr_in9_crit_alarm.dev_attr.attr,
551
552 &sensor_dev_attr_in10_input.dev_attr.attr,
553 &sensor_dev_attr_in10_min.dev_attr.attr,
554 &sensor_dev_attr_in10_max.dev_attr.attr,
555 &sensor_dev_attr_in10_lcrit.dev_attr.attr,
556 &sensor_dev_attr_in10_crit.dev_attr.attr,
557 &sensor_dev_attr_in10_crit_alarm.dev_attr.attr,
558
559 &sensor_dev_attr_temp1_input.dev_attr.attr,
560 &sensor_dev_attr_temp1_min.dev_attr.attr,
561 &sensor_dev_attr_temp1_max.dev_attr.attr,
562 &sensor_dev_attr_temp1_lcrit.dev_attr.attr,
563 &sensor_dev_attr_temp1_crit.dev_attr.attr,
564 &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
565
566 NULL,
567};
568
569static const struct attribute_group smm665_group = {
570 .attrs = smm665_attributes,
571};
572
573static int smm665_probe(struct i2c_client *client,
574 const struct i2c_device_id *id)
575{
576 struct i2c_adapter *adapter = client->adapter;
577 struct smm665_data *data;
578 int i, ret;
579
580 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA
581 | I2C_FUNC_SMBUS_WORD_DATA))
582 return -ENODEV;
583
584 if (i2c_smbus_read_byte_data(client, SMM665_ADOC_ENABLE) < 0)
585 return -ENODEV;
586
b8a5a7ce 587 data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
920fa1ff 588 if (!data)
b8a5a7ce 589 return -ENOMEM;
920fa1ff
GR		 590
591 i2c_set_clientdata(client, data);
592 mutex_init(&data->update_lock);
593
594 data->type = id->driver_data;
595 data->cmdreg = i2c_new_dummy(adapter, (client->addr & ~SMM665_REGMASK)
596 | SMM665_CMDREG_BASE);
597 if (!data->cmdreg)
b8a5a7ce 598 return -ENOMEM;
920fa1ff
GR		 599
600 switch (data->type) {
601 case smm465:
602 case smm665:
603 data->conversion_time = SMM665_ADC_WAIT_SMM665;
604 break;
605 case smm665c:
606 case smm764:
607 case smm766:
608 data->conversion_time = SMM665_ADC_WAIT_SMM766;
609 break;
610 }
611
612 ret = -ENODEV;
613 if (i2c_smbus_read_byte_data(data->cmdreg, SMM665_MISC8_CMD_STS) < 0)
614 goto out_unregister;
615
616 /*
617 * Read limits.
618 *
619 * Limit registers start with register SMM665_LIMIT_BASE.
620 * Each channel uses 8 registers, providing four limit values
621 * per channel. Each limit value requires two registers, with the
622 * high byte in the first register and the low byte in the second
623 * register. The first two limits are under limit values, followed
624 * by two over limit values.
625 *
626 * Limit register order matches the ADC register order, so we use
627 * ADC register defines throughout the code to index limit registers.
628 *
629 * We save the first retrieved value both as "critical" and "alarm"
630 * value. The second value overwrites either the critical or the
631 * alarm value, depending on its configuration. This ensures that both
632 * critical and alarm values are initialized, even if both registers are
633 * configured as critical or non-critical.
634 */
635 for (i = 0; i < SMM665_NUM_ADC; i++) {
636 int val;
637
638 val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8);
639 if (unlikely(val < 0))
640 goto out_unregister;
641 data->critical_min_limit[i] = data->alarm_min_limit[i]
642 = smm665_convert(val, i);
643 val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8 + 2);
644 if (unlikely(val < 0))
645 goto out_unregister;
646 if (smm665_is_critical(val))
647 data->critical_min_limit[i] = smm665_convert(val, i);
648 else
649 data->alarm_min_limit[i] = smm665_convert(val, i);
650 val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8 + 4);
651 if (unlikely(val < 0))
652 goto out_unregister;
653 data->critical_max_limit[i] = data->alarm_max_limit[i]
654 = smm665_convert(val, i);
655 val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8 + 6);
656 if (unlikely(val < 0))
657 goto out_unregister;
658 if (smm665_is_critical(val))
659 data->critical_max_limit[i] = smm665_convert(val, i);
660 else
661 data->alarm_max_limit[i] = smm665_convert(val, i);
662 }
663
664 /* Register sysfs hooks */
665 ret = sysfs_create_group(&client->dev.kobj, &smm665_group);
666 if (ret)
667 goto out_unregister;
668
669 data->hwmon_dev = hwmon_device_register(&client->dev);
670 if (IS_ERR(data->hwmon_dev)) {
671 ret = PTR_ERR(data->hwmon_dev);
672 goto out_remove_group;
673 }
674
675 return 0;
676
677out_remove_group:
678 sysfs_remove_group(&client->dev.kobj, &smm665_group);
679out_unregister:
680 i2c_unregister_device(data->cmdreg);
920fa1ff
GR		 681 return ret;
682}
683
684static int smm665_remove(struct i2c_client *client)
685{
686 struct smm665_data *data = i2c_get_clientdata(client);
687
688 i2c_unregister_device(data->cmdreg);
689 hwmon_device_unregister(data->hwmon_dev);
690 sysfs_remove_group(&client->dev.kobj, &smm665_group);
691
920fa1ff
GR		 692 return 0;
693}
694
695static const struct i2c_device_id smm665_id[] = {
696 {"smm465", smm465},
697 {"smm665", smm665},
698 {"smm665c", smm665c},
699 {"smm764", smm764},
700 {"smm766", smm766},
701 {}
702};
703
704MODULE_DEVICE_TABLE(i2c, smm665_id);
705
706/* This is the driver that will be inserted */
707static struct i2c_driver smm665_driver = {
708 .driver = {
709 .name = "smm665",
710 },
711 .probe = smm665_probe,
712 .remove = smm665_remove,
713 .id_table = smm665_id,
714};
715
f0967eea 716module_i2c_driver(smm665_driver);
920fa1ff
GR		 717
718MODULE_AUTHOR("Guenter Roeck");
719MODULE_DESCRIPTION("SMM665 driver");
720MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)