Commit | Line | Data |
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28ff2f7a | 1 | /*************************************************************************** |
312869ec | 2 | * Copyright (C) 2010-2012 Hans de Goede <hdegoede@redhat.com> * |
28ff2f7a HG |
3 | * * |
4 | * This program is free software; you can redistribute it and/or modify * | |
5 | * it under the terms of the GNU General Public License as published by * | |
6 | * the Free Software Foundation; either version 2 of the License, or * | |
7 | * (at your option) any later version. * | |
8 | * * | |
9 | * This program is distributed in the hope that it will be useful, * | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of * | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * | |
12 | * GNU General Public License for more details. * | |
13 | * * | |
14 | * You should have received a copy of the GNU General Public License * | |
15 | * along with this program; if not, write to the * | |
16 | * Free Software Foundation, Inc., * | |
17 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * | |
18 | ***************************************************************************/ | |
19 | ||
20 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
21 | ||
22 | #include <linux/module.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/platform_device.h> | |
25 | #include <linux/err.h> | |
26 | #include <linux/io.h> | |
27 | #include <linux/acpi.h> | |
28 | #include <linux/delay.h> | |
312869ec HG |
29 | #include <linux/fs.h> |
30 | #include <linux/watchdog.h> | |
312869ec | 31 | #include <linux/uaccess.h> |
312869ec | 32 | #include <linux/slab.h> |
28ff2f7a HG |
33 | #include "sch56xx-common.h" |
34 | ||
312869ec HG |
35 | /* Insmod parameters */ |
36 | static int nowayout = WATCHDOG_NOWAYOUT; | |
37 | module_param(nowayout, int, 0); | |
38 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" | |
39 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
40 | ||
28ff2f7a HG |
41 | #define SIO_SCH56XX_LD_EM 0x0C /* Embedded uController Logical Dev */ |
42 | #define SIO_UNLOCK_KEY 0x55 /* Key to enable Super-I/O */ | |
43 | #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */ | |
44 | ||
45 | #define SIO_REG_LDSEL 0x07 /* Logical device select */ | |
46 | #define SIO_REG_DEVID 0x20 /* Device ID */ | |
47 | #define SIO_REG_ENABLE 0x30 /* Logical device enable */ | |
48 | #define SIO_REG_ADDR 0x66 /* Logical device address (2 bytes) */ | |
49 | ||
50 | #define SIO_SCH5627_ID 0xC6 /* Chipset ID */ | |
0772a640 | 51 | #define SIO_SCH5636_ID 0xC7 /* Chipset ID */ |
28ff2f7a | 52 | |
312869ec | 53 | #define REGION_LENGTH 10 |
28ff2f7a HG |
54 | |
55 | #define SCH56XX_CMD_READ 0x02 | |
56 | #define SCH56XX_CMD_WRITE 0x03 | |
57 | ||
312869ec HG |
58 | /* Watchdog registers */ |
59 | #define SCH56XX_REG_WDOG_PRESET 0x58B | |
60 | #define SCH56XX_REG_WDOG_CONTROL 0x58C | |
61 | #define SCH56XX_WDOG_TIME_BASE_SEC 0x01 | |
62 | #define SCH56XX_REG_WDOG_OUTPUT_ENABLE 0x58E | |
63 | #define SCH56XX_WDOG_OUTPUT_ENABLE 0x02 | |
64 | ||
65 | struct sch56xx_watchdog_data { | |
66 | u16 addr; | |
312869ec | 67 | struct mutex *io_lock; |
fb551405 HG |
68 | struct watchdog_info wdinfo; |
69 | struct watchdog_device wddev; | |
312869ec HG |
70 | u8 watchdog_preset; |
71 | u8 watchdog_control; | |
72 | u8 watchdog_output_enable; | |
73 | }; | |
74 | ||
28ff2f7a HG |
75 | static struct platform_device *sch56xx_pdev; |
76 | ||
77 | /* Super I/O functions */ | |
78 | static inline int superio_inb(int base, int reg) | |
79 | { | |
80 | outb(reg, base); | |
81 | return inb(base + 1); | |
82 | } | |
83 | ||
84 | static inline int superio_enter(int base) | |
85 | { | |
86 | /* Don't step on other drivers' I/O space by accident */ | |
87 | if (!request_muxed_region(base, 2, "sch56xx")) { | |
88 | pr_err("I/O address 0x%04x already in use\n", base); | |
89 | return -EBUSY; | |
90 | } | |
91 | ||
92 | outb(SIO_UNLOCK_KEY, base); | |
93 | ||
94 | return 0; | |
95 | } | |
96 | ||
97 | static inline void superio_select(int base, int ld) | |
98 | { | |
99 | outb(SIO_REG_LDSEL, base); | |
100 | outb(ld, base + 1); | |
101 | } | |
102 | ||
103 | static inline void superio_exit(int base) | |
104 | { | |
105 | outb(SIO_LOCK_KEY, base); | |
106 | release_region(base, 2); | |
107 | } | |
108 | ||
109 | static int sch56xx_send_cmd(u16 addr, u8 cmd, u16 reg, u8 v) | |
110 | { | |
111 | u8 val; | |
112 | int i; | |
113 | /* | |
114 | * According to SMSC for the commands we use the maximum time for | |
115 | * the EM to respond is 15 ms, but testing shows in practice it | |
116 | * responds within 15-32 reads, so we first busy poll, and if | |
117 | * that fails sleep a bit and try again until we are way past | |
118 | * the 15 ms maximum response time. | |
119 | */ | |
120 | const int max_busy_polls = 64; | |
121 | const int max_lazy_polls = 32; | |
122 | ||
123 | /* (Optional) Write-Clear the EC to Host Mailbox Register */ | |
124 | val = inb(addr + 1); | |
125 | outb(val, addr + 1); | |
126 | ||
127 | /* Set Mailbox Address Pointer to first location in Region 1 */ | |
128 | outb(0x00, addr + 2); | |
129 | outb(0x80, addr + 3); | |
130 | ||
131 | /* Write Request Packet Header */ | |
132 | outb(cmd, addr + 4); /* VREG Access Type read:0x02 write:0x03 */ | |
133 | outb(0x01, addr + 5); /* # of Entries: 1 Byte (8-bit) */ | |
134 | outb(0x04, addr + 2); /* Mailbox AP to first data entry loc. */ | |
135 | ||
136 | /* Write Value field */ | |
137 | if (cmd == SCH56XX_CMD_WRITE) | |
138 | outb(v, addr + 4); | |
139 | ||
140 | /* Write Address field */ | |
141 | outb(reg & 0xff, addr + 6); | |
142 | outb(reg >> 8, addr + 7); | |
143 | ||
144 | /* Execute the Random Access Command */ | |
145 | outb(0x01, addr); /* Write 01h to the Host-to-EC register */ | |
146 | ||
147 | /* EM Interface Polling "Algorithm" */ | |
148 | for (i = 0; i < max_busy_polls + max_lazy_polls; i++) { | |
149 | if (i >= max_busy_polls) | |
150 | msleep(1); | |
151 | /* Read Interrupt source Register */ | |
152 | val = inb(addr + 8); | |
153 | /* Write Clear the interrupt source bits */ | |
154 | if (val) | |
155 | outb(val, addr + 8); | |
156 | /* Command Completed ? */ | |
157 | if (val & 0x01) | |
158 | break; | |
159 | } | |
160 | if (i == max_busy_polls + max_lazy_polls) { | |
b55f3757 GR |
161 | pr_err("Max retries exceeded reading virtual register 0x%04hx (%d)\n", |
162 | reg, 1); | |
28ff2f7a HG |
163 | return -EIO; |
164 | } | |
165 | ||
166 | /* | |
167 | * According to SMSC we may need to retry this, but sofar I've always | |
168 | * seen this succeed in 1 try. | |
169 | */ | |
170 | for (i = 0; i < max_busy_polls; i++) { | |
171 | /* Read EC-to-Host Register */ | |
172 | val = inb(addr + 1); | |
173 | /* Command Completed ? */ | |
174 | if (val == 0x01) | |
175 | break; | |
176 | ||
177 | if (i == 0) | |
b55f3757 GR |
178 | pr_warn("EC reports: 0x%02x reading virtual register 0x%04hx\n", |
179 | (unsigned int)val, reg); | |
28ff2f7a HG |
180 | } |
181 | if (i == max_busy_polls) { | |
b55f3757 GR |
182 | pr_err("Max retries exceeded reading virtual register 0x%04hx (%d)\n", |
183 | reg, 2); | |
28ff2f7a HG |
184 | return -EIO; |
185 | } | |
186 | ||
187 | /* | |
188 | * According to the SMSC app note we should now do: | |
189 | * | |
190 | * Set Mailbox Address Pointer to first location in Region 1 * | |
191 | * outb(0x00, addr + 2); | |
192 | * outb(0x80, addr + 3); | |
193 | * | |
194 | * But if we do that things don't work, so let's not. | |
195 | */ | |
196 | ||
197 | /* Read Value field */ | |
198 | if (cmd == SCH56XX_CMD_READ) | |
199 | return inb(addr + 4); | |
200 | ||
201 | return 0; | |
202 | } | |
203 | ||
204 | int sch56xx_read_virtual_reg(u16 addr, u16 reg) | |
205 | { | |
206 | return sch56xx_send_cmd(addr, SCH56XX_CMD_READ, reg, 0); | |
207 | } | |
208 | EXPORT_SYMBOL(sch56xx_read_virtual_reg); | |
209 | ||
210 | int sch56xx_write_virtual_reg(u16 addr, u16 reg, u8 val) | |
211 | { | |
212 | return sch56xx_send_cmd(addr, SCH56XX_CMD_WRITE, reg, val); | |
213 | } | |
214 | EXPORT_SYMBOL(sch56xx_write_virtual_reg); | |
215 | ||
216 | int sch56xx_read_virtual_reg16(u16 addr, u16 reg) | |
217 | { | |
218 | int lsb, msb; | |
219 | ||
220 | /* Read LSB first, this will cause the matching MSB to be latched */ | |
221 | lsb = sch56xx_read_virtual_reg(addr, reg); | |
222 | if (lsb < 0) | |
223 | return lsb; | |
224 | ||
225 | msb = sch56xx_read_virtual_reg(addr, reg + 1); | |
226 | if (msb < 0) | |
227 | return msb; | |
228 | ||
229 | return lsb | (msb << 8); | |
230 | } | |
231 | EXPORT_SYMBOL(sch56xx_read_virtual_reg16); | |
232 | ||
233 | int sch56xx_read_virtual_reg12(u16 addr, u16 msb_reg, u16 lsn_reg, | |
234 | int high_nibble) | |
235 | { | |
236 | int msb, lsn; | |
237 | ||
238 | /* Read MSB first, this will cause the matching LSN to be latched */ | |
239 | msb = sch56xx_read_virtual_reg(addr, msb_reg); | |
240 | if (msb < 0) | |
241 | return msb; | |
242 | ||
243 | lsn = sch56xx_read_virtual_reg(addr, lsn_reg); | |
244 | if (lsn < 0) | |
245 | return lsn; | |
246 | ||
247 | if (high_nibble) | |
248 | return (msb << 4) | (lsn >> 4); | |
249 | else | |
250 | return (msb << 4) | (lsn & 0x0f); | |
251 | } | |
252 | EXPORT_SYMBOL(sch56xx_read_virtual_reg12); | |
253 | ||
312869ec HG |
254 | /* |
255 | * Watchdog routines | |
256 | */ | |
257 | ||
fb551405 HG |
258 | static int watchdog_set_timeout(struct watchdog_device *wddev, |
259 | unsigned int timeout) | |
312869ec | 260 | { |
fb551405 HG |
261 | struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev); |
262 | unsigned int resolution; | |
312869ec | 263 | u8 control; |
fb551405 | 264 | int ret; |
312869ec HG |
265 | |
266 | /* 1 second or 60 second resolution? */ | |
267 | if (timeout <= 255) | |
268 | resolution = 1; | |
269 | else | |
270 | resolution = 60; | |
271 | ||
272 | if (timeout < resolution || timeout > (resolution * 255)) | |
273 | return -EINVAL; | |
274 | ||
312869ec HG |
275 | if (resolution == 1) |
276 | control = data->watchdog_control | SCH56XX_WDOG_TIME_BASE_SEC; | |
277 | else | |
278 | control = data->watchdog_control & ~SCH56XX_WDOG_TIME_BASE_SEC; | |
279 | ||
280 | if (data->watchdog_control != control) { | |
281 | mutex_lock(data->io_lock); | |
282 | ret = sch56xx_write_virtual_reg(data->addr, | |
283 | SCH56XX_REG_WDOG_CONTROL, | |
284 | control); | |
285 | mutex_unlock(data->io_lock); | |
286 | if (ret) | |
fb551405 | 287 | return ret; |
312869ec HG |
288 | |
289 | data->watchdog_control = control; | |
290 | } | |
291 | ||
292 | /* | |
293 | * Remember new timeout value, but do not write as that (re)starts | |
294 | * the watchdog countdown. | |
295 | */ | |
296 | data->watchdog_preset = DIV_ROUND_UP(timeout, resolution); | |
fb551405 | 297 | wddev->timeout = data->watchdog_preset * resolution; |
312869ec | 298 | |
fb551405 | 299 | return 0; |
312869ec HG |
300 | } |
301 | ||
fb551405 | 302 | static int watchdog_start(struct watchdog_device *wddev) |
312869ec | 303 | { |
fb551405 | 304 | struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev); |
312869ec HG |
305 | int ret; |
306 | u8 val; | |
307 | ||
312869ec HG |
308 | /* |
309 | * The sch56xx's watchdog cannot really be started / stopped | |
310 | * it is always running, but we can avoid the timer expiring | |
311 | * from causing a system reset by clearing the output enable bit. | |
312 | * | |
313 | * The sch56xx's watchdog will set the watchdog event bit, bit 0 | |
314 | * of the second interrupt source register (at base-address + 9), | |
315 | * when the timer expires. | |
316 | * | |
317 | * This will only cause a system reset if the 0-1 flank happens when | |
318 | * output enable is true. Setting output enable after the flank will | |
319 | * not cause a reset, nor will the timer expiring a second time. | |
320 | * This means we must clear the watchdog event bit in case it is set. | |
321 | * | |
322 | * The timer may still be running (after a recent watchdog_stop) and | |
323 | * mere milliseconds away from expiring, so the timer must be reset | |
324 | * first! | |
325 | */ | |
326 | ||
327 | mutex_lock(data->io_lock); | |
328 | ||
329 | /* 1. Reset the watchdog countdown counter */ | |
330 | ret = sch56xx_write_virtual_reg(data->addr, SCH56XX_REG_WDOG_PRESET, | |
331 | data->watchdog_preset); | |
332 | if (ret) | |
333 | goto leave; | |
334 | ||
85a2e40c HG |
335 | /* 2. Enable output */ |
336 | val = data->watchdog_output_enable | SCH56XX_WDOG_OUTPUT_ENABLE; | |
337 | ret = sch56xx_write_virtual_reg(data->addr, | |
338 | SCH56XX_REG_WDOG_OUTPUT_ENABLE, val); | |
339 | if (ret) | |
340 | goto leave; | |
312869ec | 341 | |
85a2e40c | 342 | data->watchdog_output_enable = val; |
312869ec HG |
343 | |
344 | /* 3. Clear the watchdog event bit if set */ | |
345 | val = inb(data->addr + 9); | |
346 | if (val & 0x01) | |
347 | outb(0x01, data->addr + 9); | |
348 | ||
349 | leave: | |
350 | mutex_unlock(data->io_lock); | |
312869ec HG |
351 | return ret; |
352 | } | |
353 | ||
fb551405 | 354 | static int watchdog_trigger(struct watchdog_device *wddev) |
312869ec | 355 | { |
fb551405 | 356 | struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev); |
312869ec HG |
357 | int ret; |
358 | ||
312869ec HG |
359 | /* Reset the watchdog countdown counter */ |
360 | mutex_lock(data->io_lock); | |
361 | ret = sch56xx_write_virtual_reg(data->addr, SCH56XX_REG_WDOG_PRESET, | |
362 | data->watchdog_preset); | |
363 | mutex_unlock(data->io_lock); | |
fb551405 | 364 | |
312869ec HG |
365 | return ret; |
366 | } | |
367 | ||
fb551405 | 368 | static int watchdog_stop(struct watchdog_device *wddev) |
312869ec | 369 | { |
fb551405 | 370 | struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev); |
312869ec HG |
371 | int ret = 0; |
372 | u8 val; | |
373 | ||
85a2e40c HG |
374 | val = data->watchdog_output_enable & ~SCH56XX_WDOG_OUTPUT_ENABLE; |
375 | mutex_lock(data->io_lock); | |
376 | ret = sch56xx_write_virtual_reg(data->addr, | |
377 | SCH56XX_REG_WDOG_OUTPUT_ENABLE, val); | |
378 | mutex_unlock(data->io_lock); | |
379 | if (ret) | |
380 | return ret; | |
312869ec | 381 | |
85a2e40c HG |
382 | data->watchdog_output_enable = val; |
383 | return 0; | |
312869ec HG |
384 | } |
385 | ||
fb551405 HG |
386 | static const struct watchdog_ops watchdog_ops = { |
387 | .owner = THIS_MODULE, | |
388 | .start = watchdog_start, | |
389 | .stop = watchdog_stop, | |
390 | .ping = watchdog_trigger, | |
391 | .set_timeout = watchdog_set_timeout, | |
312869ec HG |
392 | }; |
393 | ||
fb551405 | 394 | struct sch56xx_watchdog_data *sch56xx_watchdog_register(struct device *parent, |
312869ec HG |
395 | u16 addr, u32 revision, struct mutex *io_lock, int check_enabled) |
396 | { | |
397 | struct sch56xx_watchdog_data *data; | |
fb551405 | 398 | int err, control, output_enable; |
312869ec HG |
399 | |
400 | /* Cache the watchdog registers */ | |
401 | mutex_lock(io_lock); | |
402 | control = | |
403 | sch56xx_read_virtual_reg(addr, SCH56XX_REG_WDOG_CONTROL); | |
404 | output_enable = | |
405 | sch56xx_read_virtual_reg(addr, SCH56XX_REG_WDOG_OUTPUT_ENABLE); | |
406 | mutex_unlock(io_lock); | |
407 | ||
408 | if (control < 0) | |
409 | return NULL; | |
410 | if (output_enable < 0) | |
411 | return NULL; | |
412 | if (check_enabled && !(output_enable & SCH56XX_WDOG_OUTPUT_ENABLE)) { | |
413 | pr_warn("Watchdog not enabled by BIOS, not registering\n"); | |
414 | return NULL; | |
415 | } | |
416 | ||
417 | data = kzalloc(sizeof(struct sch56xx_watchdog_data), GFP_KERNEL); | |
418 | if (!data) | |
419 | return NULL; | |
420 | ||
421 | data->addr = addr; | |
312869ec | 422 | data->io_lock = io_lock; |
312869ec | 423 | |
fb551405 HG |
424 | strlcpy(data->wdinfo.identity, "sch56xx watchdog", |
425 | sizeof(data->wdinfo.identity)); | |
426 | data->wdinfo.firmware_version = revision; | |
427 | data->wdinfo.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT; | |
428 | if (!nowayout) | |
429 | data->wdinfo.options |= WDIOF_MAGICCLOSE; | |
430 | ||
431 | data->wddev.info = &data->wdinfo; | |
432 | data->wddev.ops = &watchdog_ops; | |
433 | data->wddev.parent = parent; | |
434 | data->wddev.timeout = 60; | |
435 | data->wddev.min_timeout = 1; | |
436 | data->wddev.max_timeout = 255 * 60; | |
437 | if (nowayout) | |
bb644913 | 438 | set_bit(WDOG_NO_WAY_OUT, &data->wddev.status); |
fb551405 | 439 | if (output_enable & SCH56XX_WDOG_OUTPUT_ENABLE) |
bb644913 | 440 | set_bit(WDOG_ACTIVE, &data->wddev.status); |
fb551405 HG |
441 | |
442 | /* Since the watchdog uses a downcounter there is no register to read | |
443 | the BIOS set timeout from (if any was set at all) -> | |
444 | Choose a preset which will give us a 1 minute timeout */ | |
445 | if (control & SCH56XX_WDOG_TIME_BASE_SEC) | |
446 | data->watchdog_preset = 60; /* seconds */ | |
447 | else | |
448 | data->watchdog_preset = 1; /* minute */ | |
312869ec | 449 | |
fb551405 HG |
450 | data->watchdog_control = control; |
451 | data->watchdog_output_enable = output_enable; | |
312869ec | 452 | |
fb551405 HG |
453 | watchdog_set_drvdata(&data->wddev, data); |
454 | err = watchdog_register_device(&data->wddev); | |
312869ec HG |
455 | if (err) { |
456 | pr_err("Registering watchdog chardev: %d\n", err); | |
fb551405 HG |
457 | kfree(data); |
458 | return NULL; | |
312869ec HG |
459 | } |
460 | ||
461 | return data; | |
312869ec HG |
462 | } |
463 | EXPORT_SYMBOL(sch56xx_watchdog_register); | |
464 | ||
465 | void sch56xx_watchdog_unregister(struct sch56xx_watchdog_data *data) | |
466 | { | |
fb551405 | 467 | watchdog_unregister_device(&data->wddev); |
3b8d058c | 468 | kfree(data); |
312869ec HG |
469 | } |
470 | EXPORT_SYMBOL(sch56xx_watchdog_unregister); | |
471 | ||
472 | /* | |
473 | * platform dev find, add and remove functions | |
474 | */ | |
475 | ||
313829ee | 476 | static int __init sch56xx_find(int sioaddr, const char **name) |
28ff2f7a HG |
477 | { |
478 | u8 devid; | |
313829ee | 479 | unsigned short address; |
28ff2f7a HG |
480 | int err; |
481 | ||
482 | err = superio_enter(sioaddr); | |
483 | if (err) | |
484 | return err; | |
485 | ||
486 | devid = superio_inb(sioaddr, SIO_REG_DEVID); | |
487 | switch (devid) { | |
488 | case SIO_SCH5627_ID: | |
489 | *name = "sch5627"; | |
490 | break; | |
0772a640 HG |
491 | case SIO_SCH5636_ID: |
492 | *name = "sch5636"; | |
493 | break; | |
28ff2f7a HG |
494 | default: |
495 | pr_debug("Unsupported device id: 0x%02x\n", | |
496 | (unsigned int)devid); | |
497 | err = -ENODEV; | |
498 | goto exit; | |
499 | } | |
500 | ||
501 | superio_select(sioaddr, SIO_SCH56XX_LD_EM); | |
502 | ||
503 | if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) { | |
504 | pr_warn("Device not activated\n"); | |
505 | err = -ENODEV; | |
506 | goto exit; | |
507 | } | |
508 | ||
509 | /* | |
510 | * Warning the order of the low / high byte is the other way around | |
511 | * as on most other superio devices!! | |
512 | */ | |
313829ee | 513 | address = superio_inb(sioaddr, SIO_REG_ADDR) | |
28ff2f7a | 514 | superio_inb(sioaddr, SIO_REG_ADDR + 1) << 8; |
313829ee | 515 | if (address == 0) { |
28ff2f7a HG |
516 | pr_warn("Base address not set\n"); |
517 | err = -ENODEV; | |
518 | goto exit; | |
519 | } | |
313829ee | 520 | err = address; |
28ff2f7a HG |
521 | |
522 | exit: | |
523 | superio_exit(sioaddr); | |
524 | return err; | |
525 | } | |
526 | ||
313829ee | 527 | static int __init sch56xx_device_add(int address, const char *name) |
28ff2f7a HG |
528 | { |
529 | struct resource res = { | |
530 | .start = address, | |
531 | .end = address + REGION_LENGTH - 1, | |
532 | .flags = IORESOURCE_IO, | |
533 | }; | |
534 | int err; | |
535 | ||
536 | sch56xx_pdev = platform_device_alloc(name, address); | |
537 | if (!sch56xx_pdev) | |
538 | return -ENOMEM; | |
539 | ||
540 | res.name = sch56xx_pdev->name; | |
541 | err = acpi_check_resource_conflict(&res); | |
542 | if (err) | |
543 | goto exit_device_put; | |
544 | ||
545 | err = platform_device_add_resources(sch56xx_pdev, &res, 1); | |
546 | if (err) { | |
547 | pr_err("Device resource addition failed\n"); | |
548 | goto exit_device_put; | |
549 | } | |
550 | ||
551 | err = platform_device_add(sch56xx_pdev); | |
552 | if (err) { | |
553 | pr_err("Device addition failed\n"); | |
554 | goto exit_device_put; | |
555 | } | |
556 | ||
557 | return 0; | |
558 | ||
559 | exit_device_put: | |
560 | platform_device_put(sch56xx_pdev); | |
561 | ||
562 | return err; | |
563 | } | |
564 | ||
565 | static int __init sch56xx_init(void) | |
566 | { | |
313829ee GR |
567 | int address; |
568 | const char *name = NULL; | |
569 | ||
570 | address = sch56xx_find(0x4e, &name); | |
571 | if (address < 0) | |
572 | address = sch56xx_find(0x2e, &name); | |
573 | if (address < 0) | |
574 | return address; | |
28ff2f7a HG |
575 | |
576 | return sch56xx_device_add(address, name); | |
577 | } | |
578 | ||
579 | static void __exit sch56xx_exit(void) | |
580 | { | |
581 | platform_device_unregister(sch56xx_pdev); | |
582 | } | |
583 | ||
584 | MODULE_DESCRIPTION("SMSC SCH56xx Hardware Monitoring Common Code"); | |
585 | MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); | |
586 | MODULE_LICENSE("GPL"); | |
587 | ||
588 | module_init(sch56xx_init); | |
589 | module_exit(sch56xx_exit); |