[linux-block.git] / drivers / hwmon / sch56xx-common.c

// SPDX-License-Identifier: GPL-2.0-or-later
/***************************************************************************
 *   Copyright (C) 2010-2012 Hans de Goede <hdegoede@redhat.com>           *
 *                                                                         *
 ***************************************************************************/

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/module.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/acpi.h>
#include <linux/delay.h>
#include <linux/fs.h>
#include <linux/watchdog.h>
#include <linux/uaccess.h>
#include <linux/slab.h>
#include "sch56xx-common.h"

/* Insmod parameters */
static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
	__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

#define SIO_SCH56XX_LD_EM	0x0C	/* Embedded uController Logical Dev */
#define SIO_UNLOCK_KEY		0x55	/* Key to enable Super-I/O */
#define SIO_LOCK_KEY		0xAA	/* Key to disable Super-I/O */

#define SIO_REG_LDSEL		0x07	/* Logical device select */
#define SIO_REG_DEVID		0x20	/* Device ID */
#define SIO_REG_ENABLE		0x30	/* Logical device enable */
#define SIO_REG_ADDR		0x66	/* Logical device address (2 bytes) */

#define SIO_SCH5627_ID		0xC6	/* Chipset ID */
#define SIO_SCH5636_ID		0xC7	/* Chipset ID */

#define REGION_LENGTH		10

#define SCH56XX_CMD_READ	0x02
#define SCH56XX_CMD_WRITE	0x03

/* Watchdog registers */
#define SCH56XX_REG_WDOG_PRESET		0x58B
#define SCH56XX_REG_WDOG_CONTROL	0x58C
#define SCH56XX_WDOG_TIME_BASE_SEC	0x01
#define SCH56XX_REG_WDOG_OUTPUT_ENABLE	0x58E
#define SCH56XX_WDOG_OUTPUT_ENABLE	0x02

struct sch56xx_watchdog_data {
	u16 addr;
	struct mutex *io_lock;
	struct watchdog_info wdinfo;
	struct watchdog_device wddev;
	u8 watchdog_preset;
	u8 watchdog_control;
	u8 watchdog_output_enable;
};

struct sch56xx_bus_context {
	struct mutex *lock;	/* Used to serialize access to the mailbox registers */
	u16 addr;
};

static struct platform_device *sch56xx_pdev;

/* Super I/O functions */
static inline int superio_inb(int base, int reg)
{
	outb(reg, base);
	return inb(base + 1);
}

static inline int superio_enter(int base)
{
	/* Don't step on other drivers' I/O space by accident */
	if (!request_muxed_region(base, 2, "sch56xx")) {
		pr_err("I/O address 0x%04x already in use\n", base);
		return -EBUSY;
	}

	outb(SIO_UNLOCK_KEY, base);

	return 0;
}

static inline void superio_select(int base, int ld)
{
	outb(SIO_REG_LDSEL, base);
	outb(ld, base + 1);
}

static inline void superio_exit(int base)
{
	outb(SIO_LOCK_KEY, base);
	release_region(base, 2);
}

static int sch56xx_send_cmd(u16 addr, u8 cmd, u16 reg, u8 v)
{
	u8 val;
	int i;
	/*
	 * According to SMSC for the commands we use the maximum time for
	 * the EM to respond is 15 ms, but testing shows in practice it
	 * responds within 15-32 reads, so we first busy poll, and if
	 * that fails sleep a bit and try again until we are way past
	 * the 15 ms maximum response time.
	 */
	const int max_busy_polls = 64;
	const int max_lazy_polls = 32;

	/* (Optional) Write-Clear the EC to Host Mailbox Register */
	val = inb(addr + 1);
	outb(val, addr + 1);

	/* Set Mailbox Address Pointer to first location in Region 1 */
	outb(0x00, addr + 2);
	outb(0x80, addr + 3);

	/* Write Request Packet Header */
	outb(cmd, addr + 4); /* VREG Access Type read:0x02 write:0x03 */
	outb(0x01, addr + 5); /* # of Entries: 1 Byte (8-bit) */
	outb(0x04, addr + 2); /* Mailbox AP to first data entry loc. */

	/* Write Value field */
	if (cmd == SCH56XX_CMD_WRITE)
		outb(v, addr + 4);

	/* Write Address field */
	outb(reg & 0xff, addr + 6);
	outb(reg >> 8, addr + 7);

	/* Execute the Random Access Command */
	outb(0x01, addr); /* Write 01h to the Host-to-EC register */

	/* EM Interface Polling "Algorithm" */
	for (i = 0; i < max_busy_polls + max_lazy_polls; i++) {
		if (i >= max_busy_polls)
			usleep_range(1000, 2000);
		/* Read Interrupt source Register */
		val = inb(addr + 8);
		/* Write Clear the interrupt source bits */
		if (val)
			outb(val, addr + 8);
		/* Command Completed ? */
		if (val & 0x01)
			break;
	}
	if (i == max_busy_polls + max_lazy_polls) {
		pr_err("Max retries exceeded reading virtual register 0x%04hx (%d)\n",
		       reg, 1);
		return -EIO;
	}

	/*
	 * According to SMSC we may need to retry this, but sofar I've always
	 * seen this succeed in 1 try.
	 */
	for (i = 0; i < max_busy_polls; i++) {
		/* Read EC-to-Host Register */
		val = inb(addr + 1);
		/* Command Completed ? */
		if (val == 0x01)
			break;

		if (i == 0)
			pr_warn("EC reports: 0x%02x reading virtual register 0x%04hx\n",
				(unsigned int)val, reg);
	}
	if (i == max_busy_polls) {
		pr_err("Max retries exceeded reading virtual register 0x%04hx (%d)\n",
		       reg, 2);
		return -EIO;
	}

	/*
	 * According to the SMSC app note we should now do:
	 *
	 * Set Mailbox Address Pointer to first location in Region 1 *
	 * outb(0x00, addr + 2);
	 * outb(0x80, addr + 3);
	 *
	 * But if we do that things don't work, so let's not.
	 */

	/* Read Value field */
	if (cmd == SCH56XX_CMD_READ)
		return inb(addr + 4);

	return 0;
}

int sch56xx_read_virtual_reg(u16 addr, u16 reg)
{
	return sch56xx_send_cmd(addr, SCH56XX_CMD_READ, reg, 0);
}
EXPORT_SYMBOL(sch56xx_read_virtual_reg);

int sch56xx_write_virtual_reg(u16 addr, u16 reg, u8 val)
{
	return sch56xx_send_cmd(addr, SCH56XX_CMD_WRITE, reg, val);
}
EXPORT_SYMBOL(sch56xx_write_virtual_reg);

int sch56xx_read_virtual_reg16(u16 addr, u16 reg)
{
	int lsb, msb;

	/* Read LSB first, this will cause the matching MSB to be latched */
	lsb = sch56xx_read_virtual_reg(addr, reg);
	if (lsb < 0)
		return lsb;

	msb = sch56xx_read_virtual_reg(addr, reg + 1);
	if (msb < 0)
		return msb;

	return lsb | (msb << 8);
}
EXPORT_SYMBOL(sch56xx_read_virtual_reg16);

int sch56xx_read_virtual_reg12(u16 addr, u16 msb_reg, u16 lsn_reg,
			       int high_nibble)
{
	int msb, lsn;

	/* Read MSB first, this will cause the matching LSN to be latched */
	msb = sch56xx_read_virtual_reg(addr, msb_reg);
	if (msb < 0)
		return msb;

	lsn = sch56xx_read_virtual_reg(addr, lsn_reg);
	if (lsn < 0)
		return lsn;

	if (high_nibble)
		return (msb << 4) | (lsn >> 4);
	else
		return (msb << 4) | (lsn & 0x0f);
}
EXPORT_SYMBOL(sch56xx_read_virtual_reg12);

/*
 * Regmap support
 */

int sch56xx_regmap_read16(struct regmap *map, unsigned int reg, unsigned int *val)
{
	int lsb, msb, ret;

	/* See sch56xx_read_virtual_reg16() */
	ret = regmap_read(map, reg, &lsb);
	if (ret < 0)
		return ret;

	ret = regmap_read(map, reg + 1, &msb);
	if (ret < 0)
		return ret;

	*val = lsb | (msb << 8);

	return 0;
}
EXPORT_SYMBOL(sch56xx_regmap_read16);

int sch56xx_regmap_write16(struct regmap *map, unsigned int reg, unsigned int val)
{
	int ret;

	ret = regmap_write(map, reg, val & 0xff);
	if (ret < 0)
		return ret;

	return regmap_write(map, reg + 1, (val >> 8) & 0xff);
}
EXPORT_SYMBOL(sch56xx_regmap_write16);

static int sch56xx_reg_write(void *context, unsigned int reg, unsigned int val)
{
	struct sch56xx_bus_context *bus = context;
	int ret;

	mutex_lock(bus->lock);
	ret = sch56xx_write_virtual_reg(bus->addr, (u16)reg, (u8)val);
	mutex_unlock(bus->lock);

	return ret;
}

static int sch56xx_reg_read(void *context, unsigned int reg, unsigned int *val)
{
	struct sch56xx_bus_context *bus = context;
	int ret;

	mutex_lock(bus->lock);
	ret = sch56xx_read_virtual_reg(bus->addr, (u16)reg);
	mutex_unlock(bus->lock);

	if (ret < 0)
		return ret;

	*val = ret;

	return 0;
}

static void sch56xx_free_context(void *context)
{
	kfree(context);
}

static const struct regmap_bus sch56xx_bus = {
	.reg_write = sch56xx_reg_write,
	.reg_read = sch56xx_reg_read,
	.free_context = sch56xx_free_context,
	.reg_format_endian_default = REGMAP_ENDIAN_LITTLE,
	.val_format_endian_default = REGMAP_ENDIAN_LITTLE,
};

struct regmap *devm_regmap_init_sch56xx(struct device *dev, struct mutex *lock, u16 addr,
					const struct regmap_config *config)
{
	struct sch56xx_bus_context *context;
	struct regmap *map;

	if (config->reg_bits != 16 && config->val_bits != 8)
		return ERR_PTR(-EOPNOTSUPP);

	context = kzalloc(sizeof(*context), GFP_KERNEL);
	if (!context)
		return ERR_PTR(-ENOMEM);

	context->lock = lock;
	context->addr = addr;

	map = devm_regmap_init(dev, &sch56xx_bus, context, config);
	if (IS_ERR(map))
		kfree(context);

	return map;
}
EXPORT_SYMBOL(devm_regmap_init_sch56xx);

/*
 * Watchdog routines
 */

static int watchdog_set_timeout(struct watchdog_device *wddev,
				unsigned int timeout)
{
	struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
	unsigned int resolution;
	u8 control;
	int ret;

	/* 1 second or 60 second resolution? */
	if (timeout <= 255)
		resolution = 1;
	else
		resolution = 60;

	if (timeout < resolution || timeout > (resolution * 255))
		return -EINVAL;

	if (resolution == 1)
		control = data->watchdog_control | SCH56XX_WDOG_TIME_BASE_SEC;
	else
		control = data->watchdog_control & ~SCH56XX_WDOG_TIME_BASE_SEC;

	if (data->watchdog_control != control) {
		mutex_lock(data->io_lock);
		ret = sch56xx_write_virtual_reg(data->addr,
						SCH56XX_REG_WDOG_CONTROL,
						control);
		mutex_unlock(data->io_lock);
		if (ret)
			return ret;

		data->watchdog_control = control;
	}

	/*
	 * Remember new timeout value, but do not write as that (re)starts
	 * the watchdog countdown.
	 */
	data->watchdog_preset = DIV_ROUND_UP(timeout, resolution);
	wddev->timeout = data->watchdog_preset * resolution;

	return 0;
}

static int watchdog_start(struct watchdog_device *wddev)
{
	struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
	int ret;
	u8 val;

	/*
	 * The sch56xx's watchdog cannot really be started / stopped
	 * it is always running, but we can avoid the timer expiring
	 * from causing a system reset by clearing the output enable bit.
	 *
	 * The sch56xx's watchdog will set the watchdog event bit, bit 0
	 * of the second interrupt source register (at base-address + 9),
	 * when the timer expires.
	 *
	 * This will only cause a system reset if the 0-1 flank happens when
	 * output enable is true. Setting output enable after the flank will
	 * not cause a reset, nor will the timer expiring a second time.
	 * This means we must clear the watchdog event bit in case it is set.
	 *
	 * The timer may still be running (after a recent watchdog_stop) and
	 * mere milliseconds away from expiring, so the timer must be reset
	 * first!
	 */

	mutex_lock(data->io_lock);

	/* 1. Reset the watchdog countdown counter */
	ret = sch56xx_write_virtual_reg(data->addr, SCH56XX_REG_WDOG_PRESET,
					data->watchdog_preset);
	if (ret)
		goto leave;

	/* 2. Enable output */
	val = data->watchdog_output_enable | SCH56XX_WDOG_OUTPUT_ENABLE;
	ret = sch56xx_write_virtual_reg(data->addr,
					SCH56XX_REG_WDOG_OUTPUT_ENABLE, val);
	if (ret)
		goto leave;

	data->watchdog_output_enable = val;

	/* 3. Clear the watchdog event bit if set */
	val = inb(data->addr + 9);
	if (val & 0x01)
		outb(0x01, data->addr + 9);

leave:
	mutex_unlock(data->io_lock);
	return ret;
}

static int watchdog_trigger(struct watchdog_device *wddev)
{
	struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
	int ret;

	/* Reset the watchdog countdown counter */
	mutex_lock(data->io_lock);
	ret = sch56xx_write_virtual_reg(data->addr, SCH56XX_REG_WDOG_PRESET,
					data->watchdog_preset);
	mutex_unlock(data->io_lock);

	return ret;
}

static int watchdog_stop(struct watchdog_device *wddev)
{
	struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
	int ret = 0;
	u8 val;

	val = data->watchdog_output_enable & ~SCH56XX_WDOG_OUTPUT_ENABLE;
	mutex_lock(data->io_lock);
	ret = sch56xx_write_virtual_reg(data->addr,
					SCH56XX_REG_WDOG_OUTPUT_ENABLE, val);
	mutex_unlock(data->io_lock);
	if (ret)
		return ret;

	data->watchdog_output_enable = val;
	return 0;
}

static const struct watchdog_ops watchdog_ops = {
	.owner		= THIS_MODULE,
	.start		= watchdog_start,
	.stop		= watchdog_stop,
	.ping		= watchdog_trigger,
	.set_timeout	= watchdog_set_timeout,
};

void sch56xx_watchdog_register(struct device *parent, u16 addr, u32 revision,
			       struct mutex *io_lock, int check_enabled)
{
	struct sch56xx_watchdog_data *data;
	int err, control, output_enable;

	/* Cache the watchdog registers */
	mutex_lock(io_lock);
	control =
		sch56xx_read_virtual_reg(addr, SCH56XX_REG_WDOG_CONTROL);
	output_enable =
		sch56xx_read_virtual_reg(addr, SCH56XX_REG_WDOG_OUTPUT_ENABLE);
	mutex_unlock(io_lock);

	if (control < 0)
		return;
	if (output_enable < 0)
		return;
	if (check_enabled && !(output_enable & SCH56XX_WDOG_OUTPUT_ENABLE)) {
		pr_warn("Watchdog not enabled by BIOS, not registering\n");
		return;
	}

	data = devm_kzalloc(parent, sizeof(struct sch56xx_watchdog_data), GFP_KERNEL);
	if (!data)
		return;

	data->addr = addr;
	data->io_lock = io_lock;

	strscpy(data->wdinfo.identity, "sch56xx watchdog", sizeof(data->wdinfo.identity));
	data->wdinfo.firmware_version = revision;
	data->wdinfo.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT;
	if (!nowayout)
		data->wdinfo.options |= WDIOF_MAGICCLOSE;

	data->wddev.info = &data->wdinfo;
	data->wddev.ops = &watchdog_ops;
	data->wddev.parent = parent;
	data->wddev.timeout = 60;
	data->wddev.min_timeout = 1;
	data->wddev.max_timeout = 255 * 60;
	watchdog_set_nowayout(&data->wddev, nowayout);
	if (output_enable & SCH56XX_WDOG_OUTPUT_ENABLE)
		set_bit(WDOG_HW_RUNNING, &data->wddev.status);

	/* Since the watchdog uses a downcounter there is no register to read
	   the BIOS set timeout from (if any was set at all) ->
	   Choose a preset which will give us a 1 minute timeout */
	if (control & SCH56XX_WDOG_TIME_BASE_SEC)
		data->watchdog_preset = 60; /* seconds */
	else
		data->watchdog_preset = 1; /* minute */

	data->watchdog_control = control;
	data->watchdog_output_enable = output_enable;

	watchdog_set_drvdata(&data->wddev, data);
	err = devm_watchdog_register_device(parent, &data->wddev);
	if (err) {
		pr_err("Registering watchdog chardev: %d\n", err);
		devm_kfree(parent, data);
	}
}
EXPORT_SYMBOL(sch56xx_watchdog_register);

/*
 * platform dev find, add and remove functions
 */

static int __init sch56xx_find(int sioaddr, const char **name)
{
	u8 devid;
	unsigned short address;
	int err;

	err = superio_enter(sioaddr);
	if (err)
		return err;

	devid = superio_inb(sioaddr, SIO_REG_DEVID);
	switch (devid) {
	case SIO_SCH5627_ID:
		*name = "sch5627";
		break;
	case SIO_SCH5636_ID:
		*name = "sch5636";
		break;
	default:
		pr_debug("Unsupported device id: 0x%02x\n",
			 (unsigned int)devid);
		err = -ENODEV;
		goto exit;
	}

	superio_select(sioaddr, SIO_SCH56XX_LD_EM);

	if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
		pr_warn("Device not activated\n");
		err = -ENODEV;
		goto exit;
	}

	/*
	 * Warning the order of the low / high byte is the other way around
	 * as on most other superio devices!!
	 */
	address = superio_inb(sioaddr, SIO_REG_ADDR) |
		   superio_inb(sioaddr, SIO_REG_ADDR + 1) << 8;
	if (address == 0) {
		pr_warn("Base address not set\n");
		err = -ENODEV;
		goto exit;
	}
	err = address;

exit:
	superio_exit(sioaddr);
	return err;
}

static int __init sch56xx_device_add(int address, const char *name)
{
	struct resource res = {
		.start	= address,
		.end	= address + REGION_LENGTH - 1,
		.name	= name,
		.flags	= IORESOURCE_IO,
	};
	int err;

	err = acpi_check_resource_conflict(&res);
	if (err)
		return err;

	sch56xx_pdev = platform_device_register_simple(name, -1, &res, 1);

	return PTR_ERR_OR_ZERO(sch56xx_pdev);
}

static int __init sch56xx_init(void)
{
	int address;
	const char *name = NULL;

	address = sch56xx_find(0x4e, &name);
	if (address < 0)
		address = sch56xx_find(0x2e, &name);
	if (address < 0)
		return address;

	return sch56xx_device_add(address, name);
}

static void __exit sch56xx_exit(void)
{
	platform_device_unregister(sch56xx_pdev);
}

MODULE_DESCRIPTION("SMSC SCH56xx Hardware Monitoring Common Code");
MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
MODULE_LICENSE("GPL");

module_init(sch56xx_init);
module_exit(sch56xx_exit);
Commit	Line	Data
1a59d1b8	1	// SPDX-License-Identifier: GPL-2.0-or-later
28ff2f7a	2	/***************************************************************************
312869ec	3	* Copyright (C) 2010-2012 Hans de Goede <hdegoede@redhat.com> *
28ff2f7a	4	* *
28ff2f7a HG	5	***************************************************************************/
	6
	7	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
	8
	9	#include <linux/module.h>
	10	#include <linux/init.h>
	11	#include <linux/platform_device.h>
a54fe616	12	#include <linux/regmap.h>
28ff2f7a HG	13	#include <linux/err.h>
	14	#include <linux/io.h>
	15	#include <linux/acpi.h>
	16	#include <linux/delay.h>
312869ec HG	17	#include <linux/fs.h>
312869ec HG	18	#include <linux/watchdog.h>
312869ec	19	#include <linux/uaccess.h>
312869ec	20	#include <linux/slab.h>
28ff2f7a HG	21	#include "sch56xx-common.h"
28ff2f7a HG	22
d621a46d	23	/* Insmod parameters */
989c9c67 AW	24	static bool nowayout = WATCHDOG_NOWAYOUT;
989c9c67 AW	25	module_param(nowayout, bool, 0);
312869ec HG	26	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
	27	__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	28
28ff2f7a HG	29	#define SIO_SCH56XX_LD_EM 0x0C /* Embedded uController Logical Dev */
	30	#define SIO_UNLOCK_KEY 0x55 /* Key to enable Super-I/O */
	31	#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
	32
	33	#define SIO_REG_LDSEL 0x07 /* Logical device select */
	34	#define SIO_REG_DEVID 0x20 /* Device ID */
	35	#define SIO_REG_ENABLE 0x30 /* Logical device enable */
	36	#define SIO_REG_ADDR 0x66 /* Logical device address (2 bytes) */
	37
	38	#define SIO_SCH5627_ID 0xC6 /* Chipset ID */
0772a640	39	#define SIO_SCH5636_ID 0xC7 /* Chipset ID */
28ff2f7a	40
312869ec	41	#define REGION_LENGTH 10
28ff2f7a HG	42
	43	#define SCH56XX_CMD_READ 0x02
	44	#define SCH56XX_CMD_WRITE 0x03
	45
312869ec HG	46	/* Watchdog registers */
	47	#define SCH56XX_REG_WDOG_PRESET 0x58B
	48	#define SCH56XX_REG_WDOG_CONTROL 0x58C
	49	#define SCH56XX_WDOG_TIME_BASE_SEC 0x01
	50	#define SCH56XX_REG_WDOG_OUTPUT_ENABLE 0x58E
	51	#define SCH56XX_WDOG_OUTPUT_ENABLE 0x02
	52
	53	struct sch56xx_watchdog_data {
	54	u16 addr;
312869ec	55	struct mutex *io_lock;
fb551405 HG	56	struct watchdog_info wdinfo;
fb551405 HG	57	struct watchdog_device wddev;
312869ec HG	58	u8 watchdog_preset;
	59	u8 watchdog_control;
	60	u8 watchdog_output_enable;
	61	};
	62
a54fe616 AW	63	struct sch56xx_bus_context {
	64	struct mutex lock; / Used to serialize access to the mailbox registers */
	65	u16 addr;
	66	};
	67
28ff2f7a HG	68	static struct platform_device *sch56xx_pdev;
	69
	70	/* Super I/O functions */
	71	static inline int superio_inb(int base, int reg)
	72	{
	73	outb(reg, base);
	74	return inb(base + 1);
	75	}
	76
	77	static inline int superio_enter(int base)
	78	{
	79	/* Don't step on other drivers' I/O space by accident */
	80	if (!request_muxed_region(base, 2, "sch56xx")) {
	81	pr_err("I/O address 0x%04x already in use\n", base);
	82	return -EBUSY;
	83	}
	84
	85	outb(SIO_UNLOCK_KEY, base);
	86
	87	return 0;
	88	}
	89
	90	static inline void superio_select(int base, int ld)
	91	{
	92	outb(SIO_REG_LDSEL, base);
	93	outb(ld, base + 1);
	94	}
	95
	96	static inline void superio_exit(int base)
	97	{
	98	outb(SIO_LOCK_KEY, base);
	99	release_region(base, 2);
	100	}
	101
	102	static int sch56xx_send_cmd(u16 addr, u8 cmd, u16 reg, u8 v)
	103	{
	104	u8 val;
	105	int i;
	106	/*
	107	* According to SMSC for the commands we use the maximum time for
	108	* the EM to respond is 15 ms, but testing shows in practice it
	109	* responds within 15-32 reads, so we first busy poll, and if
	110	* that fails sleep a bit and try again until we are way past
	111	* the 15 ms maximum response time.
	112	*/
	113	const int max_busy_polls = 64;
	114	const int max_lazy_polls = 32;
	115
	116	/* (Optional) Write-Clear the EC to Host Mailbox Register */
	117	val = inb(addr + 1);
	118	outb(val, addr + 1);
	119
	120	/* Set Mailbox Address Pointer to first location in Region 1 */
	121	outb(0x00, addr + 2);
	122	outb(0x80, addr + 3);
	123
	124	/* Write Request Packet Header */
	125	outb(cmd, addr + 4); /* VREG Access Type read:0x02 write:0x03 */
	126	outb(0x01, addr + 5); /* # of Entries: 1 Byte (8-bit) */
	127	outb(0x04, addr + 2); /* Mailbox AP to first data entry loc. */
	128
	129	/* Write Value field */
	130	if (cmd == SCH56XX_CMD_WRITE)
	131	outb(v, addr + 4);
132
133	/* Write Address field */
134	outb(reg & 0xff, addr + 6);
135	outb(reg >> 8, addr + 7);
136
137	/* Execute the Random Access Command */
138	outb(0x01, addr); /* Write 01h to the Host-to-EC register */
139
140	/* EM Interface Polling "Algorithm" */
141	for (i = 0; i < max_busy_polls + max_lazy_polls; i++) {
142	if (i >= max_busy_polls)
799c3e1e	143	usleep_range(1000, 2000);
28ff2f7a HG	144	/* Read Interrupt source Register */
	145	val = inb(addr + 8);
	146	/* Write Clear the interrupt source bits */
	147	if (val)
	148	outb(val, addr + 8);
	149	/* Command Completed ? */
	150	if (val & 0x01)
	151	break;
	152	}
	153	if (i == max_busy_polls + max_lazy_polls) {
b55f3757 GR	154	pr_err("Max retries exceeded reading virtual register 0x%04hx (%d)\n",
b55f3757 GR	155	reg, 1);
28ff2f7a HG	156	return -EIO;
	157	}
	158
	159	/*
	160	* According to SMSC we may need to retry this, but sofar I've always
	161	* seen this succeed in 1 try.
	162	*/
	163	for (i = 0; i < max_busy_polls; i++) {
	164	/* Read EC-to-Host Register */
	165	val = inb(addr + 1);
	166	/* Command Completed ? */
	167	if (val == 0x01)
	168	break;
	169
	170	if (i == 0)
b55f3757 GR	171	pr_warn("EC reports: 0x%02x reading virtual register 0x%04hx\n",
b55f3757 GR	172	(unsigned int)val, reg);
28ff2f7a HG	173	}
28ff2f7a HG	174	if (i == max_busy_polls) {
b55f3757 GR	175	pr_err("Max retries exceeded reading virtual register 0x%04hx (%d)\n",
b55f3757 GR	176	reg, 2);
28ff2f7a HG	177	return -EIO;
	178	}
	179
	180	/*
	181	* According to the SMSC app note we should now do:
	182	*
	183	* Set Mailbox Address Pointer to first location in Region 1 *
	184	* outb(0x00, addr + 2);
	185	* outb(0x80, addr + 3);
	186	*
	187	* But if we do that things don't work, so let's not.
	188	*/
	189
	190	/* Read Value field */
	191	if (cmd == SCH56XX_CMD_READ)
	192	return inb(addr + 4);
	193
	194	return 0;
	195	}
	196
	197	int sch56xx_read_virtual_reg(u16 addr, u16 reg)
	198	{
	199	return sch56xx_send_cmd(addr, SCH56XX_CMD_READ, reg, 0);
	200	}
	201	EXPORT_SYMBOL(sch56xx_read_virtual_reg);
	202
	203	int sch56xx_write_virtual_reg(u16 addr, u16 reg, u8 val)
	204	{
	205	return sch56xx_send_cmd(addr, SCH56XX_CMD_WRITE, reg, val);
	206	}
	207	EXPORT_SYMBOL(sch56xx_write_virtual_reg);
	208
	209	int sch56xx_read_virtual_reg16(u16 addr, u16 reg)
	210	{
	211	int lsb, msb;
	212
	213	/* Read LSB first, this will cause the matching MSB to be latched */
	214	lsb = sch56xx_read_virtual_reg(addr, reg);
	215	if (lsb < 0)
	216	return lsb;
	217
	218	msb = sch56xx_read_virtual_reg(addr, reg + 1);
	219	if (msb < 0)
	220	return msb;
	221
	222	return lsb \| (msb << 8);
	223	}
	224	EXPORT_SYMBOL(sch56xx_read_virtual_reg16);
	225
	226	int sch56xx_read_virtual_reg12(u16 addr, u16 msb_reg, u16 lsn_reg,
	227	int high_nibble)
	228	{
	229	int msb, lsn;
	230
	231	/* Read MSB first, this will cause the matching LSN to be latched */
	232	msb = sch56xx_read_virtual_reg(addr, msb_reg);
	233	if (msb < 0)
	234	return msb;
	235
	236	lsn = sch56xx_read_virtual_reg(addr, lsn_reg);
	237	if (lsn < 0)
	238	return lsn;
	239
	240	if (high_nibble)
241	return (msb << 4) \| (lsn >> 4);
242	else
243	return (msb << 4) \| (lsn & 0x0f);
244	}
245	EXPORT_SYMBOL(sch56xx_read_virtual_reg12);
246
a54fe616 AW	247	/*
	248	* Regmap support
	249	*/
	250
10655bb6 AW	251	int sch56xx_regmap_read16(struct regmap map, unsigned int reg, unsigned int val)
	252	{
	253	int lsb, msb, ret;
	254
	255	/* See sch56xx_read_virtual_reg16() */
	256	ret = regmap_read(map, reg, &lsb);
	257	if (ret < 0)
	258	return ret;
	259
	260	ret = regmap_read(map, reg + 1, &msb);
	261	if (ret < 0)
	262	return ret;
	263
	264	*val = lsb \| (msb << 8);
	265
	266	return 0;
	267	}
	268	EXPORT_SYMBOL(sch56xx_regmap_read16);
	269
	270	int sch56xx_regmap_write16(struct regmap *map, unsigned int reg, unsigned int val)
	271	{
	272	int ret;
	273
	274	ret = regmap_write(map, reg, val & 0xff);
	275	if (ret < 0)
	276	return ret;
	277
	278	return regmap_write(map, reg + 1, (val >> 8) & 0xff);
	279	}
	280	EXPORT_SYMBOL(sch56xx_regmap_write16);
	281
a54fe616 AW	282	static int sch56xx_reg_write(void *context, unsigned int reg, unsigned int val)
	283	{
	284	struct sch56xx_bus_context *bus = context;
	285	int ret;
	286
	287	mutex_lock(bus->lock);
	288	ret = sch56xx_write_virtual_reg(bus->addr, (u16)reg, (u8)val);
	289	mutex_unlock(bus->lock);
	290
	291	return ret;
	292	}
	293
	294	static int sch56xx_reg_read(void context, unsigned int reg, unsigned int val)
	295	{
	296	struct sch56xx_bus_context *bus = context;
	297	int ret;
	298
	299	mutex_lock(bus->lock);
	300	ret = sch56xx_read_virtual_reg(bus->addr, (u16)reg);
	301	mutex_unlock(bus->lock);
	302
	303	if (ret < 0)
	304	return ret;
	305
	306	*val = ret;
	307
	308	return 0;
	309	}
	310
	311	static void sch56xx_free_context(void *context)
	312	{
	313	kfree(context);
	314	}
	315
	316	static const struct regmap_bus sch56xx_bus = {
	317	.reg_write = sch56xx_reg_write,
	318	.reg_read = sch56xx_reg_read,
	319	.free_context = sch56xx_free_context,
	320	.reg_format_endian_default = REGMAP_ENDIAN_LITTLE,
	321	.val_format_endian_default = REGMAP_ENDIAN_LITTLE,
	322	};
	323
	324	struct regmap devm_regmap_init_sch56xx(struct device dev, struct mutex *lock, u16 addr,
	325	const struct regmap_config *config)
	326	{
	327	struct sch56xx_bus_context *context;
	328	struct regmap *map;
	329
	330	if (config->reg_bits != 16 && config->val_bits != 8)
	331	return ERR_PTR(-EOPNOTSUPP);
	332
	333	context = kzalloc(sizeof(*context), GFP_KERNEL);
	334	if (!context)
	335	return ERR_PTR(-ENOMEM);
	336
	337	context->lock = lock;
	338	context->addr = addr;
	339
	340	map = devm_regmap_init(dev, &sch56xx_bus, context, config);
	341	if (IS_ERR(map))
	342	kfree(context);
	343
	344	return map;
	345	}
346	EXPORT_SYMBOL(devm_regmap_init_sch56xx);
347
312869ec HG	348	/*
	349	* Watchdog routines
	350	*/
	351
fb551405 HG	352	static int watchdog_set_timeout(struct watchdog_device *wddev,
fb551405 HG	353	unsigned int timeout)
312869ec	354	{
fb551405 HG	355	struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
fb551405 HG	356	unsigned int resolution;
312869ec	357	u8 control;
fb551405	358	int ret;
312869ec HG	359
	360	/* 1 second or 60 second resolution? */
	361	if (timeout <= 255)
	362	resolution = 1;
	363	else
	364	resolution = 60;
	365
	366	if (timeout < resolution \|\| timeout > (resolution * 255))
	367	return -EINVAL;
	368
312869ec HG	369	if (resolution == 1)
	370	control = data->watchdog_control \| SCH56XX_WDOG_TIME_BASE_SEC;
	371	else
	372	control = data->watchdog_control & ~SCH56XX_WDOG_TIME_BASE_SEC;
	373
	374	if (data->watchdog_control != control) {
	375	mutex_lock(data->io_lock);
	376	ret = sch56xx_write_virtual_reg(data->addr,
	377	SCH56XX_REG_WDOG_CONTROL,
	378	control);
	379	mutex_unlock(data->io_lock);
	380	if (ret)
fb551405	381	return ret;
312869ec HG	382
	383	data->watchdog_control = control;
	384	}
	385
	386	/*
	387	* Remember new timeout value, but do not write as that (re)starts
	388	* the watchdog countdown.
	389	*/
	390	data->watchdog_preset = DIV_ROUND_UP(timeout, resolution);
fb551405	391	wddev->timeout = data->watchdog_preset * resolution;
312869ec	392
fb551405	393	return 0;
312869ec HG	394	}
312869ec HG	395
fb551405	396	static int watchdog_start(struct watchdog_device *wddev)
312869ec	397	{
fb551405	398	struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
312869ec HG	399	int ret;
	400	u8 val;
	401
312869ec HG	402	/*
	403	* The sch56xx's watchdog cannot really be started / stopped
	404	* it is always running, but we can avoid the timer expiring
	405	* from causing a system reset by clearing the output enable bit.
	406	*
	407	* The sch56xx's watchdog will set the watchdog event bit, bit 0
	408	* of the second interrupt source register (at base-address + 9),
	409	* when the timer expires.
	410	*
	411	* This will only cause a system reset if the 0-1 flank happens when
	412	* output enable is true. Setting output enable after the flank will
	413	* not cause a reset, nor will the timer expiring a second time.
	414	* This means we must clear the watchdog event bit in case it is set.
	415	*
	416	* The timer may still be running (after a recent watchdog_stop) and
	417	* mere milliseconds away from expiring, so the timer must be reset
	418	* first!
	419	*/
	420
	421	mutex_lock(data->io_lock);
	422
	423	/* 1. Reset the watchdog countdown counter */
	424	ret = sch56xx_write_virtual_reg(data->addr, SCH56XX_REG_WDOG_PRESET,
	425	data->watchdog_preset);
	426	if (ret)
	427	goto leave;
	428
85a2e40c HG	429	/* 2. Enable output */
	430	val = data->watchdog_output_enable \| SCH56XX_WDOG_OUTPUT_ENABLE;
	431	ret = sch56xx_write_virtual_reg(data->addr,
	432	SCH56XX_REG_WDOG_OUTPUT_ENABLE, val);
	433	if (ret)
	434	goto leave;
312869ec	435
85a2e40c	436	data->watchdog_output_enable = val;
312869ec HG	437
	438	/* 3. Clear the watchdog event bit if set */
	439	val = inb(data->addr + 9);
	440	if (val & 0x01)
	441	outb(0x01, data->addr + 9);
	442
	443	leave:
	444	mutex_unlock(data->io_lock);
312869ec HG	445	return ret;
	446	}
	447
fb551405	448	static int watchdog_trigger(struct watchdog_device *wddev)
312869ec	449	{
fb551405	450	struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
312869ec HG	451	int ret;
312869ec HG	452
312869ec HG	453	/* Reset the watchdog countdown counter */
	454	mutex_lock(data->io_lock);
	455	ret = sch56xx_write_virtual_reg(data->addr, SCH56XX_REG_WDOG_PRESET,
	456	data->watchdog_preset);
	457	mutex_unlock(data->io_lock);
fb551405	458
312869ec HG	459	return ret;
	460	}
	461
fb551405	462	static int watchdog_stop(struct watchdog_device *wddev)
312869ec	463	{
fb551405	464	struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
312869ec HG	465	int ret = 0;
	466	u8 val;
	467
85a2e40c HG	468	val = data->watchdog_output_enable & ~SCH56XX_WDOG_OUTPUT_ENABLE;
	469	mutex_lock(data->io_lock);
	470	ret = sch56xx_write_virtual_reg(data->addr,
	471	SCH56XX_REG_WDOG_OUTPUT_ENABLE, val);
	472	mutex_unlock(data->io_lock);
	473	if (ret)
	474	return ret;
312869ec	475
85a2e40c HG	476	data->watchdog_output_enable = val;
85a2e40c HG	477	return 0;
312869ec HG	478	}
312869ec HG	479
fb551405 HG	480	static const struct watchdog_ops watchdog_ops = {
	481	.owner = THIS_MODULE,
	482	.start = watchdog_start,
	483	.stop = watchdog_stop,
	484	.ping = watchdog_trigger,
	485	.set_timeout = watchdog_set_timeout,
312869ec HG	486	};
312869ec HG	487
2be5f0d7 AW	488	void sch56xx_watchdog_register(struct device *parent, u16 addr, u32 revision,
2be5f0d7 AW	489	struct mutex *io_lock, int check_enabled)
312869ec HG	490	{
312869ec HG	491	struct sch56xx_watchdog_data *data;
fb551405	492	int err, control, output_enable;
312869ec HG	493
	494	/* Cache the watchdog registers */
	495	mutex_lock(io_lock);
	496	control =
	497	sch56xx_read_virtual_reg(addr, SCH56XX_REG_WDOG_CONTROL);
	498	output_enable =
	499	sch56xx_read_virtual_reg(addr, SCH56XX_REG_WDOG_OUTPUT_ENABLE);
	500	mutex_unlock(io_lock);
	501
	502	if (control < 0)
2be5f0d7	503	return;
312869ec	504	if (output_enable < 0)
2be5f0d7	505	return;
312869ec HG	506	if (check_enabled && !(output_enable & SCH56XX_WDOG_OUTPUT_ENABLE)) {
312869ec HG	507	pr_warn("Watchdog not enabled by BIOS, not registering\n");
2be5f0d7	508	return;
312869ec HG	509	}
312869ec HG	510
2be5f0d7	511	data = devm_kzalloc(parent, sizeof(struct sch56xx_watchdog_data), GFP_KERNEL);
312869ec	512	if (!data)
2be5f0d7	513	return;
312869ec HG	514
312869ec HG	515	data->addr = addr;
312869ec	516	data->io_lock = io_lock;
312869ec	517
6df5cba5	518	strscpy(data->wdinfo.identity, "sch56xx watchdog", sizeof(data->wdinfo.identity));
fb551405 HG	519	data->wdinfo.firmware_version = revision;
	520	data->wdinfo.options = WDIOF_KEEPALIVEPING \| WDIOF_SETTIMEOUT;
	521	if (!nowayout)
	522	data->wdinfo.options \|= WDIOF_MAGICCLOSE;
	523
	524	data->wddev.info = &data->wdinfo;
	525	data->wddev.ops = &watchdog_ops;
	526	data->wddev.parent = parent;
	527	data->wddev.timeout = 60;
	528	data->wddev.min_timeout = 1;
	529	data->wddev.max_timeout = 255 * 60;
989c9c67	530	watchdog_set_nowayout(&data->wddev, nowayout);
fb551405	531	if (output_enable & SCH56XX_WDOG_OUTPUT_ENABLE)
647d6f09	532	set_bit(WDOG_HW_RUNNING, &data->wddev.status);
fb551405 HG	533
	534	/* Since the watchdog uses a downcounter there is no register to read
	535	the BIOS set timeout from (if any was set at all) ->
	536	Choose a preset which will give us a 1 minute timeout */
	537	if (control & SCH56XX_WDOG_TIME_BASE_SEC)
	538	data->watchdog_preset = 60; /* seconds */
	539	else
	540	data->watchdog_preset = 1; /* minute */
312869ec	541
fb551405 HG	542	data->watchdog_control = control;
fb551405 HG	543	data->watchdog_output_enable = output_enable;
312869ec	544
fb551405	545	watchdog_set_drvdata(&data->wddev, data);
2be5f0d7	546	err = devm_watchdog_register_device(parent, &data->wddev);
312869ec HG	547	if (err) {
312869ec HG	548	pr_err("Registering watchdog chardev: %d\n", err);
2be5f0d7	549	devm_kfree(parent, data);
312869ec	550	}
312869ec HG	551	}
	552	EXPORT_SYMBOL(sch56xx_watchdog_register);
	553
312869ec HG	554	/*
	555	* platform dev find, add and remove functions
	556	*/
	557
313829ee	558	static int __init sch56xx_find(int sioaddr, const char **name)
28ff2f7a HG	559	{
28ff2f7a HG	560	u8 devid;
313829ee	561	unsigned short address;
28ff2f7a HG	562	int err;
	563
	564	err = superio_enter(sioaddr);
	565	if (err)
	566	return err;
	567
	568	devid = superio_inb(sioaddr, SIO_REG_DEVID);
	569	switch (devid) {
	570	case SIO_SCH5627_ID:
	571	*name = "sch5627";
	572	break;
0772a640 HG	573	case SIO_SCH5636_ID:
	574	*name = "sch5636";
	575	break;
28ff2f7a HG	576	default:
	577	pr_debug("Unsupported device id: 0x%02x\n",
	578	(unsigned int)devid);
	579	err = -ENODEV;
	580	goto exit;
	581	}
	582
	583	superio_select(sioaddr, SIO_SCH56XX_LD_EM);
	584
	585	if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
	586	pr_warn("Device not activated\n");
	587	err = -ENODEV;
	588	goto exit;
	589	}
	590
	591	/*
	592	* Warning the order of the low / high byte is the other way around
	593	* as on most other superio devices!!
	594	*/
313829ee	595	address = superio_inb(sioaddr, SIO_REG_ADDR) \|
28ff2f7a	596	superio_inb(sioaddr, SIO_REG_ADDR + 1) << 8;
313829ee	597	if (address == 0) {
28ff2f7a HG	598	pr_warn("Base address not set\n");
	599	err = -ENODEV;
	600	goto exit;
	601	}
313829ee	602	err = address;
28ff2f7a HG	603
	604	exit:
	605	superio_exit(sioaddr);
	606	return err;
	607	}
	608
313829ee	609	static int __init sch56xx_device_add(int address, const char *name)
28ff2f7a HG	610	{
	611	struct resource res = {
	612	.start = address,
	613	.end = address + REGION_LENGTH - 1,
5c1c78e0	614	.name = name,
28ff2f7a HG	615	.flags = IORESOURCE_IO,
	616	};
	617	int err;
	618
28ff2f7a HG	619	err = acpi_check_resource_conflict(&res);
28ff2f7a HG	620	if (err)
5c1c78e0	621	return err;
28ff2f7a	622
5c1c78e0	623	sch56xx_pdev = platform_device_register_simple(name, -1, &res, 1);
28ff2f7a	624
5c1c78e0	625	return PTR_ERR_OR_ZERO(sch56xx_pdev);
28ff2f7a HG	626	}
	627
	628	static int __init sch56xx_init(void)
	629	{
393935ba	630	int address;
d621a46d	631	const char *name = NULL;
313829ee GR	632
	633	address = sch56xx_find(0x4e, &name);
	634	if (address < 0)
	635	address = sch56xx_find(0x2e, &name);
	636	if (address < 0)
	637	return address;
28ff2f7a HG	638
	639	return sch56xx_device_add(address, name);
	640	}
	641
	642	static void __exit sch56xx_exit(void)
	643	{
	644	platform_device_unregister(sch56xx_pdev);
	645	}
	646
	647	MODULE_DESCRIPTION("SMSC SCH56xx Hardware Monitoring Common Code");
	648	MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
	649	MODULE_LICENSE("GPL");
	650
	651	module_init(sch56xx_init);
	652	module_exit(sch56xx_exit);