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hwmon: (pmbus/mp2975) Correct comment inside 'mp2975_read_byte_data'
[linux-2.6-block.git] / drivers / hwmon / pmbus / mp2975.c
CommitLineData
2c6fcbb2
VP		 1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Hardware monitoring driver for MPS Multi-phase Digital VR Controllers
4 *
5 * Copyright (C) 2020 Nvidia Technologies Ltd.
6 */
7
8#include <linux/err.h>
9#include <linux/i2c.h>
10#include <linux/init.h>
11#include <linux/kernel.h>
12#include <linux/module.h>
1f6f34d0 13#include <linux/of_device.h>
2c6fcbb2
VP		 14#include "pmbus.h"
15
16/* Vendor specific registers. */
17#define MP2975_MFR_APS_HYS_R2 0x0d
18#define MP2975_MFR_SLOPE_TRIM3 0x1d
19#define MP2975_MFR_VR_MULTI_CONFIG_R1 0x0d
20#define MP2975_MFR_VR_MULTI_CONFIG_R2 0x1d
21#define MP2975_MFR_APS_DECAY_ADV 0x56
22#define MP2975_MFR_DC_LOOP_CTRL 0x59
23#define MP2975_MFR_OCP_UCP_PHASE_SET 0x65
24#define MP2975_MFR_VR_CONFIG1 0x68
25#define MP2975_MFR_READ_CS1_2 0x82
26#define MP2975_MFR_READ_CS3_4 0x83
27#define MP2975_MFR_READ_CS5_6 0x84
28#define MP2975_MFR_READ_CS7_8 0x85
29#define MP2975_MFR_READ_CS9_10 0x86
30#define MP2975_MFR_READ_CS11_12 0x87
31#define MP2975_MFR_READ_IOUT_PK 0x90
32#define MP2975_MFR_READ_POUT_PK 0x91
33#define MP2975_MFR_READ_VREF_R1 0xa1
34#define MP2975_MFR_READ_VREF_R2 0xa3
35#define MP2975_MFR_OVP_TH_SET 0xe5
36#define MP2975_MFR_UVP_SET 0xe6
37
5239277e
PR		 38#define MP2973_MFR_RESO_SET 0xc7
39
2c6fcbb2
VP		 40#define MP2975_VOUT_FORMAT BIT(15)
41#define MP2975_VID_STEP_SEL_R1 BIT(4)
42#define MP2975_IMVP9_EN_R1 BIT(13)
43#define MP2975_VID_STEP_SEL_R2 BIT(3)
44#define MP2975_IMVP9_EN_R2 BIT(12)
45#define MP2975_PRT_THRES_DIV_OV_EN BIT(14)
46#define MP2975_DRMOS_KCS GENMASK(13, 12)
47#define MP2975_PROT_DEV_OV_OFF 10
48#define MP2975_PROT_DEV_OV_ON 5
49#define MP2975_SENSE_AMPL BIT(11)
50#define MP2975_SENSE_AMPL_UNIT 1
51#define MP2975_SENSE_AMPL_HALF 2
52#define MP2975_VIN_UV_LIMIT_UNIT 8
53
5239277e
PR		 54#define MP2973_VOUT_FORMAT_R1 GENMASK(7, 6)
55#define MP2973_VOUT_FORMAT_R2 GENMASK(4, 3)
56#define MP2973_VOUT_FORMAT_DIRECT_R1 BIT(7)
57#define MP2973_VOUT_FORMAT_LINEAR_R1 BIT(6)
58#define MP2973_VOUT_FORMAT_DIRECT_R2 BIT(4)
59#define MP2973_VOUT_FORMAT_LINEAR_R2 BIT(3)
60
61#define MP2973_MFR_VR_MULTI_CONFIG_R1 0x0d
62#define MP2973_MFR_VR_MULTI_CONFIG_R2 0x1d
63#define MP2973_VID_STEP_SEL_R1 BIT(4)
64#define MP2973_IMVP9_EN_R1 BIT(14)
65#define MP2973_VID_STEP_SEL_R2 BIT(3)
66#define MP2973_IMVP9_EN_R2 BIT(13)
67
45f154dc
PR		 68#define MP2973_MFR_OCP_TOTAL_SET 0x5f
69#define MP2973_OCP_TOTAL_CUR_MASK GENMASK(6, 0)
70#define MP2973_MFR_OCP_LEVEL_RES BIT(15)
71
5239277e
PR		 72#define MP2973_MFR_READ_IOUT_PK 0x90
73#define MP2973_MFR_READ_POUT_PK 0x91
74
2c6fcbb2
VP		 75#define MP2975_MAX_PHASE_RAIL1 8
76#define MP2975_MAX_PHASE_RAIL2 4
5239277e
PR		 77
78#define MP2973_MAX_PHASE_RAIL1 14
79#define MP2973_MAX_PHASE_RAIL2 6
80
81#define MP2971_MAX_PHASE_RAIL1 8
82#define MP2971_MAX_PHASE_RAIL2 3
83
2c6fcbb2
VP		 84#define MP2975_PAGE_NUM 2
85
86#define MP2975_RAIL2_FUNC (PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | \
87 PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | \
2292e2f6 88 PMBUS_HAVE_POUT | PMBUS_PHASE_VIRTUAL)
2c6fcbb2 89
1f6f34d0 90enum chips {
5239277e 91 mp2971, mp2973, mp2975
1f6f34d0
PR		 92};
93
e2c90b48
PR		 94static const int mp2975_max_phases[][MP2975_PAGE_NUM] = {
95 [mp2975] = { MP2975_MAX_PHASE_RAIL1, MP2975_MAX_PHASE_RAIL2 },
5239277e
PR		 96 [mp2973] = { MP2973_MAX_PHASE_RAIL1, MP2973_MAX_PHASE_RAIL2 },
97 [mp2971] = { MP2971_MAX_PHASE_RAIL1, MP2971_MAX_PHASE_RAIL2 },
e2c90b48
PR		 98};
99
2c6fcbb2
VP		 100struct mp2975_data {
101 struct pmbus_driver_info info;
1f6f34d0 102 enum chips chip_id;
2c6fcbb2 103 int vout_scale;
e2c90b48 104 int max_phases[MP2975_PAGE_NUM];
2c6fcbb2
VP		 105 int vid_step[MP2975_PAGE_NUM];
106 int vref[MP2975_PAGE_NUM];
107 int vref_off[MP2975_PAGE_NUM];
108 int vout_max[MP2975_PAGE_NUM];
109 int vout_ov_fixed[MP2975_PAGE_NUM];
2c6fcbb2
VP		 110 int curr_sense_gain[MP2975_PAGE_NUM];
111};
112
1f6f34d0 113static const struct i2c_device_id mp2975_id[] = {
5239277e
PR		 114 {"mp2971", mp2971},
115 {"mp2973", mp2973},
1f6f34d0
PR		 116 {"mp2975", mp2975},
117 {}
118};
119
120MODULE_DEVICE_TABLE(i2c, mp2975_id);
121
88fc1efc
PR		 122static const struct regulator_desc __maybe_unused mp2975_reg_desc[] = {
123 PMBUS_REGULATOR("vout", 0),
124 PMBUS_REGULATOR("vout", 1),
125};
126
2c6fcbb2
VP		 127#define to_mp2975_data(x) container_of(x, struct mp2975_data, info)
128
c60fe56c
KA		 129static int mp2975_read_byte_data(struct i2c_client *client, int page, int reg)
130{
131 switch (reg) {
132 case PMBUS_VOUT_MODE:
133 /*
91564418
KA		 134 * Report direct format as configured by MFR_DC_LOOP_CTRL.
135 * Unlike on MP2971/MP2973 the reported VOUT_MODE isn't automatically
136 * internally updated, but always reads as PB_VOUT_MODE_VID.
c60fe56c
KA		 137 */
138 return PB_VOUT_MODE_DIRECT;
139 default:
140 return -ENODATA;
141 }
142}
143
2c6fcbb2
VP		 144static int
145mp2975_read_word_helper(struct i2c_client *client, int page, int phase, u8 reg,
146 u16 mask)
147{
148 int ret = pmbus_read_word_data(client, page, phase, reg);
149
150 return (ret > 0) ? ret & mask : ret;
151}
152
153static int
154mp2975_vid2direct(int vrf, int val)
155{
156 switch (vrf) {
157 case vr12:
158 if (val >= 0x01)
159 return 250 + (val - 1) * 5;
160 break;
161 case vr13:
162 if (val >= 0x01)
163 return 500 + (val - 1) * 10;
164 break;
165 case imvp9:
166 if (val >= 0x01)
167 return 200 + (val - 1) * 10;
168 break;
169 default:
170 return -EINVAL;
171 }
172 return 0;
173}
174
45f154dc
PR		 175#define MAX_LIN_MANTISSA (1023 * 1000)
176#define MIN_LIN_MANTISSA (511 * 1000)
177
178/* Converts a milli-unit DIRECT value to LINEAR11 format */
179static u16 mp2975_data2reg_linear11(s64 val)
180{
181 s16 exponent = 0, mantissa;
182 bool negative = false;
183
184 /* simple case */
185 if (val == 0)
186 return 0;
187
188 /* Reduce large mantissa until it fits into 10 bit */
189 while (val >= MAX_LIN_MANTISSA && exponent < 15) {
190 exponent++;
191 val >>= 1;
192 }
193 /* Increase small mantissa to improve precision */
194 while (val < MIN_LIN_MANTISSA && exponent > -15) {
195 exponent--;
196 val <<= 1;
197 }
198
199 /* Convert mantissa from milli-units to units */
200 mantissa = clamp_val(DIV_ROUND_CLOSEST_ULL(val, 1000), 0, 0x3ff);
201
202 /* restore sign */
203 if (negative)
204 mantissa = -mantissa;
205
206 /* Convert to 5 bit exponent, 11 bit mantissa */
207 return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800);
208}
209
2c6fcbb2
VP		 210static int
211mp2975_read_phase(struct i2c_client *client, struct mp2975_data *data,
212 int page, int phase, u8 reg)
213{
214 int ph_curr, ret;
215
216 ret = pmbus_read_word_data(client, page, phase, reg);
217 if (ret < 0)
218 return ret;
219
220 if (!((phase + 1) % MP2975_PAGE_NUM))
221 ret >>= 8;
222 ret &= 0xff;
223
224 /*
225 * Output value is calculated as: (READ_CSx / 80 – 1.23) / (Kcs * Rcs)
226 * where:
227 * - Kcs is the DrMOS current sense gain of power stage, which is
228 * obtained from the register MP2975_MFR_VR_CONFIG1, bits 13-12 with
229 * the following selection of DrMOS (data->curr_sense_gain[page]):
230 * 00b - 5µA/A, 01b - 8.5µA/A, 10b - 9.7µA/A, 11b - 10µA/A.
231 * - Rcs is the internal phase current sense resistor which is constant
232 * value 1kΩ.
233 */
234 ph_curr = ret * 100 - 9800;
235
236 /*
237 * Current phase sensing, providing by the device is not accurate
238 * for the light load. This because sampling of current occurrence of
239 * bit weight has a big deviation for light load. For handling such
240 * case phase current is represented as the maximum between the value
241 * calculated above and total rail current divided by number phases.
242 */
243 ret = pmbus_read_word_data(client, page, phase, PMBUS_READ_IOUT);
244 if (ret < 0)
245 return ret;
246
247 return max_t(int, DIV_ROUND_CLOSEST(ret, data->info.phases[page]),
248 DIV_ROUND_CLOSEST(ph_curr, data->curr_sense_gain[page]));
249}
250
251static int
252mp2975_read_phases(struct i2c_client *client, struct mp2975_data *data,
253 int page, int phase)
254{
255 int ret;
256
257 if (page) {
258 switch (phase) {
259 case 0 ... 1:
260 ret = mp2975_read_phase(client, data, page, phase,
261 MP2975_MFR_READ_CS7_8);
262 break;
263 case 2 ... 3:
264 ret = mp2975_read_phase(client, data, page, phase,
265 MP2975_MFR_READ_CS9_10);
266 break;
267 case 4 ... 5:
268 ret = mp2975_read_phase(client, data, page, phase,
269 MP2975_MFR_READ_CS11_12);
270 break;
271 default:
272 return -ENODATA;
273 }
274 } else {
275 switch (phase) {
276 case 0 ... 1:
277 ret = mp2975_read_phase(client, data, page, phase,
278 MP2975_MFR_READ_CS1_2);
279 break;
280 case 2 ... 3:
281 ret = mp2975_read_phase(client, data, page, phase,
282 MP2975_MFR_READ_CS3_4);
283 break;
284 case 4 ... 5:
285 ret = mp2975_read_phase(client, data, page, phase,
286 MP2975_MFR_READ_CS5_6);
287 break;
288 case 6 ... 7:
289 ret = mp2975_read_phase(client, data, page, phase,
290 MP2975_MFR_READ_CS7_8);
291 break;
292 case 8 ... 9:
293 ret = mp2975_read_phase(client, data, page, phase,
294 MP2975_MFR_READ_CS9_10);
295 break;
296 case 10 ... 11:
297 ret = mp2975_read_phase(client, data, page, phase,
298 MP2975_MFR_READ_CS11_12);
299 break;
300 default:
301 return -ENODATA;
302 }
303 }
304 return ret;
305}
306
5239277e
PR		 307static int mp2973_read_word_data(struct i2c_client *client, int page,
308 int phase, int reg)
309{
310 const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
311 struct mp2975_data *data = to_mp2975_data(info);
312 int ret;
313
314 switch (reg) {
9da2901c
NS		 315 case PMBUS_STATUS_WORD:
316 /* MP2973 & MP2971 return PGOOD instead of PB_STATUS_POWER_GOOD_N. */
317 ret = pmbus_read_word_data(client, page, phase, reg);
318 ret ^= PB_STATUS_POWER_GOOD_N;
319 break;
5239277e
PR		 320 case PMBUS_OT_FAULT_LIMIT:
321 ret = mp2975_read_word_helper(client, page, phase, reg,
322 GENMASK(7, 0));
323 break;
324 case PMBUS_VIN_OV_FAULT_LIMIT:
325 ret = mp2975_read_word_helper(client, page, phase, reg,
326 GENMASK(7, 0));
327 if (ret < 0)
328 return ret;
329
330 ret = DIV_ROUND_CLOSEST(ret, MP2975_VIN_UV_LIMIT_UNIT);
331 break;
332 case PMBUS_VOUT_OV_FAULT_LIMIT:
333 /*
334 * MP2971 and mp2973 only supports tracking (ovp1) mode.
335 */
336 ret = mp2975_read_word_helper(client, page, phase,
337 MP2975_MFR_OVP_TH_SET,
338 GENMASK(2, 0));
339 if (ret < 0)
340 return ret;
341
342 ret = data->vout_max[page] + 50 * (ret + 1);
343 break;
344 case PMBUS_VOUT_UV_FAULT_LIMIT:
345 ret = mp2975_read_word_helper(client, page, phase, reg,
346 GENMASK(8, 0));
347 if (ret < 0)
348 return ret;
349 ret = mp2975_vid2direct(info->vrm_version[page], ret);
350 break;
351 case PMBUS_VIRT_READ_POUT_MAX:
352 ret = pmbus_read_word_data(client, page, phase,
353 MP2973_MFR_READ_POUT_PK);
354 break;
355 case PMBUS_VIRT_READ_IOUT_MAX:
356 ret = pmbus_read_word_data(client, page, phase,
357 MP2973_MFR_READ_IOUT_PK);
358 break;
45f154dc
PR		 359 case PMBUS_IOUT_OC_FAULT_LIMIT:
360 ret = mp2975_read_word_helper(client, page, phase,
361 MP2973_MFR_OCP_TOTAL_SET,
362 GENMASK(15, 0));
363 if (ret < 0)
364 return ret;
365
366 if (ret & MP2973_MFR_OCP_LEVEL_RES)
367 ret = 2 * (ret & MP2973_OCP_TOTAL_CUR_MASK);
368 else
369 ret = ret & MP2973_OCP_TOTAL_CUR_MASK;
370
371 ret = mp2975_data2reg_linear11(ret * info->phases[page] * 1000);
372 break;
5239277e
PR		 373 case PMBUS_UT_WARN_LIMIT:
374 case PMBUS_UT_FAULT_LIMIT:
375 case PMBUS_VIN_UV_WARN_LIMIT:
376 case PMBUS_VIN_UV_FAULT_LIMIT:
377 case PMBUS_VOUT_UV_WARN_LIMIT:
378 case PMBUS_VOUT_OV_WARN_LIMIT:
379 case PMBUS_VIN_OV_WARN_LIMIT:
380 case PMBUS_IIN_OC_FAULT_LIMIT:
381 case PMBUS_IOUT_OC_LV_FAULT_LIMIT:
382 case PMBUS_IOUT_OC_WARN_LIMIT:
5239277e
PR		 383 case PMBUS_IOUT_UC_FAULT_LIMIT:
384 case PMBUS_POUT_OP_FAULT_LIMIT:
385 case PMBUS_POUT_OP_WARN_LIMIT:
386 case PMBUS_PIN_OP_WARN_LIMIT:
387 return -ENXIO;
388 default:
389 return -ENODATA;
390 }
391
392 return ret;
393}
394
2c6fcbb2
VP		 395static int mp2975_read_word_data(struct i2c_client *client, int page,
396 int phase, int reg)
397{
398 const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
399 struct mp2975_data *data = to_mp2975_data(info);
400 int ret;
401
402 switch (reg) {
403 case PMBUS_OT_FAULT_LIMIT:
404 ret = mp2975_read_word_helper(client, page, phase, reg,
405 GENMASK(7, 0));
406 break;
407 case PMBUS_VIN_OV_FAULT_LIMIT:
408 ret = mp2975_read_word_helper(client, page, phase, reg,
409 GENMASK(7, 0));
410 if (ret < 0)
411 return ret;
412
413 ret = DIV_ROUND_CLOSEST(ret, MP2975_VIN_UV_LIMIT_UNIT);
414 break;
415 case PMBUS_VOUT_OV_FAULT_LIMIT:
416 /*
417 * Register provides two values for over-voltage protection
418 * threshold for fixed (ovp2) and tracking (ovp1) modes. The
419 * minimum of these two values is provided as over-voltage
420 * fault alarm.
421 */
422 ret = mp2975_read_word_helper(client, page, phase,
423 MP2975_MFR_OVP_TH_SET,
424 GENMASK(2, 0));
425 if (ret < 0)
426 return ret;
427
428 ret = min_t(int, data->vout_max[page] + 50 * (ret + 1),
429 data->vout_ov_fixed[page]);
430 break;
431 case PMBUS_VOUT_UV_FAULT_LIMIT:
432 ret = mp2975_read_word_helper(client, page, phase,
433 MP2975_MFR_UVP_SET,
434 GENMASK(2, 0));
435 if (ret < 0)
436 return ret;
437
438 ret = DIV_ROUND_CLOSEST(data->vref[page] * 10 - 50 *
439 (ret + 1) * data->vout_scale, 10);
440 break;
2c6fcbb2
VP		 441 case PMBUS_VIRT_READ_POUT_MAX:
442 ret = mp2975_read_word_helper(client, page, phase,
443 MP2975_MFR_READ_POUT_PK,
444 GENMASK(12, 0));
445 if (ret < 0)
446 return ret;
447
448 ret = DIV_ROUND_CLOSEST(ret, 4);
449 break;
450 case PMBUS_VIRT_READ_IOUT_MAX:
451 ret = mp2975_read_word_helper(client, page, phase,
452 MP2975_MFR_READ_IOUT_PK,
453 GENMASK(12, 0));
454 if (ret < 0)
455 return ret;
456
457 ret = DIV_ROUND_CLOSEST(ret, 4);
458 break;
459 case PMBUS_READ_IOUT:
460 ret = mp2975_read_phases(client, data, page, phase);
461 if (ret < 0)
462 return ret;
463
464 break;
465 case PMBUS_UT_WARN_LIMIT:
466 case PMBUS_UT_FAULT_LIMIT:
467 case PMBUS_VIN_UV_WARN_LIMIT:
468 case PMBUS_VIN_UV_FAULT_LIMIT:
469 case PMBUS_VOUT_UV_WARN_LIMIT:
470 case PMBUS_VOUT_OV_WARN_LIMIT:
471 case PMBUS_VIN_OV_WARN_LIMIT:
472 case PMBUS_IIN_OC_FAULT_LIMIT:
473 case PMBUS_IOUT_OC_LV_FAULT_LIMIT:
474 case PMBUS_IIN_OC_WARN_LIMIT:
475 case PMBUS_IOUT_OC_WARN_LIMIT:
476 case PMBUS_IOUT_OC_FAULT_LIMIT:
477 case PMBUS_IOUT_UC_FAULT_LIMIT:
478 case PMBUS_POUT_OP_FAULT_LIMIT:
479 case PMBUS_POUT_OP_WARN_LIMIT:
480 case PMBUS_PIN_OP_WARN_LIMIT:
481 return -ENXIO;
482 default:
483 return -ENODATA;
484 }
485
486 return ret;
487}
488
e2c90b48
PR		 489static int mp2975_identify_multiphase_rail2(struct i2c_client *client,
490 struct mp2975_data *data)
2c6fcbb2
VP		 491{
492 int ret;
493
494 /*
e2c90b48 495 * Identify multiphase for rail 2 - could be from 0 to data->max_phases[1].
2c6fcbb2
VP		 496 * In case phase number is zero – only page zero is supported
497 */
498 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2);
499 if (ret < 0)
500 return ret;
501
2c6fcbb2
VP		 502 ret = i2c_smbus_read_word_data(client, MP2975_MFR_VR_MULTI_CONFIG_R2);
503 if (ret < 0)
504 return ret;
505
506 ret &= GENMASK(2, 0);
e2c90b48 507 return (ret >= data->max_phases[1]) ? data->max_phases[1] : ret;
2c6fcbb2
VP		 508}
509
510static void mp2975_set_phase_rail1(struct pmbus_driver_info *info)
511{
512 int i;
513
514 for (i = 0 ; i < info->phases[0]; i++)
515 info->pfunc[i] = PMBUS_HAVE_IOUT;
516}
517
518static void
519mp2975_set_phase_rail2(struct pmbus_driver_info *info, int num_phases)
520{
521 int i;
522
523 /* Set phases for rail 2 from upper to lower. */
524 for (i = 1; i <= num_phases; i++)
525 info->pfunc[MP2975_MAX_PHASE_RAIL1 - i] = PMBUS_HAVE_IOUT;
526}
527
528static int
529mp2975_identify_multiphase(struct i2c_client *client, struct mp2975_data *data,
530 struct pmbus_driver_info *info)
531{
532 int num_phases2, ret;
533
534 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2);
535 if (ret < 0)
536 return ret;
537
e2c90b48 538 /* Identify multiphase for rail 1 - could be from 1 to data->max_phases[0]. */
2c6fcbb2
VP		 539 ret = i2c_smbus_read_word_data(client, MP2975_MFR_VR_MULTI_CONFIG_R1);
540 if (ret <= 0)
541 return ret;
542
543 info->phases[0] = ret & GENMASK(3, 0);
544
545 /*
e2c90b48 546 * The device provides a total of $n PWM pins, and can be configured
2c6fcbb2 547 * to different phase count applications for rail 1 and rail 2.
e2c90b48
PR		 548 * Rail 1 can be set to $n phases, while rail 2 can be set to less than
549 * that. When rail 1’s phase count is configured as 0, rail
2c6fcbb2
VP		 550 * 1 operates with 1-phase DCM. When rail 2 phase count is configured
551 * as 0, rail 2 is disabled.
552 */
e2c90b48 553 if (info->phases[0] > data->max_phases[0])
2c6fcbb2
VP		 554 return -EINVAL;
555
45f154dc
PR		 556 if (data->chip_id == mp2975) {
557 mp2975_set_phase_rail1(info);
558 num_phases2 = min(data->max_phases[0] - info->phases[0],
559 data->max_phases[1]);
560 if (info->phases[1] && info->phases[1] <= num_phases2)
561 mp2975_set_phase_rail2(info, num_phases2);
562 }
2c6fcbb2
VP		 563
564 return 0;
565}
566
567static int
568mp2975_identify_vid(struct i2c_client *client, struct mp2975_data *data,
569 struct pmbus_driver_info *info, u32 reg, int page,
570 u32 imvp_bit, u32 vr_bit)
571{
572 int ret;
573
574 /* Identify VID mode and step selection. */
575 ret = i2c_smbus_read_word_data(client, reg);
576 if (ret < 0)
577 return ret;
578
579 if (ret & imvp_bit) {
580 info->vrm_version[page] = imvp9;
581 data->vid_step[page] = MP2975_PROT_DEV_OV_OFF;
582 } else if (ret & vr_bit) {
583 info->vrm_version[page] = vr12;
584 data->vid_step[page] = MP2975_PROT_DEV_OV_ON;
585 } else {
586 info->vrm_version[page] = vr13;
587 data->vid_step[page] = MP2975_PROT_DEV_OV_OFF;
588 }
589
590 return 0;
591}
592
593static int
594mp2975_identify_rails_vid(struct i2c_client *client, struct mp2975_data *data,
595 struct pmbus_driver_info *info)
596{
597 int ret;
598
599 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2);
600 if (ret < 0)
601 return ret;
602
603 /* Identify VID mode for rail 1. */
604 ret = mp2975_identify_vid(client, data, info,
605 MP2975_MFR_VR_MULTI_CONFIG_R1, 0,
606 MP2975_IMVP9_EN_R1, MP2975_VID_STEP_SEL_R1);
607 if (ret < 0)
608 return ret;
609
610 /* Identify VID mode for rail 2, if connected. */
611 if (info->phases[1])
612 ret = mp2975_identify_vid(client, data, info,
613 MP2975_MFR_VR_MULTI_CONFIG_R2, 1,
614 MP2975_IMVP9_EN_R2,
615 MP2975_VID_STEP_SEL_R2);
5239277e
PR		 616
617 return ret;
618}
619
620static int
621mp2973_identify_rails_vid(struct i2c_client *client, struct mp2975_data *data,
622 struct pmbus_driver_info *info)
623{
624 int ret;
625
626 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2);
627 if (ret < 0)
628 return ret;
629
630 /* Identify VID mode for rail 1. */
631 ret = mp2975_identify_vid(client, data, info,
632 MP2973_MFR_VR_MULTI_CONFIG_R1, 0,
633 MP2973_IMVP9_EN_R1, MP2973_VID_STEP_SEL_R1);
634
635 if (ret < 0)
636 return ret;
637
638 /* Identify VID mode for rail 2, if connected. */
639 if (info->phases[1])
640 ret = mp2975_identify_vid(client, data, info,
641 MP2973_MFR_VR_MULTI_CONFIG_R2, 1,
642 MP2973_IMVP9_EN_R2,
643 MP2973_VID_STEP_SEL_R2);
644
2c6fcbb2
VP		 645 return ret;
646}
647
648static int
649mp2975_current_sense_gain_get(struct i2c_client *client,
650 struct mp2975_data *data)
651{
652 int i, ret;
653
654 /*
655 * Obtain DrMOS current sense gain of power stage from the register
656 * MP2975_MFR_VR_CONFIG1, bits 13-12. The value is selected as below:
657 * 00b - 5µA/A, 01b - 8.5µA/A, 10b - 9.7µA/A, 11b - 10µA/A. Other
658 * values are invalid.
659 */
660 for (i = 0 ; i < data->info.pages; i++) {
661 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i);
662 if (ret < 0)
663 return ret;
664 ret = i2c_smbus_read_word_data(client,
665 MP2975_MFR_VR_CONFIG1);
666 if (ret < 0)
667 return ret;
668
669 switch ((ret & MP2975_DRMOS_KCS) >> 12) {
670 case 0:
671 data->curr_sense_gain[i] = 50;
672 break;
673 case 1:
674 data->curr_sense_gain[i] = 85;
675 break;
676 case 2:
677 data->curr_sense_gain[i] = 97;
678 break;
679 default:
680 data->curr_sense_gain[i] = 100;
681 break;
682 }
683 }
684
685 return 0;
686}
687
688static int
689mp2975_vref_get(struct i2c_client *client, struct mp2975_data *data,
690 struct pmbus_driver_info *info)
691{
692 int ret;
693
694 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 3);
695 if (ret < 0)
696 return ret;
697
698 /* Get voltage reference value for rail 1. */
699 ret = i2c_smbus_read_word_data(client, MP2975_MFR_READ_VREF_R1);
700 if (ret < 0)
701 return ret;
702
703 data->vref[0] = ret * data->vid_step[0];
704
705 /* Get voltage reference value for rail 2, if connected. */
706 if (data->info.pages == MP2975_PAGE_NUM) {
707 ret = i2c_smbus_read_word_data(client, MP2975_MFR_READ_VREF_R2);
708 if (ret < 0)
709 return ret;
710
711 data->vref[1] = ret * data->vid_step[1];
712 }
713 return 0;
714}
715
716static int
717mp2975_vref_offset_get(struct i2c_client *client, struct mp2975_data *data,
718 int page)
719{
720 int ret;
721
722 ret = i2c_smbus_read_word_data(client, MP2975_MFR_OVP_TH_SET);
723 if (ret < 0)
724 return ret;
725
726 switch ((ret & GENMASK(5, 3)) >> 3) {
727 case 1:
728 data->vref_off[page] = 140;
729 break;
730 case 2:
731 data->vref_off[page] = 220;
732 break;
733 case 4:
734 data->vref_off[page] = 400;
735 break;
736 default:
737 return -EINVAL;
738 }
739 return 0;
740}
741
742static int
743mp2975_vout_max_get(struct i2c_client *client, struct mp2975_data *data,
744 struct pmbus_driver_info *info, int page)
745{
746 int ret;
747
748 /* Get maximum reference voltage of VID-DAC in VID format. */
749 ret = i2c_smbus_read_word_data(client, PMBUS_VOUT_MAX);
750 if (ret < 0)
751 return ret;
752
753 data->vout_max[page] = mp2975_vid2direct(info->vrm_version[page], ret &
754 GENMASK(8, 0));
755 return 0;
756}
757
758static int
1feb31e8
PR		 759mp2975_set_vout_format(struct i2c_client *client,
760 struct mp2975_data *data, int page)
2c6fcbb2 761{
5239277e 762 int ret, i;
2c6fcbb2 763
1feb31e8 764 /* Enable DIRECT VOUT format 1mV/LSB */
5239277e
PR		 765 if (data->chip_id == mp2975) {
766 ret = i2c_smbus_read_word_data(client, MP2975_MFR_DC_LOOP_CTRL);
767 if (ret < 0)
768 return ret;
769 if (ret & MP2975_VOUT_FORMAT) {
770 ret &= ~MP2975_VOUT_FORMAT;
771 ret = i2c_smbus_write_word_data(client, MP2975_MFR_DC_LOOP_CTRL, ret);
772 }
773 } else {
774 ret = i2c_smbus_read_word_data(client, MP2973_MFR_RESO_SET);
775 if (ret < 0)
776 return ret;
777 i = ret;
778
779 if (page == 0) {
780 i &= ~MP2973_VOUT_FORMAT_R1;
781 i |= MP2973_VOUT_FORMAT_DIRECT_R1;
782 } else {
783 i &= ~MP2973_VOUT_FORMAT_R2;
784 i |= MP2973_VOUT_FORMAT_DIRECT_R2;
785 }
786 if (i != ret)
787 ret = i2c_smbus_write_word_data(client, MP2973_MFR_RESO_SET, i);
1feb31e8
PR		 788 }
789 return ret;
2c6fcbb2
VP		 790}
791
792static int
793mp2975_vout_ov_scale_get(struct i2c_client *client, struct mp2975_data *data,
794 struct pmbus_driver_info *info)
795{
796 int thres_dev, sense_ampl, ret;
797
798 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 0);
799 if (ret < 0)
800 return ret;
801
802 /*
803 * Get divider for over- and under-voltage protection thresholds
804 * configuration from the Advanced Options of Auto Phase Shedding and
805 * decay register.
806 */
807 ret = i2c_smbus_read_word_data(client, MP2975_MFR_APS_DECAY_ADV);
808 if (ret < 0)
809 return ret;
810 thres_dev = ret & MP2975_PRT_THRES_DIV_OV_EN ? MP2975_PROT_DEV_OV_ON :
b4389ee5 811 MP2975_PROT_DEV_OV_OFF;
2c6fcbb2
VP		 812
813 /* Select the gain of remote sense amplifier. */
814 ret = i2c_smbus_read_word_data(client, PMBUS_VOUT_SCALE_LOOP);
815 if (ret < 0)
816 return ret;
817 sense_ampl = ret & MP2975_SENSE_AMPL ? MP2975_SENSE_AMPL_HALF :
818 MP2975_SENSE_AMPL_UNIT;
819
820 data->vout_scale = sense_ampl * thres_dev;
821
822 return 0;
823}
824
825static int
826mp2975_vout_per_rail_config_get(struct i2c_client *client,
827 struct mp2975_data *data,
828 struct pmbus_driver_info *info)
829{
830 int i, ret;
831
832 for (i = 0; i < data->info.pages; i++) {
833 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i);
834 if (ret < 0)
5239277e 835 continue;
2c6fcbb2 836
5239277e
PR		 837 /* Set VOUT format for READ_VOUT command : direct. */
838 ret = mp2975_set_vout_format(client, data, i);
2c6fcbb2
VP		 839 if (ret < 0)
840 return ret;
841
842 /* Obtain maximum voltage values. */
843 ret = mp2975_vout_max_get(client, data, info, i);
844 if (ret < 0)
845 return ret;
846
5239277e
PR		 847 /* Skip if reading Vref is unsupported */
848 if (data->chip_id != mp2975)
849 continue;
850
851 /* Obtain voltage reference offsets. */
852 ret = mp2975_vref_offset_get(client, data, i);
2c6fcbb2
VP		 853 if (ret < 0)
854 return ret;
855
856 /*
857 * Set over-voltage fixed value. Thresholds are provided as
858 * fixed value, and tracking value. The minimum of them are
859 * exposed as over-voltage critical threshold.
860 */
861 data->vout_ov_fixed[i] = data->vref[i] +
862 DIV_ROUND_CLOSEST(data->vref_off[i] *
863 data->vout_scale,
864 10);
865 }
866
867 return 0;
868}
869
870static struct pmbus_driver_info mp2975_info = {
871 .pages = 1,
872 .format[PSC_VOLTAGE_IN] = linear,
873 .format[PSC_VOLTAGE_OUT] = direct,
874 .format[PSC_TEMPERATURE] = direct,
875 .format[PSC_CURRENT_IN] = linear,
876 .format[PSC_CURRENT_OUT] = direct,
877 .format[PSC_POWER] = direct,
878 .m[PSC_TEMPERATURE] = 1,
879 .m[PSC_VOLTAGE_OUT] = 1,
880 .R[PSC_VOLTAGE_OUT] = 3,
881 .m[PSC_CURRENT_OUT] = 1,
882 .m[PSC_POWER] = 1,
883 .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
884 PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
885 PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_POUT |
886 PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT | PMBUS_PHASE_VIRTUAL,
c60fe56c 887 .read_byte_data = mp2975_read_byte_data,
2c6fcbb2 888 .read_word_data = mp2975_read_word_data,
88fc1efc
PR		 889#if IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR)
890 .num_regulators = 1,
891 .reg_desc = mp2975_reg_desc,
892#endif
2c6fcbb2
VP		 893};
894
5239277e
PR		 895static struct pmbus_driver_info mp2973_info = {
896 .pages = 1,
897 .format[PSC_VOLTAGE_IN] = linear,
898 .format[PSC_VOLTAGE_OUT] = direct,
899 .format[PSC_TEMPERATURE] = linear,
900 .format[PSC_CURRENT_IN] = linear,
901 .format[PSC_CURRENT_OUT] = linear,
902 .format[PSC_POWER] = linear,
903 .m[PSC_VOLTAGE_OUT] = 1,
904 .R[PSC_VOLTAGE_OUT] = 3,
905 .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
906 PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
907 PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_POUT |
908 PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT,
909 .read_word_data = mp2973_read_word_data,
88fc1efc
PR		 910#if IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR)
911 .num_regulators = 1,
912 .reg_desc = mp2975_reg_desc,
913#endif
5239277e
PR		 914};
915
2c6fcbb2
VP		 916static int mp2975_probe(struct i2c_client *client)
917{
918 struct pmbus_driver_info *info;
919 struct mp2975_data *data;
920 int ret;
921
922 data = devm_kzalloc(&client->dev, sizeof(struct mp2975_data),
923 GFP_KERNEL);
924 if (!data)
925 return -ENOMEM;
926
1f6f34d0
PR		 927 if (client->dev.of_node)
928 data->chip_id = (enum chips)(unsigned long)of_device_get_match_data(&client->dev);
929 else
930 data->chip_id = i2c_match_id(mp2975_id, client)->driver_data;
931
e2c90b48
PR		 932 memcpy(data->max_phases, mp2975_max_phases[data->chip_id],
933 sizeof(data->max_phases));
934
5239277e
PR		 935 if (data->chip_id == mp2975)
936 memcpy(&data->info, &mp2975_info, sizeof(*info));
937 else
938 memcpy(&data->info, &mp2973_info, sizeof(*info));
939
2c6fcbb2
VP		 940 info = &data->info;
941
942 /* Identify multiphase configuration for rail 2. */
e2c90b48 943 ret = mp2975_identify_multiphase_rail2(client, data);
2c6fcbb2
VP		 944 if (ret < 0)
945 return ret;
946
947 if (ret) {
948 /* Two rails are connected. */
949 data->info.pages = MP2975_PAGE_NUM;
950 data->info.phases[1] = ret;
951 data->info.func[1] = MP2975_RAIL2_FUNC;
88fc1efc
PR		 952 if (IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR))
953 data->info.num_regulators = MP2975_PAGE_NUM;
2c6fcbb2
VP		 954 }
955
45f154dc
PR		 956 /* Identify multiphase configuration. */
957 ret = mp2975_identify_multiphase(client, data, info);
958 if (ret)
959 return ret;
2c6fcbb2 960
45f154dc 961 if (data->chip_id == mp2975) {
5239277e
PR		 962 /* Identify VID setting per rail. */
963 ret = mp2975_identify_rails_vid(client, data, info);
964 if (ret < 0)
965 return ret;
2c6fcbb2 966
5239277e
PR		 967 /* Obtain current sense gain of power stage. */
968 ret = mp2975_current_sense_gain_get(client, data);
969 if (ret)
970 return ret;
2c6fcbb2 971
5239277e
PR		 972 /* Obtain voltage reference values. */
973 ret = mp2975_vref_get(client, data, info);
974 if (ret)
975 return ret;
2c6fcbb2 976
5239277e
PR		 977 /* Obtain vout over-voltage scales. */
978 ret = mp2975_vout_ov_scale_get(client, data, info);
979 if (ret < 0)
980 return ret;
981 } else {
982 /* Identify VID setting per rail. */
983 ret = mp2973_identify_rails_vid(client, data, info);
984 if (ret < 0)
985 return ret;
986 }
2c6fcbb2
VP		 987
988 /* Obtain offsets, maximum and format for vout. */
989 ret = mp2975_vout_per_rail_config_get(client, data, info);
990 if (ret)
991 return ret;
992
993 return pmbus_do_probe(client, info);
994}
995
2c6fcbb2 996static const struct of_device_id __maybe_unused mp2975_of_match[] = {
5239277e
PR		 997 {.compatible = "mps,mp2971", .data = (void *)mp2971},
998 {.compatible = "mps,mp2973", .data = (void *)mp2973},
1f6f34d0 999 {.compatible = "mps,mp2975", .data = (void *)mp2975},
2c6fcbb2
VP		 1000 {}
1001};
1002MODULE_DEVICE_TABLE(of, mp2975_of_match);
1003
1004static struct i2c_driver mp2975_driver = {
1005 .driver = {
1006 .name = "mp2975",
1007 .of_match_table = of_match_ptr(mp2975_of_match),
1008 },
1975d167 1009 .probe = mp2975_probe,
2c6fcbb2
VP		 1010 .id_table = mp2975_id,
1011};
1012
1013module_i2c_driver(mp2975_driver);
1014
1015MODULE_AUTHOR("Vadim Pasternak <vadimp@nvidia.com>");
1016MODULE_DESCRIPTION("PMBus driver for MPS MP2975 device");
1017MODULE_LICENSE("GPL");
b94ca77e 1018MODULE_IMPORT_NS(PMBUS);
Linux 6.x block layer and io_uring tree(s)