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1802d0be | 1 | // SPDX-License-Identifier: GPL-2.0-only |
ba224e2c JD |
2 | /* |
3 | * pc87427.c - hardware monitoring driver for the | |
4 | * National Semiconductor PC87427 Super-I/O chip | |
7c81c60f | 5 | * Copyright (C) 2006, 2008, 2010 Jean Delvare <jdelvare@suse.de> |
ba224e2c | 6 | * |
ba224e2c JD |
7 | * Supports the following chips: |
8 | * | |
9 | * Chip #vin #fan #pwm #temp devid | |
008e5f33 | 10 | * PC87427 - 8 4 6 0xF2 |
ba224e2c JD |
11 | * |
12 | * This driver assumes that no more than one chip is present. | |
008e5f33 JD |
13 | * Only fans are fully supported so far. Temperatures are in read-only |
14 | * mode, and voltages aren't supported at all. | |
ba224e2c JD |
15 | */ |
16 | ||
5e24e0c3 JP |
17 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
18 | ||
ba224e2c JD |
19 | #include <linux/module.h> |
20 | #include <linux/init.h> | |
21 | #include <linux/slab.h> | |
22 | #include <linux/jiffies.h> | |
23 | #include <linux/platform_device.h> | |
24 | #include <linux/hwmon.h> | |
25 | #include <linux/hwmon-sysfs.h> | |
26 | #include <linux/err.h> | |
27 | #include <linux/mutex.h> | |
28 | #include <linux/sysfs.h> | |
ce7ee4e8 | 29 | #include <linux/ioport.h> |
b9acb64a | 30 | #include <linux/acpi.h> |
6055fae8 | 31 | #include <linux/io.h> |
ba224e2c | 32 | |
67b671bc JD |
33 | static unsigned short force_id; |
34 | module_param(force_id, ushort, 0); | |
35 | MODULE_PARM_DESC(force_id, "Override the detected device ID"); | |
36 | ||
ba224e2c JD |
37 | static struct platform_device *pdev; |
38 | ||
39 | #define DRVNAME "pc87427" | |
40 | ||
36564efa GR |
41 | /* |
42 | * The lock mutex protects both the I/O accesses (needed because the | |
43 | * device is using banked registers) and the register cache (needed to keep | |
44 | * the data in the registers and the cache in sync at any time). | |
45 | */ | |
ba224e2c | 46 | struct pc87427_data { |
1beeffe4 | 47 | struct device *hwmon_dev; |
ba224e2c JD |
48 | struct mutex lock; |
49 | int address[2]; | |
50 | const char *name; | |
51 | ||
52 | unsigned long last_updated; /* in jiffies */ | |
53 | u8 fan_enabled; /* bit vector */ | |
54 | u16 fan[8]; /* register values */ | |
55 | u16 fan_min[8]; /* register values */ | |
56 | u8 fan_status[8]; /* register values */ | |
328716bc JD |
57 | |
58 | u8 pwm_enabled; /* bit vector */ | |
59 | u8 pwm_auto_ok; /* bit vector */ | |
60 | u8 pwm_enable[4]; /* register values */ | |
61 | u8 pwm[4]; /* register values */ | |
008e5f33 JD |
62 | |
63 | u8 temp_enabled; /* bit vector */ | |
64 | s16 temp[6]; /* register values */ | |
65 | s8 temp_min[6]; /* register values */ | |
66 | s8 temp_max[6]; /* register values */ | |
67 | s8 temp_crit[6]; /* register values */ | |
68 | u8 temp_status[6]; /* register values */ | |
69 | u8 temp_type[6]; /* register values */ | |
ba224e2c JD |
70 | }; |
71 | ||
4e7d99e1 | 72 | struct pc87427_sio_data { |
9d32df19 | 73 | unsigned short address[2]; |
4e7d99e1 | 74 | u8 has_fanin; |
328716bc | 75 | u8 has_fanout; |
4e7d99e1 JD |
76 | }; |
77 | ||
ba224e2c JD |
78 | /* |
79 | * Super-I/O registers and operations | |
80 | */ | |
81 | ||
82 | #define SIOREG_LDSEL 0x07 /* Logical device select */ | |
83 | #define SIOREG_DEVID 0x20 /* Device ID */ | |
4e7d99e1 JD |
84 | #define SIOREG_CF2 0x22 /* Configuration 2 */ |
85 | #define SIOREG_CF3 0x23 /* Configuration 3 */ | |
86 | #define SIOREG_CF4 0x24 /* Configuration 4 */ | |
328716bc | 87 | #define SIOREG_CF5 0x25 /* Configuration 5 */ |
4e7d99e1 | 88 | #define SIOREG_CFB 0x2B /* Configuration B */ |
328716bc | 89 | #define SIOREG_CFC 0x2C /* Configuration C */ |
4e7d99e1 | 90 | #define SIOREG_CFD 0x2D /* Configuration D */ |
ba224e2c JD |
91 | #define SIOREG_ACT 0x30 /* Device activation */ |
92 | #define SIOREG_MAP 0x50 /* I/O or memory mapping */ | |
93 | #define SIOREG_IOBASE 0x60 /* I/O base address */ | |
94 | ||
95 | static const u8 logdev[2] = { 0x09, 0x14 }; | |
96 | static const char *logdev_str[2] = { DRVNAME " FMC", DRVNAME " HMC" }; | |
97 | #define LD_FAN 0 | |
98 | #define LD_IN 1 | |
99 | #define LD_TEMP 1 | |
100 | ||
755a9b0f GR |
101 | static inline int superio_enter(int sioaddr) |
102 | { | |
103 | if (!request_muxed_region(sioaddr, 2, DRVNAME)) | |
104 | return -EBUSY; | |
105 | return 0; | |
106 | } | |
107 | ||
ba224e2c JD |
108 | static inline void superio_outb(int sioaddr, int reg, int val) |
109 | { | |
110 | outb(reg, sioaddr); | |
111 | outb(val, sioaddr + 1); | |
112 | } | |
113 | ||
114 | static inline int superio_inb(int sioaddr, int reg) | |
115 | { | |
116 | outb(reg, sioaddr); | |
117 | return inb(sioaddr + 1); | |
118 | } | |
119 | ||
120 | static inline void superio_exit(int sioaddr) | |
121 | { | |
122 | outb(0x02, sioaddr); | |
123 | outb(0x02, sioaddr + 1); | |
755a9b0f | 124 | release_region(sioaddr, 2); |
ba224e2c JD |
125 | } |
126 | ||
127 | /* | |
128 | * Logical devices | |
129 | */ | |
130 | ||
131 | #define REGION_LENGTH 32 | |
132 | #define PC87427_REG_BANK 0x0f | |
133 | #define BANK_FM(nr) (nr) | |
134 | #define BANK_FT(nr) (0x08 + (nr)) | |
135 | #define BANK_FC(nr) (0x10 + (nr) * 2) | |
008e5f33 JD |
136 | #define BANK_TM(nr) (nr) |
137 | #define BANK_VM(nr) (0x08 + (nr)) | |
ba224e2c JD |
138 | |
139 | /* | |
140 | * I/O access functions | |
141 | */ | |
142 | ||
143 | /* ldi is the logical device index */ | |
144 | static inline int pc87427_read8(struct pc87427_data *data, u8 ldi, u8 reg) | |
145 | { | |
146 | return inb(data->address[ldi] + reg); | |
147 | } | |
148 | ||
149 | /* Must be called with data->lock held, except during init */ | |
150 | static inline int pc87427_read8_bank(struct pc87427_data *data, u8 ldi, | |
151 | u8 bank, u8 reg) | |
152 | { | |
153 | outb(bank, data->address[ldi] + PC87427_REG_BANK); | |
154 | return inb(data->address[ldi] + reg); | |
155 | } | |
156 | ||
157 | /* Must be called with data->lock held, except during init */ | |
158 | static inline void pc87427_write8_bank(struct pc87427_data *data, u8 ldi, | |
159 | u8 bank, u8 reg, u8 value) | |
160 | { | |
161 | outb(bank, data->address[ldi] + PC87427_REG_BANK); | |
162 | outb(value, data->address[ldi] + reg); | |
163 | } | |
164 | ||
165 | /* | |
166 | * Fan registers and conversions | |
167 | */ | |
168 | ||
169 | /* fan data registers are 16-bit wide */ | |
170 | #define PC87427_REG_FAN 0x12 | |
171 | #define PC87427_REG_FAN_MIN 0x14 | |
172 | #define PC87427_REG_FAN_STATUS 0x10 | |
173 | ||
174 | #define FAN_STATUS_STALL (1 << 3) | |
175 | #define FAN_STATUS_LOSPD (1 << 1) | |
176 | #define FAN_STATUS_MONEN (1 << 0) | |
177 | ||
36564efa GR |
178 | /* |
179 | * Dedicated function to read all registers related to a given fan input. | |
180 | * This saves us quite a few locks and bank selections. | |
181 | * Must be called with data->lock held. | |
182 | * nr is from 0 to 7 | |
183 | */ | |
ba224e2c JD |
184 | static void pc87427_readall_fan(struct pc87427_data *data, u8 nr) |
185 | { | |
186 | int iobase = data->address[LD_FAN]; | |
187 | ||
188 | outb(BANK_FM(nr), iobase + PC87427_REG_BANK); | |
189 | data->fan[nr] = inw(iobase + PC87427_REG_FAN); | |
190 | data->fan_min[nr] = inw(iobase + PC87427_REG_FAN_MIN); | |
191 | data->fan_status[nr] = inb(iobase + PC87427_REG_FAN_STATUS); | |
192 | /* Clear fan alarm bits */ | |
193 | outb(data->fan_status[nr], iobase + PC87427_REG_FAN_STATUS); | |
194 | } | |
195 | ||
36564efa GR |
196 | /* |
197 | * The 2 LSB of fan speed registers are used for something different. | |
198 | * The actual 2 LSB of the measurements are not available. | |
199 | */ | |
ba224e2c JD |
200 | static inline unsigned long fan_from_reg(u16 reg) |
201 | { | |
202 | reg &= 0xfffc; | |
203 | if (reg == 0x0000 || reg == 0xfffc) | |
204 | return 0; | |
205 | return 5400000UL / reg; | |
206 | } | |
207 | ||
208 | /* The 2 LSB of the fan speed limit registers are not significant. */ | |
209 | static inline u16 fan_to_reg(unsigned long val) | |
210 | { | |
211 | if (val < 83UL) | |
212 | return 0xffff; | |
213 | if (val >= 1350000UL) | |
214 | return 0x0004; | |
215 | return ((1350000UL + val / 2) / val) << 2; | |
216 | } | |
217 | ||
328716bc JD |
218 | /* |
219 | * PWM registers and conversions | |
220 | */ | |
221 | ||
222 | #define PC87427_REG_PWM_ENABLE 0x10 | |
223 | #define PC87427_REG_PWM_DUTY 0x12 | |
224 | ||
225 | #define PWM_ENABLE_MODE_MASK (7 << 4) | |
226 | #define PWM_ENABLE_CTLEN (1 << 0) | |
227 | ||
228 | #define PWM_MODE_MANUAL (0 << 4) | |
229 | #define PWM_MODE_AUTO (1 << 4) | |
230 | #define PWM_MODE_OFF (2 << 4) | |
231 | #define PWM_MODE_ON (7 << 4) | |
232 | ||
36564efa GR |
233 | /* |
234 | * Dedicated function to read all registers related to a given PWM output. | |
235 | * This saves us quite a few locks and bank selections. | |
236 | * Must be called with data->lock held. | |
237 | * nr is from 0 to 3 | |
238 | */ | |
328716bc JD |
239 | static void pc87427_readall_pwm(struct pc87427_data *data, u8 nr) |
240 | { | |
241 | int iobase = data->address[LD_FAN]; | |
242 | ||
243 | outb(BANK_FC(nr), iobase + PC87427_REG_BANK); | |
244 | data->pwm_enable[nr] = inb(iobase + PC87427_REG_PWM_ENABLE); | |
245 | data->pwm[nr] = inb(iobase + PC87427_REG_PWM_DUTY); | |
246 | } | |
247 | ||
248 | static inline int pwm_enable_from_reg(u8 reg) | |
249 | { | |
250 | switch (reg & PWM_ENABLE_MODE_MASK) { | |
251 | case PWM_MODE_ON: | |
252 | return 0; | |
253 | case PWM_MODE_MANUAL: | |
254 | case PWM_MODE_OFF: | |
255 | return 1; | |
256 | case PWM_MODE_AUTO: | |
257 | return 2; | |
258 | default: | |
259 | return -EPROTO; | |
260 | } | |
261 | } | |
262 | ||
263 | static inline u8 pwm_enable_to_reg(unsigned long val, u8 pwmval) | |
264 | { | |
265 | switch (val) { | |
266 | default: | |
267 | return PWM_MODE_ON; | |
268 | case 1: | |
269 | return pwmval ? PWM_MODE_MANUAL : PWM_MODE_OFF; | |
270 | case 2: | |
271 | return PWM_MODE_AUTO; | |
272 | } | |
273 | } | |
274 | ||
008e5f33 JD |
275 | /* |
276 | * Temperature registers and conversions | |
277 | */ | |
278 | ||
279 | #define PC87427_REG_TEMP_STATUS 0x10 | |
280 | #define PC87427_REG_TEMP 0x14 | |
281 | #define PC87427_REG_TEMP_MAX 0x18 | |
282 | #define PC87427_REG_TEMP_MIN 0x19 | |
283 | #define PC87427_REG_TEMP_CRIT 0x1a | |
284 | #define PC87427_REG_TEMP_TYPE 0x1d | |
285 | ||
286 | #define TEMP_STATUS_CHANEN (1 << 0) | |
287 | #define TEMP_STATUS_LOWFLG (1 << 1) | |
288 | #define TEMP_STATUS_HIGHFLG (1 << 2) | |
289 | #define TEMP_STATUS_CRITFLG (1 << 3) | |
290 | #define TEMP_STATUS_SENSERR (1 << 5) | |
291 | #define TEMP_TYPE_MASK (3 << 5) | |
292 | ||
293 | #define TEMP_TYPE_THERMISTOR (1 << 5) | |
294 | #define TEMP_TYPE_REMOTE_DIODE (2 << 5) | |
295 | #define TEMP_TYPE_LOCAL_DIODE (3 << 5) | |
296 | ||
36564efa GR |
297 | /* |
298 | * Dedicated function to read all registers related to a given temperature | |
299 | * input. This saves us quite a few locks and bank selections. | |
300 | * Must be called with data->lock held. | |
301 | * nr is from 0 to 5 | |
302 | */ | |
008e5f33 JD |
303 | static void pc87427_readall_temp(struct pc87427_data *data, u8 nr) |
304 | { | |
305 | int iobase = data->address[LD_TEMP]; | |
306 | ||
307 | outb(BANK_TM(nr), iobase + PC87427_REG_BANK); | |
308 | data->temp[nr] = le16_to_cpu(inw(iobase + PC87427_REG_TEMP)); | |
309 | data->temp_max[nr] = inb(iobase + PC87427_REG_TEMP_MAX); | |
310 | data->temp_min[nr] = inb(iobase + PC87427_REG_TEMP_MIN); | |
311 | data->temp_crit[nr] = inb(iobase + PC87427_REG_TEMP_CRIT); | |
312 | data->temp_type[nr] = inb(iobase + PC87427_REG_TEMP_TYPE); | |
313 | data->temp_status[nr] = inb(iobase + PC87427_REG_TEMP_STATUS); | |
314 | /* Clear fan alarm bits */ | |
315 | outb(data->temp_status[nr], iobase + PC87427_REG_TEMP_STATUS); | |
316 | } | |
317 | ||
318 | static inline unsigned int temp_type_from_reg(u8 reg) | |
319 | { | |
320 | switch (reg & TEMP_TYPE_MASK) { | |
321 | case TEMP_TYPE_THERMISTOR: | |
322 | return 4; | |
323 | case TEMP_TYPE_REMOTE_DIODE: | |
324 | case TEMP_TYPE_LOCAL_DIODE: | |
325 | return 3; | |
326 | default: | |
327 | return 0; | |
328 | } | |
329 | } | |
330 | ||
36564efa GR |
331 | /* |
332 | * We assume 8-bit thermal sensors; 9-bit thermal sensors are possible | |
333 | * too, but I have no idea how to figure out when they are used. | |
334 | */ | |
008e5f33 JD |
335 | static inline long temp_from_reg(s16 reg) |
336 | { | |
337 | return reg * 1000 / 256; | |
338 | } | |
339 | ||
340 | static inline long temp_from_reg8(s8 reg) | |
341 | { | |
342 | return reg * 1000; | |
343 | } | |
344 | ||
ba224e2c JD |
345 | /* |
346 | * Data interface | |
347 | */ | |
348 | ||
349 | static struct pc87427_data *pc87427_update_device(struct device *dev) | |
350 | { | |
351 | struct pc87427_data *data = dev_get_drvdata(dev); | |
352 | int i; | |
353 | ||
354 | mutex_lock(&data->lock); | |
355 | if (!time_after(jiffies, data->last_updated + HZ) | |
356 | && data->last_updated) | |
357 | goto done; | |
358 | ||
359 | /* Fans */ | |
360 | for (i = 0; i < 8; i++) { | |
361 | if (!(data->fan_enabled & (1 << i))) | |
362 | continue; | |
363 | pc87427_readall_fan(data, i); | |
364 | } | |
328716bc JD |
365 | |
366 | /* PWM outputs */ | |
367 | for (i = 0; i < 4; i++) { | |
368 | if (!(data->pwm_enabled & (1 << i))) | |
369 | continue; | |
370 | pc87427_readall_pwm(data, i); | |
371 | } | |
372 | ||
008e5f33 JD |
373 | /* Temperature channels */ |
374 | for (i = 0; i < 6; i++) { | |
375 | if (!(data->temp_enabled & (1 << i))) | |
376 | continue; | |
377 | pc87427_readall_temp(data, i); | |
378 | } | |
379 | ||
ba224e2c JD |
380 | data->last_updated = jiffies; |
381 | ||
382 | done: | |
383 | mutex_unlock(&data->lock); | |
384 | return data; | |
385 | } | |
386 | ||
86b9f565 GR |
387 | static ssize_t fan_input_show(struct device *dev, |
388 | struct device_attribute *devattr, char *buf) | |
ba224e2c | 389 | { |
ba224e2c | 390 | struct pc87427_data *data = pc87427_update_device(dev); |
0d22d583 | 391 | int nr = to_sensor_dev_attr(devattr)->index; |
ba224e2c JD |
392 | |
393 | return sprintf(buf, "%lu\n", fan_from_reg(data->fan[nr])); | |
394 | } | |
395 | ||
86b9f565 GR |
396 | static ssize_t fan_min_show(struct device *dev, |
397 | struct device_attribute *devattr, char *buf) | |
ba224e2c | 398 | { |
ba224e2c | 399 | struct pc87427_data *data = pc87427_update_device(dev); |
0d22d583 | 400 | int nr = to_sensor_dev_attr(devattr)->index; |
ba224e2c JD |
401 | |
402 | return sprintf(buf, "%lu\n", fan_from_reg(data->fan_min[nr])); | |
403 | } | |
404 | ||
86b9f565 GR |
405 | static ssize_t fan_alarm_show(struct device *dev, |
406 | struct device_attribute *devattr, char *buf) | |
ba224e2c | 407 | { |
ba224e2c | 408 | struct pc87427_data *data = pc87427_update_device(dev); |
0d22d583 | 409 | int nr = to_sensor_dev_attr(devattr)->index; |
ba224e2c JD |
410 | |
411 | return sprintf(buf, "%d\n", !!(data->fan_status[nr] | |
412 | & FAN_STATUS_LOSPD)); | |
413 | } | |
414 | ||
86b9f565 GR |
415 | static ssize_t fan_fault_show(struct device *dev, |
416 | struct device_attribute *devattr, char *buf) | |
ba224e2c | 417 | { |
ba224e2c | 418 | struct pc87427_data *data = pc87427_update_device(dev); |
0d22d583 | 419 | int nr = to_sensor_dev_attr(devattr)->index; |
ba224e2c JD |
420 | |
421 | return sprintf(buf, "%d\n", !!(data->fan_status[nr] | |
422 | & FAN_STATUS_STALL)); | |
423 | } | |
424 | ||
86b9f565 GR |
425 | static ssize_t fan_min_store(struct device *dev, |
426 | struct device_attribute *devattr, | |
427 | const char *buf, size_t count) | |
ba224e2c JD |
428 | { |
429 | struct pc87427_data *data = dev_get_drvdata(dev); | |
0d22d583 JD |
430 | int nr = to_sensor_dev_attr(devattr)->index; |
431 | unsigned long val; | |
ba224e2c JD |
432 | int iobase = data->address[LD_FAN]; |
433 | ||
179c4fdb | 434 | if (kstrtoul(buf, 10, &val) < 0) |
0d22d583 JD |
435 | return -EINVAL; |
436 | ||
ba224e2c JD |
437 | mutex_lock(&data->lock); |
438 | outb(BANK_FM(nr), iobase + PC87427_REG_BANK); | |
36564efa GR |
439 | /* |
440 | * The low speed limit registers are read-only while monitoring | |
441 | * is enabled, so we have to disable monitoring, then change the | |
442 | * limit, and finally enable monitoring again. | |
443 | */ | |
ba224e2c JD |
444 | outb(0, iobase + PC87427_REG_FAN_STATUS); |
445 | data->fan_min[nr] = fan_to_reg(val); | |
446 | outw(data->fan_min[nr], iobase + PC87427_REG_FAN_MIN); | |
447 | outb(FAN_STATUS_MONEN, iobase + PC87427_REG_FAN_STATUS); | |
448 | mutex_unlock(&data->lock); | |
449 | ||
450 | return count; | |
451 | } | |
452 | ||
86b9f565 GR |
453 | static SENSOR_DEVICE_ATTR_RO(fan1_input, fan_input, 0); |
454 | static SENSOR_DEVICE_ATTR_RO(fan2_input, fan_input, 1); | |
455 | static SENSOR_DEVICE_ATTR_RO(fan3_input, fan_input, 2); | |
456 | static SENSOR_DEVICE_ATTR_RO(fan4_input, fan_input, 3); | |
457 | static SENSOR_DEVICE_ATTR_RO(fan5_input, fan_input, 4); | |
458 | static SENSOR_DEVICE_ATTR_RO(fan6_input, fan_input, 5); | |
459 | static SENSOR_DEVICE_ATTR_RO(fan7_input, fan_input, 6); | |
460 | static SENSOR_DEVICE_ATTR_RO(fan8_input, fan_input, 7); | |
461 | ||
462 | static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0); | |
463 | static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1); | |
464 | static SENSOR_DEVICE_ATTR_RW(fan3_min, fan_min, 2); | |
465 | static SENSOR_DEVICE_ATTR_RW(fan4_min, fan_min, 3); | |
466 | static SENSOR_DEVICE_ATTR_RW(fan5_min, fan_min, 4); | |
467 | static SENSOR_DEVICE_ATTR_RW(fan6_min, fan_min, 5); | |
468 | static SENSOR_DEVICE_ATTR_RW(fan7_min, fan_min, 6); | |
469 | static SENSOR_DEVICE_ATTR_RW(fan8_min, fan_min, 7); | |
470 | ||
471 | static SENSOR_DEVICE_ATTR_RO(fan1_alarm, fan_alarm, 0); | |
472 | static SENSOR_DEVICE_ATTR_RO(fan2_alarm, fan_alarm, 1); | |
473 | static SENSOR_DEVICE_ATTR_RO(fan3_alarm, fan_alarm, 2); | |
474 | static SENSOR_DEVICE_ATTR_RO(fan4_alarm, fan_alarm, 3); | |
475 | static SENSOR_DEVICE_ATTR_RO(fan5_alarm, fan_alarm, 4); | |
476 | static SENSOR_DEVICE_ATTR_RO(fan6_alarm, fan_alarm, 5); | |
477 | static SENSOR_DEVICE_ATTR_RO(fan7_alarm, fan_alarm, 6); | |
478 | static SENSOR_DEVICE_ATTR_RO(fan8_alarm, fan_alarm, 7); | |
479 | ||
480 | static SENSOR_DEVICE_ATTR_RO(fan1_fault, fan_fault, 0); | |
481 | static SENSOR_DEVICE_ATTR_RO(fan2_fault, fan_fault, 1); | |
482 | static SENSOR_DEVICE_ATTR_RO(fan3_fault, fan_fault, 2); | |
483 | static SENSOR_DEVICE_ATTR_RO(fan4_fault, fan_fault, 3); | |
484 | static SENSOR_DEVICE_ATTR_RO(fan5_fault, fan_fault, 4); | |
485 | static SENSOR_DEVICE_ATTR_RO(fan6_fault, fan_fault, 5); | |
486 | static SENSOR_DEVICE_ATTR_RO(fan7_fault, fan_fault, 6); | |
487 | static SENSOR_DEVICE_ATTR_RO(fan8_fault, fan_fault, 7); | |
ba224e2c JD |
488 | |
489 | static struct attribute *pc87427_attributes_fan[8][5] = { | |
490 | { | |
491 | &sensor_dev_attr_fan1_input.dev_attr.attr, | |
492 | &sensor_dev_attr_fan1_min.dev_attr.attr, | |
493 | &sensor_dev_attr_fan1_alarm.dev_attr.attr, | |
494 | &sensor_dev_attr_fan1_fault.dev_attr.attr, | |
495 | NULL | |
496 | }, { | |
497 | &sensor_dev_attr_fan2_input.dev_attr.attr, | |
498 | &sensor_dev_attr_fan2_min.dev_attr.attr, | |
499 | &sensor_dev_attr_fan2_alarm.dev_attr.attr, | |
500 | &sensor_dev_attr_fan2_fault.dev_attr.attr, | |
501 | NULL | |
502 | }, { | |
503 | &sensor_dev_attr_fan3_input.dev_attr.attr, | |
504 | &sensor_dev_attr_fan3_min.dev_attr.attr, | |
505 | &sensor_dev_attr_fan3_alarm.dev_attr.attr, | |
506 | &sensor_dev_attr_fan3_fault.dev_attr.attr, | |
507 | NULL | |
508 | }, { | |
509 | &sensor_dev_attr_fan4_input.dev_attr.attr, | |
510 | &sensor_dev_attr_fan4_min.dev_attr.attr, | |
511 | &sensor_dev_attr_fan4_alarm.dev_attr.attr, | |
512 | &sensor_dev_attr_fan4_fault.dev_attr.attr, | |
513 | NULL | |
514 | }, { | |
515 | &sensor_dev_attr_fan5_input.dev_attr.attr, | |
516 | &sensor_dev_attr_fan5_min.dev_attr.attr, | |
517 | &sensor_dev_attr_fan5_alarm.dev_attr.attr, | |
518 | &sensor_dev_attr_fan5_fault.dev_attr.attr, | |
519 | NULL | |
520 | }, { | |
521 | &sensor_dev_attr_fan6_input.dev_attr.attr, | |
522 | &sensor_dev_attr_fan6_min.dev_attr.attr, | |
523 | &sensor_dev_attr_fan6_alarm.dev_attr.attr, | |
524 | &sensor_dev_attr_fan6_fault.dev_attr.attr, | |
525 | NULL | |
526 | }, { | |
527 | &sensor_dev_attr_fan7_input.dev_attr.attr, | |
528 | &sensor_dev_attr_fan7_min.dev_attr.attr, | |
529 | &sensor_dev_attr_fan7_alarm.dev_attr.attr, | |
530 | &sensor_dev_attr_fan7_fault.dev_attr.attr, | |
531 | NULL | |
532 | }, { | |
533 | &sensor_dev_attr_fan8_input.dev_attr.attr, | |
534 | &sensor_dev_attr_fan8_min.dev_attr.attr, | |
535 | &sensor_dev_attr_fan8_alarm.dev_attr.attr, | |
536 | &sensor_dev_attr_fan8_fault.dev_attr.attr, | |
537 | NULL | |
538 | } | |
539 | }; | |
540 | ||
541 | static const struct attribute_group pc87427_group_fan[8] = { | |
542 | { .attrs = pc87427_attributes_fan[0] }, | |
543 | { .attrs = pc87427_attributes_fan[1] }, | |
544 | { .attrs = pc87427_attributes_fan[2] }, | |
545 | { .attrs = pc87427_attributes_fan[3] }, | |
546 | { .attrs = pc87427_attributes_fan[4] }, | |
547 | { .attrs = pc87427_attributes_fan[5] }, | |
548 | { .attrs = pc87427_attributes_fan[6] }, | |
549 | { .attrs = pc87427_attributes_fan[7] }, | |
550 | }; | |
551 | ||
36564efa GR |
552 | /* |
553 | * Must be called with data->lock held and pc87427_readall_pwm() freshly | |
554 | * called | |
555 | */ | |
328716bc JD |
556 | static void update_pwm_enable(struct pc87427_data *data, int nr, u8 mode) |
557 | { | |
558 | int iobase = data->address[LD_FAN]; | |
559 | data->pwm_enable[nr] &= ~PWM_ENABLE_MODE_MASK; | |
560 | data->pwm_enable[nr] |= mode; | |
561 | outb(data->pwm_enable[nr], iobase + PC87427_REG_PWM_ENABLE); | |
562 | } | |
563 | ||
86b9f565 GR |
564 | static ssize_t pwm_enable_show(struct device *dev, |
565 | struct device_attribute *devattr, char *buf) | |
328716bc JD |
566 | { |
567 | struct pc87427_data *data = pc87427_update_device(dev); | |
568 | int nr = to_sensor_dev_attr(devattr)->index; | |
569 | int pwm_enable; | |
570 | ||
571 | pwm_enable = pwm_enable_from_reg(data->pwm_enable[nr]); | |
572 | if (pwm_enable < 0) | |
573 | return pwm_enable; | |
574 | return sprintf(buf, "%d\n", pwm_enable); | |
575 | } | |
576 | ||
86b9f565 GR |
577 | static ssize_t pwm_enable_store(struct device *dev, |
578 | struct device_attribute *devattr, | |
579 | const char *buf, size_t count) | |
328716bc JD |
580 | { |
581 | struct pc87427_data *data = dev_get_drvdata(dev); | |
582 | int nr = to_sensor_dev_attr(devattr)->index; | |
583 | unsigned long val; | |
584 | ||
179c4fdb | 585 | if (kstrtoul(buf, 10, &val) < 0 || val > 2) |
328716bc JD |
586 | return -EINVAL; |
587 | /* Can't go to automatic mode if it isn't configured */ | |
588 | if (val == 2 && !(data->pwm_auto_ok & (1 << nr))) | |
589 | return -EINVAL; | |
590 | ||
591 | mutex_lock(&data->lock); | |
592 | pc87427_readall_pwm(data, nr); | |
593 | update_pwm_enable(data, nr, pwm_enable_to_reg(val, data->pwm[nr])); | |
594 | mutex_unlock(&data->lock); | |
595 | ||
596 | return count; | |
597 | } | |
598 | ||
86b9f565 GR |
599 | static ssize_t pwm_show(struct device *dev, struct device_attribute *devattr, |
600 | char *buf) | |
328716bc JD |
601 | { |
602 | struct pc87427_data *data = pc87427_update_device(dev); | |
603 | int nr = to_sensor_dev_attr(devattr)->index; | |
604 | ||
605 | return sprintf(buf, "%d\n", (int)data->pwm[nr]); | |
606 | } | |
607 | ||
86b9f565 GR |
608 | static ssize_t pwm_store(struct device *dev, struct device_attribute *devattr, |
609 | const char *buf, size_t count) | |
328716bc JD |
610 | { |
611 | struct pc87427_data *data = dev_get_drvdata(dev); | |
612 | int nr = to_sensor_dev_attr(devattr)->index; | |
613 | unsigned long val; | |
614 | int iobase = data->address[LD_FAN]; | |
615 | u8 mode; | |
616 | ||
179c4fdb | 617 | if (kstrtoul(buf, 10, &val) < 0 || val > 0xff) |
328716bc JD |
618 | return -EINVAL; |
619 | ||
620 | mutex_lock(&data->lock); | |
621 | pc87427_readall_pwm(data, nr); | |
622 | mode = data->pwm_enable[nr] & PWM_ENABLE_MODE_MASK; | |
623 | if (mode != PWM_MODE_MANUAL && mode != PWM_MODE_OFF) { | |
b55f3757 GR |
624 | dev_notice(dev, |
625 | "Can't set PWM%d duty cycle while not in manual mode\n", | |
626 | nr + 1); | |
328716bc JD |
627 | mutex_unlock(&data->lock); |
628 | return -EPERM; | |
629 | } | |
630 | ||
631 | /* We may have to change the mode */ | |
632 | if (mode == PWM_MODE_MANUAL && val == 0) { | |
633 | /* Transition from Manual to Off */ | |
634 | update_pwm_enable(data, nr, PWM_MODE_OFF); | |
635 | mode = PWM_MODE_OFF; | |
636 | dev_dbg(dev, "Switching PWM%d from %s to %s\n", nr + 1, | |
637 | "manual", "off"); | |
638 | } else if (mode == PWM_MODE_OFF && val != 0) { | |
639 | /* Transition from Off to Manual */ | |
640 | update_pwm_enable(data, nr, PWM_MODE_MANUAL); | |
641 | mode = PWM_MODE_MANUAL; | |
642 | dev_dbg(dev, "Switching PWM%d from %s to %s\n", nr + 1, | |
643 | "off", "manual"); | |
644 | } | |
645 | ||
646 | data->pwm[nr] = val; | |
647 | if (mode == PWM_MODE_MANUAL) | |
648 | outb(val, iobase + PC87427_REG_PWM_DUTY); | |
649 | mutex_unlock(&data->lock); | |
650 | ||
651 | return count; | |
652 | } | |
653 | ||
86b9f565 GR |
654 | static SENSOR_DEVICE_ATTR_RW(pwm1_enable, pwm_enable, 0); |
655 | static SENSOR_DEVICE_ATTR_RW(pwm2_enable, pwm_enable, 1); | |
656 | static SENSOR_DEVICE_ATTR_RW(pwm3_enable, pwm_enable, 2); | |
657 | static SENSOR_DEVICE_ATTR_RW(pwm4_enable, pwm_enable, 3); | |
328716bc | 658 | |
86b9f565 GR |
659 | static SENSOR_DEVICE_ATTR_RW(pwm1, pwm, 0); |
660 | static SENSOR_DEVICE_ATTR_RW(pwm2, pwm, 1); | |
661 | static SENSOR_DEVICE_ATTR_RW(pwm3, pwm, 2); | |
662 | static SENSOR_DEVICE_ATTR_RW(pwm4, pwm, 3); | |
328716bc JD |
663 | |
664 | static struct attribute *pc87427_attributes_pwm[4][3] = { | |
665 | { | |
666 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, | |
667 | &sensor_dev_attr_pwm1.dev_attr.attr, | |
668 | NULL | |
669 | }, { | |
670 | &sensor_dev_attr_pwm2_enable.dev_attr.attr, | |
671 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
672 | NULL | |
673 | }, { | |
674 | &sensor_dev_attr_pwm3_enable.dev_attr.attr, | |
675 | &sensor_dev_attr_pwm3.dev_attr.attr, | |
676 | NULL | |
677 | }, { | |
678 | &sensor_dev_attr_pwm4_enable.dev_attr.attr, | |
679 | &sensor_dev_attr_pwm4.dev_attr.attr, | |
680 | NULL | |
681 | } | |
682 | }; | |
683 | ||
684 | static const struct attribute_group pc87427_group_pwm[4] = { | |
685 | { .attrs = pc87427_attributes_pwm[0] }, | |
686 | { .attrs = pc87427_attributes_pwm[1] }, | |
687 | { .attrs = pc87427_attributes_pwm[2] }, | |
688 | { .attrs = pc87427_attributes_pwm[3] }, | |
689 | }; | |
690 | ||
86b9f565 GR |
691 | static ssize_t temp_input_show(struct device *dev, |
692 | struct device_attribute *devattr, char *buf) | |
008e5f33 JD |
693 | { |
694 | struct pc87427_data *data = pc87427_update_device(dev); | |
695 | int nr = to_sensor_dev_attr(devattr)->index; | |
696 | ||
697 | return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr])); | |
698 | } | |
699 | ||
86b9f565 GR |
700 | static ssize_t temp_min_show(struct device *dev, |
701 | struct device_attribute *devattr, char *buf) | |
008e5f33 JD |
702 | { |
703 | struct pc87427_data *data = pc87427_update_device(dev); | |
704 | int nr = to_sensor_dev_attr(devattr)->index; | |
705 | ||
706 | return sprintf(buf, "%ld\n", temp_from_reg8(data->temp_min[nr])); | |
707 | } | |
708 | ||
86b9f565 GR |
709 | static ssize_t temp_max_show(struct device *dev, |
710 | struct device_attribute *devattr, char *buf) | |
008e5f33 JD |
711 | { |
712 | struct pc87427_data *data = pc87427_update_device(dev); | |
713 | int nr = to_sensor_dev_attr(devattr)->index; | |
714 | ||
715 | return sprintf(buf, "%ld\n", temp_from_reg8(data->temp_max[nr])); | |
716 | } | |
717 | ||
86b9f565 GR |
718 | static ssize_t temp_crit_show(struct device *dev, |
719 | struct device_attribute *devattr, char *buf) | |
008e5f33 JD |
720 | { |
721 | struct pc87427_data *data = pc87427_update_device(dev); | |
722 | int nr = to_sensor_dev_attr(devattr)->index; | |
723 | ||
724 | return sprintf(buf, "%ld\n", temp_from_reg8(data->temp_crit[nr])); | |
725 | } | |
726 | ||
86b9f565 GR |
727 | static ssize_t temp_type_show(struct device *dev, |
728 | struct device_attribute *devattr, char *buf) | |
008e5f33 JD |
729 | { |
730 | struct pc87427_data *data = pc87427_update_device(dev); | |
731 | int nr = to_sensor_dev_attr(devattr)->index; | |
732 | ||
733 | return sprintf(buf, "%u\n", temp_type_from_reg(data->temp_type[nr])); | |
734 | } | |
735 | ||
86b9f565 GR |
736 | static ssize_t temp_min_alarm_show(struct device *dev, |
737 | struct device_attribute *devattr, | |
738 | char *buf) | |
008e5f33 JD |
739 | { |
740 | struct pc87427_data *data = pc87427_update_device(dev); | |
741 | int nr = to_sensor_dev_attr(devattr)->index; | |
742 | ||
743 | return sprintf(buf, "%d\n", !!(data->temp_status[nr] | |
744 | & TEMP_STATUS_LOWFLG)); | |
745 | } | |
746 | ||
86b9f565 GR |
747 | static ssize_t temp_max_alarm_show(struct device *dev, |
748 | struct device_attribute *devattr, | |
749 | char *buf) | |
008e5f33 JD |
750 | { |
751 | struct pc87427_data *data = pc87427_update_device(dev); | |
752 | int nr = to_sensor_dev_attr(devattr)->index; | |
753 | ||
754 | return sprintf(buf, "%d\n", !!(data->temp_status[nr] | |
755 | & TEMP_STATUS_HIGHFLG)); | |
756 | } | |
757 | ||
86b9f565 GR |
758 | static ssize_t temp_crit_alarm_show(struct device *dev, |
759 | struct device_attribute *devattr, | |
760 | char *buf) | |
008e5f33 JD |
761 | { |
762 | struct pc87427_data *data = pc87427_update_device(dev); | |
763 | int nr = to_sensor_dev_attr(devattr)->index; | |
764 | ||
765 | return sprintf(buf, "%d\n", !!(data->temp_status[nr] | |
766 | & TEMP_STATUS_CRITFLG)); | |
767 | } | |
768 | ||
86b9f565 GR |
769 | static ssize_t temp_fault_show(struct device *dev, |
770 | struct device_attribute *devattr, char *buf) | |
008e5f33 JD |
771 | { |
772 | struct pc87427_data *data = pc87427_update_device(dev); | |
773 | int nr = to_sensor_dev_attr(devattr)->index; | |
774 | ||
775 | return sprintf(buf, "%d\n", !!(data->temp_status[nr] | |
776 | & TEMP_STATUS_SENSERR)); | |
777 | } | |
778 | ||
86b9f565 GR |
779 | static SENSOR_DEVICE_ATTR_RO(temp1_input, temp_input, 0); |
780 | static SENSOR_DEVICE_ATTR_RO(temp2_input, temp_input, 1); | |
781 | static SENSOR_DEVICE_ATTR_RO(temp3_input, temp_input, 2); | |
782 | static SENSOR_DEVICE_ATTR_RO(temp4_input, temp_input, 3); | |
783 | static SENSOR_DEVICE_ATTR_RO(temp5_input, temp_input, 4); | |
784 | static SENSOR_DEVICE_ATTR_RO(temp6_input, temp_input, 5); | |
785 | ||
786 | static SENSOR_DEVICE_ATTR_RO(temp1_min, temp_min, 0); | |
787 | static SENSOR_DEVICE_ATTR_RO(temp2_min, temp_min, 1); | |
788 | static SENSOR_DEVICE_ATTR_RO(temp3_min, temp_min, 2); | |
789 | static SENSOR_DEVICE_ATTR_RO(temp4_min, temp_min, 3); | |
790 | static SENSOR_DEVICE_ATTR_RO(temp5_min, temp_min, 4); | |
791 | static SENSOR_DEVICE_ATTR_RO(temp6_min, temp_min, 5); | |
792 | ||
793 | static SENSOR_DEVICE_ATTR_RO(temp1_max, temp_max, 0); | |
794 | static SENSOR_DEVICE_ATTR_RO(temp2_max, temp_max, 1); | |
795 | static SENSOR_DEVICE_ATTR_RO(temp3_max, temp_max, 2); | |
796 | static SENSOR_DEVICE_ATTR_RO(temp4_max, temp_max, 3); | |
797 | static SENSOR_DEVICE_ATTR_RO(temp5_max, temp_max, 4); | |
798 | static SENSOR_DEVICE_ATTR_RO(temp6_max, temp_max, 5); | |
799 | ||
800 | static SENSOR_DEVICE_ATTR_RO(temp1_crit, temp_crit, 0); | |
801 | static SENSOR_DEVICE_ATTR_RO(temp2_crit, temp_crit, 1); | |
802 | static SENSOR_DEVICE_ATTR_RO(temp3_crit, temp_crit, 2); | |
803 | static SENSOR_DEVICE_ATTR_RO(temp4_crit, temp_crit, 3); | |
804 | static SENSOR_DEVICE_ATTR_RO(temp5_crit, temp_crit, 4); | |
805 | static SENSOR_DEVICE_ATTR_RO(temp6_crit, temp_crit, 5); | |
806 | ||
807 | static SENSOR_DEVICE_ATTR_RO(temp1_type, temp_type, 0); | |
808 | static SENSOR_DEVICE_ATTR_RO(temp2_type, temp_type, 1); | |
809 | static SENSOR_DEVICE_ATTR_RO(temp3_type, temp_type, 2); | |
810 | static SENSOR_DEVICE_ATTR_RO(temp4_type, temp_type, 3); | |
811 | static SENSOR_DEVICE_ATTR_RO(temp5_type, temp_type, 4); | |
812 | static SENSOR_DEVICE_ATTR_RO(temp6_type, temp_type, 5); | |
813 | ||
814 | static SENSOR_DEVICE_ATTR_RO(temp1_min_alarm, temp_min_alarm, 0); | |
815 | static SENSOR_DEVICE_ATTR_RO(temp2_min_alarm, temp_min_alarm, 1); | |
816 | static SENSOR_DEVICE_ATTR_RO(temp3_min_alarm, temp_min_alarm, 2); | |
817 | static SENSOR_DEVICE_ATTR_RO(temp4_min_alarm, temp_min_alarm, 3); | |
818 | static SENSOR_DEVICE_ATTR_RO(temp5_min_alarm, temp_min_alarm, 4); | |
819 | static SENSOR_DEVICE_ATTR_RO(temp6_min_alarm, temp_min_alarm, 5); | |
820 | ||
821 | static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, temp_max_alarm, 0); | |
822 | static SENSOR_DEVICE_ATTR_RO(temp2_max_alarm, temp_max_alarm, 1); | |
823 | static SENSOR_DEVICE_ATTR_RO(temp3_max_alarm, temp_max_alarm, 2); | |
824 | static SENSOR_DEVICE_ATTR_RO(temp4_max_alarm, temp_max_alarm, 3); | |
825 | static SENSOR_DEVICE_ATTR_RO(temp5_max_alarm, temp_max_alarm, 4); | |
826 | static SENSOR_DEVICE_ATTR_RO(temp6_max_alarm, temp_max_alarm, 5); | |
827 | ||
828 | static SENSOR_DEVICE_ATTR_RO(temp1_crit_alarm, temp_crit_alarm, 0); | |
829 | static SENSOR_DEVICE_ATTR_RO(temp2_crit_alarm, temp_crit_alarm, 1); | |
830 | static SENSOR_DEVICE_ATTR_RO(temp3_crit_alarm, temp_crit_alarm, 2); | |
831 | static SENSOR_DEVICE_ATTR_RO(temp4_crit_alarm, temp_crit_alarm, 3); | |
832 | static SENSOR_DEVICE_ATTR_RO(temp5_crit_alarm, temp_crit_alarm, 4); | |
833 | static SENSOR_DEVICE_ATTR_RO(temp6_crit_alarm, temp_crit_alarm, 5); | |
834 | ||
835 | static SENSOR_DEVICE_ATTR_RO(temp1_fault, temp_fault, 0); | |
836 | static SENSOR_DEVICE_ATTR_RO(temp2_fault, temp_fault, 1); | |
837 | static SENSOR_DEVICE_ATTR_RO(temp3_fault, temp_fault, 2); | |
838 | static SENSOR_DEVICE_ATTR_RO(temp4_fault, temp_fault, 3); | |
839 | static SENSOR_DEVICE_ATTR_RO(temp5_fault, temp_fault, 4); | |
840 | static SENSOR_DEVICE_ATTR_RO(temp6_fault, temp_fault, 5); | |
008e5f33 JD |
841 | |
842 | static struct attribute *pc87427_attributes_temp[6][10] = { | |
843 | { | |
844 | &sensor_dev_attr_temp1_input.dev_attr.attr, | |
845 | &sensor_dev_attr_temp1_min.dev_attr.attr, | |
846 | &sensor_dev_attr_temp1_max.dev_attr.attr, | |
847 | &sensor_dev_attr_temp1_crit.dev_attr.attr, | |
848 | &sensor_dev_attr_temp1_type.dev_attr.attr, | |
849 | &sensor_dev_attr_temp1_min_alarm.dev_attr.attr, | |
850 | &sensor_dev_attr_temp1_max_alarm.dev_attr.attr, | |
851 | &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr, | |
852 | &sensor_dev_attr_temp1_fault.dev_attr.attr, | |
853 | NULL | |
854 | }, { | |
855 | &sensor_dev_attr_temp2_input.dev_attr.attr, | |
856 | &sensor_dev_attr_temp2_min.dev_attr.attr, | |
857 | &sensor_dev_attr_temp2_max.dev_attr.attr, | |
858 | &sensor_dev_attr_temp2_crit.dev_attr.attr, | |
859 | &sensor_dev_attr_temp2_type.dev_attr.attr, | |
860 | &sensor_dev_attr_temp2_min_alarm.dev_attr.attr, | |
861 | &sensor_dev_attr_temp2_max_alarm.dev_attr.attr, | |
862 | &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr, | |
863 | &sensor_dev_attr_temp2_fault.dev_attr.attr, | |
864 | NULL | |
865 | }, { | |
866 | &sensor_dev_attr_temp3_input.dev_attr.attr, | |
867 | &sensor_dev_attr_temp3_min.dev_attr.attr, | |
868 | &sensor_dev_attr_temp3_max.dev_attr.attr, | |
869 | &sensor_dev_attr_temp3_crit.dev_attr.attr, | |
870 | &sensor_dev_attr_temp3_type.dev_attr.attr, | |
871 | &sensor_dev_attr_temp3_min_alarm.dev_attr.attr, | |
872 | &sensor_dev_attr_temp3_max_alarm.dev_attr.attr, | |
873 | &sensor_dev_attr_temp3_crit_alarm.dev_attr.attr, | |
874 | &sensor_dev_attr_temp3_fault.dev_attr.attr, | |
875 | NULL | |
876 | }, { | |
877 | &sensor_dev_attr_temp4_input.dev_attr.attr, | |
878 | &sensor_dev_attr_temp4_min.dev_attr.attr, | |
879 | &sensor_dev_attr_temp4_max.dev_attr.attr, | |
880 | &sensor_dev_attr_temp4_crit.dev_attr.attr, | |
881 | &sensor_dev_attr_temp4_type.dev_attr.attr, | |
882 | &sensor_dev_attr_temp4_min_alarm.dev_attr.attr, | |
883 | &sensor_dev_attr_temp4_max_alarm.dev_attr.attr, | |
884 | &sensor_dev_attr_temp4_crit_alarm.dev_attr.attr, | |
885 | &sensor_dev_attr_temp4_fault.dev_attr.attr, | |
886 | NULL | |
887 | }, { | |
888 | &sensor_dev_attr_temp5_input.dev_attr.attr, | |
889 | &sensor_dev_attr_temp5_min.dev_attr.attr, | |
890 | &sensor_dev_attr_temp5_max.dev_attr.attr, | |
891 | &sensor_dev_attr_temp5_crit.dev_attr.attr, | |
892 | &sensor_dev_attr_temp5_type.dev_attr.attr, | |
893 | &sensor_dev_attr_temp5_min_alarm.dev_attr.attr, | |
894 | &sensor_dev_attr_temp5_max_alarm.dev_attr.attr, | |
895 | &sensor_dev_attr_temp5_crit_alarm.dev_attr.attr, | |
896 | &sensor_dev_attr_temp5_fault.dev_attr.attr, | |
897 | NULL | |
898 | }, { | |
899 | &sensor_dev_attr_temp6_input.dev_attr.attr, | |
900 | &sensor_dev_attr_temp6_min.dev_attr.attr, | |
901 | &sensor_dev_attr_temp6_max.dev_attr.attr, | |
902 | &sensor_dev_attr_temp6_crit.dev_attr.attr, | |
903 | &sensor_dev_attr_temp6_type.dev_attr.attr, | |
904 | &sensor_dev_attr_temp6_min_alarm.dev_attr.attr, | |
905 | &sensor_dev_attr_temp6_max_alarm.dev_attr.attr, | |
906 | &sensor_dev_attr_temp6_crit_alarm.dev_attr.attr, | |
907 | &sensor_dev_attr_temp6_fault.dev_attr.attr, | |
908 | NULL | |
909 | } | |
910 | }; | |
911 | ||
912 | static const struct attribute_group pc87427_group_temp[6] = { | |
913 | { .attrs = pc87427_attributes_temp[0] }, | |
914 | { .attrs = pc87427_attributes_temp[1] }, | |
915 | { .attrs = pc87427_attributes_temp[2] }, | |
916 | { .attrs = pc87427_attributes_temp[3] }, | |
917 | { .attrs = pc87427_attributes_temp[4] }, | |
918 | { .attrs = pc87427_attributes_temp[5] }, | |
919 | }; | |
920 | ||
a81b67da | 921 | static ssize_t name_show(struct device *dev, struct device_attribute |
ba224e2c JD |
922 | *devattr, char *buf) |
923 | { | |
924 | struct pc87427_data *data = dev_get_drvdata(dev); | |
925 | ||
926 | return sprintf(buf, "%s\n", data->name); | |
927 | } | |
a81b67da | 928 | static DEVICE_ATTR_RO(name); |
ba224e2c JD |
929 | |
930 | ||
931 | /* | |
932 | * Device detection, attach and detach | |
933 | */ | |
934 | ||
6c931ae1 | 935 | static int pc87427_request_regions(struct platform_device *pdev, |
9d32df19 JD |
936 | int count) |
937 | { | |
938 | struct resource *res; | |
5e0c8769 | 939 | int i; |
9d32df19 JD |
940 | |
941 | for (i = 0; i < count; i++) { | |
942 | res = platform_get_resource(pdev, IORESOURCE_IO, i); | |
943 | if (!res) { | |
9d32df19 | 944 | dev_err(&pdev->dev, "Missing resource #%d\n", i); |
5e0c8769 | 945 | return -ENOENT; |
9d32df19 | 946 | } |
5e0c8769 GR |
947 | if (!devm_request_region(&pdev->dev, res->start, |
948 | resource_size(res), DRVNAME)) { | |
9d32df19 JD |
949 | dev_err(&pdev->dev, |
950 | "Failed to request region 0x%lx-0x%lx\n", | |
951 | (unsigned long)res->start, | |
952 | (unsigned long)res->end); | |
5e0c8769 | 953 | return -EBUSY; |
9d32df19 JD |
954 | } |
955 | } | |
5e0c8769 | 956 | return 0; |
9d32df19 JD |
957 | } |
958 | ||
6c931ae1 | 959 | static void pc87427_init_device(struct device *dev) |
ba224e2c | 960 | { |
a8b3a3a5 | 961 | struct pc87427_sio_data *sio_data = dev_get_platdata(dev); |
ba224e2c JD |
962 | struct pc87427_data *data = dev_get_drvdata(dev); |
963 | int i; | |
964 | u8 reg; | |
965 | ||
966 | /* The FMC module should be ready */ | |
967 | reg = pc87427_read8(data, LD_FAN, PC87427_REG_BANK); | |
968 | if (!(reg & 0x80)) | |
008e5f33 | 969 | dev_warn(dev, "%s module not ready!\n", "FMC"); |
ba224e2c JD |
970 | |
971 | /* Check which fans are enabled */ | |
972 | for (i = 0; i < 8; i++) { | |
4e7d99e1 JD |
973 | if (!(sio_data->has_fanin & (1 << i))) /* Not wired */ |
974 | continue; | |
ba224e2c JD |
975 | reg = pc87427_read8_bank(data, LD_FAN, BANK_FM(i), |
976 | PC87427_REG_FAN_STATUS); | |
977 | if (reg & FAN_STATUS_MONEN) | |
978 | data->fan_enabled |= (1 << i); | |
979 | } | |
980 | ||
981 | if (!data->fan_enabled) { | |
4e7d99e1 JD |
982 | dev_dbg(dev, "Enabling monitoring of all fans\n"); |
983 | for (i = 0; i < 8; i++) { | |
984 | if (!(sio_data->has_fanin & (1 << i))) /* Not wired */ | |
985 | continue; | |
ba224e2c JD |
986 | pc87427_write8_bank(data, LD_FAN, BANK_FM(i), |
987 | PC87427_REG_FAN_STATUS, | |
988 | FAN_STATUS_MONEN); | |
4e7d99e1 JD |
989 | } |
990 | data->fan_enabled = sio_data->has_fanin; | |
ba224e2c | 991 | } |
328716bc JD |
992 | |
993 | /* Check which PWM outputs are enabled */ | |
994 | for (i = 0; i < 4; i++) { | |
995 | if (!(sio_data->has_fanout & (1 << i))) /* Not wired */ | |
996 | continue; | |
997 | reg = pc87427_read8_bank(data, LD_FAN, BANK_FC(i), | |
998 | PC87427_REG_PWM_ENABLE); | |
999 | if (reg & PWM_ENABLE_CTLEN) | |
1000 | data->pwm_enabled |= (1 << i); | |
1001 | ||
36564efa GR |
1002 | /* |
1003 | * We don't expose an interface to reconfigure the automatic | |
1004 | * fan control mode, so only allow to return to this mode if | |
1005 | * it was originally set. | |
1006 | */ | |
328716bc JD |
1007 | if ((reg & PWM_ENABLE_MODE_MASK) == PWM_MODE_AUTO) { |
1008 | dev_dbg(dev, "PWM%d is in automatic control mode\n", | |
1009 | i + 1); | |
1010 | data->pwm_auto_ok |= (1 << i); | |
1011 | } | |
1012 | } | |
008e5f33 JD |
1013 | |
1014 | /* The HMC module should be ready */ | |
1015 | reg = pc87427_read8(data, LD_TEMP, PC87427_REG_BANK); | |
1016 | if (!(reg & 0x80)) | |
1017 | dev_warn(dev, "%s module not ready!\n", "HMC"); | |
1018 | ||
1019 | /* Check which temperature channels are enabled */ | |
1020 | for (i = 0; i < 6; i++) { | |
1021 | reg = pc87427_read8_bank(data, LD_TEMP, BANK_TM(i), | |
1022 | PC87427_REG_TEMP_STATUS); | |
1023 | if (reg & TEMP_STATUS_CHANEN) | |
1024 | data->temp_enabled |= (1 << i); | |
1025 | } | |
ba224e2c JD |
1026 | } |
1027 | ||
c6b87246 JD |
1028 | static void pc87427_remove_files(struct device *dev) |
1029 | { | |
1030 | struct pc87427_data *data = dev_get_drvdata(dev); | |
1031 | int i; | |
1032 | ||
1033 | device_remove_file(dev, &dev_attr_name); | |
1034 | for (i = 0; i < 8; i++) { | |
1035 | if (!(data->fan_enabled & (1 << i))) | |
1036 | continue; | |
1037 | sysfs_remove_group(&dev->kobj, &pc87427_group_fan[i]); | |
1038 | } | |
1039 | for (i = 0; i < 4; i++) { | |
1040 | if (!(data->pwm_enabled & (1 << i))) | |
1041 | continue; | |
1042 | sysfs_remove_group(&dev->kobj, &pc87427_group_pwm[i]); | |
1043 | } | |
1044 | for (i = 0; i < 6; i++) { | |
1045 | if (!(data->temp_enabled & (1 << i))) | |
1046 | continue; | |
1047 | sysfs_remove_group(&dev->kobj, &pc87427_group_temp[i]); | |
1048 | } | |
1049 | } | |
1050 | ||
6c931ae1 | 1051 | static int pc87427_probe(struct platform_device *pdev) |
ba224e2c | 1052 | { |
a8b3a3a5 | 1053 | struct pc87427_sio_data *sio_data = dev_get_platdata(&pdev->dev); |
ba224e2c | 1054 | struct pc87427_data *data; |
9d32df19 | 1055 | int i, err, res_count; |
ba224e2c | 1056 | |
5e0c8769 GR |
1057 | data = devm_kzalloc(&pdev->dev, sizeof(struct pc87427_data), |
1058 | GFP_KERNEL); | |
2f89b072 | 1059 | if (!data) |
5e0c8769 | 1060 | return -ENOMEM; |
ba224e2c | 1061 | |
9d32df19 JD |
1062 | data->address[0] = sio_data->address[0]; |
1063 | data->address[1] = sio_data->address[1]; | |
1064 | res_count = (data->address[0] != 0) + (data->address[1] != 0); | |
1065 | ||
1066 | err = pc87427_request_regions(pdev, res_count); | |
1067 | if (err) | |
5e0c8769 | 1068 | return err; |
ba224e2c JD |
1069 | |
1070 | mutex_init(&data->lock); | |
1071 | data->name = "pc87427"; | |
1072 | platform_set_drvdata(pdev, data); | |
1073 | pc87427_init_device(&pdev->dev); | |
1074 | ||
1075 | /* Register sysfs hooks */ | |
0d22d583 JD |
1076 | err = device_create_file(&pdev->dev, &dev_attr_name); |
1077 | if (err) | |
5e0c8769 | 1078 | return err; |
ba224e2c JD |
1079 | for (i = 0; i < 8; i++) { |
1080 | if (!(data->fan_enabled & (1 << i))) | |
1081 | continue; | |
0d22d583 JD |
1082 | err = sysfs_create_group(&pdev->dev.kobj, |
1083 | &pc87427_group_fan[i]); | |
1084 | if (err) | |
ba224e2c JD |
1085 | goto exit_remove_files; |
1086 | } | |
328716bc JD |
1087 | for (i = 0; i < 4; i++) { |
1088 | if (!(data->pwm_enabled & (1 << i))) | |
1089 | continue; | |
1090 | err = sysfs_create_group(&pdev->dev.kobj, | |
1091 | &pc87427_group_pwm[i]); | |
1092 | if (err) | |
1093 | goto exit_remove_files; | |
1094 | } | |
008e5f33 JD |
1095 | for (i = 0; i < 6; i++) { |
1096 | if (!(data->temp_enabled & (1 << i))) | |
1097 | continue; | |
1098 | err = sysfs_create_group(&pdev->dev.kobj, | |
1099 | &pc87427_group_temp[i]); | |
1100 | if (err) | |
1101 | goto exit_remove_files; | |
1102 | } | |
ba224e2c | 1103 | |
1beeffe4 TJ |
1104 | data->hwmon_dev = hwmon_device_register(&pdev->dev); |
1105 | if (IS_ERR(data->hwmon_dev)) { | |
1106 | err = PTR_ERR(data->hwmon_dev); | |
ba224e2c JD |
1107 | dev_err(&pdev->dev, "Class registration failed (%d)\n", err); |
1108 | goto exit_remove_files; | |
1109 | } | |
1110 | ||
1111 | return 0; | |
1112 | ||
1113 | exit_remove_files: | |
c6b87246 | 1114 | pc87427_remove_files(&pdev->dev); |
ba224e2c JD |
1115 | return err; |
1116 | } | |
1117 | ||
281dfd0b | 1118 | static int pc87427_remove(struct platform_device *pdev) |
ba224e2c JD |
1119 | { |
1120 | struct pc87427_data *data = platform_get_drvdata(pdev); | |
ba224e2c | 1121 | |
1beeffe4 | 1122 | hwmon_device_unregister(data->hwmon_dev); |
c6b87246 | 1123 | pc87427_remove_files(&pdev->dev); |
ce7ee4e8 | 1124 | |
ba224e2c JD |
1125 | return 0; |
1126 | } | |
1127 | ||
1128 | ||
1129 | static struct platform_driver pc87427_driver = { | |
1130 | .driver = { | |
ba224e2c JD |
1131 | .name = DRVNAME, |
1132 | }, | |
1133 | .probe = pc87427_probe, | |
9e5e9b7a | 1134 | .remove = pc87427_remove, |
ba224e2c JD |
1135 | }; |
1136 | ||
9d32df19 | 1137 | static int __init pc87427_device_add(const struct pc87427_sio_data *sio_data) |
ba224e2c | 1138 | { |
9d32df19 JD |
1139 | struct resource res[2] = { |
1140 | { .flags = IORESOURCE_IO }, | |
1141 | { .flags = IORESOURCE_IO }, | |
ba224e2c | 1142 | }; |
9d32df19 | 1143 | int err, i, res_count; |
ba224e2c | 1144 | |
9d32df19 JD |
1145 | res_count = 0; |
1146 | for (i = 0; i < 2; i++) { | |
1147 | if (!sio_data->address[i]) | |
1148 | continue; | |
1149 | res[res_count].start = sio_data->address[i]; | |
1150 | res[res_count].end = sio_data->address[i] + REGION_LENGTH - 1; | |
1151 | res[res_count].name = logdev_str[i]; | |
b9acb64a | 1152 | |
9d32df19 JD |
1153 | err = acpi_check_resource_conflict(&res[res_count]); |
1154 | if (err) | |
1155 | goto exit; | |
1156 | ||
1157 | res_count++; | |
1158 | } | |
1159 | ||
1160 | pdev = platform_device_alloc(DRVNAME, res[0].start); | |
ba224e2c JD |
1161 | if (!pdev) { |
1162 | err = -ENOMEM; | |
5e24e0c3 | 1163 | pr_err("Device allocation failed\n"); |
ba224e2c JD |
1164 | goto exit; |
1165 | } | |
1166 | ||
9d32df19 | 1167 | err = platform_device_add_resources(pdev, res, res_count); |
ba224e2c | 1168 | if (err) { |
5e24e0c3 | 1169 | pr_err("Device resource addition failed (%d)\n", err); |
ba224e2c JD |
1170 | goto exit_device_put; |
1171 | } | |
1172 | ||
4e7d99e1 JD |
1173 | err = platform_device_add_data(pdev, sio_data, |
1174 | sizeof(struct pc87427_sio_data)); | |
1175 | if (err) { | |
5e24e0c3 | 1176 | pr_err("Platform data allocation failed\n"); |
4e7d99e1 JD |
1177 | goto exit_device_put; |
1178 | } | |
1179 | ||
ba224e2c JD |
1180 | err = platform_device_add(pdev); |
1181 | if (err) { | |
5e24e0c3 | 1182 | pr_err("Device addition failed (%d)\n", err); |
ba224e2c JD |
1183 | goto exit_device_put; |
1184 | } | |
1185 | ||
1186 | return 0; | |
1187 | ||
1188 | exit_device_put: | |
1189 | platform_device_put(pdev); | |
1190 | exit: | |
1191 | return err; | |
1192 | } | |
1193 | ||
9d32df19 | 1194 | static int __init pc87427_find(int sioaddr, struct pc87427_sio_data *sio_data) |
ba224e2c JD |
1195 | { |
1196 | u16 val; | |
4e7d99e1 | 1197 | u8 cfg, cfg_b; |
755a9b0f GR |
1198 | int i, err; |
1199 | ||
1200 | err = superio_enter(sioaddr); | |
1201 | if (err) | |
1202 | return err; | |
ba224e2c JD |
1203 | |
1204 | /* Identify device */ | |
67b671bc | 1205 | val = force_id ? force_id : superio_inb(sioaddr, SIOREG_DEVID); |
ba224e2c JD |
1206 | if (val != 0xf2) { /* PC87427 */ |
1207 | err = -ENODEV; | |
1208 | goto exit; | |
1209 | } | |
1210 | ||
1211 | for (i = 0; i < 2; i++) { | |
9d32df19 | 1212 | sio_data->address[i] = 0; |
ba224e2c JD |
1213 | /* Select logical device */ |
1214 | superio_outb(sioaddr, SIOREG_LDSEL, logdev[i]); | |
1215 | ||
1216 | val = superio_inb(sioaddr, SIOREG_ACT); | |
1217 | if (!(val & 0x01)) { | |
5e24e0c3 JP |
1218 | pr_info("Logical device 0x%02x not activated\n", |
1219 | logdev[i]); | |
ba224e2c JD |
1220 | continue; |
1221 | } | |
1222 | ||
1223 | val = superio_inb(sioaddr, SIOREG_MAP); | |
1224 | if (val & 0x01) { | |
b55f3757 GR |
1225 | pr_warn("Logical device 0x%02x is memory-mapped, can't use\n", |
1226 | logdev[i]); | |
ba224e2c JD |
1227 | continue; |
1228 | } | |
1229 | ||
1230 | val = (superio_inb(sioaddr, SIOREG_IOBASE) << 8) | |
1231 | | superio_inb(sioaddr, SIOREG_IOBASE + 1); | |
1232 | if (!val) { | |
b55f3757 GR |
1233 | pr_info("I/O base address not set for logical device 0x%02x\n", |
1234 | logdev[i]); | |
ba224e2c JD |
1235 | continue; |
1236 | } | |
9d32df19 JD |
1237 | sio_data->address[i] = val; |
1238 | } | |
1239 | ||
1240 | /* No point in loading the driver if everything is disabled */ | |
1241 | if (!sio_data->address[0] && !sio_data->address[1]) { | |
1242 | err = -ENODEV; | |
1243 | goto exit; | |
ba224e2c JD |
1244 | } |
1245 | ||
4e7d99e1 JD |
1246 | /* Check which fan inputs are wired */ |
1247 | sio_data->has_fanin = (1 << 2) | (1 << 3); /* FANIN2, FANIN3 */ | |
1248 | ||
1249 | cfg = superio_inb(sioaddr, SIOREG_CF2); | |
1250 | if (!(cfg & (1 << 3))) | |
1251 | sio_data->has_fanin |= (1 << 0); /* FANIN0 */ | |
1252 | if (!(cfg & (1 << 2))) | |
1253 | sio_data->has_fanin |= (1 << 4); /* FANIN4 */ | |
1254 | ||
1255 | cfg = superio_inb(sioaddr, SIOREG_CFD); | |
1256 | if (!(cfg & (1 << 0))) | |
1257 | sio_data->has_fanin |= (1 << 1); /* FANIN1 */ | |
1258 | ||
1259 | cfg = superio_inb(sioaddr, SIOREG_CF4); | |
1260 | if (!(cfg & (1 << 0))) | |
1261 | sio_data->has_fanin |= (1 << 7); /* FANIN7 */ | |
1262 | cfg_b = superio_inb(sioaddr, SIOREG_CFB); | |
1263 | if (!(cfg & (1 << 1)) && (cfg_b & (1 << 3))) | |
1264 | sio_data->has_fanin |= (1 << 5); /* FANIN5 */ | |
1265 | cfg = superio_inb(sioaddr, SIOREG_CF3); | |
1266 | if ((cfg & (1 << 3)) && !(cfg_b & (1 << 5))) | |
1267 | sio_data->has_fanin |= (1 << 6); /* FANIN6 */ | |
1268 | ||
328716bc JD |
1269 | /* Check which fan outputs are wired */ |
1270 | sio_data->has_fanout = (1 << 0); /* FANOUT0 */ | |
1271 | if (cfg_b & (1 << 0)) | |
1272 | sio_data->has_fanout |= (1 << 3); /* FANOUT3 */ | |
1273 | ||
1274 | cfg = superio_inb(sioaddr, SIOREG_CFC); | |
1275 | if (!(cfg & (1 << 4))) { | |
1276 | if (cfg_b & (1 << 1)) | |
1277 | sio_data->has_fanout |= (1 << 1); /* FANOUT1 */ | |
1278 | if (cfg_b & (1 << 2)) | |
1279 | sio_data->has_fanout |= (1 << 2); /* FANOUT2 */ | |
1280 | } | |
1281 | ||
1282 | /* FANOUT1 and FANOUT2 can each be routed to 2 different pins */ | |
1283 | cfg = superio_inb(sioaddr, SIOREG_CF5); | |
1284 | if (cfg & (1 << 6)) | |
1285 | sio_data->has_fanout |= (1 << 1); /* FANOUT1 */ | |
1286 | if (cfg & (1 << 5)) | |
1287 | sio_data->has_fanout |= (1 << 2); /* FANOUT2 */ | |
1288 | ||
ba224e2c JD |
1289 | exit: |
1290 | superio_exit(sioaddr); | |
1291 | return err; | |
1292 | } | |
1293 | ||
1294 | static int __init pc87427_init(void) | |
1295 | { | |
1296 | int err; | |
4e7d99e1 | 1297 | struct pc87427_sio_data sio_data; |
ba224e2c | 1298 | |
9d32df19 JD |
1299 | if (pc87427_find(0x2e, &sio_data) |
1300 | && pc87427_find(0x4e, &sio_data)) | |
ba224e2c JD |
1301 | return -ENODEV; |
1302 | ||
1303 | err = platform_driver_register(&pc87427_driver); | |
1304 | if (err) | |
1305 | goto exit; | |
1306 | ||
1307 | /* Sets global pdev as a side effect */ | |
9d32df19 | 1308 | err = pc87427_device_add(&sio_data); |
ba224e2c JD |
1309 | if (err) |
1310 | goto exit_driver; | |
1311 | ||
1312 | return 0; | |
1313 | ||
1314 | exit_driver: | |
1315 | platform_driver_unregister(&pc87427_driver); | |
1316 | exit: | |
1317 | return err; | |
1318 | } | |
1319 | ||
1320 | static void __exit pc87427_exit(void) | |
1321 | { | |
1322 | platform_device_unregister(pdev); | |
1323 | platform_driver_unregister(&pc87427_driver); | |
1324 | } | |
1325 | ||
7c81c60f | 1326 | MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>"); |
ba224e2c JD |
1327 | MODULE_DESCRIPTION("PC87427 hardware monitoring driver"); |
1328 | MODULE_LICENSE("GPL"); | |
1329 | ||
1330 | module_init(pc87427_init); | |
1331 | module_exit(pc87427_exit); |