Commit | Line | Data |
---|---|---|
c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
fffd80cc AS |
2 | /* |
3 | * Copyright (C) 2011 Alexander Stein <alexander.stein@systec-electronic.com> | |
4 | * | |
162a8dfe | 5 | * The LM95245 is a sensor chip made by TI / National Semiconductor. |
fffd80cc | 6 | * It reports up to two temperatures (its own plus an external one). |
fffd80cc AS |
7 | * |
8 | * This driver is based on lm95241.c | |
fffd80cc AS |
9 | */ |
10 | ||
c0a4b9ec | 11 | #include <linux/err.h> |
fffd80cc | 12 | #include <linux/init.h> |
fffd80cc | 13 | #include <linux/hwmon.h> |
c0a4b9ec GR |
14 | #include <linux/i2c.h> |
15 | #include <linux/module.h> | |
fffd80cc | 16 | #include <linux/mutex.h> |
c0a4b9ec GR |
17 | #include <linux/regmap.h> |
18 | #include <linux/slab.h> | |
fffd80cc | 19 | |
fffd80cc AS |
20 | static const unsigned short normal_i2c[] = { |
21 | 0x18, 0x19, 0x29, 0x4c, 0x4d, I2C_CLIENT_END }; | |
22 | ||
23 | /* LM95245 registers */ | |
24 | /* general registers */ | |
25 | #define LM95245_REG_RW_CONFIG1 0x03 | |
26 | #define LM95245_REG_RW_CONVERS_RATE 0x04 | |
27 | #define LM95245_REG_W_ONE_SHOT 0x0F | |
28 | ||
29 | /* diode configuration */ | |
30 | #define LM95245_REG_RW_CONFIG2 0xBF | |
31 | #define LM95245_REG_RW_REMOTE_OFFH 0x11 | |
32 | #define LM95245_REG_RW_REMOTE_OFFL 0x12 | |
33 | ||
34 | /* status registers */ | |
35 | #define LM95245_REG_R_STATUS1 0x02 | |
36 | #define LM95245_REG_R_STATUS2 0x33 | |
37 | ||
38 | /* limit registers */ | |
39 | #define LM95245_REG_RW_REMOTE_OS_LIMIT 0x07 | |
40 | #define LM95245_REG_RW_LOCAL_OS_TCRIT_LIMIT 0x20 | |
41 | #define LM95245_REG_RW_REMOTE_TCRIT_LIMIT 0x19 | |
42 | #define LM95245_REG_RW_COMMON_HYSTERESIS 0x21 | |
43 | ||
44 | /* temperature signed */ | |
45 | #define LM95245_REG_R_LOCAL_TEMPH_S 0x00 | |
46 | #define LM95245_REG_R_LOCAL_TEMPL_S 0x30 | |
47 | #define LM95245_REG_R_REMOTE_TEMPH_S 0x01 | |
48 | #define LM95245_REG_R_REMOTE_TEMPL_S 0x10 | |
49 | /* temperature unsigned */ | |
50 | #define LM95245_REG_R_REMOTE_TEMPH_U 0x31 | |
51 | #define LM95245_REG_R_REMOTE_TEMPL_U 0x32 | |
52 | ||
53 | /* id registers */ | |
54 | #define LM95245_REG_R_MAN_ID 0xFE | |
55 | #define LM95245_REG_R_CHIP_ID 0xFF | |
56 | ||
57 | /* LM95245 specific bitfields */ | |
58 | #define CFG_STOP 0x40 | |
59 | #define CFG_REMOTE_TCRIT_MASK 0x10 | |
60 | #define CFG_REMOTE_OS_MASK 0x08 | |
61 | #define CFG_LOCAL_TCRIT_MASK 0x04 | |
62 | #define CFG_LOCAL_OS_MASK 0x02 | |
63 | ||
64 | #define CFG2_OS_A0 0x40 | |
65 | #define CFG2_DIODE_FAULT_OS 0x20 | |
66 | #define CFG2_DIODE_FAULT_TCRIT 0x10 | |
67 | #define CFG2_REMOTE_TT 0x08 | |
68 | #define CFG2_REMOTE_FILTER_DIS 0x00 | |
69 | #define CFG2_REMOTE_FILTER_EN 0x06 | |
70 | ||
71 | /* conversation rate in ms */ | |
72 | #define RATE_CR0063 0x00 | |
73 | #define RATE_CR0364 0x01 | |
74 | #define RATE_CR1000 0x02 | |
75 | #define RATE_CR2500 0x03 | |
76 | ||
c0a4b9ec | 77 | #define STATUS1_ROS 0x10 |
fffd80cc AS |
78 | #define STATUS1_DIODE_FAULT 0x04 |
79 | #define STATUS1_RTCRIT 0x02 | |
80 | #define STATUS1_LOC 0x01 | |
81 | ||
82 | #define MANUFACTURER_ID 0x01 | |
162a8dfe GR |
83 | #define LM95235_REVISION 0xB1 |
84 | #define LM95245_REVISION 0xB3 | |
fffd80cc | 85 | |
fffd80cc AS |
86 | /* Client data (each client gets its own) */ |
87 | struct lm95245_data { | |
c0a4b9ec | 88 | struct regmap *regmap; |
fffd80cc | 89 | struct mutex update_lock; |
c0a4b9ec | 90 | int interval; /* in msecs */ |
fffd80cc AS |
91 | }; |
92 | ||
93 | /* Conversions */ | |
94 | static int temp_from_reg_unsigned(u8 val_h, u8 val_l) | |
95 | { | |
96 | return val_h * 1000 + val_l * 1000 / 256; | |
97 | } | |
98 | ||
99 | static int temp_from_reg_signed(u8 val_h, u8 val_l) | |
100 | { | |
101 | if (val_h & 0x80) | |
102 | return (val_h - 0x100) * 1000; | |
103 | return temp_from_reg_unsigned(val_h, val_l); | |
104 | } | |
105 | ||
c0a4b9ec | 106 | static int lm95245_read_conversion_rate(struct lm95245_data *data) |
fffd80cc | 107 | { |
c0a4b9ec GR |
108 | unsigned int rate; |
109 | int ret; | |
fffd80cc | 110 | |
c0a4b9ec GR |
111 | ret = regmap_read(data->regmap, LM95245_REG_RW_CONVERS_RATE, &rate); |
112 | if (ret < 0) | |
113 | return ret; | |
fffd80cc AS |
114 | |
115 | switch (rate) { | |
116 | case RATE_CR0063: | |
c0a4b9ec | 117 | data->interval = 63; |
fffd80cc AS |
118 | break; |
119 | case RATE_CR0364: | |
c0a4b9ec | 120 | data->interval = 364; |
fffd80cc AS |
121 | break; |
122 | case RATE_CR1000: | |
c0a4b9ec | 123 | data->interval = 1000; |
fffd80cc AS |
124 | break; |
125 | case RATE_CR2500: | |
126 | default: | |
c0a4b9ec | 127 | data->interval = 2500; |
fffd80cc AS |
128 | break; |
129 | } | |
c0a4b9ec | 130 | return 0; |
fffd80cc AS |
131 | } |
132 | ||
c0a4b9ec | 133 | static int lm95245_set_conversion_rate(struct lm95245_data *data, long interval) |
fffd80cc | 134 | { |
c0a4b9ec | 135 | int ret, rate; |
fffd80cc AS |
136 | |
137 | if (interval <= 63) { | |
138 | interval = 63; | |
139 | rate = RATE_CR0063; | |
140 | } else if (interval <= 364) { | |
141 | interval = 364; | |
142 | rate = RATE_CR0364; | |
143 | } else if (interval <= 1000) { | |
144 | interval = 1000; | |
145 | rate = RATE_CR1000; | |
146 | } else { | |
147 | interval = 2500; | |
148 | rate = RATE_CR2500; | |
149 | } | |
150 | ||
c0a4b9ec GR |
151 | ret = regmap_write(data->regmap, LM95245_REG_RW_CONVERS_RATE, rate); |
152 | if (ret < 0) | |
153 | return ret; | |
fffd80cc | 154 | |
c0a4b9ec GR |
155 | data->interval = interval; |
156 | return 0; | |
fffd80cc AS |
157 | } |
158 | ||
c0a4b9ec GR |
159 | static int lm95245_read_temp(struct device *dev, u32 attr, int channel, |
160 | long *val) | |
fffd80cc | 161 | { |
7276d55e | 162 | struct lm95245_data *data = dev_get_drvdata(dev); |
c0a4b9ec GR |
163 | struct regmap *regmap = data->regmap; |
164 | int ret, regl, regh, regvall, regvalh; | |
165 | ||
166 | switch (attr) { | |
167 | case hwmon_temp_input: | |
168 | regl = channel ? LM95245_REG_R_REMOTE_TEMPL_S : | |
169 | LM95245_REG_R_LOCAL_TEMPL_S; | |
170 | regh = channel ? LM95245_REG_R_REMOTE_TEMPH_S : | |
171 | LM95245_REG_R_LOCAL_TEMPH_S; | |
172 | ret = regmap_read(regmap, regl, ®vall); | |
173 | if (ret < 0) | |
174 | return ret; | |
175 | ret = regmap_read(regmap, regh, ®valh); | |
176 | if (ret < 0) | |
177 | return ret; | |
178 | /* | |
179 | * Local temp is always signed. | |
180 | * Remote temp has both signed and unsigned data. | |
181 | * Use signed calculation for remote if signed bit is set | |
182 | * or if reported temperature is below signed limit. | |
183 | */ | |
184 | if (!channel || (regvalh & 0x80) || regvalh < 0x7f) { | |
185 | *val = temp_from_reg_signed(regvalh, regvall); | |
186 | return 0; | |
187 | } | |
188 | ret = regmap_read(regmap, LM95245_REG_R_REMOTE_TEMPL_U, | |
189 | ®vall); | |
190 | if (ret < 0) | |
191 | return ret; | |
192 | ret = regmap_read(regmap, LM95245_REG_R_REMOTE_TEMPH_U, | |
193 | ®valh); | |
194 | if (ret < 0) | |
195 | return ret; | |
196 | *val = temp_from_reg_unsigned(regvalh, regvall); | |
197 | return 0; | |
198 | case hwmon_temp_max: | |
199 | ret = regmap_read(regmap, LM95245_REG_RW_REMOTE_OS_LIMIT, | |
200 | ®valh); | |
201 | if (ret < 0) | |
202 | return ret; | |
203 | *val = regvalh * 1000; | |
204 | return 0; | |
205 | case hwmon_temp_crit: | |
206 | regh = channel ? LM95245_REG_RW_REMOTE_TCRIT_LIMIT : | |
207 | LM95245_REG_RW_LOCAL_OS_TCRIT_LIMIT; | |
208 | ret = regmap_read(regmap, regh, ®valh); | |
209 | if (ret < 0) | |
210 | return ret; | |
211 | *val = regvalh * 1000; | |
212 | return 0; | |
213 | case hwmon_temp_max_hyst: | |
214 | ret = regmap_read(regmap, LM95245_REG_RW_REMOTE_OS_LIMIT, | |
215 | ®valh); | |
216 | if (ret < 0) | |
217 | return ret; | |
218 | ret = regmap_read(regmap, LM95245_REG_RW_COMMON_HYSTERESIS, | |
219 | ®vall); | |
220 | if (ret < 0) | |
221 | return ret; | |
222 | *val = (regvalh - regvall) * 1000; | |
223 | return 0; | |
224 | case hwmon_temp_crit_hyst: | |
225 | regh = channel ? LM95245_REG_RW_REMOTE_TCRIT_LIMIT : | |
226 | LM95245_REG_RW_LOCAL_OS_TCRIT_LIMIT; | |
227 | ret = regmap_read(regmap, regh, ®valh); | |
228 | if (ret < 0) | |
229 | return ret; | |
230 | ret = regmap_read(regmap, LM95245_REG_RW_COMMON_HYSTERESIS, | |
231 | ®vall); | |
232 | if (ret < 0) | |
233 | return ret; | |
234 | *val = (regvalh - regvall) * 1000; | |
235 | return 0; | |
236 | case hwmon_temp_type: | |
237 | ret = regmap_read(regmap, LM95245_REG_RW_CONFIG2, ®valh); | |
238 | if (ret < 0) | |
239 | return ret; | |
240 | *val = (regvalh & CFG2_REMOTE_TT) ? 1 : 2; | |
241 | return 0; | |
242 | case hwmon_temp_offset: | |
243 | ret = regmap_read(regmap, LM95245_REG_RW_REMOTE_OFFL, | |
244 | ®vall); | |
245 | if (ret < 0) | |
246 | return ret; | |
247 | ret = regmap_read(regmap, LM95245_REG_RW_REMOTE_OFFH, | |
248 | ®valh); | |
249 | if (ret < 0) | |
250 | return ret; | |
251 | *val = temp_from_reg_signed(regvalh, regvall); | |
252 | return 0; | |
253 | case hwmon_temp_max_alarm: | |
254 | ret = regmap_read(regmap, LM95245_REG_R_STATUS1, ®valh); | |
255 | if (ret < 0) | |
256 | return ret; | |
257 | *val = !!(regvalh & STATUS1_ROS); | |
258 | return 0; | |
259 | case hwmon_temp_crit_alarm: | |
260 | ret = regmap_read(regmap, LM95245_REG_R_STATUS1, ®valh); | |
261 | if (ret < 0) | |
262 | return ret; | |
263 | *val = !!(regvalh & (channel ? STATUS1_RTCRIT : STATUS1_LOC)); | |
264 | return 0; | |
265 | case hwmon_temp_fault: | |
266 | ret = regmap_read(regmap, LM95245_REG_R_STATUS1, ®valh); | |
267 | if (ret < 0) | |
268 | return ret; | |
269 | *val = !!(regvalh & STATUS1_DIODE_FAULT); | |
270 | return 0; | |
271 | default: | |
272 | return -EOPNOTSUPP; | |
273 | } | |
fffd80cc AS |
274 | } |
275 | ||
c0a4b9ec GR |
276 | static int lm95245_write_temp(struct device *dev, u32 attr, int channel, |
277 | long val) | |
408c15ea | 278 | { |
c0a4b9ec GR |
279 | struct lm95245_data *data = dev_get_drvdata(dev); |
280 | struct regmap *regmap = data->regmap; | |
281 | unsigned int regval; | |
282 | int ret, reg; | |
283 | ||
284 | switch (attr) { | |
285 | case hwmon_temp_max: | |
286 | val = clamp_val(val / 1000, 0, 255); | |
287 | ret = regmap_write(regmap, LM95245_REG_RW_REMOTE_OS_LIMIT, val); | |
288 | return ret; | |
289 | case hwmon_temp_crit: | |
290 | reg = channel ? LM95245_REG_RW_REMOTE_TCRIT_LIMIT : | |
291 | LM95245_REG_RW_LOCAL_OS_TCRIT_LIMIT; | |
292 | val = clamp_val(val / 1000, 0, channel ? 255 : 127); | |
293 | ret = regmap_write(regmap, reg, val); | |
294 | return ret; | |
295 | case hwmon_temp_crit_hyst: | |
296 | mutex_lock(&data->update_lock); | |
297 | ret = regmap_read(regmap, LM95245_REG_RW_LOCAL_OS_TCRIT_LIMIT, | |
298 | ®val); | |
299 | if (ret < 0) { | |
300 | mutex_unlock(&data->update_lock); | |
301 | return ret; | |
302 | } | |
303 | /* Clamp to reasonable range to prevent overflow */ | |
304 | val = clamp_val(val, -1000000, 1000000); | |
305 | val = regval - val / 1000; | |
306 | val = clamp_val(val, 0, 31); | |
307 | ret = regmap_write(regmap, LM95245_REG_RW_COMMON_HYSTERESIS, | |
308 | val); | |
309 | mutex_unlock(&data->update_lock); | |
310 | return ret; | |
311 | case hwmon_temp_offset: | |
312 | val = clamp_val(val, -128000, 127875); | |
313 | val = val * 256 / 1000; | |
314 | mutex_lock(&data->update_lock); | |
315 | ret = regmap_write(regmap, LM95245_REG_RW_REMOTE_OFFL, | |
316 | val & 0xe0); | |
317 | if (ret < 0) { | |
318 | mutex_unlock(&data->update_lock); | |
319 | return ret; | |
320 | } | |
321 | ret = regmap_write(regmap, LM95245_REG_RW_REMOTE_OFFH, | |
322 | (val >> 8) & 0xff); | |
323 | mutex_unlock(&data->update_lock); | |
324 | return ret; | |
325 | case hwmon_temp_type: | |
326 | if (val != 1 && val != 2) | |
327 | return -EINVAL; | |
328 | ret = regmap_update_bits(regmap, LM95245_REG_RW_CONFIG2, | |
329 | CFG2_REMOTE_TT, | |
330 | val == 1 ? CFG2_REMOTE_TT : 0); | |
331 | return ret; | |
332 | default: | |
333 | return -EOPNOTSUPP; | |
334 | } | |
408c15ea GR |
335 | } |
336 | ||
c0a4b9ec GR |
337 | static int lm95245_read_chip(struct device *dev, u32 attr, int channel, |
338 | long *val) | |
fffd80cc | 339 | { |
7276d55e | 340 | struct lm95245_data *data = dev_get_drvdata(dev); |
fffd80cc | 341 | |
c0a4b9ec GR |
342 | switch (attr) { |
343 | case hwmon_chip_update_interval: | |
344 | *val = data->interval; | |
345 | return 0; | |
346 | default: | |
347 | return -EOPNOTSUPP; | |
348 | } | |
fffd80cc AS |
349 | } |
350 | ||
c0a4b9ec GR |
351 | static int lm95245_write_chip(struct device *dev, u32 attr, int channel, |
352 | long val) | |
fffd80cc | 353 | { |
7276d55e | 354 | struct lm95245_data *data = dev_get_drvdata(dev); |
c0a4b9ec GR |
355 | int ret; |
356 | ||
357 | switch (attr) { | |
358 | case hwmon_chip_update_interval: | |
359 | mutex_lock(&data->update_lock); | |
360 | ret = lm95245_set_conversion_rate(data, val); | |
361 | mutex_unlock(&data->update_lock); | |
362 | return ret; | |
363 | default: | |
364 | return -EOPNOTSUPP; | |
365 | } | |
fffd80cc AS |
366 | } |
367 | ||
c0a4b9ec GR |
368 | static int lm95245_read(struct device *dev, enum hwmon_sensor_types type, |
369 | u32 attr, int channel, long *val) | |
fffd80cc | 370 | { |
c0a4b9ec GR |
371 | switch (type) { |
372 | case hwmon_chip: | |
373 | return lm95245_read_chip(dev, attr, channel, val); | |
374 | case hwmon_temp: | |
375 | return lm95245_read_temp(dev, attr, channel, val); | |
376 | default: | |
377 | return -EOPNOTSUPP; | |
378 | } | |
fffd80cc AS |
379 | } |
380 | ||
c0a4b9ec GR |
381 | static int lm95245_write(struct device *dev, enum hwmon_sensor_types type, |
382 | u32 attr, int channel, long val) | |
fffd80cc | 383 | { |
c0a4b9ec GR |
384 | switch (type) { |
385 | case hwmon_chip: | |
386 | return lm95245_write_chip(dev, attr, channel, val); | |
387 | case hwmon_temp: | |
388 | return lm95245_write_temp(dev, attr, channel, val); | |
389 | default: | |
390 | return -EOPNOTSUPP; | |
391 | } | |
fffd80cc AS |
392 | } |
393 | ||
c0a4b9ec | 394 | static umode_t lm95245_temp_is_visible(const void *data, u32 attr, int channel) |
fffd80cc | 395 | { |
c0a4b9ec GR |
396 | switch (attr) { |
397 | case hwmon_temp_input: | |
398 | case hwmon_temp_max_alarm: | |
399 | case hwmon_temp_max_hyst: | |
400 | case hwmon_temp_crit_alarm: | |
401 | case hwmon_temp_fault: | |
5a2d18cb | 402 | return 0444; |
c0a4b9ec GR |
403 | case hwmon_temp_type: |
404 | case hwmon_temp_max: | |
405 | case hwmon_temp_crit: | |
406 | case hwmon_temp_offset: | |
5a2d18cb | 407 | return 0644; |
c0a4b9ec | 408 | case hwmon_temp_crit_hyst: |
5a2d18cb | 409 | return (channel == 0) ? 0644 : 0444; |
c0a4b9ec GR |
410 | default: |
411 | return 0; | |
412 | } | |
fffd80cc AS |
413 | } |
414 | ||
c0a4b9ec GR |
415 | static umode_t lm95245_is_visible(const void *data, |
416 | enum hwmon_sensor_types type, | |
417 | u32 attr, int channel) | |
fffd80cc | 418 | { |
c0a4b9ec GR |
419 | switch (type) { |
420 | case hwmon_chip: | |
421 | switch (attr) { | |
422 | case hwmon_chip_update_interval: | |
5a2d18cb | 423 | return 0644; |
c0a4b9ec GR |
424 | default: |
425 | return 0; | |
426 | } | |
427 | case hwmon_temp: | |
428 | return lm95245_temp_is_visible(data, attr, channel); | |
429 | default: | |
430 | return 0; | |
431 | } | |
fffd80cc AS |
432 | } |
433 | ||
fffd80cc AS |
434 | /* Return 0 if detection is successful, -ENODEV otherwise */ |
435 | static int lm95245_detect(struct i2c_client *new_client, | |
436 | struct i2c_board_info *info) | |
437 | { | |
438 | struct i2c_adapter *adapter = new_client->adapter; | |
162a8dfe GR |
439 | int address = new_client->addr; |
440 | const char *name; | |
441 | int rev, id; | |
fffd80cc AS |
442 | |
443 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | |
444 | return -ENODEV; | |
445 | ||
162a8dfe GR |
446 | id = i2c_smbus_read_byte_data(new_client, LM95245_REG_R_MAN_ID); |
447 | if (id != MANUFACTURER_ID) | |
fffd80cc AS |
448 | return -ENODEV; |
449 | ||
162a8dfe GR |
450 | rev = i2c_smbus_read_byte_data(new_client, LM95245_REG_R_CHIP_ID); |
451 | switch (rev) { | |
452 | case LM95235_REVISION: | |
453 | if (address != 0x18 && address != 0x29 && address != 0x4c) | |
454 | return -ENODEV; | |
455 | name = "lm95235"; | |
456 | break; | |
457 | case LM95245_REVISION: | |
458 | name = "lm95245"; | |
459 | break; | |
460 | default: | |
461 | return -ENODEV; | |
462 | } | |
463 | ||
464 | strlcpy(info->type, name, I2C_NAME_SIZE); | |
fffd80cc AS |
465 | return 0; |
466 | } | |
467 | ||
c0a4b9ec | 468 | static int lm95245_init_client(struct lm95245_data *data) |
fffd80cc | 469 | { |
c0a4b9ec GR |
470 | int ret; |
471 | ||
472 | ret = lm95245_read_conversion_rate(data); | |
473 | if (ret < 0) | |
474 | return ret; | |
475 | ||
476 | return regmap_update_bits(data->regmap, LM95245_REG_RW_CONFIG1, | |
477 | CFG_STOP, 0); | |
478 | } | |
479 | ||
480 | static bool lm95245_is_writeable_reg(struct device *dev, unsigned int reg) | |
481 | { | |
482 | switch (reg) { | |
483 | case LM95245_REG_RW_CONFIG1: | |
484 | case LM95245_REG_RW_CONVERS_RATE: | |
485 | case LM95245_REG_W_ONE_SHOT: | |
486 | case LM95245_REG_RW_CONFIG2: | |
487 | case LM95245_REG_RW_REMOTE_OFFH: | |
488 | case LM95245_REG_RW_REMOTE_OFFL: | |
489 | case LM95245_REG_RW_REMOTE_OS_LIMIT: | |
490 | case LM95245_REG_RW_LOCAL_OS_TCRIT_LIMIT: | |
491 | case LM95245_REG_RW_REMOTE_TCRIT_LIMIT: | |
492 | case LM95245_REG_RW_COMMON_HYSTERESIS: | |
493 | return true; | |
494 | default: | |
495 | return false; | |
496 | } | |
497 | } | |
498 | ||
499 | static bool lm95245_is_volatile_reg(struct device *dev, unsigned int reg) | |
500 | { | |
501 | switch (reg) { | |
502 | case LM95245_REG_R_STATUS1: | |
503 | case LM95245_REG_R_STATUS2: | |
504 | case LM95245_REG_R_LOCAL_TEMPH_S: | |
505 | case LM95245_REG_R_LOCAL_TEMPL_S: | |
506 | case LM95245_REG_R_REMOTE_TEMPH_S: | |
507 | case LM95245_REG_R_REMOTE_TEMPL_S: | |
508 | case LM95245_REG_R_REMOTE_TEMPH_U: | |
509 | case LM95245_REG_R_REMOTE_TEMPL_U: | |
510 | return true; | |
511 | default: | |
512 | return false; | |
fffd80cc AS |
513 | } |
514 | } | |
515 | ||
c0a4b9ec GR |
516 | static const struct regmap_config lm95245_regmap_config = { |
517 | .reg_bits = 8, | |
518 | .val_bits = 8, | |
519 | .writeable_reg = lm95245_is_writeable_reg, | |
520 | .volatile_reg = lm95245_is_volatile_reg, | |
521 | .cache_type = REGCACHE_RBTREE, | |
1c96a2f6 DF |
522 | .use_single_read = true, |
523 | .use_single_write = true, | |
c0a4b9ec GR |
524 | }; |
525 | ||
c0a4b9ec | 526 | static const struct hwmon_channel_info *lm95245_info[] = { |
7aea0064 GR |
527 | HWMON_CHANNEL_INFO(chip, |
528 | HWMON_C_UPDATE_INTERVAL), | |
529 | HWMON_CHANNEL_INFO(temp, | |
530 | HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_CRIT_HYST | | |
531 | HWMON_T_CRIT_ALARM, | |
532 | HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST | | |
533 | HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_FAULT | | |
534 | HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | | |
535 | HWMON_T_TYPE | HWMON_T_OFFSET), | |
c0a4b9ec GR |
536 | NULL |
537 | }; | |
538 | ||
539 | static const struct hwmon_ops lm95245_hwmon_ops = { | |
540 | .is_visible = lm95245_is_visible, | |
541 | .read = lm95245_read, | |
542 | .write = lm95245_write, | |
543 | }; | |
544 | ||
545 | static const struct hwmon_chip_info lm95245_chip_info = { | |
546 | .ops = &lm95245_hwmon_ops, | |
547 | .info = lm95245_info, | |
548 | }; | |
549 | ||
67487038 | 550 | static int lm95245_probe(struct i2c_client *client) |
fffd80cc | 551 | { |
7276d55e | 552 | struct device *dev = &client->dev; |
fffd80cc | 553 | struct lm95245_data *data; |
7276d55e | 554 | struct device *hwmon_dev; |
c0a4b9ec | 555 | int ret; |
fffd80cc | 556 | |
7276d55e | 557 | data = devm_kzalloc(dev, sizeof(struct lm95245_data), GFP_KERNEL); |
a8dd946c GR |
558 | if (!data) |
559 | return -ENOMEM; | |
fffd80cc | 560 | |
c0a4b9ec GR |
561 | data->regmap = devm_regmap_init_i2c(client, &lm95245_regmap_config); |
562 | if (IS_ERR(data->regmap)) | |
563 | return PTR_ERR(data->regmap); | |
564 | ||
fffd80cc AS |
565 | mutex_init(&data->update_lock); |
566 | ||
567 | /* Initialize the LM95245 chip */ | |
c0a4b9ec GR |
568 | ret = lm95245_init_client(data); |
569 | if (ret < 0) | |
570 | return ret; | |
571 | ||
572 | hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, | |
573 | data, | |
574 | &lm95245_chip_info, | |
575 | NULL); | |
7276d55e | 576 | return PTR_ERR_OR_ZERO(hwmon_dev); |
fffd80cc AS |
577 | } |
578 | ||
579 | /* Driver data (common to all clients) */ | |
580 | static const struct i2c_device_id lm95245_id[] = { | |
162a8dfe GR |
581 | { "lm95235", 0 }, |
582 | { "lm95245", 0 }, | |
fffd80cc AS |
583 | { } |
584 | }; | |
585 | MODULE_DEVICE_TABLE(i2c, lm95245_id); | |
586 | ||
0e09e9f9 | 587 | static const struct of_device_id __maybe_unused lm95245_of_match[] = { |
5ada7055 JMC |
588 | { .compatible = "national,lm95235" }, |
589 | { .compatible = "national,lm95245" }, | |
590 | { }, | |
591 | }; | |
592 | MODULE_DEVICE_TABLE(of, lm95245_of_match); | |
593 | ||
fffd80cc AS |
594 | static struct i2c_driver lm95245_driver = { |
595 | .class = I2C_CLASS_HWMON, | |
596 | .driver = { | |
162a8dfe | 597 | .name = "lm95245", |
5ada7055 | 598 | .of_match_table = of_match_ptr(lm95245_of_match), |
fffd80cc | 599 | }, |
67487038 | 600 | .probe_new = lm95245_probe, |
fffd80cc AS |
601 | .id_table = lm95245_id, |
602 | .detect = lm95245_detect, | |
603 | .address_list = normal_i2c, | |
604 | }; | |
605 | ||
f0967eea | 606 | module_i2c_driver(lm95245_driver); |
fffd80cc AS |
607 | |
608 | MODULE_AUTHOR("Alexander Stein <alexander.stein@systec-electronic.com>"); | |
162a8dfe | 609 | MODULE_DESCRIPTION("LM95235/LM95245 sensor driver"); |
fffd80cc | 610 | MODULE_LICENSE("GPL"); |