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c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
06160327 | 2 | /* |
0f1deb4b | 3 | * Copyright (C) 2008, 2010 Davide Rizzo <elpa.rizzo@gmail.com> |
06160327 | 4 | * |
0f1deb4b DR |
5 | * The LM95241 is a sensor chip made by National Semiconductors. |
6 | * It reports up to three temperatures (its own plus up to two external ones). | |
7 | * Complete datasheet can be obtained from National's website at: | |
06160327 | 8 | * http://www.national.com/ds.cgi/LM/LM95241.pdf |
06160327 DR |
9 | */ |
10 | ||
e8172a93 | 11 | #include <linux/bitops.h> |
4b2ea08b GR |
12 | #include <linux/err.h> |
13 | #include <linux/i2c.h> | |
06160327 | 14 | #include <linux/init.h> |
06160327 | 15 | #include <linux/jiffies.h> |
06160327 | 16 | #include <linux/hwmon.h> |
4b2ea08b | 17 | #include <linux/module.h> |
06160327 | 18 | #include <linux/mutex.h> |
4b2ea08b | 19 | #include <linux/slab.h> |
06160327 | 20 | |
0f1deb4b DR |
21 | #define DEVNAME "lm95241" |
22 | ||
06160327 | 23 | static const unsigned short normal_i2c[] = { |
0f1deb4b | 24 | 0x19, 0x2a, 0x2b, I2C_CLIENT_END }; |
06160327 | 25 | |
06160327 DR |
26 | /* LM95241 registers */ |
27 | #define LM95241_REG_R_MAN_ID 0xFE | |
28 | #define LM95241_REG_R_CHIP_ID 0xFF | |
29 | #define LM95241_REG_R_STATUS 0x02 | |
30 | #define LM95241_REG_RW_CONFIG 0x03 | |
31 | #define LM95241_REG_RW_REM_FILTER 0x06 | |
32 | #define LM95241_REG_RW_TRUTHERM 0x07 | |
0f1deb4b | 33 | #define LM95241_REG_W_ONE_SHOT 0x0F |
06160327 DR |
34 | #define LM95241_REG_R_LOCAL_TEMPH 0x10 |
35 | #define LM95241_REG_R_REMOTE1_TEMPH 0x11 | |
36 | #define LM95241_REG_R_REMOTE2_TEMPH 0x12 | |
37 | #define LM95241_REG_R_LOCAL_TEMPL 0x20 | |
38 | #define LM95241_REG_R_REMOTE1_TEMPL 0x21 | |
39 | #define LM95241_REG_R_REMOTE2_TEMPL 0x22 | |
40 | #define LM95241_REG_RW_REMOTE_MODEL 0x30 | |
41 | ||
42 | /* LM95241 specific bitfields */ | |
e8172a93 GR |
43 | #define CFG_STOP BIT(6) |
44 | #define CFG_CR0076 0x00 | |
45 | #define CFG_CR0182 BIT(4) | |
46 | #define CFG_CR1000 BIT(5) | |
47 | #define CFG_CR2700 (BIT(4) | BIT(5)) | |
48 | #define CFG_CRMASK (BIT(4) | BIT(5)) | |
49 | #define R1MS_MASK BIT(0) | |
50 | #define R2MS_MASK BIT(2) | |
51 | #define R1DF_MASK BIT(1) | |
52 | #define R2DF_MASK BIT(2) | |
53 | #define R1FE_MASK BIT(0) | |
54 | #define R2FE_MASK BIT(2) | |
55 | #define R1DM BIT(0) | |
56 | #define R2DM BIT(1) | |
57 | #define TT1_SHIFT 0 | |
58 | #define TT2_SHIFT 4 | |
59 | #define TT_OFF 0 | |
60 | #define TT_ON 1 | |
61 | #define TT_MASK 7 | |
8c1d0419 GR |
62 | #define NATSEMI_MAN_ID 0x01 |
63 | #define LM95231_CHIP_ID 0xA1 | |
64 | #define LM95241_CHIP_ID 0xA4 | |
06160327 | 65 | |
0f1deb4b DR |
66 | static const u8 lm95241_reg_address[] = { |
67 | LM95241_REG_R_LOCAL_TEMPH, | |
68 | LM95241_REG_R_LOCAL_TEMPL, | |
69 | LM95241_REG_R_REMOTE1_TEMPH, | |
70 | LM95241_REG_R_REMOTE1_TEMPL, | |
71 | LM95241_REG_R_REMOTE2_TEMPH, | |
72 | LM95241_REG_R_REMOTE2_TEMPL | |
73 | }; | |
06160327 | 74 | |
06160327 DR |
75 | /* Client data (each client gets its own) */ |
76 | struct lm95241_data { | |
f809621e | 77 | struct i2c_client *client; |
06160327 | 78 | struct mutex update_lock; |
f48ccb26 GR |
79 | unsigned long last_updated; /* in jiffies */ |
80 | unsigned long interval; /* in milli-seconds */ | |
0f1deb4b | 81 | char valid; /* zero until following fields are valid */ |
06160327 | 82 | /* registers values */ |
0f1deb4b | 83 | u8 temp[ARRAY_SIZE(lm95241_reg_address)]; |
090a7f8e | 84 | u8 status, config, model, trutherm; |
06160327 DR |
85 | }; |
86 | ||
0f1deb4b | 87 | /* Conversions */ |
0c2a40e2 | 88 | static int temp_from_reg_signed(u8 val_h, u8 val_l) |
0f1deb4b | 89 | { |
0c2a40e2 GR |
90 | s16 val_hl = (val_h << 8) | val_l; |
91 | return val_hl * 1000 / 256; | |
92 | } | |
93 | ||
94 | static int temp_from_reg_unsigned(u8 val_h, u8 val_l) | |
95 | { | |
96 | u16 val_hl = (val_h << 8) | val_l; | |
97 | return val_hl * 1000 / 256; | |
0f1deb4b DR |
98 | } |
99 | ||
100 | static struct lm95241_data *lm95241_update_device(struct device *dev) | |
101 | { | |
f809621e GR |
102 | struct lm95241_data *data = dev_get_drvdata(dev); |
103 | struct i2c_client *client = data->client; | |
0f1deb4b DR |
104 | |
105 | mutex_lock(&data->update_lock); | |
106 | ||
f48ccb26 GR |
107 | if (time_after(jiffies, data->last_updated |
108 | + msecs_to_jiffies(data->interval)) || | |
0f1deb4b DR |
109 | !data->valid) { |
110 | int i; | |
111 | ||
f809621e | 112 | dev_dbg(dev, "Updating lm95241 data.\n"); |
0f1deb4b DR |
113 | for (i = 0; i < ARRAY_SIZE(lm95241_reg_address); i++) |
114 | data->temp[i] | |
115 | = i2c_smbus_read_byte_data(client, | |
116 | lm95241_reg_address[i]); | |
090a7f8e GR |
117 | |
118 | data->status = i2c_smbus_read_byte_data(client, | |
119 | LM95241_REG_R_STATUS); | |
0f1deb4b DR |
120 | data->last_updated = jiffies; |
121 | data->valid = 1; | |
122 | } | |
123 | ||
124 | mutex_unlock(&data->update_lock); | |
125 | ||
126 | return data; | |
127 | } | |
128 | ||
3e904628 GR |
129 | static int lm95241_read_chip(struct device *dev, u32 attr, int channel, |
130 | long *val) | |
06160327 | 131 | { |
f809621e | 132 | struct lm95241_data *data = dev_get_drvdata(dev); |
06160327 | 133 | |
3e904628 GR |
134 | switch (attr) { |
135 | case hwmon_chip_update_interval: | |
136 | *val = data->interval; | |
137 | return 0; | |
138 | default: | |
139 | return -EOPNOTSUPP; | |
140 | } | |
06160327 DR |
141 | } |
142 | ||
3e904628 GR |
143 | static int lm95241_read_temp(struct device *dev, u32 attr, int channel, |
144 | long *val) | |
06160327 | 145 | { |
3e904628 | 146 | struct lm95241_data *data = lm95241_update_device(dev); |
0f1deb4b | 147 | |
3e904628 GR |
148 | switch (attr) { |
149 | case hwmon_temp_input: | |
150 | if (!channel || (data->config & BIT(channel - 1))) | |
151 | *val = temp_from_reg_signed(data->temp[channel * 2], | |
152 | data->temp[channel * 2 + 1]); | |
153 | else | |
154 | *val = temp_from_reg_unsigned(data->temp[channel * 2], | |
155 | data->temp[channel * 2 + 1]); | |
156 | return 0; | |
157 | case hwmon_temp_min: | |
158 | if (channel == 1) | |
159 | *val = (data->config & R1DF_MASK) ? -128000 : 0; | |
160 | else | |
161 | *val = (data->config & R2DF_MASK) ? -128000 : 0; | |
162 | return 0; | |
163 | case hwmon_temp_max: | |
164 | if (channel == 1) | |
165 | *val = (data->config & R1DF_MASK) ? 127875 : 255875; | |
166 | else | |
167 | *val = (data->config & R2DF_MASK) ? 127875 : 255875; | |
168 | return 0; | |
169 | case hwmon_temp_type: | |
170 | if (channel == 1) | |
171 | *val = (data->model & R1MS_MASK) ? 1 : 2; | |
172 | else | |
173 | *val = (data->model & R2MS_MASK) ? 1 : 2; | |
174 | return 0; | |
175 | case hwmon_temp_fault: | |
176 | if (channel == 1) | |
177 | *val = !!(data->status & R1DM); | |
178 | else | |
179 | *val = !!(data->status & R2DM); | |
180 | return 0; | |
181 | default: | |
182 | return -EOPNOTSUPP; | |
0f1deb4b | 183 | } |
06160327 DR |
184 | } |
185 | ||
3e904628 GR |
186 | static int lm95241_read(struct device *dev, enum hwmon_sensor_types type, |
187 | u32 attr, int channel, long *val) | |
0f1deb4b | 188 | { |
3e904628 GR |
189 | switch (type) { |
190 | case hwmon_chip: | |
191 | return lm95241_read_chip(dev, attr, channel, val); | |
192 | case hwmon_temp: | |
193 | return lm95241_read_temp(dev, attr, channel, val); | |
194 | default: | |
195 | return -EOPNOTSUPP; | |
196 | } | |
06160327 | 197 | } |
0f1deb4b | 198 | |
3e904628 GR |
199 | static int lm95241_write_chip(struct device *dev, u32 attr, int channel, |
200 | long val) | |
0f1deb4b | 201 | { |
f809621e | 202 | struct lm95241_data *data = dev_get_drvdata(dev); |
3e904628 GR |
203 | int convrate; |
204 | u8 config; | |
205 | int ret; | |
0f1deb4b DR |
206 | |
207 | mutex_lock(&data->update_lock); | |
208 | ||
3e904628 GR |
209 | switch (attr) { |
210 | case hwmon_chip_update_interval: | |
211 | config = data->config & ~CFG_CRMASK; | |
212 | if (val < 130) { | |
213 | convrate = 76; | |
214 | config |= CFG_CR0076; | |
215 | } else if (val < 590) { | |
216 | convrate = 182; | |
217 | config |= CFG_CR0182; | |
218 | } else if (val < 1850) { | |
219 | convrate = 1000; | |
220 | config |= CFG_CR1000; | |
221 | } else { | |
222 | convrate = 2700; | |
223 | config |= CFG_CR2700; | |
224 | } | |
225 | data->interval = convrate; | |
226 | data->config = config; | |
227 | ret = i2c_smbus_write_byte_data(data->client, | |
228 | LM95241_REG_RW_CONFIG, config); | |
229 | break; | |
230 | default: | |
231 | ret = -EOPNOTSUPP; | |
232 | break; | |
233 | } | |
0f1deb4b | 234 | mutex_unlock(&data->update_lock); |
3e904628 | 235 | return ret; |
06160327 | 236 | } |
0f1deb4b | 237 | |
3e904628 GR |
238 | static int lm95241_write_temp(struct device *dev, u32 attr, int channel, |
239 | long val) | |
0f1deb4b | 240 | { |
f809621e | 241 | struct lm95241_data *data = dev_get_drvdata(dev); |
3e904628 GR |
242 | struct i2c_client *client = data->client; |
243 | int ret; | |
0f1deb4b DR |
244 | |
245 | mutex_lock(&data->update_lock); | |
246 | ||
3e904628 GR |
247 | switch (attr) { |
248 | case hwmon_temp_min: | |
249 | if (channel == 1) { | |
250 | if (val < 0) | |
251 | data->config |= R1DF_MASK; | |
252 | else | |
253 | data->config &= ~R1DF_MASK; | |
254 | } else { | |
255 | if (val < 0) | |
256 | data->config |= R2DF_MASK; | |
257 | else | |
258 | data->config &= ~R2DF_MASK; | |
259 | } | |
260 | data->valid = 0; | |
261 | ret = i2c_smbus_write_byte_data(client, LM95241_REG_RW_CONFIG, | |
262 | data->config); | |
263 | break; | |
264 | case hwmon_temp_max: | |
265 | if (channel == 1) { | |
266 | if (val <= 127875) | |
267 | data->config |= R1DF_MASK; | |
268 | else | |
269 | data->config &= ~R1DF_MASK; | |
270 | } else { | |
271 | if (val <= 127875) | |
272 | data->config |= R2DF_MASK; | |
273 | else | |
274 | data->config &= ~R2DF_MASK; | |
275 | } | |
276 | data->valid = 0; | |
277 | ret = i2c_smbus_write_byte_data(client, LM95241_REG_RW_CONFIG, | |
278 | data->config); | |
279 | break; | |
280 | case hwmon_temp_type: | |
281 | if (val != 1 && val != 2) { | |
282 | ret = -EINVAL; | |
283 | break; | |
284 | } | |
285 | if (channel == 1) { | |
286 | data->trutherm &= ~(TT_MASK << TT1_SHIFT); | |
287 | if (val == 1) { | |
288 | data->model |= R1MS_MASK; | |
289 | data->trutherm |= (TT_ON << TT1_SHIFT); | |
290 | } else { | |
291 | data->model &= ~R1MS_MASK; | |
292 | data->trutherm |= (TT_OFF << TT1_SHIFT); | |
293 | } | |
294 | } else { | |
295 | data->trutherm &= ~(TT_MASK << TT2_SHIFT); | |
296 | if (val == 1) { | |
297 | data->model |= R2MS_MASK; | |
298 | data->trutherm |= (TT_ON << TT2_SHIFT); | |
299 | } else { | |
300 | data->model &= ~R2MS_MASK; | |
301 | data->trutherm |= (TT_OFF << TT2_SHIFT); | |
302 | } | |
303 | } | |
304 | ret = i2c_smbus_write_byte_data(client, | |
305 | LM95241_REG_RW_REMOTE_MODEL, | |
306 | data->model); | |
307 | if (ret < 0) | |
308 | break; | |
309 | ret = i2c_smbus_write_byte_data(client, LM95241_REG_RW_TRUTHERM, | |
310 | data->trutherm); | |
311 | break; | |
312 | default: | |
313 | ret = -EOPNOTSUPP; | |
314 | break; | |
315 | } | |
0f1deb4b DR |
316 | |
317 | mutex_unlock(&data->update_lock); | |
318 | ||
3e904628 | 319 | return ret; |
090a7f8e GR |
320 | } |
321 | ||
3e904628 GR |
322 | static int lm95241_write(struct device *dev, enum hwmon_sensor_types type, |
323 | u32 attr, int channel, long val) | |
0f1deb4b | 324 | { |
3e904628 GR |
325 | switch (type) { |
326 | case hwmon_chip: | |
327 | return lm95241_write_chip(dev, attr, channel, val); | |
328 | case hwmon_temp: | |
329 | return lm95241_write_temp(dev, attr, channel, val); | |
330 | default: | |
331 | return -EOPNOTSUPP; | |
332 | } | |
06160327 | 333 | } |
0f1deb4b | 334 | |
3e904628 GR |
335 | static umode_t lm95241_is_visible(const void *data, |
336 | enum hwmon_sensor_types type, | |
337 | u32 attr, int channel) | |
0f1deb4b | 338 | { |
3e904628 GR |
339 | switch (type) { |
340 | case hwmon_chip: | |
341 | switch (attr) { | |
342 | case hwmon_chip_update_interval: | |
5c06d568 | 343 | return 0644; |
3e904628 GR |
344 | } |
345 | break; | |
346 | case hwmon_temp: | |
347 | switch (attr) { | |
348 | case hwmon_temp_input: | |
5c06d568 | 349 | return 0444; |
3e904628 | 350 | case hwmon_temp_fault: |
5c06d568 | 351 | return 0444; |
3e904628 GR |
352 | case hwmon_temp_min: |
353 | case hwmon_temp_max: | |
354 | case hwmon_temp_type: | |
5c06d568 | 355 | return 0644; |
3e904628 GR |
356 | } |
357 | break; | |
358 | default: | |
359 | break; | |
f48ccb26 | 360 | } |
3e904628 | 361 | return 0; |
06160327 | 362 | } |
0f1deb4b | 363 | |
797eaa4b | 364 | /* Return 0 if detection is successful, -ENODEV otherwise */ |
310ec792 | 365 | static int lm95241_detect(struct i2c_client *new_client, |
797eaa4b | 366 | struct i2c_board_info *info) |
06160327 | 367 | { |
797eaa4b | 368 | struct i2c_adapter *adapter = new_client->adapter; |
52df6440 | 369 | const char *name; |
8c1d0419 | 370 | int mfg_id, chip_id; |
06160327 DR |
371 | |
372 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | |
797eaa4b | 373 | return -ENODEV; |
06160327 | 374 | |
8c1d0419 GR |
375 | mfg_id = i2c_smbus_read_byte_data(new_client, LM95241_REG_R_MAN_ID); |
376 | if (mfg_id != NATSEMI_MAN_ID) | |
377 | return -ENODEV; | |
378 | ||
379 | chip_id = i2c_smbus_read_byte_data(new_client, LM95241_REG_R_CHIP_ID); | |
380 | switch (chip_id) { | |
381 | case LM95231_CHIP_ID: | |
382 | name = "lm95231"; | |
383 | break; | |
384 | case LM95241_CHIP_ID: | |
385 | name = "lm95241"; | |
386 | break; | |
387 | default: | |
52df6440 | 388 | return -ENODEV; |
06160327 DR |
389 | } |
390 | ||
797eaa4b | 391 | /* Fill the i2c board info */ |
797eaa4b JD |
392 | strlcpy(info->type, name, I2C_NAME_SIZE); |
393 | return 0; | |
394 | } | |
06160327 | 395 | |
f809621e GR |
396 | static void lm95241_init_client(struct i2c_client *client, |
397 | struct lm95241_data *data) | |
0f1deb4b | 398 | { |
f48ccb26 GR |
399 | data->interval = 1000; |
400 | data->config = CFG_CR1000; | |
0f1deb4b DR |
401 | data->trutherm = (TT_OFF << TT1_SHIFT) | (TT_OFF << TT2_SHIFT); |
402 | ||
403 | i2c_smbus_write_byte_data(client, LM95241_REG_RW_CONFIG, data->config); | |
404 | i2c_smbus_write_byte_data(client, LM95241_REG_RW_REM_FILTER, | |
405 | R1FE_MASK | R2FE_MASK); | |
406 | i2c_smbus_write_byte_data(client, LM95241_REG_RW_TRUTHERM, | |
407 | data->trutherm); | |
408 | i2c_smbus_write_byte_data(client, LM95241_REG_RW_REMOTE_MODEL, | |
409 | data->model); | |
410 | } | |
411 | ||
3e904628 | 412 | static const struct hwmon_channel_info *lm95241_info[] = { |
f5011f9f GR |
413 | HWMON_CHANNEL_INFO(chip, |
414 | HWMON_C_UPDATE_INTERVAL), | |
415 | HWMON_CHANNEL_INFO(temp, | |
416 | HWMON_T_INPUT, | |
417 | HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN | | |
418 | HWMON_T_TYPE | HWMON_T_FAULT, | |
419 | HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN | | |
420 | HWMON_T_TYPE | HWMON_T_FAULT), | |
3e904628 GR |
421 | NULL |
422 | }; | |
423 | ||
424 | static const struct hwmon_ops lm95241_hwmon_ops = { | |
425 | .is_visible = lm95241_is_visible, | |
426 | .read = lm95241_read, | |
427 | .write = lm95241_write, | |
428 | }; | |
429 | ||
430 | static const struct hwmon_chip_info lm95241_chip_info = { | |
431 | .ops = &lm95241_hwmon_ops, | |
432 | .info = lm95241_info, | |
433 | }; | |
434 | ||
f809621e | 435 | static int lm95241_probe(struct i2c_client *client, |
797eaa4b JD |
436 | const struct i2c_device_id *id) |
437 | { | |
f809621e | 438 | struct device *dev = &client->dev; |
797eaa4b | 439 | struct lm95241_data *data; |
f809621e | 440 | struct device *hwmon_dev; |
06160327 | 441 | |
f809621e | 442 | data = devm_kzalloc(dev, sizeof(struct lm95241_data), GFP_KERNEL); |
1487bf70 GR |
443 | if (!data) |
444 | return -ENOMEM; | |
797eaa4b | 445 | |
f809621e | 446 | data->client = client; |
797eaa4b | 447 | mutex_init(&data->update_lock); |
06160327 DR |
448 | |
449 | /* Initialize the LM95241 chip */ | |
f809621e | 450 | lm95241_init_client(client, data); |
06160327 | 451 | |
3e904628 | 452 | hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, |
f809621e | 453 | data, |
3e904628 GR |
454 | &lm95241_chip_info, |
455 | NULL); | |
f809621e | 456 | return PTR_ERR_OR_ZERO(hwmon_dev); |
06160327 DR |
457 | } |
458 | ||
797eaa4b JD |
459 | /* Driver data (common to all clients) */ |
460 | static const struct i2c_device_id lm95241_id[] = { | |
8c1d0419 GR |
461 | { "lm95231", 0 }, |
462 | { "lm95241", 0 }, | |
797eaa4b JD |
463 | { } |
464 | }; | |
465 | MODULE_DEVICE_TABLE(i2c, lm95241_id); | |
466 | ||
467 | static struct i2c_driver lm95241_driver = { | |
468 | .class = I2C_CLASS_HWMON, | |
469 | .driver = { | |
0f1deb4b | 470 | .name = DEVNAME, |
797eaa4b JD |
471 | }, |
472 | .probe = lm95241_probe, | |
797eaa4b JD |
473 | .id_table = lm95241_id, |
474 | .detect = lm95241_detect, | |
c3813d6a | 475 | .address_list = normal_i2c, |
797eaa4b JD |
476 | }; |
477 | ||
f0967eea | 478 | module_i2c_driver(lm95241_driver); |
06160327 | 479 | |
0f1deb4b | 480 | MODULE_AUTHOR("Davide Rizzo <elpa.rizzo@gmail.com>"); |
0a8784e7 | 481 | MODULE_DESCRIPTION("LM95231/LM95241 sensor driver"); |
06160327 | 482 | MODULE_LICENSE("GPL"); |