[linux-block.git] / drivers / hwmon / lm83.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * lm83.c - Part of lm_sensors, Linux kernel modules for hardware
 *          monitoring
 * Copyright (C) 2003-2009  Jean Delvare <jdelvare@suse.de>
 *
 * Heavily inspired from the lm78, lm75 and adm1021 drivers. The LM83 is
 * a sensor chip made by National Semiconductor. It reports up to four
 * temperatures (its own plus up to three external ones) with a 1 deg
 * resolution and a 3-4 deg accuracy. Complete datasheet can be obtained
 * from National's website at:
 *   http://www.national.com/pf/LM/LM83.html
 * Since the datasheet omits to give the chip stepping code, I give it
 * here: 0x03 (at register 0xff).
 *
 * Also supports the LM82 temp sensor, which is basically a stripped down
 * model of the LM83.  Datasheet is here:
 * http://www.national.com/pf/LM/LM82.html
 */

#include <linux/bits.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/hwmon.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/slab.h>

/*
 * Addresses to scan
 * Address is selected using 2 three-level pins, resulting in 9 possible
 * addresses.
 */

static const unsigned short normal_i2c[] = {
	0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x4c, 0x4d, 0x4e, I2C_CLIENT_END };

enum chips { lm83, lm82 };

/*
 * The LM83 registers
 * Manufacturer ID is 0x01 for National Semiconductor.
 */

#define LM83_REG_R_MAN_ID		0xFE
#define LM83_REG_R_CHIP_ID		0xFF
#define LM83_REG_R_CONFIG		0x03
#define LM83_REG_W_CONFIG		0x09
#define LM83_REG_R_STATUS1		0x02
#define LM83_REG_R_STATUS2		0x35
#define LM83_REG_R_LOCAL_TEMP		0x00
#define LM83_REG_R_LOCAL_HIGH		0x05
#define LM83_REG_W_LOCAL_HIGH		0x0B
#define LM83_REG_R_REMOTE1_TEMP		0x30
#define LM83_REG_R_REMOTE1_HIGH		0x38
#define LM83_REG_W_REMOTE1_HIGH		0x50
#define LM83_REG_R_REMOTE2_TEMP		0x01
#define LM83_REG_R_REMOTE2_HIGH		0x07
#define LM83_REG_W_REMOTE2_HIGH		0x0D
#define LM83_REG_R_REMOTE3_TEMP		0x31
#define LM83_REG_R_REMOTE3_HIGH		0x3A
#define LM83_REG_W_REMOTE3_HIGH		0x52
#define LM83_REG_R_TCRIT		0x42
#define LM83_REG_W_TCRIT		0x5A

static const u8 LM83_REG_TEMP[] = {
	LM83_REG_R_LOCAL_TEMP,
	LM83_REG_R_REMOTE1_TEMP,
	LM83_REG_R_REMOTE2_TEMP,
	LM83_REG_R_REMOTE3_TEMP,
};

static const u8 LM83_REG_MAX[] = {
	LM83_REG_R_LOCAL_HIGH,
	LM83_REG_R_REMOTE1_HIGH,
	LM83_REG_R_REMOTE2_HIGH,
	LM83_REG_R_REMOTE3_HIGH,
};

/* alarm and fault registers and bits, indexed by channel */
static const u8 LM83_ALARM_REG[] = {
	LM83_REG_R_STATUS1, LM83_REG_R_STATUS2, LM83_REG_R_STATUS1, LM83_REG_R_STATUS2
};

static const u8 LM83_MAX_ALARM_BIT[] = {
	BIT(6), BIT(7), BIT(4), BIT(4)
};

static const u8 LM83_CRIT_ALARM_BIT[] = {
	BIT(0), BIT(0), BIT(1), BIT(1)
};

static const u8 LM83_FAULT_BIT[] = {
	0, BIT(5), BIT(2), BIT(2)
};

/*
 * Client data (each client gets its own)
 */

struct lm83_data {
	struct regmap *regmap;
	enum chips type;
};

/* regmap code */

static int lm83_regmap_reg_read(void *context, unsigned int reg, unsigned int *val)
{
	struct i2c_client *client = context;
	int ret;

	ret = i2c_smbus_read_byte_data(client, reg);
	if (ret < 0)
		return ret;

	*val = ret;
	return 0;
}

/*
 * The regmap write function maps read register addresses to write register
 * addresses. This is necessary for regmap register caching to work.
 * An alternative would be to clear the regmap cache whenever a register is
 * written, but that would be much more expensive.
 */
static int lm83_regmap_reg_write(void *context, unsigned int reg, unsigned int val)
{
	struct i2c_client *client = context;

	switch (reg) {
	case LM83_REG_R_CONFIG:
	case LM83_REG_R_LOCAL_HIGH:
	case LM83_REG_R_REMOTE2_HIGH:
		reg += 0x06;
		break;
	case LM83_REG_R_REMOTE1_HIGH:
	case LM83_REG_R_REMOTE3_HIGH:
	case LM83_REG_R_TCRIT:
		reg += 0x18;
		break;
	default:
		break;
	}

	return i2c_smbus_write_byte_data(client, reg, val);
}

static bool lm83_regmap_is_volatile(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case LM83_REG_R_LOCAL_TEMP:
	case LM83_REG_R_REMOTE1_TEMP:
	case LM83_REG_R_REMOTE2_TEMP:
	case LM83_REG_R_REMOTE3_TEMP:
	case LM83_REG_R_STATUS1:
	case LM83_REG_R_STATUS2:
		return true;
	default:
		return false;
	}
}

static const struct regmap_config lm83_regmap_config = {
	.reg_bits = 8,
	.val_bits = 8,
	.cache_type = REGCACHE_RBTREE,
	.volatile_reg = lm83_regmap_is_volatile,
	.reg_read = lm83_regmap_reg_read,
	.reg_write = lm83_regmap_reg_write,
};

/* hwmon API */

static int lm83_temp_read(struct device *dev, u32 attr, int channel, long *val)
{
	struct lm83_data *data = dev_get_drvdata(dev);
	unsigned int regval;
	int err;

	switch (attr) {
	case hwmon_temp_input:
		err = regmap_read(data->regmap, LM83_REG_TEMP[channel], &regval);
		if (err < 0)
			return err;
		*val = (s8)regval * 1000;
		break;
	case hwmon_temp_max:
		err = regmap_read(data->regmap, LM83_REG_MAX[channel], &regval);
		if (err < 0)
			return err;
		*val = (s8)regval * 1000;
		break;
	case hwmon_temp_crit:
		err = regmap_read(data->regmap, LM83_REG_R_TCRIT, &regval);
		if (err < 0)
			return err;
		*val = (s8)regval * 1000;
		break;
	case hwmon_temp_max_alarm:
		err = regmap_read(data->regmap, LM83_ALARM_REG[channel], &regval);
		if (err < 0)
			return err;
		*val = !!(regval & LM83_MAX_ALARM_BIT[channel]);
		break;
	case hwmon_temp_crit_alarm:
		err = regmap_read(data->regmap, LM83_ALARM_REG[channel], &regval);
		if (err < 0)
			return err;
		*val = !!(regval & LM83_CRIT_ALARM_BIT[channel]);
		break;
	case hwmon_temp_fault:
		err = regmap_read(data->regmap, LM83_ALARM_REG[channel], &regval);
		if (err < 0)
			return err;
		*val = !!(regval & LM83_FAULT_BIT[channel]);
		break;
	default:
		return -EOPNOTSUPP;
	}
	return 0;
}

static int lm83_temp_write(struct device *dev, u32 attr, int channel, long val)
{
	struct lm83_data *data = dev_get_drvdata(dev);
	unsigned int regval;
	int err;

	regval = DIV_ROUND_CLOSEST(clamp_val(val, -128000, 127000), 1000);

	switch (attr) {
	case hwmon_temp_max:
		err = regmap_write(data->regmap, LM83_REG_MAX[channel], regval);
		if (err < 0)
			return err;
		break;
	case hwmon_temp_crit:
		err = regmap_write(data->regmap, LM83_REG_R_TCRIT, regval);
		if (err < 0)
			return err;
		break;
	default:
		return -EOPNOTSUPP;
	}
	return 0;
}

static int lm83_chip_read(struct device *dev, u32 attr, int channel, long *val)
{
	struct lm83_data *data = dev_get_drvdata(dev);
	unsigned int regval;
	int err;

	switch (attr) {
	case hwmon_chip_alarms:
		err = regmap_read(data->regmap, LM83_REG_R_STATUS1, &regval);
		if (err < 0)
			return err;
		*val = regval;
		err = regmap_read(data->regmap, LM83_REG_R_STATUS2, &regval);
		if (err < 0)
			return err;
		*val |= regval << 8;
		return 0;
	default:
		return -EOPNOTSUPP;
	}

	return 0;
}

static int lm83_read(struct device *dev, enum hwmon_sensor_types type,
		     u32 attr, int channel, long *val)
{
	switch (type) {
	case hwmon_chip:
		return lm83_chip_read(dev, attr, channel, val);
	case hwmon_temp:
		return lm83_temp_read(dev, attr, channel, val);
	default:
		return -EOPNOTSUPP;
	}
}

static int lm83_write(struct device *dev, enum hwmon_sensor_types type,
		      u32 attr, int channel, long val)
{
	switch (type) {
	case hwmon_temp:
		return lm83_temp_write(dev, attr, channel, val);
	default:
		return -EOPNOTSUPP;
	}
}

static umode_t lm83_is_visible(const void *_data, enum hwmon_sensor_types type,
			       u32 attr, int channel)
{
	const struct lm83_data *data = _data;

	/*
	 * LM82 only supports a single external channel, modeled as channel 2.
	 */
	if (data->type == lm82 && (channel == 1 || channel == 3))
		return 0;

	switch (type) {
	case hwmon_chip:
		if (attr == hwmon_chip_alarms)
			return 0444;
		break;
	case hwmon_temp:
		switch (attr) {
		case hwmon_temp_input:
		case hwmon_temp_max_alarm:
		case hwmon_temp_crit_alarm:
			return 0444;
		case hwmon_temp_fault:
			if (channel)
				return 0444;
			break;
		case hwmon_temp_max:
			return 0644;
		case hwmon_temp_crit:
			if (channel == 2)
				return 0644;
			return 0444;
		default:
			break;
		}
		break;
	default:
		break;
	}
	return 0;
}

static const struct hwmon_channel_info * const lm83_info[] = {
	HWMON_CHANNEL_INFO(chip, HWMON_C_ALARMS),
	HWMON_CHANNEL_INFO(temp,
			   HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
			   HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM,
			   HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
			   HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT,
			   HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
			   HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT,
			   HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
			   HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT
			   ),
	NULL
};

static const struct hwmon_ops lm83_hwmon_ops = {
	.is_visible = lm83_is_visible,
	.read = lm83_read,
	.write = lm83_write,
};

static const struct hwmon_chip_info lm83_chip_info = {
	.ops = &lm83_hwmon_ops,
	.info = lm83_info,
};

/* Return 0 if detection is successful, -ENODEV otherwise */
static int lm83_detect(struct i2c_client *client,
		       struct i2c_board_info *info)
{
	struct i2c_adapter *adapter = client->adapter;
	const char *name;
	u8 man_id, chip_id;

	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
		return -ENODEV;

	/* Detection */
	if ((i2c_smbus_read_byte_data(client, LM83_REG_R_STATUS1) & 0xA8) ||
	    (i2c_smbus_read_byte_data(client, LM83_REG_R_STATUS2) & 0x48) ||
	    (i2c_smbus_read_byte_data(client, LM83_REG_R_CONFIG) & 0x41)) {
		dev_dbg(&adapter->dev, "LM83 detection failed at 0x%02x\n",
			client->addr);
		return -ENODEV;
	}

	/* Identification */
	man_id = i2c_smbus_read_byte_data(client, LM83_REG_R_MAN_ID);
	if (man_id != 0x01)	/* National Semiconductor */
		return -ENODEV;

	chip_id = i2c_smbus_read_byte_data(client, LM83_REG_R_CHIP_ID);
	switch (chip_id) {
	case 0x03:
		/*
		 * According to the LM82 datasheet dated March 2013, recent
		 * revisions of LM82 have a die revision of 0x03. This was
		 * confirmed with a real chip. Further details in this revision
		 * of the LM82 datasheet strongly suggest that LM82 is just a
		 * repackaged LM83. It is therefore impossible to distinguish
		 * those chips from LM83, and they will be misdetected as LM83.
		 */
		name = "lm83";
		break;
	case 0x01:
		name = "lm82";
		break;
	default:
		/* identification failed */
		dev_dbg(&adapter->dev,
			"Unsupported chip (man_id=0x%02X, chip_id=0x%02X)\n",
			man_id, chip_id);
		return -ENODEV;
	}

	strscpy(info->type, name, I2C_NAME_SIZE);

	return 0;
}

static const struct i2c_device_id lm83_id[] = {
	{ "lm83", lm83 },
	{ "lm82", lm82 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, lm83_id);

static int lm83_probe(struct i2c_client *client)
{
	struct device *dev = &client->dev;
	struct device *hwmon_dev;
	struct lm83_data *data;

	data = devm_kzalloc(dev, sizeof(struct lm83_data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	data->regmap = devm_regmap_init(dev, NULL, client, &lm83_regmap_config);
	if (IS_ERR(data->regmap))
		return PTR_ERR(data->regmap);

	data->type = i2c_match_id(lm83_id, client)->driver_data;

	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
							 data, &lm83_chip_info, NULL);
	return PTR_ERR_OR_ZERO(hwmon_dev);
}

/*
 * Driver data (common to all clients)
 */

static struct i2c_driver lm83_driver = {
	.class		= I2C_CLASS_HWMON,
	.driver = {
		.name	= "lm83",
	},
	.probe		= lm83_probe,
	.id_table	= lm83_id,
	.detect		= lm83_detect,
	.address_list	= normal_i2c,
};

module_i2c_driver(lm83_driver);

MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
MODULE_DESCRIPTION("LM83 driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
c942fddf	1	// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4 LT	2	/*
	3	* lm83.c - Part of lm_sensors, Linux kernel modules for hardware
	4	* monitoring
7c81c60f	5	* Copyright (C) 2003-2009 Jean Delvare <jdelvare@suse.de>
1da177e4 LT	6	*
	7	* Heavily inspired from the lm78, lm75 and adm1021 drivers. The LM83 is
	8	* a sensor chip made by National Semiconductor. It reports up to four
	9	* temperatures (its own plus up to three external ones) with a 1 deg
	10	* resolution and a 3-4 deg accuracy. Complete datasheet can be obtained
	11	* from National's website at:
	12	* http://www.national.com/pf/LM/LM83.html
	13	* Since the datasheet omits to give the chip stepping code, I give it
	14	* here: 0x03 (at register 0xff).
	15	*
43cb7ebe JC	16	* Also supports the LM82 temp sensor, which is basically a stripped down
	17	* model of the LM83. Datasheet is here:
	18	* http://www.national.com/pf/LM/LM82.html
1da177e4 LT	19	*/
1da177e4 LT	20
c291f612	21	#include <linux/bits.h>
7c68c2c7 GR	22	#include <linux/err.h>
7c68c2c7 GR	23	#include <linux/i2c.h>
1da177e4	24	#include <linux/init.h>
943b0830	25	#include <linux/hwmon.h>
7c68c2c7	26	#include <linux/module.h>
719af4f1	27	#include <linux/regmap.h>
7c68c2c7	28	#include <linux/slab.h>
1da177e4 LT	29
	30	/*
	31	* Addresses to scan
	32	* Address is selected using 2 three-level pins, resulting in 9 possible
	33	* addresses.
	34	*/
	35
25e9c86d MH	36	static const unsigned short normal_i2c[] = {
25e9c86d MH	37	0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x4c, 0x4d, 0x4e, I2C_CLIENT_END };
1da177e4	38
e5e9f44c	39	enum chips { lm83, lm82 };
1da177e4 LT	40
	41	/*
	42	* The LM83 registers
	43	* Manufacturer ID is 0x01 for National Semiconductor.
	44	*/
	45
	46	#define LM83_REG_R_MAN_ID 0xFE
	47	#define LM83_REG_R_CHIP_ID 0xFF
	48	#define LM83_REG_R_CONFIG 0x03
	49	#define LM83_REG_W_CONFIG 0x09
	50	#define LM83_REG_R_STATUS1 0x02
	51	#define LM83_REG_R_STATUS2 0x35
	52	#define LM83_REG_R_LOCAL_TEMP 0x00
	53	#define LM83_REG_R_LOCAL_HIGH 0x05
	54	#define LM83_REG_W_LOCAL_HIGH 0x0B
	55	#define LM83_REG_R_REMOTE1_TEMP 0x30
	56	#define LM83_REG_R_REMOTE1_HIGH 0x38
	57	#define LM83_REG_W_REMOTE1_HIGH 0x50
	58	#define LM83_REG_R_REMOTE2_TEMP 0x01
	59	#define LM83_REG_R_REMOTE2_HIGH 0x07
	60	#define LM83_REG_W_REMOTE2_HIGH 0x0D
	61	#define LM83_REG_R_REMOTE3_TEMP 0x31
	62	#define LM83_REG_R_REMOTE3_HIGH 0x3A
	63	#define LM83_REG_W_REMOTE3_HIGH 0x52
	64	#define LM83_REG_R_TCRIT 0x42
	65	#define LM83_REG_W_TCRIT 0x5A
	66
719af4f1	67	static const u8 LM83_REG_TEMP[] = {
1da177e4 LT	68	LM83_REG_R_LOCAL_TEMP,
	69	LM83_REG_R_REMOTE1_TEMP,
	70	LM83_REG_R_REMOTE2_TEMP,
1a86c051	71	LM83_REG_R_REMOTE3_TEMP,
c291f612 GR	72	};
	73
	74	static const u8 LM83_REG_MAX[] = {
1da177e4 LT	75	LM83_REG_R_LOCAL_HIGH,
	76	LM83_REG_R_REMOTE1_HIGH,
	77	LM83_REG_R_REMOTE2_HIGH,
1a86c051	78	LM83_REG_R_REMOTE3_HIGH,
c291f612 GR	79	};
	80
	81	/* alarm and fault registers and bits, indexed by channel */
	82	static const u8 LM83_ALARM_REG[] = {
	83	LM83_REG_R_STATUS1, LM83_REG_R_STATUS2, LM83_REG_R_STATUS1, LM83_REG_R_STATUS2
	84	};
	85
	86	static const u8 LM83_MAX_ALARM_BIT[] = {
	87	BIT(6), BIT(7), BIT(4), BIT(4)
	88	};
	89
	90	static const u8 LM83_CRIT_ALARM_BIT[] = {
	91	BIT(0), BIT(0), BIT(1), BIT(1)
	92	};
	93
	94	static const u8 LM83_FAULT_BIT[] = {
	95	0, BIT(5), BIT(2), BIT(2)
1da177e4 LT	96	};
1da177e4 LT	97
1da177e4 LT	98	/*
	99	* Client data (each client gets its own)
	100	*/
	101
	102	struct lm83_data {
719af4f1	103	struct regmap *regmap;
c291f612	104	enum chips type;
1da177e4 LT	105	};
1da177e4 LT	106
719af4f1 GR	107	/* regmap code */
	108
	109	static int lm83_regmap_reg_read(void context, unsigned int reg, unsigned int val)
41936370	110	{
719af4f1 GR	111	struct i2c_client *client = context;
	112	int ret;
	113
	114	ret = i2c_smbus_read_byte_data(client, reg);
	115	if (ret < 0)
	116	return ret;
	117
	118	*val = ret;
	119	return 0;
	120	}
	121
	122	/*
	123	* The regmap write function maps read register addresses to write register
	124	* addresses. This is necessary for regmap register caching to work.
	125	* An alternative would be to clear the regmap cache whenever a register is
	126	* written, but that would be much more expensive.
	127	*/
	128	static int lm83_regmap_reg_write(void *context, unsigned int reg, unsigned int val)
	129	{
	130	struct i2c_client *client = context;
	131
	132	switch (reg) {
	133	case LM83_REG_R_CONFIG:
	134	case LM83_REG_R_LOCAL_HIGH:
	135	case LM83_REG_R_REMOTE2_HIGH:
	136	reg += 0x06;
	137	break;
	138	case LM83_REG_R_REMOTE1_HIGH:
	139	case LM83_REG_R_REMOTE3_HIGH:
	140	case LM83_REG_R_TCRIT:
	141	reg += 0x18;
	142	break;
	143	default:
	144	break;
41936370 GR	145	}
41936370 GR	146
719af4f1 GR	147	return i2c_smbus_write_byte_data(client, reg, val);
719af4f1 GR	148	}
41936370	149
719af4f1 GR	150	static bool lm83_regmap_is_volatile(struct device *dev, unsigned int reg)
	151	{
	152	switch (reg) {
	153	case LM83_REG_R_LOCAL_TEMP:
	154	case LM83_REG_R_REMOTE1_TEMP:
	155	case LM83_REG_R_REMOTE2_TEMP:
	156	case LM83_REG_R_REMOTE3_TEMP:
	157	case LM83_REG_R_STATUS1:
	158	case LM83_REG_R_STATUS2:
	159	return true;
	160	default:
	161	return false;
	162	}
41936370 GR	163	}
41936370 GR	164
719af4f1 GR	165	static const struct regmap_config lm83_regmap_config = {
	166	.reg_bits = 8,
	167	.val_bits = 8,
	168	.cache_type = REGCACHE_RBTREE,
	169	.volatile_reg = lm83_regmap_is_volatile,
	170	.reg_read = lm83_regmap_reg_read,
	171	.reg_write = lm83_regmap_reg_write,
	172	};
	173
c291f612	174	/* hwmon API */
1da177e4	175
c291f612	176	static int lm83_temp_read(struct device dev, u32 attr, int channel, long val)
1a86c051	177	{
719af4f1 GR	178	struct lm83_data *data = dev_get_drvdata(dev);
719af4f1 GR	179	unsigned int regval;
c291f612	180	int err;
719af4f1	181
c291f612 GR	182	switch (attr) {
	183	case hwmon_temp_input:
	184	err = regmap_read(data->regmap, LM83_REG_TEMP[channel], &regval);
	185	if (err < 0)
	186	return err;
	187	val = (s8)regval 1000;
	188	break;
	189	case hwmon_temp_max:
	190	err = regmap_read(data->regmap, LM83_REG_MAX[channel], &regval);
	191	if (err < 0)
	192	return err;
	193	val = (s8)regval 1000;
	194	break;
	195	case hwmon_temp_crit:
	196	err = regmap_read(data->regmap, LM83_REG_R_TCRIT, &regval);
	197	if (err < 0)
	198	return err;
	199	val = (s8)regval 1000;
	200	break;
	201	case hwmon_temp_max_alarm:
	202	err = regmap_read(data->regmap, LM83_ALARM_REG[channel], &regval);
	203	if (err < 0)
	204	return err;
	205	*val = !!(regval & LM83_MAX_ALARM_BIT[channel]);
	206	break;
	207	case hwmon_temp_crit_alarm:
	208	err = regmap_read(data->regmap, LM83_ALARM_REG[channel], &regval);
	209	if (err < 0)
	210	return err;
	211	*val = !!(regval & LM83_CRIT_ALARM_BIT[channel]);
	212	break;
	213	case hwmon_temp_fault:
	214	err = regmap_read(data->regmap, LM83_ALARM_REG[channel], &regval);
	215	if (err < 0)
	216	return err;
	217	*val = !!(regval & LM83_FAULT_BIT[channel]);
	218	break;
	219	default:
	220	return -EOPNOTSUPP;
	221	}
	222	return 0;
1da177e4	223	}
1a86c051	224
c291f612	225	static int lm83_temp_write(struct device *dev, u32 attr, int channel, long val)
1a86c051	226	{
a0ac840d	227	struct lm83_data *data = dev_get_drvdata(dev);
719af4f1	228	unsigned int regval;
b3789a0d FM	229	int err;
b3789a0d FM	230
362c5663	231	regval = DIV_ROUND_CLOSEST(clamp_val(val, -128000, 127000), 1000);
c291f612 GR	232
	233	switch (attr) {
	234	case hwmon_temp_max:
	235	err = regmap_write(data->regmap, LM83_REG_MAX[channel], regval);
	236	if (err < 0)
	237	return err;
	238	break;
	239	case hwmon_temp_crit:
	240	err = regmap_write(data->regmap, LM83_REG_R_TCRIT, regval);
	241	if (err < 0)
	242	return err;
	243	break;
	244	default:
	245	return -EOPNOTSUPP;
	246	}
	247	return 0;
1da177e4	248	}
1da177e4	249
c291f612	250	static int lm83_chip_read(struct device dev, u32 attr, int channel, long val)
1da177e4	251	{
719af4f1	252	struct lm83_data *data = dev_get_drvdata(dev);
c291f612	253	unsigned int regval;
719af4f1 GR	254	int err;
719af4f1 GR	255
c291f612 GR	256	switch (attr) {
	257	case hwmon_chip_alarms:
	258	err = regmap_read(data->regmap, LM83_REG_R_STATUS1, &regval);
	259	if (err < 0)
	260	return err;
	261	*val = regval;
	262	err = regmap_read(data->regmap, LM83_REG_R_STATUS2, &regval);
	263	if (err < 0)
	264	return err;
	265	*val \|= regval << 8;
	266	return 0;
	267	default:
	268	return -EOPNOTSUPP;
	269	}
719af4f1	270
c291f612	271	return 0;
1da177e4 LT	272	}
1da177e4 LT	273
c291f612 GR	274	static int lm83_read(struct device *dev, enum hwmon_sensor_types type,
c291f612 GR	275	u32 attr, int channel, long *val)
2d45771e	276	{
c291f612 GR	277	switch (type) {
	278	case hwmon_chip:
	279	return lm83_chip_read(dev, attr, channel, val);
	280	case hwmon_temp:
	281	return lm83_temp_read(dev, attr, channel, val);
	282	default:
	283	return -EOPNOTSUPP;
719af4f1	284	}
2d45771e JD	285	}
2d45771e JD	286
c291f612 GR	287	static int lm83_write(struct device *dev, enum hwmon_sensor_types type,
	288	u32 attr, int channel, long val)
	289	{
	290	switch (type) {
	291	case hwmon_temp:
	292	return lm83_temp_write(dev, attr, channel, val);
	293	default:
	294	return -EOPNOTSUPP;
	295	}
	296	}
0e39e01c	297
c291f612 GR	298	static umode_t lm83_is_visible(const void *_data, enum hwmon_sensor_types type,
	299	u32 attr, int channel)
	300	{
	301	const struct lm83_data *data = _data;
0e39e01c	302
c291f612 GR	303	/*
	304	* LM82 only supports a single external channel, modeled as channel 2.
	305	*/
	306	if (data->type == lm82 && (channel == 1 \|\| channel == 3))
	307	return 0;
	308
	309	switch (type) {
	310	case hwmon_chip:
	311	if (attr == hwmon_chip_alarms)
	312	return 0444;
	313	break;
	314	case hwmon_temp:
	315	switch (attr) {
	316	case hwmon_temp_input:
	317	case hwmon_temp_max_alarm:
	318	case hwmon_temp_crit_alarm:
	319	return 0444;
	320	case hwmon_temp_fault:
	321	if (channel)
	322	return 0444;
	323	break;
	324	case hwmon_temp_max:
	325	return 0644;
	326	case hwmon_temp_crit:
	327	if (channel == 2)
	328	return 0644;
	329	return 0444;
	330	default:
	331	break;
	332	}
	333	break;
	334	default:
	335	break;
	336	}
	337	return 0;
	338	}
	339
3c370243	340	static const struct hwmon_channel_info * const lm83_info[] = {
c291f612 GR	341	HWMON_CHANNEL_INFO(chip, HWMON_C_ALARMS),
	342	HWMON_CHANNEL_INFO(temp,
	343	HWMON_T_INPUT \| HWMON_T_MAX \| HWMON_T_CRIT \|
	344	HWMON_T_MAX_ALARM \| HWMON_T_CRIT_ALARM,
	345	HWMON_T_INPUT \| HWMON_T_MAX \| HWMON_T_CRIT \|
	346	HWMON_T_MAX_ALARM \| HWMON_T_CRIT_ALARM \| HWMON_T_FAULT,
	347	HWMON_T_INPUT \| HWMON_T_MAX \| HWMON_T_CRIT \|
	348	HWMON_T_MAX_ALARM \| HWMON_T_CRIT_ALARM \| HWMON_T_FAULT,
	349	HWMON_T_INPUT \| HWMON_T_MAX \| HWMON_T_CRIT \|
	350	HWMON_T_MAX_ALARM \| HWMON_T_CRIT_ALARM \| HWMON_T_FAULT
	351	),
0e39e01c JD	352	NULL
	353	};
	354
c291f612 GR	355	static const struct hwmon_ops lm83_hwmon_ops = {
	356	.is_visible = lm83_is_visible,
	357	.read = lm83_read,
	358	.write = lm83_write,
0e39e01c JD	359	};
0e39e01c JD	360
c291f612 GR	361	static const struct hwmon_chip_info lm83_chip_info = {
	362	.ops = &lm83_hwmon_ops,
	363	.info = lm83_info,
	364	};
1da177e4	365
b6aacdce	366	/* Return 0 if detection is successful, -ENODEV otherwise */
81de0eea	367	static int lm83_detect(struct i2c_client *client,
b6aacdce	368	struct i2c_board_info *info)
1da177e4	369	{
81de0eea	370	struct i2c_adapter *adapter = client->adapter;
b57dc394 JD	371	const char *name;
b57dc394 JD	372	u8 man_id, chip_id;
1da177e4 LT	373
1da177e4 LT	374	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
b6aacdce	375	return -ENODEV;
1da177e4	376
b57dc394	377	/* Detection */
81de0eea GR	378	if ((i2c_smbus_read_byte_data(client, LM83_REG_R_STATUS1) & 0xA8) \|\|
	379	(i2c_smbus_read_byte_data(client, LM83_REG_R_STATUS2) & 0x48) \|\|
	380	(i2c_smbus_read_byte_data(client, LM83_REG_R_CONFIG) & 0x41)) {
b57dc394	381	dev_dbg(&adapter->dev, "LM83 detection failed at 0x%02x\n",
81de0eea	382	client->addr);
b57dc394	383	return -ENODEV;
1da177e4 LT	384	}
1da177e4 LT	385
b57dc394	386	/* Identification */
81de0eea	387	man_id = i2c_smbus_read_byte_data(client, LM83_REG_R_MAN_ID);
b57dc394 JD	388	if (man_id != 0x01) /* National Semiconductor */
b57dc394 JD	389	return -ENODEV;
1da177e4	390
81de0eea	391	chip_id = i2c_smbus_read_byte_data(client, LM83_REG_R_CHIP_ID);
b57dc394 JD	392	switch (chip_id) {
b57dc394 JD	393	case 0x03:
913ac02a GR	394	/*
	395	* According to the LM82 datasheet dated March 2013, recent
	396	* revisions of LM82 have a die revision of 0x03. This was
	397	* confirmed with a real chip. Further details in this revision
	398	* of the LM82 datasheet strongly suggest that LM82 is just a
	399	* repackaged LM83. It is therefore impossible to distinguish
	400	* those chips from LM83, and they will be misdetected as LM83.
	401	*/
1da177e4	402	name = "lm83";
b57dc394 JD	403	break;
b57dc394 JD	404	case 0x01:
43cb7ebe	405	name = "lm82";
b57dc394 JD	406	break;
	407	default:
	408	/* identification failed */
4d63c2d3 GR	409	dev_dbg(&adapter->dev,
	410	"Unsupported chip (man_id=0x%02X, chip_id=0x%02X)\n",
	411	man_id, chip_id);
b57dc394	412	return -ENODEV;
1da177e4 LT	413	}
1da177e4 LT	414
f2f394db	415	strscpy(info->type, name, I2C_NAME_SIZE);
b6aacdce JD	416
	417	return 0;
	418	}
	419
11e3377b GR	420	static const struct i2c_device_id lm83_id[] = {
	421	{ "lm83", lm83 },
	422	{ "lm82", lm82 },
	423	{ }
	424	};
	425	MODULE_DEVICE_TABLE(i2c, lm83_id);
67487038	426
81de0eea	427	static int lm83_probe(struct i2c_client *client)
b6aacdce	428	{
719af4f1	429	struct device *dev = &client->dev;
a0ac840d	430	struct device *hwmon_dev;
b6aacdce	431	struct lm83_data *data;
b6aacdce	432
719af4f1	433	data = devm_kzalloc(dev, sizeof(struct lm83_data), GFP_KERNEL);
c087f73a GR	434	if (!data)
c087f73a GR	435	return -ENOMEM;
b6aacdce	436
719af4f1 GR	437	data->regmap = devm_regmap_init(dev, NULL, client, &lm83_regmap_config);
	438	if (IS_ERR(data->regmap))
	439	return PTR_ERR(data->regmap);
1da177e4	440
c291f612	441	data->type = i2c_match_id(lm83_id, client)->driver_data;
a0ac840d	442
c291f612 GR	443	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
c291f612 GR	444	data, &lm83_chip_info, NULL);
a0ac840d	445	return PTR_ERR_OR_ZERO(hwmon_dev);
1da177e4 LT	446	}
1da177e4 LT	447
41936370 GR	448	/*
	449	* Driver data (common to all clients)
	450	*/
1da177e4	451
41936370 GR	452	static struct i2c_driver lm83_driver = {
	453	.class = I2C_CLASS_HWMON,
	454	.driver = {
	455	.name = "lm83",
	456	},
1975d167	457	.probe = lm83_probe,
41936370 GR	458	.id_table = lm83_id,
	459	.detect = lm83_detect,
	460	.address_list = normal_i2c,
	461	};
1da177e4	462
f0967eea	463	module_i2c_driver(lm83_driver);
1da177e4	464
7c81c60f	465	MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
1da177e4 LT	466	MODULE_DESCRIPTION("LM83 driver");
1da177e4 LT	467	MODULE_LICENSE("GPL");