projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 455fbdd3 PM |
1 | /* |
| 2 | * lis3lv02d.h - ST LIS3LV02DL accelerometer driver | |
| 3 | * | |
| 4 | * Copyright (C) 2007-2008 Yan Burman | |
| 5 | * Copyright (C) 2008 Eric Piel | |
| 6 | * | |
| 7 | * This program is free software; you can redistribute it and/or modify | |
| 8 | * it under the terms of the GNU General Public License as published by | |
| 9 | * the Free Software Foundation; either version 2 of the License, or | |
| 10 | * (at your option) any later version. | |
| 11 | * | |
| 12 | * This program is distributed in the hope that it will be useful, | |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 | * GNU General Public License for more details. | |
| 16 | * | |
| 17 | * You should have received a copy of the GNU General Public License | |
| 18 | * along with this program; if not, write to the Free Software | |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 20 | */ | |
| 21 | ||
| 22 | /* | |
| 23 | * The actual chip is STMicroelectronics LIS3LV02DL or LIS3LV02DQ that seems to | |
| 24 | * be connected via SPI. There exists also several similar chips (such as LIS302DL or | |
| 25 | * LIS3L02DQ) but not in the HP laptops and they have slightly different registers. | |
| 26 | * They can also be connected via I²C. | |
| 27 | */ | |
| 28 | ||
| 29 | #define LIS3LV02DL_ID 0x3A /* Also the LIS3LV02DQ */ | |
| 30 | #define LIS302DL_ID 0x3B /* Also the LIS202DL! */ | |
| 31 | ||
| 32 | enum lis3lv02d_reg { | |
| 33 | WHO_AM_I = 0x0F, | |
| 34 | OFFSET_X = 0x16, | |
| 35 | OFFSET_Y = 0x17, | |
| 36 | OFFSET_Z = 0x18, | |
| 37 | GAIN_X = 0x19, | |
| 38 | GAIN_Y = 0x1A, | |
| 39 | GAIN_Z = 0x1B, | |
| 40 | CTRL_REG1 = 0x20, | |
| 41 | CTRL_REG2 = 0x21, | |
| 42 | CTRL_REG3 = 0x22, | |
| 43 | HP_FILTER_RESET = 0x23, | |
| 44 | STATUS_REG = 0x27, | |
| 45 | OUTX_L = 0x28, | |
| 46 | OUTX_H = 0x29, | |
| 47 | OUTY_L = 0x2A, | |
| 48 | OUTY_H = 0x2B, | |
| 49 | OUTZ_L = 0x2C, | |
| 50 | OUTZ_H = 0x2D, | |
| 51 | FF_WU_CFG = 0x30, | |
| 52 | FF_WU_SRC = 0x31, | |
| 53 | FF_WU_ACK = 0x32, | |
| 54 | FF_WU_THS_L = 0x34, | |
| 55 | FF_WU_THS_H = 0x35, | |
| 56 | FF_WU_DURATION = 0x36, | |
| 57 | DD_CFG = 0x38, | |
| 58 | DD_SRC = 0x39, | |
| 59 | DD_ACK = 0x3A, | |
| 60 | DD_THSI_L = 0x3C, | |
| 61 | DD_THSI_H = 0x3D, | |
| 62 | DD_THSE_L = 0x3E, | |
| 63 | DD_THSE_H = 0x3F, | |
| 64 | }; | |
| 65 | ||
| 66 | enum lis3lv02d_ctrl1 { | |
| 67 | CTRL1_Xen = 0x01, | |
| 68 | CTRL1_Yen = 0x02, | |
| 69 | CTRL1_Zen = 0x04, | |
| 70 | CTRL1_ST = 0x08, | |
| 71 | CTRL1_DF0 = 0x10, | |
| 72 | CTRL1_DF1 = 0x20, | |
| 73 | CTRL1_PD0 = 0x40, | |
| 74 | CTRL1_PD1 = 0x80, | |
| 75 | }; | |
| 76 | enum lis3lv02d_ctrl2 { | |
| 77 | CTRL2_DAS = 0x01, | |
| 78 | CTRL2_SIM = 0x02, | |
| 79 | CTRL2_DRDY = 0x04, | |
| 80 | CTRL2_IEN = 0x08, | |
| 81 | CTRL2_BOOT = 0x10, | |
| 82 | CTRL2_BLE = 0x20, | |
| 83 | CTRL2_BDU = 0x40, /* Block Data Update */ | |
| 84 | CTRL2_FS = 0x80, /* Full Scale selection */ | |
| 85 | }; | |
| 86 | ||
| 87 | ||
| 88 | enum lis3lv02d_ctrl3 { | |
| 89 | CTRL3_CFS0 = 0x01, | |
| 90 | CTRL3_CFS1 = 0x02, | |
| 91 | CTRL3_FDS = 0x10, | |
| 92 | CTRL3_HPFF = 0x20, | |
| 93 | CTRL3_HPDD = 0x40, | |
| 94 | CTRL3_ECK = 0x80, | |
| 95 | }; | |
| 96 | ||
| 97 | enum lis3lv02d_status_reg { | |
| 98 | STATUS_XDA = 0x01, | |
| 99 | STATUS_YDA = 0x02, | |
| 100 | STATUS_ZDA = 0x04, | |
| 101 | STATUS_XYZDA = 0x08, | |
| 102 | STATUS_XOR = 0x10, | |
| 103 | STATUS_YOR = 0x20, | |
| 104 | STATUS_ZOR = 0x40, | |
| 105 | STATUS_XYZOR = 0x80, | |
| 106 | }; | |
| 107 | ||
| 108 | enum lis3lv02d_ff_wu_cfg { | |
| 109 | FF_WU_CFG_XLIE = 0x01, | |
| 110 | FF_WU_CFG_XHIE = 0x02, | |
| 111 | FF_WU_CFG_YLIE = 0x04, | |
| 112 | FF_WU_CFG_YHIE = 0x08, | |
| 113 | FF_WU_CFG_ZLIE = 0x10, | |
| 114 | FF_WU_CFG_ZHIE = 0x20, | |
| 115 | FF_WU_CFG_LIR = 0x40, | |
| 116 | FF_WU_CFG_AOI = 0x80, | |
| 117 | }; | |
| 118 | ||
| 119 | enum lis3lv02d_ff_wu_src { | |
| 120 | FF_WU_SRC_XL = 0x01, | |
| 121 | FF_WU_SRC_XH = 0x02, | |
| 122 | FF_WU_SRC_YL = 0x04, | |
| 123 | FF_WU_SRC_YH = 0x08, | |
| 124 | FF_WU_SRC_ZL = 0x10, | |
| 125 | FF_WU_SRC_ZH = 0x20, | |
| 126 | FF_WU_SRC_IA = 0x40, | |
| 127 | }; | |
| 128 | ||
| 129 | enum lis3lv02d_dd_cfg { | |
| 130 | DD_CFG_XLIE = 0x01, | |
| 131 | DD_CFG_XHIE = 0x02, | |
| 132 | DD_CFG_YLIE = 0x04, | |
| 133 | DD_CFG_YHIE = 0x08, | |
| 134 | DD_CFG_ZLIE = 0x10, | |
| 135 | DD_CFG_ZHIE = 0x20, | |
| 136 | DD_CFG_LIR = 0x40, | |
| 137 | DD_CFG_IEND = 0x80, | |
| 138 | }; | |
| 139 | ||
| 140 | enum lis3lv02d_dd_src { | |
| 141 | DD_SRC_XL = 0x01, | |
| 142 | DD_SRC_XH = 0x02, | |
| 143 | DD_SRC_YL = 0x04, | |
| 144 | DD_SRC_YH = 0x08, | |
| 145 | DD_SRC_ZL = 0x10, | |
| 146 | DD_SRC_ZH = 0x20, | |
| 147 | DD_SRC_IA = 0x40, | |
| 148 | }; | |
| 149 |