hwmon: (ntc_thermistor) Fix checkpatch warning
[linux-2.6-block.git] / drivers / hwmon / it87.c
CommitLineData
1da177e4 1/*
5f2dc798
JD
2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring.
4 *
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
8 * Fan Controller)
9 *
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
12 *
13 * Supports: IT8705F Super I/O chip w/LPC interface
14 * IT8712F Super I/O chip w/LPC interface
15 * IT8716F Super I/O chip w/LPC interface
16 * IT8718F Super I/O chip w/LPC interface
17 * IT8720F Super I/O chip w/LPC interface
44c1bcd4 18 * IT8721F Super I/O chip w/LPC interface
5f2dc798 19 * IT8726F Super I/O chip w/LPC interface
16b5dda2 20 * IT8728F Super I/O chip w/LPC interface
44c1bcd4 21 * IT8758E Super I/O chip w/LPC interface
0531d98b
GR
22 * IT8782F Super I/O chip w/LPC interface
23 * IT8783E/F Super I/O chip w/LPC interface
5f2dc798
JD
24 * Sis950 A clone of the IT8705F
25 *
26 * Copyright (C) 2001 Chris Gauthron
27 * Copyright (C) 2005-2010 Jean Delvare <khali@linux-fr.org>
28 *
29 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License as published by
31 * the Free Software Foundation; either version 2 of the License, or
32 * (at your option) any later version.
33 *
34 * This program is distributed in the hope that it will be useful,
35 * but WITHOUT ANY WARRANTY; without even the implied warranty of
36 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
37 * GNU General Public License for more details.
38 *
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
42 */
1da177e4 43
a8ca1037
JP
44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
1da177e4
LT
46#include <linux/module.h>
47#include <linux/init.h>
48#include <linux/slab.h>
49#include <linux/jiffies.h>
b74f3fdd 50#include <linux/platform_device.h>
943b0830 51#include <linux/hwmon.h>
303760b4
JD
52#include <linux/hwmon-sysfs.h>
53#include <linux/hwmon-vid.h>
943b0830 54#include <linux/err.h>
9a61bf63 55#include <linux/mutex.h>
87808be4 56#include <linux/sysfs.h>
98dd22c3
JD
57#include <linux/string.h>
58#include <linux/dmi.h>
b9acb64a 59#include <linux/acpi.h>
6055fae8 60#include <linux/io.h>
1da177e4 61
b74f3fdd 62#define DRVNAME "it87"
1da177e4 63
0531d98b
GR
64enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8782,
65 it8783 };
1da177e4 66
67b671bc
JD
67static unsigned short force_id;
68module_param(force_id, ushort, 0);
69MODULE_PARM_DESC(force_id, "Override the detected device ID");
70
b74f3fdd 71static struct platform_device *pdev;
72
1da177e4
LT
73#define REG 0x2e /* The register to read/write */
74#define DEV 0x07 /* Register: Logical device select */
75#define VAL 0x2f /* The value to read/write */
76#define PME 0x04 /* The device with the fan registers in it */
b4da93e4
JMS
77
78/* The device with the IT8718F/IT8720F VID value in it */
79#define GPIO 0x07
80
1da177e4
LT
81#define DEVID 0x20 /* Register: Device ID */
82#define DEVREV 0x22 /* Register: Device Revision */
83
5b0380c9 84static inline int superio_inb(int reg)
1da177e4
LT
85{
86 outb(reg, REG);
87 return inb(VAL);
88}
89
5b0380c9 90static inline void superio_outb(int reg, int val)
436cad2a
JD
91{
92 outb(reg, REG);
93 outb(val, VAL);
94}
95
1da177e4
LT
96static int superio_inw(int reg)
97{
98 int val;
99 outb(reg++, REG);
100 val = inb(VAL) << 8;
101 outb(reg, REG);
102 val |= inb(VAL);
103 return val;
104}
105
5b0380c9 106static inline void superio_select(int ldn)
1da177e4
LT
107{
108 outb(DEV, REG);
87673dd7 109 outb(ldn, VAL);
1da177e4
LT
110}
111
5b0380c9 112static inline int superio_enter(void)
1da177e4 113{
5b0380c9
NG
114 /*
115 * Try to reserve REG and REG + 1 for exclusive access.
116 */
117 if (!request_muxed_region(REG, 2, DRVNAME))
118 return -EBUSY;
119
1da177e4
LT
120 outb(0x87, REG);
121 outb(0x01, REG);
122 outb(0x55, REG);
123 outb(0x55, REG);
5b0380c9 124 return 0;
1da177e4
LT
125}
126
5b0380c9 127static inline void superio_exit(void)
1da177e4
LT
128{
129 outb(0x02, REG);
130 outb(0x02, VAL);
5b0380c9 131 release_region(REG, 2);
1da177e4
LT
132}
133
87673dd7 134/* Logical device 4 registers */
1da177e4
LT
135#define IT8712F_DEVID 0x8712
136#define IT8705F_DEVID 0x8705
17d648bf 137#define IT8716F_DEVID 0x8716
87673dd7 138#define IT8718F_DEVID 0x8718
b4da93e4 139#define IT8720F_DEVID 0x8720
44c1bcd4 140#define IT8721F_DEVID 0x8721
08a8f6e9 141#define IT8726F_DEVID 0x8726
16b5dda2 142#define IT8728F_DEVID 0x8728
0531d98b
GR
143#define IT8782F_DEVID 0x8782
144#define IT8783E_DEVID 0x8783
1da177e4
LT
145#define IT87_ACT_REG 0x30
146#define IT87_BASE_REG 0x60
147
87673dd7 148/* Logical device 7 registers (IT8712F and later) */
0531d98b 149#define IT87_SIO_GPIO1_REG 0x25
895ff267 150#define IT87_SIO_GPIO3_REG 0x27
591ec650 151#define IT87_SIO_GPIO5_REG 0x29
0531d98b 152#define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
87673dd7 153#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
0531d98b 154#define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
87673dd7 155#define IT87_SIO_VID_REG 0xfc /* VID value */
d9b327c3 156#define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
87673dd7 157
1da177e4 158/* Update battery voltage after every reading if true */
90ab5ee9 159static bool update_vbat;
1da177e4
LT
160
161/* Not all BIOSes properly configure the PWM registers */
90ab5ee9 162static bool fix_pwm_polarity;
1da177e4 163
1da177e4
LT
164/* Many IT87 constants specified below */
165
166/* Length of ISA address segment */
167#define IT87_EXTENT 8
168
87b4b663
BH
169/* Length of ISA address segment for Environmental Controller */
170#define IT87_EC_EXTENT 2
171
172/* Offset of EC registers from ISA base address */
173#define IT87_EC_OFFSET 5
174
175/* Where are the ISA address/data registers relative to the EC base address */
176#define IT87_ADDR_REG_OFFSET 0
177#define IT87_DATA_REG_OFFSET 1
1da177e4
LT
178
179/*----- The IT87 registers -----*/
180
181#define IT87_REG_CONFIG 0x00
182
183#define IT87_REG_ALARM1 0x01
184#define IT87_REG_ALARM2 0x02
185#define IT87_REG_ALARM3 0x03
186
4a0d71cf
GR
187/*
188 * The IT8718F and IT8720F have the VID value in a different register, in
189 * Super-I/O configuration space.
190 */
1da177e4 191#define IT87_REG_VID 0x0a
4a0d71cf
GR
192/*
193 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
194 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
195 * mode.
196 */
1da177e4 197#define IT87_REG_FAN_DIV 0x0b
17d648bf 198#define IT87_REG_FAN_16BIT 0x0c
1da177e4
LT
199
200/* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
201
c7f1f716
JD
202static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
203static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 };
204static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 };
205static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
1da177e4
LT
206#define IT87_REG_FAN_MAIN_CTRL 0x13
207#define IT87_REG_FAN_CTL 0x14
208#define IT87_REG_PWM(nr) (0x15 + (nr))
6229cdb2 209#define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8)
1da177e4
LT
210
211#define IT87_REG_VIN(nr) (0x20 + (nr))
212#define IT87_REG_TEMP(nr) (0x29 + (nr))
213
214#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
215#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
216#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
217#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
218
1da177e4
LT
219#define IT87_REG_VIN_ENABLE 0x50
220#define IT87_REG_TEMP_ENABLE 0x51
d9b327c3 221#define IT87_REG_BEEP_ENABLE 0x5c
1da177e4
LT
222
223#define IT87_REG_CHIPID 0x58
224
4f3f51bc
JD
225#define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
226#define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i))
227
1da177e4 228
b74f3fdd 229struct it87_sio_data {
230 enum chips type;
231 /* Values read from Super-I/O config space */
0475169c 232 u8 revision;
b74f3fdd 233 u8 vid_value;
d9b327c3 234 u8 beep_pin;
738e5e05 235 u8 internal; /* Internal sensors can be labeled */
591ec650 236 /* Features skipped based on config or DMI */
895ff267 237 u8 skip_vid;
591ec650 238 u8 skip_fan;
98dd22c3 239 u8 skip_pwm;
b74f3fdd 240};
241
4a0d71cf
GR
242/*
243 * For each registered chip, we need to keep some data in memory.
244 * The structure is dynamically allocated.
245 */
1da177e4 246struct it87_data {
1beeffe4 247 struct device *hwmon_dev;
1da177e4 248 enum chips type;
0475169c 249 u8 revision;
1da177e4 250
b74f3fdd 251 unsigned short addr;
252 const char *name;
9a61bf63 253 struct mutex update_lock;
1da177e4
LT
254 char valid; /* !=0 if following fields are valid */
255 unsigned long last_updated; /* In jiffies */
256
44c1bcd4 257 u16 in_scaled; /* Internal voltage sensors are scaled */
1da177e4 258 u8 in[9]; /* Register value */
3543a53f
JD
259 u8 in_max[8]; /* Register value */
260 u8 in_min[8]; /* Register value */
9060f8bd 261 u8 has_fan; /* Bitfield, fans enabled */
c7f1f716
JD
262 u16 fan[5]; /* Register values, possibly combined */
263 u16 fan_min[5]; /* Register values, possibly combined */
e267d250
JD
264 s8 temp[3]; /* Register value */
265 s8 temp_high[3]; /* Register value */
266 s8 temp_low[3]; /* Register value */
1da177e4
LT
267 u8 sensor; /* Register value */
268 u8 fan_div[3]; /* Register encoding, shifted right */
269 u8 vid; /* Register encoding, combined */
a7be58a1 270 u8 vrm;
1da177e4 271 u32 alarms; /* Register encoding, combined */
d9b327c3 272 u8 beeps; /* Register encoding */
1da177e4 273 u8 fan_main_ctrl; /* Register value */
f8d0c19a 274 u8 fan_ctl; /* Register value */
b99883dc 275
4a0d71cf
GR
276 /*
277 * The following 3 arrays correspond to the same registers up to
6229cdb2
JD
278 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
279 * 7, and we want to preserve settings on mode changes, so we have
280 * to track all values separately.
281 * Starting with the IT8721F, the manual PWM duty cycles are stored
282 * in separate registers (8-bit values), so the separate tracking
283 * is no longer needed, but it is still done to keep the driver
4a0d71cf
GR
284 * simple.
285 */
b99883dc 286 u8 pwm_ctrl[3]; /* Register value */
6229cdb2 287 u8 pwm_duty[3]; /* Manual PWM value set by user */
b99883dc 288 u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */
4f3f51bc
JD
289
290 /* Automatic fan speed control registers */
291 u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */
292 s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */
1da177e4 293};
0df6454d 294
16b5dda2
JD
295static inline int has_12mv_adc(const struct it87_data *data)
296{
297 /*
298 * IT8721F and later have a 12 mV ADC, also with internal scaling
299 * on selected inputs.
300 */
301 return data->type == it8721
302 || data->type == it8728;
303}
304
305static inline int has_newer_autopwm(const struct it87_data *data)
306{
307 /*
308 * IT8721F and later have separate registers for the temperature
309 * mapping and the manual duty cycle.
310 */
311 return data->type == it8721
312 || data->type == it8728;
313}
314
0531d98b 315static int adc_lsb(const struct it87_data *data, int nr)
44c1bcd4 316{
0531d98b
GR
317 int lsb = has_12mv_adc(data) ? 12 : 16;
318 if (data->in_scaled & (1 << nr))
319 lsb <<= 1;
320 return lsb;
321}
44c1bcd4 322
0531d98b
GR
323static u8 in_to_reg(const struct it87_data *data, int nr, long val)
324{
325 val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr));
44c1bcd4
JD
326 return SENSORS_LIMIT(val, 0, 255);
327}
328
329static int in_from_reg(const struct it87_data *data, int nr, int val)
330{
0531d98b 331 return val * adc_lsb(data, nr);
44c1bcd4 332}
0df6454d
JD
333
334static inline u8 FAN_TO_REG(long rpm, int div)
335{
336 if (rpm == 0)
337 return 255;
338 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
339 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
340 254);
341}
342
343static inline u16 FAN16_TO_REG(long rpm)
344{
345 if (rpm == 0)
346 return 0xffff;
347 return SENSORS_LIMIT((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
348}
349
350#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
351 1350000 / ((val) * (div)))
352/* The divider is fixed to 2 in 16-bit mode */
353#define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
354 1350000 / ((val) * 2))
355
356#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (((val) - 500) / 1000) : \
357 ((val) + 500) / 1000), -128, 127))
358#define TEMP_FROM_REG(val) ((val) * 1000)
359
44c1bcd4
JD
360static u8 pwm_to_reg(const struct it87_data *data, long val)
361{
16b5dda2 362 if (has_newer_autopwm(data))
44c1bcd4
JD
363 return val;
364 else
365 return val >> 1;
366}
367
368static int pwm_from_reg(const struct it87_data *data, u8 reg)
369{
16b5dda2 370 if (has_newer_autopwm(data))
44c1bcd4
JD
371 return reg;
372 else
373 return (reg & 0x7f) << 1;
374}
375
0df6454d
JD
376
377static int DIV_TO_REG(int val)
378{
379 int answer = 0;
380 while (answer < 7 && (val >>= 1))
381 answer++;
382 return answer;
383}
384#define DIV_FROM_REG(val) (1 << (val))
385
386static const unsigned int pwm_freq[8] = {
387 48000000 / 128,
388 24000000 / 128,
389 12000000 / 128,
390 8000000 / 128,
391 6000000 / 128,
392 3000000 / 128,
393 1500000 / 128,
394 750000 / 128,
395};
1da177e4 396
0475169c
AP
397static inline int has_16bit_fans(const struct it87_data *data)
398{
4a0d71cf
GR
399 /*
400 * IT8705F Datasheet 0.4.1, 3h == Version G.
401 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
402 * These are the first revisions with 16-bit tachometer support.
403 */
816d8c6a 404 return (data->type == it87 && data->revision >= 0x03)
859b9ef3 405 || (data->type == it8712 && data->revision >= 0x08)
0475169c 406 || data->type == it8716
b4da93e4 407 || data->type == it8718
44c1bcd4 408 || data->type == it8720
16b5dda2 409 || data->type == it8721
0531d98b
GR
410 || data->type == it8728
411 || data->type == it8782
412 || data->type == it8783;
0475169c 413}
1da177e4 414
4f3f51bc
JD
415static inline int has_old_autopwm(const struct it87_data *data)
416{
4a0d71cf
GR
417 /*
418 * The old automatic fan speed control interface is implemented
419 * by IT8705F chips up to revision F and IT8712F chips up to
420 * revision G.
421 */
4f3f51bc
JD
422 return (data->type == it87 && data->revision < 0x03)
423 || (data->type == it8712 && data->revision < 0x08);
424}
425
b74f3fdd 426static int it87_probe(struct platform_device *pdev);
d0546128 427static int __devexit it87_remove(struct platform_device *pdev);
1da177e4 428
b74f3fdd 429static int it87_read_value(struct it87_data *data, u8 reg);
430static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
1da177e4 431static struct it87_data *it87_update_device(struct device *dev);
b74f3fdd 432static int it87_check_pwm(struct device *dev);
433static void it87_init_device(struct platform_device *pdev);
1da177e4
LT
434
435
b74f3fdd 436static struct platform_driver it87_driver = {
cdaf7934 437 .driver = {
87218842 438 .owner = THIS_MODULE,
b74f3fdd 439 .name = DRVNAME,
cdaf7934 440 },
b74f3fdd 441 .probe = it87_probe,
442 .remove = __devexit_p(it87_remove),
fde09509
JD
443};
444
20ad93d4
JD
445static ssize_t show_in(struct device *dev, struct device_attribute *attr,
446 char *buf)
1da177e4 447{
20ad93d4
JD
448 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
449 int nr = sensor_attr->index;
450
1da177e4 451 struct it87_data *data = it87_update_device(dev);
44c1bcd4 452 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr]));
1da177e4
LT
453}
454
20ad93d4
JD
455static ssize_t show_in_min(struct device *dev, struct device_attribute *attr,
456 char *buf)
1da177e4 457{
20ad93d4
JD
458 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
459 int nr = sensor_attr->index;
460
1da177e4 461 struct it87_data *data = it87_update_device(dev);
44c1bcd4 462 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in_min[nr]));
1da177e4
LT
463}
464
20ad93d4
JD
465static ssize_t show_in_max(struct device *dev, struct device_attribute *attr,
466 char *buf)
1da177e4 467{
20ad93d4
JD
468 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
469 int nr = sensor_attr->index;
470
1da177e4 471 struct it87_data *data = it87_update_device(dev);
44c1bcd4 472 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in_max[nr]));
1da177e4
LT
473}
474
20ad93d4
JD
475static ssize_t set_in_min(struct device *dev, struct device_attribute *attr,
476 const char *buf, size_t count)
1da177e4 477{
20ad93d4
JD
478 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
479 int nr = sensor_attr->index;
480
b74f3fdd 481 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
482 unsigned long val;
483
179c4fdb 484 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 485 return -EINVAL;
1da177e4 486
9a61bf63 487 mutex_lock(&data->update_lock);
44c1bcd4 488 data->in_min[nr] = in_to_reg(data, nr, val);
b74f3fdd 489 it87_write_value(data, IT87_REG_VIN_MIN(nr),
1da177e4 490 data->in_min[nr]);
9a61bf63 491 mutex_unlock(&data->update_lock);
1da177e4
LT
492 return count;
493}
20ad93d4
JD
494static ssize_t set_in_max(struct device *dev, struct device_attribute *attr,
495 const char *buf, size_t count)
1da177e4 496{
20ad93d4
JD
497 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
498 int nr = sensor_attr->index;
499
b74f3fdd 500 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
501 unsigned long val;
502
179c4fdb 503 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 504 return -EINVAL;
1da177e4 505
9a61bf63 506 mutex_lock(&data->update_lock);
44c1bcd4 507 data->in_max[nr] = in_to_reg(data, nr, val);
b74f3fdd 508 it87_write_value(data, IT87_REG_VIN_MAX(nr),
1da177e4 509 data->in_max[nr]);
9a61bf63 510 mutex_unlock(&data->update_lock);
1da177e4
LT
511 return count;
512}
513
514#define show_in_offset(offset) \
20ad93d4
JD
515static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
516 show_in, NULL, offset);
1da177e4
LT
517
518#define limit_in_offset(offset) \
20ad93d4
JD
519static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
520 show_in_min, set_in_min, offset); \
521static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
522 show_in_max, set_in_max, offset);
1da177e4
LT
523
524show_in_offset(0);
525limit_in_offset(0);
526show_in_offset(1);
527limit_in_offset(1);
528show_in_offset(2);
529limit_in_offset(2);
530show_in_offset(3);
531limit_in_offset(3);
532show_in_offset(4);
533limit_in_offset(4);
534show_in_offset(5);
535limit_in_offset(5);
536show_in_offset(6);
537limit_in_offset(6);
538show_in_offset(7);
539limit_in_offset(7);
540show_in_offset(8);
541
542/* 3 temperatures */
20ad93d4
JD
543static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
544 char *buf)
1da177e4 545{
20ad93d4
JD
546 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
547 int nr = sensor_attr->index;
548
1da177e4
LT
549 struct it87_data *data = it87_update_device(dev);
550 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr]));
551}
20ad93d4
JD
552static ssize_t show_temp_max(struct device *dev, struct device_attribute *attr,
553 char *buf)
1da177e4 554{
20ad93d4
JD
555 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
556 int nr = sensor_attr->index;
557
1da177e4
LT
558 struct it87_data *data = it87_update_device(dev);
559 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_high[nr]));
560}
20ad93d4
JD
561static ssize_t show_temp_min(struct device *dev, struct device_attribute *attr,
562 char *buf)
1da177e4 563{
20ad93d4
JD
564 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
565 int nr = sensor_attr->index;
566
1da177e4
LT
567 struct it87_data *data = it87_update_device(dev);
568 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_low[nr]));
569}
20ad93d4
JD
570static ssize_t set_temp_max(struct device *dev, struct device_attribute *attr,
571 const char *buf, size_t count)
1da177e4 572{
20ad93d4
JD
573 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
574 int nr = sensor_attr->index;
575
b74f3fdd 576 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
577 long val;
578
179c4fdb 579 if (kstrtol(buf, 10, &val) < 0)
f5f64501 580 return -EINVAL;
1da177e4 581
9a61bf63 582 mutex_lock(&data->update_lock);
1da177e4 583 data->temp_high[nr] = TEMP_TO_REG(val);
b74f3fdd 584 it87_write_value(data, IT87_REG_TEMP_HIGH(nr), data->temp_high[nr]);
9a61bf63 585 mutex_unlock(&data->update_lock);
1da177e4
LT
586 return count;
587}
20ad93d4
JD
588static ssize_t set_temp_min(struct device *dev, struct device_attribute *attr,
589 const char *buf, size_t count)
1da177e4 590{
20ad93d4
JD
591 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
592 int nr = sensor_attr->index;
593
b74f3fdd 594 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
595 long val;
596
179c4fdb 597 if (kstrtol(buf, 10, &val) < 0)
f5f64501 598 return -EINVAL;
1da177e4 599
9a61bf63 600 mutex_lock(&data->update_lock);
1da177e4 601 data->temp_low[nr] = TEMP_TO_REG(val);
b74f3fdd 602 it87_write_value(data, IT87_REG_TEMP_LOW(nr), data->temp_low[nr]);
9a61bf63 603 mutex_unlock(&data->update_lock);
1da177e4
LT
604 return count;
605}
606#define show_temp_offset(offset) \
20ad93d4
JD
607static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
608 show_temp, NULL, offset - 1); \
609static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
610 show_temp_max, set_temp_max, offset - 1); \
611static SENSOR_DEVICE_ATTR(temp##offset##_min, S_IRUGO | S_IWUSR, \
612 show_temp_min, set_temp_min, offset - 1);
1da177e4
LT
613
614show_temp_offset(1);
615show_temp_offset(2);
616show_temp_offset(3);
617
20ad93d4
JD
618static ssize_t show_sensor(struct device *dev, struct device_attribute *attr,
619 char *buf)
1da177e4 620{
20ad93d4
JD
621 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
622 int nr = sensor_attr->index;
1da177e4 623 struct it87_data *data = it87_update_device(dev);
4a0d71cf 624 u8 reg = data->sensor; /* In case value is updated while used */
5f2dc798 625
1da177e4
LT
626 if (reg & (1 << nr))
627 return sprintf(buf, "3\n"); /* thermal diode */
628 if (reg & (8 << nr))
4ed10779 629 return sprintf(buf, "4\n"); /* thermistor */
1da177e4
LT
630 return sprintf(buf, "0\n"); /* disabled */
631}
20ad93d4
JD
632static ssize_t set_sensor(struct device *dev, struct device_attribute *attr,
633 const char *buf, size_t count)
1da177e4 634{
20ad93d4
JD
635 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
636 int nr = sensor_attr->index;
637
b74f3fdd 638 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 639 long val;
8acf07c5 640 u8 reg;
f5f64501 641
179c4fdb 642 if (kstrtol(buf, 10, &val) < 0)
f5f64501 643 return -EINVAL;
1da177e4 644
8acf07c5
JD
645 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
646 reg &= ~(1 << nr);
647 reg &= ~(8 << nr);
4ed10779
JD
648 if (val == 2) { /* backwards compatibility */
649 dev_warn(dev, "Sensor type 2 is deprecated, please use 4 "
650 "instead\n");
651 val = 4;
652 }
653 /* 3 = thermal diode; 4 = thermistor; 0 = disabled */
1da177e4 654 if (val == 3)
8acf07c5 655 reg |= 1 << nr;
4ed10779 656 else if (val == 4)
8acf07c5
JD
657 reg |= 8 << nr;
658 else if (val != 0)
1da177e4 659 return -EINVAL;
8acf07c5
JD
660
661 mutex_lock(&data->update_lock);
662 data->sensor = reg;
b74f3fdd 663 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
2b3d1d87 664 data->valid = 0; /* Force cache refresh */
9a61bf63 665 mutex_unlock(&data->update_lock);
1da177e4
LT
666 return count;
667}
668#define show_sensor_offset(offset) \
20ad93d4
JD
669static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
670 show_sensor, set_sensor, offset - 1);
1da177e4
LT
671
672show_sensor_offset(1);
673show_sensor_offset(2);
674show_sensor_offset(3);
675
676/* 3 Fans */
b99883dc
JD
677
678static int pwm_mode(const struct it87_data *data, int nr)
679{
680 int ctrl = data->fan_main_ctrl & (1 << nr);
681
682 if (ctrl == 0) /* Full speed */
683 return 0;
684 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
685 return 2;
686 else /* Manual mode */
687 return 1;
688}
689
20ad93d4
JD
690static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
691 char *buf)
1da177e4 692{
20ad93d4
JD
693 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
694 int nr = sensor_attr->index;
695
1da177e4 696 struct it87_data *data = it87_update_device(dev);
5f2dc798 697 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
1da177e4
LT
698 DIV_FROM_REG(data->fan_div[nr])));
699}
20ad93d4
JD
700static ssize_t show_fan_min(struct device *dev, struct device_attribute *attr,
701 char *buf)
1da177e4 702{
20ad93d4
JD
703 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
704 int nr = sensor_attr->index;
705
1da177e4 706 struct it87_data *data = it87_update_device(dev);
5f2dc798
JD
707 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr],
708 DIV_FROM_REG(data->fan_div[nr])));
1da177e4 709}
20ad93d4
JD
710static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
711 char *buf)
1da177e4 712{
20ad93d4
JD
713 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
714 int nr = sensor_attr->index;
715
1da177e4
LT
716 struct it87_data *data = it87_update_device(dev);
717 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
718}
5f2dc798
JD
719static ssize_t show_pwm_enable(struct device *dev,
720 struct device_attribute *attr, char *buf)
1da177e4 721{
20ad93d4
JD
722 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
723 int nr = sensor_attr->index;
724
1da177e4 725 struct it87_data *data = it87_update_device(dev);
b99883dc 726 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1da177e4 727}
20ad93d4
JD
728static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
729 char *buf)
1da177e4 730{
20ad93d4
JD
731 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
732 int nr = sensor_attr->index;
733
1da177e4 734 struct it87_data *data = it87_update_device(dev);
44c1bcd4
JD
735 return sprintf(buf, "%d\n",
736 pwm_from_reg(data, data->pwm_duty[nr]));
1da177e4 737}
f8d0c19a
JD
738static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
739 char *buf)
740{
741 struct it87_data *data = it87_update_device(dev);
742 int index = (data->fan_ctl >> 4) & 0x07;
743
744 return sprintf(buf, "%u\n", pwm_freq[index]);
745}
20ad93d4
JD
746static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
747 const char *buf, size_t count)
1da177e4 748{
20ad93d4
JD
749 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
750 int nr = sensor_attr->index;
751
b74f3fdd 752 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 753 long val;
7f999aa7 754 u8 reg;
1da177e4 755
179c4fdb 756 if (kstrtol(buf, 10, &val) < 0)
f5f64501
JD
757 return -EINVAL;
758
9a61bf63 759 mutex_lock(&data->update_lock);
b74f3fdd 760 reg = it87_read_value(data, IT87_REG_FAN_DIV);
07eab46d 761 switch (nr) {
5f2dc798
JD
762 case 0:
763 data->fan_div[nr] = reg & 0x07;
764 break;
765 case 1:
766 data->fan_div[nr] = (reg >> 3) & 0x07;
767 break;
768 case 2:
769 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
770 break;
07eab46d
JD
771 }
772
1da177e4 773 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 774 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
9a61bf63 775 mutex_unlock(&data->update_lock);
1da177e4
LT
776 return count;
777}
20ad93d4
JD
778static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
779 const char *buf, size_t count)
1da177e4 780{
20ad93d4
JD
781 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
782 int nr = sensor_attr->index;
783
b74f3fdd 784 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 785 unsigned long val;
8ab4ec3e 786 int min;
1da177e4
LT
787 u8 old;
788
179c4fdb 789 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD
790 return -EINVAL;
791
9a61bf63 792 mutex_lock(&data->update_lock);
b74f3fdd 793 old = it87_read_value(data, IT87_REG_FAN_DIV);
1da177e4 794
8ab4ec3e
JD
795 /* Save fan min limit */
796 min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
1da177e4
LT
797
798 switch (nr) {
799 case 0:
800 case 1:
801 data->fan_div[nr] = DIV_TO_REG(val);
802 break;
803 case 2:
804 if (val < 8)
805 data->fan_div[nr] = 1;
806 else
807 data->fan_div[nr] = 3;
808 }
809 val = old & 0x80;
810 val |= (data->fan_div[0] & 0x07);
811 val |= (data->fan_div[1] & 0x07) << 3;
812 if (data->fan_div[2] == 3)
813 val |= 0x1 << 6;
b74f3fdd 814 it87_write_value(data, IT87_REG_FAN_DIV, val);
1da177e4 815
8ab4ec3e
JD
816 /* Restore fan min limit */
817 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 818 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
8ab4ec3e 819
9a61bf63 820 mutex_unlock(&data->update_lock);
1da177e4
LT
821 return count;
822}
cccfc9c4
JD
823
824/* Returns 0 if OK, -EINVAL otherwise */
825static int check_trip_points(struct device *dev, int nr)
826{
827 const struct it87_data *data = dev_get_drvdata(dev);
828 int i, err = 0;
829
830 if (has_old_autopwm(data)) {
831 for (i = 0; i < 3; i++) {
832 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
833 err = -EINVAL;
834 }
835 for (i = 0; i < 2; i++) {
836 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
837 err = -EINVAL;
838 }
839 }
840
841 if (err) {
842 dev_err(dev, "Inconsistent trip points, not switching to "
843 "automatic mode\n");
844 dev_err(dev, "Adjust the trip points and try again\n");
845 }
846 return err;
847}
848
20ad93d4
JD
849static ssize_t set_pwm_enable(struct device *dev,
850 struct device_attribute *attr, const char *buf, size_t count)
1da177e4 851{
20ad93d4
JD
852 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
853 int nr = sensor_attr->index;
854
b74f3fdd 855 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 856 long val;
1da177e4 857
179c4fdb 858 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
b99883dc
JD
859 return -EINVAL;
860
cccfc9c4
JD
861 /* Check trip points before switching to automatic mode */
862 if (val == 2) {
863 if (check_trip_points(dev, nr) < 0)
864 return -EINVAL;
865 }
866
9a61bf63 867 mutex_lock(&data->update_lock);
1da177e4
LT
868
869 if (val == 0) {
870 int tmp;
871 /* make sure the fan is on when in on/off mode */
b74f3fdd 872 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
873 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1da177e4
LT
874 /* set on/off mode */
875 data->fan_main_ctrl &= ~(1 << nr);
5f2dc798
JD
876 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
877 data->fan_main_ctrl);
b99883dc
JD
878 } else {
879 if (val == 1) /* Manual mode */
16b5dda2 880 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
6229cdb2
JD
881 data->pwm_temp_map[nr] :
882 data->pwm_duty[nr];
b99883dc
JD
883 else /* Automatic mode */
884 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
885 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1da177e4
LT
886 /* set SmartGuardian mode */
887 data->fan_main_ctrl |= (1 << nr);
5f2dc798
JD
888 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
889 data->fan_main_ctrl);
1da177e4
LT
890 }
891
9a61bf63 892 mutex_unlock(&data->update_lock);
1da177e4
LT
893 return count;
894}
20ad93d4
JD
895static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
896 const char *buf, size_t count)
1da177e4 897{
20ad93d4
JD
898 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
899 int nr = sensor_attr->index;
900
b74f3fdd 901 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 902 long val;
1da177e4 903
179c4fdb 904 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1da177e4
LT
905 return -EINVAL;
906
9a61bf63 907 mutex_lock(&data->update_lock);
16b5dda2 908 if (has_newer_autopwm(data)) {
4a0d71cf
GR
909 /*
910 * If we are in automatic mode, the PWM duty cycle register
911 * is read-only so we can't write the value.
912 */
6229cdb2
JD
913 if (data->pwm_ctrl[nr] & 0x80) {
914 mutex_unlock(&data->update_lock);
915 return -EBUSY;
916 }
917 data->pwm_duty[nr] = pwm_to_reg(data, val);
918 it87_write_value(data, IT87_REG_PWM_DUTY(nr),
919 data->pwm_duty[nr]);
920 } else {
921 data->pwm_duty[nr] = pwm_to_reg(data, val);
4a0d71cf
GR
922 /*
923 * If we are in manual mode, write the duty cycle immediately;
924 * otherwise, just store it for later use.
925 */
6229cdb2
JD
926 if (!(data->pwm_ctrl[nr] & 0x80)) {
927 data->pwm_ctrl[nr] = data->pwm_duty[nr];
928 it87_write_value(data, IT87_REG_PWM(nr),
929 data->pwm_ctrl[nr]);
930 }
b99883dc 931 }
9a61bf63 932 mutex_unlock(&data->update_lock);
1da177e4
LT
933 return count;
934}
f8d0c19a
JD
935static ssize_t set_pwm_freq(struct device *dev,
936 struct device_attribute *attr, const char *buf, size_t count)
937{
b74f3fdd 938 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 939 unsigned long val;
f8d0c19a
JD
940 int i;
941
179c4fdb 942 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD
943 return -EINVAL;
944
f8d0c19a
JD
945 /* Search for the nearest available frequency */
946 for (i = 0; i < 7; i++) {
947 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
948 break;
949 }
950
951 mutex_lock(&data->update_lock);
b74f3fdd 952 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
f8d0c19a 953 data->fan_ctl |= i << 4;
b74f3fdd 954 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
f8d0c19a
JD
955 mutex_unlock(&data->update_lock);
956
957 return count;
958}
94ac7ee6
JD
959static ssize_t show_pwm_temp_map(struct device *dev,
960 struct device_attribute *attr, char *buf)
961{
962 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
963 int nr = sensor_attr->index;
964
965 struct it87_data *data = it87_update_device(dev);
966 int map;
967
968 if (data->pwm_temp_map[nr] < 3)
969 map = 1 << data->pwm_temp_map[nr];
970 else
971 map = 0; /* Should never happen */
972 return sprintf(buf, "%d\n", map);
973}
974static ssize_t set_pwm_temp_map(struct device *dev,
975 struct device_attribute *attr, const char *buf, size_t count)
976{
977 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
978 int nr = sensor_attr->index;
979
980 struct it87_data *data = dev_get_drvdata(dev);
981 long val;
982 u8 reg;
983
4a0d71cf
GR
984 /*
985 * This check can go away if we ever support automatic fan speed
986 * control on newer chips.
987 */
4f3f51bc
JD
988 if (!has_old_autopwm(data)) {
989 dev_notice(dev, "Mapping change disabled for safety reasons\n");
990 return -EINVAL;
991 }
992
179c4fdb 993 if (kstrtol(buf, 10, &val) < 0)
94ac7ee6
JD
994 return -EINVAL;
995
996 switch (val) {
997 case (1 << 0):
998 reg = 0x00;
999 break;
1000 case (1 << 1):
1001 reg = 0x01;
1002 break;
1003 case (1 << 2):
1004 reg = 0x02;
1005 break;
1006 default:
1007 return -EINVAL;
1008 }
1009
1010 mutex_lock(&data->update_lock);
1011 data->pwm_temp_map[nr] = reg;
4a0d71cf
GR
1012 /*
1013 * If we are in automatic mode, write the temp mapping immediately;
1014 * otherwise, just store it for later use.
1015 */
94ac7ee6
JD
1016 if (data->pwm_ctrl[nr] & 0x80) {
1017 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1018 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1019 }
1020 mutex_unlock(&data->update_lock);
1021 return count;
1022}
1da177e4 1023
4f3f51bc
JD
1024static ssize_t show_auto_pwm(struct device *dev,
1025 struct device_attribute *attr, char *buf)
1026{
1027 struct it87_data *data = it87_update_device(dev);
1028 struct sensor_device_attribute_2 *sensor_attr =
1029 to_sensor_dev_attr_2(attr);
1030 int nr = sensor_attr->nr;
1031 int point = sensor_attr->index;
1032
44c1bcd4
JD
1033 return sprintf(buf, "%d\n",
1034 pwm_from_reg(data, data->auto_pwm[nr][point]));
4f3f51bc
JD
1035}
1036
1037static ssize_t set_auto_pwm(struct device *dev,
1038 struct device_attribute *attr, const char *buf, size_t count)
1039{
1040 struct it87_data *data = dev_get_drvdata(dev);
1041 struct sensor_device_attribute_2 *sensor_attr =
1042 to_sensor_dev_attr_2(attr);
1043 int nr = sensor_attr->nr;
1044 int point = sensor_attr->index;
1045 long val;
1046
179c4fdb 1047 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
4f3f51bc
JD
1048 return -EINVAL;
1049
1050 mutex_lock(&data->update_lock);
44c1bcd4 1051 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
4f3f51bc
JD
1052 it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1053 data->auto_pwm[nr][point]);
1054 mutex_unlock(&data->update_lock);
1055 return count;
1056}
1057
1058static ssize_t show_auto_temp(struct device *dev,
1059 struct device_attribute *attr, char *buf)
1060{
1061 struct it87_data *data = it87_update_device(dev);
1062 struct sensor_device_attribute_2 *sensor_attr =
1063 to_sensor_dev_attr_2(attr);
1064 int nr = sensor_attr->nr;
1065 int point = sensor_attr->index;
1066
1067 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1068}
1069
1070static ssize_t set_auto_temp(struct device *dev,
1071 struct device_attribute *attr, const char *buf, size_t count)
1072{
1073 struct it87_data *data = dev_get_drvdata(dev);
1074 struct sensor_device_attribute_2 *sensor_attr =
1075 to_sensor_dev_attr_2(attr);
1076 int nr = sensor_attr->nr;
1077 int point = sensor_attr->index;
1078 long val;
1079
179c4fdb 1080 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
4f3f51bc
JD
1081 return -EINVAL;
1082
1083 mutex_lock(&data->update_lock);
1084 data->auto_temp[nr][point] = TEMP_TO_REG(val);
1085 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1086 data->auto_temp[nr][point]);
1087 mutex_unlock(&data->update_lock);
1088 return count;
1089}
1090
20ad93d4
JD
1091#define show_fan_offset(offset) \
1092static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
1093 show_fan, NULL, offset - 1); \
1094static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
1095 show_fan_min, set_fan_min, offset - 1); \
1096static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
1097 show_fan_div, set_fan_div, offset - 1);
1da177e4
LT
1098
1099show_fan_offset(1);
1100show_fan_offset(2);
1101show_fan_offset(3);
1102
1103#define show_pwm_offset(offset) \
20ad93d4
JD
1104static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
1105 show_pwm_enable, set_pwm_enable, offset - 1); \
1106static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
f8d0c19a
JD
1107 show_pwm, set_pwm, offset - 1); \
1108static DEVICE_ATTR(pwm##offset##_freq, \
1109 (offset == 1 ? S_IRUGO | S_IWUSR : S_IRUGO), \
94ac7ee6
JD
1110 show_pwm_freq, (offset == 1 ? set_pwm_freq : NULL)); \
1111static SENSOR_DEVICE_ATTR(pwm##offset##_auto_channels_temp, \
4f3f51bc
JD
1112 S_IRUGO | S_IWUSR, show_pwm_temp_map, set_pwm_temp_map, \
1113 offset - 1); \
1114static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_pwm, \
1115 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1116 offset - 1, 0); \
1117static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_pwm, \
1118 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1119 offset - 1, 1); \
1120static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_pwm, \
1121 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1122 offset - 1, 2); \
1123static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_pwm, \
1124 S_IRUGO, show_auto_pwm, NULL, offset - 1, 3); \
1125static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp, \
1126 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1127 offset - 1, 1); \
1128static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp_hyst, \
1129 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1130 offset - 1, 0); \
1131static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_temp, \
1132 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1133 offset - 1, 2); \
1134static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_temp, \
1135 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1136 offset - 1, 3); \
1137static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_temp, \
1138 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1139 offset - 1, 4);
1da177e4
LT
1140
1141show_pwm_offset(1);
1142show_pwm_offset(2);
1143show_pwm_offset(3);
1144
17d648bf
JD
1145/* A different set of callbacks for 16-bit fans */
1146static ssize_t show_fan16(struct device *dev, struct device_attribute *attr,
1147 char *buf)
1148{
1149 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1150 int nr = sensor_attr->index;
1151 struct it87_data *data = it87_update_device(dev);
1152 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan[nr]));
1153}
1154
1155static ssize_t show_fan16_min(struct device *dev, struct device_attribute *attr,
1156 char *buf)
1157{
1158 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1159 int nr = sensor_attr->index;
1160 struct it87_data *data = it87_update_device(dev);
1161 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan_min[nr]));
1162}
1163
1164static ssize_t set_fan16_min(struct device *dev, struct device_attribute *attr,
1165 const char *buf, size_t count)
1166{
1167 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1168 int nr = sensor_attr->index;
b74f3fdd 1169 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
1170 long val;
1171
179c4fdb 1172 if (kstrtol(buf, 10, &val) < 0)
f5f64501 1173 return -EINVAL;
17d648bf
JD
1174
1175 mutex_lock(&data->update_lock);
1176 data->fan_min[nr] = FAN16_TO_REG(val);
c7f1f716 1177 it87_write_value(data, IT87_REG_FAN_MIN[nr],
17d648bf 1178 data->fan_min[nr] & 0xff);
c7f1f716 1179 it87_write_value(data, IT87_REG_FANX_MIN[nr],
17d648bf
JD
1180 data->fan_min[nr] >> 8);
1181 mutex_unlock(&data->update_lock);
1182 return count;
1183}
1184
4a0d71cf
GR
1185/*
1186 * We want to use the same sysfs file names as 8-bit fans, but we need
1187 * different variable names, so we have to use SENSOR_ATTR instead of
1188 * SENSOR_DEVICE_ATTR.
1189 */
17d648bf
JD
1190#define show_fan16_offset(offset) \
1191static struct sensor_device_attribute sensor_dev_attr_fan##offset##_input16 \
1192 = SENSOR_ATTR(fan##offset##_input, S_IRUGO, \
1193 show_fan16, NULL, offset - 1); \
1194static struct sensor_device_attribute sensor_dev_attr_fan##offset##_min16 \
1195 = SENSOR_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
1196 show_fan16_min, set_fan16_min, offset - 1)
1197
1198show_fan16_offset(1);
1199show_fan16_offset(2);
1200show_fan16_offset(3);
c7f1f716
JD
1201show_fan16_offset(4);
1202show_fan16_offset(5);
17d648bf 1203
1da177e4 1204/* Alarms */
5f2dc798
JD
1205static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1206 char *buf)
1da177e4
LT
1207{
1208 struct it87_data *data = it87_update_device(dev);
68188ba7 1209 return sprintf(buf, "%u\n", data->alarms);
1da177e4 1210}
1d66c64c 1211static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1da177e4 1212
0124dd78
JD
1213static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1214 char *buf)
1215{
1216 int bitnr = to_sensor_dev_attr(attr)->index;
1217 struct it87_data *data = it87_update_device(dev);
1218 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1219}
3d30f9e6
JD
1220
1221static ssize_t clear_intrusion(struct device *dev, struct device_attribute
1222 *attr, const char *buf, size_t count)
1223{
1224 struct it87_data *data = dev_get_drvdata(dev);
1225 long val;
1226 int config;
1227
179c4fdb 1228 if (kstrtol(buf, 10, &val) < 0 || val != 0)
3d30f9e6
JD
1229 return -EINVAL;
1230
1231 mutex_lock(&data->update_lock);
1232 config = it87_read_value(data, IT87_REG_CONFIG);
1233 if (config < 0) {
1234 count = config;
1235 } else {
1236 config |= 1 << 5;
1237 it87_write_value(data, IT87_REG_CONFIG, config);
1238 /* Invalidate cache to force re-read */
1239 data->valid = 0;
1240 }
1241 mutex_unlock(&data->update_lock);
1242
1243 return count;
1244}
1245
0124dd78
JD
1246static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1247static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1248static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1249static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1250static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1251static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1252static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1253static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1254static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1255static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1256static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1257static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1258static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1259static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1260static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1261static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
3d30f9e6
JD
1262static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1263 show_alarm, clear_intrusion, 4);
0124dd78 1264
d9b327c3
JD
1265static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1266 char *buf)
1267{
1268 int bitnr = to_sensor_dev_attr(attr)->index;
1269 struct it87_data *data = it87_update_device(dev);
1270 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1271}
1272static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1273 const char *buf, size_t count)
1274{
1275 int bitnr = to_sensor_dev_attr(attr)->index;
1276 struct it87_data *data = dev_get_drvdata(dev);
1277 long val;
1278
179c4fdb 1279 if (kstrtol(buf, 10, &val) < 0
d9b327c3
JD
1280 || (val != 0 && val != 1))
1281 return -EINVAL;
1282
1283 mutex_lock(&data->update_lock);
1284 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1285 if (val)
1286 data->beeps |= (1 << bitnr);
1287 else
1288 data->beeps &= ~(1 << bitnr);
1289 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1290 mutex_unlock(&data->update_lock);
1291 return count;
1292}
1293
1294static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1295 show_beep, set_beep, 1);
1296static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1297static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1298static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1299static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1300static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1301static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1302static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1303/* fanX_beep writability is set later */
1304static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1305static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1306static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1307static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1308static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1309static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1310 show_beep, set_beep, 2);
1311static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1312static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1313
5f2dc798
JD
1314static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1315 char *buf)
1da177e4 1316{
90d6619a 1317 struct it87_data *data = dev_get_drvdata(dev);
a7be58a1 1318 return sprintf(buf, "%u\n", data->vrm);
1da177e4 1319}
5f2dc798
JD
1320static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1321 const char *buf, size_t count)
1da177e4 1322{
b74f3fdd 1323 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
1324 unsigned long val;
1325
179c4fdb 1326 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 1327 return -EINVAL;
1da177e4 1328
1da177e4
LT
1329 data->vrm = val;
1330
1331 return count;
1332}
1333static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4 1334
5f2dc798
JD
1335static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1336 char *buf)
1da177e4
LT
1337{
1338 struct it87_data *data = it87_update_device(dev);
1339 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1340}
1341static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
87808be4 1342
738e5e05
JD
1343static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1344 char *buf)
1345{
3c4c4971 1346 static const char * const labels[] = {
738e5e05
JD
1347 "+5V",
1348 "5VSB",
1349 "Vbat",
1350 };
3c4c4971 1351 static const char * const labels_it8721[] = {
44c1bcd4
JD
1352 "+3.3V",
1353 "3VSB",
1354 "Vbat",
1355 };
1356 struct it87_data *data = dev_get_drvdata(dev);
738e5e05
JD
1357 int nr = to_sensor_dev_attr(attr)->index;
1358
16b5dda2
JD
1359 return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr]
1360 : labels[nr]);
738e5e05
JD
1361}
1362static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1363static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1364static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1365
b74f3fdd 1366static ssize_t show_name(struct device *dev, struct device_attribute
1367 *devattr, char *buf)
1368{
1369 struct it87_data *data = dev_get_drvdata(dev);
1370 return sprintf(buf, "%s\n", data->name);
1371}
1372static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1373
87808be4
JD
1374static struct attribute *it87_attributes[] = {
1375 &sensor_dev_attr_in0_input.dev_attr.attr,
1376 &sensor_dev_attr_in1_input.dev_attr.attr,
1377 &sensor_dev_attr_in2_input.dev_attr.attr,
1378 &sensor_dev_attr_in3_input.dev_attr.attr,
1379 &sensor_dev_attr_in4_input.dev_attr.attr,
1380 &sensor_dev_attr_in5_input.dev_attr.attr,
1381 &sensor_dev_attr_in6_input.dev_attr.attr,
1382 &sensor_dev_attr_in7_input.dev_attr.attr,
1383 &sensor_dev_attr_in8_input.dev_attr.attr,
1384 &sensor_dev_attr_in0_min.dev_attr.attr,
1385 &sensor_dev_attr_in1_min.dev_attr.attr,
1386 &sensor_dev_attr_in2_min.dev_attr.attr,
1387 &sensor_dev_attr_in3_min.dev_attr.attr,
1388 &sensor_dev_attr_in4_min.dev_attr.attr,
1389 &sensor_dev_attr_in5_min.dev_attr.attr,
1390 &sensor_dev_attr_in6_min.dev_attr.attr,
1391 &sensor_dev_attr_in7_min.dev_attr.attr,
1392 &sensor_dev_attr_in0_max.dev_attr.attr,
1393 &sensor_dev_attr_in1_max.dev_attr.attr,
1394 &sensor_dev_attr_in2_max.dev_attr.attr,
1395 &sensor_dev_attr_in3_max.dev_attr.attr,
1396 &sensor_dev_attr_in4_max.dev_attr.attr,
1397 &sensor_dev_attr_in5_max.dev_attr.attr,
1398 &sensor_dev_attr_in6_max.dev_attr.attr,
1399 &sensor_dev_attr_in7_max.dev_attr.attr,
0124dd78
JD
1400 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1401 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1402 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1403 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1404 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1405 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1406 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1407 &sensor_dev_attr_in7_alarm.dev_attr.attr,
87808be4
JD
1408
1409 &sensor_dev_attr_temp1_input.dev_attr.attr,
1410 &sensor_dev_attr_temp2_input.dev_attr.attr,
1411 &sensor_dev_attr_temp3_input.dev_attr.attr,
1412 &sensor_dev_attr_temp1_max.dev_attr.attr,
1413 &sensor_dev_attr_temp2_max.dev_attr.attr,
1414 &sensor_dev_attr_temp3_max.dev_attr.attr,
1415 &sensor_dev_attr_temp1_min.dev_attr.attr,
1416 &sensor_dev_attr_temp2_min.dev_attr.attr,
1417 &sensor_dev_attr_temp3_min.dev_attr.attr,
1418 &sensor_dev_attr_temp1_type.dev_attr.attr,
1419 &sensor_dev_attr_temp2_type.dev_attr.attr,
1420 &sensor_dev_attr_temp3_type.dev_attr.attr,
0124dd78
JD
1421 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1422 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1423 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
87808be4
JD
1424
1425 &dev_attr_alarms.attr,
3d30f9e6 1426 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
b74f3fdd 1427 &dev_attr_name.attr,
87808be4
JD
1428 NULL
1429};
1430
1431static const struct attribute_group it87_group = {
1432 .attrs = it87_attributes,
1433};
1434
d9b327c3
JD
1435static struct attribute *it87_attributes_beep[] = {
1436 &sensor_dev_attr_in0_beep.dev_attr.attr,
1437 &sensor_dev_attr_in1_beep.dev_attr.attr,
1438 &sensor_dev_attr_in2_beep.dev_attr.attr,
1439 &sensor_dev_attr_in3_beep.dev_attr.attr,
1440 &sensor_dev_attr_in4_beep.dev_attr.attr,
1441 &sensor_dev_attr_in5_beep.dev_attr.attr,
1442 &sensor_dev_attr_in6_beep.dev_attr.attr,
1443 &sensor_dev_attr_in7_beep.dev_attr.attr,
1444
1445 &sensor_dev_attr_temp1_beep.dev_attr.attr,
1446 &sensor_dev_attr_temp2_beep.dev_attr.attr,
1447 &sensor_dev_attr_temp3_beep.dev_attr.attr,
1448 NULL
1449};
1450
1451static const struct attribute_group it87_group_beep = {
1452 .attrs = it87_attributes_beep,
1453};
1454
723a0aa0 1455static struct attribute *it87_attributes_fan16[5][3+1] = { {
87808be4
JD
1456 &sensor_dev_attr_fan1_input16.dev_attr.attr,
1457 &sensor_dev_attr_fan1_min16.dev_attr.attr,
723a0aa0
JD
1458 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1459 NULL
1460}, {
87808be4
JD
1461 &sensor_dev_attr_fan2_input16.dev_attr.attr,
1462 &sensor_dev_attr_fan2_min16.dev_attr.attr,
723a0aa0
JD
1463 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1464 NULL
1465}, {
87808be4
JD
1466 &sensor_dev_attr_fan3_input16.dev_attr.attr,
1467 &sensor_dev_attr_fan3_min16.dev_attr.attr,
723a0aa0
JD
1468 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1469 NULL
1470}, {
c7f1f716
JD
1471 &sensor_dev_attr_fan4_input16.dev_attr.attr,
1472 &sensor_dev_attr_fan4_min16.dev_attr.attr,
723a0aa0
JD
1473 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1474 NULL
1475}, {
c7f1f716
JD
1476 &sensor_dev_attr_fan5_input16.dev_attr.attr,
1477 &sensor_dev_attr_fan5_min16.dev_attr.attr,
723a0aa0
JD
1478 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1479 NULL
1480} };
1481
1482static const struct attribute_group it87_group_fan16[5] = {
1483 { .attrs = it87_attributes_fan16[0] },
1484 { .attrs = it87_attributes_fan16[1] },
1485 { .attrs = it87_attributes_fan16[2] },
1486 { .attrs = it87_attributes_fan16[3] },
1487 { .attrs = it87_attributes_fan16[4] },
1488};
87808be4 1489
723a0aa0 1490static struct attribute *it87_attributes_fan[3][4+1] = { {
87808be4
JD
1491 &sensor_dev_attr_fan1_input.dev_attr.attr,
1492 &sensor_dev_attr_fan1_min.dev_attr.attr,
1493 &sensor_dev_attr_fan1_div.dev_attr.attr,
723a0aa0
JD
1494 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1495 NULL
1496}, {
87808be4
JD
1497 &sensor_dev_attr_fan2_input.dev_attr.attr,
1498 &sensor_dev_attr_fan2_min.dev_attr.attr,
1499 &sensor_dev_attr_fan2_div.dev_attr.attr,
723a0aa0
JD
1500 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1501 NULL
1502}, {
87808be4
JD
1503 &sensor_dev_attr_fan3_input.dev_attr.attr,
1504 &sensor_dev_attr_fan3_min.dev_attr.attr,
1505 &sensor_dev_attr_fan3_div.dev_attr.attr,
0124dd78 1506 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
723a0aa0
JD
1507 NULL
1508} };
1509
1510static const struct attribute_group it87_group_fan[3] = {
1511 { .attrs = it87_attributes_fan[0] },
1512 { .attrs = it87_attributes_fan[1] },
1513 { .attrs = it87_attributes_fan[2] },
1514};
1515
1516static const struct attribute_group *
1517it87_get_fan_group(const struct it87_data *data)
1518{
1519 return has_16bit_fans(data) ? it87_group_fan16 : it87_group_fan;
1520}
0124dd78 1521
723a0aa0 1522static struct attribute *it87_attributes_pwm[3][4+1] = { {
87808be4 1523 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
87808be4 1524 &sensor_dev_attr_pwm1.dev_attr.attr,
d5b0b5d6 1525 &dev_attr_pwm1_freq.attr,
94ac7ee6 1526 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
723a0aa0
JD
1527 NULL
1528}, {
1529 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1530 &sensor_dev_attr_pwm2.dev_attr.attr,
1531 &dev_attr_pwm2_freq.attr,
94ac7ee6 1532 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
723a0aa0
JD
1533 NULL
1534}, {
1535 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1536 &sensor_dev_attr_pwm3.dev_attr.attr,
1537 &dev_attr_pwm3_freq.attr,
94ac7ee6 1538 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
723a0aa0
JD
1539 NULL
1540} };
87808be4 1541
723a0aa0
JD
1542static const struct attribute_group it87_group_pwm[3] = {
1543 { .attrs = it87_attributes_pwm[0] },
1544 { .attrs = it87_attributes_pwm[1] },
1545 { .attrs = it87_attributes_pwm[2] },
1546};
1547
4f3f51bc
JD
1548static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1549 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1550 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1551 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1552 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1553 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1554 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1555 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1556 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1557 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1558 NULL
1559}, {
1560 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1561 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1562 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1563 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1564 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1565 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1566 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1567 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1568 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1569 NULL
1570}, {
1571 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1572 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1573 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1574 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1575 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1576 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
1577 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1578 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1579 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
1580 NULL
1581} };
1582
1583static const struct attribute_group it87_group_autopwm[3] = {
1584 { .attrs = it87_attributes_autopwm[0] },
1585 { .attrs = it87_attributes_autopwm[1] },
1586 { .attrs = it87_attributes_autopwm[2] },
1587};
1588
d9b327c3
JD
1589static struct attribute *it87_attributes_fan_beep[] = {
1590 &sensor_dev_attr_fan1_beep.dev_attr.attr,
1591 &sensor_dev_attr_fan2_beep.dev_attr.attr,
1592 &sensor_dev_attr_fan3_beep.dev_attr.attr,
1593 &sensor_dev_attr_fan4_beep.dev_attr.attr,
1594 &sensor_dev_attr_fan5_beep.dev_attr.attr,
1595};
1596
6a8d7acf 1597static struct attribute *it87_attributes_vid[] = {
87808be4
JD
1598 &dev_attr_vrm.attr,
1599 &dev_attr_cpu0_vid.attr,
1600 NULL
1601};
1602
6a8d7acf
JD
1603static const struct attribute_group it87_group_vid = {
1604 .attrs = it87_attributes_vid,
87808be4 1605};
1da177e4 1606
738e5e05
JD
1607static struct attribute *it87_attributes_label[] = {
1608 &sensor_dev_attr_in3_label.dev_attr.attr,
1609 &sensor_dev_attr_in7_label.dev_attr.attr,
1610 &sensor_dev_attr_in8_label.dev_attr.attr,
1611 NULL
1612};
1613
1614static const struct attribute_group it87_group_label = {
fa8b6975 1615 .attrs = it87_attributes_label,
738e5e05
JD
1616};
1617
2d8672c5 1618/* SuperIO detection - will change isa_address if a chip is found */
b74f3fdd 1619static int __init it87_find(unsigned short *address,
1620 struct it87_sio_data *sio_data)
1da177e4 1621{
5b0380c9 1622 int err;
b74f3fdd 1623 u16 chip_type;
98dd22c3 1624 const char *board_vendor, *board_name;
1da177e4 1625
5b0380c9
NG
1626 err = superio_enter();
1627 if (err)
1628 return err;
1629
1630 err = -ENODEV;
67b671bc 1631 chip_type = force_id ? force_id : superio_inw(DEVID);
b74f3fdd 1632
1633 switch (chip_type) {
1634 case IT8705F_DEVID:
1635 sio_data->type = it87;
1636 break;
1637 case IT8712F_DEVID:
1638 sio_data->type = it8712;
1639 break;
1640 case IT8716F_DEVID:
1641 case IT8726F_DEVID:
1642 sio_data->type = it8716;
1643 break;
1644 case IT8718F_DEVID:
1645 sio_data->type = it8718;
1646 break;
b4da93e4
JMS
1647 case IT8720F_DEVID:
1648 sio_data->type = it8720;
1649 break;
44c1bcd4
JD
1650 case IT8721F_DEVID:
1651 sio_data->type = it8721;
1652 break;
16b5dda2
JD
1653 case IT8728F_DEVID:
1654 sio_data->type = it8728;
1655 break;
0531d98b
GR
1656 case IT8782F_DEVID:
1657 sio_data->type = it8782;
1658 break;
1659 case IT8783E_DEVID:
1660 sio_data->type = it8783;
1661 break;
b74f3fdd 1662 case 0xffff: /* No device at all */
1663 goto exit;
1664 default:
a8ca1037 1665 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
b74f3fdd 1666 goto exit;
1667 }
1da177e4 1668
87673dd7 1669 superio_select(PME);
1da177e4 1670 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
a8ca1037 1671 pr_info("Device not activated, skipping\n");
1da177e4
LT
1672 goto exit;
1673 }
1674
1675 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1676 if (*address == 0) {
a8ca1037 1677 pr_info("Base address not set, skipping\n");
1da177e4
LT
1678 goto exit;
1679 }
1680
1681 err = 0;
0475169c 1682 sio_data->revision = superio_inb(DEVREV) & 0x0f;
a8ca1037 1683 pr_info("Found IT%04xF chip at 0x%x, revision %d\n",
0475169c 1684 chip_type, *address, sio_data->revision);
1da177e4 1685
738e5e05
JD
1686 /* in8 (Vbat) is always internal */
1687 sio_data->internal = (1 << 2);
1688
87673dd7 1689 /* Read GPIO config and VID value from LDN 7 (GPIO) */
895ff267
JD
1690 if (sio_data->type == it87) {
1691 /* The IT8705F doesn't have VID pins at all */
1692 sio_data->skip_vid = 1;
d9b327c3
JD
1693
1694 /* The IT8705F has a different LD number for GPIO */
1695 superio_select(5);
1696 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
0531d98b
GR
1697 } else if (sio_data->type == it8783) {
1698 int reg25, reg27, reg2A, reg2C, regEF;
1699 bool uart6;
1700
1701 sio_data->skip_vid = 1; /* No VID */
1702
1703 superio_select(GPIO);
1704
1705 reg25 = superio_inb(IT87_SIO_GPIO1_REG);
1706 reg27 = superio_inb(IT87_SIO_GPIO3_REG);
1707 reg2A = superio_inb(IT87_SIO_PINX1_REG);
1708 reg2C = superio_inb(IT87_SIO_PINX2_REG);
1709 regEF = superio_inb(IT87_SIO_SPI_REG);
1710
1711 uart6 = reg2C & (1 << 2);
1712
1713 /* Check if fan3 is there or not */
1714 if ((reg27 & (1 << 0)) || !uart6)
1715 sio_data->skip_fan |= (1 << 2);
1716 if ((reg25 & (1 << 4))
1717 || (!(reg2A & (1 << 1)) && (regEF & (1 << 0))))
1718 sio_data->skip_pwm |= (1 << 2);
1719
1720 /* Check if fan2 is there or not */
1721 if (reg27 & (1 << 7))
1722 sio_data->skip_fan |= (1 << 1);
1723 if (reg27 & (1 << 3))
1724 sio_data->skip_pwm |= (1 << 1);
1725
1726 /* VIN5 */
1727 if ((reg27 & (1 << 0)) || uart6)
1728 ; /* No VIN5 */
1729
1730 /* VIN6 */
1731 if ((reg27 & (1 << 1)) || uart6)
1732 ; /* No VIN6 */
1733
1734 /*
1735 * VIN7
1736 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
1737 */
1738 if (reg27 & (1 << 2))
1739 ; /* No VIN7 (unless internal) */
1740
1741 if (reg2C & (1 << 0))
1742 sio_data->internal |= (1 << 0);
1743 if (reg2C & (1 << 1))
1744 sio_data->internal |= (1 << 1);
1745
1746 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
1747
895ff267 1748 } else {
87673dd7
JD
1749 int reg;
1750
1751 superio_select(GPIO);
44c1bcd4 1752
895ff267 1753 reg = superio_inb(IT87_SIO_GPIO3_REG);
0531d98b
GR
1754 if (sio_data->type == it8721 || sio_data->type == it8728 ||
1755 sio_data->type == it8782) {
16b5dda2 1756 /*
0531d98b
GR
1757 * IT8721F/IT8758E, and IT8782F don't have VID pins
1758 * at all, not sure about the IT8728F.
16b5dda2 1759 */
895ff267 1760 sio_data->skip_vid = 1;
44c1bcd4
JD
1761 } else {
1762 /* We need at least 4 VID pins */
1763 if (reg & 0x0f) {
a8ca1037 1764 pr_info("VID is disabled (pins used for GPIO)\n");
44c1bcd4
JD
1765 sio_data->skip_vid = 1;
1766 }
895ff267
JD
1767 }
1768
591ec650
JD
1769 /* Check if fan3 is there or not */
1770 if (reg & (1 << 6))
1771 sio_data->skip_pwm |= (1 << 2);
1772 if (reg & (1 << 7))
1773 sio_data->skip_fan |= (1 << 2);
1774
1775 /* Check if fan2 is there or not */
1776 reg = superio_inb(IT87_SIO_GPIO5_REG);
1777 if (reg & (1 << 1))
1778 sio_data->skip_pwm |= (1 << 1);
1779 if (reg & (1 << 2))
1780 sio_data->skip_fan |= (1 << 1);
1781
895ff267
JD
1782 if ((sio_data->type == it8718 || sio_data->type == it8720)
1783 && !(sio_data->skip_vid))
b74f3fdd 1784 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
87673dd7
JD
1785
1786 reg = superio_inb(IT87_SIO_PINX2_REG);
436cad2a
JD
1787 /*
1788 * The IT8720F has no VIN7 pin, so VCCH should always be
1789 * routed internally to VIN7 with an internal divider.
1790 * Curiously, there still is a configuration bit to control
1791 * this, which means it can be set incorrectly. And even
1792 * more curiously, many boards out there are improperly
1793 * configured, even though the IT8720F datasheet claims
1794 * that the internal routing of VCCH to VIN7 is the default
1795 * setting. So we force the internal routing in this case.
0531d98b
GR
1796 *
1797 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
1798 * If UART6 is enabled, re-route VIN7 to the internal divider.
436cad2a 1799 */
0531d98b
GR
1800 if ((sio_data->type == it8720 ||
1801 (sio_data->type == it8782 && (reg & (1 << 2))))
1802 && !(reg & (1 << 1))) {
436cad2a
JD
1803 reg |= (1 << 1);
1804 superio_outb(IT87_SIO_PINX2_REG, reg);
a8ca1037 1805 pr_notice("Routing internal VCCH to in7\n");
436cad2a 1806 }
87673dd7 1807 if (reg & (1 << 0))
738e5e05 1808 sio_data->internal |= (1 << 0);
16b5dda2
JD
1809 if ((reg & (1 << 1)) || sio_data->type == it8721 ||
1810 sio_data->type == it8728)
738e5e05 1811 sio_data->internal |= (1 << 1);
d9b327c3
JD
1812
1813 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
87673dd7 1814 }
d9b327c3 1815 if (sio_data->beep_pin)
a8ca1037 1816 pr_info("Beeping is supported\n");
87673dd7 1817
98dd22c3
JD
1818 /* Disable specific features based on DMI strings */
1819 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
1820 board_name = dmi_get_system_info(DMI_BOARD_NAME);
1821 if (board_vendor && board_name) {
1822 if (strcmp(board_vendor, "nVIDIA") == 0
1823 && strcmp(board_name, "FN68PT") == 0) {
4a0d71cf
GR
1824 /*
1825 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
1826 * connected to a fan, but to something else. One user
1827 * has reported instant system power-off when changing
1828 * the PWM2 duty cycle, so we disable it.
1829 * I use the board name string as the trigger in case
1830 * the same board is ever used in other systems.
1831 */
a8ca1037 1832 pr_info("Disabling pwm2 due to hardware constraints\n");
98dd22c3
JD
1833 sio_data->skip_pwm = (1 << 1);
1834 }
1835 }
1836
1da177e4
LT
1837exit:
1838 superio_exit();
1839 return err;
1840}
1841
723a0aa0
JD
1842static void it87_remove_files(struct device *dev)
1843{
1844 struct it87_data *data = platform_get_drvdata(pdev);
1845 struct it87_sio_data *sio_data = dev->platform_data;
1846 const struct attribute_group *fan_group = it87_get_fan_group(data);
1847 int i;
1848
1849 sysfs_remove_group(&dev->kobj, &it87_group);
d9b327c3
JD
1850 if (sio_data->beep_pin)
1851 sysfs_remove_group(&dev->kobj, &it87_group_beep);
723a0aa0
JD
1852 for (i = 0; i < 5; i++) {
1853 if (!(data->has_fan & (1 << i)))
1854 continue;
1855 sysfs_remove_group(&dev->kobj, &fan_group[i]);
d9b327c3
JD
1856 if (sio_data->beep_pin)
1857 sysfs_remove_file(&dev->kobj,
1858 it87_attributes_fan_beep[i]);
723a0aa0
JD
1859 }
1860 for (i = 0; i < 3; i++) {
1861 if (sio_data->skip_pwm & (1 << 0))
1862 continue;
1863 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
4f3f51bc
JD
1864 if (has_old_autopwm(data))
1865 sysfs_remove_group(&dev->kobj,
1866 &it87_group_autopwm[i]);
723a0aa0 1867 }
6a8d7acf
JD
1868 if (!sio_data->skip_vid)
1869 sysfs_remove_group(&dev->kobj, &it87_group_vid);
738e5e05 1870 sysfs_remove_group(&dev->kobj, &it87_group_label);
723a0aa0
JD
1871}
1872
b74f3fdd 1873static int __devinit it87_probe(struct platform_device *pdev)
1da177e4 1874{
1da177e4 1875 struct it87_data *data;
b74f3fdd 1876 struct resource *res;
1877 struct device *dev = &pdev->dev;
1878 struct it87_sio_data *sio_data = dev->platform_data;
723a0aa0
JD
1879 const struct attribute_group *fan_group;
1880 int err = 0, i;
1da177e4 1881 int enable_pwm_interface;
d9b327c3 1882 int fan_beep_need_rw;
3c4c4971 1883 static const char * const names[] = {
b74f3fdd 1884 "it87",
1885 "it8712",
1886 "it8716",
1887 "it8718",
b4da93e4 1888 "it8720",
44c1bcd4 1889 "it8721",
16b5dda2 1890 "it8728",
0531d98b
GR
1891 "it8782",
1892 "it8783",
b74f3fdd 1893 };
1894
1895 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
87b4b663 1896 if (!request_region(res->start, IT87_EC_EXTENT, DRVNAME)) {
b74f3fdd 1897 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1898 (unsigned long)res->start,
87b4b663 1899 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
8e9afcbb
JD
1900 err = -EBUSY;
1901 goto ERROR0;
1902 }
1da177e4 1903
5f2dc798
JD
1904 data = kzalloc(sizeof(struct it87_data), GFP_KERNEL);
1905 if (!data) {
1da177e4
LT
1906 err = -ENOMEM;
1907 goto ERROR1;
1908 }
1da177e4 1909
b74f3fdd 1910 data->addr = res->start;
1911 data->type = sio_data->type;
0475169c 1912 data->revision = sio_data->revision;
b74f3fdd 1913 data->name = names[sio_data->type];
1da177e4
LT
1914
1915 /* Now, we do the remaining detection. */
b74f3fdd 1916 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
1917 || it87_read_value(data, IT87_REG_CHIPID) != 0x90) {
8e9afcbb
JD
1918 err = -ENODEV;
1919 goto ERROR2;
1da177e4
LT
1920 }
1921
b74f3fdd 1922 platform_set_drvdata(pdev, data);
1da177e4 1923
9a61bf63 1924 mutex_init(&data->update_lock);
1da177e4 1925
1da177e4 1926 /* Check PWM configuration */
b74f3fdd 1927 enable_pwm_interface = it87_check_pwm(dev);
1da177e4 1928
44c1bcd4 1929 /* Starting with IT8721F, we handle scaling of internal voltages */
16b5dda2 1930 if (has_12mv_adc(data)) {
44c1bcd4
JD
1931 if (sio_data->internal & (1 << 0))
1932 data->in_scaled |= (1 << 3); /* in3 is AVCC */
1933 if (sio_data->internal & (1 << 1))
1934 data->in_scaled |= (1 << 7); /* in7 is VSB */
1935 if (sio_data->internal & (1 << 2))
1936 data->in_scaled |= (1 << 8); /* in8 is Vbat */
0531d98b
GR
1937 } else if (sio_data->type == it8782 || sio_data->type == it8783) {
1938 if (sio_data->internal & (1 << 0))
1939 data->in_scaled |= (1 << 3); /* in3 is VCC5V */
1940 if (sio_data->internal & (1 << 1))
1941 data->in_scaled |= (1 << 7); /* in7 is VCCH5V */
44c1bcd4
JD
1942 }
1943
1da177e4 1944 /* Initialize the IT87 chip */
b74f3fdd 1945 it87_init_device(pdev);
1da177e4
LT
1946
1947 /* Register sysfs hooks */
5f2dc798
JD
1948 err = sysfs_create_group(&dev->kobj, &it87_group);
1949 if (err)
b74f3fdd 1950 goto ERROR2;
17d648bf 1951
d9b327c3
JD
1952 if (sio_data->beep_pin) {
1953 err = sysfs_create_group(&dev->kobj, &it87_group_beep);
1954 if (err)
1955 goto ERROR4;
1956 }
1957
9060f8bd 1958 /* Do not create fan files for disabled fans */
723a0aa0 1959 fan_group = it87_get_fan_group(data);
d9b327c3 1960 fan_beep_need_rw = 1;
723a0aa0
JD
1961 for (i = 0; i < 5; i++) {
1962 if (!(data->has_fan & (1 << i)))
1963 continue;
1964 err = sysfs_create_group(&dev->kobj, &fan_group[i]);
1965 if (err)
1966 goto ERROR4;
d9b327c3
JD
1967
1968 if (sio_data->beep_pin) {
1969 err = sysfs_create_file(&dev->kobj,
1970 it87_attributes_fan_beep[i]);
1971 if (err)
1972 goto ERROR4;
1973 if (!fan_beep_need_rw)
1974 continue;
1975
4a0d71cf
GR
1976 /*
1977 * As we have a single beep enable bit for all fans,
d9b327c3 1978 * only the first enabled fan has a writable attribute
4a0d71cf
GR
1979 * for it.
1980 */
d9b327c3
JD
1981 if (sysfs_chmod_file(&dev->kobj,
1982 it87_attributes_fan_beep[i],
1983 S_IRUGO | S_IWUSR))
1984 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
1985 i + 1);
1986 fan_beep_need_rw = 0;
1987 }
17d648bf
JD
1988 }
1989
1da177e4 1990 if (enable_pwm_interface) {
723a0aa0
JD
1991 for (i = 0; i < 3; i++) {
1992 if (sio_data->skip_pwm & (1 << i))
1993 continue;
1994 err = sysfs_create_group(&dev->kobj,
1995 &it87_group_pwm[i]);
1996 if (err)
98dd22c3 1997 goto ERROR4;
4f3f51bc
JD
1998
1999 if (!has_old_autopwm(data))
2000 continue;
2001 err = sysfs_create_group(&dev->kobj,
2002 &it87_group_autopwm[i]);
2003 if (err)
2004 goto ERROR4;
98dd22c3 2005 }
1da177e4
LT
2006 }
2007
895ff267 2008 if (!sio_data->skip_vid) {
303760b4 2009 data->vrm = vid_which_vrm();
87673dd7 2010 /* VID reading from Super-I/O config space if available */
b74f3fdd 2011 data->vid = sio_data->vid_value;
6a8d7acf
JD
2012 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
2013 if (err)
87808be4
JD
2014 goto ERROR4;
2015 }
2016
738e5e05
JD
2017 /* Export labels for internal sensors */
2018 for (i = 0; i < 3; i++) {
2019 if (!(sio_data->internal & (1 << i)))
2020 continue;
2021 err = sysfs_create_file(&dev->kobj,
2022 it87_attributes_label[i]);
2023 if (err)
2024 goto ERROR4;
2025 }
2026
1beeffe4
TJ
2027 data->hwmon_dev = hwmon_device_register(dev);
2028 if (IS_ERR(data->hwmon_dev)) {
2029 err = PTR_ERR(data->hwmon_dev);
87808be4 2030 goto ERROR4;
1da177e4
LT
2031 }
2032
2033 return 0;
2034
87808be4 2035ERROR4:
723a0aa0 2036 it87_remove_files(dev);
1da177e4 2037ERROR2:
b74f3fdd 2038 platform_set_drvdata(pdev, NULL);
1da177e4
LT
2039 kfree(data);
2040ERROR1:
87b4b663 2041 release_region(res->start, IT87_EC_EXTENT);
1da177e4
LT
2042ERROR0:
2043 return err;
2044}
2045
b74f3fdd 2046static int __devexit it87_remove(struct platform_device *pdev)
1da177e4 2047{
b74f3fdd 2048 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2049
1beeffe4 2050 hwmon_device_unregister(data->hwmon_dev);
723a0aa0 2051 it87_remove_files(&pdev->dev);
943b0830 2052
87b4b663 2053 release_region(data->addr, IT87_EC_EXTENT);
b74f3fdd 2054 platform_set_drvdata(pdev, NULL);
943b0830 2055 kfree(data);
1da177e4
LT
2056
2057 return 0;
2058}
2059
4a0d71cf
GR
2060/*
2061 * Must be called with data->update_lock held, except during initialization.
2062 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2063 * would slow down the IT87 access and should not be necessary.
2064 */
b74f3fdd 2065static int it87_read_value(struct it87_data *data, u8 reg)
1da177e4 2066{
b74f3fdd 2067 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2068 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT
2069}
2070
4a0d71cf
GR
2071/*
2072 * Must be called with data->update_lock held, except during initialization.
2073 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2074 * would slow down the IT87 access and should not be necessary.
2075 */
b74f3fdd 2076static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
1da177e4 2077{
b74f3fdd 2078 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2079 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT
2080}
2081
2082/* Return 1 if and only if the PWM interface is safe to use */
b74f3fdd 2083static int __devinit it87_check_pwm(struct device *dev)
1da177e4 2084{
b74f3fdd 2085 struct it87_data *data = dev_get_drvdata(dev);
4a0d71cf
GR
2086 /*
2087 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
1da177e4 2088 * and polarity set to active low is sign that this is the case so we
4a0d71cf
GR
2089 * disable pwm control to protect the user.
2090 */
b74f3fdd 2091 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1da177e4
LT
2092 if ((tmp & 0x87) == 0) {
2093 if (fix_pwm_polarity) {
4a0d71cf
GR
2094 /*
2095 * The user asks us to attempt a chip reconfiguration.
1da177e4 2096 * This means switching to active high polarity and
4a0d71cf
GR
2097 * inverting all fan speed values.
2098 */
1da177e4
LT
2099 int i;
2100 u8 pwm[3];
2101
2102 for (i = 0; i < 3; i++)
b74f3fdd 2103 pwm[i] = it87_read_value(data,
1da177e4
LT
2104 IT87_REG_PWM(i));
2105
4a0d71cf
GR
2106 /*
2107 * If any fan is in automatic pwm mode, the polarity
1da177e4
LT
2108 * might be correct, as suspicious as it seems, so we
2109 * better don't change anything (but still disable the
4a0d71cf
GR
2110 * PWM interface).
2111 */
1da177e4 2112 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
b74f3fdd 2113 dev_info(dev, "Reconfiguring PWM to "
1da177e4 2114 "active high polarity\n");
b74f3fdd 2115 it87_write_value(data, IT87_REG_FAN_CTL,
1da177e4
LT
2116 tmp | 0x87);
2117 for (i = 0; i < 3; i++)
b74f3fdd 2118 it87_write_value(data,
1da177e4
LT
2119 IT87_REG_PWM(i),
2120 0x7f & ~pwm[i]);
2121 return 1;
2122 }
2123
b74f3fdd 2124 dev_info(dev, "PWM configuration is "
1da177e4
LT
2125 "too broken to be fixed\n");
2126 }
2127
b74f3fdd 2128 dev_info(dev, "Detected broken BIOS "
1da177e4
LT
2129 "defaults, disabling PWM interface\n");
2130 return 0;
2131 } else if (fix_pwm_polarity) {
b74f3fdd 2132 dev_info(dev, "PWM configuration looks "
1da177e4
LT
2133 "sane, won't touch\n");
2134 }
2135
2136 return 1;
2137}
2138
2139/* Called when we have found a new IT87. */
b74f3fdd 2140static void __devinit it87_init_device(struct platform_device *pdev)
1da177e4 2141{
591ec650 2142 struct it87_sio_data *sio_data = pdev->dev.platform_data;
b74f3fdd 2143 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2144 int tmp, i;
591ec650 2145 u8 mask;
1da177e4 2146
4a0d71cf
GR
2147 /*
2148 * For each PWM channel:
b99883dc
JD
2149 * - If it is in automatic mode, setting to manual mode should set
2150 * the fan to full speed by default.
2151 * - If it is in manual mode, we need a mapping to temperature
2152 * channels to use when later setting to automatic mode later.
2153 * Use a 1:1 mapping by default (we are clueless.)
2154 * In both cases, the value can (and should) be changed by the user
6229cdb2
JD
2155 * prior to switching to a different mode.
2156 * Note that this is no longer needed for the IT8721F and later, as
2157 * these have separate registers for the temperature mapping and the
4a0d71cf
GR
2158 * manual duty cycle.
2159 */
1da177e4 2160 for (i = 0; i < 3; i++) {
b99883dc
JD
2161 data->pwm_temp_map[i] = i;
2162 data->pwm_duty[i] = 0x7f; /* Full speed */
4f3f51bc 2163 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
1da177e4
LT
2164 }
2165
4a0d71cf
GR
2166 /*
2167 * Some chips seem to have default value 0xff for all limit
c5df9b7a
JD
2168 * registers. For low voltage limits it makes no sense and triggers
2169 * alarms, so change to 0 instead. For high temperature limits, it
2170 * means -1 degree C, which surprisingly doesn't trigger an alarm,
4a0d71cf
GR
2171 * but is still confusing, so change to 127 degrees C.
2172 */
c5df9b7a 2173 for (i = 0; i < 8; i++) {
b74f3fdd 2174 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
c5df9b7a 2175 if (tmp == 0xff)
b74f3fdd 2176 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
c5df9b7a
JD
2177 }
2178 for (i = 0; i < 3; i++) {
b74f3fdd 2179 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
c5df9b7a 2180 if (tmp == 0xff)
b74f3fdd 2181 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
c5df9b7a
JD
2182 }
2183
4a0d71cf
GR
2184 /*
2185 * Temperature channels are not forcibly enabled, as they can be
a00afb97
JD
2186 * set to two different sensor types and we can't guess which one
2187 * is correct for a given system. These channels can be enabled at
4a0d71cf
GR
2188 * run-time through the temp{1-3}_type sysfs accessors if needed.
2189 */
1da177e4
LT
2190
2191 /* Check if voltage monitors are reset manually or by some reason */
b74f3fdd 2192 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
1da177e4
LT
2193 if ((tmp & 0xff) == 0) {
2194 /* Enable all voltage monitors */
b74f3fdd 2195 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
1da177e4
LT
2196 }
2197
2198 /* Check if tachometers are reset manually or by some reason */
591ec650 2199 mask = 0x70 & ~(sio_data->skip_fan << 4);
b74f3fdd 2200 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
591ec650 2201 if ((data->fan_main_ctrl & mask) == 0) {
1da177e4 2202 /* Enable all fan tachometers */
591ec650 2203 data->fan_main_ctrl |= mask;
5f2dc798
JD
2204 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2205 data->fan_main_ctrl);
1da177e4 2206 }
9060f8bd 2207 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
1da177e4 2208
17d648bf 2209 /* Set tachometers to 16-bit mode if needed */
0475169c 2210 if (has_16bit_fans(data)) {
b74f3fdd 2211 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
9060f8bd 2212 if (~tmp & 0x07 & data->has_fan) {
b74f3fdd 2213 dev_dbg(&pdev->dev,
17d648bf 2214 "Setting fan1-3 to 16-bit mode\n");
b74f3fdd 2215 it87_write_value(data, IT87_REG_FAN_16BIT,
17d648bf
JD
2216 tmp | 0x07);
2217 }
0531d98b
GR
2218 /* IT8705F, IT8782F, and IT8783E/F only support three fans. */
2219 if (data->type != it87 && data->type != it8782 &&
2220 data->type != it8783) {
816d8c6a
AP
2221 if (tmp & (1 << 4))
2222 data->has_fan |= (1 << 3); /* fan4 enabled */
2223 if (tmp & (1 << 5))
2224 data->has_fan |= (1 << 4); /* fan5 enabled */
2225 }
17d648bf
JD
2226 }
2227
591ec650
JD
2228 /* Fan input pins may be used for alternative functions */
2229 data->has_fan &= ~sio_data->skip_fan;
2230
1da177e4 2231 /* Start monitoring */
b74f3fdd 2232 it87_write_value(data, IT87_REG_CONFIG,
2233 (it87_read_value(data, IT87_REG_CONFIG) & 0x36)
1da177e4
LT
2234 | (update_vbat ? 0x41 : 0x01));
2235}
2236
b99883dc
JD
2237static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
2238{
2239 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
16b5dda2 2240 if (has_newer_autopwm(data)) {
b99883dc 2241 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
6229cdb2
JD
2242 data->pwm_duty[nr] = it87_read_value(data,
2243 IT87_REG_PWM_DUTY(nr));
2244 } else {
2245 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
2246 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2247 else /* Manual mode */
2248 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
2249 }
4f3f51bc
JD
2250
2251 if (has_old_autopwm(data)) {
2252 int i;
2253
2254 for (i = 0; i < 5 ; i++)
2255 data->auto_temp[nr][i] = it87_read_value(data,
2256 IT87_REG_AUTO_TEMP(nr, i));
2257 for (i = 0; i < 3 ; i++)
2258 data->auto_pwm[nr][i] = it87_read_value(data,
2259 IT87_REG_AUTO_PWM(nr, i));
2260 }
b99883dc
JD
2261}
2262
1da177e4
LT
2263static struct it87_data *it87_update_device(struct device *dev)
2264{
b74f3fdd 2265 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
2266 int i;
2267
9a61bf63 2268 mutex_lock(&data->update_lock);
1da177e4
LT
2269
2270 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
2271 || !data->valid) {
1da177e4 2272 if (update_vbat) {
4a0d71cf
GR
2273 /*
2274 * Cleared after each update, so reenable. Value
2275 * returned by this read will be previous value
2276 */
b74f3fdd 2277 it87_write_value(data, IT87_REG_CONFIG,
5f2dc798 2278 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1da177e4
LT
2279 }
2280 for (i = 0; i <= 7; i++) {
2281 data->in[i] =
5f2dc798 2282 it87_read_value(data, IT87_REG_VIN(i));
1da177e4 2283 data->in_min[i] =
5f2dc798 2284 it87_read_value(data, IT87_REG_VIN_MIN(i));
1da177e4 2285 data->in_max[i] =
5f2dc798 2286 it87_read_value(data, IT87_REG_VIN_MAX(i));
1da177e4 2287 }
3543a53f 2288 /* in8 (battery) has no limit registers */
5f2dc798 2289 data->in[8] = it87_read_value(data, IT87_REG_VIN(8));
1da177e4 2290
c7f1f716 2291 for (i = 0; i < 5; i++) {
9060f8bd
JD
2292 /* Skip disabled fans */
2293 if (!(data->has_fan & (1 << i)))
2294 continue;
2295
1da177e4 2296 data->fan_min[i] =
5f2dc798 2297 it87_read_value(data, IT87_REG_FAN_MIN[i]);
b74f3fdd 2298 data->fan[i] = it87_read_value(data,
c7f1f716 2299 IT87_REG_FAN[i]);
17d648bf 2300 /* Add high byte if in 16-bit mode */
0475169c 2301 if (has_16bit_fans(data)) {
b74f3fdd 2302 data->fan[i] |= it87_read_value(data,
c7f1f716 2303 IT87_REG_FANX[i]) << 8;
b74f3fdd 2304 data->fan_min[i] |= it87_read_value(data,
c7f1f716 2305 IT87_REG_FANX_MIN[i]) << 8;
17d648bf 2306 }
1da177e4
LT
2307 }
2308 for (i = 0; i < 3; i++) {
2309 data->temp[i] =
5f2dc798 2310 it87_read_value(data, IT87_REG_TEMP(i));
1da177e4 2311 data->temp_high[i] =
5f2dc798 2312 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
1da177e4 2313 data->temp_low[i] =
5f2dc798 2314 it87_read_value(data, IT87_REG_TEMP_LOW(i));
1da177e4
LT
2315 }
2316
17d648bf 2317 /* Newer chips don't have clock dividers */
0475169c 2318 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
b74f3fdd 2319 i = it87_read_value(data, IT87_REG_FAN_DIV);
17d648bf
JD
2320 data->fan_div[0] = i & 0x07;
2321 data->fan_div[1] = (i >> 3) & 0x07;
2322 data->fan_div[2] = (i & 0x40) ? 3 : 1;
2323 }
1da177e4
LT
2324
2325 data->alarms =
b74f3fdd 2326 it87_read_value(data, IT87_REG_ALARM1) |
2327 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
2328 (it87_read_value(data, IT87_REG_ALARM3) << 16);
d9b327c3 2329 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
b99883dc 2330
b74f3fdd 2331 data->fan_main_ctrl = it87_read_value(data,
2332 IT87_REG_FAN_MAIN_CTRL);
2333 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
b99883dc
JD
2334 for (i = 0; i < 3; i++)
2335 it87_update_pwm_ctrl(data, i);
b74f3fdd 2336
2337 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
4a0d71cf
GR
2338 /*
2339 * The IT8705F does not have VID capability.
2340 * The IT8718F and later don't use IT87_REG_VID for the
2341 * same purpose.
2342 */
17d648bf 2343 if (data->type == it8712 || data->type == it8716) {
b74f3fdd 2344 data->vid = it87_read_value(data, IT87_REG_VID);
4a0d71cf
GR
2345 /*
2346 * The older IT8712F revisions had only 5 VID pins,
2347 * but we assume it is always safe to read 6 bits.
2348 */
17d648bf 2349 data->vid &= 0x3f;
1da177e4
LT
2350 }
2351 data->last_updated = jiffies;
2352 data->valid = 1;
2353 }
2354
9a61bf63 2355 mutex_unlock(&data->update_lock);
1da177e4
LT
2356
2357 return data;
2358}
2359
b74f3fdd 2360static int __init it87_device_add(unsigned short address,
2361 const struct it87_sio_data *sio_data)
2362{
2363 struct resource res = {
87b4b663
BH
2364 .start = address + IT87_EC_OFFSET,
2365 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
b74f3fdd 2366 .name = DRVNAME,
2367 .flags = IORESOURCE_IO,
2368 };
2369 int err;
2370
b9acb64a
JD
2371 err = acpi_check_resource_conflict(&res);
2372 if (err)
2373 goto exit;
2374
b74f3fdd 2375 pdev = platform_device_alloc(DRVNAME, address);
2376 if (!pdev) {
2377 err = -ENOMEM;
a8ca1037 2378 pr_err("Device allocation failed\n");
b74f3fdd 2379 goto exit;
2380 }
2381
2382 err = platform_device_add_resources(pdev, &res, 1);
2383 if (err) {
a8ca1037 2384 pr_err("Device resource addition failed (%d)\n", err);
b74f3fdd 2385 goto exit_device_put;
2386 }
2387
2388 err = platform_device_add_data(pdev, sio_data,
2389 sizeof(struct it87_sio_data));
2390 if (err) {
a8ca1037 2391 pr_err("Platform data allocation failed\n");
b74f3fdd 2392 goto exit_device_put;
2393 }
2394
2395 err = platform_device_add(pdev);
2396 if (err) {
a8ca1037 2397 pr_err("Device addition failed (%d)\n", err);
b74f3fdd 2398 goto exit_device_put;
2399 }
2400
2401 return 0;
2402
2403exit_device_put:
2404 platform_device_put(pdev);
2405exit:
2406 return err;
2407}
2408
1da177e4
LT
2409static int __init sm_it87_init(void)
2410{
b74f3fdd 2411 int err;
5f2dc798 2412 unsigned short isa_address = 0;
b74f3fdd 2413 struct it87_sio_data sio_data;
2414
98dd22c3 2415 memset(&sio_data, 0, sizeof(struct it87_sio_data));
b74f3fdd 2416 err = it87_find(&isa_address, &sio_data);
2417 if (err)
2418 return err;
2419 err = platform_driver_register(&it87_driver);
2420 if (err)
2421 return err;
fde09509 2422
b74f3fdd 2423 err = it87_device_add(isa_address, &sio_data);
5f2dc798 2424 if (err) {
b74f3fdd 2425 platform_driver_unregister(&it87_driver);
2426 return err;
2427 }
2428
2429 return 0;
1da177e4
LT
2430}
2431
2432static void __exit sm_it87_exit(void)
2433{
b74f3fdd 2434 platform_device_unregister(pdev);
2435 platform_driver_unregister(&it87_driver);
1da177e4
LT
2436}
2437
2438
f1d8e332 2439MODULE_AUTHOR("Chris Gauthron, "
b19367c6 2440 "Jean Delvare <khali@linux-fr.org>");
44c1bcd4 2441MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
1da177e4
LT
2442module_param(update_vbat, bool, 0);
2443MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2444module_param(fix_pwm_polarity, bool, 0);
5f2dc798
JD
2445MODULE_PARM_DESC(fix_pwm_polarity,
2446 "Force PWM polarity to active high (DANGEROUS)");
1da177e4
LT
2447MODULE_LICENSE("GPL");
2448
2449module_init(sm_it87_init);
2450module_exit(sm_it87_exit);