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hwmon: (lm75) Add suspend/resume feature
[linux-2.6-block.git] / drivers / hwmon / it87.c
CommitLineData
1da177e4 1/*
5f2dc798
JD		 2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring.
4 *
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
8 * Fan Controller)
9 *
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
12 *
13 * Supports: IT8705F Super I/O chip w/LPC interface
14 * IT8712F Super I/O chip w/LPC interface
15 * IT8716F Super I/O chip w/LPC interface
16 * IT8718F Super I/O chip w/LPC interface
17 * IT8720F Super I/O chip w/LPC interface
18 * IT8726F Super I/O chip w/LPC interface
19 * Sis950 A clone of the IT8705F
20 *
21 * Copyright (C) 2001 Chris Gauthron
22 * Copyright (C) 2005-2010 Jean Delvare <khali@linux-fr.org>
23 *
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
27 * (at your option) any later version.
28 *
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
33 *
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
37 */
1da177e4 38
1da177e4
LT		 39#include <linux/module.h>
40#include <linux/init.h>
41#include <linux/slab.h>
42#include <linux/jiffies.h>
b74f3fdd 43#include <linux/platform_device.h>
943b0830 44#include <linux/hwmon.h>
303760b4
JD		 45#include <linux/hwmon-sysfs.h>
46#include <linux/hwmon-vid.h>
943b0830 47#include <linux/err.h>
9a61bf63 48#include <linux/mutex.h>
87808be4 49#include <linux/sysfs.h>
98dd22c3
JD		 50#include <linux/string.h>
51#include <linux/dmi.h>
b9acb64a 52#include <linux/acpi.h>
6055fae8 53#include <linux/io.h>
1da177e4 54
b74f3fdd 55#define DRVNAME "it87"
1da177e4 56
b4da93e4 57enum chips { it87, it8712, it8716, it8718, it8720 };
1da177e4 58
67b671bc
JD		 59static unsigned short force_id;
60module_param(force_id, ushort, 0);
61MODULE_PARM_DESC(force_id, "Override the detected device ID");
62
b74f3fdd 63static struct platform_device *pdev;
64
1da177e4
LT		 65#define REG 0x2e /* The register to read/write */
66#define DEV 0x07 /* Register: Logical device select */
67#define VAL 0x2f /* The value to read/write */
68#define PME 0x04 /* The device with the fan registers in it */
b4da93e4
JMS		 69
70/* The device with the IT8718F/IT8720F VID value in it */
71#define GPIO 0x07
72
1da177e4
LT		 73#define DEVID 0x20 /* Register: Device ID */
74#define DEVREV 0x22 /* Register: Device Revision */
75
76static inline int
77superio_inb(int reg)
78{
79 outb(reg, REG);
80 return inb(VAL);
81}
82
436cad2a
JD		 83static inline void
84superio_outb(int reg, int val)
85{
86 outb(reg, REG);
87 outb(val, VAL);
88}
89
1da177e4
LT		 90static int superio_inw(int reg)
91{
92 int val;
93 outb(reg++, REG);
94 val = inb(VAL) << 8;
95 outb(reg, REG);
96 val |= inb(VAL);
97 return val;
98}
99
100static inline void
87673dd7 101superio_select(int ldn)
1da177e4
LT		 102{
103 outb(DEV, REG);
87673dd7 104 outb(ldn, VAL);
1da177e4
LT		 105}
106
107static inline void
108superio_enter(void)
109{
110 outb(0x87, REG);
111 outb(0x01, REG);
112 outb(0x55, REG);
113 outb(0x55, REG);
114}
115
116static inline void
117superio_exit(void)
118{
119 outb(0x02, REG);
120 outb(0x02, VAL);
121}
122
87673dd7 123/* Logical device 4 registers */
1da177e4
LT		 124#define IT8712F_DEVID 0x8712
125#define IT8705F_DEVID 0x8705
17d648bf 126#define IT8716F_DEVID 0x8716
87673dd7 127#define IT8718F_DEVID 0x8718
b4da93e4 128#define IT8720F_DEVID 0x8720
08a8f6e9 129#define IT8726F_DEVID 0x8726
1da177e4
LT		 130#define IT87_ACT_REG 0x30
131#define IT87_BASE_REG 0x60
132
87673dd7 133/* Logical device 7 registers (IT8712F and later) */
895ff267 134#define IT87_SIO_GPIO3_REG 0x27
591ec650 135#define IT87_SIO_GPIO5_REG 0x29
87673dd7
JD		 136#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
137#define IT87_SIO_VID_REG 0xfc /* VID value */
d9b327c3 138#define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
87673dd7 139
1da177e4
LT		 140/* Update battery voltage after every reading if true */
141static int update_vbat;
142
143/* Not all BIOSes properly configure the PWM registers */
144static int fix_pwm_polarity;
145
1da177e4
LT		 146/* Many IT87 constants specified below */
147
148/* Length of ISA address segment */
149#define IT87_EXTENT 8
150
87b4b663
BH		 151/* Length of ISA address segment for Environmental Controller */
152#define IT87_EC_EXTENT 2
153
154/* Offset of EC registers from ISA base address */
155#define IT87_EC_OFFSET 5
156
157/* Where are the ISA address/data registers relative to the EC base address */
158#define IT87_ADDR_REG_OFFSET 0
159#define IT87_DATA_REG_OFFSET 1
1da177e4
LT		 160
161/*----- The IT87 registers -----*/
162
163#define IT87_REG_CONFIG 0x00
164
165#define IT87_REG_ALARM1 0x01
166#define IT87_REG_ALARM2 0x02
167#define IT87_REG_ALARM3 0x03
168
b4da93e4
JMS		 169/* The IT8718F and IT8720F have the VID value in a different register, in
170 Super-I/O configuration space. */
1da177e4 171#define IT87_REG_VID 0x0a
0475169c
AP		 172/* The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
173 for fan divisors. Later IT8712F revisions must use 16-bit tachometer
174 mode. */
1da177e4 175#define IT87_REG_FAN_DIV 0x0b
17d648bf 176#define IT87_REG_FAN_16BIT 0x0c
1da177e4
LT		 177
178/* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
179
c7f1f716
JD		 180static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
181static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 };
182static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 };
183static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
1da177e4
LT		 184#define IT87_REG_FAN_MAIN_CTRL 0x13
185#define IT87_REG_FAN_CTL 0x14
186#define IT87_REG_PWM(nr) (0x15 + (nr))
187
188#define IT87_REG_VIN(nr) (0x20 + (nr))
189#define IT87_REG_TEMP(nr) (0x29 + (nr))
190
191#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
192#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
193#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
194#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
195
1da177e4
LT		 196#define IT87_REG_VIN_ENABLE 0x50
197#define IT87_REG_TEMP_ENABLE 0x51
d9b327c3 198#define IT87_REG_BEEP_ENABLE 0x5c
1da177e4
LT		 199
200#define IT87_REG_CHIPID 0x58
201
4f3f51bc
JD		 202#define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
203#define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i))
204
1da177e4
LT		 205#define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
206#define IN_FROM_REG(val) ((val) * 16)
207
208static inline u8 FAN_TO_REG(long rpm, int div)
209{
210 if (rpm == 0)
211 return 255;
212 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
213 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
214 254);
215}
216
17d648bf
JD		 217static inline u16 FAN16_TO_REG(long rpm)
218{
219 if (rpm == 0)
220 return 0xffff;
221 return SENSORS_LIMIT((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
222}
223
1da177e4 224#define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
17d648bf
JD		 225/* The divider is fixed to 2 in 16-bit mode */
226#define FAN16_FROM_REG(val) ((val)==0?-1:(val)==0xffff?0:1350000/((val)*2))
1da177e4
LT		 227
228#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val)<0?(((val)-500)/1000):\
229 ((val)+500)/1000),-128,127))
e267d250 230#define TEMP_FROM_REG(val) ((val) * 1000)
1da177e4 231
1da177e4
LT		 232#define PWM_TO_REG(val) ((val) >> 1)
233#define PWM_FROM_REG(val) (((val)&0x7f) << 1)
234
235static int DIV_TO_REG(int val)
236{
237 int answer = 0;
b9e349f7 238 while (answer < 7 && (val >>= 1))
1da177e4
LT		 239 answer++;
240 return answer;
241}
242#define DIV_FROM_REG(val) (1 << (val))
243
f8d0c19a
JD		 244static const unsigned int pwm_freq[8] = {
245 48000000 / 128,
246 24000000 / 128,
247 12000000 / 128,
248 8000000 / 128,
249 6000000 / 128,
250 3000000 / 128,
251 1500000 / 128,
252 750000 / 128,
253};
254
1da177e4 255
b74f3fdd 256struct it87_sio_data {
257 enum chips type;
258 /* Values read from Super-I/O config space */
0475169c 259 u8 revision;
b74f3fdd 260 u8 vid_value;
d9b327c3 261 u8 beep_pin;
591ec650 262 /* Features skipped based on config or DMI */
895ff267 263 u8 skip_vid;
591ec650 264 u8 skip_fan;
98dd22c3 265 u8 skip_pwm;
b74f3fdd 266};
267
ed6bafbf
JD		 268/* For each registered chip, we need to keep some data in memory.
269 The structure is dynamically allocated. */
1da177e4 270struct it87_data {
1beeffe4 271 struct device *hwmon_dev;
1da177e4 272 enum chips type;
0475169c 273 u8 revision;
1da177e4 274
b74f3fdd 275 unsigned short addr;
276 const char *name;
9a61bf63 277 struct mutex update_lock;
1da177e4
LT		 278 char valid; /* !=0 if following fields are valid */
279 unsigned long last_updated; /* In jiffies */
280
281 u8 in[9]; /* Register value */
3543a53f
JD		 282 u8 in_max[8]; /* Register value */
283 u8 in_min[8]; /* Register value */
9060f8bd 284 u8 has_fan; /* Bitfield, fans enabled */
c7f1f716
JD		 285 u16 fan[5]; /* Register values, possibly combined */
286 u16 fan_min[5]; /* Register values, possibly combined */
e267d250
JD		 287 s8 temp[3]; /* Register value */
288 s8 temp_high[3]; /* Register value */
289 s8 temp_low[3]; /* Register value */
1da177e4
LT		 290 u8 sensor; /* Register value */
291 u8 fan_div[3]; /* Register encoding, shifted right */
292 u8 vid; /* Register encoding, combined */
a7be58a1 293 u8 vrm;
1da177e4 294 u32 alarms; /* Register encoding, combined */
d9b327c3 295 u8 beeps; /* Register encoding */
1da177e4 296 u8 fan_main_ctrl; /* Register value */
f8d0c19a 297 u8 fan_ctl; /* Register value */
b99883dc
JD		 298
299 /* The following 3 arrays correspond to the same registers. The
300 * meaning of bits 6-0 depends on the value of bit 7, and we want
301 * to preserve settings on mode changes, so we have to track all
302 * values separately. */
303 u8 pwm_ctrl[3]; /* Register value */
304 u8 pwm_duty[3]; /* Manual PWM value set by user (bit 6-0) */
305 u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */
4f3f51bc
JD		 306
307 /* Automatic fan speed control registers */
308 u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */
309 s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */
1da177e4
LT		 310};
311
0475169c
AP		 312static inline int has_16bit_fans(const struct it87_data *data)
313{
816d8c6a 314 /* IT8705F Datasheet 0.4.1, 3h == Version G.
859b9ef3 315 IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
816d8c6a
AP		 316 These are the first revisions with 16bit tachometer support. */
317 return (data->type == it87 && data->revision >= 0x03)
859b9ef3 318 || (data->type == it8712 && data->revision >= 0x08)
0475169c 319 || data->type == it8716
b4da93e4
JMS		 320 || data->type == it8718
321 || data->type == it8720;
0475169c 322}
1da177e4 323
4f3f51bc
JD		 324static inline int has_old_autopwm(const struct it87_data *data)
325{
326 /* The old automatic fan speed control interface is implemented
327 by IT8705F chips up to revision F and IT8712F chips up to
328 revision G. */
329 return (data->type == it87 && data->revision < 0x03)
330 || (data->type == it8712 && data->revision < 0x08);
331}
332
b74f3fdd 333static int it87_probe(struct platform_device *pdev);
d0546128 334static int __devexit it87_remove(struct platform_device *pdev);
1da177e4 335
b74f3fdd 336static int it87_read_value(struct it87_data *data, u8 reg);
337static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
1da177e4 338static struct it87_data *it87_update_device(struct device *dev);
b74f3fdd 339static int it87_check_pwm(struct device *dev);
340static void it87_init_device(struct platform_device *pdev);
1da177e4
LT		 341
342
b74f3fdd 343static struct platform_driver it87_driver = {
cdaf7934 344 .driver = {
87218842 345 .owner = THIS_MODULE,
b74f3fdd 346 .name = DRVNAME,
cdaf7934 347 },
b74f3fdd 348 .probe = it87_probe,
349 .remove = __devexit_p(it87_remove),
fde09509
JD		 350};
351
20ad93d4
JD		 352static ssize_t show_in(struct device *dev, struct device_attribute *attr,
353 char *buf)
1da177e4 354{
20ad93d4
JD		 355 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
356 int nr = sensor_attr->index;
357
1da177e4
LT		 358 struct it87_data *data = it87_update_device(dev);
359 return sprintf(buf, "%d\n", IN_FROM_REG(data->in[nr]));
360}
361
20ad93d4
JD		 362static ssize_t show_in_min(struct device *dev, struct device_attribute *attr,
363 char *buf)
1da177e4 364{
20ad93d4
JD		 365 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
366 int nr = sensor_attr->index;
367
1da177e4
LT		 368 struct it87_data *data = it87_update_device(dev);
369 return sprintf(buf, "%d\n", IN_FROM_REG(data->in_min[nr]));
370}
371
20ad93d4
JD		 372static ssize_t show_in_max(struct device *dev, struct device_attribute *attr,
373 char *buf)
1da177e4 374{
20ad93d4
JD		 375 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
376 int nr = sensor_attr->index;
377
1da177e4
LT		 378 struct it87_data *data = it87_update_device(dev);
379 return sprintf(buf, "%d\n", IN_FROM_REG(data->in_max[nr]));
380}
381
20ad93d4
JD		 382static ssize_t set_in_min(struct device *dev, struct device_attribute *attr,
383 const char *buf, size_t count)
1da177e4 384{
20ad93d4
JD		 385 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
386 int nr = sensor_attr->index;
387
b74f3fdd 388 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 389 unsigned long val;
390
391 if (strict_strtoul(buf, 10, &val) < 0)
392 return -EINVAL;
1da177e4 393
9a61bf63 394 mutex_lock(&data->update_lock);
1da177e4 395 data->in_min[nr] = IN_TO_REG(val);
b74f3fdd 396 it87_write_value(data, IT87_REG_VIN_MIN(nr),
1da177e4 397 data->in_min[nr]);
9a61bf63 398 mutex_unlock(&data->update_lock);
1da177e4
LT		 399 return count;
400}
20ad93d4
JD		 401static ssize_t set_in_max(struct device *dev, struct device_attribute *attr,
402 const char *buf, size_t count)
1da177e4 403{
20ad93d4
JD		 404 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
405 int nr = sensor_attr->index;
406
b74f3fdd 407 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 408 unsigned long val;
409
410 if (strict_strtoul(buf, 10, &val) < 0)
411 return -EINVAL;
1da177e4 412
9a61bf63 413 mutex_lock(&data->update_lock);
1da177e4 414 data->in_max[nr] = IN_TO_REG(val);
b74f3fdd 415 it87_write_value(data, IT87_REG_VIN_MAX(nr),
1da177e4 416 data->in_max[nr]);
9a61bf63 417 mutex_unlock(&data->update_lock);
1da177e4
LT		 418 return count;
419}
420
421#define show_in_offset(offset) \
20ad93d4
JD		 422static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
423 show_in, NULL, offset);
1da177e4
LT		 424
425#define limit_in_offset(offset) \
20ad93d4
JD		 426static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
427 show_in_min, set_in_min, offset); \
428static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
429 show_in_max, set_in_max, offset);
1da177e4
LT		 430
431show_in_offset(0);
432limit_in_offset(0);
433show_in_offset(1);
434limit_in_offset(1);
435show_in_offset(2);
436limit_in_offset(2);
437show_in_offset(3);
438limit_in_offset(3);
439show_in_offset(4);
440limit_in_offset(4);
441show_in_offset(5);
442limit_in_offset(5);
443show_in_offset(6);
444limit_in_offset(6);
445show_in_offset(7);
446limit_in_offset(7);
447show_in_offset(8);
448
449/* 3 temperatures */
20ad93d4
JD		 450static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
451 char *buf)
1da177e4 452{
20ad93d4
JD		 453 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
454 int nr = sensor_attr->index;
455
1da177e4
LT		 456 struct it87_data *data = it87_update_device(dev);
457 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr]));
458}
20ad93d4
JD		 459static ssize_t show_temp_max(struct device *dev, struct device_attribute *attr,
460 char *buf)
1da177e4 461{
20ad93d4
JD		 462 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
463 int nr = sensor_attr->index;
464
1da177e4
LT		 465 struct it87_data *data = it87_update_device(dev);
466 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_high[nr]));
467}
20ad93d4
JD		 468static ssize_t show_temp_min(struct device *dev, struct device_attribute *attr,
469 char *buf)
1da177e4 470{
20ad93d4
JD		 471 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
472 int nr = sensor_attr->index;
473
1da177e4
LT		 474 struct it87_data *data = it87_update_device(dev);
475 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_low[nr]));
476}
20ad93d4
JD		 477static ssize_t set_temp_max(struct device *dev, struct device_attribute *attr,
478 const char *buf, size_t count)
1da177e4 479{
20ad93d4
JD		 480 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
481 int nr = sensor_attr->index;
482
b74f3fdd 483 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 484 long val;
485
486 if (strict_strtol(buf, 10, &val) < 0)
487 return -EINVAL;
1da177e4 488
9a61bf63 489 mutex_lock(&data->update_lock);
1da177e4 490 data->temp_high[nr] = TEMP_TO_REG(val);
b74f3fdd 491 it87_write_value(data, IT87_REG_TEMP_HIGH(nr), data->temp_high[nr]);
9a61bf63 492 mutex_unlock(&data->update_lock);
1da177e4
LT		 493 return count;
494}
20ad93d4
JD		 495static ssize_t set_temp_min(struct device *dev, struct device_attribute *attr,
496 const char *buf, size_t count)
1da177e4 497{
20ad93d4
JD		 498 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
499 int nr = sensor_attr->index;
500
b74f3fdd 501 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 502 long val;
503
504 if (strict_strtol(buf, 10, &val) < 0)
505 return -EINVAL;
1da177e4 506
9a61bf63 507 mutex_lock(&data->update_lock);
1da177e4 508 data->temp_low[nr] = TEMP_TO_REG(val);
b74f3fdd 509 it87_write_value(data, IT87_REG_TEMP_LOW(nr), data->temp_low[nr]);
9a61bf63 510 mutex_unlock(&data->update_lock);
1da177e4
LT		 511 return count;
512}
513#define show_temp_offset(offset) \
20ad93d4
JD		 514static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
515 show_temp, NULL, offset - 1); \
516static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
517 show_temp_max, set_temp_max, offset - 1); \
518static SENSOR_DEVICE_ATTR(temp##offset##_min, S_IRUGO | S_IWUSR, \
519 show_temp_min, set_temp_min, offset - 1);
1da177e4
LT		 520
521show_temp_offset(1);
522show_temp_offset(2);
523show_temp_offset(3);
524
20ad93d4
JD		 525static ssize_t show_sensor(struct device *dev, struct device_attribute *attr,
526 char *buf)
1da177e4 527{
20ad93d4
JD		 528 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
529 int nr = sensor_attr->index;
530
1da177e4 531 struct it87_data *data = it87_update_device(dev);
5f2dc798
JD		 532 u8 reg = data->sensor; /* In case the value is updated while
533 we use it */
534
1da177e4
LT		 535 if (reg & (1 << nr))
536 return sprintf(buf, "3\n"); /* thermal diode */
537 if (reg & (8 << nr))
4ed10779 538 return sprintf(buf, "4\n"); /* thermistor */
1da177e4
LT		 539 return sprintf(buf, "0\n"); /* disabled */
540}
20ad93d4
JD		 541static ssize_t set_sensor(struct device *dev, struct device_attribute *attr,
542 const char *buf, size_t count)
1da177e4 543{
20ad93d4
JD		 544 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
545 int nr = sensor_attr->index;
546
b74f3fdd 547 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 548 long val;
8acf07c5 549 u8 reg;
f5f64501
JD		 550
551 if (strict_strtol(buf, 10, &val) < 0)
552 return -EINVAL;
1da177e4 553
8acf07c5
JD		 554 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
555 reg &= ~(1 << nr);
556 reg &= ~(8 << nr);
4ed10779
JD		 557 if (val == 2) { /* backwards compatibility */
558 dev_warn(dev, "Sensor type 2 is deprecated, please use 4 "
559 "instead\n");
560 val = 4;
561 }
562 /* 3 = thermal diode; 4 = thermistor; 0 = disabled */
1da177e4 563 if (val == 3)
8acf07c5 564 reg |= 1 << nr;
4ed10779 565 else if (val == 4)
8acf07c5
JD		 566 reg |= 8 << nr;
567 else if (val != 0)
1da177e4 568 return -EINVAL;
8acf07c5
JD		 569
570 mutex_lock(&data->update_lock);
571 data->sensor = reg;
b74f3fdd 572 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
2b3d1d87 573 data->valid = 0; /* Force cache refresh */
9a61bf63 574 mutex_unlock(&data->update_lock);
1da177e4
LT		 575 return count;
576}
577#define show_sensor_offset(offset) \
20ad93d4
JD		 578static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
579 show_sensor, set_sensor, offset - 1);
1da177e4
LT		 580
581show_sensor_offset(1);
582show_sensor_offset(2);
583show_sensor_offset(3);
584
585/* 3 Fans */
b99883dc
JD		 586
587static int pwm_mode(const struct it87_data *data, int nr)
588{
589 int ctrl = data->fan_main_ctrl & (1 << nr);
590
591 if (ctrl == 0) /* Full speed */
592 return 0;
593 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
594 return 2;
595 else /* Manual mode */
596 return 1;
597}
598
20ad93d4
JD		 599static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
600 char *buf)
1da177e4 601{
20ad93d4
JD		 602 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
603 int nr = sensor_attr->index;
604
1da177e4 605 struct it87_data *data = it87_update_device(dev);
5f2dc798 606 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
1da177e4
LT		 607 DIV_FROM_REG(data->fan_div[nr])));
608}
20ad93d4
JD		 609static ssize_t show_fan_min(struct device *dev, struct device_attribute *attr,
610 char *buf)
1da177e4 611{
20ad93d4
JD		 612 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
613 int nr = sensor_attr->index;
614
1da177e4 615 struct it87_data *data = it87_update_device(dev);
5f2dc798
JD		 616 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr],
617 DIV_FROM_REG(data->fan_div[nr])));
1da177e4 618}
20ad93d4
JD		 619static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
620 char *buf)
1da177e4 621{
20ad93d4
JD		 622 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
623 int nr = sensor_attr->index;
624
1da177e4
LT		 625 struct it87_data *data = it87_update_device(dev);
626 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
627}
5f2dc798
JD		 628static ssize_t show_pwm_enable(struct device *dev,
629 struct device_attribute *attr, char *buf)
1da177e4 630{
20ad93d4
JD		 631 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
632 int nr = sensor_attr->index;
633
1da177e4 634 struct it87_data *data = it87_update_device(dev);
b99883dc 635 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1da177e4 636}
20ad93d4
JD		 637static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
638 char *buf)
1da177e4 639{
20ad93d4
JD		 640 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
641 int nr = sensor_attr->index;
642
1da177e4 643 struct it87_data *data = it87_update_device(dev);
b99883dc 644 return sprintf(buf, "%d\n", PWM_FROM_REG(data->pwm_duty[nr]));
1da177e4 645}
f8d0c19a
JD		 646static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
647 char *buf)
648{
649 struct it87_data *data = it87_update_device(dev);
650 int index = (data->fan_ctl >> 4) & 0x07;
651
652 return sprintf(buf, "%u\n", pwm_freq[index]);
653}
20ad93d4
JD		 654static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
655 const char *buf, size_t count)
1da177e4 656{
20ad93d4
JD		 657 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
658 int nr = sensor_attr->index;
659
b74f3fdd 660 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 661 long val;
7f999aa7 662 u8 reg;
1da177e4 663
f5f64501
JD		 664 if (strict_strtol(buf, 10, &val) < 0)
665 return -EINVAL;
666
9a61bf63 667 mutex_lock(&data->update_lock);
b74f3fdd 668 reg = it87_read_value(data, IT87_REG_FAN_DIV);
07eab46d 669 switch (nr) {
5f2dc798
JD		 670 case 0:
671 data->fan_div[nr] = reg & 0x07;
672 break;
673 case 1:
674 data->fan_div[nr] = (reg >> 3) & 0x07;
675 break;
676 case 2:
677 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
678 break;
07eab46d
JD		 679 }
680
1da177e4 681 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 682 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
9a61bf63 683 mutex_unlock(&data->update_lock);
1da177e4
LT		 684 return count;
685}
20ad93d4
JD		 686static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
687 const char *buf, size_t count)
1da177e4 688{
20ad93d4
JD		 689 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
690 int nr = sensor_attr->index;
691
b74f3fdd 692 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 693 unsigned long val;
8ab4ec3e 694 int min;
1da177e4
LT		 695 u8 old;
696
f5f64501
JD		 697 if (strict_strtoul(buf, 10, &val) < 0)
698 return -EINVAL;
699
9a61bf63 700 mutex_lock(&data->update_lock);
b74f3fdd 701 old = it87_read_value(data, IT87_REG_FAN_DIV);
1da177e4 702
8ab4ec3e
JD		 703 /* Save fan min limit */
704 min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
1da177e4
LT		 705
706 switch (nr) {
707 case 0:
708 case 1:
709 data->fan_div[nr] = DIV_TO_REG(val);
710 break;
711 case 2:
712 if (val < 8)
713 data->fan_div[nr] = 1;
714 else
715 data->fan_div[nr] = 3;
716 }
717 val = old & 0x80;
718 val |= (data->fan_div[0] & 0x07);
719 val |= (data->fan_div[1] & 0x07) << 3;
720 if (data->fan_div[2] == 3)
721 val |= 0x1 << 6;
b74f3fdd 722 it87_write_value(data, IT87_REG_FAN_DIV, val);
1da177e4 723
8ab4ec3e
JD		 724 /* Restore fan min limit */
725 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 726 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
8ab4ec3e 727
9a61bf63 728 mutex_unlock(&data->update_lock);
1da177e4
LT		 729 return count;
730}
cccfc9c4
JD		 731
732/* Returns 0 if OK, -EINVAL otherwise */
733static int check_trip_points(struct device *dev, int nr)
734{
735 const struct it87_data *data = dev_get_drvdata(dev);
736 int i, err = 0;
737
738 if (has_old_autopwm(data)) {
739 for (i = 0; i < 3; i++) {
740 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
741 err = -EINVAL;
742 }
743 for (i = 0; i < 2; i++) {
744 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
745 err = -EINVAL;
746 }
747 }
748
749 if (err) {
750 dev_err(dev, "Inconsistent trip points, not switching to "
751 "automatic mode\n");
752 dev_err(dev, "Adjust the trip points and try again\n");
753 }
754 return err;
755}
756
20ad93d4
JD		 757static ssize_t set_pwm_enable(struct device *dev,
758 struct device_attribute *attr, const char *buf, size_t count)
1da177e4 759{
20ad93d4
JD		 760 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
761 int nr = sensor_attr->index;
762
b74f3fdd 763 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 764 long val;
1da177e4 765
f5f64501 766 if (strict_strtol(buf, 10, &val) < 0 || val < 0 || val > 2)
b99883dc
JD		 767 return -EINVAL;
768
cccfc9c4
JD		 769 /* Check trip points before switching to automatic mode */
770 if (val == 2) {
771 if (check_trip_points(dev, nr) < 0)
772 return -EINVAL;
773 }
774
9a61bf63 775 mutex_lock(&data->update_lock);
1da177e4
LT		 776
777 if (val == 0) {
778 int tmp;
779 /* make sure the fan is on when in on/off mode */
b74f3fdd 780 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
781 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1da177e4
LT		 782 /* set on/off mode */
783 data->fan_main_ctrl &= ~(1 << nr);
5f2dc798
JD		 784 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
785 data->fan_main_ctrl);
b99883dc
JD		 786 } else {
787 if (val == 1) /* Manual mode */
788 data->pwm_ctrl[nr] = data->pwm_duty[nr];
789 else /* Automatic mode */
790 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
791 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1da177e4
LT		 792 /* set SmartGuardian mode */
793 data->fan_main_ctrl |= (1 << nr);
5f2dc798
JD		 794 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
795 data->fan_main_ctrl);
1da177e4
LT		 796 }
797
9a61bf63 798 mutex_unlock(&data->update_lock);
1da177e4
LT		 799 return count;
800}
20ad93d4
JD		 801static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
802 const char *buf, size_t count)
1da177e4 803{
20ad93d4
JD		 804 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
805 int nr = sensor_attr->index;
806
b74f3fdd 807 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 808 long val;
1da177e4 809
f5f64501 810 if (strict_strtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1da177e4
LT		 811 return -EINVAL;
812
9a61bf63 813 mutex_lock(&data->update_lock);
b99883dc
JD		 814 data->pwm_duty[nr] = PWM_TO_REG(val);
815 /* If we are in manual mode, write the duty cycle immediately;
816 * otherwise, just store it for later use. */
817 if (!(data->pwm_ctrl[nr] & 0x80)) {
818 data->pwm_ctrl[nr] = data->pwm_duty[nr];
819 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
820 }
9a61bf63 821 mutex_unlock(&data->update_lock);
1da177e4
LT		 822 return count;
823}
f8d0c19a
JD		 824static ssize_t set_pwm_freq(struct device *dev,
825 struct device_attribute *attr, const char *buf, size_t count)
826{
b74f3fdd 827 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 828 unsigned long val;
f8d0c19a
JD		 829 int i;
830
f5f64501
JD		 831 if (strict_strtoul(buf, 10, &val) < 0)
832 return -EINVAL;
833
f8d0c19a
JD		 834 /* Search for the nearest available frequency */
835 for (i = 0; i < 7; i++) {
836 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
837 break;
838 }
839
840 mutex_lock(&data->update_lock);
b74f3fdd 841 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
f8d0c19a 842 data->fan_ctl |= i << 4;
b74f3fdd 843 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
f8d0c19a
JD		 844 mutex_unlock(&data->update_lock);
845
846 return count;
847}
94ac7ee6
JD		 848static ssize_t show_pwm_temp_map(struct device *dev,
849 struct device_attribute *attr, char *buf)
850{
851 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
852 int nr = sensor_attr->index;
853
854 struct it87_data *data = it87_update_device(dev);
855 int map;
856
857 if (data->pwm_temp_map[nr] < 3)
858 map = 1 << data->pwm_temp_map[nr];
859 else
860 map = 0; /* Should never happen */
861 return sprintf(buf, "%d\n", map);
862}
863static ssize_t set_pwm_temp_map(struct device *dev,
864 struct device_attribute *attr, const char *buf, size_t count)
865{
866 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
867 int nr = sensor_attr->index;
868
869 struct it87_data *data = dev_get_drvdata(dev);
870 long val;
871 u8 reg;
872
4f3f51bc
JD		 873 /* This check can go away if we ever support automatic fan speed
874 control on newer chips. */
875 if (!has_old_autopwm(data)) {
876 dev_notice(dev, "Mapping change disabled for safety reasons\n");
877 return -EINVAL;
878 }
879
94ac7ee6
JD		 880 if (strict_strtol(buf, 10, &val) < 0)
881 return -EINVAL;
882
883 switch (val) {
884 case (1 << 0):
885 reg = 0x00;
886 break;
887 case (1 << 1):
888 reg = 0x01;
889 break;
890 case (1 << 2):
891 reg = 0x02;
892 break;
893 default:
894 return -EINVAL;
895 }
896
897 mutex_lock(&data->update_lock);
898 data->pwm_temp_map[nr] = reg;
899 /* If we are in automatic mode, write the temp mapping immediately;
900 * otherwise, just store it for later use. */
901 if (data->pwm_ctrl[nr] & 0x80) {
902 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
903 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
904 }
905 mutex_unlock(&data->update_lock);
906 return count;
907}
1da177e4 908
4f3f51bc
JD		 909static ssize_t show_auto_pwm(struct device *dev,
910 struct device_attribute *attr, char *buf)
911{
912 struct it87_data *data = it87_update_device(dev);
913 struct sensor_device_attribute_2 *sensor_attr =
914 to_sensor_dev_attr_2(attr);
915 int nr = sensor_attr->nr;
916 int point = sensor_attr->index;
917
918 return sprintf(buf, "%d\n", PWM_FROM_REG(data->auto_pwm[nr][point]));
919}
920
921static ssize_t set_auto_pwm(struct device *dev,
922 struct device_attribute *attr, const char *buf, size_t count)
923{
924 struct it87_data *data = dev_get_drvdata(dev);
925 struct sensor_device_attribute_2 *sensor_attr =
926 to_sensor_dev_attr_2(attr);
927 int nr = sensor_attr->nr;
928 int point = sensor_attr->index;
929 long val;
930
931 if (strict_strtol(buf, 10, &val) < 0 || val < 0 || val > 255)
932 return -EINVAL;
933
934 mutex_lock(&data->update_lock);
935 data->auto_pwm[nr][point] = PWM_TO_REG(val);
936 it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
937 data->auto_pwm[nr][point]);
938 mutex_unlock(&data->update_lock);
939 return count;
940}
941
942static ssize_t show_auto_temp(struct device *dev,
943 struct device_attribute *attr, char *buf)
944{
945 struct it87_data *data = it87_update_device(dev);
946 struct sensor_device_attribute_2 *sensor_attr =
947 to_sensor_dev_attr_2(attr);
948 int nr = sensor_attr->nr;
949 int point = sensor_attr->index;
950
951 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
952}
953
954static ssize_t set_auto_temp(struct device *dev,
955 struct device_attribute *attr, const char *buf, size_t count)
956{
957 struct it87_data *data = dev_get_drvdata(dev);
958 struct sensor_device_attribute_2 *sensor_attr =
959 to_sensor_dev_attr_2(attr);
960 int nr = sensor_attr->nr;
961 int point = sensor_attr->index;
962 long val;
963
964 if (strict_strtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
965 return -EINVAL;
966
967 mutex_lock(&data->update_lock);
968 data->auto_temp[nr][point] = TEMP_TO_REG(val);
969 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
970 data->auto_temp[nr][point]);
971 mutex_unlock(&data->update_lock);
972 return count;
973}
974
20ad93d4
JD		 975#define show_fan_offset(offset) \
976static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
977 show_fan, NULL, offset - 1); \
978static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
979 show_fan_min, set_fan_min, offset - 1); \
980static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
981 show_fan_div, set_fan_div, offset - 1);
1da177e4
LT		 982
983show_fan_offset(1);
984show_fan_offset(2);
985show_fan_offset(3);
986
987#define show_pwm_offset(offset) \
20ad93d4
JD		 988static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
989 show_pwm_enable, set_pwm_enable, offset - 1); \
990static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
f8d0c19a
JD		 991 show_pwm, set_pwm, offset - 1); \
992static DEVICE_ATTR(pwm##offset##_freq, \
993 (offset == 1 ? S_IRUGO | S_IWUSR : S_IRUGO), \
94ac7ee6
JD		 994 show_pwm_freq, (offset == 1 ? set_pwm_freq : NULL)); \
995static SENSOR_DEVICE_ATTR(pwm##offset##_auto_channels_temp, \
4f3f51bc
JD		 996 S_IRUGO | S_IWUSR, show_pwm_temp_map, set_pwm_temp_map, \
997 offset - 1); \
998static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_pwm, \
999 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1000 offset - 1, 0); \
1001static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_pwm, \
1002 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1003 offset - 1, 1); \
1004static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_pwm, \
1005 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1006 offset - 1, 2); \
1007static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_pwm, \
1008 S_IRUGO, show_auto_pwm, NULL, offset - 1, 3); \
1009static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp, \
1010 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1011 offset - 1, 1); \
1012static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp_hyst, \
1013 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1014 offset - 1, 0); \
1015static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_temp, \
1016 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1017 offset - 1, 2); \
1018static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_temp, \
1019 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1020 offset - 1, 3); \
1021static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_temp, \
1022 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1023 offset - 1, 4);
1da177e4
LT		 1024
1025show_pwm_offset(1);
1026show_pwm_offset(2);
1027show_pwm_offset(3);
1028
17d648bf
JD		 1029/* A different set of callbacks for 16-bit fans */
1030static ssize_t show_fan16(struct device *dev, struct device_attribute *attr,
1031 char *buf)
1032{
1033 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1034 int nr = sensor_attr->index;
1035 struct it87_data *data = it87_update_device(dev);
1036 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan[nr]));
1037}
1038
1039static ssize_t show_fan16_min(struct device *dev, struct device_attribute *attr,
1040 char *buf)
1041{
1042 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1043 int nr = sensor_attr->index;
1044 struct it87_data *data = it87_update_device(dev);
1045 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan_min[nr]));
1046}
1047
1048static ssize_t set_fan16_min(struct device *dev, struct device_attribute *attr,
1049 const char *buf, size_t count)
1050{
1051 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1052 int nr = sensor_attr->index;
b74f3fdd 1053 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 1054 long val;
1055
1056 if (strict_strtol(buf, 10, &val) < 0)
1057 return -EINVAL;
17d648bf
JD		 1058
1059 mutex_lock(&data->update_lock);
1060 data->fan_min[nr] = FAN16_TO_REG(val);
c7f1f716 1061 it87_write_value(data, IT87_REG_FAN_MIN[nr],
17d648bf 1062 data->fan_min[nr] & 0xff);
c7f1f716 1063 it87_write_value(data, IT87_REG_FANX_MIN[nr],
17d648bf
JD		 1064 data->fan_min[nr] >> 8);
1065 mutex_unlock(&data->update_lock);
1066 return count;
1067}
1068
1069/* We want to use the same sysfs file names as 8-bit fans, but we need
1070 different variable names, so we have to use SENSOR_ATTR instead of
1071 SENSOR_DEVICE_ATTR. */
1072#define show_fan16_offset(offset) \
1073static struct sensor_device_attribute sensor_dev_attr_fan##offset##_input16 \
1074 = SENSOR_ATTR(fan##offset##_input, S_IRUGO, \
1075 show_fan16, NULL, offset - 1); \
1076static struct sensor_device_attribute sensor_dev_attr_fan##offset##_min16 \
1077 = SENSOR_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
1078 show_fan16_min, set_fan16_min, offset - 1)
1079
1080show_fan16_offset(1);
1081show_fan16_offset(2);
1082show_fan16_offset(3);
c7f1f716
JD		 1083show_fan16_offset(4);
1084show_fan16_offset(5);
17d648bf 1085
1da177e4 1086/* Alarms */
5f2dc798
JD		 1087static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1088 char *buf)
1da177e4
LT		 1089{
1090 struct it87_data *data = it87_update_device(dev);
68188ba7 1091 return sprintf(buf, "%u\n", data->alarms);
1da177e4 1092}
1d66c64c 1093static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1da177e4 1094
0124dd78
JD		 1095static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1096 char *buf)
1097{
1098 int bitnr = to_sensor_dev_attr(attr)->index;
1099 struct it87_data *data = it87_update_device(dev);
1100 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1101}
1102static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1103static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1104static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1105static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1106static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1107static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1108static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1109static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1110static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1111static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1112static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1113static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1114static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1115static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1116static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1117static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1118
d9b327c3
JD		 1119static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1120 char *buf)
1121{
1122 int bitnr = to_sensor_dev_attr(attr)->index;
1123 struct it87_data *data = it87_update_device(dev);
1124 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1125}
1126static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1127 const char *buf, size_t count)
1128{
1129 int bitnr = to_sensor_dev_attr(attr)->index;
1130 struct it87_data *data = dev_get_drvdata(dev);
1131 long val;
1132
1133 if (strict_strtol(buf, 10, &val) < 0
1134 || (val != 0 && val != 1))
1135 return -EINVAL;
1136
1137 mutex_lock(&data->update_lock);
1138 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1139 if (val)
1140 data->beeps |= (1 << bitnr);
1141 else
1142 data->beeps &= ~(1 << bitnr);
1143 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1144 mutex_unlock(&data->update_lock);
1145 return count;
1146}
1147
1148static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1149 show_beep, set_beep, 1);
1150static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1151static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1152static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1153static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1154static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1155static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1156static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1157/* fanX_beep writability is set later */
1158static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1159static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1160static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1161static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1162static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1163static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1164 show_beep, set_beep, 2);
1165static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1166static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1167
5f2dc798
JD		 1168static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1169 char *buf)
1da177e4 1170{
90d6619a 1171 struct it87_data *data = dev_get_drvdata(dev);
a7be58a1 1172 return sprintf(buf, "%u\n", data->vrm);
1da177e4 1173}
5f2dc798
JD		 1174static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1175 const char *buf, size_t count)
1da177e4 1176{
b74f3fdd 1177 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 1178 unsigned long val;
1179
1180 if (strict_strtoul(buf, 10, &val) < 0)
1181 return -EINVAL;
1da177e4 1182
1da177e4
LT		 1183 data->vrm = val;
1184
1185 return count;
1186}
1187static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4 1188
5f2dc798
JD		 1189static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1190 char *buf)
1da177e4
LT		 1191{
1192 struct it87_data *data = it87_update_device(dev);
1193 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1194}
1195static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
87808be4 1196
b74f3fdd 1197static ssize_t show_name(struct device *dev, struct device_attribute
1198 *devattr, char *buf)
1199{
1200 struct it87_data *data = dev_get_drvdata(dev);
1201 return sprintf(buf, "%s\n", data->name);
1202}
1203static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1204
87808be4
JD		 1205static struct attribute *it87_attributes[] = {
1206 &sensor_dev_attr_in0_input.dev_attr.attr,
1207 &sensor_dev_attr_in1_input.dev_attr.attr,
1208 &sensor_dev_attr_in2_input.dev_attr.attr,
1209 &sensor_dev_attr_in3_input.dev_attr.attr,
1210 &sensor_dev_attr_in4_input.dev_attr.attr,
1211 &sensor_dev_attr_in5_input.dev_attr.attr,
1212 &sensor_dev_attr_in6_input.dev_attr.attr,
1213 &sensor_dev_attr_in7_input.dev_attr.attr,
1214 &sensor_dev_attr_in8_input.dev_attr.attr,
1215 &sensor_dev_attr_in0_min.dev_attr.attr,
1216 &sensor_dev_attr_in1_min.dev_attr.attr,
1217 &sensor_dev_attr_in2_min.dev_attr.attr,
1218 &sensor_dev_attr_in3_min.dev_attr.attr,
1219 &sensor_dev_attr_in4_min.dev_attr.attr,
1220 &sensor_dev_attr_in5_min.dev_attr.attr,
1221 &sensor_dev_attr_in6_min.dev_attr.attr,
1222 &sensor_dev_attr_in7_min.dev_attr.attr,
1223 &sensor_dev_attr_in0_max.dev_attr.attr,
1224 &sensor_dev_attr_in1_max.dev_attr.attr,
1225 &sensor_dev_attr_in2_max.dev_attr.attr,
1226 &sensor_dev_attr_in3_max.dev_attr.attr,
1227 &sensor_dev_attr_in4_max.dev_attr.attr,
1228 &sensor_dev_attr_in5_max.dev_attr.attr,
1229 &sensor_dev_attr_in6_max.dev_attr.attr,
1230 &sensor_dev_attr_in7_max.dev_attr.attr,
0124dd78
JD		 1231 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1232 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1233 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1234 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1235 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1236 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1237 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1238 &sensor_dev_attr_in7_alarm.dev_attr.attr,
87808be4
JD		 1239
1240 &sensor_dev_attr_temp1_input.dev_attr.attr,
1241 &sensor_dev_attr_temp2_input.dev_attr.attr,
1242 &sensor_dev_attr_temp3_input.dev_attr.attr,
1243 &sensor_dev_attr_temp1_max.dev_attr.attr,
1244 &sensor_dev_attr_temp2_max.dev_attr.attr,
1245 &sensor_dev_attr_temp3_max.dev_attr.attr,
1246 &sensor_dev_attr_temp1_min.dev_attr.attr,
1247 &sensor_dev_attr_temp2_min.dev_attr.attr,
1248 &sensor_dev_attr_temp3_min.dev_attr.attr,
1249 &sensor_dev_attr_temp1_type.dev_attr.attr,
1250 &sensor_dev_attr_temp2_type.dev_attr.attr,
1251 &sensor_dev_attr_temp3_type.dev_attr.attr,
0124dd78
JD		 1252 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1253 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1254 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
87808be4
JD		 1255
1256 &dev_attr_alarms.attr,
b74f3fdd 1257 &dev_attr_name.attr,
87808be4
JD		 1258 NULL
1259};
1260
1261static const struct attribute_group it87_group = {
1262 .attrs = it87_attributes,
1263};
1264
d9b327c3
JD		 1265static struct attribute *it87_attributes_beep[] = {
1266 &sensor_dev_attr_in0_beep.dev_attr.attr,
1267 &sensor_dev_attr_in1_beep.dev_attr.attr,
1268 &sensor_dev_attr_in2_beep.dev_attr.attr,
1269 &sensor_dev_attr_in3_beep.dev_attr.attr,
1270 &sensor_dev_attr_in4_beep.dev_attr.attr,
1271 &sensor_dev_attr_in5_beep.dev_attr.attr,
1272 &sensor_dev_attr_in6_beep.dev_attr.attr,
1273 &sensor_dev_attr_in7_beep.dev_attr.attr,
1274
1275 &sensor_dev_attr_temp1_beep.dev_attr.attr,
1276 &sensor_dev_attr_temp2_beep.dev_attr.attr,
1277 &sensor_dev_attr_temp3_beep.dev_attr.attr,
1278 NULL
1279};
1280
1281static const struct attribute_group it87_group_beep = {
1282 .attrs = it87_attributes_beep,
1283};
1284
723a0aa0 1285static struct attribute *it87_attributes_fan16[5][3+1] = { {
87808be4
JD		 1286 &sensor_dev_attr_fan1_input16.dev_attr.attr,
1287 &sensor_dev_attr_fan1_min16.dev_attr.attr,
723a0aa0
JD		 1288 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1289 NULL
1290}, {
87808be4
JD		 1291 &sensor_dev_attr_fan2_input16.dev_attr.attr,
1292 &sensor_dev_attr_fan2_min16.dev_attr.attr,
723a0aa0
JD		 1293 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1294 NULL
1295}, {
87808be4
JD		 1296 &sensor_dev_attr_fan3_input16.dev_attr.attr,
1297 &sensor_dev_attr_fan3_min16.dev_attr.attr,
723a0aa0
JD		 1298 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1299 NULL
1300}, {
c7f1f716
JD		 1301 &sensor_dev_attr_fan4_input16.dev_attr.attr,
1302 &sensor_dev_attr_fan4_min16.dev_attr.attr,
723a0aa0
JD		 1303 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1304 NULL
1305}, {
c7f1f716
JD		 1306 &sensor_dev_attr_fan5_input16.dev_attr.attr,
1307 &sensor_dev_attr_fan5_min16.dev_attr.attr,
723a0aa0
JD		 1308 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1309 NULL
1310} };
1311
1312static const struct attribute_group it87_group_fan16[5] = {
1313 { .attrs = it87_attributes_fan16[0] },
1314 { .attrs = it87_attributes_fan16[1] },
1315 { .attrs = it87_attributes_fan16[2] },
1316 { .attrs = it87_attributes_fan16[3] },
1317 { .attrs = it87_attributes_fan16[4] },
1318};
87808be4 1319
723a0aa0 1320static struct attribute *it87_attributes_fan[3][4+1] = { {
87808be4
JD		 1321 &sensor_dev_attr_fan1_input.dev_attr.attr,
1322 &sensor_dev_attr_fan1_min.dev_attr.attr,
1323 &sensor_dev_attr_fan1_div.dev_attr.attr,
723a0aa0
JD		 1324 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1325 NULL
1326}, {
87808be4
JD		 1327 &sensor_dev_attr_fan2_input.dev_attr.attr,
1328 &sensor_dev_attr_fan2_min.dev_attr.attr,
1329 &sensor_dev_attr_fan2_div.dev_attr.attr,
723a0aa0
JD		 1330 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1331 NULL
1332}, {
87808be4
JD		 1333 &sensor_dev_attr_fan3_input.dev_attr.attr,
1334 &sensor_dev_attr_fan3_min.dev_attr.attr,
1335 &sensor_dev_attr_fan3_div.dev_attr.attr,
0124dd78 1336 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
723a0aa0
JD		 1337 NULL
1338} };
1339
1340static const struct attribute_group it87_group_fan[3] = {
1341 { .attrs = it87_attributes_fan[0] },
1342 { .attrs = it87_attributes_fan[1] },
1343 { .attrs = it87_attributes_fan[2] },
1344};
1345
1346static const struct attribute_group *
1347it87_get_fan_group(const struct it87_data *data)
1348{
1349 return has_16bit_fans(data) ? it87_group_fan16 : it87_group_fan;
1350}
0124dd78 1351
723a0aa0 1352static struct attribute *it87_attributes_pwm[3][4+1] = { {
87808be4 1353 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
87808be4 1354 &sensor_dev_attr_pwm1.dev_attr.attr,
d5b0b5d6 1355 &dev_attr_pwm1_freq.attr,
94ac7ee6 1356 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1357 NULL
1358}, {
1359 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1360 &sensor_dev_attr_pwm2.dev_attr.attr,
1361 &dev_attr_pwm2_freq.attr,
94ac7ee6 1362 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1363 NULL
1364}, {
1365 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1366 &sensor_dev_attr_pwm3.dev_attr.attr,
1367 &dev_attr_pwm3_freq.attr,
94ac7ee6 1368 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1369 NULL
1370} };
87808be4 1371
723a0aa0
JD		 1372static const struct attribute_group it87_group_pwm[3] = {
1373 { .attrs = it87_attributes_pwm[0] },
1374 { .attrs = it87_attributes_pwm[1] },
1375 { .attrs = it87_attributes_pwm[2] },
1376};
1377
4f3f51bc
JD		 1378static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1379 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1380 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1381 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1382 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1383 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1384 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1385 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1386 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1387 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1388 NULL
1389}, {
1390 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1391 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1392 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1393 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1394 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1395 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1396 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1397 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1398 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1399 NULL
1400}, {
1401 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1402 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1403 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1404 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1405 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1406 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
1407 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1408 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1409 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
1410 NULL
1411} };
1412
1413static const struct attribute_group it87_group_autopwm[3] = {
1414 { .attrs = it87_attributes_autopwm[0] },
1415 { .attrs = it87_attributes_autopwm[1] },
1416 { .attrs = it87_attributes_autopwm[2] },
1417};
1418
d9b327c3
JD		 1419static struct attribute *it87_attributes_fan_beep[] = {
1420 &sensor_dev_attr_fan1_beep.dev_attr.attr,
1421 &sensor_dev_attr_fan2_beep.dev_attr.attr,
1422 &sensor_dev_attr_fan3_beep.dev_attr.attr,
1423 &sensor_dev_attr_fan4_beep.dev_attr.attr,
1424 &sensor_dev_attr_fan5_beep.dev_attr.attr,
1425};
1426
6a8d7acf 1427static struct attribute *it87_attributes_vid[] = {
87808be4
JD		 1428 &dev_attr_vrm.attr,
1429 &dev_attr_cpu0_vid.attr,
1430 NULL
1431};
1432
6a8d7acf
JD		 1433static const struct attribute_group it87_group_vid = {
1434 .attrs = it87_attributes_vid,
87808be4 1435};
1da177e4 1436
2d8672c5 1437/* SuperIO detection - will change isa_address if a chip is found */
b74f3fdd 1438static int __init it87_find(unsigned short *address,
1439 struct it87_sio_data *sio_data)
1da177e4
LT		 1440{
1441 int err = -ENODEV;
b74f3fdd 1442 u16 chip_type;
98dd22c3 1443 const char *board_vendor, *board_name;
1da177e4
LT		 1444
1445 superio_enter();
67b671bc 1446 chip_type = force_id ? force_id : superio_inw(DEVID);
b74f3fdd 1447
1448 switch (chip_type) {
1449 case IT8705F_DEVID:
1450 sio_data->type = it87;
1451 break;
1452 case IT8712F_DEVID:
1453 sio_data->type = it8712;
1454 break;
1455 case IT8716F_DEVID:
1456 case IT8726F_DEVID:
1457 sio_data->type = it8716;
1458 break;
1459 case IT8718F_DEVID:
1460 sio_data->type = it8718;
1461 break;
b4da93e4
JMS		 1462 case IT8720F_DEVID:
1463 sio_data->type = it8720;
1464 break;
b74f3fdd 1465 case 0xffff: /* No device at all */
1466 goto exit;
1467 default:
1468 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%x)\n",
1469 chip_type);
1470 goto exit;
1471 }
1da177e4 1472
87673dd7 1473 superio_select(PME);
1da177e4
LT		 1474 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
1475 pr_info("it87: Device not activated, skipping\n");
1476 goto exit;
1477 }
1478
1479 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1480 if (*address == 0) {
1481 pr_info("it87: Base address not set, skipping\n");
1482 goto exit;
1483 }
1484
1485 err = 0;
0475169c 1486 sio_data->revision = superio_inb(DEVREV) & 0x0f;
1da177e4 1487 pr_info("it87: Found IT%04xF chip at 0x%x, revision %d\n",
0475169c 1488 chip_type, *address, sio_data->revision);
1da177e4 1489
87673dd7 1490 /* Read GPIO config and VID value from LDN 7 (GPIO) */
895ff267
JD		 1491 if (sio_data->type == it87) {
1492 /* The IT8705F doesn't have VID pins at all */
1493 sio_data->skip_vid = 1;
d9b327c3
JD		 1494
1495 /* The IT8705F has a different LD number for GPIO */
1496 superio_select(5);
1497 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
895ff267 1498 } else {
87673dd7
JD		 1499 int reg;
1500
1501 superio_select(GPIO);
895ff267
JD		 1502 /* We need at least 4 VID pins */
1503 reg = superio_inb(IT87_SIO_GPIO3_REG);
1504 if (reg & 0x0f) {
1505 pr_info("it87: VID is disabled (pins used for GPIO)\n");
1506 sio_data->skip_vid = 1;
1507 }
1508
591ec650
JD		 1509 /* Check if fan3 is there or not */
1510 if (reg & (1 << 6))
1511 sio_data->skip_pwm |= (1 << 2);
1512 if (reg & (1 << 7))
1513 sio_data->skip_fan |= (1 << 2);
1514
1515 /* Check if fan2 is there or not */
1516 reg = superio_inb(IT87_SIO_GPIO5_REG);
1517 if (reg & (1 << 1))
1518 sio_data->skip_pwm |= (1 << 1);
1519 if (reg & (1 << 2))
1520 sio_data->skip_fan |= (1 << 1);
1521
895ff267
JD		 1522 if ((sio_data->type == it8718 || sio_data->type == it8720)
1523 && !(sio_data->skip_vid))
b74f3fdd 1524 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
87673dd7
JD		 1525
1526 reg = superio_inb(IT87_SIO_PINX2_REG);
436cad2a
JD		 1527 /*
1528 * The IT8720F has no VIN7 pin, so VCCH should always be
1529 * routed internally to VIN7 with an internal divider.
1530 * Curiously, there still is a configuration bit to control
1531 * this, which means it can be set incorrectly. And even
1532 * more curiously, many boards out there are improperly
1533 * configured, even though the IT8720F datasheet claims
1534 * that the internal routing of VCCH to VIN7 is the default
1535 * setting. So we force the internal routing in this case.
1536 */
1537 if (sio_data->type == it8720 && !(reg & (1 << 1))) {
1538 reg |= (1 << 1);
1539 superio_outb(IT87_SIO_PINX2_REG, reg);
1540 pr_notice("it87: Routing internal VCCH to in7\n");
1541 }
87673dd7
JD		 1542 if (reg & (1 << 0))
1543 pr_info("it87: in3 is VCC (+5V)\n");
1544 if (reg & (1 << 1))
1545 pr_info("it87: in7 is VCCH (+5V Stand-By)\n");
d9b327c3
JD		 1546
1547 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
87673dd7 1548 }
d9b327c3
JD		 1549 if (sio_data->beep_pin)
1550 pr_info("it87: Beeping is supported\n");
87673dd7 1551
98dd22c3
JD		 1552 /* Disable specific features based on DMI strings */
1553 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
1554 board_name = dmi_get_system_info(DMI_BOARD_NAME);
1555 if (board_vendor && board_name) {
1556 if (strcmp(board_vendor, "nVIDIA") == 0
1557 && strcmp(board_name, "FN68PT") == 0) {
1558 /* On the Shuttle SN68PT, FAN_CTL2 is apparently not
1559 connected to a fan, but to something else. One user
1560 has reported instant system power-off when changing
1561 the PWM2 duty cycle, so we disable it.
1562 I use the board name string as the trigger in case
1563 the same board is ever used in other systems. */
1564 pr_info("it87: Disabling pwm2 due to "
1565 "hardware constraints\n");
1566 sio_data->skip_pwm = (1 << 1);
1567 }
1568 }
1569
1da177e4
LT		 1570exit:
1571 superio_exit();
1572 return err;
1573}
1574
723a0aa0
JD		 1575static void it87_remove_files(struct device *dev)
1576{
1577 struct it87_data *data = platform_get_drvdata(pdev);
1578 struct it87_sio_data *sio_data = dev->platform_data;
1579 const struct attribute_group *fan_group = it87_get_fan_group(data);
1580 int i;
1581
1582 sysfs_remove_group(&dev->kobj, &it87_group);
d9b327c3
JD		 1583 if (sio_data->beep_pin)
1584 sysfs_remove_group(&dev->kobj, &it87_group_beep);
723a0aa0
JD		 1585 for (i = 0; i < 5; i++) {
1586 if (!(data->has_fan & (1 << i)))
1587 continue;
1588 sysfs_remove_group(&dev->kobj, &fan_group[i]);
d9b327c3
JD		 1589 if (sio_data->beep_pin)
1590 sysfs_remove_file(&dev->kobj,
1591 it87_attributes_fan_beep[i]);
723a0aa0
JD		 1592 }
1593 for (i = 0; i < 3; i++) {
1594 if (sio_data->skip_pwm & (1 << 0))
1595 continue;
1596 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
4f3f51bc
JD		 1597 if (has_old_autopwm(data))
1598 sysfs_remove_group(&dev->kobj,
1599 &it87_group_autopwm[i]);
723a0aa0 1600 }
6a8d7acf
JD		 1601 if (!sio_data->skip_vid)
1602 sysfs_remove_group(&dev->kobj, &it87_group_vid);
723a0aa0
JD		 1603}
1604
b74f3fdd 1605static int __devinit it87_probe(struct platform_device *pdev)
1da177e4 1606{
1da177e4 1607 struct it87_data *data;
b74f3fdd 1608 struct resource *res;
1609 struct device *dev = &pdev->dev;
1610 struct it87_sio_data *sio_data = dev->platform_data;
723a0aa0
JD		 1611 const struct attribute_group *fan_group;
1612 int err = 0, i;
1da177e4 1613 int enable_pwm_interface;
d9b327c3 1614 int fan_beep_need_rw;
b74f3fdd 1615 static const char *names[] = {
1616 "it87",
1617 "it8712",
1618 "it8716",
1619 "it8718",
b4da93e4 1620 "it8720",
b74f3fdd 1621 };
1622
1623 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
87b4b663 1624 if (!request_region(res->start, IT87_EC_EXTENT, DRVNAME)) {
b74f3fdd 1625 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1626 (unsigned long)res->start,
87b4b663 1627 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
8e9afcbb
JD		 1628 err = -EBUSY;
1629 goto ERROR0;
1630 }
1da177e4 1631
5f2dc798
JD		 1632 data = kzalloc(sizeof(struct it87_data), GFP_KERNEL);
1633 if (!data) {
1da177e4
LT		 1634 err = -ENOMEM;
1635 goto ERROR1;
1636 }
1da177e4 1637
b74f3fdd 1638 data->addr = res->start;
1639 data->type = sio_data->type;
0475169c 1640 data->revision = sio_data->revision;
b74f3fdd 1641 data->name = names[sio_data->type];
1da177e4
LT		 1642
1643 /* Now, we do the remaining detection. */
b74f3fdd 1644 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
1645 || it87_read_value(data, IT87_REG_CHIPID) != 0x90) {
8e9afcbb
JD		 1646 err = -ENODEV;
1647 goto ERROR2;
1da177e4
LT		 1648 }
1649
b74f3fdd 1650 platform_set_drvdata(pdev, data);
1da177e4 1651
9a61bf63 1652 mutex_init(&data->update_lock);
1da177e4 1653
1da177e4 1654 /* Check PWM configuration */
b74f3fdd 1655 enable_pwm_interface = it87_check_pwm(dev);
1da177e4
LT		 1656
1657 /* Initialize the IT87 chip */
b74f3fdd 1658 it87_init_device(pdev);
1da177e4
LT		 1659
1660 /* Register sysfs hooks */
5f2dc798
JD		 1661 err = sysfs_create_group(&dev->kobj, &it87_group);
1662 if (err)
b74f3fdd 1663 goto ERROR2;
17d648bf 1664
d9b327c3
JD		 1665 if (sio_data->beep_pin) {
1666 err = sysfs_create_group(&dev->kobj, &it87_group_beep);
1667 if (err)
1668 goto ERROR4;
1669 }
1670
9060f8bd 1671 /* Do not create fan files for disabled fans */
723a0aa0 1672 fan_group = it87_get_fan_group(data);
d9b327c3 1673 fan_beep_need_rw = 1;
723a0aa0
JD		 1674 for (i = 0; i < 5; i++) {
1675 if (!(data->has_fan & (1 << i)))
1676 continue;
1677 err = sysfs_create_group(&dev->kobj, &fan_group[i]);
1678 if (err)
1679 goto ERROR4;
d9b327c3
JD		 1680
1681 if (sio_data->beep_pin) {
1682 err = sysfs_create_file(&dev->kobj,
1683 it87_attributes_fan_beep[i]);
1684 if (err)
1685 goto ERROR4;
1686 if (!fan_beep_need_rw)
1687 continue;
1688
1689 /* As we have a single beep enable bit for all fans,
1690 * only the first enabled fan has a writable attribute
1691 * for it. */
1692 if (sysfs_chmod_file(&dev->kobj,
1693 it87_attributes_fan_beep[i],
1694 S_IRUGO | S_IWUSR))
1695 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
1696 i + 1);
1697 fan_beep_need_rw = 0;
1698 }
17d648bf
JD		 1699 }
1700
1da177e4 1701 if (enable_pwm_interface) {
723a0aa0
JD		 1702 for (i = 0; i < 3; i++) {
1703 if (sio_data->skip_pwm & (1 << i))
1704 continue;
1705 err = sysfs_create_group(&dev->kobj,
1706 &it87_group_pwm[i]);
1707 if (err)
98dd22c3 1708 goto ERROR4;
4f3f51bc
JD		 1709
1710 if (!has_old_autopwm(data))
1711 continue;
1712 err = sysfs_create_group(&dev->kobj,
1713 &it87_group_autopwm[i]);
1714 if (err)
1715 goto ERROR4;
98dd22c3 1716 }
1da177e4
LT		 1717 }
1718
895ff267 1719 if (!sio_data->skip_vid) {
303760b4 1720 data->vrm = vid_which_vrm();
87673dd7 1721 /* VID reading from Super-I/O config space if available */
b74f3fdd 1722 data->vid = sio_data->vid_value;
6a8d7acf
JD		 1723 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
1724 if (err)
87808be4
JD		 1725 goto ERROR4;
1726 }
1727
1beeffe4
TJ		 1728 data->hwmon_dev = hwmon_device_register(dev);
1729 if (IS_ERR(data->hwmon_dev)) {
1730 err = PTR_ERR(data->hwmon_dev);
87808be4 1731 goto ERROR4;
1da177e4
LT		 1732 }
1733
1734 return 0;
1735
87808be4 1736ERROR4:
723a0aa0 1737 it87_remove_files(dev);
1da177e4 1738ERROR2:
b74f3fdd 1739 platform_set_drvdata(pdev, NULL);
1da177e4
LT		 1740 kfree(data);
1741ERROR1:
87b4b663 1742 release_region(res->start, IT87_EC_EXTENT);
1da177e4
LT		 1743ERROR0:
1744 return err;
1745}
1746
b74f3fdd 1747static int __devexit it87_remove(struct platform_device *pdev)
1da177e4 1748{
b74f3fdd 1749 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 1750
1beeffe4 1751 hwmon_device_unregister(data->hwmon_dev);
723a0aa0 1752 it87_remove_files(&pdev->dev);
943b0830 1753
87b4b663 1754 release_region(data->addr, IT87_EC_EXTENT);
b74f3fdd 1755 platform_set_drvdata(pdev, NULL);
943b0830 1756 kfree(data);
1da177e4
LT		 1757
1758 return 0;
1759}
1760
7f999aa7 1761/* Must be called with data->update_lock held, except during initialization.
1da177e4
LT		 1762 We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1763 would slow down the IT87 access and should not be necessary. */
b74f3fdd 1764static int it87_read_value(struct it87_data *data, u8 reg)
1da177e4 1765{
b74f3fdd 1766 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
1767 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT		 1768}
1769
7f999aa7 1770/* Must be called with data->update_lock held, except during initialization.
1da177e4
LT		 1771 We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1772 would slow down the IT87 access and should not be necessary. */
b74f3fdd 1773static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
1da177e4 1774{
b74f3fdd 1775 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
1776 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT		 1777}
1778
1779/* Return 1 if and only if the PWM interface is safe to use */
b74f3fdd 1780static int __devinit it87_check_pwm(struct device *dev)
1da177e4 1781{
b74f3fdd 1782 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 1783 /* Some BIOSes fail to correctly configure the IT87 fans. All fans off
1784 * and polarity set to active low is sign that this is the case so we
1785 * disable pwm control to protect the user. */
b74f3fdd 1786 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1da177e4
LT		 1787 if ((tmp & 0x87) == 0) {
1788 if (fix_pwm_polarity) {
1789 /* The user asks us to attempt a chip reconfiguration.
1790 * This means switching to active high polarity and
1791 * inverting all fan speed values. */
1792 int i;
1793 u8 pwm[3];
1794
1795 for (i = 0; i < 3; i++)
b74f3fdd 1796 pwm[i] = it87_read_value(data,
1da177e4
LT		 1797 IT87_REG_PWM(i));
1798
1799 /* If any fan is in automatic pwm mode, the polarity
1800 * might be correct, as suspicious as it seems, so we
1801 * better don't change anything (but still disable the
1802 * PWM interface). */
1803 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
b74f3fdd 1804 dev_info(dev, "Reconfiguring PWM to "
1da177e4 1805 "active high polarity\n");
b74f3fdd 1806 it87_write_value(data, IT87_REG_FAN_CTL,
1da177e4
LT		 1807 tmp | 0x87);
1808 for (i = 0; i < 3; i++)
b74f3fdd 1809 it87_write_value(data,
1da177e4
LT		 1810 IT87_REG_PWM(i),
1811 0x7f & ~pwm[i]);
1812 return 1;
1813 }
1814
b74f3fdd 1815 dev_info(dev, "PWM configuration is "
1da177e4
LT		 1816 "too broken to be fixed\n");
1817 }
1818
b74f3fdd 1819 dev_info(dev, "Detected broken BIOS "
1da177e4
LT		 1820 "defaults, disabling PWM interface\n");
1821 return 0;
1822 } else if (fix_pwm_polarity) {
b74f3fdd 1823 dev_info(dev, "PWM configuration looks "
1da177e4
LT		 1824 "sane, won't touch\n");
1825 }
1826
1827 return 1;
1828}
1829
1830/* Called when we have found a new IT87. */
b74f3fdd 1831static void __devinit it87_init_device(struct platform_device *pdev)
1da177e4 1832{
591ec650 1833 struct it87_sio_data *sio_data = pdev->dev.platform_data;
b74f3fdd 1834 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 1835 int tmp, i;
591ec650 1836 u8 mask;
1da177e4 1837
b99883dc
JD		 1838 /* For each PWM channel:
1839 * - If it is in automatic mode, setting to manual mode should set
1840 * the fan to full speed by default.
1841 * - If it is in manual mode, we need a mapping to temperature
1842 * channels to use when later setting to automatic mode later.
1843 * Use a 1:1 mapping by default (we are clueless.)
1844 * In both cases, the value can (and should) be changed by the user
1845 * prior to switching to a different mode. */
1da177e4 1846 for (i = 0; i < 3; i++) {
b99883dc
JD		 1847 data->pwm_temp_map[i] = i;
1848 data->pwm_duty[i] = 0x7f; /* Full speed */
4f3f51bc 1849 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
1da177e4
LT		 1850 }
1851
c5df9b7a
JD		 1852 /* Some chips seem to have default value 0xff for all limit
1853 * registers. For low voltage limits it makes no sense and triggers
1854 * alarms, so change to 0 instead. For high temperature limits, it
1855 * means -1 degree C, which surprisingly doesn't trigger an alarm,
1856 * but is still confusing, so change to 127 degrees C. */
1857 for (i = 0; i < 8; i++) {
b74f3fdd 1858 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
c5df9b7a 1859 if (tmp == 0xff)
b74f3fdd 1860 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
c5df9b7a
JD		 1861 }
1862 for (i = 0; i < 3; i++) {
b74f3fdd 1863 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
c5df9b7a 1864 if (tmp == 0xff)
b74f3fdd 1865 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
c5df9b7a
JD		 1866 }
1867
a00afb97
JD		 1868 /* Temperature channels are not forcibly enabled, as they can be
1869 * set to two different sensor types and we can't guess which one
1870 * is correct for a given system. These channels can be enabled at
1871 * run-time through the temp{1-3}_type sysfs accessors if needed. */
1da177e4
LT		 1872
1873 /* Check if voltage monitors are reset manually or by some reason */
b74f3fdd 1874 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
1da177e4
LT		 1875 if ((tmp & 0xff) == 0) {
1876 /* Enable all voltage monitors */
b74f3fdd 1877 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
1da177e4
LT		 1878 }
1879
1880 /* Check if tachometers are reset manually or by some reason */
591ec650 1881 mask = 0x70 & ~(sio_data->skip_fan << 4);
b74f3fdd 1882 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
591ec650 1883 if ((data->fan_main_ctrl & mask) == 0) {
1da177e4 1884 /* Enable all fan tachometers */
591ec650 1885 data->fan_main_ctrl |= mask;
5f2dc798
JD		 1886 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1887 data->fan_main_ctrl);
1da177e4 1888 }
9060f8bd 1889 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
1da177e4 1890
17d648bf 1891 /* Set tachometers to 16-bit mode if needed */
0475169c 1892 if (has_16bit_fans(data)) {
b74f3fdd 1893 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
9060f8bd 1894 if (~tmp & 0x07 & data->has_fan) {
b74f3fdd 1895 dev_dbg(&pdev->dev,
17d648bf 1896 "Setting fan1-3 to 16-bit mode\n");
b74f3fdd 1897 it87_write_value(data, IT87_REG_FAN_16BIT,
17d648bf
JD		 1898 tmp | 0x07);
1899 }
816d8c6a
AP		 1900 /* IT8705F only supports three fans. */
1901 if (data->type != it87) {
1902 if (tmp & (1 << 4))
1903 data->has_fan |= (1 << 3); /* fan4 enabled */
1904 if (tmp & (1 << 5))
1905 data->has_fan |= (1 << 4); /* fan5 enabled */
1906 }
17d648bf
JD		 1907 }
1908
591ec650
JD		 1909 /* Fan input pins may be used for alternative functions */
1910 data->has_fan &= ~sio_data->skip_fan;
1911
1da177e4 1912 /* Start monitoring */
b74f3fdd 1913 it87_write_value(data, IT87_REG_CONFIG,
1914 (it87_read_value(data, IT87_REG_CONFIG) & 0x36)
1da177e4
LT		 1915 | (update_vbat ? 0x41 : 0x01));
1916}
1917
b99883dc
JD		 1918static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
1919{
1920 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
1921 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
1922 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
1923 else /* Manual mode */
1924 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
4f3f51bc
JD		 1925
1926 if (has_old_autopwm(data)) {
1927 int i;
1928
1929 for (i = 0; i < 5 ; i++)
1930 data->auto_temp[nr][i] = it87_read_value(data,
1931 IT87_REG_AUTO_TEMP(nr, i));
1932 for (i = 0; i < 3 ; i++)
1933 data->auto_pwm[nr][i] = it87_read_value(data,
1934 IT87_REG_AUTO_PWM(nr, i));
1935 }
b99883dc
JD		 1936}
1937
1da177e4
LT		 1938static struct it87_data *it87_update_device(struct device *dev)
1939{
b74f3fdd 1940 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 1941 int i;
1942
9a61bf63 1943 mutex_lock(&data->update_lock);
1da177e4
LT		 1944
1945 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1946 || !data->valid) {
1da177e4
LT		 1947 if (update_vbat) {
1948 /* Cleared after each update, so reenable. Value
5f2dc798 1949 returned by this read will be previous value */
b74f3fdd 1950 it87_write_value(data, IT87_REG_CONFIG,
5f2dc798 1951 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1da177e4
LT		 1952 }
1953 for (i = 0; i <= 7; i++) {
1954 data->in[i] =
5f2dc798 1955 it87_read_value(data, IT87_REG_VIN(i));
1da177e4 1956 data->in_min[i] =
5f2dc798 1957 it87_read_value(data, IT87_REG_VIN_MIN(i));
1da177e4 1958 data->in_max[i] =
5f2dc798 1959 it87_read_value(data, IT87_REG_VIN_MAX(i));
1da177e4 1960 }
3543a53f 1961 /* in8 (battery) has no limit registers */
5f2dc798 1962 data->in[8] = it87_read_value(data, IT87_REG_VIN(8));
1da177e4 1963
c7f1f716 1964 for (i = 0; i < 5; i++) {
9060f8bd
JD		 1965 /* Skip disabled fans */
1966 if (!(data->has_fan & (1 << i)))
1967 continue;
1968
1da177e4 1969 data->fan_min[i] =
5f2dc798 1970 it87_read_value(data, IT87_REG_FAN_MIN[i]);
b74f3fdd 1971 data->fan[i] = it87_read_value(data,
c7f1f716 1972 IT87_REG_FAN[i]);
17d648bf 1973 /* Add high byte if in 16-bit mode */
0475169c 1974 if (has_16bit_fans(data)) {
b74f3fdd 1975 data->fan[i] |= it87_read_value(data,
c7f1f716 1976 IT87_REG_FANX[i]) << 8;
b74f3fdd 1977 data->fan_min[i] |= it87_read_value(data,
c7f1f716 1978 IT87_REG_FANX_MIN[i]) << 8;
17d648bf 1979 }
1da177e4
LT		 1980 }
1981 for (i = 0; i < 3; i++) {
1982 data->temp[i] =
5f2dc798 1983 it87_read_value(data, IT87_REG_TEMP(i));
1da177e4 1984 data->temp_high[i] =
5f2dc798 1985 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
1da177e4 1986 data->temp_low[i] =
5f2dc798 1987 it87_read_value(data, IT87_REG_TEMP_LOW(i));
1da177e4
LT		 1988 }
1989
17d648bf 1990 /* Newer chips don't have clock dividers */
0475169c 1991 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
b74f3fdd 1992 i = it87_read_value(data, IT87_REG_FAN_DIV);
17d648bf
JD		 1993 data->fan_div[0] = i & 0x07;
1994 data->fan_div[1] = (i >> 3) & 0x07;
1995 data->fan_div[2] = (i & 0x40) ? 3 : 1;
1996 }
1da177e4
LT		 1997
1998 data->alarms =
b74f3fdd 1999 it87_read_value(data, IT87_REG_ALARM1) |
2000 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
2001 (it87_read_value(data, IT87_REG_ALARM3) << 16);
d9b327c3 2002 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
b99883dc 2003
b74f3fdd 2004 data->fan_main_ctrl = it87_read_value(data,
2005 IT87_REG_FAN_MAIN_CTRL);
2006 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
b99883dc
JD		 2007 for (i = 0; i < 3; i++)
2008 it87_update_pwm_ctrl(data, i);
b74f3fdd 2009
2010 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
0475169c 2011 /* The 8705 does not have VID capability.
b4da93e4
JMS		 2012 The 8718 and the 8720 don't use IT87_REG_VID for the
2013 same purpose. */
17d648bf 2014 if (data->type == it8712 || data->type == it8716) {
b74f3fdd 2015 data->vid = it87_read_value(data, IT87_REG_VID);
17d648bf
JD		 2016 /* The older IT8712F revisions had only 5 VID pins,
2017 but we assume it is always safe to read 6 bits. */
2018 data->vid &= 0x3f;
1da177e4
LT		 2019 }
2020 data->last_updated = jiffies;
2021 data->valid = 1;
2022 }
2023
9a61bf63 2024 mutex_unlock(&data->update_lock);
1da177e4
LT		 2025
2026 return data;
2027}
2028
b74f3fdd 2029static int __init it87_device_add(unsigned short address,
2030 const struct it87_sio_data *sio_data)
2031{
2032 struct resource res = {
87b4b663
BH		 2033 .start = address + IT87_EC_OFFSET,
2034 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
b74f3fdd 2035 .name = DRVNAME,
2036 .flags = IORESOURCE_IO,
2037 };
2038 int err;
2039
b9acb64a
JD		 2040 err = acpi_check_resource_conflict(&res);
2041 if (err)
2042 goto exit;
2043
b74f3fdd 2044 pdev = platform_device_alloc(DRVNAME, address);
2045 if (!pdev) {
2046 err = -ENOMEM;
2047 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
2048 goto exit;
2049 }
2050
2051 err = platform_device_add_resources(pdev, &res, 1);
2052 if (err) {
2053 printk(KERN_ERR DRVNAME ": Device resource addition failed "
2054 "(%d)\n", err);
2055 goto exit_device_put;
2056 }
2057
2058 err = platform_device_add_data(pdev, sio_data,
2059 sizeof(struct it87_sio_data));
2060 if (err) {
2061 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
2062 goto exit_device_put;
2063 }
2064
2065 err = platform_device_add(pdev);
2066 if (err) {
2067 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
2068 err);
2069 goto exit_device_put;
2070 }
2071
2072 return 0;
2073
2074exit_device_put:
2075 platform_device_put(pdev);
2076exit:
2077 return err;
2078}
2079
1da177e4
LT		 2080static int __init sm_it87_init(void)
2081{
b74f3fdd 2082 int err;
5f2dc798 2083 unsigned short isa_address = 0;
b74f3fdd 2084 struct it87_sio_data sio_data;
2085
98dd22c3 2086 memset(&sio_data, 0, sizeof(struct it87_sio_data));
b74f3fdd 2087 err = it87_find(&isa_address, &sio_data);
2088 if (err)
2089 return err;
2090 err = platform_driver_register(&it87_driver);
2091 if (err)
2092 return err;
fde09509 2093
b74f3fdd 2094 err = it87_device_add(isa_address, &sio_data);
5f2dc798 2095 if (err) {
b74f3fdd 2096 platform_driver_unregister(&it87_driver);
2097 return err;
2098 }
2099
2100 return 0;
1da177e4
LT		 2101}
2102
2103static void __exit sm_it87_exit(void)
2104{
b74f3fdd 2105 platform_device_unregister(pdev);
2106 platform_driver_unregister(&it87_driver);
1da177e4
LT		 2107}
2108
2109
f1d8e332 2110MODULE_AUTHOR("Chris Gauthron, "
b19367c6 2111 "Jean Delvare <khali@linux-fr.org>");
b4da93e4 2112MODULE_DESCRIPTION("IT8705F/8712F/8716F/8718F/8720F/8726F, SiS950 driver");
1da177e4
LT		 2113module_param(update_vbat, bool, 0);
2114MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2115module_param(fix_pwm_polarity, bool, 0);
5f2dc798
JD		 2116MODULE_PARM_DESC(fix_pwm_polarity,
2117 "Force PWM polarity to active high (DANGEROUS)");
1da177e4
LT		 2118MODULE_LICENSE("GPL");
2119
2120module_init(sm_it87_init);
2121module_exit(sm_it87_exit);
Linux 6.x block layer and io_uring tree(s)