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hwmon: (it87) Save temperature registers in 2-dimensional array
[linux-2.6-block.git] / drivers / hwmon / it87.c
CommitLineData
1da177e4 1/*
5f2dc798
JD		 2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring.
4 *
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
8 * Fan Controller)
9 *
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
12 *
13 * Supports: IT8705F Super I/O chip w/LPC interface
14 * IT8712F Super I/O chip w/LPC interface
15 * IT8716F Super I/O chip w/LPC interface
16 * IT8718F Super I/O chip w/LPC interface
17 * IT8720F Super I/O chip w/LPC interface
44c1bcd4 18 * IT8721F Super I/O chip w/LPC interface
5f2dc798 19 * IT8726F Super I/O chip w/LPC interface
16b5dda2 20 * IT8728F Super I/O chip w/LPC interface
44c1bcd4 21 * IT8758E Super I/O chip w/LPC interface
0531d98b
GR		 22 * IT8782F Super I/O chip w/LPC interface
23 * IT8783E/F Super I/O chip w/LPC interface
5f2dc798
JD		 24 * Sis950 A clone of the IT8705F
25 *
26 * Copyright (C) 2001 Chris Gauthron
27 * Copyright (C) 2005-2010 Jean Delvare <khali@linux-fr.org>
28 *
29 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License as published by
31 * the Free Software Foundation; either version 2 of the License, or
32 * (at your option) any later version.
33 *
34 * This program is distributed in the hope that it will be useful,
35 * but WITHOUT ANY WARRANTY; without even the implied warranty of
36 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
37 * GNU General Public License for more details.
38 *
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
42 */
1da177e4 43
a8ca1037
JP		 44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
1da177e4
LT		 46#include <linux/module.h>
47#include <linux/init.h>
48#include <linux/slab.h>
49#include <linux/jiffies.h>
b74f3fdd 50#include <linux/platform_device.h>
943b0830 51#include <linux/hwmon.h>
303760b4
JD		 52#include <linux/hwmon-sysfs.h>
53#include <linux/hwmon-vid.h>
943b0830 54#include <linux/err.h>
9a61bf63 55#include <linux/mutex.h>
87808be4 56#include <linux/sysfs.h>
98dd22c3
JD		 57#include <linux/string.h>
58#include <linux/dmi.h>
b9acb64a 59#include <linux/acpi.h>
6055fae8 60#include <linux/io.h>
1da177e4 61
b74f3fdd 62#define DRVNAME "it87"
1da177e4 63
0531d98b
GR		 64enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8782,
65 it8783 };
1da177e4 66
67b671bc
JD		 67static unsigned short force_id;
68module_param(force_id, ushort, 0);
69MODULE_PARM_DESC(force_id, "Override the detected device ID");
70
b74f3fdd 71static struct platform_device *pdev;
72
1da177e4
LT		 73#define REG 0x2e /* The register to read/write */
74#define DEV 0x07 /* Register: Logical device select */
75#define VAL 0x2f /* The value to read/write */
76#define PME 0x04 /* The device with the fan registers in it */
b4da93e4
JMS		 77
78/* The device with the IT8718F/IT8720F VID value in it */
79#define GPIO 0x07
80
1da177e4
LT		 81#define DEVID 0x20 /* Register: Device ID */
82#define DEVREV 0x22 /* Register: Device Revision */
83
5b0380c9 84static inline int superio_inb(int reg)
1da177e4
LT		 85{
86 outb(reg, REG);
87 return inb(VAL);
88}
89
5b0380c9 90static inline void superio_outb(int reg, int val)
436cad2a
JD		 91{
92 outb(reg, REG);
93 outb(val, VAL);
94}
95
1da177e4
LT		 96static int superio_inw(int reg)
97{
98 int val;
99 outb(reg++, REG);
100 val = inb(VAL) << 8;
101 outb(reg, REG);
102 val |= inb(VAL);
103 return val;
104}
105
5b0380c9 106static inline void superio_select(int ldn)
1da177e4
LT		 107{
108 outb(DEV, REG);
87673dd7 109 outb(ldn, VAL);
1da177e4
LT		 110}
111
5b0380c9 112static inline int superio_enter(void)
1da177e4 113{
5b0380c9
NG		 114 /*
115 * Try to reserve REG and REG + 1 for exclusive access.
116 */
117 if (!request_muxed_region(REG, 2, DRVNAME))
118 return -EBUSY;
119
1da177e4
LT		 120 outb(0x87, REG);
121 outb(0x01, REG);
122 outb(0x55, REG);
123 outb(0x55, REG);
5b0380c9 124 return 0;
1da177e4
LT		 125}
126
5b0380c9 127static inline void superio_exit(void)
1da177e4
LT		 128{
129 outb(0x02, REG);
130 outb(0x02, VAL);
5b0380c9 131 release_region(REG, 2);
1da177e4
LT		 132}
133
87673dd7 134/* Logical device 4 registers */
1da177e4
LT		 135#define IT8712F_DEVID 0x8712
136#define IT8705F_DEVID 0x8705
17d648bf 137#define IT8716F_DEVID 0x8716
87673dd7 138#define IT8718F_DEVID 0x8718
b4da93e4 139#define IT8720F_DEVID 0x8720
44c1bcd4 140#define IT8721F_DEVID 0x8721
08a8f6e9 141#define IT8726F_DEVID 0x8726
16b5dda2 142#define IT8728F_DEVID 0x8728
0531d98b
GR		 143#define IT8782F_DEVID 0x8782
144#define IT8783E_DEVID 0x8783
1da177e4
LT		 145#define IT87_ACT_REG 0x30
146#define IT87_BASE_REG 0x60
147
87673dd7 148/* Logical device 7 registers (IT8712F and later) */
0531d98b 149#define IT87_SIO_GPIO1_REG 0x25
895ff267 150#define IT87_SIO_GPIO3_REG 0x27
591ec650 151#define IT87_SIO_GPIO5_REG 0x29
0531d98b 152#define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
87673dd7 153#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
0531d98b 154#define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
87673dd7 155#define IT87_SIO_VID_REG 0xfc /* VID value */
d9b327c3 156#define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
87673dd7 157
1da177e4 158/* Update battery voltage after every reading if true */
90ab5ee9 159static bool update_vbat;
1da177e4
LT		 160
161/* Not all BIOSes properly configure the PWM registers */
90ab5ee9 162static bool fix_pwm_polarity;
1da177e4 163
1da177e4
LT		 164/* Many IT87 constants specified below */
165
166/* Length of ISA address segment */
167#define IT87_EXTENT 8
168
87b4b663
BH		 169/* Length of ISA address segment for Environmental Controller */
170#define IT87_EC_EXTENT 2
171
172/* Offset of EC registers from ISA base address */
173#define IT87_EC_OFFSET 5
174
175/* Where are the ISA address/data registers relative to the EC base address */
176#define IT87_ADDR_REG_OFFSET 0
177#define IT87_DATA_REG_OFFSET 1
1da177e4
LT		 178
179/*----- The IT87 registers -----*/
180
181#define IT87_REG_CONFIG 0x00
182
183#define IT87_REG_ALARM1 0x01
184#define IT87_REG_ALARM2 0x02
185#define IT87_REG_ALARM3 0x03
186
4a0d71cf
GR		 187/*
188 * The IT8718F and IT8720F have the VID value in a different register, in
189 * Super-I/O configuration space.
190 */
1da177e4 191#define IT87_REG_VID 0x0a
4a0d71cf
GR		 192/*
193 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
194 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
195 * mode.
196 */
1da177e4 197#define IT87_REG_FAN_DIV 0x0b
17d648bf 198#define IT87_REG_FAN_16BIT 0x0c
1da177e4
LT		 199
200/* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
201
c7f1f716
JD		 202static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
203static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 };
204static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 };
205static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
1da177e4
LT		 206#define IT87_REG_FAN_MAIN_CTRL 0x13
207#define IT87_REG_FAN_CTL 0x14
208#define IT87_REG_PWM(nr) (0x15 + (nr))
6229cdb2 209#define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8)
1da177e4
LT		 210
211#define IT87_REG_VIN(nr) (0x20 + (nr))
212#define IT87_REG_TEMP(nr) (0x29 + (nr))
213
214#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
215#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
216#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
217#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
218
1da177e4
LT		 219#define IT87_REG_VIN_ENABLE 0x50
220#define IT87_REG_TEMP_ENABLE 0x51
4573acbc 221#define IT87_REG_TEMP_EXTRA 0x55
d9b327c3 222#define IT87_REG_BEEP_ENABLE 0x5c
1da177e4
LT		 223
224#define IT87_REG_CHIPID 0x58
225
4f3f51bc
JD		 226#define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
227#define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i))
228
1da177e4 229
b74f3fdd 230struct it87_sio_data {
231 enum chips type;
232 /* Values read from Super-I/O config space */
0475169c 233 u8 revision;
b74f3fdd 234 u8 vid_value;
d9b327c3 235 u8 beep_pin;
738e5e05 236 u8 internal; /* Internal sensors can be labeled */
591ec650 237 /* Features skipped based on config or DMI */
9172b5d1 238 u16 skip_in;
895ff267 239 u8 skip_vid;
591ec650 240 u8 skip_fan;
98dd22c3 241 u8 skip_pwm;
4573acbc 242 u8 skip_temp;
b74f3fdd 243};
244
4a0d71cf
GR		 245/*
246 * For each registered chip, we need to keep some data in memory.
247 * The structure is dynamically allocated.
248 */
1da177e4 249struct it87_data {
1beeffe4 250 struct device *hwmon_dev;
1da177e4 251 enum chips type;
0475169c 252 u8 revision;
1da177e4 253
b74f3fdd 254 unsigned short addr;
255 const char *name;
9a61bf63 256 struct mutex update_lock;
1da177e4
LT		 257 char valid; /* !=0 if following fields are valid */
258 unsigned long last_updated; /* In jiffies */
259
44c1bcd4 260 u16 in_scaled; /* Internal voltage sensors are scaled */
1da177e4 261 u8 in[9]; /* Register value */
3543a53f
JD		 262 u8 in_max[8]; /* Register value */
263 u8 in_min[8]; /* Register value */
9060f8bd 264 u8 has_fan; /* Bitfield, fans enabled */
c7f1f716
JD		 265 u16 fan[5]; /* Register values, possibly combined */
266 u16 fan_min[5]; /* Register values, possibly combined */
4573acbc 267 u8 has_temp; /* Bitfield, temp sensors enabled */
60ca385a 268 s8 temp[3][3]; /* [nr][0]=temp, [1]=min, [2]=max */
1da177e4
LT		 269 u8 sensor; /* Register value */
270 u8 fan_div[3]; /* Register encoding, shifted right */
271 u8 vid; /* Register encoding, combined */
a7be58a1 272 u8 vrm;
1da177e4 273 u32 alarms; /* Register encoding, combined */
d9b327c3 274 u8 beeps; /* Register encoding */
1da177e4 275 u8 fan_main_ctrl; /* Register value */
f8d0c19a 276 u8 fan_ctl; /* Register value */
b99883dc 277
4a0d71cf
GR		 278 /*
279 * The following 3 arrays correspond to the same registers up to
6229cdb2
JD		 280 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
281 * 7, and we want to preserve settings on mode changes, so we have
282 * to track all values separately.
283 * Starting with the IT8721F, the manual PWM duty cycles are stored
284 * in separate registers (8-bit values), so the separate tracking
285 * is no longer needed, but it is still done to keep the driver
4a0d71cf
GR		 286 * simple.
287 */
b99883dc 288 u8 pwm_ctrl[3]; /* Register value */
6229cdb2 289 u8 pwm_duty[3]; /* Manual PWM value set by user */
b99883dc 290 u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */
4f3f51bc
JD		 291
292 /* Automatic fan speed control registers */
293 u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */
294 s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */
1da177e4 295};
0df6454d 296
16b5dda2
JD		 297static inline int has_12mv_adc(const struct it87_data *data)
298{
299 /*
300 * IT8721F and later have a 12 mV ADC, also with internal scaling
301 * on selected inputs.
302 */
303 return data->type == it8721
304 || data->type == it8728;
305}
306
307static inline int has_newer_autopwm(const struct it87_data *data)
308{
309 /*
310 * IT8721F and later have separate registers for the temperature
311 * mapping and the manual duty cycle.
312 */
313 return data->type == it8721
314 || data->type == it8728;
315}
316
0531d98b 317static int adc_lsb(const struct it87_data *data, int nr)
44c1bcd4 318{
0531d98b
GR		 319 int lsb = has_12mv_adc(data) ? 12 : 16;
320 if (data->in_scaled & (1 << nr))
321 lsb <<= 1;
322 return lsb;
323}
44c1bcd4 324
0531d98b
GR		 325static u8 in_to_reg(const struct it87_data *data, int nr, long val)
326{
327 val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr));
44c1bcd4
JD		 328 return SENSORS_LIMIT(val, 0, 255);
329}
330
331static int in_from_reg(const struct it87_data *data, int nr, int val)
332{
0531d98b 333 return val * adc_lsb(data, nr);
44c1bcd4 334}
0df6454d
JD		 335
336static inline u8 FAN_TO_REG(long rpm, int div)
337{
338 if (rpm == 0)
339 return 255;
340 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
341 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
342 254);
343}
344
345static inline u16 FAN16_TO_REG(long rpm)
346{
347 if (rpm == 0)
348 return 0xffff;
349 return SENSORS_LIMIT((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
350}
351
352#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
353 1350000 / ((val) * (div)))
354/* The divider is fixed to 2 in 16-bit mode */
355#define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
356 1350000 / ((val) * 2))
357
358#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (((val) - 500) / 1000) : \
359 ((val) + 500) / 1000), -128, 127))
360#define TEMP_FROM_REG(val) ((val) * 1000)
361
44c1bcd4
JD		 362static u8 pwm_to_reg(const struct it87_data *data, long val)
363{
16b5dda2 364 if (has_newer_autopwm(data))
44c1bcd4
JD		 365 return val;
366 else
367 return val >> 1;
368}
369
370static int pwm_from_reg(const struct it87_data *data, u8 reg)
371{
16b5dda2 372 if (has_newer_autopwm(data))
44c1bcd4
JD		 373 return reg;
374 else
375 return (reg & 0x7f) << 1;
376}
377
0df6454d
JD		 378
379static int DIV_TO_REG(int val)
380{
381 int answer = 0;
382 while (answer < 7 && (val >>= 1))
383 answer++;
384 return answer;
385}
386#define DIV_FROM_REG(val) (1 << (val))
387
388static const unsigned int pwm_freq[8] = {
389 48000000 / 128,
390 24000000 / 128,
391 12000000 / 128,
392 8000000 / 128,
393 6000000 / 128,
394 3000000 / 128,
395 1500000 / 128,
396 750000 / 128,
397};
1da177e4 398
0475169c
AP		 399static inline int has_16bit_fans(const struct it87_data *data)
400{
4a0d71cf
GR		 401 /*
402 * IT8705F Datasheet 0.4.1, 3h == Version G.
403 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
404 * These are the first revisions with 16-bit tachometer support.
405 */
816d8c6a 406 return (data->type == it87 && data->revision >= 0x03)
859b9ef3 407 || (data->type == it8712 && data->revision >= 0x08)
0475169c 408 || data->type == it8716
b4da93e4 409 || data->type == it8718
44c1bcd4 410 || data->type == it8720
16b5dda2 411 || data->type == it8721
0531d98b
GR		 412 || data->type == it8728
413 || data->type == it8782
414 || data->type == it8783;
0475169c 415}
1da177e4 416
4f3f51bc
JD		 417static inline int has_old_autopwm(const struct it87_data *data)
418{
4a0d71cf
GR		 419 /*
420 * The old automatic fan speed control interface is implemented
421 * by IT8705F chips up to revision F and IT8712F chips up to
422 * revision G.
423 */
4f3f51bc
JD		 424 return (data->type == it87 && data->revision < 0x03)
425 || (data->type == it8712 && data->revision < 0x08);
426}
427
b74f3fdd 428static int it87_probe(struct platform_device *pdev);
281dfd0b 429static int it87_remove(struct platform_device *pdev);
1da177e4 430
b74f3fdd 431static int it87_read_value(struct it87_data *data, u8 reg);
432static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
1da177e4 433static struct it87_data *it87_update_device(struct device *dev);
b74f3fdd 434static int it87_check_pwm(struct device *dev);
435static void it87_init_device(struct platform_device *pdev);
1da177e4
LT		 436
437
b74f3fdd 438static struct platform_driver it87_driver = {
cdaf7934 439 .driver = {
87218842 440 .owner = THIS_MODULE,
b74f3fdd 441 .name = DRVNAME,
cdaf7934 442 },
b74f3fdd 443 .probe = it87_probe,
9e5e9b7a 444 .remove = it87_remove,
fde09509
JD		 445};
446
20ad93d4
JD		 447static ssize_t show_in(struct device *dev, struct device_attribute *attr,
448 char *buf)
1da177e4 449{
20ad93d4
JD		 450 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
451 int nr = sensor_attr->index;
452
1da177e4 453 struct it87_data *data = it87_update_device(dev);
44c1bcd4 454 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr]));
1da177e4
LT		 455}
456
20ad93d4
JD		 457static ssize_t show_in_min(struct device *dev, struct device_attribute *attr,
458 char *buf)
1da177e4 459{
20ad93d4
JD		 460 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
461 int nr = sensor_attr->index;
462
1da177e4 463 struct it87_data *data = it87_update_device(dev);
44c1bcd4 464 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in_min[nr]));
1da177e4
LT		 465}
466
20ad93d4
JD		 467static ssize_t show_in_max(struct device *dev, struct device_attribute *attr,
468 char *buf)
1da177e4 469{
20ad93d4
JD		 470 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
471 int nr = sensor_attr->index;
472
1da177e4 473 struct it87_data *data = it87_update_device(dev);
44c1bcd4 474 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in_max[nr]));
1da177e4
LT		 475}
476
20ad93d4
JD		 477static ssize_t set_in_min(struct device *dev, struct device_attribute *attr,
478 const char *buf, size_t count)
1da177e4 479{
20ad93d4
JD		 480 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
481 int nr = sensor_attr->index;
482
b74f3fdd 483 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 484 unsigned long val;
485
179c4fdb 486 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 487 return -EINVAL;
1da177e4 488
9a61bf63 489 mutex_lock(&data->update_lock);
44c1bcd4 490 data->in_min[nr] = in_to_reg(data, nr, val);
b74f3fdd 491 it87_write_value(data, IT87_REG_VIN_MIN(nr),
1da177e4 492 data->in_min[nr]);
9a61bf63 493 mutex_unlock(&data->update_lock);
1da177e4
LT		 494 return count;
495}
20ad93d4
JD		 496static ssize_t set_in_max(struct device *dev, struct device_attribute *attr,
497 const char *buf, size_t count)
1da177e4 498{
20ad93d4
JD		 499 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
500 int nr = sensor_attr->index;
501
b74f3fdd 502 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 503 unsigned long val;
504
179c4fdb 505 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 506 return -EINVAL;
1da177e4 507
9a61bf63 508 mutex_lock(&data->update_lock);
44c1bcd4 509 data->in_max[nr] = in_to_reg(data, nr, val);
b74f3fdd 510 it87_write_value(data, IT87_REG_VIN_MAX(nr),
1da177e4 511 data->in_max[nr]);
9a61bf63 512 mutex_unlock(&data->update_lock);
1da177e4
LT		 513 return count;
514}
515
516#define show_in_offset(offset) \
20ad93d4
JD		 517static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
518 show_in, NULL, offset);
1da177e4
LT		 519
520#define limit_in_offset(offset) \
20ad93d4
JD		 521static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
522 show_in_min, set_in_min, offset); \
523static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
524 show_in_max, set_in_max, offset);
1da177e4
LT		 525
526show_in_offset(0);
527limit_in_offset(0);
528show_in_offset(1);
529limit_in_offset(1);
530show_in_offset(2);
531limit_in_offset(2);
532show_in_offset(3);
533limit_in_offset(3);
534show_in_offset(4);
535limit_in_offset(4);
536show_in_offset(5);
537limit_in_offset(5);
538show_in_offset(6);
539limit_in_offset(6);
540show_in_offset(7);
541limit_in_offset(7);
542show_in_offset(8);
543
544/* 3 temperatures */
20ad93d4 545static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
60ca385a 546 char *buf)
1da177e4 547{
60ca385a
GR		 548 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
549 int nr = sattr->nr;
550 int index = sattr->index;
1da177e4 551 struct it87_data *data = it87_update_device(dev);
20ad93d4 552
60ca385a 553 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1da177e4 554}
20ad93d4 555
60ca385a
GR		 556static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
557 const char *buf, size_t count)
1da177e4 558{
60ca385a
GR		 559 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
560 int nr = sattr->nr;
561 int index = sattr->index;
b74f3fdd 562 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 563 long val;
564
179c4fdb 565 if (kstrtol(buf, 10, &val) < 0)
f5f64501 566 return -EINVAL;
1da177e4 567
9a61bf63 568 mutex_lock(&data->update_lock);
60ca385a
GR		 569 data->temp[nr][index] = TEMP_TO_REG(val);
570 it87_write_value(data,
571 index == 1 ? IT87_REG_TEMP_LOW(nr)
572 : IT87_REG_TEMP_HIGH(nr),
573 data->temp[nr][index]);
9a61bf63 574 mutex_unlock(&data->update_lock);
1da177e4
LT		 575 return count;
576}
1da177e4 577
60ca385a
GR		 578static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
579static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
580 0, 1);
581static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
582 0, 2);
583static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
584static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
585 1, 1);
586static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
587 1, 2);
588static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
589static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
590 2, 1);
591static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
592 2, 2);
1da177e4 593
20ad93d4
JD		 594static ssize_t show_sensor(struct device *dev, struct device_attribute *attr,
595 char *buf)
1da177e4 596{
20ad93d4
JD		 597 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
598 int nr = sensor_attr->index;
1da177e4 599 struct it87_data *data = it87_update_device(dev);
4a0d71cf 600 u8 reg = data->sensor; /* In case value is updated while used */
5f2dc798 601
1da177e4
LT		 602 if (reg & (1 << nr))
603 return sprintf(buf, "3\n"); /* thermal diode */
604 if (reg & (8 << nr))
4ed10779 605 return sprintf(buf, "4\n"); /* thermistor */
1da177e4
LT		 606 return sprintf(buf, "0\n"); /* disabled */
607}
20ad93d4
JD		 608static ssize_t set_sensor(struct device *dev, struct device_attribute *attr,
609 const char *buf, size_t count)
1da177e4 610{
20ad93d4
JD		 611 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
612 int nr = sensor_attr->index;
613
b74f3fdd 614 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 615 long val;
8acf07c5 616 u8 reg;
f5f64501 617
179c4fdb 618 if (kstrtol(buf, 10, &val) < 0)
f5f64501 619 return -EINVAL;
1da177e4 620
8acf07c5
JD		 621 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
622 reg &= ~(1 << nr);
623 reg &= ~(8 << nr);
4ed10779
JD		 624 if (val == 2) { /* backwards compatibility */
625 dev_warn(dev, "Sensor type 2 is deprecated, please use 4 "
626 "instead\n");
627 val = 4;
628 }
629 /* 3 = thermal diode; 4 = thermistor; 0 = disabled */
1da177e4 630 if (val == 3)
8acf07c5 631 reg |= 1 << nr;
4ed10779 632 else if (val == 4)
8acf07c5
JD		 633 reg |= 8 << nr;
634 else if (val != 0)
1da177e4 635 return -EINVAL;
8acf07c5
JD		 636
637 mutex_lock(&data->update_lock);
638 data->sensor = reg;
b74f3fdd 639 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
2b3d1d87 640 data->valid = 0; /* Force cache refresh */
9a61bf63 641 mutex_unlock(&data->update_lock);
1da177e4
LT		 642 return count;
643}
644#define show_sensor_offset(offset) \
20ad93d4
JD		 645static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
646 show_sensor, set_sensor, offset - 1);
1da177e4
LT		 647
648show_sensor_offset(1);
649show_sensor_offset(2);
650show_sensor_offset(3);
651
652/* 3 Fans */
b99883dc
JD		 653
654static int pwm_mode(const struct it87_data *data, int nr)
655{
656 int ctrl = data->fan_main_ctrl & (1 << nr);
657
658 if (ctrl == 0) /* Full speed */
659 return 0;
660 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
661 return 2;
662 else /* Manual mode */
663 return 1;
664}
665
20ad93d4
JD		 666static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
667 char *buf)
1da177e4 668{
20ad93d4
JD		 669 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
670 int nr = sensor_attr->index;
671
1da177e4 672 struct it87_data *data = it87_update_device(dev);
5f2dc798 673 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
1da177e4
LT		 674 DIV_FROM_REG(data->fan_div[nr])));
675}
20ad93d4
JD		 676static ssize_t show_fan_min(struct device *dev, struct device_attribute *attr,
677 char *buf)
1da177e4 678{
20ad93d4
JD		 679 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
680 int nr = sensor_attr->index;
681
1da177e4 682 struct it87_data *data = it87_update_device(dev);
5f2dc798
JD		 683 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr],
684 DIV_FROM_REG(data->fan_div[nr])));
1da177e4 685}
20ad93d4
JD		 686static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
687 char *buf)
1da177e4 688{
20ad93d4
JD		 689 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
690 int nr = sensor_attr->index;
691
1da177e4
LT		 692 struct it87_data *data = it87_update_device(dev);
693 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
694}
5f2dc798
JD		 695static ssize_t show_pwm_enable(struct device *dev,
696 struct device_attribute *attr, char *buf)
1da177e4 697{
20ad93d4
JD		 698 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
699 int nr = sensor_attr->index;
700
1da177e4 701 struct it87_data *data = it87_update_device(dev);
b99883dc 702 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1da177e4 703}
20ad93d4
JD		 704static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
705 char *buf)
1da177e4 706{
20ad93d4
JD		 707 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
708 int nr = sensor_attr->index;
709
1da177e4 710 struct it87_data *data = it87_update_device(dev);
44c1bcd4
JD		 711 return sprintf(buf, "%d\n",
712 pwm_from_reg(data, data->pwm_duty[nr]));
1da177e4 713}
f8d0c19a
JD		 714static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
715 char *buf)
716{
717 struct it87_data *data = it87_update_device(dev);
718 int index = (data->fan_ctl >> 4) & 0x07;
719
720 return sprintf(buf, "%u\n", pwm_freq[index]);
721}
20ad93d4
JD		 722static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
723 const char *buf, size_t count)
1da177e4 724{
20ad93d4
JD		 725 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
726 int nr = sensor_attr->index;
727
b74f3fdd 728 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 729 long val;
7f999aa7 730 u8 reg;
1da177e4 731
179c4fdb 732 if (kstrtol(buf, 10, &val) < 0)
f5f64501
JD		 733 return -EINVAL;
734
9a61bf63 735 mutex_lock(&data->update_lock);
b74f3fdd 736 reg = it87_read_value(data, IT87_REG_FAN_DIV);
07eab46d 737 switch (nr) {
5f2dc798
JD		 738 case 0:
739 data->fan_div[nr] = reg & 0x07;
740 break;
741 case 1:
742 data->fan_div[nr] = (reg >> 3) & 0x07;
743 break;
744 case 2:
745 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
746 break;
07eab46d
JD		 747 }
748
1da177e4 749 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 750 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
9a61bf63 751 mutex_unlock(&data->update_lock);
1da177e4
LT		 752 return count;
753}
20ad93d4
JD		 754static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
755 const char *buf, size_t count)
1da177e4 756{
20ad93d4
JD		 757 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
758 int nr = sensor_attr->index;
759
b74f3fdd 760 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 761 unsigned long val;
8ab4ec3e 762 int min;
1da177e4
LT		 763 u8 old;
764
179c4fdb 765 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD		 766 return -EINVAL;
767
9a61bf63 768 mutex_lock(&data->update_lock);
b74f3fdd 769 old = it87_read_value(data, IT87_REG_FAN_DIV);
1da177e4 770
8ab4ec3e
JD		 771 /* Save fan min limit */
772 min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
1da177e4
LT		 773
774 switch (nr) {
775 case 0:
776 case 1:
777 data->fan_div[nr] = DIV_TO_REG(val);
778 break;
779 case 2:
780 if (val < 8)
781 data->fan_div[nr] = 1;
782 else
783 data->fan_div[nr] = 3;
784 }
785 val = old & 0x80;
786 val |= (data->fan_div[0] & 0x07);
787 val |= (data->fan_div[1] & 0x07) << 3;
788 if (data->fan_div[2] == 3)
789 val |= 0x1 << 6;
b74f3fdd 790 it87_write_value(data, IT87_REG_FAN_DIV, val);
1da177e4 791
8ab4ec3e
JD		 792 /* Restore fan min limit */
793 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 794 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
8ab4ec3e 795
9a61bf63 796 mutex_unlock(&data->update_lock);
1da177e4
LT		 797 return count;
798}
cccfc9c4
JD		 799
800/* Returns 0 if OK, -EINVAL otherwise */
801static int check_trip_points(struct device *dev, int nr)
802{
803 const struct it87_data *data = dev_get_drvdata(dev);
804 int i, err = 0;
805
806 if (has_old_autopwm(data)) {
807 for (i = 0; i < 3; i++) {
808 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
809 err = -EINVAL;
810 }
811 for (i = 0; i < 2; i++) {
812 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
813 err = -EINVAL;
814 }
815 }
816
817 if (err) {
818 dev_err(dev, "Inconsistent trip points, not switching to "
819 "automatic mode\n");
820 dev_err(dev, "Adjust the trip points and try again\n");
821 }
822 return err;
823}
824
20ad93d4
JD		 825static ssize_t set_pwm_enable(struct device *dev,
826 struct device_attribute *attr, const char *buf, size_t count)
1da177e4 827{
20ad93d4
JD		 828 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
829 int nr = sensor_attr->index;
830
b74f3fdd 831 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 832 long val;
1da177e4 833
179c4fdb 834 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
b99883dc
JD		 835 return -EINVAL;
836
cccfc9c4
JD		 837 /* Check trip points before switching to automatic mode */
838 if (val == 2) {
839 if (check_trip_points(dev, nr) < 0)
840 return -EINVAL;
841 }
842
9a61bf63 843 mutex_lock(&data->update_lock);
1da177e4
LT		 844
845 if (val == 0) {
846 int tmp;
847 /* make sure the fan is on when in on/off mode */
b74f3fdd 848 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
849 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1da177e4
LT		 850 /* set on/off mode */
851 data->fan_main_ctrl &= ~(1 << nr);
5f2dc798
JD		 852 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
853 data->fan_main_ctrl);
b99883dc
JD		 854 } else {
855 if (val == 1) /* Manual mode */
16b5dda2 856 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
6229cdb2
JD		 857 data->pwm_temp_map[nr] :
858 data->pwm_duty[nr];
b99883dc
JD		 859 else /* Automatic mode */
860 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
861 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1da177e4
LT		 862 /* set SmartGuardian mode */
863 data->fan_main_ctrl |= (1 << nr);
5f2dc798
JD		 864 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
865 data->fan_main_ctrl);
1da177e4
LT		 866 }
867
9a61bf63 868 mutex_unlock(&data->update_lock);
1da177e4
LT		 869 return count;
870}
20ad93d4
JD		 871static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
872 const char *buf, size_t count)
1da177e4 873{
20ad93d4
JD		 874 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
875 int nr = sensor_attr->index;
876
b74f3fdd 877 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 878 long val;
1da177e4 879
179c4fdb 880 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1da177e4
LT		 881 return -EINVAL;
882
9a61bf63 883 mutex_lock(&data->update_lock);
16b5dda2 884 if (has_newer_autopwm(data)) {
4a0d71cf
GR		 885 /*
886 * If we are in automatic mode, the PWM duty cycle register
887 * is read-only so we can't write the value.
888 */
6229cdb2
JD		 889 if (data->pwm_ctrl[nr] & 0x80) {
890 mutex_unlock(&data->update_lock);
891 return -EBUSY;
892 }
893 data->pwm_duty[nr] = pwm_to_reg(data, val);
894 it87_write_value(data, IT87_REG_PWM_DUTY(nr),
895 data->pwm_duty[nr]);
896 } else {
897 data->pwm_duty[nr] = pwm_to_reg(data, val);
4a0d71cf
GR		 898 /*
899 * If we are in manual mode, write the duty cycle immediately;
900 * otherwise, just store it for later use.
901 */
6229cdb2
JD		 902 if (!(data->pwm_ctrl[nr] & 0x80)) {
903 data->pwm_ctrl[nr] = data->pwm_duty[nr];
904 it87_write_value(data, IT87_REG_PWM(nr),
905 data->pwm_ctrl[nr]);
906 }
b99883dc 907 }
9a61bf63 908 mutex_unlock(&data->update_lock);
1da177e4
LT		 909 return count;
910}
f8d0c19a
JD		 911static ssize_t set_pwm_freq(struct device *dev,
912 struct device_attribute *attr, const char *buf, size_t count)
913{
b74f3fdd 914 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 915 unsigned long val;
f8d0c19a
JD		 916 int i;
917
179c4fdb 918 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD		 919 return -EINVAL;
920
f8d0c19a
JD		 921 /* Search for the nearest available frequency */
922 for (i = 0; i < 7; i++) {
923 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
924 break;
925 }
926
927 mutex_lock(&data->update_lock);
b74f3fdd 928 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
f8d0c19a 929 data->fan_ctl |= i << 4;
b74f3fdd 930 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
f8d0c19a
JD		 931 mutex_unlock(&data->update_lock);
932
933 return count;
934}
94ac7ee6
JD		 935static ssize_t show_pwm_temp_map(struct device *dev,
936 struct device_attribute *attr, char *buf)
937{
938 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
939 int nr = sensor_attr->index;
940
941 struct it87_data *data = it87_update_device(dev);
942 int map;
943
944 if (data->pwm_temp_map[nr] < 3)
945 map = 1 << data->pwm_temp_map[nr];
946 else
947 map = 0; /* Should never happen */
948 return sprintf(buf, "%d\n", map);
949}
950static ssize_t set_pwm_temp_map(struct device *dev,
951 struct device_attribute *attr, const char *buf, size_t count)
952{
953 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
954 int nr = sensor_attr->index;
955
956 struct it87_data *data = dev_get_drvdata(dev);
957 long val;
958 u8 reg;
959
4a0d71cf
GR		 960 /*
961 * This check can go away if we ever support automatic fan speed
962 * control on newer chips.
963 */
4f3f51bc
JD		 964 if (!has_old_autopwm(data)) {
965 dev_notice(dev, "Mapping change disabled for safety reasons\n");
966 return -EINVAL;
967 }
968
179c4fdb 969 if (kstrtol(buf, 10, &val) < 0)
94ac7ee6
JD		 970 return -EINVAL;
971
972 switch (val) {
973 case (1 << 0):
974 reg = 0x00;
975 break;
976 case (1 << 1):
977 reg = 0x01;
978 break;
979 case (1 << 2):
980 reg = 0x02;
981 break;
982 default:
983 return -EINVAL;
984 }
985
986 mutex_lock(&data->update_lock);
987 data->pwm_temp_map[nr] = reg;
4a0d71cf
GR		 988 /*
989 * If we are in automatic mode, write the temp mapping immediately;
990 * otherwise, just store it for later use.
991 */
94ac7ee6
JD		 992 if (data->pwm_ctrl[nr] & 0x80) {
993 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
994 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
995 }
996 mutex_unlock(&data->update_lock);
997 return count;
998}
1da177e4 999
4f3f51bc
JD		 1000static ssize_t show_auto_pwm(struct device *dev,
1001 struct device_attribute *attr, char *buf)
1002{
1003 struct it87_data *data = it87_update_device(dev);
1004 struct sensor_device_attribute_2 *sensor_attr =
1005 to_sensor_dev_attr_2(attr);
1006 int nr = sensor_attr->nr;
1007 int point = sensor_attr->index;
1008
44c1bcd4
JD		 1009 return sprintf(buf, "%d\n",
1010 pwm_from_reg(data, data->auto_pwm[nr][point]));
4f3f51bc
JD		 1011}
1012
1013static ssize_t set_auto_pwm(struct device *dev,
1014 struct device_attribute *attr, const char *buf, size_t count)
1015{
1016 struct it87_data *data = dev_get_drvdata(dev);
1017 struct sensor_device_attribute_2 *sensor_attr =
1018 to_sensor_dev_attr_2(attr);
1019 int nr = sensor_attr->nr;
1020 int point = sensor_attr->index;
1021 long val;
1022
179c4fdb 1023 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
4f3f51bc
JD		 1024 return -EINVAL;
1025
1026 mutex_lock(&data->update_lock);
44c1bcd4 1027 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
4f3f51bc
JD		 1028 it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1029 data->auto_pwm[nr][point]);
1030 mutex_unlock(&data->update_lock);
1031 return count;
1032}
1033
1034static ssize_t show_auto_temp(struct device *dev,
1035 struct device_attribute *attr, char *buf)
1036{
1037 struct it87_data *data = it87_update_device(dev);
1038 struct sensor_device_attribute_2 *sensor_attr =
1039 to_sensor_dev_attr_2(attr);
1040 int nr = sensor_attr->nr;
1041 int point = sensor_attr->index;
1042
1043 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1044}
1045
1046static ssize_t set_auto_temp(struct device *dev,
1047 struct device_attribute *attr, const char *buf, size_t count)
1048{
1049 struct it87_data *data = dev_get_drvdata(dev);
1050 struct sensor_device_attribute_2 *sensor_attr =
1051 to_sensor_dev_attr_2(attr);
1052 int nr = sensor_attr->nr;
1053 int point = sensor_attr->index;
1054 long val;
1055
179c4fdb 1056 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
4f3f51bc
JD		 1057 return -EINVAL;
1058
1059 mutex_lock(&data->update_lock);
1060 data->auto_temp[nr][point] = TEMP_TO_REG(val);
1061 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1062 data->auto_temp[nr][point]);
1063 mutex_unlock(&data->update_lock);
1064 return count;
1065}
1066
20ad93d4
JD		 1067#define show_fan_offset(offset) \
1068static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
1069 show_fan, NULL, offset - 1); \
1070static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
1071 show_fan_min, set_fan_min, offset - 1); \
1072static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
1073 show_fan_div, set_fan_div, offset - 1);
1da177e4
LT		 1074
1075show_fan_offset(1);
1076show_fan_offset(2);
1077show_fan_offset(3);
1078
1079#define show_pwm_offset(offset) \
20ad93d4
JD		 1080static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
1081 show_pwm_enable, set_pwm_enable, offset - 1); \
1082static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
f8d0c19a
JD		 1083 show_pwm, set_pwm, offset - 1); \
1084static DEVICE_ATTR(pwm##offset##_freq, \
1085 (offset == 1 ? S_IRUGO | S_IWUSR : S_IRUGO), \
94ac7ee6
JD		 1086 show_pwm_freq, (offset == 1 ? set_pwm_freq : NULL)); \
1087static SENSOR_DEVICE_ATTR(pwm##offset##_auto_channels_temp, \
4f3f51bc
JD		 1088 S_IRUGO | S_IWUSR, show_pwm_temp_map, set_pwm_temp_map, \
1089 offset - 1); \
1090static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_pwm, \
1091 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1092 offset - 1, 0); \
1093static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_pwm, \
1094 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1095 offset - 1, 1); \
1096static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_pwm, \
1097 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1098 offset - 1, 2); \
1099static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_pwm, \
1100 S_IRUGO, show_auto_pwm, NULL, offset - 1, 3); \
1101static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp, \
1102 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1103 offset - 1, 1); \
1104static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp_hyst, \
1105 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1106 offset - 1, 0); \
1107static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_temp, \
1108 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1109 offset - 1, 2); \
1110static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_temp, \
1111 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1112 offset - 1, 3); \
1113static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_temp, \
1114 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1115 offset - 1, 4);
1da177e4
LT		 1116
1117show_pwm_offset(1);
1118show_pwm_offset(2);
1119show_pwm_offset(3);
1120
17d648bf
JD		 1121/* A different set of callbacks for 16-bit fans */
1122static ssize_t show_fan16(struct device *dev, struct device_attribute *attr,
1123 char *buf)
1124{
1125 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1126 int nr = sensor_attr->index;
1127 struct it87_data *data = it87_update_device(dev);
1128 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan[nr]));
1129}
1130
1131static ssize_t show_fan16_min(struct device *dev, struct device_attribute *attr,
1132 char *buf)
1133{
1134 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1135 int nr = sensor_attr->index;
1136 struct it87_data *data = it87_update_device(dev);
1137 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan_min[nr]));
1138}
1139
1140static ssize_t set_fan16_min(struct device *dev, struct device_attribute *attr,
1141 const char *buf, size_t count)
1142{
1143 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1144 int nr = sensor_attr->index;
b74f3fdd 1145 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 1146 long val;
1147
179c4fdb 1148 if (kstrtol(buf, 10, &val) < 0)
f5f64501 1149 return -EINVAL;
17d648bf
JD		 1150
1151 mutex_lock(&data->update_lock);
1152 data->fan_min[nr] = FAN16_TO_REG(val);
c7f1f716 1153 it87_write_value(data, IT87_REG_FAN_MIN[nr],
17d648bf 1154 data->fan_min[nr] & 0xff);
c7f1f716 1155 it87_write_value(data, IT87_REG_FANX_MIN[nr],
17d648bf
JD		 1156 data->fan_min[nr] >> 8);
1157 mutex_unlock(&data->update_lock);
1158 return count;
1159}
1160
4a0d71cf
GR		 1161/*
1162 * We want to use the same sysfs file names as 8-bit fans, but we need
1163 * different variable names, so we have to use SENSOR_ATTR instead of
1164 * SENSOR_DEVICE_ATTR.
1165 */
17d648bf
JD		 1166#define show_fan16_offset(offset) \
1167static struct sensor_device_attribute sensor_dev_attr_fan##offset##_input16 \
1168 = SENSOR_ATTR(fan##offset##_input, S_IRUGO, \
1169 show_fan16, NULL, offset - 1); \
1170static struct sensor_device_attribute sensor_dev_attr_fan##offset##_min16 \
1171 = SENSOR_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
1172 show_fan16_min, set_fan16_min, offset - 1)
1173
1174show_fan16_offset(1);
1175show_fan16_offset(2);
1176show_fan16_offset(3);
c7f1f716
JD		 1177show_fan16_offset(4);
1178show_fan16_offset(5);
17d648bf 1179
1da177e4 1180/* Alarms */
5f2dc798
JD		 1181static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1182 char *buf)
1da177e4
LT		 1183{
1184 struct it87_data *data = it87_update_device(dev);
68188ba7 1185 return sprintf(buf, "%u\n", data->alarms);
1da177e4 1186}
1d66c64c 1187static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1da177e4 1188
0124dd78
JD		 1189static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1190 char *buf)
1191{
1192 int bitnr = to_sensor_dev_attr(attr)->index;
1193 struct it87_data *data = it87_update_device(dev);
1194 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1195}
3d30f9e6
JD		 1196
1197static ssize_t clear_intrusion(struct device *dev, struct device_attribute
1198 *attr, const char *buf, size_t count)
1199{
1200 struct it87_data *data = dev_get_drvdata(dev);
1201 long val;
1202 int config;
1203
179c4fdb 1204 if (kstrtol(buf, 10, &val) < 0 || val != 0)
3d30f9e6
JD		 1205 return -EINVAL;
1206
1207 mutex_lock(&data->update_lock);
1208 config = it87_read_value(data, IT87_REG_CONFIG);
1209 if (config < 0) {
1210 count = config;
1211 } else {
1212 config |= 1 << 5;
1213 it87_write_value(data, IT87_REG_CONFIG, config);
1214 /* Invalidate cache to force re-read */
1215 data->valid = 0;
1216 }
1217 mutex_unlock(&data->update_lock);
1218
1219 return count;
1220}
1221
0124dd78
JD		 1222static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1223static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1224static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1225static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1226static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1227static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1228static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1229static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1230static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1231static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1232static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1233static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1234static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1235static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1236static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1237static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
3d30f9e6
JD		 1238static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1239 show_alarm, clear_intrusion, 4);
0124dd78 1240
d9b327c3
JD		 1241static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1242 char *buf)
1243{
1244 int bitnr = to_sensor_dev_attr(attr)->index;
1245 struct it87_data *data = it87_update_device(dev);
1246 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1247}
1248static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1249 const char *buf, size_t count)
1250{
1251 int bitnr = to_sensor_dev_attr(attr)->index;
1252 struct it87_data *data = dev_get_drvdata(dev);
1253 long val;
1254
179c4fdb 1255 if (kstrtol(buf, 10, &val) < 0
d9b327c3
JD		 1256 || (val != 0 && val != 1))
1257 return -EINVAL;
1258
1259 mutex_lock(&data->update_lock);
1260 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1261 if (val)
1262 data->beeps |= (1 << bitnr);
1263 else
1264 data->beeps &= ~(1 << bitnr);
1265 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1266 mutex_unlock(&data->update_lock);
1267 return count;
1268}
1269
1270static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1271 show_beep, set_beep, 1);
1272static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1273static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1274static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1275static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1276static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1277static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1278static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1279/* fanX_beep writability is set later */
1280static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1281static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1282static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1283static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1284static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1285static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1286 show_beep, set_beep, 2);
1287static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1288static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1289
5f2dc798
JD		 1290static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1291 char *buf)
1da177e4 1292{
90d6619a 1293 struct it87_data *data = dev_get_drvdata(dev);
a7be58a1 1294 return sprintf(buf, "%u\n", data->vrm);
1da177e4 1295}
5f2dc798
JD		 1296static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1297 const char *buf, size_t count)
1da177e4 1298{
b74f3fdd 1299 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 1300 unsigned long val;
1301
179c4fdb 1302 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 1303 return -EINVAL;
1da177e4 1304
1da177e4
LT		 1305 data->vrm = val;
1306
1307 return count;
1308}
1309static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4 1310
5f2dc798
JD		 1311static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1312 char *buf)
1da177e4
LT		 1313{
1314 struct it87_data *data = it87_update_device(dev);
1315 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1316}
1317static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
87808be4 1318
738e5e05
JD		 1319static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1320 char *buf)
1321{
3c4c4971 1322 static const char * const labels[] = {
738e5e05
JD		 1323 "+5V",
1324 "5VSB",
1325 "Vbat",
1326 };
3c4c4971 1327 static const char * const labels_it8721[] = {
44c1bcd4
JD		 1328 "+3.3V",
1329 "3VSB",
1330 "Vbat",
1331 };
1332 struct it87_data *data = dev_get_drvdata(dev);
738e5e05
JD		 1333 int nr = to_sensor_dev_attr(attr)->index;
1334
16b5dda2
JD		 1335 return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr]
1336 : labels[nr]);
738e5e05
JD		 1337}
1338static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1339static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1340static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1341
b74f3fdd 1342static ssize_t show_name(struct device *dev, struct device_attribute
1343 *devattr, char *buf)
1344{
1345 struct it87_data *data = dev_get_drvdata(dev);
1346 return sprintf(buf, "%s\n", data->name);
1347}
1348static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1349
9172b5d1
GR		 1350static struct attribute *it87_attributes_in[9][5] = {
1351{
87808be4 1352 &sensor_dev_attr_in0_input.dev_attr.attr,
87808be4 1353 &sensor_dev_attr_in0_min.dev_attr.attr,
87808be4 1354 &sensor_dev_attr_in0_max.dev_attr.attr,
0124dd78 1355 &sensor_dev_attr_in0_alarm.dev_attr.attr,
9172b5d1
GR		 1356 NULL
1357}, {
1358 &sensor_dev_attr_in1_input.dev_attr.attr,
1359 &sensor_dev_attr_in1_min.dev_attr.attr,
1360 &sensor_dev_attr_in1_max.dev_attr.attr,
0124dd78 1361 &sensor_dev_attr_in1_alarm.dev_attr.attr,
9172b5d1
GR		 1362 NULL
1363}, {
1364 &sensor_dev_attr_in2_input.dev_attr.attr,
1365 &sensor_dev_attr_in2_min.dev_attr.attr,
1366 &sensor_dev_attr_in2_max.dev_attr.attr,
0124dd78 1367 &sensor_dev_attr_in2_alarm.dev_attr.attr,
9172b5d1
GR		 1368 NULL
1369}, {
1370 &sensor_dev_attr_in3_input.dev_attr.attr,
1371 &sensor_dev_attr_in3_min.dev_attr.attr,
1372 &sensor_dev_attr_in3_max.dev_attr.attr,
0124dd78 1373 &sensor_dev_attr_in3_alarm.dev_attr.attr,
9172b5d1
GR		 1374 NULL
1375}, {
1376 &sensor_dev_attr_in4_input.dev_attr.attr,
1377 &sensor_dev_attr_in4_min.dev_attr.attr,
1378 &sensor_dev_attr_in4_max.dev_attr.attr,
0124dd78 1379 &sensor_dev_attr_in4_alarm.dev_attr.attr,
9172b5d1
GR		 1380 NULL
1381}, {
1382 &sensor_dev_attr_in5_input.dev_attr.attr,
1383 &sensor_dev_attr_in5_min.dev_attr.attr,
1384 &sensor_dev_attr_in5_max.dev_attr.attr,
0124dd78 1385 &sensor_dev_attr_in5_alarm.dev_attr.attr,
9172b5d1
GR		 1386 NULL
1387}, {
1388 &sensor_dev_attr_in6_input.dev_attr.attr,
1389 &sensor_dev_attr_in6_min.dev_attr.attr,
1390 &sensor_dev_attr_in6_max.dev_attr.attr,
0124dd78 1391 &sensor_dev_attr_in6_alarm.dev_attr.attr,
9172b5d1
GR		 1392 NULL
1393}, {
1394 &sensor_dev_attr_in7_input.dev_attr.attr,
1395 &sensor_dev_attr_in7_min.dev_attr.attr,
1396 &sensor_dev_attr_in7_max.dev_attr.attr,
0124dd78 1397 &sensor_dev_attr_in7_alarm.dev_attr.attr,
9172b5d1
GR		 1398 NULL
1399}, {
1400 &sensor_dev_attr_in8_input.dev_attr.attr,
1401 NULL
1402} };
87808be4 1403
9172b5d1
GR		 1404static const struct attribute_group it87_group_in[9] = {
1405 { .attrs = it87_attributes_in[0] },
1406 { .attrs = it87_attributes_in[1] },
1407 { .attrs = it87_attributes_in[2] },
1408 { .attrs = it87_attributes_in[3] },
1409 { .attrs = it87_attributes_in[4] },
1410 { .attrs = it87_attributes_in[5] },
1411 { .attrs = it87_attributes_in[6] },
1412 { .attrs = it87_attributes_in[7] },
1413 { .attrs = it87_attributes_in[8] },
1414};
1415
4573acbc
GR		 1416static struct attribute *it87_attributes_temp[3][6] = {
1417{
87808be4 1418 &sensor_dev_attr_temp1_input.dev_attr.attr,
87808be4 1419 &sensor_dev_attr_temp1_max.dev_attr.attr,
87808be4 1420 &sensor_dev_attr_temp1_min.dev_attr.attr,
87808be4 1421 &sensor_dev_attr_temp1_type.dev_attr.attr,
0124dd78 1422 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
4573acbc
GR		 1423 NULL
1424} , {
1425 &sensor_dev_attr_temp2_input.dev_attr.attr,
1426 &sensor_dev_attr_temp2_max.dev_attr.attr,
1427 &sensor_dev_attr_temp2_min.dev_attr.attr,
1428 &sensor_dev_attr_temp2_type.dev_attr.attr,
0124dd78 1429 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
4573acbc
GR		 1430 NULL
1431} , {
1432 &sensor_dev_attr_temp3_input.dev_attr.attr,
1433 &sensor_dev_attr_temp3_max.dev_attr.attr,
1434 &sensor_dev_attr_temp3_min.dev_attr.attr,
1435 &sensor_dev_attr_temp3_type.dev_attr.attr,
0124dd78 1436 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
4573acbc
GR		 1437 NULL
1438} };
1439
1440static const struct attribute_group it87_group_temp[3] = {
1441 { .attrs = it87_attributes_temp[0] },
1442 { .attrs = it87_attributes_temp[1] },
1443 { .attrs = it87_attributes_temp[2] },
1444};
87808be4 1445
4573acbc 1446static struct attribute *it87_attributes[] = {
87808be4 1447 &dev_attr_alarms.attr,
3d30f9e6 1448 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
b74f3fdd 1449 &dev_attr_name.attr,
87808be4
JD		 1450 NULL
1451};
1452
1453static const struct attribute_group it87_group = {
1454 .attrs = it87_attributes,
1455};
1456
9172b5d1 1457static struct attribute *it87_attributes_in_beep[] = {
d9b327c3
JD		 1458 &sensor_dev_attr_in0_beep.dev_attr.attr,
1459 &sensor_dev_attr_in1_beep.dev_attr.attr,
1460 &sensor_dev_attr_in2_beep.dev_attr.attr,
1461 &sensor_dev_attr_in3_beep.dev_attr.attr,
1462 &sensor_dev_attr_in4_beep.dev_attr.attr,
1463 &sensor_dev_attr_in5_beep.dev_attr.attr,
1464 &sensor_dev_attr_in6_beep.dev_attr.attr,
1465 &sensor_dev_attr_in7_beep.dev_attr.attr,
9172b5d1
GR		 1466 NULL
1467};
d9b327c3 1468
4573acbc 1469static struct attribute *it87_attributes_temp_beep[] = {
d9b327c3
JD		 1470 &sensor_dev_attr_temp1_beep.dev_attr.attr,
1471 &sensor_dev_attr_temp2_beep.dev_attr.attr,
1472 &sensor_dev_attr_temp3_beep.dev_attr.attr,
d9b327c3
JD		 1473};
1474
723a0aa0 1475static struct attribute *it87_attributes_fan16[5][3+1] = { {
87808be4
JD		 1476 &sensor_dev_attr_fan1_input16.dev_attr.attr,
1477 &sensor_dev_attr_fan1_min16.dev_attr.attr,
723a0aa0
JD		 1478 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1479 NULL
1480}, {
87808be4
JD		 1481 &sensor_dev_attr_fan2_input16.dev_attr.attr,
1482 &sensor_dev_attr_fan2_min16.dev_attr.attr,
723a0aa0
JD		 1483 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1484 NULL
1485}, {
87808be4
JD		 1486 &sensor_dev_attr_fan3_input16.dev_attr.attr,
1487 &sensor_dev_attr_fan3_min16.dev_attr.attr,
723a0aa0
JD		 1488 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1489 NULL
1490}, {
c7f1f716
JD		 1491 &sensor_dev_attr_fan4_input16.dev_attr.attr,
1492 &sensor_dev_attr_fan4_min16.dev_attr.attr,
723a0aa0
JD		 1493 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1494 NULL
1495}, {
c7f1f716
JD		 1496 &sensor_dev_attr_fan5_input16.dev_attr.attr,
1497 &sensor_dev_attr_fan5_min16.dev_attr.attr,
723a0aa0
JD		 1498 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1499 NULL
1500} };
1501
1502static const struct attribute_group it87_group_fan16[5] = {
1503 { .attrs = it87_attributes_fan16[0] },
1504 { .attrs = it87_attributes_fan16[1] },
1505 { .attrs = it87_attributes_fan16[2] },
1506 { .attrs = it87_attributes_fan16[3] },
1507 { .attrs = it87_attributes_fan16[4] },
1508};
87808be4 1509
723a0aa0 1510static struct attribute *it87_attributes_fan[3][4+1] = { {
87808be4
JD		 1511 &sensor_dev_attr_fan1_input.dev_attr.attr,
1512 &sensor_dev_attr_fan1_min.dev_attr.attr,
1513 &sensor_dev_attr_fan1_div.dev_attr.attr,
723a0aa0
JD		 1514 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1515 NULL
1516}, {
87808be4
JD		 1517 &sensor_dev_attr_fan2_input.dev_attr.attr,
1518 &sensor_dev_attr_fan2_min.dev_attr.attr,
1519 &sensor_dev_attr_fan2_div.dev_attr.attr,
723a0aa0
JD		 1520 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1521 NULL
1522}, {
87808be4
JD		 1523 &sensor_dev_attr_fan3_input.dev_attr.attr,
1524 &sensor_dev_attr_fan3_min.dev_attr.attr,
1525 &sensor_dev_attr_fan3_div.dev_attr.attr,
0124dd78 1526 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
723a0aa0
JD		 1527 NULL
1528} };
1529
1530static const struct attribute_group it87_group_fan[3] = {
1531 { .attrs = it87_attributes_fan[0] },
1532 { .attrs = it87_attributes_fan[1] },
1533 { .attrs = it87_attributes_fan[2] },
1534};
1535
1536static const struct attribute_group *
1537it87_get_fan_group(const struct it87_data *data)
1538{
1539 return has_16bit_fans(data) ? it87_group_fan16 : it87_group_fan;
1540}
0124dd78 1541
723a0aa0 1542static struct attribute *it87_attributes_pwm[3][4+1] = { {
87808be4 1543 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
87808be4 1544 &sensor_dev_attr_pwm1.dev_attr.attr,
d5b0b5d6 1545 &dev_attr_pwm1_freq.attr,
94ac7ee6 1546 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1547 NULL
1548}, {
1549 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1550 &sensor_dev_attr_pwm2.dev_attr.attr,
1551 &dev_attr_pwm2_freq.attr,
94ac7ee6 1552 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1553 NULL
1554}, {
1555 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1556 &sensor_dev_attr_pwm3.dev_attr.attr,
1557 &dev_attr_pwm3_freq.attr,
94ac7ee6 1558 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1559 NULL
1560} };
87808be4 1561
723a0aa0
JD		 1562static const struct attribute_group it87_group_pwm[3] = {
1563 { .attrs = it87_attributes_pwm[0] },
1564 { .attrs = it87_attributes_pwm[1] },
1565 { .attrs = it87_attributes_pwm[2] },
1566};
1567
4f3f51bc
JD		 1568static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1569 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1570 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1571 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1572 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1573 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1574 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1575 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1576 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1577 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1578 NULL
1579}, {
1580 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1581 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1582 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1583 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1584 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1585 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1586 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1587 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1588 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1589 NULL
1590}, {
1591 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1592 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1593 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1594 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1595 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1596 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
1597 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1598 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1599 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
1600 NULL
1601} };
1602
1603static const struct attribute_group it87_group_autopwm[3] = {
1604 { .attrs = it87_attributes_autopwm[0] },
1605 { .attrs = it87_attributes_autopwm[1] },
1606 { .attrs = it87_attributes_autopwm[2] },
1607};
1608
d9b327c3
JD		 1609static struct attribute *it87_attributes_fan_beep[] = {
1610 &sensor_dev_attr_fan1_beep.dev_attr.attr,
1611 &sensor_dev_attr_fan2_beep.dev_attr.attr,
1612 &sensor_dev_attr_fan3_beep.dev_attr.attr,
1613 &sensor_dev_attr_fan4_beep.dev_attr.attr,
1614 &sensor_dev_attr_fan5_beep.dev_attr.attr,
1615};
1616
6a8d7acf 1617static struct attribute *it87_attributes_vid[] = {
87808be4
JD		 1618 &dev_attr_vrm.attr,
1619 &dev_attr_cpu0_vid.attr,
1620 NULL
1621};
1622
6a8d7acf
JD		 1623static const struct attribute_group it87_group_vid = {
1624 .attrs = it87_attributes_vid,
87808be4 1625};
1da177e4 1626
738e5e05
JD		 1627static struct attribute *it87_attributes_label[] = {
1628 &sensor_dev_attr_in3_label.dev_attr.attr,
1629 &sensor_dev_attr_in7_label.dev_attr.attr,
1630 &sensor_dev_attr_in8_label.dev_attr.attr,
1631 NULL
1632};
1633
1634static const struct attribute_group it87_group_label = {
fa8b6975 1635 .attrs = it87_attributes_label,
738e5e05
JD		 1636};
1637
2d8672c5 1638/* SuperIO detection - will change isa_address if a chip is found */
b74f3fdd 1639static int __init it87_find(unsigned short *address,
1640 struct it87_sio_data *sio_data)
1da177e4 1641{
5b0380c9 1642 int err;
b74f3fdd 1643 u16 chip_type;
98dd22c3 1644 const char *board_vendor, *board_name;
1da177e4 1645
5b0380c9
NG		 1646 err = superio_enter();
1647 if (err)
1648 return err;
1649
1650 err = -ENODEV;
67b671bc 1651 chip_type = force_id ? force_id : superio_inw(DEVID);
b74f3fdd 1652
1653 switch (chip_type) {
1654 case IT8705F_DEVID:
1655 sio_data->type = it87;
1656 break;
1657 case IT8712F_DEVID:
1658 sio_data->type = it8712;
1659 break;
1660 case IT8716F_DEVID:
1661 case IT8726F_DEVID:
1662 sio_data->type = it8716;
1663 break;
1664 case IT8718F_DEVID:
1665 sio_data->type = it8718;
1666 break;
b4da93e4
JMS		 1667 case IT8720F_DEVID:
1668 sio_data->type = it8720;
1669 break;
44c1bcd4
JD		 1670 case IT8721F_DEVID:
1671 sio_data->type = it8721;
1672 break;
16b5dda2
JD		 1673 case IT8728F_DEVID:
1674 sio_data->type = it8728;
1675 break;
0531d98b
GR		 1676 case IT8782F_DEVID:
1677 sio_data->type = it8782;
1678 break;
1679 case IT8783E_DEVID:
1680 sio_data->type = it8783;
1681 break;
b74f3fdd 1682 case 0xffff: /* No device at all */
1683 goto exit;
1684 default:
a8ca1037 1685 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
b74f3fdd 1686 goto exit;
1687 }
1da177e4 1688
87673dd7 1689 superio_select(PME);
1da177e4 1690 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
a8ca1037 1691 pr_info("Device not activated, skipping\n");
1da177e4
LT		 1692 goto exit;
1693 }
1694
1695 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1696 if (*address == 0) {
a8ca1037 1697 pr_info("Base address not set, skipping\n");
1da177e4
LT		 1698 goto exit;
1699 }
1700
1701 err = 0;
0475169c 1702 sio_data->revision = superio_inb(DEVREV) & 0x0f;
a8ca1037 1703 pr_info("Found IT%04xF chip at 0x%x, revision %d\n",
0475169c 1704 chip_type, *address, sio_data->revision);
1da177e4 1705
738e5e05
JD		 1706 /* in8 (Vbat) is always internal */
1707 sio_data->internal = (1 << 2);
1708
87673dd7 1709 /* Read GPIO config and VID value from LDN 7 (GPIO) */
895ff267
JD		 1710 if (sio_data->type == it87) {
1711 /* The IT8705F doesn't have VID pins at all */
1712 sio_data->skip_vid = 1;
d9b327c3
JD		 1713
1714 /* The IT8705F has a different LD number for GPIO */
1715 superio_select(5);
1716 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
0531d98b
GR		 1717 } else if (sio_data->type == it8783) {
1718 int reg25, reg27, reg2A, reg2C, regEF;
0531d98b
GR		 1719
1720 sio_data->skip_vid = 1; /* No VID */
1721
1722 superio_select(GPIO);
1723
1724 reg25 = superio_inb(IT87_SIO_GPIO1_REG);
1725 reg27 = superio_inb(IT87_SIO_GPIO3_REG);
1726 reg2A = superio_inb(IT87_SIO_PINX1_REG);
1727 reg2C = superio_inb(IT87_SIO_PINX2_REG);
1728 regEF = superio_inb(IT87_SIO_SPI_REG);
1729
0531d98b 1730 /* Check if fan3 is there or not */
9172b5d1 1731 if ((reg27 & (1 << 0)) || !(reg2C & (1 << 2)))
0531d98b
GR		 1732 sio_data->skip_fan |= (1 << 2);
1733 if ((reg25 & (1 << 4))
1734 || (!(reg2A & (1 << 1)) && (regEF & (1 << 0))))
1735 sio_data->skip_pwm |= (1 << 2);
1736
1737 /* Check if fan2 is there or not */
1738 if (reg27 & (1 << 7))
1739 sio_data->skip_fan |= (1 << 1);
1740 if (reg27 & (1 << 3))
1741 sio_data->skip_pwm |= (1 << 1);
1742
1743 /* VIN5 */
9172b5d1
GR		 1744 if ((reg27 & (1 << 0)) || (reg2C & (1 << 2)))
1745 sio_data->skip_in |= (1 << 5); /* No VIN5 */
0531d98b
GR		 1746
1747 /* VIN6 */
9172b5d1
GR		 1748 if (reg27 & (1 << 1))
1749 sio_data->skip_in |= (1 << 6); /* No VIN6 */
0531d98b
GR		 1750
1751 /*
1752 * VIN7
1753 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
1754 */
9172b5d1
GR		 1755 if (reg27 & (1 << 2)) {
1756 /*
1757 * The data sheet is a bit unclear regarding the
1758 * internal voltage divider for VCCH5V. It says
1759 * "This bit enables and switches VIN7 (pin 91) to the
1760 * internal voltage divider for VCCH5V".
1761 * This is different to other chips, where the internal
1762 * voltage divider would connect VIN7 to an internal
1763 * voltage source. Maybe that is the case here as well.
1764 *
1765 * Since we don't know for sure, re-route it if that is
1766 * not the case, and ask the user to report if the
1767 * resulting voltage is sane.
1768 */
1769 if (!(reg2C & (1 << 1))) {
1770 reg2C |= (1 << 1);
1771 superio_outb(IT87_SIO_PINX2_REG, reg2C);
1772 pr_notice("Routing internal VCCH5V to in7.\n");
1773 }
1774 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
1775 pr_notice("Please report if it displays a reasonable voltage.\n");
1776 }
0531d98b
GR		 1777
1778 if (reg2C & (1 << 0))
1779 sio_data->internal |= (1 << 0);
1780 if (reg2C & (1 << 1))
1781 sio_data->internal |= (1 << 1);
1782
1783 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
1784
895ff267 1785 } else {
87673dd7 1786 int reg;
9172b5d1 1787 bool uart6;
87673dd7
JD		 1788
1789 superio_select(GPIO);
44c1bcd4 1790
895ff267 1791 reg = superio_inb(IT87_SIO_GPIO3_REG);
0531d98b
GR		 1792 if (sio_data->type == it8721 || sio_data->type == it8728 ||
1793 sio_data->type == it8782) {
16b5dda2 1794 /*
0531d98b
GR		 1795 * IT8721F/IT8758E, and IT8782F don't have VID pins
1796 * at all, not sure about the IT8728F.
16b5dda2 1797 */
895ff267 1798 sio_data->skip_vid = 1;
44c1bcd4
JD		 1799 } else {
1800 /* We need at least 4 VID pins */
1801 if (reg & 0x0f) {
a8ca1037 1802 pr_info("VID is disabled (pins used for GPIO)\n");
44c1bcd4
JD		 1803 sio_data->skip_vid = 1;
1804 }
895ff267
JD		 1805 }
1806
591ec650
JD		 1807 /* Check if fan3 is there or not */
1808 if (reg & (1 << 6))
1809 sio_data->skip_pwm |= (1 << 2);
1810 if (reg & (1 << 7))
1811 sio_data->skip_fan |= (1 << 2);
1812
1813 /* Check if fan2 is there or not */
1814 reg = superio_inb(IT87_SIO_GPIO5_REG);
1815 if (reg & (1 << 1))
1816 sio_data->skip_pwm |= (1 << 1);
1817 if (reg & (1 << 2))
1818 sio_data->skip_fan |= (1 << 1);
1819
895ff267
JD		 1820 if ((sio_data->type == it8718 || sio_data->type == it8720)
1821 && !(sio_data->skip_vid))
b74f3fdd 1822 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
87673dd7
JD		 1823
1824 reg = superio_inb(IT87_SIO_PINX2_REG);
9172b5d1
GR		 1825
1826 uart6 = sio_data->type == it8782 && (reg & (1 << 2));
1827
436cad2a
JD		 1828 /*
1829 * The IT8720F has no VIN7 pin, so VCCH should always be
1830 * routed internally to VIN7 with an internal divider.
1831 * Curiously, there still is a configuration bit to control
1832 * this, which means it can be set incorrectly. And even
1833 * more curiously, many boards out there are improperly
1834 * configured, even though the IT8720F datasheet claims
1835 * that the internal routing of VCCH to VIN7 is the default
1836 * setting. So we force the internal routing in this case.
0531d98b
GR		 1837 *
1838 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
9172b5d1
GR		 1839 * If UART6 is enabled, re-route VIN7 to the internal divider
1840 * if that is not already the case.
436cad2a 1841 */
9172b5d1 1842 if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) {
436cad2a
JD		 1843 reg |= (1 << 1);
1844 superio_outb(IT87_SIO_PINX2_REG, reg);
a8ca1037 1845 pr_notice("Routing internal VCCH to in7\n");
436cad2a 1846 }
87673dd7 1847 if (reg & (1 << 0))
738e5e05 1848 sio_data->internal |= (1 << 0);
16b5dda2
JD		 1849 if ((reg & (1 << 1)) || sio_data->type == it8721 ||
1850 sio_data->type == it8728)
738e5e05 1851 sio_data->internal |= (1 << 1);
d9b327c3 1852
9172b5d1
GR		 1853 /*
1854 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
1855 * While VIN7 can be routed to the internal voltage divider,
1856 * VIN5 and VIN6 are not available if UART6 is enabled.
4573acbc
GR		 1857 *
1858 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
1859 * is the temperature source. Since we can not read the
1860 * temperature source here, skip_temp is preliminary.
9172b5d1 1861 */
4573acbc 1862 if (uart6) {
9172b5d1 1863 sio_data->skip_in |= (1 << 5) | (1 << 6);
4573acbc
GR		 1864 sio_data->skip_temp |= (1 << 2);
1865 }
9172b5d1 1866
d9b327c3 1867 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
87673dd7 1868 }
d9b327c3 1869 if (sio_data->beep_pin)
a8ca1037 1870 pr_info("Beeping is supported\n");
87673dd7 1871
98dd22c3
JD		 1872 /* Disable specific features based on DMI strings */
1873 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
1874 board_name = dmi_get_system_info(DMI_BOARD_NAME);
1875 if (board_vendor && board_name) {
1876 if (strcmp(board_vendor, "nVIDIA") == 0
1877 && strcmp(board_name, "FN68PT") == 0) {
4a0d71cf
GR		 1878 /*
1879 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
1880 * connected to a fan, but to something else. One user
1881 * has reported instant system power-off when changing
1882 * the PWM2 duty cycle, so we disable it.
1883 * I use the board name string as the trigger in case
1884 * the same board is ever used in other systems.
1885 */
a8ca1037 1886 pr_info("Disabling pwm2 due to hardware constraints\n");
98dd22c3
JD		 1887 sio_data->skip_pwm = (1 << 1);
1888 }
1889 }
1890
1da177e4
LT		 1891exit:
1892 superio_exit();
1893 return err;
1894}
1895
723a0aa0
JD		 1896static void it87_remove_files(struct device *dev)
1897{
1898 struct it87_data *data = platform_get_drvdata(pdev);
1899 struct it87_sio_data *sio_data = dev->platform_data;
1900 const struct attribute_group *fan_group = it87_get_fan_group(data);
1901 int i;
1902
1903 sysfs_remove_group(&dev->kobj, &it87_group);
9172b5d1
GR		 1904 for (i = 0; i < 9; i++) {
1905 if (sio_data->skip_in & (1 << i))
1906 continue;
1907 sysfs_remove_group(&dev->kobj, &it87_group_in[i]);
1908 if (it87_attributes_in_beep[i])
1909 sysfs_remove_file(&dev->kobj,
1910 it87_attributes_in_beep[i]);
1911 }
4573acbc
GR		 1912 for (i = 0; i < 3; i++) {
1913 if (!(data->has_temp & (1 << i)))
1914 continue;
1915 sysfs_remove_group(&dev->kobj, &it87_group_temp[i]);
1916 if (sio_data->beep_pin)
1917 sysfs_remove_file(&dev->kobj,
1918 it87_attributes_temp_beep[i]);
1919 }
723a0aa0
JD		 1920 for (i = 0; i < 5; i++) {
1921 if (!(data->has_fan & (1 << i)))
1922 continue;
1923 sysfs_remove_group(&dev->kobj, &fan_group[i]);
d9b327c3
JD		 1924 if (sio_data->beep_pin)
1925 sysfs_remove_file(&dev->kobj,
1926 it87_attributes_fan_beep[i]);
723a0aa0
JD		 1927 }
1928 for (i = 0; i < 3; i++) {
1929 if (sio_data->skip_pwm & (1 << 0))
1930 continue;
1931 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
4f3f51bc
JD		 1932 if (has_old_autopwm(data))
1933 sysfs_remove_group(&dev->kobj,
1934 &it87_group_autopwm[i]);
723a0aa0 1935 }
6a8d7acf
JD		 1936 if (!sio_data->skip_vid)
1937 sysfs_remove_group(&dev->kobj, &it87_group_vid);
738e5e05 1938 sysfs_remove_group(&dev->kobj, &it87_group_label);
723a0aa0
JD		 1939}
1940
6c931ae1 1941static int it87_probe(struct platform_device *pdev)
1da177e4 1942{
1da177e4 1943 struct it87_data *data;
b74f3fdd 1944 struct resource *res;
1945 struct device *dev = &pdev->dev;
1946 struct it87_sio_data *sio_data = dev->platform_data;
723a0aa0
JD		 1947 const struct attribute_group *fan_group;
1948 int err = 0, i;
1da177e4 1949 int enable_pwm_interface;
d9b327c3 1950 int fan_beep_need_rw;
3c4c4971 1951 static const char * const names[] = {
b74f3fdd 1952 "it87",
1953 "it8712",
1954 "it8716",
1955 "it8718",
b4da93e4 1956 "it8720",
44c1bcd4 1957 "it8721",
16b5dda2 1958 "it8728",
0531d98b
GR		 1959 "it8782",
1960 "it8783",
b74f3fdd 1961 };
1962
1963 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
62a1d05f
GR		 1964 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
1965 DRVNAME)) {
b74f3fdd 1966 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1967 (unsigned long)res->start,
87b4b663 1968 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
62a1d05f 1969 return -EBUSY;
8e9afcbb 1970 }
1da177e4 1971
62a1d05f
GR		 1972 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
1973 if (!data)
1974 return -ENOMEM;
1da177e4 1975
b74f3fdd 1976 data->addr = res->start;
1977 data->type = sio_data->type;
0475169c 1978 data->revision = sio_data->revision;
b74f3fdd 1979 data->name = names[sio_data->type];
1da177e4
LT		 1980
1981 /* Now, we do the remaining detection. */
b74f3fdd 1982 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
62a1d05f
GR		 1983 || it87_read_value(data, IT87_REG_CHIPID) != 0x90)
1984 return -ENODEV;
1da177e4 1985
b74f3fdd 1986 platform_set_drvdata(pdev, data);
1da177e4 1987
9a61bf63 1988 mutex_init(&data->update_lock);
1da177e4 1989
1da177e4 1990 /* Check PWM configuration */
b74f3fdd 1991 enable_pwm_interface = it87_check_pwm(dev);
1da177e4 1992
44c1bcd4 1993 /* Starting with IT8721F, we handle scaling of internal voltages */
16b5dda2 1994 if (has_12mv_adc(data)) {
44c1bcd4
JD		 1995 if (sio_data->internal & (1 << 0))
1996 data->in_scaled |= (1 << 3); /* in3 is AVCC */
1997 if (sio_data->internal & (1 << 1))
1998 data->in_scaled |= (1 << 7); /* in7 is VSB */
1999 if (sio_data->internal & (1 << 2))
2000 data->in_scaled |= (1 << 8); /* in8 is Vbat */
0531d98b
GR		 2001 } else if (sio_data->type == it8782 || sio_data->type == it8783) {
2002 if (sio_data->internal & (1 << 0))
2003 data->in_scaled |= (1 << 3); /* in3 is VCC5V */
2004 if (sio_data->internal & (1 << 1))
2005 data->in_scaled |= (1 << 7); /* in7 is VCCH5V */
44c1bcd4
JD		 2006 }
2007
4573acbc
GR		 2008 data->has_temp = 0x07;
2009 if (sio_data->skip_temp & (1 << 2)) {
2010 if (sio_data->type == it8782
2011 && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
2012 data->has_temp &= ~(1 << 2);
2013 }
2014
1da177e4 2015 /* Initialize the IT87 chip */
b74f3fdd 2016 it87_init_device(pdev);
1da177e4
LT		 2017
2018 /* Register sysfs hooks */
5f2dc798
JD		 2019 err = sysfs_create_group(&dev->kobj, &it87_group);
2020 if (err)
62a1d05f 2021 return err;
17d648bf 2022
9172b5d1
GR		 2023 for (i = 0; i < 9; i++) {
2024 if (sio_data->skip_in & (1 << i))
2025 continue;
2026 err = sysfs_create_group(&dev->kobj, &it87_group_in[i]);
2027 if (err)
62a1d05f 2028 goto error;
9172b5d1
GR		 2029 if (sio_data->beep_pin && it87_attributes_in_beep[i]) {
2030 err = sysfs_create_file(&dev->kobj,
2031 it87_attributes_in_beep[i]);
2032 if (err)
62a1d05f 2033 goto error;
9172b5d1
GR		 2034 }
2035 }
2036
4573acbc
GR		 2037 for (i = 0; i < 3; i++) {
2038 if (!(data->has_temp & (1 << i)))
2039 continue;
2040 err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]);
d9b327c3 2041 if (err)
62a1d05f 2042 goto error;
4573acbc
GR		 2043 if (sio_data->beep_pin) {
2044 err = sysfs_create_file(&dev->kobj,
2045 it87_attributes_temp_beep[i]);
2046 if (err)
2047 goto error;
2048 }
d9b327c3
JD		 2049 }
2050
9060f8bd 2051 /* Do not create fan files for disabled fans */
723a0aa0 2052 fan_group = it87_get_fan_group(data);
d9b327c3 2053 fan_beep_need_rw = 1;
723a0aa0
JD		 2054 for (i = 0; i < 5; i++) {
2055 if (!(data->has_fan & (1 << i)))
2056 continue;
2057 err = sysfs_create_group(&dev->kobj, &fan_group[i]);
2058 if (err)
62a1d05f 2059 goto error;
d9b327c3
JD		 2060
2061 if (sio_data->beep_pin) {
2062 err = sysfs_create_file(&dev->kobj,
2063 it87_attributes_fan_beep[i]);
2064 if (err)
62a1d05f 2065 goto error;
d9b327c3
JD		 2066 if (!fan_beep_need_rw)
2067 continue;
2068
4a0d71cf
GR		 2069 /*
2070 * As we have a single beep enable bit for all fans,
d9b327c3 2071 * only the first enabled fan has a writable attribute
4a0d71cf
GR		 2072 * for it.
2073 */
d9b327c3
JD		 2074 if (sysfs_chmod_file(&dev->kobj,
2075 it87_attributes_fan_beep[i],
2076 S_IRUGO | S_IWUSR))
2077 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
2078 i + 1);
2079 fan_beep_need_rw = 0;
2080 }
17d648bf
JD		 2081 }
2082
1da177e4 2083 if (enable_pwm_interface) {
723a0aa0
JD		 2084 for (i = 0; i < 3; i++) {
2085 if (sio_data->skip_pwm & (1 << i))
2086 continue;
2087 err = sysfs_create_group(&dev->kobj,
2088 &it87_group_pwm[i]);
2089 if (err)
62a1d05f 2090 goto error;
4f3f51bc
JD		 2091
2092 if (!has_old_autopwm(data))
2093 continue;
2094 err = sysfs_create_group(&dev->kobj,
2095 &it87_group_autopwm[i]);
2096 if (err)
62a1d05f 2097 goto error;
98dd22c3 2098 }
1da177e4
LT		 2099 }
2100
895ff267 2101 if (!sio_data->skip_vid) {
303760b4 2102 data->vrm = vid_which_vrm();
87673dd7 2103 /* VID reading from Super-I/O config space if available */
b74f3fdd 2104 data->vid = sio_data->vid_value;
6a8d7acf
JD		 2105 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
2106 if (err)
62a1d05f 2107 goto error;
87808be4
JD		 2108 }
2109
738e5e05
JD		 2110 /* Export labels for internal sensors */
2111 for (i = 0; i < 3; i++) {
2112 if (!(sio_data->internal & (1 << i)))
2113 continue;
2114 err = sysfs_create_file(&dev->kobj,
2115 it87_attributes_label[i]);
2116 if (err)
62a1d05f 2117 goto error;
738e5e05
JD		 2118 }
2119
1beeffe4
TJ		 2120 data->hwmon_dev = hwmon_device_register(dev);
2121 if (IS_ERR(data->hwmon_dev)) {
2122 err = PTR_ERR(data->hwmon_dev);
62a1d05f 2123 goto error;
1da177e4
LT		 2124 }
2125
2126 return 0;
2127
62a1d05f 2128error:
723a0aa0 2129 it87_remove_files(dev);
1da177e4
LT		 2130 return err;
2131}
2132
281dfd0b 2133static int it87_remove(struct platform_device *pdev)
1da177e4 2134{
b74f3fdd 2135 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2136
1beeffe4 2137 hwmon_device_unregister(data->hwmon_dev);
723a0aa0 2138 it87_remove_files(&pdev->dev);
943b0830 2139
1da177e4
LT		 2140 return 0;
2141}
2142
4a0d71cf
GR		 2143/*
2144 * Must be called with data->update_lock held, except during initialization.
2145 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2146 * would slow down the IT87 access and should not be necessary.
2147 */
b74f3fdd 2148static int it87_read_value(struct it87_data *data, u8 reg)
1da177e4 2149{
b74f3fdd 2150 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2151 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT		 2152}
2153
4a0d71cf
GR		 2154/*
2155 * Must be called with data->update_lock held, except during initialization.
2156 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2157 * would slow down the IT87 access and should not be necessary.
2158 */
b74f3fdd 2159static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
1da177e4 2160{
b74f3fdd 2161 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2162 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT		 2163}
2164
2165/* Return 1 if and only if the PWM interface is safe to use */
6c931ae1 2166static int it87_check_pwm(struct device *dev)
1da177e4 2167{
b74f3fdd 2168 struct it87_data *data = dev_get_drvdata(dev);
4a0d71cf
GR		 2169 /*
2170 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
1da177e4 2171 * and polarity set to active low is sign that this is the case so we
4a0d71cf
GR		 2172 * disable pwm control to protect the user.
2173 */
b74f3fdd 2174 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1da177e4
LT		 2175 if ((tmp & 0x87) == 0) {
2176 if (fix_pwm_polarity) {
4a0d71cf
GR		 2177 /*
2178 * The user asks us to attempt a chip reconfiguration.
1da177e4 2179 * This means switching to active high polarity and
4a0d71cf
GR		 2180 * inverting all fan speed values.
2181 */
1da177e4
LT		 2182 int i;
2183 u8 pwm[3];
2184
2185 for (i = 0; i < 3; i++)
b74f3fdd 2186 pwm[i] = it87_read_value(data,
1da177e4
LT		 2187 IT87_REG_PWM(i));
2188
4a0d71cf
GR		 2189 /*
2190 * If any fan is in automatic pwm mode, the polarity
1da177e4
LT		 2191 * might be correct, as suspicious as it seems, so we
2192 * better don't change anything (but still disable the
4a0d71cf
GR		 2193 * PWM interface).
2194 */
1da177e4 2195 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
b74f3fdd 2196 dev_info(dev, "Reconfiguring PWM to "
1da177e4 2197 "active high polarity\n");
b74f3fdd 2198 it87_write_value(data, IT87_REG_FAN_CTL,
1da177e4
LT		 2199 tmp | 0x87);
2200 for (i = 0; i < 3; i++)
b74f3fdd 2201 it87_write_value(data,
1da177e4
LT		 2202 IT87_REG_PWM(i),
2203 0x7f & ~pwm[i]);
2204 return 1;
2205 }
2206
b74f3fdd 2207 dev_info(dev, "PWM configuration is "
1da177e4
LT		 2208 "too broken to be fixed\n");
2209 }
2210
b74f3fdd 2211 dev_info(dev, "Detected broken BIOS "
1da177e4
LT		 2212 "defaults, disabling PWM interface\n");
2213 return 0;
2214 } else if (fix_pwm_polarity) {
b74f3fdd 2215 dev_info(dev, "PWM configuration looks "
1da177e4
LT		 2216 "sane, won't touch\n");
2217 }
2218
2219 return 1;
2220}
2221
2222/* Called when we have found a new IT87. */
6c931ae1 2223static void it87_init_device(struct platform_device *pdev)
1da177e4 2224{
591ec650 2225 struct it87_sio_data *sio_data = pdev->dev.platform_data;
b74f3fdd 2226 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2227 int tmp, i;
591ec650 2228 u8 mask;
1da177e4 2229
4a0d71cf
GR		 2230 /*
2231 * For each PWM channel:
b99883dc
JD		 2232 * - If it is in automatic mode, setting to manual mode should set
2233 * the fan to full speed by default.
2234 * - If it is in manual mode, we need a mapping to temperature
2235 * channels to use when later setting to automatic mode later.
2236 * Use a 1:1 mapping by default (we are clueless.)
2237 * In both cases, the value can (and should) be changed by the user
6229cdb2
JD		 2238 * prior to switching to a different mode.
2239 * Note that this is no longer needed for the IT8721F and later, as
2240 * these have separate registers for the temperature mapping and the
4a0d71cf
GR		 2241 * manual duty cycle.
2242 */
1da177e4 2243 for (i = 0; i < 3; i++) {
b99883dc
JD		 2244 data->pwm_temp_map[i] = i;
2245 data->pwm_duty[i] = 0x7f; /* Full speed */
4f3f51bc 2246 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
1da177e4
LT		 2247 }
2248
4a0d71cf
GR		 2249 /*
2250 * Some chips seem to have default value 0xff for all limit
c5df9b7a
JD		 2251 * registers. For low voltage limits it makes no sense and triggers
2252 * alarms, so change to 0 instead. For high temperature limits, it
2253 * means -1 degree C, which surprisingly doesn't trigger an alarm,
4a0d71cf
GR		 2254 * but is still confusing, so change to 127 degrees C.
2255 */
c5df9b7a 2256 for (i = 0; i < 8; i++) {
b74f3fdd 2257 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
c5df9b7a 2258 if (tmp == 0xff)
b74f3fdd 2259 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
c5df9b7a
JD		 2260 }
2261 for (i = 0; i < 3; i++) {
b74f3fdd 2262 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
c5df9b7a 2263 if (tmp == 0xff)
b74f3fdd 2264 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
c5df9b7a
JD		 2265 }
2266
4a0d71cf
GR		 2267 /*
2268 * Temperature channels are not forcibly enabled, as they can be
a00afb97
JD		 2269 * set to two different sensor types and we can't guess which one
2270 * is correct for a given system. These channels can be enabled at
4a0d71cf
GR		 2271 * run-time through the temp{1-3}_type sysfs accessors if needed.
2272 */
1da177e4
LT		 2273
2274 /* Check if voltage monitors are reset manually or by some reason */
b74f3fdd 2275 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
1da177e4
LT		 2276 if ((tmp & 0xff) == 0) {
2277 /* Enable all voltage monitors */
b74f3fdd 2278 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
1da177e4
LT		 2279 }
2280
2281 /* Check if tachometers are reset manually or by some reason */
591ec650 2282 mask = 0x70 & ~(sio_data->skip_fan << 4);
b74f3fdd 2283 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
591ec650 2284 if ((data->fan_main_ctrl & mask) == 0) {
1da177e4 2285 /* Enable all fan tachometers */
591ec650 2286 data->fan_main_ctrl |= mask;
5f2dc798
JD		 2287 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2288 data->fan_main_ctrl);
1da177e4 2289 }
9060f8bd 2290 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
1da177e4 2291
17d648bf 2292 /* Set tachometers to 16-bit mode if needed */
0475169c 2293 if (has_16bit_fans(data)) {
b74f3fdd 2294 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
9060f8bd 2295 if (~tmp & 0x07 & data->has_fan) {
b74f3fdd 2296 dev_dbg(&pdev->dev,
17d648bf 2297 "Setting fan1-3 to 16-bit mode\n");
b74f3fdd 2298 it87_write_value(data, IT87_REG_FAN_16BIT,
17d648bf
JD		 2299 tmp | 0x07);
2300 }
0531d98b
GR		 2301 /* IT8705F, IT8782F, and IT8783E/F only support three fans. */
2302 if (data->type != it87 && data->type != it8782 &&
2303 data->type != it8783) {
816d8c6a
AP		 2304 if (tmp & (1 << 4))
2305 data->has_fan |= (1 << 3); /* fan4 enabled */
2306 if (tmp & (1 << 5))
2307 data->has_fan |= (1 << 4); /* fan5 enabled */
2308 }
17d648bf
JD		 2309 }
2310
591ec650
JD		 2311 /* Fan input pins may be used for alternative functions */
2312 data->has_fan &= ~sio_data->skip_fan;
2313
1da177e4 2314 /* Start monitoring */
b74f3fdd 2315 it87_write_value(data, IT87_REG_CONFIG,
41002f8d 2316 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
1da177e4
LT		 2317 | (update_vbat ? 0x41 : 0x01));
2318}
2319
b99883dc
JD		 2320static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
2321{
2322 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
16b5dda2 2323 if (has_newer_autopwm(data)) {
b99883dc 2324 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
6229cdb2
JD		 2325 data->pwm_duty[nr] = it87_read_value(data,
2326 IT87_REG_PWM_DUTY(nr));
2327 } else {
2328 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
2329 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2330 else /* Manual mode */
2331 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
2332 }
4f3f51bc
JD		 2333
2334 if (has_old_autopwm(data)) {
2335 int i;
2336
2337 for (i = 0; i < 5 ; i++)
2338 data->auto_temp[nr][i] = it87_read_value(data,
2339 IT87_REG_AUTO_TEMP(nr, i));
2340 for (i = 0; i < 3 ; i++)
2341 data->auto_pwm[nr][i] = it87_read_value(data,
2342 IT87_REG_AUTO_PWM(nr, i));
2343 }
b99883dc
JD		 2344}
2345
1da177e4
LT		 2346static struct it87_data *it87_update_device(struct device *dev)
2347{
b74f3fdd 2348 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 2349 int i;
2350
9a61bf63 2351 mutex_lock(&data->update_lock);
1da177e4
LT		 2352
2353 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
2354 || !data->valid) {
1da177e4 2355 if (update_vbat) {
4a0d71cf
GR		 2356 /*
2357 * Cleared after each update, so reenable. Value
2358 * returned by this read will be previous value
2359 */
b74f3fdd 2360 it87_write_value(data, IT87_REG_CONFIG,
5f2dc798 2361 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1da177e4
LT		 2362 }
2363 for (i = 0; i <= 7; i++) {
2364 data->in[i] =
5f2dc798 2365 it87_read_value(data, IT87_REG_VIN(i));
1da177e4 2366 data->in_min[i] =
5f2dc798 2367 it87_read_value(data, IT87_REG_VIN_MIN(i));
1da177e4 2368 data->in_max[i] =
5f2dc798 2369 it87_read_value(data, IT87_REG_VIN_MAX(i));
1da177e4 2370 }
3543a53f 2371 /* in8 (battery) has no limit registers */
5f2dc798 2372 data->in[8] = it87_read_value(data, IT87_REG_VIN(8));
1da177e4 2373
c7f1f716 2374 for (i = 0; i < 5; i++) {
9060f8bd
JD		 2375 /* Skip disabled fans */
2376 if (!(data->has_fan & (1 << i)))
2377 continue;
2378
1da177e4 2379 data->fan_min[i] =
5f2dc798 2380 it87_read_value(data, IT87_REG_FAN_MIN[i]);
b74f3fdd 2381 data->fan[i] = it87_read_value(data,
c7f1f716 2382 IT87_REG_FAN[i]);
17d648bf 2383 /* Add high byte if in 16-bit mode */
0475169c 2384 if (has_16bit_fans(data)) {
b74f3fdd 2385 data->fan[i] |= it87_read_value(data,
c7f1f716 2386 IT87_REG_FANX[i]) << 8;
b74f3fdd 2387 data->fan_min[i] |= it87_read_value(data,
c7f1f716 2388 IT87_REG_FANX_MIN[i]) << 8;
17d648bf 2389 }
1da177e4
LT		 2390 }
2391 for (i = 0; i < 3; i++) {
4573acbc
GR		 2392 if (!(data->has_temp & (1 << i)))
2393 continue;
60ca385a 2394 data->temp[i][0] =
5f2dc798 2395 it87_read_value(data, IT87_REG_TEMP(i));
60ca385a 2396 data->temp[i][1] =
5f2dc798 2397 it87_read_value(data, IT87_REG_TEMP_LOW(i));
60ca385a
GR		 2398 data->temp[i][2] =
2399 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
1da177e4
LT		 2400 }
2401
17d648bf 2402 /* Newer chips don't have clock dividers */
0475169c 2403 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
b74f3fdd 2404 i = it87_read_value(data, IT87_REG_FAN_DIV);
17d648bf
JD		 2405 data->fan_div[0] = i & 0x07;
2406 data->fan_div[1] = (i >> 3) & 0x07;
2407 data->fan_div[2] = (i & 0x40) ? 3 : 1;
2408 }
1da177e4
LT		 2409
2410 data->alarms =
b74f3fdd 2411 it87_read_value(data, IT87_REG_ALARM1) |
2412 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
2413 (it87_read_value(data, IT87_REG_ALARM3) << 16);
d9b327c3 2414 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
b99883dc 2415
b74f3fdd 2416 data->fan_main_ctrl = it87_read_value(data,
2417 IT87_REG_FAN_MAIN_CTRL);
2418 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
b99883dc
JD		 2419 for (i = 0; i < 3; i++)
2420 it87_update_pwm_ctrl(data, i);
b74f3fdd 2421
2422 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
4a0d71cf
GR		 2423 /*
2424 * The IT8705F does not have VID capability.
2425 * The IT8718F and later don't use IT87_REG_VID for the
2426 * same purpose.
2427 */
17d648bf 2428 if (data->type == it8712 || data->type == it8716) {
b74f3fdd 2429 data->vid = it87_read_value(data, IT87_REG_VID);
4a0d71cf
GR		 2430 /*
2431 * The older IT8712F revisions had only 5 VID pins,
2432 * but we assume it is always safe to read 6 bits.
2433 */
17d648bf 2434 data->vid &= 0x3f;
1da177e4
LT		 2435 }
2436 data->last_updated = jiffies;
2437 data->valid = 1;
2438 }
2439
9a61bf63 2440 mutex_unlock(&data->update_lock);
1da177e4
LT		 2441
2442 return data;
2443}
2444
b74f3fdd 2445static int __init it87_device_add(unsigned short address,
2446 const struct it87_sio_data *sio_data)
2447{
2448 struct resource res = {
87b4b663
BH		 2449 .start = address + IT87_EC_OFFSET,
2450 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
b74f3fdd 2451 .name = DRVNAME,
2452 .flags = IORESOURCE_IO,
2453 };
2454 int err;
2455
b9acb64a
JD		 2456 err = acpi_check_resource_conflict(&res);
2457 if (err)
2458 goto exit;
2459
b74f3fdd 2460 pdev = platform_device_alloc(DRVNAME, address);
2461 if (!pdev) {
2462 err = -ENOMEM;
a8ca1037 2463 pr_err("Device allocation failed\n");
b74f3fdd 2464 goto exit;
2465 }
2466
2467 err = platform_device_add_resources(pdev, &res, 1);
2468 if (err) {
a8ca1037 2469 pr_err("Device resource addition failed (%d)\n", err);
b74f3fdd 2470 goto exit_device_put;
2471 }
2472
2473 err = platform_device_add_data(pdev, sio_data,
2474 sizeof(struct it87_sio_data));
2475 if (err) {
a8ca1037 2476 pr_err("Platform data allocation failed\n");
b74f3fdd 2477 goto exit_device_put;
2478 }
2479
2480 err = platform_device_add(pdev);
2481 if (err) {
a8ca1037 2482 pr_err("Device addition failed (%d)\n", err);
b74f3fdd 2483 goto exit_device_put;
2484 }
2485
2486 return 0;
2487
2488exit_device_put:
2489 platform_device_put(pdev);
2490exit:
2491 return err;
2492}
2493
1da177e4
LT		 2494static int __init sm_it87_init(void)
2495{
b74f3fdd 2496 int err;
5f2dc798 2497 unsigned short isa_address = 0;
b74f3fdd 2498 struct it87_sio_data sio_data;
2499
98dd22c3 2500 memset(&sio_data, 0, sizeof(struct it87_sio_data));
b74f3fdd 2501 err = it87_find(&isa_address, &sio_data);
2502 if (err)
2503 return err;
2504 err = platform_driver_register(&it87_driver);
2505 if (err)
2506 return err;
fde09509 2507
b74f3fdd 2508 err = it87_device_add(isa_address, &sio_data);
5f2dc798 2509 if (err) {
b74f3fdd 2510 platform_driver_unregister(&it87_driver);
2511 return err;
2512 }
2513
2514 return 0;
1da177e4
LT		 2515}
2516
2517static void __exit sm_it87_exit(void)
2518{
b74f3fdd 2519 platform_device_unregister(pdev);
2520 platform_driver_unregister(&it87_driver);
1da177e4
LT		 2521}
2522
2523
f1d8e332 2524MODULE_AUTHOR("Chris Gauthron, "
b19367c6 2525 "Jean Delvare <khali@linux-fr.org>");
44c1bcd4 2526MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
1da177e4
LT		 2527module_param(update_vbat, bool, 0);
2528MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2529module_param(fix_pwm_polarity, bool, 0);
5f2dc798
JD		 2530MODULE_PARM_DESC(fix_pwm_polarity,
2531 "Force PWM polarity to active high (DANGEROUS)");
1da177e4
LT		 2532MODULE_LICENSE("GPL");
2533
2534module_init(sm_it87_init);
2535module_exit(sm_it87_exit);
Linux 6.x block layer and io_uring tree(s)