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hwmon: (it87) Fix many checkpatch errors and warnings
[linux-2.6-block.git] / drivers / hwmon / it87.c
CommitLineData
1da177e4 1/*
5f2dc798
JD		 2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring.
4 *
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
8 * Fan Controller)
9 *
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
12 *
13 * Supports: IT8705F Super I/O chip w/LPC interface
14 * IT8712F Super I/O chip w/LPC interface
15 * IT8716F Super I/O chip w/LPC interface
16 * IT8718F Super I/O chip w/LPC interface
17 * IT8720F Super I/O chip w/LPC interface
18 * IT8726F Super I/O chip w/LPC interface
19 * Sis950 A clone of the IT8705F
20 *
21 * Copyright (C) 2001 Chris Gauthron
22 * Copyright (C) 2005-2010 Jean Delvare <khali@linux-fr.org>
23 *
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
27 * (at your option) any later version.
28 *
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
33 *
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
37 */
1da177e4 38
1da177e4
LT		 39#include <linux/module.h>
40#include <linux/init.h>
41#include <linux/slab.h>
42#include <linux/jiffies.h>
b74f3fdd 43#include <linux/platform_device.h>
943b0830 44#include <linux/hwmon.h>
303760b4
JD		 45#include <linux/hwmon-sysfs.h>
46#include <linux/hwmon-vid.h>
943b0830 47#include <linux/err.h>
9a61bf63 48#include <linux/mutex.h>
87808be4 49#include <linux/sysfs.h>
98dd22c3
JD		 50#include <linux/string.h>
51#include <linux/dmi.h>
b9acb64a 52#include <linux/acpi.h>
6055fae8 53#include <linux/io.h>
1da177e4 54
b74f3fdd 55#define DRVNAME "it87"
1da177e4 56
b4da93e4 57enum chips { it87, it8712, it8716, it8718, it8720 };
1da177e4 58
67b671bc
JD		 59static unsigned short force_id;
60module_param(force_id, ushort, 0);
61MODULE_PARM_DESC(force_id, "Override the detected device ID");
62
b74f3fdd 63static struct platform_device *pdev;
64
1da177e4
LT		 65#define REG 0x2e /* The register to read/write */
66#define DEV 0x07 /* Register: Logical device select */
67#define VAL 0x2f /* The value to read/write */
68#define PME 0x04 /* The device with the fan registers in it */
b4da93e4
JMS		 69
70/* The device with the IT8718F/IT8720F VID value in it */
71#define GPIO 0x07
72
1da177e4
LT		 73#define DEVID 0x20 /* Register: Device ID */
74#define DEVREV 0x22 /* Register: Device Revision */
75
76static inline int
77superio_inb(int reg)
78{
79 outb(reg, REG);
80 return inb(VAL);
81}
82
83static int superio_inw(int reg)
84{
85 int val;
86 outb(reg++, REG);
87 val = inb(VAL) << 8;
88 outb(reg, REG);
89 val |= inb(VAL);
90 return val;
91}
92
93static inline void
87673dd7 94superio_select(int ldn)
1da177e4
LT		 95{
96 outb(DEV, REG);
87673dd7 97 outb(ldn, VAL);
1da177e4
LT		 98}
99
100static inline void
101superio_enter(void)
102{
103 outb(0x87, REG);
104 outb(0x01, REG);
105 outb(0x55, REG);
106 outb(0x55, REG);
107}
108
109static inline void
110superio_exit(void)
111{
112 outb(0x02, REG);
113 outb(0x02, VAL);
114}
115
87673dd7 116/* Logical device 4 registers */
1da177e4
LT		 117#define IT8712F_DEVID 0x8712
118#define IT8705F_DEVID 0x8705
17d648bf 119#define IT8716F_DEVID 0x8716
87673dd7 120#define IT8718F_DEVID 0x8718
b4da93e4 121#define IT8720F_DEVID 0x8720
08a8f6e9 122#define IT8726F_DEVID 0x8726
1da177e4
LT		 123#define IT87_ACT_REG 0x30
124#define IT87_BASE_REG 0x60
125
87673dd7 126/* Logical device 7 registers (IT8712F and later) */
895ff267 127#define IT87_SIO_GPIO3_REG 0x27
591ec650 128#define IT87_SIO_GPIO5_REG 0x29
87673dd7
JD		 129#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
130#define IT87_SIO_VID_REG 0xfc /* VID value */
d9b327c3 131#define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
87673dd7 132
1da177e4
LT		 133/* Update battery voltage after every reading if true */
134static int update_vbat;
135
136/* Not all BIOSes properly configure the PWM registers */
137static int fix_pwm_polarity;
138
1da177e4
LT		 139/* Many IT87 constants specified below */
140
141/* Length of ISA address segment */
142#define IT87_EXTENT 8
143
87b4b663
BH		 144/* Length of ISA address segment for Environmental Controller */
145#define IT87_EC_EXTENT 2
146
147/* Offset of EC registers from ISA base address */
148#define IT87_EC_OFFSET 5
149
150/* Where are the ISA address/data registers relative to the EC base address */
151#define IT87_ADDR_REG_OFFSET 0
152#define IT87_DATA_REG_OFFSET 1
1da177e4
LT		 153
154/*----- The IT87 registers -----*/
155
156#define IT87_REG_CONFIG 0x00
157
158#define IT87_REG_ALARM1 0x01
159#define IT87_REG_ALARM2 0x02
160#define IT87_REG_ALARM3 0x03
161
b4da93e4
JMS		 162/* The IT8718F and IT8720F have the VID value in a different register, in
163 Super-I/O configuration space. */
1da177e4 164#define IT87_REG_VID 0x0a
0475169c
AP		 165/* The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
166 for fan divisors. Later IT8712F revisions must use 16-bit tachometer
167 mode. */
1da177e4 168#define IT87_REG_FAN_DIV 0x0b
17d648bf 169#define IT87_REG_FAN_16BIT 0x0c
1da177e4
LT		 170
171/* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
172
c7f1f716
JD		 173static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
174static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 };
175static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 };
176static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
1da177e4
LT		 177#define IT87_REG_FAN_MAIN_CTRL 0x13
178#define IT87_REG_FAN_CTL 0x14
179#define IT87_REG_PWM(nr) (0x15 + (nr))
180
181#define IT87_REG_VIN(nr) (0x20 + (nr))
182#define IT87_REG_TEMP(nr) (0x29 + (nr))
183
184#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
185#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
186#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
187#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
188
1da177e4
LT		 189#define IT87_REG_VIN_ENABLE 0x50
190#define IT87_REG_TEMP_ENABLE 0x51
d9b327c3 191#define IT87_REG_BEEP_ENABLE 0x5c
1da177e4
LT		 192
193#define IT87_REG_CHIPID 0x58
194
195#define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
196#define IN_FROM_REG(val) ((val) * 16)
197
198static inline u8 FAN_TO_REG(long rpm, int div)
199{
200 if (rpm == 0)
201 return 255;
202 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
203 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
204 254);
205}
206
17d648bf
JD		 207static inline u16 FAN16_TO_REG(long rpm)
208{
209 if (rpm == 0)
210 return 0xffff;
211 return SENSORS_LIMIT((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
212}
213
1da177e4 214#define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
17d648bf
JD		 215/* The divider is fixed to 2 in 16-bit mode */
216#define FAN16_FROM_REG(val) ((val)==0?-1:(val)==0xffff?0:1350000/((val)*2))
1da177e4
LT		 217
218#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val)<0?(((val)-500)/1000):\
219 ((val)+500)/1000),-128,127))
e267d250 220#define TEMP_FROM_REG(val) ((val) * 1000)
1da177e4 221
1da177e4
LT		 222#define PWM_TO_REG(val) ((val) >> 1)
223#define PWM_FROM_REG(val) (((val)&0x7f) << 1)
224
225static int DIV_TO_REG(int val)
226{
227 int answer = 0;
b9e349f7 228 while (answer < 7 && (val >>= 1))
1da177e4
LT		 229 answer++;
230 return answer;
231}
232#define DIV_FROM_REG(val) (1 << (val))
233
f8d0c19a
JD		 234static const unsigned int pwm_freq[8] = {
235 48000000 / 128,
236 24000000 / 128,
237 12000000 / 128,
238 8000000 / 128,
239 6000000 / 128,
240 3000000 / 128,
241 1500000 / 128,
242 750000 / 128,
243};
244
1da177e4 245
b74f3fdd 246struct it87_sio_data {
247 enum chips type;
248 /* Values read from Super-I/O config space */
0475169c 249 u8 revision;
b74f3fdd 250 u8 vid_value;
d9b327c3 251 u8 beep_pin;
591ec650 252 /* Features skipped based on config or DMI */
895ff267 253 u8 skip_vid;
591ec650 254 u8 skip_fan;
98dd22c3 255 u8 skip_pwm;
b74f3fdd 256};
257
ed6bafbf
JD		 258/* For each registered chip, we need to keep some data in memory.
259 The structure is dynamically allocated. */
1da177e4 260struct it87_data {
1beeffe4 261 struct device *hwmon_dev;
1da177e4 262 enum chips type;
0475169c 263 u8 revision;
1da177e4 264
b74f3fdd 265 unsigned short addr;
266 const char *name;
9a61bf63 267 struct mutex update_lock;
1da177e4
LT		 268 char valid; /* !=0 if following fields are valid */
269 unsigned long last_updated; /* In jiffies */
270
271 u8 in[9]; /* Register value */
3543a53f
JD		 272 u8 in_max[8]; /* Register value */
273 u8 in_min[8]; /* Register value */
9060f8bd 274 u8 has_fan; /* Bitfield, fans enabled */
c7f1f716
JD		 275 u16 fan[5]; /* Register values, possibly combined */
276 u16 fan_min[5]; /* Register values, possibly combined */
e267d250
JD		 277 s8 temp[3]; /* Register value */
278 s8 temp_high[3]; /* Register value */
279 s8 temp_low[3]; /* Register value */
1da177e4
LT		 280 u8 sensor; /* Register value */
281 u8 fan_div[3]; /* Register encoding, shifted right */
282 u8 vid; /* Register encoding, combined */
a7be58a1 283 u8 vrm;
1da177e4 284 u32 alarms; /* Register encoding, combined */
d9b327c3 285 u8 beeps; /* Register encoding */
1da177e4 286 u8 fan_main_ctrl; /* Register value */
f8d0c19a 287 u8 fan_ctl; /* Register value */
b99883dc
JD		 288
289 /* The following 3 arrays correspond to the same registers. The
290 * meaning of bits 6-0 depends on the value of bit 7, and we want
291 * to preserve settings on mode changes, so we have to track all
292 * values separately. */
293 u8 pwm_ctrl[3]; /* Register value */
294 u8 pwm_duty[3]; /* Manual PWM value set by user (bit 6-0) */
295 u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */
1da177e4
LT		 296};
297
0475169c
AP		 298static inline int has_16bit_fans(const struct it87_data *data)
299{
816d8c6a 300 /* IT8705F Datasheet 0.4.1, 3h == Version G.
859b9ef3 301 IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
816d8c6a
AP		 302 These are the first revisions with 16bit tachometer support. */
303 return (data->type == it87 && data->revision >= 0x03)
859b9ef3 304 || (data->type == it8712 && data->revision >= 0x08)
0475169c 305 || data->type == it8716
b4da93e4
JMS		 306 || data->type == it8718
307 || data->type == it8720;
0475169c 308}
1da177e4 309
b74f3fdd 310static int it87_probe(struct platform_device *pdev);
d0546128 311static int __devexit it87_remove(struct platform_device *pdev);
1da177e4 312
b74f3fdd 313static int it87_read_value(struct it87_data *data, u8 reg);
314static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
1da177e4 315static struct it87_data *it87_update_device(struct device *dev);
b74f3fdd 316static int it87_check_pwm(struct device *dev);
317static void it87_init_device(struct platform_device *pdev);
1da177e4
LT		 318
319
b74f3fdd 320static struct platform_driver it87_driver = {
cdaf7934 321 .driver = {
87218842 322 .owner = THIS_MODULE,
b74f3fdd 323 .name = DRVNAME,
cdaf7934 324 },
b74f3fdd 325 .probe = it87_probe,
326 .remove = __devexit_p(it87_remove),
fde09509
JD		 327};
328
20ad93d4
JD		 329static ssize_t show_in(struct device *dev, struct device_attribute *attr,
330 char *buf)
1da177e4 331{
20ad93d4
JD		 332 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
333 int nr = sensor_attr->index;
334
1da177e4
LT		 335 struct it87_data *data = it87_update_device(dev);
336 return sprintf(buf, "%d\n", IN_FROM_REG(data->in[nr]));
337}
338
20ad93d4
JD		 339static ssize_t show_in_min(struct device *dev, struct device_attribute *attr,
340 char *buf)
1da177e4 341{
20ad93d4
JD		 342 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
343 int nr = sensor_attr->index;
344
1da177e4
LT		 345 struct it87_data *data = it87_update_device(dev);
346 return sprintf(buf, "%d\n", IN_FROM_REG(data->in_min[nr]));
347}
348
20ad93d4
JD		 349static ssize_t show_in_max(struct device *dev, struct device_attribute *attr,
350 char *buf)
1da177e4 351{
20ad93d4
JD		 352 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
353 int nr = sensor_attr->index;
354
1da177e4
LT		 355 struct it87_data *data = it87_update_device(dev);
356 return sprintf(buf, "%d\n", IN_FROM_REG(data->in_max[nr]));
357}
358
20ad93d4
JD		 359static ssize_t set_in_min(struct device *dev, struct device_attribute *attr,
360 const char *buf, size_t count)
1da177e4 361{
20ad93d4
JD		 362 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
363 int nr = sensor_attr->index;
364
b74f3fdd 365 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 366 unsigned long val = simple_strtoul(buf, NULL, 10);
367
9a61bf63 368 mutex_lock(&data->update_lock);
1da177e4 369 data->in_min[nr] = IN_TO_REG(val);
b74f3fdd 370 it87_write_value(data, IT87_REG_VIN_MIN(nr),
1da177e4 371 data->in_min[nr]);
9a61bf63 372 mutex_unlock(&data->update_lock);
1da177e4
LT		 373 return count;
374}
20ad93d4
JD		 375static ssize_t set_in_max(struct device *dev, struct device_attribute *attr,
376 const char *buf, size_t count)
1da177e4 377{
20ad93d4
JD		 378 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
379 int nr = sensor_attr->index;
380
b74f3fdd 381 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 382 unsigned long val = simple_strtoul(buf, NULL, 10);
383
9a61bf63 384 mutex_lock(&data->update_lock);
1da177e4 385 data->in_max[nr] = IN_TO_REG(val);
b74f3fdd 386 it87_write_value(data, IT87_REG_VIN_MAX(nr),
1da177e4 387 data->in_max[nr]);
9a61bf63 388 mutex_unlock(&data->update_lock);
1da177e4
LT		 389 return count;
390}
391
392#define show_in_offset(offset) \
20ad93d4
JD		 393static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
394 show_in, NULL, offset);
1da177e4
LT		 395
396#define limit_in_offset(offset) \
20ad93d4
JD		 397static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
398 show_in_min, set_in_min, offset); \
399static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
400 show_in_max, set_in_max, offset);
1da177e4
LT		 401
402show_in_offset(0);
403limit_in_offset(0);
404show_in_offset(1);
405limit_in_offset(1);
406show_in_offset(2);
407limit_in_offset(2);
408show_in_offset(3);
409limit_in_offset(3);
410show_in_offset(4);
411limit_in_offset(4);
412show_in_offset(5);
413limit_in_offset(5);
414show_in_offset(6);
415limit_in_offset(6);
416show_in_offset(7);
417limit_in_offset(7);
418show_in_offset(8);
419
420/* 3 temperatures */
20ad93d4
JD		 421static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
422 char *buf)
1da177e4 423{
20ad93d4
JD		 424 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
425 int nr = sensor_attr->index;
426
1da177e4
LT		 427 struct it87_data *data = it87_update_device(dev);
428 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr]));
429}
20ad93d4
JD		 430static ssize_t show_temp_max(struct device *dev, struct device_attribute *attr,
431 char *buf)
1da177e4 432{
20ad93d4
JD		 433 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
434 int nr = sensor_attr->index;
435
1da177e4
LT		 436 struct it87_data *data = it87_update_device(dev);
437 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_high[nr]));
438}
20ad93d4
JD		 439static ssize_t show_temp_min(struct device *dev, struct device_attribute *attr,
440 char *buf)
1da177e4 441{
20ad93d4
JD		 442 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
443 int nr = sensor_attr->index;
444
1da177e4
LT		 445 struct it87_data *data = it87_update_device(dev);
446 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_low[nr]));
447}
20ad93d4
JD		 448static ssize_t set_temp_max(struct device *dev, struct device_attribute *attr,
449 const char *buf, size_t count)
1da177e4 450{
20ad93d4
JD		 451 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
452 int nr = sensor_attr->index;
453
b74f3fdd 454 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 455 int val = simple_strtol(buf, NULL, 10);
456
9a61bf63 457 mutex_lock(&data->update_lock);
1da177e4 458 data->temp_high[nr] = TEMP_TO_REG(val);
b74f3fdd 459 it87_write_value(data, IT87_REG_TEMP_HIGH(nr), data->temp_high[nr]);
9a61bf63 460 mutex_unlock(&data->update_lock);
1da177e4
LT		 461 return count;
462}
20ad93d4
JD		 463static ssize_t set_temp_min(struct device *dev, struct device_attribute *attr,
464 const char *buf, size_t count)
1da177e4 465{
20ad93d4
JD		 466 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
467 int nr = sensor_attr->index;
468
b74f3fdd 469 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 470 int val = simple_strtol(buf, NULL, 10);
471
9a61bf63 472 mutex_lock(&data->update_lock);
1da177e4 473 data->temp_low[nr] = TEMP_TO_REG(val);
b74f3fdd 474 it87_write_value(data, IT87_REG_TEMP_LOW(nr), data->temp_low[nr]);
9a61bf63 475 mutex_unlock(&data->update_lock);
1da177e4
LT		 476 return count;
477}
478#define show_temp_offset(offset) \
20ad93d4
JD		 479static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
480 show_temp, NULL, offset - 1); \
481static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
482 show_temp_max, set_temp_max, offset - 1); \
483static SENSOR_DEVICE_ATTR(temp##offset##_min, S_IRUGO | S_IWUSR, \
484 show_temp_min, set_temp_min, offset - 1);
1da177e4
LT		 485
486show_temp_offset(1);
487show_temp_offset(2);
488show_temp_offset(3);
489
20ad93d4
JD		 490static ssize_t show_sensor(struct device *dev, struct device_attribute *attr,
491 char *buf)
1da177e4 492{
20ad93d4
JD		 493 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
494 int nr = sensor_attr->index;
495
1da177e4 496 struct it87_data *data = it87_update_device(dev);
5f2dc798
JD		 497 u8 reg = data->sensor; /* In case the value is updated while
498 we use it */
499
1da177e4
LT		 500 if (reg & (1 << nr))
501 return sprintf(buf, "3\n"); /* thermal diode */
502 if (reg & (8 << nr))
4ed10779 503 return sprintf(buf, "4\n"); /* thermistor */
1da177e4
LT		 504 return sprintf(buf, "0\n"); /* disabled */
505}
20ad93d4
JD		 506static ssize_t set_sensor(struct device *dev, struct device_attribute *attr,
507 const char *buf, size_t count)
1da177e4 508{
20ad93d4
JD		 509 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
510 int nr = sensor_attr->index;
511
b74f3fdd 512 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 513 int val = simple_strtol(buf, NULL, 10);
514
9a61bf63 515 mutex_lock(&data->update_lock);
1da177e4
LT		 516
517 data->sensor &= ~(1 << nr);
518 data->sensor &= ~(8 << nr);
4ed10779
JD		 519 if (val == 2) { /* backwards compatibility */
520 dev_warn(dev, "Sensor type 2 is deprecated, please use 4 "
521 "instead\n");
522 val = 4;
523 }
524 /* 3 = thermal diode; 4 = thermistor; 0 = disabled */
1da177e4 525 if (val == 3)
5f2dc798 526 data->sensor |= 1 << nr;
4ed10779 527 else if (val == 4)
5f2dc798 528 data->sensor |= 8 << nr;
1da177e4 529 else if (val != 0) {
9a61bf63 530 mutex_unlock(&data->update_lock);
1da177e4
LT		 531 return -EINVAL;
532 }
b74f3fdd 533 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
9a61bf63 534 mutex_unlock(&data->update_lock);
1da177e4
LT		 535 return count;
536}
537#define show_sensor_offset(offset) \
20ad93d4
JD		 538static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
539 show_sensor, set_sensor, offset - 1);
1da177e4
LT		 540
541show_sensor_offset(1);
542show_sensor_offset(2);
543show_sensor_offset(3);
544
545/* 3 Fans */
b99883dc
JD		 546
547static int pwm_mode(const struct it87_data *data, int nr)
548{
549 int ctrl = data->fan_main_ctrl & (1 << nr);
550
551 if (ctrl == 0) /* Full speed */
552 return 0;
553 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
554 return 2;
555 else /* Manual mode */
556 return 1;
557}
558
20ad93d4
JD		 559static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
560 char *buf)
1da177e4 561{
20ad93d4
JD		 562 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
563 int nr = sensor_attr->index;
564
1da177e4 565 struct it87_data *data = it87_update_device(dev);
5f2dc798 566 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
1da177e4
LT		 567 DIV_FROM_REG(data->fan_div[nr])));
568}
20ad93d4
JD		 569static ssize_t show_fan_min(struct device *dev, struct device_attribute *attr,
570 char *buf)
1da177e4 571{
20ad93d4
JD		 572 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
573 int nr = sensor_attr->index;
574
1da177e4 575 struct it87_data *data = it87_update_device(dev);
5f2dc798
JD		 576 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr],
577 DIV_FROM_REG(data->fan_div[nr])));
1da177e4 578}
20ad93d4
JD		 579static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
580 char *buf)
1da177e4 581{
20ad93d4
JD		 582 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
583 int nr = sensor_attr->index;
584
1da177e4
LT		 585 struct it87_data *data = it87_update_device(dev);
586 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
587}
5f2dc798
JD		 588static ssize_t show_pwm_enable(struct device *dev,
589 struct device_attribute *attr, char *buf)
1da177e4 590{
20ad93d4
JD		 591 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
592 int nr = sensor_attr->index;
593
1da177e4 594 struct it87_data *data = it87_update_device(dev);
b99883dc 595 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1da177e4 596}
20ad93d4
JD		 597static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
598 char *buf)
1da177e4 599{
20ad93d4
JD		 600 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
601 int nr = sensor_attr->index;
602
1da177e4 603 struct it87_data *data = it87_update_device(dev);
b99883dc 604 return sprintf(buf, "%d\n", PWM_FROM_REG(data->pwm_duty[nr]));
1da177e4 605}
f8d0c19a
JD		 606static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
607 char *buf)
608{
609 struct it87_data *data = it87_update_device(dev);
610 int index = (data->fan_ctl >> 4) & 0x07;
611
612 return sprintf(buf, "%u\n", pwm_freq[index]);
613}
20ad93d4
JD		 614static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
615 const char *buf, size_t count)
1da177e4 616{
20ad93d4
JD		 617 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
618 int nr = sensor_attr->index;
619
b74f3fdd 620 struct it87_data *data = dev_get_drvdata(dev);
1da177e4 621 int val = simple_strtol(buf, NULL, 10);
7f999aa7 622 u8 reg;
1da177e4 623
9a61bf63 624 mutex_lock(&data->update_lock);
b74f3fdd 625 reg = it87_read_value(data, IT87_REG_FAN_DIV);
07eab46d 626 switch (nr) {
5f2dc798
JD		 627 case 0:
628 data->fan_div[nr] = reg & 0x07;
629 break;
630 case 1:
631 data->fan_div[nr] = (reg >> 3) & 0x07;
632 break;
633 case 2:
634 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
635 break;
07eab46d
JD		 636 }
637
1da177e4 638 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 639 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
9a61bf63 640 mutex_unlock(&data->update_lock);
1da177e4
LT		 641 return count;
642}
20ad93d4
JD		 643static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
644 const char *buf, size_t count)
1da177e4 645{
20ad93d4
JD		 646 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
647 int nr = sensor_attr->index;
648
b74f3fdd 649 struct it87_data *data = dev_get_drvdata(dev);
b9e349f7 650 unsigned long val = simple_strtoul(buf, NULL, 10);
8ab4ec3e 651 int min;
1da177e4
LT		 652 u8 old;
653
9a61bf63 654 mutex_lock(&data->update_lock);
b74f3fdd 655 old = it87_read_value(data, IT87_REG_FAN_DIV);
1da177e4 656
8ab4ec3e
JD		 657 /* Save fan min limit */
658 min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
1da177e4
LT		 659
660 switch (nr) {
661 case 0:
662 case 1:
663 data->fan_div[nr] = DIV_TO_REG(val);
664 break;
665 case 2:
666 if (val < 8)
667 data->fan_div[nr] = 1;
668 else
669 data->fan_div[nr] = 3;
670 }
671 val = old & 0x80;
672 val |= (data->fan_div[0] & 0x07);
673 val |= (data->fan_div[1] & 0x07) << 3;
674 if (data->fan_div[2] == 3)
675 val |= 0x1 << 6;
b74f3fdd 676 it87_write_value(data, IT87_REG_FAN_DIV, val);
1da177e4 677
8ab4ec3e
JD		 678 /* Restore fan min limit */
679 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 680 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
8ab4ec3e 681
9a61bf63 682 mutex_unlock(&data->update_lock);
1da177e4
LT		 683 return count;
684}
20ad93d4
JD		 685static ssize_t set_pwm_enable(struct device *dev,
686 struct device_attribute *attr, const char *buf, size_t count)
1da177e4 687{
20ad93d4
JD		 688 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
689 int nr = sensor_attr->index;
690
b74f3fdd 691 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 692 int val = simple_strtol(buf, NULL, 10);
693
b99883dc
JD		 694 if (val < 0 || val > 2)
695 return -EINVAL;
696
9a61bf63 697 mutex_lock(&data->update_lock);
1da177e4
LT		 698
699 if (val == 0) {
700 int tmp;
701 /* make sure the fan is on when in on/off mode */
b74f3fdd 702 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
703 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1da177e4
LT		 704 /* set on/off mode */
705 data->fan_main_ctrl &= ~(1 << nr);
5f2dc798
JD		 706 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
707 data->fan_main_ctrl);
b99883dc
JD		 708 } else {
709 if (val == 1) /* Manual mode */
710 data->pwm_ctrl[nr] = data->pwm_duty[nr];
711 else /* Automatic mode */
712 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
713 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1da177e4
LT		 714 /* set SmartGuardian mode */
715 data->fan_main_ctrl |= (1 << nr);
5f2dc798
JD		 716 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
717 data->fan_main_ctrl);
1da177e4
LT		 718 }
719
9a61bf63 720 mutex_unlock(&data->update_lock);
1da177e4
LT		 721 return count;
722}
20ad93d4
JD		 723static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
724 const char *buf, size_t count)
1da177e4 725{
20ad93d4
JD		 726 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
727 int nr = sensor_attr->index;
728
b74f3fdd 729 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 730 int val = simple_strtol(buf, NULL, 10);
731
732 if (val < 0 || val > 255)
733 return -EINVAL;
734
9a61bf63 735 mutex_lock(&data->update_lock);
b99883dc
JD		 736 data->pwm_duty[nr] = PWM_TO_REG(val);
737 /* If we are in manual mode, write the duty cycle immediately;
738 * otherwise, just store it for later use. */
739 if (!(data->pwm_ctrl[nr] & 0x80)) {
740 data->pwm_ctrl[nr] = data->pwm_duty[nr];
741 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
742 }
9a61bf63 743 mutex_unlock(&data->update_lock);
1da177e4
LT		 744 return count;
745}
f8d0c19a
JD		 746static ssize_t set_pwm_freq(struct device *dev,
747 struct device_attribute *attr, const char *buf, size_t count)
748{
b74f3fdd 749 struct it87_data *data = dev_get_drvdata(dev);
f8d0c19a
JD		 750 unsigned long val = simple_strtoul(buf, NULL, 10);
751 int i;
752
753 /* Search for the nearest available frequency */
754 for (i = 0; i < 7; i++) {
755 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
756 break;
757 }
758
759 mutex_lock(&data->update_lock);
b74f3fdd 760 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
f8d0c19a 761 data->fan_ctl |= i << 4;
b74f3fdd 762 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
f8d0c19a
JD		 763 mutex_unlock(&data->update_lock);
764
765 return count;
766}
94ac7ee6
JD		 767static ssize_t show_pwm_temp_map(struct device *dev,
768 struct device_attribute *attr, char *buf)
769{
770 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
771 int nr = sensor_attr->index;
772
773 struct it87_data *data = it87_update_device(dev);
774 int map;
775
776 if (data->pwm_temp_map[nr] < 3)
777 map = 1 << data->pwm_temp_map[nr];
778 else
779 map = 0; /* Should never happen */
780 return sprintf(buf, "%d\n", map);
781}
782static ssize_t set_pwm_temp_map(struct device *dev,
783 struct device_attribute *attr, const char *buf, size_t count)
784{
785 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
786 int nr = sensor_attr->index;
787
788 struct it87_data *data = dev_get_drvdata(dev);
789 long val;
790 u8 reg;
791
792 if (strict_strtol(buf, 10, &val) < 0)
793 return -EINVAL;
794
795 switch (val) {
796 case (1 << 0):
797 reg = 0x00;
798 break;
799 case (1 << 1):
800 reg = 0x01;
801 break;
802 case (1 << 2):
803 reg = 0x02;
804 break;
805 default:
806 return -EINVAL;
807 }
808
809 mutex_lock(&data->update_lock);
810 data->pwm_temp_map[nr] = reg;
811 /* If we are in automatic mode, write the temp mapping immediately;
812 * otherwise, just store it for later use. */
813 if (data->pwm_ctrl[nr] & 0x80) {
814 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
815 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
816 }
817 mutex_unlock(&data->update_lock);
818 return count;
819}
1da177e4 820
20ad93d4
JD		 821#define show_fan_offset(offset) \
822static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
823 show_fan, NULL, offset - 1); \
824static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
825 show_fan_min, set_fan_min, offset - 1); \
826static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
827 show_fan_div, set_fan_div, offset - 1);
1da177e4
LT		 828
829show_fan_offset(1);
830show_fan_offset(2);
831show_fan_offset(3);
832
833#define show_pwm_offset(offset) \
20ad93d4
JD		 834static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
835 show_pwm_enable, set_pwm_enable, offset - 1); \
836static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
f8d0c19a
JD		 837 show_pwm, set_pwm, offset - 1); \
838static DEVICE_ATTR(pwm##offset##_freq, \
839 (offset == 1 ? S_IRUGO | S_IWUSR : S_IRUGO), \
94ac7ee6
JD		 840 show_pwm_freq, (offset == 1 ? set_pwm_freq : NULL)); \
841static SENSOR_DEVICE_ATTR(pwm##offset##_auto_channels_temp, \
842 S_IRUGO, show_pwm_temp_map, set_pwm_temp_map, \
843 offset - 1);
1da177e4
LT		 844
845show_pwm_offset(1);
846show_pwm_offset(2);
847show_pwm_offset(3);
848
17d648bf
JD		 849/* A different set of callbacks for 16-bit fans */
850static ssize_t show_fan16(struct device *dev, struct device_attribute *attr,
851 char *buf)
852{
853 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
854 int nr = sensor_attr->index;
855 struct it87_data *data = it87_update_device(dev);
856 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan[nr]));
857}
858
859static ssize_t show_fan16_min(struct device *dev, struct device_attribute *attr,
860 char *buf)
861{
862 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
863 int nr = sensor_attr->index;
864 struct it87_data *data = it87_update_device(dev);
865 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan_min[nr]));
866}
867
868static ssize_t set_fan16_min(struct device *dev, struct device_attribute *attr,
869 const char *buf, size_t count)
870{
871 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
872 int nr = sensor_attr->index;
b74f3fdd 873 struct it87_data *data = dev_get_drvdata(dev);
17d648bf
JD		 874 int val = simple_strtol(buf, NULL, 10);
875
876 mutex_lock(&data->update_lock);
877 data->fan_min[nr] = FAN16_TO_REG(val);
c7f1f716 878 it87_write_value(data, IT87_REG_FAN_MIN[nr],
17d648bf 879 data->fan_min[nr] & 0xff);
c7f1f716 880 it87_write_value(data, IT87_REG_FANX_MIN[nr],
17d648bf
JD		 881 data->fan_min[nr] >> 8);
882 mutex_unlock(&data->update_lock);
883 return count;
884}
885
886/* We want to use the same sysfs file names as 8-bit fans, but we need
887 different variable names, so we have to use SENSOR_ATTR instead of
888 SENSOR_DEVICE_ATTR. */
889#define show_fan16_offset(offset) \
890static struct sensor_device_attribute sensor_dev_attr_fan##offset##_input16 \
891 = SENSOR_ATTR(fan##offset##_input, S_IRUGO, \
892 show_fan16, NULL, offset - 1); \
893static struct sensor_device_attribute sensor_dev_attr_fan##offset##_min16 \
894 = SENSOR_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
895 show_fan16_min, set_fan16_min, offset - 1)
896
897show_fan16_offset(1);
898show_fan16_offset(2);
899show_fan16_offset(3);
c7f1f716
JD		 900show_fan16_offset(4);
901show_fan16_offset(5);
17d648bf 902
1da177e4 903/* Alarms */
5f2dc798
JD		 904static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
905 char *buf)
1da177e4
LT		 906{
907 struct it87_data *data = it87_update_device(dev);
68188ba7 908 return sprintf(buf, "%u\n", data->alarms);
1da177e4 909}
1d66c64c 910static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1da177e4 911
0124dd78
JD		 912static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
913 char *buf)
914{
915 int bitnr = to_sensor_dev_attr(attr)->index;
916 struct it87_data *data = it87_update_device(dev);
917 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
918}
919static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
920static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
921static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
922static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
923static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
924static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
925static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
926static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
927static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
928static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
929static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
930static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
931static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
932static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
933static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
934static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
935
d9b327c3
JD		 936static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
937 char *buf)
938{
939 int bitnr = to_sensor_dev_attr(attr)->index;
940 struct it87_data *data = it87_update_device(dev);
941 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
942}
943static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
944 const char *buf, size_t count)
945{
946 int bitnr = to_sensor_dev_attr(attr)->index;
947 struct it87_data *data = dev_get_drvdata(dev);
948 long val;
949
950 if (strict_strtol(buf, 10, &val) < 0
951 || (val != 0 && val != 1))
952 return -EINVAL;
953
954 mutex_lock(&data->update_lock);
955 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
956 if (val)
957 data->beeps |= (1 << bitnr);
958 else
959 data->beeps &= ~(1 << bitnr);
960 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
961 mutex_unlock(&data->update_lock);
962 return count;
963}
964
965static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
966 show_beep, set_beep, 1);
967static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
968static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
969static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
970static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
971static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
972static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
973static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
974/* fanX_beep writability is set later */
975static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
976static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
977static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
978static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
979static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
980static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
981 show_beep, set_beep, 2);
982static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
983static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
984
5f2dc798
JD		 985static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
986 char *buf)
1da177e4 987{
90d6619a 988 struct it87_data *data = dev_get_drvdata(dev);
a7be58a1 989 return sprintf(buf, "%u\n", data->vrm);
1da177e4 990}
5f2dc798
JD		 991static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
992 const char *buf, size_t count)
1da177e4 993{
b74f3fdd 994 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 995 u32 val;
996
997 val = simple_strtoul(buf, NULL, 10);
998 data->vrm = val;
999
1000 return count;
1001}
1002static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4 1003
5f2dc798
JD		 1004static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1005 char *buf)
1da177e4
LT		 1006{
1007 struct it87_data *data = it87_update_device(dev);
1008 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1009}
1010static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
87808be4 1011
b74f3fdd 1012static ssize_t show_name(struct device *dev, struct device_attribute
1013 *devattr, char *buf)
1014{
1015 struct it87_data *data = dev_get_drvdata(dev);
1016 return sprintf(buf, "%s\n", data->name);
1017}
1018static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1019
87808be4
JD		 1020static struct attribute *it87_attributes[] = {
1021 &sensor_dev_attr_in0_input.dev_attr.attr,
1022 &sensor_dev_attr_in1_input.dev_attr.attr,
1023 &sensor_dev_attr_in2_input.dev_attr.attr,
1024 &sensor_dev_attr_in3_input.dev_attr.attr,
1025 &sensor_dev_attr_in4_input.dev_attr.attr,
1026 &sensor_dev_attr_in5_input.dev_attr.attr,
1027 &sensor_dev_attr_in6_input.dev_attr.attr,
1028 &sensor_dev_attr_in7_input.dev_attr.attr,
1029 &sensor_dev_attr_in8_input.dev_attr.attr,
1030 &sensor_dev_attr_in0_min.dev_attr.attr,
1031 &sensor_dev_attr_in1_min.dev_attr.attr,
1032 &sensor_dev_attr_in2_min.dev_attr.attr,
1033 &sensor_dev_attr_in3_min.dev_attr.attr,
1034 &sensor_dev_attr_in4_min.dev_attr.attr,
1035 &sensor_dev_attr_in5_min.dev_attr.attr,
1036 &sensor_dev_attr_in6_min.dev_attr.attr,
1037 &sensor_dev_attr_in7_min.dev_attr.attr,
1038 &sensor_dev_attr_in0_max.dev_attr.attr,
1039 &sensor_dev_attr_in1_max.dev_attr.attr,
1040 &sensor_dev_attr_in2_max.dev_attr.attr,
1041 &sensor_dev_attr_in3_max.dev_attr.attr,
1042 &sensor_dev_attr_in4_max.dev_attr.attr,
1043 &sensor_dev_attr_in5_max.dev_attr.attr,
1044 &sensor_dev_attr_in6_max.dev_attr.attr,
1045 &sensor_dev_attr_in7_max.dev_attr.attr,
0124dd78
JD		 1046 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1047 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1048 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1049 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1050 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1051 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1052 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1053 &sensor_dev_attr_in7_alarm.dev_attr.attr,
87808be4
JD		 1054
1055 &sensor_dev_attr_temp1_input.dev_attr.attr,
1056 &sensor_dev_attr_temp2_input.dev_attr.attr,
1057 &sensor_dev_attr_temp3_input.dev_attr.attr,
1058 &sensor_dev_attr_temp1_max.dev_attr.attr,
1059 &sensor_dev_attr_temp2_max.dev_attr.attr,
1060 &sensor_dev_attr_temp3_max.dev_attr.attr,
1061 &sensor_dev_attr_temp1_min.dev_attr.attr,
1062 &sensor_dev_attr_temp2_min.dev_attr.attr,
1063 &sensor_dev_attr_temp3_min.dev_attr.attr,
1064 &sensor_dev_attr_temp1_type.dev_attr.attr,
1065 &sensor_dev_attr_temp2_type.dev_attr.attr,
1066 &sensor_dev_attr_temp3_type.dev_attr.attr,
0124dd78
JD		 1067 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1068 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1069 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
87808be4
JD		 1070
1071 &dev_attr_alarms.attr,
b74f3fdd 1072 &dev_attr_name.attr,
87808be4
JD		 1073 NULL
1074};
1075
1076static const struct attribute_group it87_group = {
1077 .attrs = it87_attributes,
1078};
1079
d9b327c3
JD		 1080static struct attribute *it87_attributes_beep[] = {
1081 &sensor_dev_attr_in0_beep.dev_attr.attr,
1082 &sensor_dev_attr_in1_beep.dev_attr.attr,
1083 &sensor_dev_attr_in2_beep.dev_attr.attr,
1084 &sensor_dev_attr_in3_beep.dev_attr.attr,
1085 &sensor_dev_attr_in4_beep.dev_attr.attr,
1086 &sensor_dev_attr_in5_beep.dev_attr.attr,
1087 &sensor_dev_attr_in6_beep.dev_attr.attr,
1088 &sensor_dev_attr_in7_beep.dev_attr.attr,
1089
1090 &sensor_dev_attr_temp1_beep.dev_attr.attr,
1091 &sensor_dev_attr_temp2_beep.dev_attr.attr,
1092 &sensor_dev_attr_temp3_beep.dev_attr.attr,
1093 NULL
1094};
1095
1096static const struct attribute_group it87_group_beep = {
1097 .attrs = it87_attributes_beep,
1098};
1099
723a0aa0 1100static struct attribute *it87_attributes_fan16[5][3+1] = { {
87808be4
JD		 1101 &sensor_dev_attr_fan1_input16.dev_attr.attr,
1102 &sensor_dev_attr_fan1_min16.dev_attr.attr,
723a0aa0
JD		 1103 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1104 NULL
1105}, {
87808be4
JD		 1106 &sensor_dev_attr_fan2_input16.dev_attr.attr,
1107 &sensor_dev_attr_fan2_min16.dev_attr.attr,
723a0aa0
JD		 1108 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1109 NULL
1110}, {
87808be4
JD		 1111 &sensor_dev_attr_fan3_input16.dev_attr.attr,
1112 &sensor_dev_attr_fan3_min16.dev_attr.attr,
723a0aa0
JD		 1113 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1114 NULL
1115}, {
c7f1f716
JD		 1116 &sensor_dev_attr_fan4_input16.dev_attr.attr,
1117 &sensor_dev_attr_fan4_min16.dev_attr.attr,
723a0aa0
JD		 1118 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1119 NULL
1120}, {
c7f1f716
JD		 1121 &sensor_dev_attr_fan5_input16.dev_attr.attr,
1122 &sensor_dev_attr_fan5_min16.dev_attr.attr,
723a0aa0
JD		 1123 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1124 NULL
1125} };
1126
1127static const struct attribute_group it87_group_fan16[5] = {
1128 { .attrs = it87_attributes_fan16[0] },
1129 { .attrs = it87_attributes_fan16[1] },
1130 { .attrs = it87_attributes_fan16[2] },
1131 { .attrs = it87_attributes_fan16[3] },
1132 { .attrs = it87_attributes_fan16[4] },
1133};
87808be4 1134
723a0aa0 1135static struct attribute *it87_attributes_fan[3][4+1] = { {
87808be4
JD		 1136 &sensor_dev_attr_fan1_input.dev_attr.attr,
1137 &sensor_dev_attr_fan1_min.dev_attr.attr,
1138 &sensor_dev_attr_fan1_div.dev_attr.attr,
723a0aa0
JD		 1139 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1140 NULL
1141}, {
87808be4
JD		 1142 &sensor_dev_attr_fan2_input.dev_attr.attr,
1143 &sensor_dev_attr_fan2_min.dev_attr.attr,
1144 &sensor_dev_attr_fan2_div.dev_attr.attr,
723a0aa0
JD		 1145 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1146 NULL
1147}, {
87808be4
JD		 1148 &sensor_dev_attr_fan3_input.dev_attr.attr,
1149 &sensor_dev_attr_fan3_min.dev_attr.attr,
1150 &sensor_dev_attr_fan3_div.dev_attr.attr,
0124dd78 1151 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
723a0aa0
JD		 1152 NULL
1153} };
1154
1155static const struct attribute_group it87_group_fan[3] = {
1156 { .attrs = it87_attributes_fan[0] },
1157 { .attrs = it87_attributes_fan[1] },
1158 { .attrs = it87_attributes_fan[2] },
1159};
1160
1161static const struct attribute_group *
1162it87_get_fan_group(const struct it87_data *data)
1163{
1164 return has_16bit_fans(data) ? it87_group_fan16 : it87_group_fan;
1165}
0124dd78 1166
723a0aa0 1167static struct attribute *it87_attributes_pwm[3][4+1] = { {
87808be4 1168 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
87808be4 1169 &sensor_dev_attr_pwm1.dev_attr.attr,
d5b0b5d6 1170 &dev_attr_pwm1_freq.attr,
94ac7ee6 1171 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1172 NULL
1173}, {
1174 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1175 &sensor_dev_attr_pwm2.dev_attr.attr,
1176 &dev_attr_pwm2_freq.attr,
94ac7ee6 1177 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1178 NULL
1179}, {
1180 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1181 &sensor_dev_attr_pwm3.dev_attr.attr,
1182 &dev_attr_pwm3_freq.attr,
94ac7ee6 1183 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1184 NULL
1185} };
87808be4 1186
723a0aa0
JD		 1187static const struct attribute_group it87_group_pwm[3] = {
1188 { .attrs = it87_attributes_pwm[0] },
1189 { .attrs = it87_attributes_pwm[1] },
1190 { .attrs = it87_attributes_pwm[2] },
1191};
1192
d9b327c3
JD		 1193static struct attribute *it87_attributes_fan_beep[] = {
1194 &sensor_dev_attr_fan1_beep.dev_attr.attr,
1195 &sensor_dev_attr_fan2_beep.dev_attr.attr,
1196 &sensor_dev_attr_fan3_beep.dev_attr.attr,
1197 &sensor_dev_attr_fan4_beep.dev_attr.attr,
1198 &sensor_dev_attr_fan5_beep.dev_attr.attr,
1199};
1200
6a8d7acf 1201static struct attribute *it87_attributes_vid[] = {
87808be4
JD		 1202 &dev_attr_vrm.attr,
1203 &dev_attr_cpu0_vid.attr,
1204 NULL
1205};
1206
6a8d7acf
JD		 1207static const struct attribute_group it87_group_vid = {
1208 .attrs = it87_attributes_vid,
87808be4 1209};
1da177e4 1210
2d8672c5 1211/* SuperIO detection - will change isa_address if a chip is found */
b74f3fdd 1212static int __init it87_find(unsigned short *address,
1213 struct it87_sio_data *sio_data)
1da177e4
LT		 1214{
1215 int err = -ENODEV;
b74f3fdd 1216 u16 chip_type;
98dd22c3 1217 const char *board_vendor, *board_name;
1da177e4
LT		 1218
1219 superio_enter();
67b671bc 1220 chip_type = force_id ? force_id : superio_inw(DEVID);
b74f3fdd 1221
1222 switch (chip_type) {
1223 case IT8705F_DEVID:
1224 sio_data->type = it87;
1225 break;
1226 case IT8712F_DEVID:
1227 sio_data->type = it8712;
1228 break;
1229 case IT8716F_DEVID:
1230 case IT8726F_DEVID:
1231 sio_data->type = it8716;
1232 break;
1233 case IT8718F_DEVID:
1234 sio_data->type = it8718;
1235 break;
b4da93e4
JMS		 1236 case IT8720F_DEVID:
1237 sio_data->type = it8720;
1238 break;
b74f3fdd 1239 case 0xffff: /* No device at all */
1240 goto exit;
1241 default:
1242 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%x)\n",
1243 chip_type);
1244 goto exit;
1245 }
1da177e4 1246
87673dd7 1247 superio_select(PME);
1da177e4
LT		 1248 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
1249 pr_info("it87: Device not activated, skipping\n");
1250 goto exit;
1251 }
1252
1253 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1254 if (*address == 0) {
1255 pr_info("it87: Base address not set, skipping\n");
1256 goto exit;
1257 }
1258
1259 err = 0;
0475169c 1260 sio_data->revision = superio_inb(DEVREV) & 0x0f;
1da177e4 1261 pr_info("it87: Found IT%04xF chip at 0x%x, revision %d\n",
0475169c 1262 chip_type, *address, sio_data->revision);
1da177e4 1263
87673dd7 1264 /* Read GPIO config and VID value from LDN 7 (GPIO) */
895ff267
JD		 1265 if (sio_data->type == it87) {
1266 /* The IT8705F doesn't have VID pins at all */
1267 sio_data->skip_vid = 1;
d9b327c3
JD		 1268
1269 /* The IT8705F has a different LD number for GPIO */
1270 superio_select(5);
1271 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
895ff267 1272 } else {
87673dd7
JD		 1273 int reg;
1274
1275 superio_select(GPIO);
895ff267
JD		 1276 /* We need at least 4 VID pins */
1277 reg = superio_inb(IT87_SIO_GPIO3_REG);
1278 if (reg & 0x0f) {
1279 pr_info("it87: VID is disabled (pins used for GPIO)\n");
1280 sio_data->skip_vid = 1;
1281 }
1282
591ec650
JD		 1283 /* Check if fan3 is there or not */
1284 if (reg & (1 << 6))
1285 sio_data->skip_pwm |= (1 << 2);
1286 if (reg & (1 << 7))
1287 sio_data->skip_fan |= (1 << 2);
1288
1289 /* Check if fan2 is there or not */
1290 reg = superio_inb(IT87_SIO_GPIO5_REG);
1291 if (reg & (1 << 1))
1292 sio_data->skip_pwm |= (1 << 1);
1293 if (reg & (1 << 2))
1294 sio_data->skip_fan |= (1 << 1);
1295
895ff267
JD		 1296 if ((sio_data->type == it8718 || sio_data->type == it8720)
1297 && !(sio_data->skip_vid))
b74f3fdd 1298 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
87673dd7
JD		 1299
1300 reg = superio_inb(IT87_SIO_PINX2_REG);
1301 if (reg & (1 << 0))
1302 pr_info("it87: in3 is VCC (+5V)\n");
1303 if (reg & (1 << 1))
1304 pr_info("it87: in7 is VCCH (+5V Stand-By)\n");
d9b327c3
JD		 1305
1306 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
87673dd7 1307 }
d9b327c3
JD		 1308 if (sio_data->beep_pin)
1309 pr_info("it87: Beeping is supported\n");
87673dd7 1310
98dd22c3
JD		 1311 /* Disable specific features based on DMI strings */
1312 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
1313 board_name = dmi_get_system_info(DMI_BOARD_NAME);
1314 if (board_vendor && board_name) {
1315 if (strcmp(board_vendor, "nVIDIA") == 0
1316 && strcmp(board_name, "FN68PT") == 0) {
1317 /* On the Shuttle SN68PT, FAN_CTL2 is apparently not
1318 connected to a fan, but to something else. One user
1319 has reported instant system power-off when changing
1320 the PWM2 duty cycle, so we disable it.
1321 I use the board name string as the trigger in case
1322 the same board is ever used in other systems. */
1323 pr_info("it87: Disabling pwm2 due to "
1324 "hardware constraints\n");
1325 sio_data->skip_pwm = (1 << 1);
1326 }
1327 }
1328
1da177e4
LT		 1329exit:
1330 superio_exit();
1331 return err;
1332}
1333
723a0aa0
JD		 1334static void it87_remove_files(struct device *dev)
1335{
1336 struct it87_data *data = platform_get_drvdata(pdev);
1337 struct it87_sio_data *sio_data = dev->platform_data;
1338 const struct attribute_group *fan_group = it87_get_fan_group(data);
1339 int i;
1340
1341 sysfs_remove_group(&dev->kobj, &it87_group);
d9b327c3
JD		 1342 if (sio_data->beep_pin)
1343 sysfs_remove_group(&dev->kobj, &it87_group_beep);
723a0aa0
JD		 1344 for (i = 0; i < 5; i++) {
1345 if (!(data->has_fan & (1 << i)))
1346 continue;
1347 sysfs_remove_group(&dev->kobj, &fan_group[i]);
d9b327c3
JD		 1348 if (sio_data->beep_pin)
1349 sysfs_remove_file(&dev->kobj,
1350 it87_attributes_fan_beep[i]);
723a0aa0
JD		 1351 }
1352 for (i = 0; i < 3; i++) {
1353 if (sio_data->skip_pwm & (1 << 0))
1354 continue;
1355 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
1356 }
6a8d7acf
JD		 1357 if (!sio_data->skip_vid)
1358 sysfs_remove_group(&dev->kobj, &it87_group_vid);
723a0aa0
JD		 1359}
1360
b74f3fdd 1361static int __devinit it87_probe(struct platform_device *pdev)
1da177e4 1362{
1da177e4 1363 struct it87_data *data;
b74f3fdd 1364 struct resource *res;
1365 struct device *dev = &pdev->dev;
1366 struct it87_sio_data *sio_data = dev->platform_data;
723a0aa0
JD		 1367 const struct attribute_group *fan_group;
1368 int err = 0, i;
1da177e4 1369 int enable_pwm_interface;
d9b327c3 1370 int fan_beep_need_rw;
b74f3fdd 1371 static const char *names[] = {
1372 "it87",
1373 "it8712",
1374 "it8716",
1375 "it8718",
b4da93e4 1376 "it8720",
b74f3fdd 1377 };
1378
1379 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
87b4b663 1380 if (!request_region(res->start, IT87_EC_EXTENT, DRVNAME)) {
b74f3fdd 1381 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1382 (unsigned long)res->start,
87b4b663 1383 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
8e9afcbb
JD		 1384 err = -EBUSY;
1385 goto ERROR0;
1386 }
1da177e4 1387
5f2dc798
JD		 1388 data = kzalloc(sizeof(struct it87_data), GFP_KERNEL);
1389 if (!data) {
1da177e4
LT		 1390 err = -ENOMEM;
1391 goto ERROR1;
1392 }
1da177e4 1393
b74f3fdd 1394 data->addr = res->start;
1395 data->type = sio_data->type;
0475169c 1396 data->revision = sio_data->revision;
b74f3fdd 1397 data->name = names[sio_data->type];
1da177e4
LT		 1398
1399 /* Now, we do the remaining detection. */
b74f3fdd 1400 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
1401 || it87_read_value(data, IT87_REG_CHIPID) != 0x90) {
8e9afcbb
JD		 1402 err = -ENODEV;
1403 goto ERROR2;
1da177e4
LT		 1404 }
1405
b74f3fdd 1406 platform_set_drvdata(pdev, data);
1da177e4 1407
9a61bf63 1408 mutex_init(&data->update_lock);
1da177e4 1409
1da177e4 1410 /* Check PWM configuration */
b74f3fdd 1411 enable_pwm_interface = it87_check_pwm(dev);
1da177e4
LT		 1412
1413 /* Initialize the IT87 chip */
b74f3fdd 1414 it87_init_device(pdev);
1da177e4
LT		 1415
1416 /* Register sysfs hooks */
5f2dc798
JD		 1417 err = sysfs_create_group(&dev->kobj, &it87_group);
1418 if (err)
b74f3fdd 1419 goto ERROR2;
17d648bf 1420
d9b327c3
JD		 1421 if (sio_data->beep_pin) {
1422 err = sysfs_create_group(&dev->kobj, &it87_group_beep);
1423 if (err)
1424 goto ERROR4;
1425 }
1426
9060f8bd 1427 /* Do not create fan files for disabled fans */
723a0aa0 1428 fan_group = it87_get_fan_group(data);
d9b327c3 1429 fan_beep_need_rw = 1;
723a0aa0
JD		 1430 for (i = 0; i < 5; i++) {
1431 if (!(data->has_fan & (1 << i)))
1432 continue;
1433 err = sysfs_create_group(&dev->kobj, &fan_group[i]);
1434 if (err)
1435 goto ERROR4;
d9b327c3
JD		 1436
1437 if (sio_data->beep_pin) {
1438 err = sysfs_create_file(&dev->kobj,
1439 it87_attributes_fan_beep[i]);
1440 if (err)
1441 goto ERROR4;
1442 if (!fan_beep_need_rw)
1443 continue;
1444
1445 /* As we have a single beep enable bit for all fans,
1446 * only the first enabled fan has a writable attribute
1447 * for it. */
1448 if (sysfs_chmod_file(&dev->kobj,
1449 it87_attributes_fan_beep[i],
1450 S_IRUGO | S_IWUSR))
1451 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
1452 i + 1);
1453 fan_beep_need_rw = 0;
1454 }
17d648bf
JD		 1455 }
1456
1da177e4 1457 if (enable_pwm_interface) {
723a0aa0
JD		 1458 for (i = 0; i < 3; i++) {
1459 if (sio_data->skip_pwm & (1 << i))
1460 continue;
1461 err = sysfs_create_group(&dev->kobj,
1462 &it87_group_pwm[i]);
1463 if (err)
98dd22c3
JD		 1464 goto ERROR4;
1465 }
1da177e4
LT		 1466 }
1467
895ff267 1468 if (!sio_data->skip_vid) {
303760b4 1469 data->vrm = vid_which_vrm();
87673dd7 1470 /* VID reading from Super-I/O config space if available */
b74f3fdd 1471 data->vid = sio_data->vid_value;
6a8d7acf
JD		 1472 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
1473 if (err)
87808be4
JD		 1474 goto ERROR4;
1475 }
1476
1beeffe4
TJ		 1477 data->hwmon_dev = hwmon_device_register(dev);
1478 if (IS_ERR(data->hwmon_dev)) {
1479 err = PTR_ERR(data->hwmon_dev);
87808be4 1480 goto ERROR4;
1da177e4
LT		 1481 }
1482
1483 return 0;
1484
87808be4 1485ERROR4:
723a0aa0 1486 it87_remove_files(dev);
1da177e4 1487ERROR2:
b74f3fdd 1488 platform_set_drvdata(pdev, NULL);
1da177e4
LT		 1489 kfree(data);
1490ERROR1:
87b4b663 1491 release_region(res->start, IT87_EC_EXTENT);
1da177e4
LT		 1492ERROR0:
1493 return err;
1494}
1495
b74f3fdd 1496static int __devexit it87_remove(struct platform_device *pdev)
1da177e4 1497{
b74f3fdd 1498 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 1499
1beeffe4 1500 hwmon_device_unregister(data->hwmon_dev);
723a0aa0 1501 it87_remove_files(&pdev->dev);
943b0830 1502
87b4b663 1503 release_region(data->addr, IT87_EC_EXTENT);
b74f3fdd 1504 platform_set_drvdata(pdev, NULL);
943b0830 1505 kfree(data);
1da177e4
LT		 1506
1507 return 0;
1508}
1509
7f999aa7 1510/* Must be called with data->update_lock held, except during initialization.
1da177e4
LT		 1511 We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1512 would slow down the IT87 access and should not be necessary. */
b74f3fdd 1513static int it87_read_value(struct it87_data *data, u8 reg)
1da177e4 1514{
b74f3fdd 1515 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
1516 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT		 1517}
1518
7f999aa7 1519/* Must be called with data->update_lock held, except during initialization.
1da177e4
LT		 1520 We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1521 would slow down the IT87 access and should not be necessary. */
b74f3fdd 1522static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
1da177e4 1523{
b74f3fdd 1524 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
1525 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT		 1526}
1527
1528/* Return 1 if and only if the PWM interface is safe to use */
b74f3fdd 1529static int __devinit it87_check_pwm(struct device *dev)
1da177e4 1530{
b74f3fdd 1531 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 1532 /* Some BIOSes fail to correctly configure the IT87 fans. All fans off
1533 * and polarity set to active low is sign that this is the case so we
1534 * disable pwm control to protect the user. */
b74f3fdd 1535 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1da177e4
LT		 1536 if ((tmp & 0x87) == 0) {
1537 if (fix_pwm_polarity) {
1538 /* The user asks us to attempt a chip reconfiguration.
1539 * This means switching to active high polarity and
1540 * inverting all fan speed values. */
1541 int i;
1542 u8 pwm[3];
1543
1544 for (i = 0; i < 3; i++)
b74f3fdd 1545 pwm[i] = it87_read_value(data,
1da177e4
LT		 1546 IT87_REG_PWM(i));
1547
1548 /* If any fan is in automatic pwm mode, the polarity
1549 * might be correct, as suspicious as it seems, so we
1550 * better don't change anything (but still disable the
1551 * PWM interface). */
1552 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
b74f3fdd 1553 dev_info(dev, "Reconfiguring PWM to "
1da177e4 1554 "active high polarity\n");
b74f3fdd 1555 it87_write_value(data, IT87_REG_FAN_CTL,
1da177e4
LT		 1556 tmp | 0x87);
1557 for (i = 0; i < 3; i++)
b74f3fdd 1558 it87_write_value(data,
1da177e4
LT		 1559 IT87_REG_PWM(i),
1560 0x7f & ~pwm[i]);
1561 return 1;
1562 }
1563
b74f3fdd 1564 dev_info(dev, "PWM configuration is "
1da177e4
LT		 1565 "too broken to be fixed\n");
1566 }
1567
b74f3fdd 1568 dev_info(dev, "Detected broken BIOS "
1da177e4
LT		 1569 "defaults, disabling PWM interface\n");
1570 return 0;
1571 } else if (fix_pwm_polarity) {
b74f3fdd 1572 dev_info(dev, "PWM configuration looks "
1da177e4
LT		 1573 "sane, won't touch\n");
1574 }
1575
1576 return 1;
1577}
1578
1579/* Called when we have found a new IT87. */
b74f3fdd 1580static void __devinit it87_init_device(struct platform_device *pdev)
1da177e4 1581{
591ec650 1582 struct it87_sio_data *sio_data = pdev->dev.platform_data;
b74f3fdd 1583 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 1584 int tmp, i;
591ec650 1585 u8 mask;
1da177e4 1586
b99883dc
JD		 1587 /* For each PWM channel:
1588 * - If it is in automatic mode, setting to manual mode should set
1589 * the fan to full speed by default.
1590 * - If it is in manual mode, we need a mapping to temperature
1591 * channels to use when later setting to automatic mode later.
1592 * Use a 1:1 mapping by default (we are clueless.)
1593 * In both cases, the value can (and should) be changed by the user
1594 * prior to switching to a different mode. */
1da177e4 1595 for (i = 0; i < 3; i++) {
b99883dc
JD		 1596 data->pwm_temp_map[i] = i;
1597 data->pwm_duty[i] = 0x7f; /* Full speed */
1da177e4
LT		 1598 }
1599
c5df9b7a
JD		 1600 /* Some chips seem to have default value 0xff for all limit
1601 * registers. For low voltage limits it makes no sense and triggers
1602 * alarms, so change to 0 instead. For high temperature limits, it
1603 * means -1 degree C, which surprisingly doesn't trigger an alarm,
1604 * but is still confusing, so change to 127 degrees C. */
1605 for (i = 0; i < 8; i++) {
b74f3fdd 1606 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
c5df9b7a 1607 if (tmp == 0xff)
b74f3fdd 1608 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
c5df9b7a
JD		 1609 }
1610 for (i = 0; i < 3; i++) {
b74f3fdd 1611 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
c5df9b7a 1612 if (tmp == 0xff)
b74f3fdd 1613 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
c5df9b7a
JD		 1614 }
1615
77fa49d9 1616 /* Check if temperature channels are reset manually or by some reason */
b74f3fdd 1617 tmp = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1da177e4
LT		 1618 if ((tmp & 0x3f) == 0) {
1619 /* Temp1,Temp3=thermistor; Temp2=thermal diode */
1620 tmp = (tmp & 0xc0) | 0x2a;
b74f3fdd 1621 it87_write_value(data, IT87_REG_TEMP_ENABLE, tmp);
1da177e4
LT		 1622 }
1623 data->sensor = tmp;
1624
1625 /* Check if voltage monitors are reset manually or by some reason */
b74f3fdd 1626 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
1da177e4
LT		 1627 if ((tmp & 0xff) == 0) {
1628 /* Enable all voltage monitors */
b74f3fdd 1629 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
1da177e4
LT		 1630 }
1631
1632 /* Check if tachometers are reset manually or by some reason */
591ec650 1633 mask = 0x70 & ~(sio_data->skip_fan << 4);
b74f3fdd 1634 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
591ec650 1635 if ((data->fan_main_ctrl & mask) == 0) {
1da177e4 1636 /* Enable all fan tachometers */
591ec650 1637 data->fan_main_ctrl |= mask;
5f2dc798
JD		 1638 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1639 data->fan_main_ctrl);
1da177e4 1640 }
9060f8bd 1641 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
1da177e4 1642
17d648bf 1643 /* Set tachometers to 16-bit mode if needed */
0475169c 1644 if (has_16bit_fans(data)) {
b74f3fdd 1645 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
9060f8bd 1646 if (~tmp & 0x07 & data->has_fan) {
b74f3fdd 1647 dev_dbg(&pdev->dev,
17d648bf 1648 "Setting fan1-3 to 16-bit mode\n");
b74f3fdd 1649 it87_write_value(data, IT87_REG_FAN_16BIT,
17d648bf
JD		 1650 tmp | 0x07);
1651 }
816d8c6a
AP		 1652 /* IT8705F only supports three fans. */
1653 if (data->type != it87) {
1654 if (tmp & (1 << 4))
1655 data->has_fan |= (1 << 3); /* fan4 enabled */
1656 if (tmp & (1 << 5))
1657 data->has_fan |= (1 << 4); /* fan5 enabled */
1658 }
17d648bf
JD		 1659 }
1660
591ec650
JD		 1661 /* Fan input pins may be used for alternative functions */
1662 data->has_fan &= ~sio_data->skip_fan;
1663
1da177e4 1664 /* Start monitoring */
b74f3fdd 1665 it87_write_value(data, IT87_REG_CONFIG,
1666 (it87_read_value(data, IT87_REG_CONFIG) & 0x36)
1da177e4
LT		 1667 | (update_vbat ? 0x41 : 0x01));
1668}
1669
b99883dc
JD		 1670static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
1671{
1672 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
1673 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
1674 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
1675 else /* Manual mode */
1676 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
1677}
1678
1da177e4
LT		 1679static struct it87_data *it87_update_device(struct device *dev)
1680{
b74f3fdd 1681 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 1682 int i;
1683
9a61bf63 1684 mutex_lock(&data->update_lock);
1da177e4
LT		 1685
1686 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1687 || !data->valid) {
1da177e4
LT		 1688 if (update_vbat) {
1689 /* Cleared after each update, so reenable. Value
5f2dc798 1690 returned by this read will be previous value */
b74f3fdd 1691 it87_write_value(data, IT87_REG_CONFIG,
5f2dc798 1692 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1da177e4
LT		 1693 }
1694 for (i = 0; i <= 7; i++) {
1695 data->in[i] =
5f2dc798 1696 it87_read_value(data, IT87_REG_VIN(i));
1da177e4 1697 data->in_min[i] =
5f2dc798 1698 it87_read_value(data, IT87_REG_VIN_MIN(i));
1da177e4 1699 data->in_max[i] =
5f2dc798 1700 it87_read_value(data, IT87_REG_VIN_MAX(i));
1da177e4 1701 }
3543a53f 1702 /* in8 (battery) has no limit registers */
5f2dc798 1703 data->in[8] = it87_read_value(data, IT87_REG_VIN(8));
1da177e4 1704
c7f1f716 1705 for (i = 0; i < 5; i++) {
9060f8bd
JD		 1706 /* Skip disabled fans */
1707 if (!(data->has_fan & (1 << i)))
1708 continue;
1709
1da177e4 1710 data->fan_min[i] =
5f2dc798 1711 it87_read_value(data, IT87_REG_FAN_MIN[i]);
b74f3fdd 1712 data->fan[i] = it87_read_value(data,
c7f1f716 1713 IT87_REG_FAN[i]);
17d648bf 1714 /* Add high byte if in 16-bit mode */
0475169c 1715 if (has_16bit_fans(data)) {
b74f3fdd 1716 data->fan[i] |= it87_read_value(data,
c7f1f716 1717 IT87_REG_FANX[i]) << 8;
b74f3fdd 1718 data->fan_min[i] |= it87_read_value(data,
c7f1f716 1719 IT87_REG_FANX_MIN[i]) << 8;
17d648bf 1720 }
1da177e4
LT		 1721 }
1722 for (i = 0; i < 3; i++) {
1723 data->temp[i] =
5f2dc798 1724 it87_read_value(data, IT87_REG_TEMP(i));
1da177e4 1725 data->temp_high[i] =
5f2dc798 1726 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
1da177e4 1727 data->temp_low[i] =
5f2dc798 1728 it87_read_value(data, IT87_REG_TEMP_LOW(i));
1da177e4
LT		 1729 }
1730
17d648bf 1731 /* Newer chips don't have clock dividers */
0475169c 1732 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
b74f3fdd 1733 i = it87_read_value(data, IT87_REG_FAN_DIV);
17d648bf
JD		 1734 data->fan_div[0] = i & 0x07;
1735 data->fan_div[1] = (i >> 3) & 0x07;
1736 data->fan_div[2] = (i & 0x40) ? 3 : 1;
1737 }
1da177e4
LT		 1738
1739 data->alarms =
b74f3fdd 1740 it87_read_value(data, IT87_REG_ALARM1) |
1741 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
1742 (it87_read_value(data, IT87_REG_ALARM3) << 16);
d9b327c3 1743 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
b99883dc 1744
b74f3fdd 1745 data->fan_main_ctrl = it87_read_value(data,
1746 IT87_REG_FAN_MAIN_CTRL);
1747 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
b99883dc
JD		 1748 for (i = 0; i < 3; i++)
1749 it87_update_pwm_ctrl(data, i);
b74f3fdd 1750
1751 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
0475169c 1752 /* The 8705 does not have VID capability.
b4da93e4
JMS		 1753 The 8718 and the 8720 don't use IT87_REG_VID for the
1754 same purpose. */
17d648bf 1755 if (data->type == it8712 || data->type == it8716) {
b74f3fdd 1756 data->vid = it87_read_value(data, IT87_REG_VID);
17d648bf
JD		 1757 /* The older IT8712F revisions had only 5 VID pins,
1758 but we assume it is always safe to read 6 bits. */
1759 data->vid &= 0x3f;
1da177e4
LT		 1760 }
1761 data->last_updated = jiffies;
1762 data->valid = 1;
1763 }
1764
9a61bf63 1765 mutex_unlock(&data->update_lock);
1da177e4
LT		 1766
1767 return data;
1768}
1769
b74f3fdd 1770static int __init it87_device_add(unsigned short address,
1771 const struct it87_sio_data *sio_data)
1772{
1773 struct resource res = {
87b4b663
BH		 1774 .start = address + IT87_EC_OFFSET,
1775 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
b74f3fdd 1776 .name = DRVNAME,
1777 .flags = IORESOURCE_IO,
1778 };
1779 int err;
1780
b9acb64a
JD		 1781 err = acpi_check_resource_conflict(&res);
1782 if (err)
1783 goto exit;
1784
b74f3fdd 1785 pdev = platform_device_alloc(DRVNAME, address);
1786 if (!pdev) {
1787 err = -ENOMEM;
1788 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1789 goto exit;
1790 }
1791
1792 err = platform_device_add_resources(pdev, &res, 1);
1793 if (err) {
1794 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1795 "(%d)\n", err);
1796 goto exit_device_put;
1797 }
1798
1799 err = platform_device_add_data(pdev, sio_data,
1800 sizeof(struct it87_sio_data));
1801 if (err) {
1802 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1803 goto exit_device_put;
1804 }
1805
1806 err = platform_device_add(pdev);
1807 if (err) {
1808 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1809 err);
1810 goto exit_device_put;
1811 }
1812
1813 return 0;
1814
1815exit_device_put:
1816 platform_device_put(pdev);
1817exit:
1818 return err;
1819}
1820
1da177e4
LT		 1821static int __init sm_it87_init(void)
1822{
b74f3fdd 1823 int err;
5f2dc798 1824 unsigned short isa_address = 0;
b74f3fdd 1825 struct it87_sio_data sio_data;
1826
98dd22c3 1827 memset(&sio_data, 0, sizeof(struct it87_sio_data));
b74f3fdd 1828 err = it87_find(&isa_address, &sio_data);
1829 if (err)
1830 return err;
1831 err = platform_driver_register(&it87_driver);
1832 if (err)
1833 return err;
fde09509 1834
b74f3fdd 1835 err = it87_device_add(isa_address, &sio_data);
5f2dc798 1836 if (err) {
b74f3fdd 1837 platform_driver_unregister(&it87_driver);
1838 return err;
1839 }
1840
1841 return 0;
1da177e4
LT		 1842}
1843
1844static void __exit sm_it87_exit(void)
1845{
b74f3fdd 1846 platform_device_unregister(pdev);
1847 platform_driver_unregister(&it87_driver);
1da177e4
LT		 1848}
1849
1850
f1d8e332 1851MODULE_AUTHOR("Chris Gauthron, "
b19367c6 1852 "Jean Delvare <khali@linux-fr.org>");
b4da93e4 1853MODULE_DESCRIPTION("IT8705F/8712F/8716F/8718F/8720F/8726F, SiS950 driver");
1da177e4
LT		 1854module_param(update_vbat, bool, 0);
1855MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
1856module_param(fix_pwm_polarity, bool, 0);
5f2dc798
JD		 1857MODULE_PARM_DESC(fix_pwm_polarity,
1858 "Force PWM polarity to active high (DANGEROUS)");
1da177e4
LT		 1859MODULE_LICENSE("GPL");
1860
1861module_init(sm_it87_init);
1862module_exit(sm_it87_exit);
Linux 6.x block layer and io_uring tree(s)