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hwmon: Driver for Maxim MAX6697 and compatibles
[linux-2.6-block.git] / drivers / hwmon / it87.c
CommitLineData
1da177e4 1/*
5f2dc798
JD		 2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring.
4 *
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
8 * Fan Controller)
9 *
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
12 *
13 * Supports: IT8705F Super I/O chip w/LPC interface
14 * IT8712F Super I/O chip w/LPC interface
15 * IT8716F Super I/O chip w/LPC interface
16 * IT8718F Super I/O chip w/LPC interface
17 * IT8720F Super I/O chip w/LPC interface
44c1bcd4 18 * IT8721F Super I/O chip w/LPC interface
5f2dc798 19 * IT8726F Super I/O chip w/LPC interface
16b5dda2 20 * IT8728F Super I/O chip w/LPC interface
44c1bcd4 21 * IT8758E Super I/O chip w/LPC interface
0531d98b
GR		 22 * IT8782F Super I/O chip w/LPC interface
23 * IT8783E/F Super I/O chip w/LPC interface
5f2dc798
JD		 24 * Sis950 A clone of the IT8705F
25 *
26 * Copyright (C) 2001 Chris Gauthron
27 * Copyright (C) 2005-2010 Jean Delvare <khali@linux-fr.org>
28 *
29 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License as published by
31 * the Free Software Foundation; either version 2 of the License, or
32 * (at your option) any later version.
33 *
34 * This program is distributed in the hope that it will be useful,
35 * but WITHOUT ANY WARRANTY; without even the implied warranty of
36 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
37 * GNU General Public License for more details.
38 *
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
42 */
1da177e4 43
a8ca1037
JP		 44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
1da177e4
LT		 46#include <linux/module.h>
47#include <linux/init.h>
48#include <linux/slab.h>
49#include <linux/jiffies.h>
b74f3fdd 50#include <linux/platform_device.h>
943b0830 51#include <linux/hwmon.h>
303760b4
JD		 52#include <linux/hwmon-sysfs.h>
53#include <linux/hwmon-vid.h>
943b0830 54#include <linux/err.h>
9a61bf63 55#include <linux/mutex.h>
87808be4 56#include <linux/sysfs.h>
98dd22c3
JD		 57#include <linux/string.h>
58#include <linux/dmi.h>
b9acb64a 59#include <linux/acpi.h>
6055fae8 60#include <linux/io.h>
1da177e4 61
b74f3fdd 62#define DRVNAME "it87"
1da177e4 63
0531d98b
GR		 64enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8782,
65 it8783 };
1da177e4 66
67b671bc
JD		 67static unsigned short force_id;
68module_param(force_id, ushort, 0);
69MODULE_PARM_DESC(force_id, "Override the detected device ID");
70
b74f3fdd 71static struct platform_device *pdev;
72
1da177e4
LT		 73#define REG 0x2e /* The register to read/write */
74#define DEV 0x07 /* Register: Logical device select */
75#define VAL 0x2f /* The value to read/write */
76#define PME 0x04 /* The device with the fan registers in it */
b4da93e4
JMS		 77
78/* The device with the IT8718F/IT8720F VID value in it */
79#define GPIO 0x07
80
1da177e4
LT		 81#define DEVID 0x20 /* Register: Device ID */
82#define DEVREV 0x22 /* Register: Device Revision */
83
5b0380c9 84static inline int superio_inb(int reg)
1da177e4
LT		 85{
86 outb(reg, REG);
87 return inb(VAL);
88}
89
5b0380c9 90static inline void superio_outb(int reg, int val)
436cad2a
JD		 91{
92 outb(reg, REG);
93 outb(val, VAL);
94}
95
1da177e4
LT		 96static int superio_inw(int reg)
97{
98 int val;
99 outb(reg++, REG);
100 val = inb(VAL) << 8;
101 outb(reg, REG);
102 val |= inb(VAL);
103 return val;
104}
105
5b0380c9 106static inline void superio_select(int ldn)
1da177e4
LT		 107{
108 outb(DEV, REG);
87673dd7 109 outb(ldn, VAL);
1da177e4
LT		 110}
111
5b0380c9 112static inline int superio_enter(void)
1da177e4 113{
5b0380c9
NG		 114 /*
115 * Try to reserve REG and REG + 1 for exclusive access.
116 */
117 if (!request_muxed_region(REG, 2, DRVNAME))
118 return -EBUSY;
119
1da177e4
LT		 120 outb(0x87, REG);
121 outb(0x01, REG);
122 outb(0x55, REG);
123 outb(0x55, REG);
5b0380c9 124 return 0;
1da177e4
LT		 125}
126
5b0380c9 127static inline void superio_exit(void)
1da177e4
LT		 128{
129 outb(0x02, REG);
130 outb(0x02, VAL);
5b0380c9 131 release_region(REG, 2);
1da177e4
LT		 132}
133
87673dd7 134/* Logical device 4 registers */
1da177e4
LT		 135#define IT8712F_DEVID 0x8712
136#define IT8705F_DEVID 0x8705
17d648bf 137#define IT8716F_DEVID 0x8716
87673dd7 138#define IT8718F_DEVID 0x8718
b4da93e4 139#define IT8720F_DEVID 0x8720
44c1bcd4 140#define IT8721F_DEVID 0x8721
08a8f6e9 141#define IT8726F_DEVID 0x8726
16b5dda2 142#define IT8728F_DEVID 0x8728
0531d98b
GR		 143#define IT8782F_DEVID 0x8782
144#define IT8783E_DEVID 0x8783
1da177e4
LT		 145#define IT87_ACT_REG 0x30
146#define IT87_BASE_REG 0x60
147
87673dd7 148/* Logical device 7 registers (IT8712F and later) */
0531d98b 149#define IT87_SIO_GPIO1_REG 0x25
895ff267 150#define IT87_SIO_GPIO3_REG 0x27
591ec650 151#define IT87_SIO_GPIO5_REG 0x29
0531d98b 152#define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
87673dd7 153#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
0531d98b 154#define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
87673dd7 155#define IT87_SIO_VID_REG 0xfc /* VID value */
d9b327c3 156#define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
87673dd7 157
1da177e4 158/* Update battery voltage after every reading if true */
90ab5ee9 159static bool update_vbat;
1da177e4
LT		 160
161/* Not all BIOSes properly configure the PWM registers */
90ab5ee9 162static bool fix_pwm_polarity;
1da177e4 163
1da177e4
LT		 164/* Many IT87 constants specified below */
165
166/* Length of ISA address segment */
167#define IT87_EXTENT 8
168
87b4b663
BH		 169/* Length of ISA address segment for Environmental Controller */
170#define IT87_EC_EXTENT 2
171
172/* Offset of EC registers from ISA base address */
173#define IT87_EC_OFFSET 5
174
175/* Where are the ISA address/data registers relative to the EC base address */
176#define IT87_ADDR_REG_OFFSET 0
177#define IT87_DATA_REG_OFFSET 1
1da177e4
LT		 178
179/*----- The IT87 registers -----*/
180
181#define IT87_REG_CONFIG 0x00
182
183#define IT87_REG_ALARM1 0x01
184#define IT87_REG_ALARM2 0x02
185#define IT87_REG_ALARM3 0x03
186
4a0d71cf
GR		 187/*
188 * The IT8718F and IT8720F have the VID value in a different register, in
189 * Super-I/O configuration space.
190 */
1da177e4 191#define IT87_REG_VID 0x0a
4a0d71cf
GR		 192/*
193 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
194 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
195 * mode.
196 */
1da177e4 197#define IT87_REG_FAN_DIV 0x0b
17d648bf 198#define IT87_REG_FAN_16BIT 0x0c
1da177e4
LT		 199
200/* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
201
c7f1f716
JD		 202static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
203static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 };
204static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 };
205static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
161d898a
GR		 206static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
207
1da177e4
LT		 208#define IT87_REG_FAN_MAIN_CTRL 0x13
209#define IT87_REG_FAN_CTL 0x14
210#define IT87_REG_PWM(nr) (0x15 + (nr))
6229cdb2 211#define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8)
1da177e4
LT		 212
213#define IT87_REG_VIN(nr) (0x20 + (nr))
214#define IT87_REG_TEMP(nr) (0x29 + (nr))
215
216#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
217#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
218#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
219#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
220
1da177e4
LT		 221#define IT87_REG_VIN_ENABLE 0x50
222#define IT87_REG_TEMP_ENABLE 0x51
4573acbc 223#define IT87_REG_TEMP_EXTRA 0x55
d9b327c3 224#define IT87_REG_BEEP_ENABLE 0x5c
1da177e4
LT		 225
226#define IT87_REG_CHIPID 0x58
227
4f3f51bc
JD		 228#define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
229#define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i))
230
483db43e
GR		 231struct it87_devices {
232 const char *name;
233 u16 features;
19529784
GR		 234 u8 peci_mask;
235 u8 old_peci_mask;
483db43e
GR		 236};
237
238#define FEAT_12MV_ADC (1 << 0)
239#define FEAT_NEWER_AUTOPWM (1 << 1)
240#define FEAT_OLD_AUTOPWM (1 << 2)
241#define FEAT_16BIT_FANS (1 << 3)
242#define FEAT_TEMP_OFFSET (1 << 4)
5d8d2f2b 243#define FEAT_TEMP_PECI (1 << 5)
19529784 244#define FEAT_TEMP_OLD_PECI (1 << 6)
483db43e
GR		 245
246static const struct it87_devices it87_devices[] = {
247 [it87] = {
248 .name = "it87",
249 .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */
250 },
251 [it8712] = {
252 .name = "it8712",
253 .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */
254 },
255 [it8716] = {
256 .name = "it8716",
257 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET,
258 },
259 [it8718] = {
260 .name = "it8718",
19529784
GR		 261 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
262 | FEAT_TEMP_OLD_PECI,
263 .old_peci_mask = 0x4,
483db43e
GR		 264 },
265 [it8720] = {
266 .name = "it8720",
19529784
GR		 267 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
268 | FEAT_TEMP_OLD_PECI,
269 .old_peci_mask = 0x4,
483db43e
GR		 270 },
271 [it8721] = {
272 .name = "it8721",
273 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
19529784 274 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI,
5d8d2f2b 275 .peci_mask = 0x05,
19529784 276 .old_peci_mask = 0x02, /* Actually reports PCH */
483db43e
GR		 277 },
278 [it8728] = {
279 .name = "it8728",
280 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
5d8d2f2b
GR		 281 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI,
282 .peci_mask = 0x07,
483db43e
GR		 283 },
284 [it8782] = {
285 .name = "it8782",
19529784
GR		 286 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
287 | FEAT_TEMP_OLD_PECI,
288 .old_peci_mask = 0x4,
483db43e
GR		 289 },
290 [it8783] = {
291 .name = "it8783",
19529784
GR		 292 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
293 | FEAT_TEMP_OLD_PECI,
294 .old_peci_mask = 0x4,
483db43e
GR		 295 },
296};
297
298#define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS)
299#define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC)
300#define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
301#define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM)
302#define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET)
5d8d2f2b
GR		 303#define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
304 ((data)->peci_mask & (1 << nr)))
19529784
GR		 305#define has_temp_old_peci(data, nr) \
306 (((data)->features & FEAT_TEMP_OLD_PECI) && \
307 ((data)->old_peci_mask & (1 << nr)))
1da177e4 308
b74f3fdd 309struct it87_sio_data {
310 enum chips type;
311 /* Values read from Super-I/O config space */
0475169c 312 u8 revision;
b74f3fdd 313 u8 vid_value;
d9b327c3 314 u8 beep_pin;
738e5e05 315 u8 internal; /* Internal sensors can be labeled */
591ec650 316 /* Features skipped based on config or DMI */
9172b5d1 317 u16 skip_in;
895ff267 318 u8 skip_vid;
591ec650 319 u8 skip_fan;
98dd22c3 320 u8 skip_pwm;
4573acbc 321 u8 skip_temp;
b74f3fdd 322};
323
4a0d71cf
GR		 324/*
325 * For each registered chip, we need to keep some data in memory.
326 * The structure is dynamically allocated.
327 */
1da177e4 328struct it87_data {
1beeffe4 329 struct device *hwmon_dev;
1da177e4 330 enum chips type;
483db43e 331 u16 features;
19529784
GR		 332 u8 peci_mask;
333 u8 old_peci_mask;
1da177e4 334
b74f3fdd 335 unsigned short addr;
336 const char *name;
9a61bf63 337 struct mutex update_lock;
1da177e4
LT		 338 char valid; /* !=0 if following fields are valid */
339 unsigned long last_updated; /* In jiffies */
340
44c1bcd4 341 u16 in_scaled; /* Internal voltage sensors are scaled */
929c6a56 342 u8 in[9][3]; /* [nr][0]=in, [1]=min, [2]=max */
9060f8bd 343 u8 has_fan; /* Bitfield, fans enabled */
e1169ba0 344 u16 fan[5][2]; /* Register values, [nr][0]=fan, [1]=min */
4573acbc 345 u8 has_temp; /* Bitfield, temp sensors enabled */
161d898a 346 s8 temp[3][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
19529784
GR		 347 u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */
348 u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */
1da177e4
LT		 349 u8 fan_div[3]; /* Register encoding, shifted right */
350 u8 vid; /* Register encoding, combined */
a7be58a1 351 u8 vrm;
1da177e4 352 u32 alarms; /* Register encoding, combined */
d9b327c3 353 u8 beeps; /* Register encoding */
1da177e4 354 u8 fan_main_ctrl; /* Register value */
f8d0c19a 355 u8 fan_ctl; /* Register value */
b99883dc 356
4a0d71cf
GR		 357 /*
358 * The following 3 arrays correspond to the same registers up to
6229cdb2
JD		 359 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
360 * 7, and we want to preserve settings on mode changes, so we have
361 * to track all values separately.
362 * Starting with the IT8721F, the manual PWM duty cycles are stored
363 * in separate registers (8-bit values), so the separate tracking
364 * is no longer needed, but it is still done to keep the driver
4a0d71cf
GR		 365 * simple.
366 */
b99883dc 367 u8 pwm_ctrl[3]; /* Register value */
6229cdb2 368 u8 pwm_duty[3]; /* Manual PWM value set by user */
b99883dc 369 u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */
4f3f51bc
JD		 370
371 /* Automatic fan speed control registers */
372 u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */
373 s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */
1da177e4 374};
0df6454d 375
0531d98b 376static int adc_lsb(const struct it87_data *data, int nr)
44c1bcd4 377{
0531d98b
GR		 378 int lsb = has_12mv_adc(data) ? 12 : 16;
379 if (data->in_scaled & (1 << nr))
380 lsb <<= 1;
381 return lsb;
382}
44c1bcd4 383
0531d98b
GR		 384static u8 in_to_reg(const struct it87_data *data, int nr, long val)
385{
386 val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr));
2a844c14 387 return clamp_val(val, 0, 255);
44c1bcd4
JD		 388}
389
390static int in_from_reg(const struct it87_data *data, int nr, int val)
391{
0531d98b 392 return val * adc_lsb(data, nr);
44c1bcd4 393}
0df6454d
JD		 394
395static inline u8 FAN_TO_REG(long rpm, int div)
396{
397 if (rpm == 0)
398 return 255;
2a844c14
GR		 399 rpm = clamp_val(rpm, 1, 1000000);
400 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
0df6454d
JD		 401}
402
403static inline u16 FAN16_TO_REG(long rpm)
404{
405 if (rpm == 0)
406 return 0xffff;
2a844c14 407 return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
0df6454d
JD		 408}
409
410#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
411 1350000 / ((val) * (div)))
412/* The divider is fixed to 2 in 16-bit mode */
413#define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
414 1350000 / ((val) * 2))
415
2a844c14
GR		 416#define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
417 ((val) + 500) / 1000), -128, 127))
0df6454d
JD		 418#define TEMP_FROM_REG(val) ((val) * 1000)
419
44c1bcd4
JD		 420static u8 pwm_to_reg(const struct it87_data *data, long val)
421{
16b5dda2 422 if (has_newer_autopwm(data))
44c1bcd4
JD		 423 return val;
424 else
425 return val >> 1;
426}
427
428static int pwm_from_reg(const struct it87_data *data, u8 reg)
429{
16b5dda2 430 if (has_newer_autopwm(data))
44c1bcd4
JD		 431 return reg;
432 else
433 return (reg & 0x7f) << 1;
434}
435
0df6454d
JD		 436
437static int DIV_TO_REG(int val)
438{
439 int answer = 0;
440 while (answer < 7 && (val >>= 1))
441 answer++;
442 return answer;
443}
444#define DIV_FROM_REG(val) (1 << (val))
445
446static const unsigned int pwm_freq[8] = {
447 48000000 / 128,
448 24000000 / 128,
449 12000000 / 128,
450 8000000 / 128,
451 6000000 / 128,
452 3000000 / 128,
453 1500000 / 128,
454 750000 / 128,
455};
1da177e4 456
b74f3fdd 457static int it87_probe(struct platform_device *pdev);
281dfd0b 458static int it87_remove(struct platform_device *pdev);
1da177e4 459
b74f3fdd 460static int it87_read_value(struct it87_data *data, u8 reg);
461static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
1da177e4 462static struct it87_data *it87_update_device(struct device *dev);
b74f3fdd 463static int it87_check_pwm(struct device *dev);
464static void it87_init_device(struct platform_device *pdev);
1da177e4
LT		 465
466
b74f3fdd 467static struct platform_driver it87_driver = {
cdaf7934 468 .driver = {
87218842 469 .owner = THIS_MODULE,
b74f3fdd 470 .name = DRVNAME,
cdaf7934 471 },
b74f3fdd 472 .probe = it87_probe,
9e5e9b7a 473 .remove = it87_remove,
fde09509
JD		 474};
475
20ad93d4 476static ssize_t show_in(struct device *dev, struct device_attribute *attr,
929c6a56 477 char *buf)
1da177e4 478{
929c6a56
GR		 479 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
480 int nr = sattr->nr;
481 int index = sattr->index;
20ad93d4 482
1da177e4 483 struct it87_data *data = it87_update_device(dev);
929c6a56 484 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1da177e4
LT		 485}
486
929c6a56
GR		 487static ssize_t set_in(struct device *dev, struct device_attribute *attr,
488 const char *buf, size_t count)
1da177e4 489{
929c6a56
GR		 490 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
491 int nr = sattr->nr;
492 int index = sattr->index;
20ad93d4 493
b74f3fdd 494 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 495 unsigned long val;
496
179c4fdb 497 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 498 return -EINVAL;
1da177e4 499
9a61bf63 500 mutex_lock(&data->update_lock);
929c6a56
GR		 501 data->in[nr][index] = in_to_reg(data, nr, val);
502 it87_write_value(data,
503 index == 1 ? IT87_REG_VIN_MIN(nr)
504 : IT87_REG_VIN_MAX(nr),
505 data->in[nr][index]);
9a61bf63 506 mutex_unlock(&data->update_lock);
1da177e4
LT		 507 return count;
508}
20ad93d4 509
929c6a56
GR		 510static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
511static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
512 0, 1);
513static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
514 0, 2);
f5f64501 515
929c6a56
GR		 516static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
517static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
518 1, 1);
519static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
520 1, 2);
1da177e4 521
929c6a56
GR		 522static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
523static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
524 2, 1);
525static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
526 2, 2);
1da177e4 527
929c6a56
GR		 528static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
529static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
530 3, 1);
531static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
532 3, 2);
533
534static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
535static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
536 4, 1);
537static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
538 4, 2);
539
540static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
541static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
542 5, 1);
543static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
544 5, 2);
545
546static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
547static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
548 6, 1);
549static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
550 6, 2);
551
552static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
553static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
554 7, 1);
555static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
556 7, 2);
557
558static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1da177e4
LT		 559
560/* 3 temperatures */
20ad93d4 561static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
60ca385a 562 char *buf)
1da177e4 563{
60ca385a
GR		 564 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
565 int nr = sattr->nr;
566 int index = sattr->index;
1da177e4 567 struct it87_data *data = it87_update_device(dev);
20ad93d4 568
60ca385a 569 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1da177e4 570}
20ad93d4 571
60ca385a
GR		 572static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
573 const char *buf, size_t count)
1da177e4 574{
60ca385a
GR		 575 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
576 int nr = sattr->nr;
577 int index = sattr->index;
b74f3fdd 578 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 579 long val;
161d898a 580 u8 reg, regval;
f5f64501 581
179c4fdb 582 if (kstrtol(buf, 10, &val) < 0)
f5f64501 583 return -EINVAL;
1da177e4 584
9a61bf63 585 mutex_lock(&data->update_lock);
161d898a
GR		 586
587 switch (index) {
588 default:
589 case 1:
590 reg = IT87_REG_TEMP_LOW(nr);
591 break;
592 case 2:
593 reg = IT87_REG_TEMP_HIGH(nr);
594 break;
595 case 3:
596 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
597 if (!(regval & 0x80)) {
598 regval |= 0x80;
599 it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
600 }
601 data->valid = 0;
602 reg = IT87_REG_TEMP_OFFSET[nr];
603 break;
604 }
605
60ca385a 606 data->temp[nr][index] = TEMP_TO_REG(val);
161d898a 607 it87_write_value(data, reg, data->temp[nr][index]);
9a61bf63 608 mutex_unlock(&data->update_lock);
1da177e4
LT		 609 return count;
610}
1da177e4 611
60ca385a
GR		 612static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
613static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
614 0, 1);
615static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
616 0, 2);
161d898a
GR		 617static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
618 set_temp, 0, 3);
60ca385a
GR		 619static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
620static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
621 1, 1);
622static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
623 1, 2);
161d898a
GR		 624static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
625 set_temp, 1, 3);
60ca385a
GR		 626static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
627static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
628 2, 1);
629static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
630 2, 2);
161d898a
GR		 631static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
632 set_temp, 2, 3);
1da177e4 633
2cece01f
GR		 634static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
635 char *buf)
1da177e4 636{
20ad93d4
JD		 637 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
638 int nr = sensor_attr->index;
1da177e4 639 struct it87_data *data = it87_update_device(dev);
4a0d71cf 640 u8 reg = data->sensor; /* In case value is updated while used */
19529784 641 u8 extra = data->extra;
5f2dc798 642
19529784
GR		 643 if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1))
644 || (has_temp_old_peci(data, nr) && (extra & 0x80)))
5d8d2f2b 645 return sprintf(buf, "6\n"); /* Intel PECI */
1da177e4
LT		 646 if (reg & (1 << nr))
647 return sprintf(buf, "3\n"); /* thermal diode */
648 if (reg & (8 << nr))
4ed10779 649 return sprintf(buf, "4\n"); /* thermistor */
1da177e4
LT		 650 return sprintf(buf, "0\n"); /* disabled */
651}
2cece01f
GR		 652
653static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
654 const char *buf, size_t count)
1da177e4 655{
20ad93d4
JD		 656 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
657 int nr = sensor_attr->index;
658
b74f3fdd 659 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 660 long val;
19529784 661 u8 reg, extra;
f5f64501 662
179c4fdb 663 if (kstrtol(buf, 10, &val) < 0)
f5f64501 664 return -EINVAL;
1da177e4 665
8acf07c5
JD		 666 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
667 reg &= ~(1 << nr);
668 reg &= ~(8 << nr);
5d8d2f2b
GR		 669 if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
670 reg &= 0x3f;
19529784
GR		 671 extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
672 if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
673 extra &= 0x7f;
4ed10779 674 if (val == 2) { /* backwards compatibility */
1d9bcf6a
GR		 675 dev_warn(dev,
676 "Sensor type 2 is deprecated, please use 4 instead\n");
4ed10779
JD		 677 val = 4;
678 }
5d8d2f2b 679 /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1da177e4 680 if (val == 3)
8acf07c5 681 reg |= 1 << nr;
4ed10779 682 else if (val == 4)
8acf07c5 683 reg |= 8 << nr;
5d8d2f2b
GR		 684 else if (has_temp_peci(data, nr) && val == 6)
685 reg |= (nr + 1) << 6;
19529784
GR		 686 else if (has_temp_old_peci(data, nr) && val == 6)
687 extra |= 0x80;
8acf07c5 688 else if (val != 0)
1da177e4 689 return -EINVAL;
8acf07c5
JD		 690
691 mutex_lock(&data->update_lock);
692 data->sensor = reg;
19529784 693 data->extra = extra;
b74f3fdd 694 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
19529784
GR		 695 if (has_temp_old_peci(data, nr))
696 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
2b3d1d87 697 data->valid = 0; /* Force cache refresh */
9a61bf63 698 mutex_unlock(&data->update_lock);
1da177e4
LT		 699 return count;
700}
1da177e4 701
2cece01f
GR		 702static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
703 set_temp_type, 0);
704static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
705 set_temp_type, 1);
706static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
707 set_temp_type, 2);
1da177e4
LT		 708
709/* 3 Fans */
b99883dc
JD		 710
711static int pwm_mode(const struct it87_data *data, int nr)
712{
713 int ctrl = data->fan_main_ctrl & (1 << nr);
714
715 if (ctrl == 0) /* Full speed */
716 return 0;
717 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
718 return 2;
719 else /* Manual mode */
720 return 1;
721}
722
20ad93d4 723static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
e1169ba0 724 char *buf)
1da177e4 725{
e1169ba0
GR		 726 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
727 int nr = sattr->nr;
728 int index = sattr->index;
729 int speed;
1da177e4 730 struct it87_data *data = it87_update_device(dev);
20ad93d4 731
e1169ba0
GR		 732 speed = has_16bit_fans(data) ?
733 FAN16_FROM_REG(data->fan[nr][index]) :
734 FAN_FROM_REG(data->fan[nr][index],
735 DIV_FROM_REG(data->fan_div[nr]));
736 return sprintf(buf, "%d\n", speed);
1da177e4 737}
e1169ba0 738
20ad93d4
JD		 739static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
740 char *buf)
1da177e4 741{
20ad93d4
JD		 742 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
743 int nr = sensor_attr->index;
744
1da177e4
LT		 745 struct it87_data *data = it87_update_device(dev);
746 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
747}
5f2dc798
JD		 748static ssize_t show_pwm_enable(struct device *dev,
749 struct device_attribute *attr, char *buf)
1da177e4 750{
20ad93d4
JD		 751 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
752 int nr = sensor_attr->index;
753
1da177e4 754 struct it87_data *data = it87_update_device(dev);
b99883dc 755 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1da177e4 756}
20ad93d4
JD		 757static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
758 char *buf)
1da177e4 759{
20ad93d4
JD		 760 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
761 int nr = sensor_attr->index;
762
1da177e4 763 struct it87_data *data = it87_update_device(dev);
44c1bcd4
JD		 764 return sprintf(buf, "%d\n",
765 pwm_from_reg(data, data->pwm_duty[nr]));
1da177e4 766}
f8d0c19a
JD		 767static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
768 char *buf)
769{
770 struct it87_data *data = it87_update_device(dev);
771 int index = (data->fan_ctl >> 4) & 0x07;
772
773 return sprintf(buf, "%u\n", pwm_freq[index]);
774}
e1169ba0
GR		 775
776static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
777 const char *buf, size_t count)
1da177e4 778{
e1169ba0
GR		 779 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
780 int nr = sattr->nr;
781 int index = sattr->index;
20ad93d4 782
b74f3fdd 783 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 784 long val;
7f999aa7 785 u8 reg;
1da177e4 786
179c4fdb 787 if (kstrtol(buf, 10, &val) < 0)
f5f64501
JD		 788 return -EINVAL;
789
9a61bf63 790 mutex_lock(&data->update_lock);
e1169ba0
GR		 791
792 if (has_16bit_fans(data)) {
793 data->fan[nr][index] = FAN16_TO_REG(val);
794 it87_write_value(data, IT87_REG_FAN_MIN[nr],
795 data->fan[nr][index] & 0xff);
796 it87_write_value(data, IT87_REG_FANX_MIN[nr],
797 data->fan[nr][index] >> 8);
798 } else {
799 reg = it87_read_value(data, IT87_REG_FAN_DIV);
800 switch (nr) {
801 case 0:
802 data->fan_div[nr] = reg & 0x07;
803 break;
804 case 1:
805 data->fan_div[nr] = (reg >> 3) & 0x07;
806 break;
807 case 2:
808 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
809 break;
810 }
811 data->fan[nr][index] =
812 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
813 it87_write_value(data, IT87_REG_FAN_MIN[nr],
814 data->fan[nr][index]);
07eab46d
JD		 815 }
816
9a61bf63 817 mutex_unlock(&data->update_lock);
1da177e4
LT		 818 return count;
819}
e1169ba0 820
20ad93d4
JD		 821static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
822 const char *buf, size_t count)
1da177e4 823{
20ad93d4
JD		 824 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
825 int nr = sensor_attr->index;
826
b74f3fdd 827 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 828 unsigned long val;
8ab4ec3e 829 int min;
1da177e4
LT		 830 u8 old;
831
179c4fdb 832 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD		 833 return -EINVAL;
834
9a61bf63 835 mutex_lock(&data->update_lock);
b74f3fdd 836 old = it87_read_value(data, IT87_REG_FAN_DIV);
1da177e4 837
8ab4ec3e 838 /* Save fan min limit */
e1169ba0 839 min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1da177e4
LT		 840
841 switch (nr) {
842 case 0:
843 case 1:
844 data->fan_div[nr] = DIV_TO_REG(val);
845 break;
846 case 2:
847 if (val < 8)
848 data->fan_div[nr] = 1;
849 else
850 data->fan_div[nr] = 3;
851 }
852 val = old & 0x80;
853 val |= (data->fan_div[0] & 0x07);
854 val |= (data->fan_div[1] & 0x07) << 3;
855 if (data->fan_div[2] == 3)
856 val |= 0x1 << 6;
b74f3fdd 857 it87_write_value(data, IT87_REG_FAN_DIV, val);
1da177e4 858
8ab4ec3e 859 /* Restore fan min limit */
e1169ba0
GR		 860 data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
861 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
8ab4ec3e 862
9a61bf63 863 mutex_unlock(&data->update_lock);
1da177e4
LT		 864 return count;
865}
cccfc9c4
JD		 866
867/* Returns 0 if OK, -EINVAL otherwise */
868static int check_trip_points(struct device *dev, int nr)
869{
870 const struct it87_data *data = dev_get_drvdata(dev);
871 int i, err = 0;
872
873 if (has_old_autopwm(data)) {
874 for (i = 0; i < 3; i++) {
875 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
876 err = -EINVAL;
877 }
878 for (i = 0; i < 2; i++) {
879 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
880 err = -EINVAL;
881 }
882 }
883
884 if (err) {
1d9bcf6a
GR		 885 dev_err(dev,
886 "Inconsistent trip points, not switching to automatic mode\n");
cccfc9c4
JD		 887 dev_err(dev, "Adjust the trip points and try again\n");
888 }
889 return err;
890}
891
20ad93d4
JD		 892static ssize_t set_pwm_enable(struct device *dev,
893 struct device_attribute *attr, const char *buf, size_t count)
1da177e4 894{
20ad93d4
JD		 895 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
896 int nr = sensor_attr->index;
897
b74f3fdd 898 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 899 long val;
1da177e4 900
179c4fdb 901 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
b99883dc
JD		 902 return -EINVAL;
903
cccfc9c4
JD		 904 /* Check trip points before switching to automatic mode */
905 if (val == 2) {
906 if (check_trip_points(dev, nr) < 0)
907 return -EINVAL;
908 }
909
9a61bf63 910 mutex_lock(&data->update_lock);
1da177e4
LT		 911
912 if (val == 0) {
913 int tmp;
914 /* make sure the fan is on when in on/off mode */
b74f3fdd 915 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
916 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1da177e4
LT		 917 /* set on/off mode */
918 data->fan_main_ctrl &= ~(1 << nr);
5f2dc798
JD		 919 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
920 data->fan_main_ctrl);
b99883dc
JD		 921 } else {
922 if (val == 1) /* Manual mode */
16b5dda2 923 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
6229cdb2
JD		 924 data->pwm_temp_map[nr] :
925 data->pwm_duty[nr];
b99883dc
JD		 926 else /* Automatic mode */
927 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
928 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1da177e4
LT		 929 /* set SmartGuardian mode */
930 data->fan_main_ctrl |= (1 << nr);
5f2dc798
JD		 931 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
932 data->fan_main_ctrl);
1da177e4
LT		 933 }
934
9a61bf63 935 mutex_unlock(&data->update_lock);
1da177e4
LT		 936 return count;
937}
20ad93d4
JD		 938static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
939 const char *buf, size_t count)
1da177e4 940{
20ad93d4
JD		 941 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
942 int nr = sensor_attr->index;
943
b74f3fdd 944 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 945 long val;
1da177e4 946
179c4fdb 947 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1da177e4
LT		 948 return -EINVAL;
949
9a61bf63 950 mutex_lock(&data->update_lock);
16b5dda2 951 if (has_newer_autopwm(data)) {
4a0d71cf
GR		 952 /*
953 * If we are in automatic mode, the PWM duty cycle register
954 * is read-only so we can't write the value.
955 */
6229cdb2
JD		 956 if (data->pwm_ctrl[nr] & 0x80) {
957 mutex_unlock(&data->update_lock);
958 return -EBUSY;
959 }
960 data->pwm_duty[nr] = pwm_to_reg(data, val);
961 it87_write_value(data, IT87_REG_PWM_DUTY(nr),
962 data->pwm_duty[nr]);
963 } else {
964 data->pwm_duty[nr] = pwm_to_reg(data, val);
4a0d71cf
GR		 965 /*
966 * If we are in manual mode, write the duty cycle immediately;
967 * otherwise, just store it for later use.
968 */
6229cdb2
JD		 969 if (!(data->pwm_ctrl[nr] & 0x80)) {
970 data->pwm_ctrl[nr] = data->pwm_duty[nr];
971 it87_write_value(data, IT87_REG_PWM(nr),
972 data->pwm_ctrl[nr]);
973 }
b99883dc 974 }
9a61bf63 975 mutex_unlock(&data->update_lock);
1da177e4
LT		 976 return count;
977}
f8d0c19a
JD		 978static ssize_t set_pwm_freq(struct device *dev,
979 struct device_attribute *attr, const char *buf, size_t count)
980{
b74f3fdd 981 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 982 unsigned long val;
f8d0c19a
JD		 983 int i;
984
179c4fdb 985 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD		 986 return -EINVAL;
987
f8d0c19a
JD		 988 /* Search for the nearest available frequency */
989 for (i = 0; i < 7; i++) {
990 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
991 break;
992 }
993
994 mutex_lock(&data->update_lock);
b74f3fdd 995 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
f8d0c19a 996 data->fan_ctl |= i << 4;
b74f3fdd 997 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
f8d0c19a
JD		 998 mutex_unlock(&data->update_lock);
999
1000 return count;
1001}
94ac7ee6
JD		 1002static ssize_t show_pwm_temp_map(struct device *dev,
1003 struct device_attribute *attr, char *buf)
1004{
1005 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1006 int nr = sensor_attr->index;
1007
1008 struct it87_data *data = it87_update_device(dev);
1009 int map;
1010
1011 if (data->pwm_temp_map[nr] < 3)
1012 map = 1 << data->pwm_temp_map[nr];
1013 else
1014 map = 0; /* Should never happen */
1015 return sprintf(buf, "%d\n", map);
1016}
1017static ssize_t set_pwm_temp_map(struct device *dev,
1018 struct device_attribute *attr, const char *buf, size_t count)
1019{
1020 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1021 int nr = sensor_attr->index;
1022
1023 struct it87_data *data = dev_get_drvdata(dev);
1024 long val;
1025 u8 reg;
1026
4a0d71cf
GR		 1027 /*
1028 * This check can go away if we ever support automatic fan speed
1029 * control on newer chips.
1030 */
4f3f51bc
JD		 1031 if (!has_old_autopwm(data)) {
1032 dev_notice(dev, "Mapping change disabled for safety reasons\n");
1033 return -EINVAL;
1034 }
1035
179c4fdb 1036 if (kstrtol(buf, 10, &val) < 0)
94ac7ee6
JD		 1037 return -EINVAL;
1038
1039 switch (val) {
1040 case (1 << 0):
1041 reg = 0x00;
1042 break;
1043 case (1 << 1):
1044 reg = 0x01;
1045 break;
1046 case (1 << 2):
1047 reg = 0x02;
1048 break;
1049 default:
1050 return -EINVAL;
1051 }
1052
1053 mutex_lock(&data->update_lock);
1054 data->pwm_temp_map[nr] = reg;
4a0d71cf
GR		 1055 /*
1056 * If we are in automatic mode, write the temp mapping immediately;
1057 * otherwise, just store it for later use.
1058 */
94ac7ee6
JD		 1059 if (data->pwm_ctrl[nr] & 0x80) {
1060 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1061 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1062 }
1063 mutex_unlock(&data->update_lock);
1064 return count;
1065}
1da177e4 1066
4f3f51bc
JD		 1067static ssize_t show_auto_pwm(struct device *dev,
1068 struct device_attribute *attr, char *buf)
1069{
1070 struct it87_data *data = it87_update_device(dev);
1071 struct sensor_device_attribute_2 *sensor_attr =
1072 to_sensor_dev_attr_2(attr);
1073 int nr = sensor_attr->nr;
1074 int point = sensor_attr->index;
1075
44c1bcd4
JD		 1076 return sprintf(buf, "%d\n",
1077 pwm_from_reg(data, data->auto_pwm[nr][point]));
4f3f51bc
JD		 1078}
1079
1080static ssize_t set_auto_pwm(struct device *dev,
1081 struct device_attribute *attr, const char *buf, size_t count)
1082{
1083 struct it87_data *data = dev_get_drvdata(dev);
1084 struct sensor_device_attribute_2 *sensor_attr =
1085 to_sensor_dev_attr_2(attr);
1086 int nr = sensor_attr->nr;
1087 int point = sensor_attr->index;
1088 long val;
1089
179c4fdb 1090 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
4f3f51bc
JD		 1091 return -EINVAL;
1092
1093 mutex_lock(&data->update_lock);
44c1bcd4 1094 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
4f3f51bc
JD		 1095 it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1096 data->auto_pwm[nr][point]);
1097 mutex_unlock(&data->update_lock);
1098 return count;
1099}
1100
1101static ssize_t show_auto_temp(struct device *dev,
1102 struct device_attribute *attr, char *buf)
1103{
1104 struct it87_data *data = it87_update_device(dev);
1105 struct sensor_device_attribute_2 *sensor_attr =
1106 to_sensor_dev_attr_2(attr);
1107 int nr = sensor_attr->nr;
1108 int point = sensor_attr->index;
1109
1110 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1111}
1112
1113static ssize_t set_auto_temp(struct device *dev,
1114 struct device_attribute *attr, const char *buf, size_t count)
1115{
1116 struct it87_data *data = dev_get_drvdata(dev);
1117 struct sensor_device_attribute_2 *sensor_attr =
1118 to_sensor_dev_attr_2(attr);
1119 int nr = sensor_attr->nr;
1120 int point = sensor_attr->index;
1121 long val;
1122
179c4fdb 1123 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
4f3f51bc
JD		 1124 return -EINVAL;
1125
1126 mutex_lock(&data->update_lock);
1127 data->auto_temp[nr][point] = TEMP_TO_REG(val);
1128 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1129 data->auto_temp[nr][point]);
1130 mutex_unlock(&data->update_lock);
1131 return count;
1132}
1133
e1169ba0
GR		 1134static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1135static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1136 0, 1);
1137static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1138 set_fan_div, 0);
1139
1140static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1141static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1142 1, 1);
1143static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1144 set_fan_div, 1);
1145
1146static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1147static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1148 2, 1);
1149static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1150 set_fan_div, 2);
1151
1152static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1153static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1154 3, 1);
1da177e4 1155
e1169ba0
GR		 1156static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1157static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1158 4, 1);
1da177e4 1159
c4458db3
GR		 1160static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1161 show_pwm_enable, set_pwm_enable, 0);
1162static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1163static DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq);
1164static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR,
1165 show_pwm_temp_map, set_pwm_temp_map, 0);
1166static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1167 show_auto_pwm, set_auto_pwm, 0, 0);
1168static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1169 show_auto_pwm, set_auto_pwm, 0, 1);
1170static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1171 show_auto_pwm, set_auto_pwm, 0, 2);
1172static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1173 show_auto_pwm, NULL, 0, 3);
1174static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1175 show_auto_temp, set_auto_temp, 0, 1);
1176static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1177 show_auto_temp, set_auto_temp, 0, 0);
1178static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1179 show_auto_temp, set_auto_temp, 0, 2);
1180static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1181 show_auto_temp, set_auto_temp, 0, 3);
1182static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1183 show_auto_temp, set_auto_temp, 0, 4);
1184
1185static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1186 show_pwm_enable, set_pwm_enable, 1);
1187static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1188static DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, NULL);
1189static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR,
1190 show_pwm_temp_map, set_pwm_temp_map, 1);
1191static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1192 show_auto_pwm, set_auto_pwm, 1, 0);
1193static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1194 show_auto_pwm, set_auto_pwm, 1, 1);
1195static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1196 show_auto_pwm, set_auto_pwm, 1, 2);
1197static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1198 show_auto_pwm, NULL, 1, 3);
1199static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1200 show_auto_temp, set_auto_temp, 1, 1);
1201static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1202 show_auto_temp, set_auto_temp, 1, 0);
1203static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1204 show_auto_temp, set_auto_temp, 1, 2);
1205static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1206 show_auto_temp, set_auto_temp, 1, 3);
1207static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1208 show_auto_temp, set_auto_temp, 1, 4);
1209
1210static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1211 show_pwm_enable, set_pwm_enable, 2);
1212static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1213static DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL);
1214static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR,
1215 show_pwm_temp_map, set_pwm_temp_map, 2);
1216static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1217 show_auto_pwm, set_auto_pwm, 2, 0);
1218static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1219 show_auto_pwm, set_auto_pwm, 2, 1);
1220static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1221 show_auto_pwm, set_auto_pwm, 2, 2);
1222static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1223 show_auto_pwm, NULL, 2, 3);
1224static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1225 show_auto_temp, set_auto_temp, 2, 1);
1226static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1227 show_auto_temp, set_auto_temp, 2, 0);
1228static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1229 show_auto_temp, set_auto_temp, 2, 2);
1230static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1231 show_auto_temp, set_auto_temp, 2, 3);
1232static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1233 show_auto_temp, set_auto_temp, 2, 4);
1da177e4
LT		 1234
1235/* Alarms */
5f2dc798
JD		 1236static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1237 char *buf)
1da177e4
LT		 1238{
1239 struct it87_data *data = it87_update_device(dev);
68188ba7 1240 return sprintf(buf, "%u\n", data->alarms);
1da177e4 1241}
1d66c64c 1242static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1da177e4 1243
0124dd78
JD		 1244static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1245 char *buf)
1246{
1247 int bitnr = to_sensor_dev_attr(attr)->index;
1248 struct it87_data *data = it87_update_device(dev);
1249 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1250}
3d30f9e6
JD		 1251
1252static ssize_t clear_intrusion(struct device *dev, struct device_attribute
1253 *attr, const char *buf, size_t count)
1254{
1255 struct it87_data *data = dev_get_drvdata(dev);
1256 long val;
1257 int config;
1258
179c4fdb 1259 if (kstrtol(buf, 10, &val) < 0 || val != 0)
3d30f9e6
JD		 1260 return -EINVAL;
1261
1262 mutex_lock(&data->update_lock);
1263 config = it87_read_value(data, IT87_REG_CONFIG);
1264 if (config < 0) {
1265 count = config;
1266 } else {
1267 config |= 1 << 5;
1268 it87_write_value(data, IT87_REG_CONFIG, config);
1269 /* Invalidate cache to force re-read */
1270 data->valid = 0;
1271 }
1272 mutex_unlock(&data->update_lock);
1273
1274 return count;
1275}
1276
0124dd78
JD		 1277static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1278static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1279static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1280static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1281static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1282static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1283static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1284static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1285static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1286static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1287static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1288static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1289static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1290static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1291static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1292static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
3d30f9e6
JD		 1293static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1294 show_alarm, clear_intrusion, 4);
0124dd78 1295
d9b327c3
JD		 1296static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1297 char *buf)
1298{
1299 int bitnr = to_sensor_dev_attr(attr)->index;
1300 struct it87_data *data = it87_update_device(dev);
1301 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1302}
1303static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1304 const char *buf, size_t count)
1305{
1306 int bitnr = to_sensor_dev_attr(attr)->index;
1307 struct it87_data *data = dev_get_drvdata(dev);
1308 long val;
1309
179c4fdb 1310 if (kstrtol(buf, 10, &val) < 0
d9b327c3
JD		 1311 || (val != 0 && val != 1))
1312 return -EINVAL;
1313
1314 mutex_lock(&data->update_lock);
1315 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1316 if (val)
1317 data->beeps |= (1 << bitnr);
1318 else
1319 data->beeps &= ~(1 << bitnr);
1320 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1321 mutex_unlock(&data->update_lock);
1322 return count;
1323}
1324
1325static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1326 show_beep, set_beep, 1);
1327static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1328static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1329static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1330static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1331static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1332static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1333static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1334/* fanX_beep writability is set later */
1335static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1336static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1337static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1338static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1339static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1340static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1341 show_beep, set_beep, 2);
1342static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1343static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1344
5f2dc798
JD		 1345static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1346 char *buf)
1da177e4 1347{
90d6619a 1348 struct it87_data *data = dev_get_drvdata(dev);
a7be58a1 1349 return sprintf(buf, "%u\n", data->vrm);
1da177e4 1350}
5f2dc798
JD		 1351static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1352 const char *buf, size_t count)
1da177e4 1353{
b74f3fdd 1354 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 1355 unsigned long val;
1356
179c4fdb 1357 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 1358 return -EINVAL;
1da177e4 1359
1da177e4
LT		 1360 data->vrm = val;
1361
1362 return count;
1363}
1364static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4 1365
5f2dc798
JD		 1366static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1367 char *buf)
1da177e4
LT		 1368{
1369 struct it87_data *data = it87_update_device(dev);
1370 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1371}
1372static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
87808be4 1373
738e5e05
JD		 1374static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1375 char *buf)
1376{
3c4c4971 1377 static const char * const labels[] = {
738e5e05
JD		 1378 "+5V",
1379 "5VSB",
1380 "Vbat",
1381 };
3c4c4971 1382 static const char * const labels_it8721[] = {
44c1bcd4
JD		 1383 "+3.3V",
1384 "3VSB",
1385 "Vbat",
1386 };
1387 struct it87_data *data = dev_get_drvdata(dev);
738e5e05
JD		 1388 int nr = to_sensor_dev_attr(attr)->index;
1389
16b5dda2
JD		 1390 return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr]
1391 : labels[nr]);
738e5e05
JD		 1392}
1393static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1394static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1395static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1396
b74f3fdd 1397static ssize_t show_name(struct device *dev, struct device_attribute
1398 *devattr, char *buf)
1399{
1400 struct it87_data *data = dev_get_drvdata(dev);
1401 return sprintf(buf, "%s\n", data->name);
1402}
1403static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1404
9172b5d1
GR		 1405static struct attribute *it87_attributes_in[9][5] = {
1406{
87808be4 1407 &sensor_dev_attr_in0_input.dev_attr.attr,
87808be4 1408 &sensor_dev_attr_in0_min.dev_attr.attr,
87808be4 1409 &sensor_dev_attr_in0_max.dev_attr.attr,
0124dd78 1410 &sensor_dev_attr_in0_alarm.dev_attr.attr,
9172b5d1
GR		 1411 NULL
1412}, {
1413 &sensor_dev_attr_in1_input.dev_attr.attr,
1414 &sensor_dev_attr_in1_min.dev_attr.attr,
1415 &sensor_dev_attr_in1_max.dev_attr.attr,
0124dd78 1416 &sensor_dev_attr_in1_alarm.dev_attr.attr,
9172b5d1
GR		 1417 NULL
1418}, {
1419 &sensor_dev_attr_in2_input.dev_attr.attr,
1420 &sensor_dev_attr_in2_min.dev_attr.attr,
1421 &sensor_dev_attr_in2_max.dev_attr.attr,
0124dd78 1422 &sensor_dev_attr_in2_alarm.dev_attr.attr,
9172b5d1
GR		 1423 NULL
1424}, {
1425 &sensor_dev_attr_in3_input.dev_attr.attr,
1426 &sensor_dev_attr_in3_min.dev_attr.attr,
1427 &sensor_dev_attr_in3_max.dev_attr.attr,
0124dd78 1428 &sensor_dev_attr_in3_alarm.dev_attr.attr,
9172b5d1
GR		 1429 NULL
1430}, {
1431 &sensor_dev_attr_in4_input.dev_attr.attr,
1432 &sensor_dev_attr_in4_min.dev_attr.attr,
1433 &sensor_dev_attr_in4_max.dev_attr.attr,
0124dd78 1434 &sensor_dev_attr_in4_alarm.dev_attr.attr,
9172b5d1
GR		 1435 NULL
1436}, {
1437 &sensor_dev_attr_in5_input.dev_attr.attr,
1438 &sensor_dev_attr_in5_min.dev_attr.attr,
1439 &sensor_dev_attr_in5_max.dev_attr.attr,
0124dd78 1440 &sensor_dev_attr_in5_alarm.dev_attr.attr,
9172b5d1
GR		 1441 NULL
1442}, {
1443 &sensor_dev_attr_in6_input.dev_attr.attr,
1444 &sensor_dev_attr_in6_min.dev_attr.attr,
1445 &sensor_dev_attr_in6_max.dev_attr.attr,
0124dd78 1446 &sensor_dev_attr_in6_alarm.dev_attr.attr,
9172b5d1
GR		 1447 NULL
1448}, {
1449 &sensor_dev_attr_in7_input.dev_attr.attr,
1450 &sensor_dev_attr_in7_min.dev_attr.attr,
1451 &sensor_dev_attr_in7_max.dev_attr.attr,
0124dd78 1452 &sensor_dev_attr_in7_alarm.dev_attr.attr,
9172b5d1
GR		 1453 NULL
1454}, {
1455 &sensor_dev_attr_in8_input.dev_attr.attr,
1456 NULL
1457} };
87808be4 1458
9172b5d1
GR		 1459static const struct attribute_group it87_group_in[9] = {
1460 { .attrs = it87_attributes_in[0] },
1461 { .attrs = it87_attributes_in[1] },
1462 { .attrs = it87_attributes_in[2] },
1463 { .attrs = it87_attributes_in[3] },
1464 { .attrs = it87_attributes_in[4] },
1465 { .attrs = it87_attributes_in[5] },
1466 { .attrs = it87_attributes_in[6] },
1467 { .attrs = it87_attributes_in[7] },
1468 { .attrs = it87_attributes_in[8] },
1469};
1470
4573acbc
GR		 1471static struct attribute *it87_attributes_temp[3][6] = {
1472{
87808be4 1473 &sensor_dev_attr_temp1_input.dev_attr.attr,
87808be4 1474 &sensor_dev_attr_temp1_max.dev_attr.attr,
87808be4 1475 &sensor_dev_attr_temp1_min.dev_attr.attr,
87808be4 1476 &sensor_dev_attr_temp1_type.dev_attr.attr,
0124dd78 1477 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
4573acbc
GR		 1478 NULL
1479} , {
1480 &sensor_dev_attr_temp2_input.dev_attr.attr,
1481 &sensor_dev_attr_temp2_max.dev_attr.attr,
1482 &sensor_dev_attr_temp2_min.dev_attr.attr,
1483 &sensor_dev_attr_temp2_type.dev_attr.attr,
0124dd78 1484 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
4573acbc
GR		 1485 NULL
1486} , {
1487 &sensor_dev_attr_temp3_input.dev_attr.attr,
1488 &sensor_dev_attr_temp3_max.dev_attr.attr,
1489 &sensor_dev_attr_temp3_min.dev_attr.attr,
1490 &sensor_dev_attr_temp3_type.dev_attr.attr,
0124dd78 1491 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
4573acbc
GR		 1492 NULL
1493} };
1494
1495static const struct attribute_group it87_group_temp[3] = {
1496 { .attrs = it87_attributes_temp[0] },
1497 { .attrs = it87_attributes_temp[1] },
1498 { .attrs = it87_attributes_temp[2] },
1499};
87808be4 1500
161d898a
GR		 1501static struct attribute *it87_attributes_temp_offset[] = {
1502 &sensor_dev_attr_temp1_offset.dev_attr.attr,
1503 &sensor_dev_attr_temp2_offset.dev_attr.attr,
1504 &sensor_dev_attr_temp3_offset.dev_attr.attr,
1505};
1506
4573acbc 1507static struct attribute *it87_attributes[] = {
87808be4 1508 &dev_attr_alarms.attr,
3d30f9e6 1509 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
b74f3fdd 1510 &dev_attr_name.attr,
87808be4
JD		 1511 NULL
1512};
1513
1514static const struct attribute_group it87_group = {
1515 .attrs = it87_attributes,
1516};
1517
9172b5d1 1518static struct attribute *it87_attributes_in_beep[] = {
d9b327c3
JD		 1519 &sensor_dev_attr_in0_beep.dev_attr.attr,
1520 &sensor_dev_attr_in1_beep.dev_attr.attr,
1521 &sensor_dev_attr_in2_beep.dev_attr.attr,
1522 &sensor_dev_attr_in3_beep.dev_attr.attr,
1523 &sensor_dev_attr_in4_beep.dev_attr.attr,
1524 &sensor_dev_attr_in5_beep.dev_attr.attr,
1525 &sensor_dev_attr_in6_beep.dev_attr.attr,
1526 &sensor_dev_attr_in7_beep.dev_attr.attr,
9172b5d1
GR		 1527 NULL
1528};
d9b327c3 1529
4573acbc 1530static struct attribute *it87_attributes_temp_beep[] = {
d9b327c3
JD		 1531 &sensor_dev_attr_temp1_beep.dev_attr.attr,
1532 &sensor_dev_attr_temp2_beep.dev_attr.attr,
1533 &sensor_dev_attr_temp3_beep.dev_attr.attr,
d9b327c3
JD		 1534};
1535
e1169ba0
GR		 1536static struct attribute *it87_attributes_fan[5][3+1] = { {
1537 &sensor_dev_attr_fan1_input.dev_attr.attr,
1538 &sensor_dev_attr_fan1_min.dev_attr.attr,
723a0aa0
JD		 1539 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1540 NULL
1541}, {
e1169ba0
GR		 1542 &sensor_dev_attr_fan2_input.dev_attr.attr,
1543 &sensor_dev_attr_fan2_min.dev_attr.attr,
723a0aa0
JD		 1544 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1545 NULL
1546}, {
e1169ba0
GR		 1547 &sensor_dev_attr_fan3_input.dev_attr.attr,
1548 &sensor_dev_attr_fan3_min.dev_attr.attr,
723a0aa0
JD		 1549 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1550 NULL
1551}, {
e1169ba0
GR		 1552 &sensor_dev_attr_fan4_input.dev_attr.attr,
1553 &sensor_dev_attr_fan4_min.dev_attr.attr,
723a0aa0
JD		 1554 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1555 NULL
1556}, {
e1169ba0
GR		 1557 &sensor_dev_attr_fan5_input.dev_attr.attr,
1558 &sensor_dev_attr_fan5_min.dev_attr.attr,
723a0aa0
JD		 1559 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1560 NULL
1561} };
1562
e1169ba0
GR		 1563static const struct attribute_group it87_group_fan[5] = {
1564 { .attrs = it87_attributes_fan[0] },
1565 { .attrs = it87_attributes_fan[1] },
1566 { .attrs = it87_attributes_fan[2] },
1567 { .attrs = it87_attributes_fan[3] },
1568 { .attrs = it87_attributes_fan[4] },
723a0aa0 1569};
87808be4 1570
e1169ba0 1571static const struct attribute *it87_attributes_fan_div[] = {
87808be4 1572 &sensor_dev_attr_fan1_div.dev_attr.attr,
87808be4 1573 &sensor_dev_attr_fan2_div.dev_attr.attr,
87808be4 1574 &sensor_dev_attr_fan3_div.dev_attr.attr,
723a0aa0
JD		 1575};
1576
723a0aa0 1577static struct attribute *it87_attributes_pwm[3][4+1] = { {
87808be4 1578 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
87808be4 1579 &sensor_dev_attr_pwm1.dev_attr.attr,
d5b0b5d6 1580 &dev_attr_pwm1_freq.attr,
94ac7ee6 1581 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1582 NULL
1583}, {
1584 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1585 &sensor_dev_attr_pwm2.dev_attr.attr,
1586 &dev_attr_pwm2_freq.attr,
94ac7ee6 1587 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1588 NULL
1589}, {
1590 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1591 &sensor_dev_attr_pwm3.dev_attr.attr,
1592 &dev_attr_pwm3_freq.attr,
94ac7ee6 1593 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1594 NULL
1595} };
87808be4 1596
723a0aa0
JD		 1597static const struct attribute_group it87_group_pwm[3] = {
1598 { .attrs = it87_attributes_pwm[0] },
1599 { .attrs = it87_attributes_pwm[1] },
1600 { .attrs = it87_attributes_pwm[2] },
1601};
1602
4f3f51bc
JD		 1603static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1604 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1605 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1606 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1607 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1608 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1609 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1610 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1611 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1612 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1613 NULL
1614}, {
1615 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1616 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1617 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1618 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1619 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1620 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1621 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1622 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1623 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1624 NULL
1625}, {
1626 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1627 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1628 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1629 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1630 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1631 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
1632 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1633 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1634 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
1635 NULL
1636} };
1637
1638static const struct attribute_group it87_group_autopwm[3] = {
1639 { .attrs = it87_attributes_autopwm[0] },
1640 { .attrs = it87_attributes_autopwm[1] },
1641 { .attrs = it87_attributes_autopwm[2] },
1642};
1643
d9b327c3
JD		 1644static struct attribute *it87_attributes_fan_beep[] = {
1645 &sensor_dev_attr_fan1_beep.dev_attr.attr,
1646 &sensor_dev_attr_fan2_beep.dev_attr.attr,
1647 &sensor_dev_attr_fan3_beep.dev_attr.attr,
1648 &sensor_dev_attr_fan4_beep.dev_attr.attr,
1649 &sensor_dev_attr_fan5_beep.dev_attr.attr,
1650};
1651
6a8d7acf 1652static struct attribute *it87_attributes_vid[] = {
87808be4
JD		 1653 &dev_attr_vrm.attr,
1654 &dev_attr_cpu0_vid.attr,
1655 NULL
1656};
1657
6a8d7acf
JD		 1658static const struct attribute_group it87_group_vid = {
1659 .attrs = it87_attributes_vid,
87808be4 1660};
1da177e4 1661
738e5e05
JD		 1662static struct attribute *it87_attributes_label[] = {
1663 &sensor_dev_attr_in3_label.dev_attr.attr,
1664 &sensor_dev_attr_in7_label.dev_attr.attr,
1665 &sensor_dev_attr_in8_label.dev_attr.attr,
1666 NULL
1667};
1668
1669static const struct attribute_group it87_group_label = {
fa8b6975 1670 .attrs = it87_attributes_label,
738e5e05
JD		 1671};
1672
2d8672c5 1673/* SuperIO detection - will change isa_address if a chip is found */
b74f3fdd 1674static int __init it87_find(unsigned short *address,
1675 struct it87_sio_data *sio_data)
1da177e4 1676{
5b0380c9 1677 int err;
b74f3fdd 1678 u16 chip_type;
98dd22c3 1679 const char *board_vendor, *board_name;
1da177e4 1680
5b0380c9
NG		 1681 err = superio_enter();
1682 if (err)
1683 return err;
1684
1685 err = -ENODEV;
67b671bc 1686 chip_type = force_id ? force_id : superio_inw(DEVID);
b74f3fdd 1687
1688 switch (chip_type) {
1689 case IT8705F_DEVID:
1690 sio_data->type = it87;
1691 break;
1692 case IT8712F_DEVID:
1693 sio_data->type = it8712;
1694 break;
1695 case IT8716F_DEVID:
1696 case IT8726F_DEVID:
1697 sio_data->type = it8716;
1698 break;
1699 case IT8718F_DEVID:
1700 sio_data->type = it8718;
1701 break;
b4da93e4
JMS		 1702 case IT8720F_DEVID:
1703 sio_data->type = it8720;
1704 break;
44c1bcd4
JD		 1705 case IT8721F_DEVID:
1706 sio_data->type = it8721;
1707 break;
16b5dda2
JD		 1708 case IT8728F_DEVID:
1709 sio_data->type = it8728;
1710 break;
0531d98b
GR		 1711 case IT8782F_DEVID:
1712 sio_data->type = it8782;
1713 break;
1714 case IT8783E_DEVID:
1715 sio_data->type = it8783;
1716 break;
b74f3fdd 1717 case 0xffff: /* No device at all */
1718 goto exit;
1719 default:
a8ca1037 1720 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
b74f3fdd 1721 goto exit;
1722 }
1da177e4 1723
87673dd7 1724 superio_select(PME);
1da177e4 1725 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
a8ca1037 1726 pr_info("Device not activated, skipping\n");
1da177e4
LT		 1727 goto exit;
1728 }
1729
1730 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1731 if (*address == 0) {
a8ca1037 1732 pr_info("Base address not set, skipping\n");
1da177e4
LT		 1733 goto exit;
1734 }
1735
1736 err = 0;
0475169c 1737 sio_data->revision = superio_inb(DEVREV) & 0x0f;
a8ca1037 1738 pr_info("Found IT%04xF chip at 0x%x, revision %d\n",
0475169c 1739 chip_type, *address, sio_data->revision);
1da177e4 1740
738e5e05
JD		 1741 /* in8 (Vbat) is always internal */
1742 sio_data->internal = (1 << 2);
1743
87673dd7 1744 /* Read GPIO config and VID value from LDN 7 (GPIO) */
895ff267
JD		 1745 if (sio_data->type == it87) {
1746 /* The IT8705F doesn't have VID pins at all */
1747 sio_data->skip_vid = 1;
d9b327c3
JD		 1748
1749 /* The IT8705F has a different LD number for GPIO */
1750 superio_select(5);
1751 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
0531d98b
GR		 1752 } else if (sio_data->type == it8783) {
1753 int reg25, reg27, reg2A, reg2C, regEF;
0531d98b
GR		 1754
1755 sio_data->skip_vid = 1; /* No VID */
1756
1757 superio_select(GPIO);
1758
1759 reg25 = superio_inb(IT87_SIO_GPIO1_REG);
1760 reg27 = superio_inb(IT87_SIO_GPIO3_REG);
1761 reg2A = superio_inb(IT87_SIO_PINX1_REG);
1762 reg2C = superio_inb(IT87_SIO_PINX2_REG);
1763 regEF = superio_inb(IT87_SIO_SPI_REG);
1764
0531d98b 1765 /* Check if fan3 is there or not */
9172b5d1 1766 if ((reg27 & (1 << 0)) || !(reg2C & (1 << 2)))
0531d98b
GR		 1767 sio_data->skip_fan |= (1 << 2);
1768 if ((reg25 & (1 << 4))
1769 || (!(reg2A & (1 << 1)) && (regEF & (1 << 0))))
1770 sio_data->skip_pwm |= (1 << 2);
1771
1772 /* Check if fan2 is there or not */
1773 if (reg27 & (1 << 7))
1774 sio_data->skip_fan |= (1 << 1);
1775 if (reg27 & (1 << 3))
1776 sio_data->skip_pwm |= (1 << 1);
1777
1778 /* VIN5 */
9172b5d1
GR		 1779 if ((reg27 & (1 << 0)) || (reg2C & (1 << 2)))
1780 sio_data->skip_in |= (1 << 5); /* No VIN5 */
0531d98b
GR		 1781
1782 /* VIN6 */
9172b5d1
GR		 1783 if (reg27 & (1 << 1))
1784 sio_data->skip_in |= (1 << 6); /* No VIN6 */
0531d98b
GR		 1785
1786 /*
1787 * VIN7
1788 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
1789 */
9172b5d1
GR		 1790 if (reg27 & (1 << 2)) {
1791 /*
1792 * The data sheet is a bit unclear regarding the
1793 * internal voltage divider for VCCH5V. It says
1794 * "This bit enables and switches VIN7 (pin 91) to the
1795 * internal voltage divider for VCCH5V".
1796 * This is different to other chips, where the internal
1797 * voltage divider would connect VIN7 to an internal
1798 * voltage source. Maybe that is the case here as well.
1799 *
1800 * Since we don't know for sure, re-route it if that is
1801 * not the case, and ask the user to report if the
1802 * resulting voltage is sane.
1803 */
1804 if (!(reg2C & (1 << 1))) {
1805 reg2C |= (1 << 1);
1806 superio_outb(IT87_SIO_PINX2_REG, reg2C);
1807 pr_notice("Routing internal VCCH5V to in7.\n");
1808 }
1809 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
1810 pr_notice("Please report if it displays a reasonable voltage.\n");
1811 }
0531d98b
GR		 1812
1813 if (reg2C & (1 << 0))
1814 sio_data->internal |= (1 << 0);
1815 if (reg2C & (1 << 1))
1816 sio_data->internal |= (1 << 1);
1817
1818 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
1819
895ff267 1820 } else {
87673dd7 1821 int reg;
9172b5d1 1822 bool uart6;
87673dd7
JD		 1823
1824 superio_select(GPIO);
44c1bcd4 1825
895ff267 1826 reg = superio_inb(IT87_SIO_GPIO3_REG);
0531d98b
GR		 1827 if (sio_data->type == it8721 || sio_data->type == it8728 ||
1828 sio_data->type == it8782) {
16b5dda2 1829 /*
0531d98b
GR		 1830 * IT8721F/IT8758E, and IT8782F don't have VID pins
1831 * at all, not sure about the IT8728F.
16b5dda2 1832 */
895ff267 1833 sio_data->skip_vid = 1;
44c1bcd4
JD		 1834 } else {
1835 /* We need at least 4 VID pins */
1836 if (reg & 0x0f) {
a8ca1037 1837 pr_info("VID is disabled (pins used for GPIO)\n");
44c1bcd4
JD		 1838 sio_data->skip_vid = 1;
1839 }
895ff267
JD		 1840 }
1841
591ec650
JD		 1842 /* Check if fan3 is there or not */
1843 if (reg & (1 << 6))
1844 sio_data->skip_pwm |= (1 << 2);
1845 if (reg & (1 << 7))
1846 sio_data->skip_fan |= (1 << 2);
1847
1848 /* Check if fan2 is there or not */
1849 reg = superio_inb(IT87_SIO_GPIO5_REG);
1850 if (reg & (1 << 1))
1851 sio_data->skip_pwm |= (1 << 1);
1852 if (reg & (1 << 2))
1853 sio_data->skip_fan |= (1 << 1);
1854
895ff267
JD		 1855 if ((sio_data->type == it8718 || sio_data->type == it8720)
1856 && !(sio_data->skip_vid))
b74f3fdd 1857 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
87673dd7
JD		 1858
1859 reg = superio_inb(IT87_SIO_PINX2_REG);
9172b5d1
GR		 1860
1861 uart6 = sio_data->type == it8782 && (reg & (1 << 2));
1862
436cad2a
JD		 1863 /*
1864 * The IT8720F has no VIN7 pin, so VCCH should always be
1865 * routed internally to VIN7 with an internal divider.
1866 * Curiously, there still is a configuration bit to control
1867 * this, which means it can be set incorrectly. And even
1868 * more curiously, many boards out there are improperly
1869 * configured, even though the IT8720F datasheet claims
1870 * that the internal routing of VCCH to VIN7 is the default
1871 * setting. So we force the internal routing in this case.
0531d98b
GR		 1872 *
1873 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
9172b5d1
GR		 1874 * If UART6 is enabled, re-route VIN7 to the internal divider
1875 * if that is not already the case.
436cad2a 1876 */
9172b5d1 1877 if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) {
436cad2a
JD		 1878 reg |= (1 << 1);
1879 superio_outb(IT87_SIO_PINX2_REG, reg);
a8ca1037 1880 pr_notice("Routing internal VCCH to in7\n");
436cad2a 1881 }
87673dd7 1882 if (reg & (1 << 0))
738e5e05 1883 sio_data->internal |= (1 << 0);
16b5dda2
JD		 1884 if ((reg & (1 << 1)) || sio_data->type == it8721 ||
1885 sio_data->type == it8728)
738e5e05 1886 sio_data->internal |= (1 << 1);
d9b327c3 1887
9172b5d1
GR		 1888 /*
1889 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
1890 * While VIN7 can be routed to the internal voltage divider,
1891 * VIN5 and VIN6 are not available if UART6 is enabled.
4573acbc
GR		 1892 *
1893 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
1894 * is the temperature source. Since we can not read the
1895 * temperature source here, skip_temp is preliminary.
9172b5d1 1896 */
4573acbc 1897 if (uart6) {
9172b5d1 1898 sio_data->skip_in |= (1 << 5) | (1 << 6);
4573acbc
GR		 1899 sio_data->skip_temp |= (1 << 2);
1900 }
9172b5d1 1901
d9b327c3 1902 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
87673dd7 1903 }
d9b327c3 1904 if (sio_data->beep_pin)
a8ca1037 1905 pr_info("Beeping is supported\n");
87673dd7 1906
98dd22c3
JD		 1907 /* Disable specific features based on DMI strings */
1908 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
1909 board_name = dmi_get_system_info(DMI_BOARD_NAME);
1910 if (board_vendor && board_name) {
1911 if (strcmp(board_vendor, "nVIDIA") == 0
1912 && strcmp(board_name, "FN68PT") == 0) {
4a0d71cf
GR		 1913 /*
1914 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
1915 * connected to a fan, but to something else. One user
1916 * has reported instant system power-off when changing
1917 * the PWM2 duty cycle, so we disable it.
1918 * I use the board name string as the trigger in case
1919 * the same board is ever used in other systems.
1920 */
a8ca1037 1921 pr_info("Disabling pwm2 due to hardware constraints\n");
98dd22c3
JD		 1922 sio_data->skip_pwm = (1 << 1);
1923 }
1924 }
1925
1da177e4
LT		 1926exit:
1927 superio_exit();
1928 return err;
1929}
1930
723a0aa0
JD		 1931static void it87_remove_files(struct device *dev)
1932{
1933 struct it87_data *data = platform_get_drvdata(pdev);
1934 struct it87_sio_data *sio_data = dev->platform_data;
723a0aa0
JD		 1935 int i;
1936
1937 sysfs_remove_group(&dev->kobj, &it87_group);
9172b5d1
GR		 1938 for (i = 0; i < 9; i++) {
1939 if (sio_data->skip_in & (1 << i))
1940 continue;
1941 sysfs_remove_group(&dev->kobj, &it87_group_in[i]);
1942 if (it87_attributes_in_beep[i])
1943 sysfs_remove_file(&dev->kobj,
1944 it87_attributes_in_beep[i]);
1945 }
4573acbc
GR		 1946 for (i = 0; i < 3; i++) {
1947 if (!(data->has_temp & (1 << i)))
1948 continue;
1949 sysfs_remove_group(&dev->kobj, &it87_group_temp[i]);
161d898a
GR		 1950 if (has_temp_offset(data))
1951 sysfs_remove_file(&dev->kobj,
1952 it87_attributes_temp_offset[i]);
4573acbc
GR		 1953 if (sio_data->beep_pin)
1954 sysfs_remove_file(&dev->kobj,
1955 it87_attributes_temp_beep[i]);
1956 }
723a0aa0
JD		 1957 for (i = 0; i < 5; i++) {
1958 if (!(data->has_fan & (1 << i)))
1959 continue;
e1169ba0 1960 sysfs_remove_group(&dev->kobj, &it87_group_fan[i]);
d9b327c3
JD		 1961 if (sio_data->beep_pin)
1962 sysfs_remove_file(&dev->kobj,
1963 it87_attributes_fan_beep[i]);
e1169ba0
GR		 1964 if (i < 3 && !has_16bit_fans(data))
1965 sysfs_remove_file(&dev->kobj,
1966 it87_attributes_fan_div[i]);
723a0aa0
JD		 1967 }
1968 for (i = 0; i < 3; i++) {
1969 if (sio_data->skip_pwm & (1 << 0))
1970 continue;
1971 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
4f3f51bc
JD		 1972 if (has_old_autopwm(data))
1973 sysfs_remove_group(&dev->kobj,
1974 &it87_group_autopwm[i]);
723a0aa0 1975 }
6a8d7acf
JD		 1976 if (!sio_data->skip_vid)
1977 sysfs_remove_group(&dev->kobj, &it87_group_vid);
738e5e05 1978 sysfs_remove_group(&dev->kobj, &it87_group_label);
723a0aa0
JD		 1979}
1980
6c931ae1 1981static int it87_probe(struct platform_device *pdev)
1da177e4 1982{
1da177e4 1983 struct it87_data *data;
b74f3fdd 1984 struct resource *res;
1985 struct device *dev = &pdev->dev;
1986 struct it87_sio_data *sio_data = dev->platform_data;
723a0aa0 1987 int err = 0, i;
1da177e4 1988 int enable_pwm_interface;
d9b327c3 1989 int fan_beep_need_rw;
b74f3fdd 1990
1991 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
62a1d05f
GR		 1992 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
1993 DRVNAME)) {
b74f3fdd 1994 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1995 (unsigned long)res->start,
87b4b663 1996 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
62a1d05f 1997 return -EBUSY;
8e9afcbb 1998 }
1da177e4 1999
62a1d05f
GR		 2000 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
2001 if (!data)
2002 return -ENOMEM;
1da177e4 2003
b74f3fdd 2004 data->addr = res->start;
2005 data->type = sio_data->type;
483db43e 2006 data->features = it87_devices[sio_data->type].features;
5d8d2f2b 2007 data->peci_mask = it87_devices[sio_data->type].peci_mask;
19529784 2008 data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
483db43e
GR		 2009 data->name = it87_devices[sio_data->type].name;
2010 /*
2011 * IT8705F Datasheet 0.4.1, 3h == Version G.
2012 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
2013 * These are the first revisions with 16-bit tachometer support.
2014 */
2015 switch (data->type) {
2016 case it87:
2017 if (sio_data->revision >= 0x03) {
2018 data->features &= ~FEAT_OLD_AUTOPWM;
2019 data->features |= FEAT_16BIT_FANS;
2020 }
2021 break;
2022 case it8712:
2023 if (sio_data->revision >= 0x08) {
2024 data->features &= ~FEAT_OLD_AUTOPWM;
2025 data->features |= FEAT_16BIT_FANS;
2026 }
2027 break;
2028 default:
2029 break;
2030 }
1da177e4
LT		 2031
2032 /* Now, we do the remaining detection. */
b74f3fdd 2033 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
62a1d05f
GR		 2034 || it87_read_value(data, IT87_REG_CHIPID) != 0x90)
2035 return -ENODEV;
1da177e4 2036
b74f3fdd 2037 platform_set_drvdata(pdev, data);
1da177e4 2038
9a61bf63 2039 mutex_init(&data->update_lock);
1da177e4 2040
1da177e4 2041 /* Check PWM configuration */
b74f3fdd 2042 enable_pwm_interface = it87_check_pwm(dev);
1da177e4 2043
44c1bcd4 2044 /* Starting with IT8721F, we handle scaling of internal voltages */
16b5dda2 2045 if (has_12mv_adc(data)) {
44c1bcd4
JD		 2046 if (sio_data->internal & (1 << 0))
2047 data->in_scaled |= (1 << 3); /* in3 is AVCC */
2048 if (sio_data->internal & (1 << 1))
2049 data->in_scaled |= (1 << 7); /* in7 is VSB */
2050 if (sio_data->internal & (1 << 2))
2051 data->in_scaled |= (1 << 8); /* in8 is Vbat */
0531d98b
GR		 2052 } else if (sio_data->type == it8782 || sio_data->type == it8783) {
2053 if (sio_data->internal & (1 << 0))
2054 data->in_scaled |= (1 << 3); /* in3 is VCC5V */
2055 if (sio_data->internal & (1 << 1))
2056 data->in_scaled |= (1 << 7); /* in7 is VCCH5V */
44c1bcd4
JD		 2057 }
2058
4573acbc
GR		 2059 data->has_temp = 0x07;
2060 if (sio_data->skip_temp & (1 << 2)) {
2061 if (sio_data->type == it8782
2062 && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
2063 data->has_temp &= ~(1 << 2);
2064 }
2065
1da177e4 2066 /* Initialize the IT87 chip */
b74f3fdd 2067 it87_init_device(pdev);
1da177e4
LT		 2068
2069 /* Register sysfs hooks */
5f2dc798
JD		 2070 err = sysfs_create_group(&dev->kobj, &it87_group);
2071 if (err)
62a1d05f 2072 return err;
17d648bf 2073
9172b5d1
GR		 2074 for (i = 0; i < 9; i++) {
2075 if (sio_data->skip_in & (1 << i))
2076 continue;
2077 err = sysfs_create_group(&dev->kobj, &it87_group_in[i]);
2078 if (err)
62a1d05f 2079 goto error;
9172b5d1
GR		 2080 if (sio_data->beep_pin && it87_attributes_in_beep[i]) {
2081 err = sysfs_create_file(&dev->kobj,
2082 it87_attributes_in_beep[i]);
2083 if (err)
62a1d05f 2084 goto error;
9172b5d1
GR		 2085 }
2086 }
2087
4573acbc
GR		 2088 for (i = 0; i < 3; i++) {
2089 if (!(data->has_temp & (1 << i)))
2090 continue;
2091 err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]);
d9b327c3 2092 if (err)
62a1d05f 2093 goto error;
161d898a
GR		 2094 if (has_temp_offset(data)) {
2095 err = sysfs_create_file(&dev->kobj,
2096 it87_attributes_temp_offset[i]);
2097 if (err)
2098 goto error;
2099 }
4573acbc
GR		 2100 if (sio_data->beep_pin) {
2101 err = sysfs_create_file(&dev->kobj,
2102 it87_attributes_temp_beep[i]);
2103 if (err)
2104 goto error;
2105 }
d9b327c3
JD		 2106 }
2107
9060f8bd 2108 /* Do not create fan files for disabled fans */
d9b327c3 2109 fan_beep_need_rw = 1;
723a0aa0
JD		 2110 for (i = 0; i < 5; i++) {
2111 if (!(data->has_fan & (1 << i)))
2112 continue;
e1169ba0 2113 err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]);
723a0aa0 2114 if (err)
62a1d05f 2115 goto error;
d9b327c3 2116
e1169ba0
GR		 2117 if (i < 3 && !has_16bit_fans(data)) {
2118 err = sysfs_create_file(&dev->kobj,
2119 it87_attributes_fan_div[i]);
2120 if (err)
2121 goto error;
2122 }
2123
d9b327c3
JD		 2124 if (sio_data->beep_pin) {
2125 err = sysfs_create_file(&dev->kobj,
2126 it87_attributes_fan_beep[i]);
2127 if (err)
62a1d05f 2128 goto error;
d9b327c3
JD		 2129 if (!fan_beep_need_rw)
2130 continue;
2131
4a0d71cf
GR		 2132 /*
2133 * As we have a single beep enable bit for all fans,
d9b327c3 2134 * only the first enabled fan has a writable attribute
4a0d71cf
GR		 2135 * for it.
2136 */
d9b327c3
JD		 2137 if (sysfs_chmod_file(&dev->kobj,
2138 it87_attributes_fan_beep[i],
2139 S_IRUGO | S_IWUSR))
2140 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
2141 i + 1);
2142 fan_beep_need_rw = 0;
2143 }
17d648bf
JD		 2144 }
2145
1da177e4 2146 if (enable_pwm_interface) {
723a0aa0
JD		 2147 for (i = 0; i < 3; i++) {
2148 if (sio_data->skip_pwm & (1 << i))
2149 continue;
2150 err = sysfs_create_group(&dev->kobj,
2151 &it87_group_pwm[i]);
2152 if (err)
62a1d05f 2153 goto error;
4f3f51bc
JD		 2154
2155 if (!has_old_autopwm(data))
2156 continue;
2157 err = sysfs_create_group(&dev->kobj,
2158 &it87_group_autopwm[i]);
2159 if (err)
62a1d05f 2160 goto error;
98dd22c3 2161 }
1da177e4
LT		 2162 }
2163
895ff267 2164 if (!sio_data->skip_vid) {
303760b4 2165 data->vrm = vid_which_vrm();
87673dd7 2166 /* VID reading from Super-I/O config space if available */
b74f3fdd 2167 data->vid = sio_data->vid_value;
6a8d7acf
JD		 2168 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
2169 if (err)
62a1d05f 2170 goto error;
87808be4
JD		 2171 }
2172
738e5e05
JD		 2173 /* Export labels for internal sensors */
2174 for (i = 0; i < 3; i++) {
2175 if (!(sio_data->internal & (1 << i)))
2176 continue;
2177 err = sysfs_create_file(&dev->kobj,
2178 it87_attributes_label[i]);
2179 if (err)
62a1d05f 2180 goto error;
738e5e05
JD		 2181 }
2182
1beeffe4
TJ		 2183 data->hwmon_dev = hwmon_device_register(dev);
2184 if (IS_ERR(data->hwmon_dev)) {
2185 err = PTR_ERR(data->hwmon_dev);
62a1d05f 2186 goto error;
1da177e4
LT		 2187 }
2188
2189 return 0;
2190
62a1d05f 2191error:
723a0aa0 2192 it87_remove_files(dev);
1da177e4
LT		 2193 return err;
2194}
2195
281dfd0b 2196static int it87_remove(struct platform_device *pdev)
1da177e4 2197{
b74f3fdd 2198 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2199
1beeffe4 2200 hwmon_device_unregister(data->hwmon_dev);
723a0aa0 2201 it87_remove_files(&pdev->dev);
943b0830 2202
1da177e4
LT		 2203 return 0;
2204}
2205
4a0d71cf
GR		 2206/*
2207 * Must be called with data->update_lock held, except during initialization.
2208 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2209 * would slow down the IT87 access and should not be necessary.
2210 */
b74f3fdd 2211static int it87_read_value(struct it87_data *data, u8 reg)
1da177e4 2212{
b74f3fdd 2213 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2214 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT		 2215}
2216
4a0d71cf
GR		 2217/*
2218 * Must be called with data->update_lock held, except during initialization.
2219 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2220 * would slow down the IT87 access and should not be necessary.
2221 */
b74f3fdd 2222static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
1da177e4 2223{
b74f3fdd 2224 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2225 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT		 2226}
2227
2228/* Return 1 if and only if the PWM interface is safe to use */
6c931ae1 2229static int it87_check_pwm(struct device *dev)
1da177e4 2230{
b74f3fdd 2231 struct it87_data *data = dev_get_drvdata(dev);
4a0d71cf
GR		 2232 /*
2233 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
1da177e4 2234 * and polarity set to active low is sign that this is the case so we
4a0d71cf
GR		 2235 * disable pwm control to protect the user.
2236 */
b74f3fdd 2237 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1da177e4
LT		 2238 if ((tmp & 0x87) == 0) {
2239 if (fix_pwm_polarity) {
4a0d71cf
GR		 2240 /*
2241 * The user asks us to attempt a chip reconfiguration.
1da177e4 2242 * This means switching to active high polarity and
4a0d71cf
GR		 2243 * inverting all fan speed values.
2244 */
1da177e4
LT		 2245 int i;
2246 u8 pwm[3];
2247
2248 for (i = 0; i < 3; i++)
b74f3fdd 2249 pwm[i] = it87_read_value(data,
1da177e4
LT		 2250 IT87_REG_PWM(i));
2251
4a0d71cf
GR		 2252 /*
2253 * If any fan is in automatic pwm mode, the polarity
1da177e4
LT		 2254 * might be correct, as suspicious as it seems, so we
2255 * better don't change anything (but still disable the
4a0d71cf
GR		 2256 * PWM interface).
2257 */
1da177e4 2258 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
1d9bcf6a
GR		 2259 dev_info(dev,
2260 "Reconfiguring PWM to active high polarity\n");
b74f3fdd 2261 it87_write_value(data, IT87_REG_FAN_CTL,
1da177e4
LT		 2262 tmp | 0x87);
2263 for (i = 0; i < 3; i++)
b74f3fdd 2264 it87_write_value(data,
1da177e4
LT		 2265 IT87_REG_PWM(i),
2266 0x7f & ~pwm[i]);
2267 return 1;
2268 }
2269
1d9bcf6a
GR		 2270 dev_info(dev,
2271 "PWM configuration is too broken to be fixed\n");
1da177e4
LT		 2272 }
2273
1d9bcf6a
GR		 2274 dev_info(dev,
2275 "Detected broken BIOS defaults, disabling PWM interface\n");
1da177e4
LT		 2276 return 0;
2277 } else if (fix_pwm_polarity) {
1d9bcf6a
GR		 2278 dev_info(dev,
2279 "PWM configuration looks sane, won't touch\n");
1da177e4
LT		 2280 }
2281
2282 return 1;
2283}
2284
2285/* Called when we have found a new IT87. */
6c931ae1 2286static void it87_init_device(struct platform_device *pdev)
1da177e4 2287{
591ec650 2288 struct it87_sio_data *sio_data = pdev->dev.platform_data;
b74f3fdd 2289 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2290 int tmp, i;
591ec650 2291 u8 mask;
1da177e4 2292
4a0d71cf
GR		 2293 /*
2294 * For each PWM channel:
b99883dc
JD		 2295 * - If it is in automatic mode, setting to manual mode should set
2296 * the fan to full speed by default.
2297 * - If it is in manual mode, we need a mapping to temperature
2298 * channels to use when later setting to automatic mode later.
2299 * Use a 1:1 mapping by default (we are clueless.)
2300 * In both cases, the value can (and should) be changed by the user
6229cdb2
JD		 2301 * prior to switching to a different mode.
2302 * Note that this is no longer needed for the IT8721F and later, as
2303 * these have separate registers for the temperature mapping and the
4a0d71cf
GR		 2304 * manual duty cycle.
2305 */
1da177e4 2306 for (i = 0; i < 3; i++) {
b99883dc
JD		 2307 data->pwm_temp_map[i] = i;
2308 data->pwm_duty[i] = 0x7f; /* Full speed */
4f3f51bc 2309 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
1da177e4
LT		 2310 }
2311
4a0d71cf
GR		 2312 /*
2313 * Some chips seem to have default value 0xff for all limit
c5df9b7a
JD		 2314 * registers. For low voltage limits it makes no sense and triggers
2315 * alarms, so change to 0 instead. For high temperature limits, it
2316 * means -1 degree C, which surprisingly doesn't trigger an alarm,
4a0d71cf
GR		 2317 * but is still confusing, so change to 127 degrees C.
2318 */
c5df9b7a 2319 for (i = 0; i < 8; i++) {
b74f3fdd 2320 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
c5df9b7a 2321 if (tmp == 0xff)
b74f3fdd 2322 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
c5df9b7a
JD		 2323 }
2324 for (i = 0; i < 3; i++) {
b74f3fdd 2325 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
c5df9b7a 2326 if (tmp == 0xff)
b74f3fdd 2327 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
c5df9b7a
JD		 2328 }
2329
4a0d71cf
GR		 2330 /*
2331 * Temperature channels are not forcibly enabled, as they can be
a00afb97
JD		 2332 * set to two different sensor types and we can't guess which one
2333 * is correct for a given system. These channels can be enabled at
4a0d71cf
GR		 2334 * run-time through the temp{1-3}_type sysfs accessors if needed.
2335 */
1da177e4
LT		 2336
2337 /* Check if voltage monitors are reset manually or by some reason */
b74f3fdd 2338 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
1da177e4
LT		 2339 if ((tmp & 0xff) == 0) {
2340 /* Enable all voltage monitors */
b74f3fdd 2341 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
1da177e4
LT		 2342 }
2343
2344 /* Check if tachometers are reset manually or by some reason */
591ec650 2345 mask = 0x70 & ~(sio_data->skip_fan << 4);
b74f3fdd 2346 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
591ec650 2347 if ((data->fan_main_ctrl & mask) == 0) {
1da177e4 2348 /* Enable all fan tachometers */
591ec650 2349 data->fan_main_ctrl |= mask;
5f2dc798
JD		 2350 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2351 data->fan_main_ctrl);
1da177e4 2352 }
9060f8bd 2353 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
1da177e4 2354
17d648bf 2355 /* Set tachometers to 16-bit mode if needed */
0475169c 2356 if (has_16bit_fans(data)) {
b74f3fdd 2357 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
9060f8bd 2358 if (~tmp & 0x07 & data->has_fan) {
b74f3fdd 2359 dev_dbg(&pdev->dev,
17d648bf 2360 "Setting fan1-3 to 16-bit mode\n");
b74f3fdd 2361 it87_write_value(data, IT87_REG_FAN_16BIT,
17d648bf
JD		 2362 tmp | 0x07);
2363 }
0531d98b
GR		 2364 /* IT8705F, IT8782F, and IT8783E/F only support three fans. */
2365 if (data->type != it87 && data->type != it8782 &&
2366 data->type != it8783) {
816d8c6a
AP		 2367 if (tmp & (1 << 4))
2368 data->has_fan |= (1 << 3); /* fan4 enabled */
2369 if (tmp & (1 << 5))
2370 data->has_fan |= (1 << 4); /* fan5 enabled */
2371 }
17d648bf
JD		 2372 }
2373
591ec650
JD		 2374 /* Fan input pins may be used for alternative functions */
2375 data->has_fan &= ~sio_data->skip_fan;
2376
1da177e4 2377 /* Start monitoring */
b74f3fdd 2378 it87_write_value(data, IT87_REG_CONFIG,
41002f8d 2379 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
1da177e4
LT		 2380 | (update_vbat ? 0x41 : 0x01));
2381}
2382
b99883dc
JD		 2383static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
2384{
2385 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
16b5dda2 2386 if (has_newer_autopwm(data)) {
b99883dc 2387 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
6229cdb2
JD		 2388 data->pwm_duty[nr] = it87_read_value(data,
2389 IT87_REG_PWM_DUTY(nr));
2390 } else {
2391 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
2392 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2393 else /* Manual mode */
2394 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
2395 }
4f3f51bc
JD		 2396
2397 if (has_old_autopwm(data)) {
2398 int i;
2399
2400 for (i = 0; i < 5 ; i++)
2401 data->auto_temp[nr][i] = it87_read_value(data,
2402 IT87_REG_AUTO_TEMP(nr, i));
2403 for (i = 0; i < 3 ; i++)
2404 data->auto_pwm[nr][i] = it87_read_value(data,
2405 IT87_REG_AUTO_PWM(nr, i));
2406 }
b99883dc
JD		 2407}
2408
1da177e4
LT		 2409static struct it87_data *it87_update_device(struct device *dev)
2410{
b74f3fdd 2411 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 2412 int i;
2413
9a61bf63 2414 mutex_lock(&data->update_lock);
1da177e4
LT		 2415
2416 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
2417 || !data->valid) {
1da177e4 2418 if (update_vbat) {
4a0d71cf
GR		 2419 /*
2420 * Cleared after each update, so reenable. Value
2421 * returned by this read will be previous value
2422 */
b74f3fdd 2423 it87_write_value(data, IT87_REG_CONFIG,
5f2dc798 2424 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1da177e4
LT		 2425 }
2426 for (i = 0; i <= 7; i++) {
929c6a56 2427 data->in[i][0] =
5f2dc798 2428 it87_read_value(data, IT87_REG_VIN(i));
929c6a56 2429 data->in[i][1] =
5f2dc798 2430 it87_read_value(data, IT87_REG_VIN_MIN(i));
929c6a56 2431 data->in[i][2] =
5f2dc798 2432 it87_read_value(data, IT87_REG_VIN_MAX(i));
1da177e4 2433 }
3543a53f 2434 /* in8 (battery) has no limit registers */
929c6a56 2435 data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8));
1da177e4 2436
c7f1f716 2437 for (i = 0; i < 5; i++) {
9060f8bd
JD		 2438 /* Skip disabled fans */
2439 if (!(data->has_fan & (1 << i)))
2440 continue;
2441
e1169ba0 2442 data->fan[i][1] =
5f2dc798 2443 it87_read_value(data, IT87_REG_FAN_MIN[i]);
e1169ba0 2444 data->fan[i][0] = it87_read_value(data,
c7f1f716 2445 IT87_REG_FAN[i]);
17d648bf 2446 /* Add high byte if in 16-bit mode */
0475169c 2447 if (has_16bit_fans(data)) {
e1169ba0 2448 data->fan[i][0] |= it87_read_value(data,
c7f1f716 2449 IT87_REG_FANX[i]) << 8;
e1169ba0 2450 data->fan[i][1] |= it87_read_value(data,
c7f1f716 2451 IT87_REG_FANX_MIN[i]) << 8;
17d648bf 2452 }
1da177e4
LT		 2453 }
2454 for (i = 0; i < 3; i++) {
4573acbc
GR		 2455 if (!(data->has_temp & (1 << i)))
2456 continue;
60ca385a 2457 data->temp[i][0] =
5f2dc798 2458 it87_read_value(data, IT87_REG_TEMP(i));
60ca385a 2459 data->temp[i][1] =
5f2dc798 2460 it87_read_value(data, IT87_REG_TEMP_LOW(i));
60ca385a
GR		 2461 data->temp[i][2] =
2462 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
161d898a
GR		 2463 if (has_temp_offset(data))
2464 data->temp[i][3] =
2465 it87_read_value(data,
2466 IT87_REG_TEMP_OFFSET[i]);
1da177e4
LT		 2467 }
2468
17d648bf 2469 /* Newer chips don't have clock dividers */
0475169c 2470 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
b74f3fdd 2471 i = it87_read_value(data, IT87_REG_FAN_DIV);
17d648bf
JD		 2472 data->fan_div[0] = i & 0x07;
2473 data->fan_div[1] = (i >> 3) & 0x07;
2474 data->fan_div[2] = (i & 0x40) ? 3 : 1;
2475 }
1da177e4
LT		 2476
2477 data->alarms =
b74f3fdd 2478 it87_read_value(data, IT87_REG_ALARM1) |
2479 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
2480 (it87_read_value(data, IT87_REG_ALARM3) << 16);
d9b327c3 2481 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
b99883dc 2482
b74f3fdd 2483 data->fan_main_ctrl = it87_read_value(data,
2484 IT87_REG_FAN_MAIN_CTRL);
2485 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
b99883dc
JD		 2486 for (i = 0; i < 3; i++)
2487 it87_update_pwm_ctrl(data, i);
b74f3fdd 2488
2489 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
19529784 2490 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
4a0d71cf
GR		 2491 /*
2492 * The IT8705F does not have VID capability.
2493 * The IT8718F and later don't use IT87_REG_VID for the
2494 * same purpose.
2495 */
17d648bf 2496 if (data->type == it8712 || data->type == it8716) {
b74f3fdd 2497 data->vid = it87_read_value(data, IT87_REG_VID);
4a0d71cf
GR		 2498 /*
2499 * The older IT8712F revisions had only 5 VID pins,
2500 * but we assume it is always safe to read 6 bits.
2501 */
17d648bf 2502 data->vid &= 0x3f;
1da177e4
LT		 2503 }
2504 data->last_updated = jiffies;
2505 data->valid = 1;
2506 }
2507
9a61bf63 2508 mutex_unlock(&data->update_lock);
1da177e4
LT		 2509
2510 return data;
2511}
2512
b74f3fdd 2513static int __init it87_device_add(unsigned short address,
2514 const struct it87_sio_data *sio_data)
2515{
2516 struct resource res = {
87b4b663
BH		 2517 .start = address + IT87_EC_OFFSET,
2518 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
b74f3fdd 2519 .name = DRVNAME,
2520 .flags = IORESOURCE_IO,
2521 };
2522 int err;
2523
b9acb64a
JD		 2524 err = acpi_check_resource_conflict(&res);
2525 if (err)
2526 goto exit;
2527
b74f3fdd 2528 pdev = platform_device_alloc(DRVNAME, address);
2529 if (!pdev) {
2530 err = -ENOMEM;
a8ca1037 2531 pr_err("Device allocation failed\n");
b74f3fdd 2532 goto exit;
2533 }
2534
2535 err = platform_device_add_resources(pdev, &res, 1);
2536 if (err) {
a8ca1037 2537 pr_err("Device resource addition failed (%d)\n", err);
b74f3fdd 2538 goto exit_device_put;
2539 }
2540
2541 err = platform_device_add_data(pdev, sio_data,
2542 sizeof(struct it87_sio_data));
2543 if (err) {
a8ca1037 2544 pr_err("Platform data allocation failed\n");
b74f3fdd 2545 goto exit_device_put;
2546 }
2547
2548 err = platform_device_add(pdev);
2549 if (err) {
a8ca1037 2550 pr_err("Device addition failed (%d)\n", err);
b74f3fdd 2551 goto exit_device_put;
2552 }
2553
2554 return 0;
2555
2556exit_device_put:
2557 platform_device_put(pdev);
2558exit:
2559 return err;
2560}
2561
1da177e4
LT		 2562static int __init sm_it87_init(void)
2563{
b74f3fdd 2564 int err;
5f2dc798 2565 unsigned short isa_address = 0;
b74f3fdd 2566 struct it87_sio_data sio_data;
2567
98dd22c3 2568 memset(&sio_data, 0, sizeof(struct it87_sio_data));
b74f3fdd 2569 err = it87_find(&isa_address, &sio_data);
2570 if (err)
2571 return err;
2572 err = platform_driver_register(&it87_driver);
2573 if (err)
2574 return err;
fde09509 2575
b74f3fdd 2576 err = it87_device_add(isa_address, &sio_data);
5f2dc798 2577 if (err) {
b74f3fdd 2578 platform_driver_unregister(&it87_driver);
2579 return err;
2580 }
2581
2582 return 0;
1da177e4
LT		 2583}
2584
2585static void __exit sm_it87_exit(void)
2586{
b74f3fdd 2587 platform_device_unregister(pdev);
2588 platform_driver_unregister(&it87_driver);
1da177e4
LT		 2589}
2590
2591
1d9bcf6a 2592MODULE_AUTHOR("Chris Gauthron, Jean Delvare <khali@linux-fr.org>");
44c1bcd4 2593MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
1da177e4
LT		 2594module_param(update_vbat, bool, 0);
2595MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2596module_param(fix_pwm_polarity, bool, 0);
5f2dc798
JD		 2597MODULE_PARM_DESC(fix_pwm_polarity,
2598 "Force PWM polarity to active high (DANGEROUS)");
1da177e4
LT		 2599MODULE_LICENSE("GPL");
2600
2601module_init(sm_it87_init);
2602module_exit(sm_it87_exit);
Linux 6.x block layer and io_uring tree(s)