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hwmon: (it87) Manage device specific features with table
[linux-block.git] / drivers / hwmon / it87.c
CommitLineData
1da177e4 1/*
5f2dc798
JD		 2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring.
4 *
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
8 * Fan Controller)
9 *
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
12 *
13 * Supports: IT8705F Super I/O chip w/LPC interface
14 * IT8712F Super I/O chip w/LPC interface
15 * IT8716F Super I/O chip w/LPC interface
16 * IT8718F Super I/O chip w/LPC interface
17 * IT8720F Super I/O chip w/LPC interface
44c1bcd4 18 * IT8721F Super I/O chip w/LPC interface
5f2dc798 19 * IT8726F Super I/O chip w/LPC interface
16b5dda2 20 * IT8728F Super I/O chip w/LPC interface
44c1bcd4 21 * IT8758E Super I/O chip w/LPC interface
0531d98b
GR		 22 * IT8782F Super I/O chip w/LPC interface
23 * IT8783E/F Super I/O chip w/LPC interface
5f2dc798
JD		 24 * Sis950 A clone of the IT8705F
25 *
26 * Copyright (C) 2001 Chris Gauthron
27 * Copyright (C) 2005-2010 Jean Delvare <khali@linux-fr.org>
28 *
29 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License as published by
31 * the Free Software Foundation; either version 2 of the License, or
32 * (at your option) any later version.
33 *
34 * This program is distributed in the hope that it will be useful,
35 * but WITHOUT ANY WARRANTY; without even the implied warranty of
36 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
37 * GNU General Public License for more details.
38 *
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
42 */
1da177e4 43
a8ca1037
JP		 44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
1da177e4
LT		 46#include <linux/module.h>
47#include <linux/init.h>
48#include <linux/slab.h>
49#include <linux/jiffies.h>
b74f3fdd 50#include <linux/platform_device.h>
943b0830 51#include <linux/hwmon.h>
303760b4
JD		 52#include <linux/hwmon-sysfs.h>
53#include <linux/hwmon-vid.h>
943b0830 54#include <linux/err.h>
9a61bf63 55#include <linux/mutex.h>
87808be4 56#include <linux/sysfs.h>
98dd22c3
JD		 57#include <linux/string.h>
58#include <linux/dmi.h>
b9acb64a 59#include <linux/acpi.h>
6055fae8 60#include <linux/io.h>
1da177e4 61
b74f3fdd 62#define DRVNAME "it87"
1da177e4 63
0531d98b
GR		 64enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8782,
65 it8783 };
1da177e4 66
67b671bc
JD		 67static unsigned short force_id;
68module_param(force_id, ushort, 0);
69MODULE_PARM_DESC(force_id, "Override the detected device ID");
70
b74f3fdd 71static struct platform_device *pdev;
72
1da177e4
LT		 73#define REG 0x2e /* The register to read/write */
74#define DEV 0x07 /* Register: Logical device select */
75#define VAL 0x2f /* The value to read/write */
76#define PME 0x04 /* The device with the fan registers in it */
b4da93e4
JMS		 77
78/* The device with the IT8718F/IT8720F VID value in it */
79#define GPIO 0x07
80
1da177e4
LT		 81#define DEVID 0x20 /* Register: Device ID */
82#define DEVREV 0x22 /* Register: Device Revision */
83
5b0380c9 84static inline int superio_inb(int reg)
1da177e4
LT		 85{
86 outb(reg, REG);
87 return inb(VAL);
88}
89
5b0380c9 90static inline void superio_outb(int reg, int val)
436cad2a
JD		 91{
92 outb(reg, REG);
93 outb(val, VAL);
94}
95
1da177e4
LT		 96static int superio_inw(int reg)
97{
98 int val;
99 outb(reg++, REG);
100 val = inb(VAL) << 8;
101 outb(reg, REG);
102 val |= inb(VAL);
103 return val;
104}
105
5b0380c9 106static inline void superio_select(int ldn)
1da177e4
LT		 107{
108 outb(DEV, REG);
87673dd7 109 outb(ldn, VAL);
1da177e4
LT		 110}
111
5b0380c9 112static inline int superio_enter(void)
1da177e4 113{
5b0380c9
NG		 114 /*
115 * Try to reserve REG and REG + 1 for exclusive access.
116 */
117 if (!request_muxed_region(REG, 2, DRVNAME))
118 return -EBUSY;
119
1da177e4
LT		 120 outb(0x87, REG);
121 outb(0x01, REG);
122 outb(0x55, REG);
123 outb(0x55, REG);
5b0380c9 124 return 0;
1da177e4
LT		 125}
126
5b0380c9 127static inline void superio_exit(void)
1da177e4
LT		 128{
129 outb(0x02, REG);
130 outb(0x02, VAL);
5b0380c9 131 release_region(REG, 2);
1da177e4
LT		 132}
133
87673dd7 134/* Logical device 4 registers */
1da177e4
LT		 135#define IT8712F_DEVID 0x8712
136#define IT8705F_DEVID 0x8705
17d648bf 137#define IT8716F_DEVID 0x8716
87673dd7 138#define IT8718F_DEVID 0x8718
b4da93e4 139#define IT8720F_DEVID 0x8720
44c1bcd4 140#define IT8721F_DEVID 0x8721
08a8f6e9 141#define IT8726F_DEVID 0x8726
16b5dda2 142#define IT8728F_DEVID 0x8728
0531d98b
GR		 143#define IT8782F_DEVID 0x8782
144#define IT8783E_DEVID 0x8783
1da177e4
LT		 145#define IT87_ACT_REG 0x30
146#define IT87_BASE_REG 0x60
147
87673dd7 148/* Logical device 7 registers (IT8712F and later) */
0531d98b 149#define IT87_SIO_GPIO1_REG 0x25
895ff267 150#define IT87_SIO_GPIO3_REG 0x27
591ec650 151#define IT87_SIO_GPIO5_REG 0x29
0531d98b 152#define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
87673dd7 153#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
0531d98b 154#define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
87673dd7 155#define IT87_SIO_VID_REG 0xfc /* VID value */
d9b327c3 156#define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
87673dd7 157
1da177e4 158/* Update battery voltage after every reading if true */
90ab5ee9 159static bool update_vbat;
1da177e4
LT		 160
161/* Not all BIOSes properly configure the PWM registers */
90ab5ee9 162static bool fix_pwm_polarity;
1da177e4 163
1da177e4
LT		 164/* Many IT87 constants specified below */
165
166/* Length of ISA address segment */
167#define IT87_EXTENT 8
168
87b4b663
BH		 169/* Length of ISA address segment for Environmental Controller */
170#define IT87_EC_EXTENT 2
171
172/* Offset of EC registers from ISA base address */
173#define IT87_EC_OFFSET 5
174
175/* Where are the ISA address/data registers relative to the EC base address */
176#define IT87_ADDR_REG_OFFSET 0
177#define IT87_DATA_REG_OFFSET 1
1da177e4
LT		 178
179/*----- The IT87 registers -----*/
180
181#define IT87_REG_CONFIG 0x00
182
183#define IT87_REG_ALARM1 0x01
184#define IT87_REG_ALARM2 0x02
185#define IT87_REG_ALARM3 0x03
186
4a0d71cf
GR		 187/*
188 * The IT8718F and IT8720F have the VID value in a different register, in
189 * Super-I/O configuration space.
190 */
1da177e4 191#define IT87_REG_VID 0x0a
4a0d71cf
GR		 192/*
193 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
194 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
195 * mode.
196 */
1da177e4 197#define IT87_REG_FAN_DIV 0x0b
17d648bf 198#define IT87_REG_FAN_16BIT 0x0c
1da177e4
LT		 199
200/* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
201
c7f1f716
JD		 202static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
203static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 };
204static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 };
205static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
161d898a
GR		 206static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
207
1da177e4
LT		 208#define IT87_REG_FAN_MAIN_CTRL 0x13
209#define IT87_REG_FAN_CTL 0x14
210#define IT87_REG_PWM(nr) (0x15 + (nr))
6229cdb2 211#define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8)
1da177e4
LT		 212
213#define IT87_REG_VIN(nr) (0x20 + (nr))
214#define IT87_REG_TEMP(nr) (0x29 + (nr))
215
216#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
217#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
218#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
219#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
220
1da177e4
LT		 221#define IT87_REG_VIN_ENABLE 0x50
222#define IT87_REG_TEMP_ENABLE 0x51
4573acbc 223#define IT87_REG_TEMP_EXTRA 0x55
d9b327c3 224#define IT87_REG_BEEP_ENABLE 0x5c
1da177e4
LT		 225
226#define IT87_REG_CHIPID 0x58
227
4f3f51bc
JD		 228#define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
229#define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i))
230
483db43e
GR		 231struct it87_devices {
232 const char *name;
233 u16 features;
234};
235
236#define FEAT_12MV_ADC (1 << 0)
237#define FEAT_NEWER_AUTOPWM (1 << 1)
238#define FEAT_OLD_AUTOPWM (1 << 2)
239#define FEAT_16BIT_FANS (1 << 3)
240#define FEAT_TEMP_OFFSET (1 << 4)
241
242static const struct it87_devices it87_devices[] = {
243 [it87] = {
244 .name = "it87",
245 .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */
246 },
247 [it8712] = {
248 .name = "it8712",
249 .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */
250 },
251 [it8716] = {
252 .name = "it8716",
253 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET,
254 },
255 [it8718] = {
256 .name = "it8718",
257 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET,
258 },
259 [it8720] = {
260 .name = "it8720",
261 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET,
262 },
263 [it8721] = {
264 .name = "it8721",
265 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
266 | FEAT_TEMP_OFFSET,
267 },
268 [it8728] = {
269 .name = "it8728",
270 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
271 | FEAT_TEMP_OFFSET,
272 },
273 [it8782] = {
274 .name = "it8782",
275 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET,
276 },
277 [it8783] = {
278 .name = "it8783",
279 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET,
280 },
281};
282
283#define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS)
284#define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC)
285#define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
286#define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM)
287#define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET)
1da177e4 288
b74f3fdd 289struct it87_sio_data {
290 enum chips type;
291 /* Values read from Super-I/O config space */
0475169c 292 u8 revision;
b74f3fdd 293 u8 vid_value;
d9b327c3 294 u8 beep_pin;
738e5e05 295 u8 internal; /* Internal sensors can be labeled */
591ec650 296 /* Features skipped based on config or DMI */
9172b5d1 297 u16 skip_in;
895ff267 298 u8 skip_vid;
591ec650 299 u8 skip_fan;
98dd22c3 300 u8 skip_pwm;
4573acbc 301 u8 skip_temp;
b74f3fdd 302};
303
4a0d71cf
GR		 304/*
305 * For each registered chip, we need to keep some data in memory.
306 * The structure is dynamically allocated.
307 */
1da177e4 308struct it87_data {
1beeffe4 309 struct device *hwmon_dev;
1da177e4 310 enum chips type;
483db43e 311 u16 features;
1da177e4 312
b74f3fdd 313 unsigned short addr;
314 const char *name;
9a61bf63 315 struct mutex update_lock;
1da177e4
LT		 316 char valid; /* !=0 if following fields are valid */
317 unsigned long last_updated; /* In jiffies */
318
44c1bcd4 319 u16 in_scaled; /* Internal voltage sensors are scaled */
929c6a56 320 u8 in[9][3]; /* [nr][0]=in, [1]=min, [2]=max */
9060f8bd 321 u8 has_fan; /* Bitfield, fans enabled */
e1169ba0 322 u16 fan[5][2]; /* Register values, [nr][0]=fan, [1]=min */
4573acbc 323 u8 has_temp; /* Bitfield, temp sensors enabled */
161d898a 324 s8 temp[3][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
1da177e4
LT		 325 u8 sensor; /* Register value */
326 u8 fan_div[3]; /* Register encoding, shifted right */
327 u8 vid; /* Register encoding, combined */
a7be58a1 328 u8 vrm;
1da177e4 329 u32 alarms; /* Register encoding, combined */
d9b327c3 330 u8 beeps; /* Register encoding */
1da177e4 331 u8 fan_main_ctrl; /* Register value */
f8d0c19a 332 u8 fan_ctl; /* Register value */
b99883dc 333
4a0d71cf
GR		 334 /*
335 * The following 3 arrays correspond to the same registers up to
6229cdb2
JD		 336 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
337 * 7, and we want to preserve settings on mode changes, so we have
338 * to track all values separately.
339 * Starting with the IT8721F, the manual PWM duty cycles are stored
340 * in separate registers (8-bit values), so the separate tracking
341 * is no longer needed, but it is still done to keep the driver
4a0d71cf
GR		 342 * simple.
343 */
b99883dc 344 u8 pwm_ctrl[3]; /* Register value */
6229cdb2 345 u8 pwm_duty[3]; /* Manual PWM value set by user */
b99883dc 346 u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */
4f3f51bc
JD		 347
348 /* Automatic fan speed control registers */
349 u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */
350 s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */
1da177e4 351};
0df6454d 352
0531d98b 353static int adc_lsb(const struct it87_data *data, int nr)
44c1bcd4 354{
0531d98b
GR		 355 int lsb = has_12mv_adc(data) ? 12 : 16;
356 if (data->in_scaled & (1 << nr))
357 lsb <<= 1;
358 return lsb;
359}
44c1bcd4 360
0531d98b
GR		 361static u8 in_to_reg(const struct it87_data *data, int nr, long val)
362{
363 val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr));
44c1bcd4
JD		 364 return SENSORS_LIMIT(val, 0, 255);
365}
366
367static int in_from_reg(const struct it87_data *data, int nr, int val)
368{
0531d98b 369 return val * adc_lsb(data, nr);
44c1bcd4 370}
0df6454d
JD		 371
372static inline u8 FAN_TO_REG(long rpm, int div)
373{
374 if (rpm == 0)
375 return 255;
376 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
377 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
378 254);
379}
380
381static inline u16 FAN16_TO_REG(long rpm)
382{
383 if (rpm == 0)
384 return 0xffff;
385 return SENSORS_LIMIT((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
386}
387
388#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
389 1350000 / ((val) * (div)))
390/* The divider is fixed to 2 in 16-bit mode */
391#define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
392 1350000 / ((val) * 2))
393
394#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (((val) - 500) / 1000) : \
395 ((val) + 500) / 1000), -128, 127))
396#define TEMP_FROM_REG(val) ((val) * 1000)
397
44c1bcd4
JD		 398static u8 pwm_to_reg(const struct it87_data *data, long val)
399{
16b5dda2 400 if (has_newer_autopwm(data))
44c1bcd4
JD		 401 return val;
402 else
403 return val >> 1;
404}
405
406static int pwm_from_reg(const struct it87_data *data, u8 reg)
407{
16b5dda2 408 if (has_newer_autopwm(data))
44c1bcd4
JD		 409 return reg;
410 else
411 return (reg & 0x7f) << 1;
412}
413
0df6454d
JD		 414
415static int DIV_TO_REG(int val)
416{
417 int answer = 0;
418 while (answer < 7 && (val >>= 1))
419 answer++;
420 return answer;
421}
422#define DIV_FROM_REG(val) (1 << (val))
423
424static const unsigned int pwm_freq[8] = {
425 48000000 / 128,
426 24000000 / 128,
427 12000000 / 128,
428 8000000 / 128,
429 6000000 / 128,
430 3000000 / 128,
431 1500000 / 128,
432 750000 / 128,
433};
1da177e4 434
b74f3fdd 435static int it87_probe(struct platform_device *pdev);
281dfd0b 436static int it87_remove(struct platform_device *pdev);
1da177e4 437
b74f3fdd 438static int it87_read_value(struct it87_data *data, u8 reg);
439static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
1da177e4 440static struct it87_data *it87_update_device(struct device *dev);
b74f3fdd 441static int it87_check_pwm(struct device *dev);
442static void it87_init_device(struct platform_device *pdev);
1da177e4
LT		 443
444
b74f3fdd 445static struct platform_driver it87_driver = {
cdaf7934 446 .driver = {
87218842 447 .owner = THIS_MODULE,
b74f3fdd 448 .name = DRVNAME,
cdaf7934 449 },
b74f3fdd 450 .probe = it87_probe,
9e5e9b7a 451 .remove = it87_remove,
fde09509
JD		 452};
453
20ad93d4 454static ssize_t show_in(struct device *dev, struct device_attribute *attr,
929c6a56 455 char *buf)
1da177e4 456{
929c6a56
GR		 457 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
458 int nr = sattr->nr;
459 int index = sattr->index;
20ad93d4 460
1da177e4 461 struct it87_data *data = it87_update_device(dev);
929c6a56 462 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1da177e4
LT		 463}
464
929c6a56
GR		 465static ssize_t set_in(struct device *dev, struct device_attribute *attr,
466 const char *buf, size_t count)
1da177e4 467{
929c6a56
GR		 468 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
469 int nr = sattr->nr;
470 int index = sattr->index;
20ad93d4 471
b74f3fdd 472 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 473 unsigned long val;
474
179c4fdb 475 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 476 return -EINVAL;
1da177e4 477
9a61bf63 478 mutex_lock(&data->update_lock);
929c6a56
GR		 479 data->in[nr][index] = in_to_reg(data, nr, val);
480 it87_write_value(data,
481 index == 1 ? IT87_REG_VIN_MIN(nr)
482 : IT87_REG_VIN_MAX(nr),
483 data->in[nr][index]);
9a61bf63 484 mutex_unlock(&data->update_lock);
1da177e4
LT		 485 return count;
486}
20ad93d4 487
929c6a56
GR		 488static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
489static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
490 0, 1);
491static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
492 0, 2);
f5f64501 493
929c6a56
GR		 494static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
495static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
496 1, 1);
497static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
498 1, 2);
1da177e4 499
929c6a56
GR		 500static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
501static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
502 2, 1);
503static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
504 2, 2);
1da177e4 505
929c6a56
GR		 506static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
507static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
508 3, 1);
509static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
510 3, 2);
511
512static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
513static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
514 4, 1);
515static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
516 4, 2);
517
518static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
519static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
520 5, 1);
521static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
522 5, 2);
523
524static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
525static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
526 6, 1);
527static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
528 6, 2);
529
530static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
531static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
532 7, 1);
533static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
534 7, 2);
535
536static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1da177e4
LT		 537
538/* 3 temperatures */
20ad93d4 539static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
60ca385a 540 char *buf)
1da177e4 541{
60ca385a
GR		 542 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
543 int nr = sattr->nr;
544 int index = sattr->index;
1da177e4 545 struct it87_data *data = it87_update_device(dev);
20ad93d4 546
60ca385a 547 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1da177e4 548}
20ad93d4 549
60ca385a
GR		 550static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
551 const char *buf, size_t count)
1da177e4 552{
60ca385a
GR		 553 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
554 int nr = sattr->nr;
555 int index = sattr->index;
b74f3fdd 556 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 557 long val;
161d898a 558 u8 reg, regval;
f5f64501 559
179c4fdb 560 if (kstrtol(buf, 10, &val) < 0)
f5f64501 561 return -EINVAL;
1da177e4 562
9a61bf63 563 mutex_lock(&data->update_lock);
161d898a
GR		 564
565 switch (index) {
566 default:
567 case 1:
568 reg = IT87_REG_TEMP_LOW(nr);
569 break;
570 case 2:
571 reg = IT87_REG_TEMP_HIGH(nr);
572 break;
573 case 3:
574 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
575 if (!(regval & 0x80)) {
576 regval |= 0x80;
577 it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
578 }
579 data->valid = 0;
580 reg = IT87_REG_TEMP_OFFSET[nr];
581 break;
582 }
583
60ca385a 584 data->temp[nr][index] = TEMP_TO_REG(val);
161d898a 585 it87_write_value(data, reg, data->temp[nr][index]);
9a61bf63 586 mutex_unlock(&data->update_lock);
1da177e4
LT		 587 return count;
588}
1da177e4 589
60ca385a
GR		 590static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
591static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
592 0, 1);
593static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
594 0, 2);
161d898a
GR		 595static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
596 set_temp, 0, 3);
60ca385a
GR		 597static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
598static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
599 1, 1);
600static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
601 1, 2);
161d898a
GR		 602static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
603 set_temp, 1, 3);
60ca385a
GR		 604static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
605static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
606 2, 1);
607static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
608 2, 2);
161d898a
GR		 609static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
610 set_temp, 2, 3);
1da177e4 611
2cece01f
GR		 612static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
613 char *buf)
1da177e4 614{
20ad93d4
JD		 615 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
616 int nr = sensor_attr->index;
1da177e4 617 struct it87_data *data = it87_update_device(dev);
4a0d71cf 618 u8 reg = data->sensor; /* In case value is updated while used */
5f2dc798 619
1da177e4
LT		 620 if (reg & (1 << nr))
621 return sprintf(buf, "3\n"); /* thermal diode */
622 if (reg & (8 << nr))
4ed10779 623 return sprintf(buf, "4\n"); /* thermistor */
1da177e4
LT		 624 return sprintf(buf, "0\n"); /* disabled */
625}
2cece01f
GR		 626
627static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
628 const char *buf, size_t count)
1da177e4 629{
20ad93d4
JD		 630 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
631 int nr = sensor_attr->index;
632
b74f3fdd 633 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 634 long val;
8acf07c5 635 u8 reg;
f5f64501 636
179c4fdb 637 if (kstrtol(buf, 10, &val) < 0)
f5f64501 638 return -EINVAL;
1da177e4 639
8acf07c5
JD		 640 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
641 reg &= ~(1 << nr);
642 reg &= ~(8 << nr);
4ed10779 643 if (val == 2) { /* backwards compatibility */
1d9bcf6a
GR		 644 dev_warn(dev,
645 "Sensor type 2 is deprecated, please use 4 instead\n");
4ed10779
JD		 646 val = 4;
647 }
648 /* 3 = thermal diode; 4 = thermistor; 0 = disabled */
1da177e4 649 if (val == 3)
8acf07c5 650 reg |= 1 << nr;
4ed10779 651 else if (val == 4)
8acf07c5
JD		 652 reg |= 8 << nr;
653 else if (val != 0)
1da177e4 654 return -EINVAL;
8acf07c5
JD		 655
656 mutex_lock(&data->update_lock);
657 data->sensor = reg;
b74f3fdd 658 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
2b3d1d87 659 data->valid = 0; /* Force cache refresh */
9a61bf63 660 mutex_unlock(&data->update_lock);
1da177e4
LT		 661 return count;
662}
1da177e4 663
2cece01f
GR		 664static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
665 set_temp_type, 0);
666static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
667 set_temp_type, 1);
668static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
669 set_temp_type, 2);
1da177e4
LT		 670
671/* 3 Fans */
b99883dc
JD		 672
673static int pwm_mode(const struct it87_data *data, int nr)
674{
675 int ctrl = data->fan_main_ctrl & (1 << nr);
676
677 if (ctrl == 0) /* Full speed */
678 return 0;
679 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
680 return 2;
681 else /* Manual mode */
682 return 1;
683}
684
20ad93d4 685static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
e1169ba0 686 char *buf)
1da177e4 687{
e1169ba0
GR		 688 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
689 int nr = sattr->nr;
690 int index = sattr->index;
691 int speed;
1da177e4 692 struct it87_data *data = it87_update_device(dev);
20ad93d4 693
e1169ba0
GR		 694 speed = has_16bit_fans(data) ?
695 FAN16_FROM_REG(data->fan[nr][index]) :
696 FAN_FROM_REG(data->fan[nr][index],
697 DIV_FROM_REG(data->fan_div[nr]));
698 return sprintf(buf, "%d\n", speed);
1da177e4 699}
e1169ba0 700
20ad93d4
JD		 701static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
702 char *buf)
1da177e4 703{
20ad93d4
JD		 704 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
705 int nr = sensor_attr->index;
706
1da177e4
LT		 707 struct it87_data *data = it87_update_device(dev);
708 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
709}
5f2dc798
JD		 710static ssize_t show_pwm_enable(struct device *dev,
711 struct device_attribute *attr, char *buf)
1da177e4 712{
20ad93d4
JD		 713 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
714 int nr = sensor_attr->index;
715
1da177e4 716 struct it87_data *data = it87_update_device(dev);
b99883dc 717 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1da177e4 718}
20ad93d4
JD		 719static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
720 char *buf)
1da177e4 721{
20ad93d4
JD		 722 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
723 int nr = sensor_attr->index;
724
1da177e4 725 struct it87_data *data = it87_update_device(dev);
44c1bcd4
JD		 726 return sprintf(buf, "%d\n",
727 pwm_from_reg(data, data->pwm_duty[nr]));
1da177e4 728}
f8d0c19a
JD		 729static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
730 char *buf)
731{
732 struct it87_data *data = it87_update_device(dev);
733 int index = (data->fan_ctl >> 4) & 0x07;
734
735 return sprintf(buf, "%u\n", pwm_freq[index]);
736}
e1169ba0
GR		 737
738static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
739 const char *buf, size_t count)
1da177e4 740{
e1169ba0
GR		 741 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
742 int nr = sattr->nr;
743 int index = sattr->index;
20ad93d4 744
b74f3fdd 745 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 746 long val;
7f999aa7 747 u8 reg;
1da177e4 748
179c4fdb 749 if (kstrtol(buf, 10, &val) < 0)
f5f64501
JD		 750 return -EINVAL;
751
9a61bf63 752 mutex_lock(&data->update_lock);
e1169ba0
GR		 753
754 if (has_16bit_fans(data)) {
755 data->fan[nr][index] = FAN16_TO_REG(val);
756 it87_write_value(data, IT87_REG_FAN_MIN[nr],
757 data->fan[nr][index] & 0xff);
758 it87_write_value(data, IT87_REG_FANX_MIN[nr],
759 data->fan[nr][index] >> 8);
760 } else {
761 reg = it87_read_value(data, IT87_REG_FAN_DIV);
762 switch (nr) {
763 case 0:
764 data->fan_div[nr] = reg & 0x07;
765 break;
766 case 1:
767 data->fan_div[nr] = (reg >> 3) & 0x07;
768 break;
769 case 2:
770 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
771 break;
772 }
773 data->fan[nr][index] =
774 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
775 it87_write_value(data, IT87_REG_FAN_MIN[nr],
776 data->fan[nr][index]);
07eab46d
JD		 777 }
778
9a61bf63 779 mutex_unlock(&data->update_lock);
1da177e4
LT		 780 return count;
781}
e1169ba0 782
20ad93d4
JD		 783static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
784 const char *buf, size_t count)
1da177e4 785{
20ad93d4
JD		 786 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
787 int nr = sensor_attr->index;
788
b74f3fdd 789 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 790 unsigned long val;
8ab4ec3e 791 int min;
1da177e4
LT		 792 u8 old;
793
179c4fdb 794 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD		 795 return -EINVAL;
796
9a61bf63 797 mutex_lock(&data->update_lock);
b74f3fdd 798 old = it87_read_value(data, IT87_REG_FAN_DIV);
1da177e4 799
8ab4ec3e 800 /* Save fan min limit */
e1169ba0 801 min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1da177e4
LT		 802
803 switch (nr) {
804 case 0:
805 case 1:
806 data->fan_div[nr] = DIV_TO_REG(val);
807 break;
808 case 2:
809 if (val < 8)
810 data->fan_div[nr] = 1;
811 else
812 data->fan_div[nr] = 3;
813 }
814 val = old & 0x80;
815 val |= (data->fan_div[0] & 0x07);
816 val |= (data->fan_div[1] & 0x07) << 3;
817 if (data->fan_div[2] == 3)
818 val |= 0x1 << 6;
b74f3fdd 819 it87_write_value(data, IT87_REG_FAN_DIV, val);
1da177e4 820
8ab4ec3e 821 /* Restore fan min limit */
e1169ba0
GR		 822 data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
823 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
8ab4ec3e 824
9a61bf63 825 mutex_unlock(&data->update_lock);
1da177e4
LT		 826 return count;
827}
cccfc9c4
JD		 828
829/* Returns 0 if OK, -EINVAL otherwise */
830static int check_trip_points(struct device *dev, int nr)
831{
832 const struct it87_data *data = dev_get_drvdata(dev);
833 int i, err = 0;
834
835 if (has_old_autopwm(data)) {
836 for (i = 0; i < 3; i++) {
837 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
838 err = -EINVAL;
839 }
840 for (i = 0; i < 2; i++) {
841 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
842 err = -EINVAL;
843 }
844 }
845
846 if (err) {
1d9bcf6a
GR		 847 dev_err(dev,
848 "Inconsistent trip points, not switching to automatic mode\n");
cccfc9c4
JD		 849 dev_err(dev, "Adjust the trip points and try again\n");
850 }
851 return err;
852}
853
20ad93d4
JD		 854static ssize_t set_pwm_enable(struct device *dev,
855 struct device_attribute *attr, const char *buf, size_t count)
1da177e4 856{
20ad93d4
JD		 857 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
858 int nr = sensor_attr->index;
859
b74f3fdd 860 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 861 long val;
1da177e4 862
179c4fdb 863 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
b99883dc
JD		 864 return -EINVAL;
865
cccfc9c4
JD		 866 /* Check trip points before switching to automatic mode */
867 if (val == 2) {
868 if (check_trip_points(dev, nr) < 0)
869 return -EINVAL;
870 }
871
9a61bf63 872 mutex_lock(&data->update_lock);
1da177e4
LT		 873
874 if (val == 0) {
875 int tmp;
876 /* make sure the fan is on when in on/off mode */
b74f3fdd 877 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
878 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1da177e4
LT		 879 /* set on/off mode */
880 data->fan_main_ctrl &= ~(1 << nr);
5f2dc798
JD		 881 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
882 data->fan_main_ctrl);
b99883dc
JD		 883 } else {
884 if (val == 1) /* Manual mode */
16b5dda2 885 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
6229cdb2
JD		 886 data->pwm_temp_map[nr] :
887 data->pwm_duty[nr];
b99883dc
JD		 888 else /* Automatic mode */
889 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
890 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1da177e4
LT		 891 /* set SmartGuardian mode */
892 data->fan_main_ctrl |= (1 << nr);
5f2dc798
JD		 893 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
894 data->fan_main_ctrl);
1da177e4
LT		 895 }
896
9a61bf63 897 mutex_unlock(&data->update_lock);
1da177e4
LT		 898 return count;
899}
20ad93d4
JD		 900static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
901 const char *buf, size_t count)
1da177e4 902{
20ad93d4
JD		 903 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
904 int nr = sensor_attr->index;
905
b74f3fdd 906 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 907 long val;
1da177e4 908
179c4fdb 909 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1da177e4
LT		 910 return -EINVAL;
911
9a61bf63 912 mutex_lock(&data->update_lock);
16b5dda2 913 if (has_newer_autopwm(data)) {
4a0d71cf
GR		 914 /*
915 * If we are in automatic mode, the PWM duty cycle register
916 * is read-only so we can't write the value.
917 */
6229cdb2
JD		 918 if (data->pwm_ctrl[nr] & 0x80) {
919 mutex_unlock(&data->update_lock);
920 return -EBUSY;
921 }
922 data->pwm_duty[nr] = pwm_to_reg(data, val);
923 it87_write_value(data, IT87_REG_PWM_DUTY(nr),
924 data->pwm_duty[nr]);
925 } else {
926 data->pwm_duty[nr] = pwm_to_reg(data, val);
4a0d71cf
GR		 927 /*
928 * If we are in manual mode, write the duty cycle immediately;
929 * otherwise, just store it for later use.
930 */
6229cdb2
JD		 931 if (!(data->pwm_ctrl[nr] & 0x80)) {
932 data->pwm_ctrl[nr] = data->pwm_duty[nr];
933 it87_write_value(data, IT87_REG_PWM(nr),
934 data->pwm_ctrl[nr]);
935 }
b99883dc 936 }
9a61bf63 937 mutex_unlock(&data->update_lock);
1da177e4
LT		 938 return count;
939}
f8d0c19a
JD		 940static ssize_t set_pwm_freq(struct device *dev,
941 struct device_attribute *attr, const char *buf, size_t count)
942{
b74f3fdd 943 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 944 unsigned long val;
f8d0c19a
JD		 945 int i;
946
179c4fdb 947 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD		 948 return -EINVAL;
949
f8d0c19a
JD		 950 /* Search for the nearest available frequency */
951 for (i = 0; i < 7; i++) {
952 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
953 break;
954 }
955
956 mutex_lock(&data->update_lock);
b74f3fdd 957 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
f8d0c19a 958 data->fan_ctl |= i << 4;
b74f3fdd 959 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
f8d0c19a
JD		 960 mutex_unlock(&data->update_lock);
961
962 return count;
963}
94ac7ee6
JD		 964static ssize_t show_pwm_temp_map(struct device *dev,
965 struct device_attribute *attr, char *buf)
966{
967 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
968 int nr = sensor_attr->index;
969
970 struct it87_data *data = it87_update_device(dev);
971 int map;
972
973 if (data->pwm_temp_map[nr] < 3)
974 map = 1 << data->pwm_temp_map[nr];
975 else
976 map = 0; /* Should never happen */
977 return sprintf(buf, "%d\n", map);
978}
979static ssize_t set_pwm_temp_map(struct device *dev,
980 struct device_attribute *attr, const char *buf, size_t count)
981{
982 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
983 int nr = sensor_attr->index;
984
985 struct it87_data *data = dev_get_drvdata(dev);
986 long val;
987 u8 reg;
988
4a0d71cf
GR		 989 /*
990 * This check can go away if we ever support automatic fan speed
991 * control on newer chips.
992 */
4f3f51bc
JD		 993 if (!has_old_autopwm(data)) {
994 dev_notice(dev, "Mapping change disabled for safety reasons\n");
995 return -EINVAL;
996 }
997
179c4fdb 998 if (kstrtol(buf, 10, &val) < 0)
94ac7ee6
JD		 999 return -EINVAL;
1000
1001 switch (val) {
1002 case (1 << 0):
1003 reg = 0x00;
1004 break;
1005 case (1 << 1):
1006 reg = 0x01;
1007 break;
1008 case (1 << 2):
1009 reg = 0x02;
1010 break;
1011 default:
1012 return -EINVAL;
1013 }
1014
1015 mutex_lock(&data->update_lock);
1016 data->pwm_temp_map[nr] = reg;
4a0d71cf
GR		 1017 /*
1018 * If we are in automatic mode, write the temp mapping immediately;
1019 * otherwise, just store it for later use.
1020 */
94ac7ee6
JD		 1021 if (data->pwm_ctrl[nr] & 0x80) {
1022 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1023 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1024 }
1025 mutex_unlock(&data->update_lock);
1026 return count;
1027}
1da177e4 1028
4f3f51bc
JD		 1029static ssize_t show_auto_pwm(struct device *dev,
1030 struct device_attribute *attr, char *buf)
1031{
1032 struct it87_data *data = it87_update_device(dev);
1033 struct sensor_device_attribute_2 *sensor_attr =
1034 to_sensor_dev_attr_2(attr);
1035 int nr = sensor_attr->nr;
1036 int point = sensor_attr->index;
1037
44c1bcd4
JD		 1038 return sprintf(buf, "%d\n",
1039 pwm_from_reg(data, data->auto_pwm[nr][point]));
4f3f51bc
JD		 1040}
1041
1042static ssize_t set_auto_pwm(struct device *dev,
1043 struct device_attribute *attr, const char *buf, size_t count)
1044{
1045 struct it87_data *data = dev_get_drvdata(dev);
1046 struct sensor_device_attribute_2 *sensor_attr =
1047 to_sensor_dev_attr_2(attr);
1048 int nr = sensor_attr->nr;
1049 int point = sensor_attr->index;
1050 long val;
1051
179c4fdb 1052 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
4f3f51bc
JD		 1053 return -EINVAL;
1054
1055 mutex_lock(&data->update_lock);
44c1bcd4 1056 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
4f3f51bc
JD		 1057 it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1058 data->auto_pwm[nr][point]);
1059 mutex_unlock(&data->update_lock);
1060 return count;
1061}
1062
1063static ssize_t show_auto_temp(struct device *dev,
1064 struct device_attribute *attr, char *buf)
1065{
1066 struct it87_data *data = it87_update_device(dev);
1067 struct sensor_device_attribute_2 *sensor_attr =
1068 to_sensor_dev_attr_2(attr);
1069 int nr = sensor_attr->nr;
1070 int point = sensor_attr->index;
1071
1072 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1073}
1074
1075static ssize_t set_auto_temp(struct device *dev,
1076 struct device_attribute *attr, const char *buf, size_t count)
1077{
1078 struct it87_data *data = dev_get_drvdata(dev);
1079 struct sensor_device_attribute_2 *sensor_attr =
1080 to_sensor_dev_attr_2(attr);
1081 int nr = sensor_attr->nr;
1082 int point = sensor_attr->index;
1083 long val;
1084
179c4fdb 1085 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
4f3f51bc
JD		 1086 return -EINVAL;
1087
1088 mutex_lock(&data->update_lock);
1089 data->auto_temp[nr][point] = TEMP_TO_REG(val);
1090 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1091 data->auto_temp[nr][point]);
1092 mutex_unlock(&data->update_lock);
1093 return count;
1094}
1095
e1169ba0
GR		 1096static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1097static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1098 0, 1);
1099static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1100 set_fan_div, 0);
1101
1102static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1103static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1104 1, 1);
1105static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1106 set_fan_div, 1);
1107
1108static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1109static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1110 2, 1);
1111static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1112 set_fan_div, 2);
1113
1114static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1115static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1116 3, 1);
1da177e4 1117
e1169ba0
GR		 1118static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1119static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1120 4, 1);
1da177e4 1121
c4458db3
GR		 1122static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1123 show_pwm_enable, set_pwm_enable, 0);
1124static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1125static DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq);
1126static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR,
1127 show_pwm_temp_map, set_pwm_temp_map, 0);
1128static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1129 show_auto_pwm, set_auto_pwm, 0, 0);
1130static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1131 show_auto_pwm, set_auto_pwm, 0, 1);
1132static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1133 show_auto_pwm, set_auto_pwm, 0, 2);
1134static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1135 show_auto_pwm, NULL, 0, 3);
1136static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1137 show_auto_temp, set_auto_temp, 0, 1);
1138static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1139 show_auto_temp, set_auto_temp, 0, 0);
1140static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1141 show_auto_temp, set_auto_temp, 0, 2);
1142static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1143 show_auto_temp, set_auto_temp, 0, 3);
1144static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1145 show_auto_temp, set_auto_temp, 0, 4);
1146
1147static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1148 show_pwm_enable, set_pwm_enable, 1);
1149static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1150static DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, NULL);
1151static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR,
1152 show_pwm_temp_map, set_pwm_temp_map, 1);
1153static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1154 show_auto_pwm, set_auto_pwm, 1, 0);
1155static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1156 show_auto_pwm, set_auto_pwm, 1, 1);
1157static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1158 show_auto_pwm, set_auto_pwm, 1, 2);
1159static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1160 show_auto_pwm, NULL, 1, 3);
1161static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1162 show_auto_temp, set_auto_temp, 1, 1);
1163static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1164 show_auto_temp, set_auto_temp, 1, 0);
1165static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1166 show_auto_temp, set_auto_temp, 1, 2);
1167static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1168 show_auto_temp, set_auto_temp, 1, 3);
1169static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1170 show_auto_temp, set_auto_temp, 1, 4);
1171
1172static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1173 show_pwm_enable, set_pwm_enable, 2);
1174static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1175static DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL);
1176static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR,
1177 show_pwm_temp_map, set_pwm_temp_map, 2);
1178static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1179 show_auto_pwm, set_auto_pwm, 2, 0);
1180static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1181 show_auto_pwm, set_auto_pwm, 2, 1);
1182static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1183 show_auto_pwm, set_auto_pwm, 2, 2);
1184static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1185 show_auto_pwm, NULL, 2, 3);
1186static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1187 show_auto_temp, set_auto_temp, 2, 1);
1188static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1189 show_auto_temp, set_auto_temp, 2, 0);
1190static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1191 show_auto_temp, set_auto_temp, 2, 2);
1192static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1193 show_auto_temp, set_auto_temp, 2, 3);
1194static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1195 show_auto_temp, set_auto_temp, 2, 4);
1da177e4
LT		 1196
1197/* Alarms */
5f2dc798
JD		 1198static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1199 char *buf)
1da177e4
LT		 1200{
1201 struct it87_data *data = it87_update_device(dev);
68188ba7 1202 return sprintf(buf, "%u\n", data->alarms);
1da177e4 1203}
1d66c64c 1204static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1da177e4 1205
0124dd78
JD		 1206static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1207 char *buf)
1208{
1209 int bitnr = to_sensor_dev_attr(attr)->index;
1210 struct it87_data *data = it87_update_device(dev);
1211 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1212}
3d30f9e6
JD		 1213
1214static ssize_t clear_intrusion(struct device *dev, struct device_attribute
1215 *attr, const char *buf, size_t count)
1216{
1217 struct it87_data *data = dev_get_drvdata(dev);
1218 long val;
1219 int config;
1220
179c4fdb 1221 if (kstrtol(buf, 10, &val) < 0 || val != 0)
3d30f9e6
JD		 1222 return -EINVAL;
1223
1224 mutex_lock(&data->update_lock);
1225 config = it87_read_value(data, IT87_REG_CONFIG);
1226 if (config < 0) {
1227 count = config;
1228 } else {
1229 config |= 1 << 5;
1230 it87_write_value(data, IT87_REG_CONFIG, config);
1231 /* Invalidate cache to force re-read */
1232 data->valid = 0;
1233 }
1234 mutex_unlock(&data->update_lock);
1235
1236 return count;
1237}
1238
0124dd78
JD		 1239static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1240static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1241static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1242static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1243static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1244static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1245static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1246static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1247static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1248static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1249static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1250static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1251static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1252static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1253static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1254static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
3d30f9e6
JD		 1255static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1256 show_alarm, clear_intrusion, 4);
0124dd78 1257
d9b327c3
JD		 1258static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1259 char *buf)
1260{
1261 int bitnr = to_sensor_dev_attr(attr)->index;
1262 struct it87_data *data = it87_update_device(dev);
1263 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1264}
1265static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1266 const char *buf, size_t count)
1267{
1268 int bitnr = to_sensor_dev_attr(attr)->index;
1269 struct it87_data *data = dev_get_drvdata(dev);
1270 long val;
1271
179c4fdb 1272 if (kstrtol(buf, 10, &val) < 0
d9b327c3
JD		 1273 || (val != 0 && val != 1))
1274 return -EINVAL;
1275
1276 mutex_lock(&data->update_lock);
1277 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1278 if (val)
1279 data->beeps |= (1 << bitnr);
1280 else
1281 data->beeps &= ~(1 << bitnr);
1282 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1283 mutex_unlock(&data->update_lock);
1284 return count;
1285}
1286
1287static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1288 show_beep, set_beep, 1);
1289static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1290static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1291static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1292static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1293static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1294static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1295static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1296/* fanX_beep writability is set later */
1297static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1298static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1299static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1300static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1301static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1302static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1303 show_beep, set_beep, 2);
1304static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1305static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1306
5f2dc798
JD		 1307static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1308 char *buf)
1da177e4 1309{
90d6619a 1310 struct it87_data *data = dev_get_drvdata(dev);
a7be58a1 1311 return sprintf(buf, "%u\n", data->vrm);
1da177e4 1312}
5f2dc798
JD		 1313static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1314 const char *buf, size_t count)
1da177e4 1315{
b74f3fdd 1316 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 1317 unsigned long val;
1318
179c4fdb 1319 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 1320 return -EINVAL;
1da177e4 1321
1da177e4
LT		 1322 data->vrm = val;
1323
1324 return count;
1325}
1326static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4 1327
5f2dc798
JD		 1328static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1329 char *buf)
1da177e4
LT		 1330{
1331 struct it87_data *data = it87_update_device(dev);
1332 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1333}
1334static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
87808be4 1335
738e5e05
JD		 1336static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1337 char *buf)
1338{
3c4c4971 1339 static const char * const labels[] = {
738e5e05
JD		 1340 "+5V",
1341 "5VSB",
1342 "Vbat",
1343 };
3c4c4971 1344 static const char * const labels_it8721[] = {
44c1bcd4
JD		 1345 "+3.3V",
1346 "3VSB",
1347 "Vbat",
1348 };
1349 struct it87_data *data = dev_get_drvdata(dev);
738e5e05
JD		 1350 int nr = to_sensor_dev_attr(attr)->index;
1351
16b5dda2
JD		 1352 return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr]
1353 : labels[nr]);
738e5e05
JD		 1354}
1355static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1356static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1357static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1358
b74f3fdd 1359static ssize_t show_name(struct device *dev, struct device_attribute
1360 *devattr, char *buf)
1361{
1362 struct it87_data *data = dev_get_drvdata(dev);
1363 return sprintf(buf, "%s\n", data->name);
1364}
1365static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1366
9172b5d1
GR		 1367static struct attribute *it87_attributes_in[9][5] = {
1368{
87808be4 1369 &sensor_dev_attr_in0_input.dev_attr.attr,
87808be4 1370 &sensor_dev_attr_in0_min.dev_attr.attr,
87808be4 1371 &sensor_dev_attr_in0_max.dev_attr.attr,
0124dd78 1372 &sensor_dev_attr_in0_alarm.dev_attr.attr,
9172b5d1
GR		 1373 NULL
1374}, {
1375 &sensor_dev_attr_in1_input.dev_attr.attr,
1376 &sensor_dev_attr_in1_min.dev_attr.attr,
1377 &sensor_dev_attr_in1_max.dev_attr.attr,
0124dd78 1378 &sensor_dev_attr_in1_alarm.dev_attr.attr,
9172b5d1
GR		 1379 NULL
1380}, {
1381 &sensor_dev_attr_in2_input.dev_attr.attr,
1382 &sensor_dev_attr_in2_min.dev_attr.attr,
1383 &sensor_dev_attr_in2_max.dev_attr.attr,
0124dd78 1384 &sensor_dev_attr_in2_alarm.dev_attr.attr,
9172b5d1
GR		 1385 NULL
1386}, {
1387 &sensor_dev_attr_in3_input.dev_attr.attr,
1388 &sensor_dev_attr_in3_min.dev_attr.attr,
1389 &sensor_dev_attr_in3_max.dev_attr.attr,
0124dd78 1390 &sensor_dev_attr_in3_alarm.dev_attr.attr,
9172b5d1
GR		 1391 NULL
1392}, {
1393 &sensor_dev_attr_in4_input.dev_attr.attr,
1394 &sensor_dev_attr_in4_min.dev_attr.attr,
1395 &sensor_dev_attr_in4_max.dev_attr.attr,
0124dd78 1396 &sensor_dev_attr_in4_alarm.dev_attr.attr,
9172b5d1
GR		 1397 NULL
1398}, {
1399 &sensor_dev_attr_in5_input.dev_attr.attr,
1400 &sensor_dev_attr_in5_min.dev_attr.attr,
1401 &sensor_dev_attr_in5_max.dev_attr.attr,
0124dd78 1402 &sensor_dev_attr_in5_alarm.dev_attr.attr,
9172b5d1
GR		 1403 NULL
1404}, {
1405 &sensor_dev_attr_in6_input.dev_attr.attr,
1406 &sensor_dev_attr_in6_min.dev_attr.attr,
1407 &sensor_dev_attr_in6_max.dev_attr.attr,
0124dd78 1408 &sensor_dev_attr_in6_alarm.dev_attr.attr,
9172b5d1
GR		 1409 NULL
1410}, {
1411 &sensor_dev_attr_in7_input.dev_attr.attr,
1412 &sensor_dev_attr_in7_min.dev_attr.attr,
1413 &sensor_dev_attr_in7_max.dev_attr.attr,
0124dd78 1414 &sensor_dev_attr_in7_alarm.dev_attr.attr,
9172b5d1
GR		 1415 NULL
1416}, {
1417 &sensor_dev_attr_in8_input.dev_attr.attr,
1418 NULL
1419} };
87808be4 1420
9172b5d1
GR		 1421static const struct attribute_group it87_group_in[9] = {
1422 { .attrs = it87_attributes_in[0] },
1423 { .attrs = it87_attributes_in[1] },
1424 { .attrs = it87_attributes_in[2] },
1425 { .attrs = it87_attributes_in[3] },
1426 { .attrs = it87_attributes_in[4] },
1427 { .attrs = it87_attributes_in[5] },
1428 { .attrs = it87_attributes_in[6] },
1429 { .attrs = it87_attributes_in[7] },
1430 { .attrs = it87_attributes_in[8] },
1431};
1432
4573acbc
GR		 1433static struct attribute *it87_attributes_temp[3][6] = {
1434{
87808be4 1435 &sensor_dev_attr_temp1_input.dev_attr.attr,
87808be4 1436 &sensor_dev_attr_temp1_max.dev_attr.attr,
87808be4 1437 &sensor_dev_attr_temp1_min.dev_attr.attr,
87808be4 1438 &sensor_dev_attr_temp1_type.dev_attr.attr,
0124dd78 1439 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
4573acbc
GR		 1440 NULL
1441} , {
1442 &sensor_dev_attr_temp2_input.dev_attr.attr,
1443 &sensor_dev_attr_temp2_max.dev_attr.attr,
1444 &sensor_dev_attr_temp2_min.dev_attr.attr,
1445 &sensor_dev_attr_temp2_type.dev_attr.attr,
0124dd78 1446 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
4573acbc
GR		 1447 NULL
1448} , {
1449 &sensor_dev_attr_temp3_input.dev_attr.attr,
1450 &sensor_dev_attr_temp3_max.dev_attr.attr,
1451 &sensor_dev_attr_temp3_min.dev_attr.attr,
1452 &sensor_dev_attr_temp3_type.dev_attr.attr,
0124dd78 1453 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
4573acbc
GR		 1454 NULL
1455} };
1456
1457static const struct attribute_group it87_group_temp[3] = {
1458 { .attrs = it87_attributes_temp[0] },
1459 { .attrs = it87_attributes_temp[1] },
1460 { .attrs = it87_attributes_temp[2] },
1461};
87808be4 1462
161d898a
GR		 1463static struct attribute *it87_attributes_temp_offset[] = {
1464 &sensor_dev_attr_temp1_offset.dev_attr.attr,
1465 &sensor_dev_attr_temp2_offset.dev_attr.attr,
1466 &sensor_dev_attr_temp3_offset.dev_attr.attr,
1467};
1468
4573acbc 1469static struct attribute *it87_attributes[] = {
87808be4 1470 &dev_attr_alarms.attr,
3d30f9e6 1471 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
b74f3fdd 1472 &dev_attr_name.attr,
87808be4
JD		 1473 NULL
1474};
1475
1476static const struct attribute_group it87_group = {
1477 .attrs = it87_attributes,
1478};
1479
9172b5d1 1480static struct attribute *it87_attributes_in_beep[] = {
d9b327c3
JD		 1481 &sensor_dev_attr_in0_beep.dev_attr.attr,
1482 &sensor_dev_attr_in1_beep.dev_attr.attr,
1483 &sensor_dev_attr_in2_beep.dev_attr.attr,
1484 &sensor_dev_attr_in3_beep.dev_attr.attr,
1485 &sensor_dev_attr_in4_beep.dev_attr.attr,
1486 &sensor_dev_attr_in5_beep.dev_attr.attr,
1487 &sensor_dev_attr_in6_beep.dev_attr.attr,
1488 &sensor_dev_attr_in7_beep.dev_attr.attr,
9172b5d1
GR		 1489 NULL
1490};
d9b327c3 1491
4573acbc 1492static struct attribute *it87_attributes_temp_beep[] = {
d9b327c3
JD		 1493 &sensor_dev_attr_temp1_beep.dev_attr.attr,
1494 &sensor_dev_attr_temp2_beep.dev_attr.attr,
1495 &sensor_dev_attr_temp3_beep.dev_attr.attr,
d9b327c3
JD		 1496};
1497
e1169ba0
GR		 1498static struct attribute *it87_attributes_fan[5][3+1] = { {
1499 &sensor_dev_attr_fan1_input.dev_attr.attr,
1500 &sensor_dev_attr_fan1_min.dev_attr.attr,
723a0aa0
JD		 1501 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1502 NULL
1503}, {
e1169ba0
GR		 1504 &sensor_dev_attr_fan2_input.dev_attr.attr,
1505 &sensor_dev_attr_fan2_min.dev_attr.attr,
723a0aa0
JD		 1506 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1507 NULL
1508}, {
e1169ba0
GR		 1509 &sensor_dev_attr_fan3_input.dev_attr.attr,
1510 &sensor_dev_attr_fan3_min.dev_attr.attr,
723a0aa0
JD		 1511 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1512 NULL
1513}, {
e1169ba0
GR		 1514 &sensor_dev_attr_fan4_input.dev_attr.attr,
1515 &sensor_dev_attr_fan4_min.dev_attr.attr,
723a0aa0
JD		 1516 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1517 NULL
1518}, {
e1169ba0
GR		 1519 &sensor_dev_attr_fan5_input.dev_attr.attr,
1520 &sensor_dev_attr_fan5_min.dev_attr.attr,
723a0aa0
JD		 1521 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1522 NULL
1523} };
1524
e1169ba0
GR		 1525static const struct attribute_group it87_group_fan[5] = {
1526 { .attrs = it87_attributes_fan[0] },
1527 { .attrs = it87_attributes_fan[1] },
1528 { .attrs = it87_attributes_fan[2] },
1529 { .attrs = it87_attributes_fan[3] },
1530 { .attrs = it87_attributes_fan[4] },
723a0aa0 1531};
87808be4 1532
e1169ba0 1533static const struct attribute *it87_attributes_fan_div[] = {
87808be4 1534 &sensor_dev_attr_fan1_div.dev_attr.attr,
87808be4 1535 &sensor_dev_attr_fan2_div.dev_attr.attr,
87808be4 1536 &sensor_dev_attr_fan3_div.dev_attr.attr,
723a0aa0
JD		 1537};
1538
723a0aa0 1539static struct attribute *it87_attributes_pwm[3][4+1] = { {
87808be4 1540 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
87808be4 1541 &sensor_dev_attr_pwm1.dev_attr.attr,
d5b0b5d6 1542 &dev_attr_pwm1_freq.attr,
94ac7ee6 1543 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1544 NULL
1545}, {
1546 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1547 &sensor_dev_attr_pwm2.dev_attr.attr,
1548 &dev_attr_pwm2_freq.attr,
94ac7ee6 1549 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1550 NULL
1551}, {
1552 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1553 &sensor_dev_attr_pwm3.dev_attr.attr,
1554 &dev_attr_pwm3_freq.attr,
94ac7ee6 1555 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1556 NULL
1557} };
87808be4 1558
723a0aa0
JD		 1559static const struct attribute_group it87_group_pwm[3] = {
1560 { .attrs = it87_attributes_pwm[0] },
1561 { .attrs = it87_attributes_pwm[1] },
1562 { .attrs = it87_attributes_pwm[2] },
1563};
1564
4f3f51bc
JD		 1565static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1566 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1567 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1568 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1569 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1570 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1571 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1572 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1573 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1574 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1575 NULL
1576}, {
1577 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1578 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1579 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1580 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1581 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1582 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1583 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1584 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1585 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1586 NULL
1587}, {
1588 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1589 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1590 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1591 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1592 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1593 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
1594 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1595 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1596 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
1597 NULL
1598} };
1599
1600static const struct attribute_group it87_group_autopwm[3] = {
1601 { .attrs = it87_attributes_autopwm[0] },
1602 { .attrs = it87_attributes_autopwm[1] },
1603 { .attrs = it87_attributes_autopwm[2] },
1604};
1605
d9b327c3
JD		 1606static struct attribute *it87_attributes_fan_beep[] = {
1607 &sensor_dev_attr_fan1_beep.dev_attr.attr,
1608 &sensor_dev_attr_fan2_beep.dev_attr.attr,
1609 &sensor_dev_attr_fan3_beep.dev_attr.attr,
1610 &sensor_dev_attr_fan4_beep.dev_attr.attr,
1611 &sensor_dev_attr_fan5_beep.dev_attr.attr,
1612};
1613
6a8d7acf 1614static struct attribute *it87_attributes_vid[] = {
87808be4
JD		 1615 &dev_attr_vrm.attr,
1616 &dev_attr_cpu0_vid.attr,
1617 NULL
1618};
1619
6a8d7acf
JD		 1620static const struct attribute_group it87_group_vid = {
1621 .attrs = it87_attributes_vid,
87808be4 1622};
1da177e4 1623
738e5e05
JD		 1624static struct attribute *it87_attributes_label[] = {
1625 &sensor_dev_attr_in3_label.dev_attr.attr,
1626 &sensor_dev_attr_in7_label.dev_attr.attr,
1627 &sensor_dev_attr_in8_label.dev_attr.attr,
1628 NULL
1629};
1630
1631static const struct attribute_group it87_group_label = {
fa8b6975 1632 .attrs = it87_attributes_label,
738e5e05
JD		 1633};
1634
2d8672c5 1635/* SuperIO detection - will change isa_address if a chip is found */
b74f3fdd 1636static int __init it87_find(unsigned short *address,
1637 struct it87_sio_data *sio_data)
1da177e4 1638{
5b0380c9 1639 int err;
b74f3fdd 1640 u16 chip_type;
98dd22c3 1641 const char *board_vendor, *board_name;
1da177e4 1642
5b0380c9
NG		 1643 err = superio_enter();
1644 if (err)
1645 return err;
1646
1647 err = -ENODEV;
67b671bc 1648 chip_type = force_id ? force_id : superio_inw(DEVID);
b74f3fdd 1649
1650 switch (chip_type) {
1651 case IT8705F_DEVID:
1652 sio_data->type = it87;
1653 break;
1654 case IT8712F_DEVID:
1655 sio_data->type = it8712;
1656 break;
1657 case IT8716F_DEVID:
1658 case IT8726F_DEVID:
1659 sio_data->type = it8716;
1660 break;
1661 case IT8718F_DEVID:
1662 sio_data->type = it8718;
1663 break;
b4da93e4
JMS		 1664 case IT8720F_DEVID:
1665 sio_data->type = it8720;
1666 break;
44c1bcd4
JD		 1667 case IT8721F_DEVID:
1668 sio_data->type = it8721;
1669 break;
16b5dda2
JD		 1670 case IT8728F_DEVID:
1671 sio_data->type = it8728;
1672 break;
0531d98b
GR		 1673 case IT8782F_DEVID:
1674 sio_data->type = it8782;
1675 break;
1676 case IT8783E_DEVID:
1677 sio_data->type = it8783;
1678 break;
b74f3fdd 1679 case 0xffff: /* No device at all */
1680 goto exit;
1681 default:
a8ca1037 1682 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
b74f3fdd 1683 goto exit;
1684 }
1da177e4 1685
87673dd7 1686 superio_select(PME);
1da177e4 1687 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
a8ca1037 1688 pr_info("Device not activated, skipping\n");
1da177e4
LT		 1689 goto exit;
1690 }
1691
1692 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1693 if (*address == 0) {
a8ca1037 1694 pr_info("Base address not set, skipping\n");
1da177e4
LT		 1695 goto exit;
1696 }
1697
1698 err = 0;
0475169c 1699 sio_data->revision = superio_inb(DEVREV) & 0x0f;
a8ca1037 1700 pr_info("Found IT%04xF chip at 0x%x, revision %d\n",
0475169c 1701 chip_type, *address, sio_data->revision);
1da177e4 1702
738e5e05
JD		 1703 /* in8 (Vbat) is always internal */
1704 sio_data->internal = (1 << 2);
1705
87673dd7 1706 /* Read GPIO config and VID value from LDN 7 (GPIO) */
895ff267
JD		 1707 if (sio_data->type == it87) {
1708 /* The IT8705F doesn't have VID pins at all */
1709 sio_data->skip_vid = 1;
d9b327c3
JD		 1710
1711 /* The IT8705F has a different LD number for GPIO */
1712 superio_select(5);
1713 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
0531d98b
GR		 1714 } else if (sio_data->type == it8783) {
1715 int reg25, reg27, reg2A, reg2C, regEF;
0531d98b
GR		 1716
1717 sio_data->skip_vid = 1; /* No VID */
1718
1719 superio_select(GPIO);
1720
1721 reg25 = superio_inb(IT87_SIO_GPIO1_REG);
1722 reg27 = superio_inb(IT87_SIO_GPIO3_REG);
1723 reg2A = superio_inb(IT87_SIO_PINX1_REG);
1724 reg2C = superio_inb(IT87_SIO_PINX2_REG);
1725 regEF = superio_inb(IT87_SIO_SPI_REG);
1726
0531d98b 1727 /* Check if fan3 is there or not */
9172b5d1 1728 if ((reg27 & (1 << 0)) || !(reg2C & (1 << 2)))
0531d98b
GR		 1729 sio_data->skip_fan |= (1 << 2);
1730 if ((reg25 & (1 << 4))
1731 || (!(reg2A & (1 << 1)) && (regEF & (1 << 0))))
1732 sio_data->skip_pwm |= (1 << 2);
1733
1734 /* Check if fan2 is there or not */
1735 if (reg27 & (1 << 7))
1736 sio_data->skip_fan |= (1 << 1);
1737 if (reg27 & (1 << 3))
1738 sio_data->skip_pwm |= (1 << 1);
1739
1740 /* VIN5 */
9172b5d1
GR		 1741 if ((reg27 & (1 << 0)) || (reg2C & (1 << 2)))
1742 sio_data->skip_in |= (1 << 5); /* No VIN5 */
0531d98b
GR		 1743
1744 /* VIN6 */
9172b5d1
GR		 1745 if (reg27 & (1 << 1))
1746 sio_data->skip_in |= (1 << 6); /* No VIN6 */
0531d98b
GR		 1747
1748 /*
1749 * VIN7
1750 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
1751 */
9172b5d1
GR		 1752 if (reg27 & (1 << 2)) {
1753 /*
1754 * The data sheet is a bit unclear regarding the
1755 * internal voltage divider for VCCH5V. It says
1756 * "This bit enables and switches VIN7 (pin 91) to the
1757 * internal voltage divider for VCCH5V".
1758 * This is different to other chips, where the internal
1759 * voltage divider would connect VIN7 to an internal
1760 * voltage source. Maybe that is the case here as well.
1761 *
1762 * Since we don't know for sure, re-route it if that is
1763 * not the case, and ask the user to report if the
1764 * resulting voltage is sane.
1765 */
1766 if (!(reg2C & (1 << 1))) {
1767 reg2C |= (1 << 1);
1768 superio_outb(IT87_SIO_PINX2_REG, reg2C);
1769 pr_notice("Routing internal VCCH5V to in7.\n");
1770 }
1771 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
1772 pr_notice("Please report if it displays a reasonable voltage.\n");
1773 }
0531d98b
GR		 1774
1775 if (reg2C & (1 << 0))
1776 sio_data->internal |= (1 << 0);
1777 if (reg2C & (1 << 1))
1778 sio_data->internal |= (1 << 1);
1779
1780 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
1781
895ff267 1782 } else {
87673dd7 1783 int reg;
9172b5d1 1784 bool uart6;
87673dd7
JD		 1785
1786 superio_select(GPIO);
44c1bcd4 1787
895ff267 1788 reg = superio_inb(IT87_SIO_GPIO3_REG);
0531d98b
GR		 1789 if (sio_data->type == it8721 || sio_data->type == it8728 ||
1790 sio_data->type == it8782) {
16b5dda2 1791 /*
0531d98b
GR		 1792 * IT8721F/IT8758E, and IT8782F don't have VID pins
1793 * at all, not sure about the IT8728F.
16b5dda2 1794 */
895ff267 1795 sio_data->skip_vid = 1;
44c1bcd4
JD		 1796 } else {
1797 /* We need at least 4 VID pins */
1798 if (reg & 0x0f) {
a8ca1037 1799 pr_info("VID is disabled (pins used for GPIO)\n");
44c1bcd4
JD		 1800 sio_data->skip_vid = 1;
1801 }
895ff267
JD		 1802 }
1803
591ec650
JD		 1804 /* Check if fan3 is there or not */
1805 if (reg & (1 << 6))
1806 sio_data->skip_pwm |= (1 << 2);
1807 if (reg & (1 << 7))
1808 sio_data->skip_fan |= (1 << 2);
1809
1810 /* Check if fan2 is there or not */
1811 reg = superio_inb(IT87_SIO_GPIO5_REG);
1812 if (reg & (1 << 1))
1813 sio_data->skip_pwm |= (1 << 1);
1814 if (reg & (1 << 2))
1815 sio_data->skip_fan |= (1 << 1);
1816
895ff267
JD		 1817 if ((sio_data->type == it8718 || sio_data->type == it8720)
1818 && !(sio_data->skip_vid))
b74f3fdd 1819 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
87673dd7
JD		 1820
1821 reg = superio_inb(IT87_SIO_PINX2_REG);
9172b5d1
GR		 1822
1823 uart6 = sio_data->type == it8782 && (reg & (1 << 2));
1824
436cad2a
JD		 1825 /*
1826 * The IT8720F has no VIN7 pin, so VCCH should always be
1827 * routed internally to VIN7 with an internal divider.
1828 * Curiously, there still is a configuration bit to control
1829 * this, which means it can be set incorrectly. And even
1830 * more curiously, many boards out there are improperly
1831 * configured, even though the IT8720F datasheet claims
1832 * that the internal routing of VCCH to VIN7 is the default
1833 * setting. So we force the internal routing in this case.
0531d98b
GR		 1834 *
1835 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
9172b5d1
GR		 1836 * If UART6 is enabled, re-route VIN7 to the internal divider
1837 * if that is not already the case.
436cad2a 1838 */
9172b5d1 1839 if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) {
436cad2a
JD		 1840 reg |= (1 << 1);
1841 superio_outb(IT87_SIO_PINX2_REG, reg);
a8ca1037 1842 pr_notice("Routing internal VCCH to in7\n");
436cad2a 1843 }
87673dd7 1844 if (reg & (1 << 0))
738e5e05 1845 sio_data->internal |= (1 << 0);
16b5dda2
JD		 1846 if ((reg & (1 << 1)) || sio_data->type == it8721 ||
1847 sio_data->type == it8728)
738e5e05 1848 sio_data->internal |= (1 << 1);
d9b327c3 1849
9172b5d1
GR		 1850 /*
1851 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
1852 * While VIN7 can be routed to the internal voltage divider,
1853 * VIN5 and VIN6 are not available if UART6 is enabled.
4573acbc
GR		 1854 *
1855 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
1856 * is the temperature source. Since we can not read the
1857 * temperature source here, skip_temp is preliminary.
9172b5d1 1858 */
4573acbc 1859 if (uart6) {
9172b5d1 1860 sio_data->skip_in |= (1 << 5) | (1 << 6);
4573acbc
GR		 1861 sio_data->skip_temp |= (1 << 2);
1862 }
9172b5d1 1863
d9b327c3 1864 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
87673dd7 1865 }
d9b327c3 1866 if (sio_data->beep_pin)
a8ca1037 1867 pr_info("Beeping is supported\n");
87673dd7 1868
98dd22c3
JD		 1869 /* Disable specific features based on DMI strings */
1870 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
1871 board_name = dmi_get_system_info(DMI_BOARD_NAME);
1872 if (board_vendor && board_name) {
1873 if (strcmp(board_vendor, "nVIDIA") == 0
1874 && strcmp(board_name, "FN68PT") == 0) {
4a0d71cf
GR		 1875 /*
1876 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
1877 * connected to a fan, but to something else. One user
1878 * has reported instant system power-off when changing
1879 * the PWM2 duty cycle, so we disable it.
1880 * I use the board name string as the trigger in case
1881 * the same board is ever used in other systems.
1882 */
a8ca1037 1883 pr_info("Disabling pwm2 due to hardware constraints\n");
98dd22c3
JD		 1884 sio_data->skip_pwm = (1 << 1);
1885 }
1886 }
1887
1da177e4
LT		 1888exit:
1889 superio_exit();
1890 return err;
1891}
1892
723a0aa0
JD		 1893static void it87_remove_files(struct device *dev)
1894{
1895 struct it87_data *data = platform_get_drvdata(pdev);
1896 struct it87_sio_data *sio_data = dev->platform_data;
723a0aa0
JD		 1897 int i;
1898
1899 sysfs_remove_group(&dev->kobj, &it87_group);
9172b5d1
GR		 1900 for (i = 0; i < 9; i++) {
1901 if (sio_data->skip_in & (1 << i))
1902 continue;
1903 sysfs_remove_group(&dev->kobj, &it87_group_in[i]);
1904 if (it87_attributes_in_beep[i])
1905 sysfs_remove_file(&dev->kobj,
1906 it87_attributes_in_beep[i]);
1907 }
4573acbc
GR		 1908 for (i = 0; i < 3; i++) {
1909 if (!(data->has_temp & (1 << i)))
1910 continue;
1911 sysfs_remove_group(&dev->kobj, &it87_group_temp[i]);
161d898a
GR		 1912 if (has_temp_offset(data))
1913 sysfs_remove_file(&dev->kobj,
1914 it87_attributes_temp_offset[i]);
4573acbc
GR		 1915 if (sio_data->beep_pin)
1916 sysfs_remove_file(&dev->kobj,
1917 it87_attributes_temp_beep[i]);
1918 }
723a0aa0
JD		 1919 for (i = 0; i < 5; i++) {
1920 if (!(data->has_fan & (1 << i)))
1921 continue;
e1169ba0 1922 sysfs_remove_group(&dev->kobj, &it87_group_fan[i]);
d9b327c3
JD		 1923 if (sio_data->beep_pin)
1924 sysfs_remove_file(&dev->kobj,
1925 it87_attributes_fan_beep[i]);
e1169ba0
GR		 1926 if (i < 3 && !has_16bit_fans(data))
1927 sysfs_remove_file(&dev->kobj,
1928 it87_attributes_fan_div[i]);
723a0aa0
JD		 1929 }
1930 for (i = 0; i < 3; i++) {
1931 if (sio_data->skip_pwm & (1 << 0))
1932 continue;
1933 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
4f3f51bc
JD		 1934 if (has_old_autopwm(data))
1935 sysfs_remove_group(&dev->kobj,
1936 &it87_group_autopwm[i]);
723a0aa0 1937 }
6a8d7acf
JD		 1938 if (!sio_data->skip_vid)
1939 sysfs_remove_group(&dev->kobj, &it87_group_vid);
738e5e05 1940 sysfs_remove_group(&dev->kobj, &it87_group_label);
723a0aa0
JD		 1941}
1942
6c931ae1 1943static int it87_probe(struct platform_device *pdev)
1da177e4 1944{
1da177e4 1945 struct it87_data *data;
b74f3fdd 1946 struct resource *res;
1947 struct device *dev = &pdev->dev;
1948 struct it87_sio_data *sio_data = dev->platform_data;
723a0aa0 1949 int err = 0, i;
1da177e4 1950 int enable_pwm_interface;
d9b327c3 1951 int fan_beep_need_rw;
b74f3fdd 1952
1953 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
62a1d05f
GR		 1954 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
1955 DRVNAME)) {
b74f3fdd 1956 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1957 (unsigned long)res->start,
87b4b663 1958 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
62a1d05f 1959 return -EBUSY;
8e9afcbb 1960 }
1da177e4 1961
62a1d05f
GR		 1962 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
1963 if (!data)
1964 return -ENOMEM;
1da177e4 1965
b74f3fdd 1966 data->addr = res->start;
1967 data->type = sio_data->type;
483db43e
GR		 1968 data->features = it87_devices[sio_data->type].features;
1969 data->name = it87_devices[sio_data->type].name;
1970 /*
1971 * IT8705F Datasheet 0.4.1, 3h == Version G.
1972 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
1973 * These are the first revisions with 16-bit tachometer support.
1974 */
1975 switch (data->type) {
1976 case it87:
1977 if (sio_data->revision >= 0x03) {
1978 data->features &= ~FEAT_OLD_AUTOPWM;
1979 data->features |= FEAT_16BIT_FANS;
1980 }
1981 break;
1982 case it8712:
1983 if (sio_data->revision >= 0x08) {
1984 data->features &= ~FEAT_OLD_AUTOPWM;
1985 data->features |= FEAT_16BIT_FANS;
1986 }
1987 break;
1988 default:
1989 break;
1990 }
1da177e4
LT		 1991
1992 /* Now, we do the remaining detection. */
b74f3fdd 1993 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
62a1d05f
GR		 1994 || it87_read_value(data, IT87_REG_CHIPID) != 0x90)
1995 return -ENODEV;
1da177e4 1996
b74f3fdd 1997 platform_set_drvdata(pdev, data);
1da177e4 1998
9a61bf63 1999 mutex_init(&data->update_lock);
1da177e4 2000
1da177e4 2001 /* Check PWM configuration */
b74f3fdd 2002 enable_pwm_interface = it87_check_pwm(dev);
1da177e4 2003
44c1bcd4 2004 /* Starting with IT8721F, we handle scaling of internal voltages */
16b5dda2 2005 if (has_12mv_adc(data)) {
44c1bcd4
JD		 2006 if (sio_data->internal & (1 << 0))
2007 data->in_scaled |= (1 << 3); /* in3 is AVCC */
2008 if (sio_data->internal & (1 << 1))
2009 data->in_scaled |= (1 << 7); /* in7 is VSB */
2010 if (sio_data->internal & (1 << 2))
2011 data->in_scaled |= (1 << 8); /* in8 is Vbat */
0531d98b
GR		 2012 } else if (sio_data->type == it8782 || sio_data->type == it8783) {
2013 if (sio_data->internal & (1 << 0))
2014 data->in_scaled |= (1 << 3); /* in3 is VCC5V */
2015 if (sio_data->internal & (1 << 1))
2016 data->in_scaled |= (1 << 7); /* in7 is VCCH5V */
44c1bcd4
JD		 2017 }
2018
4573acbc
GR		 2019 data->has_temp = 0x07;
2020 if (sio_data->skip_temp & (1 << 2)) {
2021 if (sio_data->type == it8782
2022 && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
2023 data->has_temp &= ~(1 << 2);
2024 }
2025
1da177e4 2026 /* Initialize the IT87 chip */
b74f3fdd 2027 it87_init_device(pdev);
1da177e4
LT		 2028
2029 /* Register sysfs hooks */
5f2dc798
JD		 2030 err = sysfs_create_group(&dev->kobj, &it87_group);
2031 if (err)
62a1d05f 2032 return err;
17d648bf 2033
9172b5d1
GR		 2034 for (i = 0; i < 9; i++) {
2035 if (sio_data->skip_in & (1 << i))
2036 continue;
2037 err = sysfs_create_group(&dev->kobj, &it87_group_in[i]);
2038 if (err)
62a1d05f 2039 goto error;
9172b5d1
GR		 2040 if (sio_data->beep_pin && it87_attributes_in_beep[i]) {
2041 err = sysfs_create_file(&dev->kobj,
2042 it87_attributes_in_beep[i]);
2043 if (err)
62a1d05f 2044 goto error;
9172b5d1
GR		 2045 }
2046 }
2047
4573acbc
GR		 2048 for (i = 0; i < 3; i++) {
2049 if (!(data->has_temp & (1 << i)))
2050 continue;
2051 err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]);
d9b327c3 2052 if (err)
62a1d05f 2053 goto error;
161d898a
GR		 2054 if (has_temp_offset(data)) {
2055 err = sysfs_create_file(&dev->kobj,
2056 it87_attributes_temp_offset[i]);
2057 if (err)
2058 goto error;
2059 }
4573acbc
GR		 2060 if (sio_data->beep_pin) {
2061 err = sysfs_create_file(&dev->kobj,
2062 it87_attributes_temp_beep[i]);
2063 if (err)
2064 goto error;
2065 }
d9b327c3
JD		 2066 }
2067
9060f8bd 2068 /* Do not create fan files for disabled fans */
d9b327c3 2069 fan_beep_need_rw = 1;
723a0aa0
JD		 2070 for (i = 0; i < 5; i++) {
2071 if (!(data->has_fan & (1 << i)))
2072 continue;
e1169ba0 2073 err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]);
723a0aa0 2074 if (err)
62a1d05f 2075 goto error;
d9b327c3 2076
e1169ba0
GR		 2077 if (i < 3 && !has_16bit_fans(data)) {
2078 err = sysfs_create_file(&dev->kobj,
2079 it87_attributes_fan_div[i]);
2080 if (err)
2081 goto error;
2082 }
2083
d9b327c3
JD		 2084 if (sio_data->beep_pin) {
2085 err = sysfs_create_file(&dev->kobj,
2086 it87_attributes_fan_beep[i]);
2087 if (err)
62a1d05f 2088 goto error;
d9b327c3
JD		 2089 if (!fan_beep_need_rw)
2090 continue;
2091
4a0d71cf
GR		 2092 /*
2093 * As we have a single beep enable bit for all fans,
d9b327c3 2094 * only the first enabled fan has a writable attribute
4a0d71cf
GR		 2095 * for it.
2096 */
d9b327c3
JD		 2097 if (sysfs_chmod_file(&dev->kobj,
2098 it87_attributes_fan_beep[i],
2099 S_IRUGO | S_IWUSR))
2100 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
2101 i + 1);
2102 fan_beep_need_rw = 0;
2103 }
17d648bf
JD		 2104 }
2105
1da177e4 2106 if (enable_pwm_interface) {
723a0aa0
JD		 2107 for (i = 0; i < 3; i++) {
2108 if (sio_data->skip_pwm & (1 << i))
2109 continue;
2110 err = sysfs_create_group(&dev->kobj,
2111 &it87_group_pwm[i]);
2112 if (err)
62a1d05f 2113 goto error;
4f3f51bc
JD		 2114
2115 if (!has_old_autopwm(data))
2116 continue;
2117 err = sysfs_create_group(&dev->kobj,
2118 &it87_group_autopwm[i]);
2119 if (err)
62a1d05f 2120 goto error;
98dd22c3 2121 }
1da177e4
LT		 2122 }
2123
895ff267 2124 if (!sio_data->skip_vid) {
303760b4 2125 data->vrm = vid_which_vrm();
87673dd7 2126 /* VID reading from Super-I/O config space if available */
b74f3fdd 2127 data->vid = sio_data->vid_value;
6a8d7acf
JD		 2128 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
2129 if (err)
62a1d05f 2130 goto error;
87808be4
JD		 2131 }
2132
738e5e05
JD		 2133 /* Export labels for internal sensors */
2134 for (i = 0; i < 3; i++) {
2135 if (!(sio_data->internal & (1 << i)))
2136 continue;
2137 err = sysfs_create_file(&dev->kobj,
2138 it87_attributes_label[i]);
2139 if (err)
62a1d05f 2140 goto error;
738e5e05
JD		 2141 }
2142
1beeffe4
TJ		 2143 data->hwmon_dev = hwmon_device_register(dev);
2144 if (IS_ERR(data->hwmon_dev)) {
2145 err = PTR_ERR(data->hwmon_dev);
62a1d05f 2146 goto error;
1da177e4
LT		 2147 }
2148
2149 return 0;
2150
62a1d05f 2151error:
723a0aa0 2152 it87_remove_files(dev);
1da177e4
LT		 2153 return err;
2154}
2155
281dfd0b 2156static int it87_remove(struct platform_device *pdev)
1da177e4 2157{
b74f3fdd 2158 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2159
1beeffe4 2160 hwmon_device_unregister(data->hwmon_dev);
723a0aa0 2161 it87_remove_files(&pdev->dev);
943b0830 2162
1da177e4
LT		 2163 return 0;
2164}
2165
4a0d71cf
GR		 2166/*
2167 * Must be called with data->update_lock held, except during initialization.
2168 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2169 * would slow down the IT87 access and should not be necessary.
2170 */
b74f3fdd 2171static int it87_read_value(struct it87_data *data, u8 reg)
1da177e4 2172{
b74f3fdd 2173 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2174 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT		 2175}
2176
4a0d71cf
GR		 2177/*
2178 * Must be called with data->update_lock held, except during initialization.
2179 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2180 * would slow down the IT87 access and should not be necessary.
2181 */
b74f3fdd 2182static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
1da177e4 2183{
b74f3fdd 2184 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2185 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT		 2186}
2187
2188/* Return 1 if and only if the PWM interface is safe to use */
6c931ae1 2189static int it87_check_pwm(struct device *dev)
1da177e4 2190{
b74f3fdd 2191 struct it87_data *data = dev_get_drvdata(dev);
4a0d71cf
GR		 2192 /*
2193 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
1da177e4 2194 * and polarity set to active low is sign that this is the case so we
4a0d71cf
GR		 2195 * disable pwm control to protect the user.
2196 */
b74f3fdd 2197 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1da177e4
LT		 2198 if ((tmp & 0x87) == 0) {
2199 if (fix_pwm_polarity) {
4a0d71cf
GR		 2200 /*
2201 * The user asks us to attempt a chip reconfiguration.
1da177e4 2202 * This means switching to active high polarity and
4a0d71cf
GR		 2203 * inverting all fan speed values.
2204 */
1da177e4
LT		 2205 int i;
2206 u8 pwm[3];
2207
2208 for (i = 0; i < 3; i++)
b74f3fdd 2209 pwm[i] = it87_read_value(data,
1da177e4
LT		 2210 IT87_REG_PWM(i));
2211
4a0d71cf
GR		 2212 /*
2213 * If any fan is in automatic pwm mode, the polarity
1da177e4
LT		 2214 * might be correct, as suspicious as it seems, so we
2215 * better don't change anything (but still disable the
4a0d71cf
GR		 2216 * PWM interface).
2217 */
1da177e4 2218 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
1d9bcf6a
GR		 2219 dev_info(dev,
2220 "Reconfiguring PWM to active high polarity\n");
b74f3fdd 2221 it87_write_value(data, IT87_REG_FAN_CTL,
1da177e4
LT		 2222 tmp | 0x87);
2223 for (i = 0; i < 3; i++)
b74f3fdd 2224 it87_write_value(data,
1da177e4
LT		 2225 IT87_REG_PWM(i),
2226 0x7f & ~pwm[i]);
2227 return 1;
2228 }
2229
1d9bcf6a
GR		 2230 dev_info(dev,
2231 "PWM configuration is too broken to be fixed\n");
1da177e4
LT		 2232 }
2233
1d9bcf6a
GR		 2234 dev_info(dev,
2235 "Detected broken BIOS defaults, disabling PWM interface\n");
1da177e4
LT		 2236 return 0;
2237 } else if (fix_pwm_polarity) {
1d9bcf6a
GR		 2238 dev_info(dev,
2239 "PWM configuration looks sane, won't touch\n");
1da177e4
LT		 2240 }
2241
2242 return 1;
2243}
2244
2245/* Called when we have found a new IT87. */
6c931ae1 2246static void it87_init_device(struct platform_device *pdev)
1da177e4 2247{
591ec650 2248 struct it87_sio_data *sio_data = pdev->dev.platform_data;
b74f3fdd 2249 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2250 int tmp, i;
591ec650 2251 u8 mask;
1da177e4 2252
4a0d71cf
GR		 2253 /*
2254 * For each PWM channel:
b99883dc
JD		 2255 * - If it is in automatic mode, setting to manual mode should set
2256 * the fan to full speed by default.
2257 * - If it is in manual mode, we need a mapping to temperature
2258 * channels to use when later setting to automatic mode later.
2259 * Use a 1:1 mapping by default (we are clueless.)
2260 * In both cases, the value can (and should) be changed by the user
6229cdb2
JD		 2261 * prior to switching to a different mode.
2262 * Note that this is no longer needed for the IT8721F and later, as
2263 * these have separate registers for the temperature mapping and the
4a0d71cf
GR		 2264 * manual duty cycle.
2265 */
1da177e4 2266 for (i = 0; i < 3; i++) {
b99883dc
JD		 2267 data->pwm_temp_map[i] = i;
2268 data->pwm_duty[i] = 0x7f; /* Full speed */
4f3f51bc 2269 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
1da177e4
LT		 2270 }
2271
4a0d71cf
GR		 2272 /*
2273 * Some chips seem to have default value 0xff for all limit
c5df9b7a
JD		 2274 * registers. For low voltage limits it makes no sense and triggers
2275 * alarms, so change to 0 instead. For high temperature limits, it
2276 * means -1 degree C, which surprisingly doesn't trigger an alarm,
4a0d71cf
GR		 2277 * but is still confusing, so change to 127 degrees C.
2278 */
c5df9b7a 2279 for (i = 0; i < 8; i++) {
b74f3fdd 2280 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
c5df9b7a 2281 if (tmp == 0xff)
b74f3fdd 2282 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
c5df9b7a
JD		 2283 }
2284 for (i = 0; i < 3; i++) {
b74f3fdd 2285 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
c5df9b7a 2286 if (tmp == 0xff)
b74f3fdd 2287 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
c5df9b7a
JD		 2288 }
2289
4a0d71cf
GR		 2290 /*
2291 * Temperature channels are not forcibly enabled, as they can be
a00afb97
JD		 2292 * set to two different sensor types and we can't guess which one
2293 * is correct for a given system. These channels can be enabled at
4a0d71cf
GR		 2294 * run-time through the temp{1-3}_type sysfs accessors if needed.
2295 */
1da177e4
LT		 2296
2297 /* Check if voltage monitors are reset manually or by some reason */
b74f3fdd 2298 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
1da177e4
LT		 2299 if ((tmp & 0xff) == 0) {
2300 /* Enable all voltage monitors */
b74f3fdd 2301 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
1da177e4
LT		 2302 }
2303
2304 /* Check if tachometers are reset manually or by some reason */
591ec650 2305 mask = 0x70 & ~(sio_data->skip_fan << 4);
b74f3fdd 2306 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
591ec650 2307 if ((data->fan_main_ctrl & mask) == 0) {
1da177e4 2308 /* Enable all fan tachometers */
591ec650 2309 data->fan_main_ctrl |= mask;
5f2dc798
JD		 2310 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2311 data->fan_main_ctrl);
1da177e4 2312 }
9060f8bd 2313 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
1da177e4 2314
17d648bf 2315 /* Set tachometers to 16-bit mode if needed */
0475169c 2316 if (has_16bit_fans(data)) {
b74f3fdd 2317 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
9060f8bd 2318 if (~tmp & 0x07 & data->has_fan) {
b74f3fdd 2319 dev_dbg(&pdev->dev,
17d648bf 2320 "Setting fan1-3 to 16-bit mode\n");
b74f3fdd 2321 it87_write_value(data, IT87_REG_FAN_16BIT,
17d648bf
JD		 2322 tmp | 0x07);
2323 }
0531d98b
GR		 2324 /* IT8705F, IT8782F, and IT8783E/F only support three fans. */
2325 if (data->type != it87 && data->type != it8782 &&
2326 data->type != it8783) {
816d8c6a
AP		 2327 if (tmp & (1 << 4))
2328 data->has_fan |= (1 << 3); /* fan4 enabled */
2329 if (tmp & (1 << 5))
2330 data->has_fan |= (1 << 4); /* fan5 enabled */
2331 }
17d648bf
JD		 2332 }
2333
591ec650
JD		 2334 /* Fan input pins may be used for alternative functions */
2335 data->has_fan &= ~sio_data->skip_fan;
2336
1da177e4 2337 /* Start monitoring */
b74f3fdd 2338 it87_write_value(data, IT87_REG_CONFIG,
41002f8d 2339 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
1da177e4
LT		 2340 | (update_vbat ? 0x41 : 0x01));
2341}
2342
b99883dc
JD		 2343static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
2344{
2345 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
16b5dda2 2346 if (has_newer_autopwm(data)) {
b99883dc 2347 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
6229cdb2
JD		 2348 data->pwm_duty[nr] = it87_read_value(data,
2349 IT87_REG_PWM_DUTY(nr));
2350 } else {
2351 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
2352 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2353 else /* Manual mode */
2354 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
2355 }
4f3f51bc
JD		 2356
2357 if (has_old_autopwm(data)) {
2358 int i;
2359
2360 for (i = 0; i < 5 ; i++)
2361 data->auto_temp[nr][i] = it87_read_value(data,
2362 IT87_REG_AUTO_TEMP(nr, i));
2363 for (i = 0; i < 3 ; i++)
2364 data->auto_pwm[nr][i] = it87_read_value(data,
2365 IT87_REG_AUTO_PWM(nr, i));
2366 }
b99883dc
JD		 2367}
2368
1da177e4
LT		 2369static struct it87_data *it87_update_device(struct device *dev)
2370{
b74f3fdd 2371 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 2372 int i;
2373
9a61bf63 2374 mutex_lock(&data->update_lock);
1da177e4
LT		 2375
2376 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
2377 || !data->valid) {
1da177e4 2378 if (update_vbat) {
4a0d71cf
GR		 2379 /*
2380 * Cleared after each update, so reenable. Value
2381 * returned by this read will be previous value
2382 */
b74f3fdd 2383 it87_write_value(data, IT87_REG_CONFIG,
5f2dc798 2384 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1da177e4
LT		 2385 }
2386 for (i = 0; i <= 7; i++) {
929c6a56 2387 data->in[i][0] =
5f2dc798 2388 it87_read_value(data, IT87_REG_VIN(i));
929c6a56 2389 data->in[i][1] =
5f2dc798 2390 it87_read_value(data, IT87_REG_VIN_MIN(i));
929c6a56 2391 data->in[i][2] =
5f2dc798 2392 it87_read_value(data, IT87_REG_VIN_MAX(i));
1da177e4 2393 }
3543a53f 2394 /* in8 (battery) has no limit registers */
929c6a56 2395 data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8));
1da177e4 2396
c7f1f716 2397 for (i = 0; i < 5; i++) {
9060f8bd
JD		 2398 /* Skip disabled fans */
2399 if (!(data->has_fan & (1 << i)))
2400 continue;
2401
e1169ba0 2402 data->fan[i][1] =
5f2dc798 2403 it87_read_value(data, IT87_REG_FAN_MIN[i]);
e1169ba0 2404 data->fan[i][0] = it87_read_value(data,
c7f1f716 2405 IT87_REG_FAN[i]);
17d648bf 2406 /* Add high byte if in 16-bit mode */
0475169c 2407 if (has_16bit_fans(data)) {
e1169ba0 2408 data->fan[i][0] |= it87_read_value(data,
c7f1f716 2409 IT87_REG_FANX[i]) << 8;
e1169ba0 2410 data->fan[i][1] |= it87_read_value(data,
c7f1f716 2411 IT87_REG_FANX_MIN[i]) << 8;
17d648bf 2412 }
1da177e4
LT		 2413 }
2414 for (i = 0; i < 3; i++) {
4573acbc
GR		 2415 if (!(data->has_temp & (1 << i)))
2416 continue;
60ca385a 2417 data->temp[i][0] =
5f2dc798 2418 it87_read_value(data, IT87_REG_TEMP(i));
60ca385a 2419 data->temp[i][1] =
5f2dc798 2420 it87_read_value(data, IT87_REG_TEMP_LOW(i));
60ca385a
GR		 2421 data->temp[i][2] =
2422 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
161d898a
GR		 2423 if (has_temp_offset(data))
2424 data->temp[i][3] =
2425 it87_read_value(data,
2426 IT87_REG_TEMP_OFFSET[i]);
1da177e4
LT		 2427 }
2428
17d648bf 2429 /* Newer chips don't have clock dividers */
0475169c 2430 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
b74f3fdd 2431 i = it87_read_value(data, IT87_REG_FAN_DIV);
17d648bf
JD		 2432 data->fan_div[0] = i & 0x07;
2433 data->fan_div[1] = (i >> 3) & 0x07;
2434 data->fan_div[2] = (i & 0x40) ? 3 : 1;
2435 }
1da177e4
LT		 2436
2437 data->alarms =
b74f3fdd 2438 it87_read_value(data, IT87_REG_ALARM1) |
2439 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
2440 (it87_read_value(data, IT87_REG_ALARM3) << 16);
d9b327c3 2441 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
b99883dc 2442
b74f3fdd 2443 data->fan_main_ctrl = it87_read_value(data,
2444 IT87_REG_FAN_MAIN_CTRL);
2445 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
b99883dc
JD		 2446 for (i = 0; i < 3; i++)
2447 it87_update_pwm_ctrl(data, i);
b74f3fdd 2448
2449 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
4a0d71cf
GR		 2450 /*
2451 * The IT8705F does not have VID capability.
2452 * The IT8718F and later don't use IT87_REG_VID for the
2453 * same purpose.
2454 */
17d648bf 2455 if (data->type == it8712 || data->type == it8716) {
b74f3fdd 2456 data->vid = it87_read_value(data, IT87_REG_VID);
4a0d71cf
GR		 2457 /*
2458 * The older IT8712F revisions had only 5 VID pins,
2459 * but we assume it is always safe to read 6 bits.
2460 */
17d648bf 2461 data->vid &= 0x3f;
1da177e4
LT		 2462 }
2463 data->last_updated = jiffies;
2464 data->valid = 1;
2465 }
2466
9a61bf63 2467 mutex_unlock(&data->update_lock);
1da177e4
LT		 2468
2469 return data;
2470}
2471
b74f3fdd 2472static int __init it87_device_add(unsigned short address,
2473 const struct it87_sio_data *sio_data)
2474{
2475 struct resource res = {
87b4b663
BH		 2476 .start = address + IT87_EC_OFFSET,
2477 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
b74f3fdd 2478 .name = DRVNAME,
2479 .flags = IORESOURCE_IO,
2480 };
2481 int err;
2482
b9acb64a
JD		 2483 err = acpi_check_resource_conflict(&res);
2484 if (err)
2485 goto exit;
2486
b74f3fdd 2487 pdev = platform_device_alloc(DRVNAME, address);
2488 if (!pdev) {
2489 err = -ENOMEM;
a8ca1037 2490 pr_err("Device allocation failed\n");
b74f3fdd 2491 goto exit;
2492 }
2493
2494 err = platform_device_add_resources(pdev, &res, 1);
2495 if (err) {
a8ca1037 2496 pr_err("Device resource addition failed (%d)\n", err);
b74f3fdd 2497 goto exit_device_put;
2498 }
2499
2500 err = platform_device_add_data(pdev, sio_data,
2501 sizeof(struct it87_sio_data));
2502 if (err) {
a8ca1037 2503 pr_err("Platform data allocation failed\n");
b74f3fdd 2504 goto exit_device_put;
2505 }
2506
2507 err = platform_device_add(pdev);
2508 if (err) {
a8ca1037 2509 pr_err("Device addition failed (%d)\n", err);
b74f3fdd 2510 goto exit_device_put;
2511 }
2512
2513 return 0;
2514
2515exit_device_put:
2516 platform_device_put(pdev);
2517exit:
2518 return err;
2519}
2520
1da177e4
LT		 2521static int __init sm_it87_init(void)
2522{
b74f3fdd 2523 int err;
5f2dc798 2524 unsigned short isa_address = 0;
b74f3fdd 2525 struct it87_sio_data sio_data;
2526
98dd22c3 2527 memset(&sio_data, 0, sizeof(struct it87_sio_data));
b74f3fdd 2528 err = it87_find(&isa_address, &sio_data);
2529 if (err)
2530 return err;
2531 err = platform_driver_register(&it87_driver);
2532 if (err)
2533 return err;
fde09509 2534
b74f3fdd 2535 err = it87_device_add(isa_address, &sio_data);
5f2dc798 2536 if (err) {
b74f3fdd 2537 platform_driver_unregister(&it87_driver);
2538 return err;
2539 }
2540
2541 return 0;
1da177e4
LT		 2542}
2543
2544static void __exit sm_it87_exit(void)
2545{
b74f3fdd 2546 platform_device_unregister(pdev);
2547 platform_driver_unregister(&it87_driver);
1da177e4
LT		 2548}
2549
2550
1d9bcf6a 2551MODULE_AUTHOR("Chris Gauthron, Jean Delvare <khali@linux-fr.org>");
44c1bcd4 2552MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
1da177e4
LT		 2553module_param(update_vbat, bool, 0);
2554MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2555module_param(fix_pwm_polarity, bool, 0);
5f2dc798
JD		 2556MODULE_PARM_DESC(fix_pwm_polarity,
2557 "Force PWM polarity to active high (DANGEROUS)");
1da177e4
LT		 2558MODULE_LICENSE("GPL");
2559
2560module_init(sm_it87_init);
2561module_exit(sm_it87_exit);
Linux 6.x block layer and io_uring tree(s)