power: remove use of __devexit
[linux-2.6-block.git] / drivers / hwmon / it87.c
CommitLineData
1da177e4 1/*
5f2dc798
JD
2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring.
4 *
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
8 * Fan Controller)
9 *
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
12 *
13 * Supports: IT8705F Super I/O chip w/LPC interface
14 * IT8712F Super I/O chip w/LPC interface
15 * IT8716F Super I/O chip w/LPC interface
16 * IT8718F Super I/O chip w/LPC interface
17 * IT8720F Super I/O chip w/LPC interface
44c1bcd4 18 * IT8721F Super I/O chip w/LPC interface
5f2dc798 19 * IT8726F Super I/O chip w/LPC interface
16b5dda2 20 * IT8728F Super I/O chip w/LPC interface
44c1bcd4 21 * IT8758E Super I/O chip w/LPC interface
0531d98b
GR
22 * IT8782F Super I/O chip w/LPC interface
23 * IT8783E/F Super I/O chip w/LPC interface
5f2dc798
JD
24 * Sis950 A clone of the IT8705F
25 *
26 * Copyright (C) 2001 Chris Gauthron
27 * Copyright (C) 2005-2010 Jean Delvare <khali@linux-fr.org>
28 *
29 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License as published by
31 * the Free Software Foundation; either version 2 of the License, or
32 * (at your option) any later version.
33 *
34 * This program is distributed in the hope that it will be useful,
35 * but WITHOUT ANY WARRANTY; without even the implied warranty of
36 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
37 * GNU General Public License for more details.
38 *
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
42 */
1da177e4 43
a8ca1037
JP
44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
1da177e4
LT
46#include <linux/module.h>
47#include <linux/init.h>
48#include <linux/slab.h>
49#include <linux/jiffies.h>
b74f3fdd 50#include <linux/platform_device.h>
943b0830 51#include <linux/hwmon.h>
303760b4
JD
52#include <linux/hwmon-sysfs.h>
53#include <linux/hwmon-vid.h>
943b0830 54#include <linux/err.h>
9a61bf63 55#include <linux/mutex.h>
87808be4 56#include <linux/sysfs.h>
98dd22c3
JD
57#include <linux/string.h>
58#include <linux/dmi.h>
b9acb64a 59#include <linux/acpi.h>
6055fae8 60#include <linux/io.h>
1da177e4 61
b74f3fdd 62#define DRVNAME "it87"
1da177e4 63
0531d98b
GR
64enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8782,
65 it8783 };
1da177e4 66
67b671bc
JD
67static unsigned short force_id;
68module_param(force_id, ushort, 0);
69MODULE_PARM_DESC(force_id, "Override the detected device ID");
70
b74f3fdd 71static struct platform_device *pdev;
72
1da177e4
LT
73#define REG 0x2e /* The register to read/write */
74#define DEV 0x07 /* Register: Logical device select */
75#define VAL 0x2f /* The value to read/write */
76#define PME 0x04 /* The device with the fan registers in it */
b4da93e4
JMS
77
78/* The device with the IT8718F/IT8720F VID value in it */
79#define GPIO 0x07
80
1da177e4
LT
81#define DEVID 0x20 /* Register: Device ID */
82#define DEVREV 0x22 /* Register: Device Revision */
83
5b0380c9 84static inline int superio_inb(int reg)
1da177e4
LT
85{
86 outb(reg, REG);
87 return inb(VAL);
88}
89
5b0380c9 90static inline void superio_outb(int reg, int val)
436cad2a
JD
91{
92 outb(reg, REG);
93 outb(val, VAL);
94}
95
1da177e4
LT
96static int superio_inw(int reg)
97{
98 int val;
99 outb(reg++, REG);
100 val = inb(VAL) << 8;
101 outb(reg, REG);
102 val |= inb(VAL);
103 return val;
104}
105
5b0380c9 106static inline void superio_select(int ldn)
1da177e4
LT
107{
108 outb(DEV, REG);
87673dd7 109 outb(ldn, VAL);
1da177e4
LT
110}
111
5b0380c9 112static inline int superio_enter(void)
1da177e4 113{
5b0380c9
NG
114 /*
115 * Try to reserve REG and REG + 1 for exclusive access.
116 */
117 if (!request_muxed_region(REG, 2, DRVNAME))
118 return -EBUSY;
119
1da177e4
LT
120 outb(0x87, REG);
121 outb(0x01, REG);
122 outb(0x55, REG);
123 outb(0x55, REG);
5b0380c9 124 return 0;
1da177e4
LT
125}
126
5b0380c9 127static inline void superio_exit(void)
1da177e4
LT
128{
129 outb(0x02, REG);
130 outb(0x02, VAL);
5b0380c9 131 release_region(REG, 2);
1da177e4
LT
132}
133
87673dd7 134/* Logical device 4 registers */
1da177e4
LT
135#define IT8712F_DEVID 0x8712
136#define IT8705F_DEVID 0x8705
17d648bf 137#define IT8716F_DEVID 0x8716
87673dd7 138#define IT8718F_DEVID 0x8718
b4da93e4 139#define IT8720F_DEVID 0x8720
44c1bcd4 140#define IT8721F_DEVID 0x8721
08a8f6e9 141#define IT8726F_DEVID 0x8726
16b5dda2 142#define IT8728F_DEVID 0x8728
0531d98b
GR
143#define IT8782F_DEVID 0x8782
144#define IT8783E_DEVID 0x8783
1da177e4
LT
145#define IT87_ACT_REG 0x30
146#define IT87_BASE_REG 0x60
147
87673dd7 148/* Logical device 7 registers (IT8712F and later) */
0531d98b 149#define IT87_SIO_GPIO1_REG 0x25
895ff267 150#define IT87_SIO_GPIO3_REG 0x27
591ec650 151#define IT87_SIO_GPIO5_REG 0x29
0531d98b 152#define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
87673dd7 153#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
0531d98b 154#define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
87673dd7 155#define IT87_SIO_VID_REG 0xfc /* VID value */
d9b327c3 156#define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
87673dd7 157
1da177e4 158/* Update battery voltage after every reading if true */
90ab5ee9 159static bool update_vbat;
1da177e4
LT
160
161/* Not all BIOSes properly configure the PWM registers */
90ab5ee9 162static bool fix_pwm_polarity;
1da177e4 163
1da177e4
LT
164/* Many IT87 constants specified below */
165
166/* Length of ISA address segment */
167#define IT87_EXTENT 8
168
87b4b663
BH
169/* Length of ISA address segment for Environmental Controller */
170#define IT87_EC_EXTENT 2
171
172/* Offset of EC registers from ISA base address */
173#define IT87_EC_OFFSET 5
174
175/* Where are the ISA address/data registers relative to the EC base address */
176#define IT87_ADDR_REG_OFFSET 0
177#define IT87_DATA_REG_OFFSET 1
1da177e4
LT
178
179/*----- The IT87 registers -----*/
180
181#define IT87_REG_CONFIG 0x00
182
183#define IT87_REG_ALARM1 0x01
184#define IT87_REG_ALARM2 0x02
185#define IT87_REG_ALARM3 0x03
186
4a0d71cf
GR
187/*
188 * The IT8718F and IT8720F have the VID value in a different register, in
189 * Super-I/O configuration space.
190 */
1da177e4 191#define IT87_REG_VID 0x0a
4a0d71cf
GR
192/*
193 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
194 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
195 * mode.
196 */
1da177e4 197#define IT87_REG_FAN_DIV 0x0b
17d648bf 198#define IT87_REG_FAN_16BIT 0x0c
1da177e4
LT
199
200/* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
201
c7f1f716
JD
202static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
203static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 };
204static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 };
205static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
1da177e4
LT
206#define IT87_REG_FAN_MAIN_CTRL 0x13
207#define IT87_REG_FAN_CTL 0x14
208#define IT87_REG_PWM(nr) (0x15 + (nr))
6229cdb2 209#define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8)
1da177e4
LT
210
211#define IT87_REG_VIN(nr) (0x20 + (nr))
212#define IT87_REG_TEMP(nr) (0x29 + (nr))
213
214#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
215#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
216#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
217#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
218
1da177e4
LT
219#define IT87_REG_VIN_ENABLE 0x50
220#define IT87_REG_TEMP_ENABLE 0x51
4573acbc 221#define IT87_REG_TEMP_EXTRA 0x55
d9b327c3 222#define IT87_REG_BEEP_ENABLE 0x5c
1da177e4
LT
223
224#define IT87_REG_CHIPID 0x58
225
4f3f51bc
JD
226#define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
227#define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i))
228
1da177e4 229
b74f3fdd 230struct it87_sio_data {
231 enum chips type;
232 /* Values read from Super-I/O config space */
0475169c 233 u8 revision;
b74f3fdd 234 u8 vid_value;
d9b327c3 235 u8 beep_pin;
738e5e05 236 u8 internal; /* Internal sensors can be labeled */
591ec650 237 /* Features skipped based on config or DMI */
9172b5d1 238 u16 skip_in;
895ff267 239 u8 skip_vid;
591ec650 240 u8 skip_fan;
98dd22c3 241 u8 skip_pwm;
4573acbc 242 u8 skip_temp;
b74f3fdd 243};
244
4a0d71cf
GR
245/*
246 * For each registered chip, we need to keep some data in memory.
247 * The structure is dynamically allocated.
248 */
1da177e4 249struct it87_data {
1beeffe4 250 struct device *hwmon_dev;
1da177e4 251 enum chips type;
0475169c 252 u8 revision;
1da177e4 253
b74f3fdd 254 unsigned short addr;
255 const char *name;
9a61bf63 256 struct mutex update_lock;
1da177e4
LT
257 char valid; /* !=0 if following fields are valid */
258 unsigned long last_updated; /* In jiffies */
259
44c1bcd4 260 u16 in_scaled; /* Internal voltage sensors are scaled */
1da177e4 261 u8 in[9]; /* Register value */
3543a53f
JD
262 u8 in_max[8]; /* Register value */
263 u8 in_min[8]; /* Register value */
9060f8bd 264 u8 has_fan; /* Bitfield, fans enabled */
c7f1f716
JD
265 u16 fan[5]; /* Register values, possibly combined */
266 u16 fan_min[5]; /* Register values, possibly combined */
4573acbc 267 u8 has_temp; /* Bitfield, temp sensors enabled */
e267d250
JD
268 s8 temp[3]; /* Register value */
269 s8 temp_high[3]; /* Register value */
270 s8 temp_low[3]; /* Register value */
1da177e4
LT
271 u8 sensor; /* Register value */
272 u8 fan_div[3]; /* Register encoding, shifted right */
273 u8 vid; /* Register encoding, combined */
a7be58a1 274 u8 vrm;
1da177e4 275 u32 alarms; /* Register encoding, combined */
d9b327c3 276 u8 beeps; /* Register encoding */
1da177e4 277 u8 fan_main_ctrl; /* Register value */
f8d0c19a 278 u8 fan_ctl; /* Register value */
b99883dc 279
4a0d71cf
GR
280 /*
281 * The following 3 arrays correspond to the same registers up to
6229cdb2
JD
282 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
283 * 7, and we want to preserve settings on mode changes, so we have
284 * to track all values separately.
285 * Starting with the IT8721F, the manual PWM duty cycles are stored
286 * in separate registers (8-bit values), so the separate tracking
287 * is no longer needed, but it is still done to keep the driver
4a0d71cf
GR
288 * simple.
289 */
b99883dc 290 u8 pwm_ctrl[3]; /* Register value */
6229cdb2 291 u8 pwm_duty[3]; /* Manual PWM value set by user */
b99883dc 292 u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */
4f3f51bc
JD
293
294 /* Automatic fan speed control registers */
295 u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */
296 s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */
1da177e4 297};
0df6454d 298
16b5dda2
JD
299static inline int has_12mv_adc(const struct it87_data *data)
300{
301 /*
302 * IT8721F and later have a 12 mV ADC, also with internal scaling
303 * on selected inputs.
304 */
305 return data->type == it8721
306 || data->type == it8728;
307}
308
309static inline int has_newer_autopwm(const struct it87_data *data)
310{
311 /*
312 * IT8721F and later have separate registers for the temperature
313 * mapping and the manual duty cycle.
314 */
315 return data->type == it8721
316 || data->type == it8728;
317}
318
0531d98b 319static int adc_lsb(const struct it87_data *data, int nr)
44c1bcd4 320{
0531d98b
GR
321 int lsb = has_12mv_adc(data) ? 12 : 16;
322 if (data->in_scaled & (1 << nr))
323 lsb <<= 1;
324 return lsb;
325}
44c1bcd4 326
0531d98b
GR
327static u8 in_to_reg(const struct it87_data *data, int nr, long val)
328{
329 val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr));
44c1bcd4
JD
330 return SENSORS_LIMIT(val, 0, 255);
331}
332
333static int in_from_reg(const struct it87_data *data, int nr, int val)
334{
0531d98b 335 return val * adc_lsb(data, nr);
44c1bcd4 336}
0df6454d
JD
337
338static inline u8 FAN_TO_REG(long rpm, int div)
339{
340 if (rpm == 0)
341 return 255;
342 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
343 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
344 254);
345}
346
347static inline u16 FAN16_TO_REG(long rpm)
348{
349 if (rpm == 0)
350 return 0xffff;
351 return SENSORS_LIMIT((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
352}
353
354#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
355 1350000 / ((val) * (div)))
356/* The divider is fixed to 2 in 16-bit mode */
357#define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
358 1350000 / ((val) * 2))
359
360#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (((val) - 500) / 1000) : \
361 ((val) + 500) / 1000), -128, 127))
362#define TEMP_FROM_REG(val) ((val) * 1000)
363
44c1bcd4
JD
364static u8 pwm_to_reg(const struct it87_data *data, long val)
365{
16b5dda2 366 if (has_newer_autopwm(data))
44c1bcd4
JD
367 return val;
368 else
369 return val >> 1;
370}
371
372static int pwm_from_reg(const struct it87_data *data, u8 reg)
373{
16b5dda2 374 if (has_newer_autopwm(data))
44c1bcd4
JD
375 return reg;
376 else
377 return (reg & 0x7f) << 1;
378}
379
0df6454d
JD
380
381static int DIV_TO_REG(int val)
382{
383 int answer = 0;
384 while (answer < 7 && (val >>= 1))
385 answer++;
386 return answer;
387}
388#define DIV_FROM_REG(val) (1 << (val))
389
390static const unsigned int pwm_freq[8] = {
391 48000000 / 128,
392 24000000 / 128,
393 12000000 / 128,
394 8000000 / 128,
395 6000000 / 128,
396 3000000 / 128,
397 1500000 / 128,
398 750000 / 128,
399};
1da177e4 400
0475169c
AP
401static inline int has_16bit_fans(const struct it87_data *data)
402{
4a0d71cf
GR
403 /*
404 * IT8705F Datasheet 0.4.1, 3h == Version G.
405 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
406 * These are the first revisions with 16-bit tachometer support.
407 */
816d8c6a 408 return (data->type == it87 && data->revision >= 0x03)
859b9ef3 409 || (data->type == it8712 && data->revision >= 0x08)
0475169c 410 || data->type == it8716
b4da93e4 411 || data->type == it8718
44c1bcd4 412 || data->type == it8720
16b5dda2 413 || data->type == it8721
0531d98b
GR
414 || data->type == it8728
415 || data->type == it8782
416 || data->type == it8783;
0475169c 417}
1da177e4 418
4f3f51bc
JD
419static inline int has_old_autopwm(const struct it87_data *data)
420{
4a0d71cf
GR
421 /*
422 * The old automatic fan speed control interface is implemented
423 * by IT8705F chips up to revision F and IT8712F chips up to
424 * revision G.
425 */
4f3f51bc
JD
426 return (data->type == it87 && data->revision < 0x03)
427 || (data->type == it8712 && data->revision < 0x08);
428}
429
b74f3fdd 430static int it87_probe(struct platform_device *pdev);
d0546128 431static int __devexit it87_remove(struct platform_device *pdev);
1da177e4 432
b74f3fdd 433static int it87_read_value(struct it87_data *data, u8 reg);
434static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
1da177e4 435static struct it87_data *it87_update_device(struct device *dev);
b74f3fdd 436static int it87_check_pwm(struct device *dev);
437static void it87_init_device(struct platform_device *pdev);
1da177e4
LT
438
439
b74f3fdd 440static struct platform_driver it87_driver = {
cdaf7934 441 .driver = {
87218842 442 .owner = THIS_MODULE,
b74f3fdd 443 .name = DRVNAME,
cdaf7934 444 },
b74f3fdd 445 .probe = it87_probe,
446 .remove = __devexit_p(it87_remove),
fde09509
JD
447};
448
20ad93d4
JD
449static ssize_t show_in(struct device *dev, struct device_attribute *attr,
450 char *buf)
1da177e4 451{
20ad93d4
JD
452 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
453 int nr = sensor_attr->index;
454
1da177e4 455 struct it87_data *data = it87_update_device(dev);
44c1bcd4 456 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr]));
1da177e4
LT
457}
458
20ad93d4
JD
459static ssize_t show_in_min(struct device *dev, struct device_attribute *attr,
460 char *buf)
1da177e4 461{
20ad93d4
JD
462 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
463 int nr = sensor_attr->index;
464
1da177e4 465 struct it87_data *data = it87_update_device(dev);
44c1bcd4 466 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in_min[nr]));
1da177e4
LT
467}
468
20ad93d4
JD
469static ssize_t show_in_max(struct device *dev, struct device_attribute *attr,
470 char *buf)
1da177e4 471{
20ad93d4
JD
472 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
473 int nr = sensor_attr->index;
474
1da177e4 475 struct it87_data *data = it87_update_device(dev);
44c1bcd4 476 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in_max[nr]));
1da177e4
LT
477}
478
20ad93d4
JD
479static ssize_t set_in_min(struct device *dev, struct device_attribute *attr,
480 const char *buf, size_t count)
1da177e4 481{
20ad93d4
JD
482 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
483 int nr = sensor_attr->index;
484
b74f3fdd 485 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
486 unsigned long val;
487
179c4fdb 488 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 489 return -EINVAL;
1da177e4 490
9a61bf63 491 mutex_lock(&data->update_lock);
44c1bcd4 492 data->in_min[nr] = in_to_reg(data, nr, val);
b74f3fdd 493 it87_write_value(data, IT87_REG_VIN_MIN(nr),
1da177e4 494 data->in_min[nr]);
9a61bf63 495 mutex_unlock(&data->update_lock);
1da177e4
LT
496 return count;
497}
20ad93d4
JD
498static ssize_t set_in_max(struct device *dev, struct device_attribute *attr,
499 const char *buf, size_t count)
1da177e4 500{
20ad93d4
JD
501 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
502 int nr = sensor_attr->index;
503
b74f3fdd 504 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
505 unsigned long val;
506
179c4fdb 507 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 508 return -EINVAL;
1da177e4 509
9a61bf63 510 mutex_lock(&data->update_lock);
44c1bcd4 511 data->in_max[nr] = in_to_reg(data, nr, val);
b74f3fdd 512 it87_write_value(data, IT87_REG_VIN_MAX(nr),
1da177e4 513 data->in_max[nr]);
9a61bf63 514 mutex_unlock(&data->update_lock);
1da177e4
LT
515 return count;
516}
517
518#define show_in_offset(offset) \
20ad93d4
JD
519static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
520 show_in, NULL, offset);
1da177e4
LT
521
522#define limit_in_offset(offset) \
20ad93d4
JD
523static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
524 show_in_min, set_in_min, offset); \
525static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
526 show_in_max, set_in_max, offset);
1da177e4
LT
527
528show_in_offset(0);
529limit_in_offset(0);
530show_in_offset(1);
531limit_in_offset(1);
532show_in_offset(2);
533limit_in_offset(2);
534show_in_offset(3);
535limit_in_offset(3);
536show_in_offset(4);
537limit_in_offset(4);
538show_in_offset(5);
539limit_in_offset(5);
540show_in_offset(6);
541limit_in_offset(6);
542show_in_offset(7);
543limit_in_offset(7);
544show_in_offset(8);
545
546/* 3 temperatures */
20ad93d4
JD
547static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
548 char *buf)
1da177e4 549{
20ad93d4
JD
550 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
551 int nr = sensor_attr->index;
552
1da177e4
LT
553 struct it87_data *data = it87_update_device(dev);
554 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr]));
555}
20ad93d4
JD
556static ssize_t show_temp_max(struct device *dev, struct device_attribute *attr,
557 char *buf)
1da177e4 558{
20ad93d4
JD
559 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
560 int nr = sensor_attr->index;
561
1da177e4
LT
562 struct it87_data *data = it87_update_device(dev);
563 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_high[nr]));
564}
20ad93d4
JD
565static ssize_t show_temp_min(struct device *dev, struct device_attribute *attr,
566 char *buf)
1da177e4 567{
20ad93d4
JD
568 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
569 int nr = sensor_attr->index;
570
1da177e4
LT
571 struct it87_data *data = it87_update_device(dev);
572 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_low[nr]));
573}
20ad93d4
JD
574static ssize_t set_temp_max(struct device *dev, struct device_attribute *attr,
575 const char *buf, size_t count)
1da177e4 576{
20ad93d4
JD
577 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
578 int nr = sensor_attr->index;
579
b74f3fdd 580 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
581 long val;
582
179c4fdb 583 if (kstrtol(buf, 10, &val) < 0)
f5f64501 584 return -EINVAL;
1da177e4 585
9a61bf63 586 mutex_lock(&data->update_lock);
1da177e4 587 data->temp_high[nr] = TEMP_TO_REG(val);
b74f3fdd 588 it87_write_value(data, IT87_REG_TEMP_HIGH(nr), data->temp_high[nr]);
9a61bf63 589 mutex_unlock(&data->update_lock);
1da177e4
LT
590 return count;
591}
20ad93d4
JD
592static ssize_t set_temp_min(struct device *dev, struct device_attribute *attr,
593 const char *buf, size_t count)
1da177e4 594{
20ad93d4
JD
595 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
596 int nr = sensor_attr->index;
597
b74f3fdd 598 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
599 long val;
600
179c4fdb 601 if (kstrtol(buf, 10, &val) < 0)
f5f64501 602 return -EINVAL;
1da177e4 603
9a61bf63 604 mutex_lock(&data->update_lock);
1da177e4 605 data->temp_low[nr] = TEMP_TO_REG(val);
b74f3fdd 606 it87_write_value(data, IT87_REG_TEMP_LOW(nr), data->temp_low[nr]);
9a61bf63 607 mutex_unlock(&data->update_lock);
1da177e4
LT
608 return count;
609}
610#define show_temp_offset(offset) \
20ad93d4
JD
611static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
612 show_temp, NULL, offset - 1); \
613static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
614 show_temp_max, set_temp_max, offset - 1); \
615static SENSOR_DEVICE_ATTR(temp##offset##_min, S_IRUGO | S_IWUSR, \
616 show_temp_min, set_temp_min, offset - 1);
1da177e4
LT
617
618show_temp_offset(1);
619show_temp_offset(2);
620show_temp_offset(3);
621
20ad93d4
JD
622static ssize_t show_sensor(struct device *dev, struct device_attribute *attr,
623 char *buf)
1da177e4 624{
20ad93d4
JD
625 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
626 int nr = sensor_attr->index;
1da177e4 627 struct it87_data *data = it87_update_device(dev);
4a0d71cf 628 u8 reg = data->sensor; /* In case value is updated while used */
5f2dc798 629
1da177e4
LT
630 if (reg & (1 << nr))
631 return sprintf(buf, "3\n"); /* thermal diode */
632 if (reg & (8 << nr))
4ed10779 633 return sprintf(buf, "4\n"); /* thermistor */
1da177e4
LT
634 return sprintf(buf, "0\n"); /* disabled */
635}
20ad93d4
JD
636static ssize_t set_sensor(struct device *dev, struct device_attribute *attr,
637 const char *buf, size_t count)
1da177e4 638{
20ad93d4
JD
639 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
640 int nr = sensor_attr->index;
641
b74f3fdd 642 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 643 long val;
8acf07c5 644 u8 reg;
f5f64501 645
179c4fdb 646 if (kstrtol(buf, 10, &val) < 0)
f5f64501 647 return -EINVAL;
1da177e4 648
8acf07c5
JD
649 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
650 reg &= ~(1 << nr);
651 reg &= ~(8 << nr);
4ed10779
JD
652 if (val == 2) { /* backwards compatibility */
653 dev_warn(dev, "Sensor type 2 is deprecated, please use 4 "
654 "instead\n");
655 val = 4;
656 }
657 /* 3 = thermal diode; 4 = thermistor; 0 = disabled */
1da177e4 658 if (val == 3)
8acf07c5 659 reg |= 1 << nr;
4ed10779 660 else if (val == 4)
8acf07c5
JD
661 reg |= 8 << nr;
662 else if (val != 0)
1da177e4 663 return -EINVAL;
8acf07c5
JD
664
665 mutex_lock(&data->update_lock);
666 data->sensor = reg;
b74f3fdd 667 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
2b3d1d87 668 data->valid = 0; /* Force cache refresh */
9a61bf63 669 mutex_unlock(&data->update_lock);
1da177e4
LT
670 return count;
671}
672#define show_sensor_offset(offset) \
20ad93d4
JD
673static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
674 show_sensor, set_sensor, offset - 1);
1da177e4
LT
675
676show_sensor_offset(1);
677show_sensor_offset(2);
678show_sensor_offset(3);
679
680/* 3 Fans */
b99883dc
JD
681
682static int pwm_mode(const struct it87_data *data, int nr)
683{
684 int ctrl = data->fan_main_ctrl & (1 << nr);
685
686 if (ctrl == 0) /* Full speed */
687 return 0;
688 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
689 return 2;
690 else /* Manual mode */
691 return 1;
692}
693
20ad93d4
JD
694static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
695 char *buf)
1da177e4 696{
20ad93d4
JD
697 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
698 int nr = sensor_attr->index;
699
1da177e4 700 struct it87_data *data = it87_update_device(dev);
5f2dc798 701 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
1da177e4
LT
702 DIV_FROM_REG(data->fan_div[nr])));
703}
20ad93d4
JD
704static ssize_t show_fan_min(struct device *dev, struct device_attribute *attr,
705 char *buf)
1da177e4 706{
20ad93d4
JD
707 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
708 int nr = sensor_attr->index;
709
1da177e4 710 struct it87_data *data = it87_update_device(dev);
5f2dc798
JD
711 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr],
712 DIV_FROM_REG(data->fan_div[nr])));
1da177e4 713}
20ad93d4
JD
714static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
715 char *buf)
1da177e4 716{
20ad93d4
JD
717 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
718 int nr = sensor_attr->index;
719
1da177e4
LT
720 struct it87_data *data = it87_update_device(dev);
721 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
722}
5f2dc798
JD
723static ssize_t show_pwm_enable(struct device *dev,
724 struct device_attribute *attr, char *buf)
1da177e4 725{
20ad93d4
JD
726 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
727 int nr = sensor_attr->index;
728
1da177e4 729 struct it87_data *data = it87_update_device(dev);
b99883dc 730 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1da177e4 731}
20ad93d4
JD
732static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
733 char *buf)
1da177e4 734{
20ad93d4
JD
735 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
736 int nr = sensor_attr->index;
737
1da177e4 738 struct it87_data *data = it87_update_device(dev);
44c1bcd4
JD
739 return sprintf(buf, "%d\n",
740 pwm_from_reg(data, data->pwm_duty[nr]));
1da177e4 741}
f8d0c19a
JD
742static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
743 char *buf)
744{
745 struct it87_data *data = it87_update_device(dev);
746 int index = (data->fan_ctl >> 4) & 0x07;
747
748 return sprintf(buf, "%u\n", pwm_freq[index]);
749}
20ad93d4
JD
750static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
751 const char *buf, size_t count)
1da177e4 752{
20ad93d4
JD
753 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
754 int nr = sensor_attr->index;
755
b74f3fdd 756 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 757 long val;
7f999aa7 758 u8 reg;
1da177e4 759
179c4fdb 760 if (kstrtol(buf, 10, &val) < 0)
f5f64501
JD
761 return -EINVAL;
762
9a61bf63 763 mutex_lock(&data->update_lock);
b74f3fdd 764 reg = it87_read_value(data, IT87_REG_FAN_DIV);
07eab46d 765 switch (nr) {
5f2dc798
JD
766 case 0:
767 data->fan_div[nr] = reg & 0x07;
768 break;
769 case 1:
770 data->fan_div[nr] = (reg >> 3) & 0x07;
771 break;
772 case 2:
773 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
774 break;
07eab46d
JD
775 }
776
1da177e4 777 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 778 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
9a61bf63 779 mutex_unlock(&data->update_lock);
1da177e4
LT
780 return count;
781}
20ad93d4
JD
782static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
783 const char *buf, size_t count)
1da177e4 784{
20ad93d4
JD
785 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
786 int nr = sensor_attr->index;
787
b74f3fdd 788 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 789 unsigned long val;
8ab4ec3e 790 int min;
1da177e4
LT
791 u8 old;
792
179c4fdb 793 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD
794 return -EINVAL;
795
9a61bf63 796 mutex_lock(&data->update_lock);
b74f3fdd 797 old = it87_read_value(data, IT87_REG_FAN_DIV);
1da177e4 798
8ab4ec3e
JD
799 /* Save fan min limit */
800 min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
1da177e4
LT
801
802 switch (nr) {
803 case 0:
804 case 1:
805 data->fan_div[nr] = DIV_TO_REG(val);
806 break;
807 case 2:
808 if (val < 8)
809 data->fan_div[nr] = 1;
810 else
811 data->fan_div[nr] = 3;
812 }
813 val = old & 0x80;
814 val |= (data->fan_div[0] & 0x07);
815 val |= (data->fan_div[1] & 0x07) << 3;
816 if (data->fan_div[2] == 3)
817 val |= 0x1 << 6;
b74f3fdd 818 it87_write_value(data, IT87_REG_FAN_DIV, val);
1da177e4 819
8ab4ec3e
JD
820 /* Restore fan min limit */
821 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
c7f1f716 822 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
8ab4ec3e 823
9a61bf63 824 mutex_unlock(&data->update_lock);
1da177e4
LT
825 return count;
826}
cccfc9c4
JD
827
828/* Returns 0 if OK, -EINVAL otherwise */
829static int check_trip_points(struct device *dev, int nr)
830{
831 const struct it87_data *data = dev_get_drvdata(dev);
832 int i, err = 0;
833
834 if (has_old_autopwm(data)) {
835 for (i = 0; i < 3; i++) {
836 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
837 err = -EINVAL;
838 }
839 for (i = 0; i < 2; i++) {
840 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
841 err = -EINVAL;
842 }
843 }
844
845 if (err) {
846 dev_err(dev, "Inconsistent trip points, not switching to "
847 "automatic mode\n");
848 dev_err(dev, "Adjust the trip points and try again\n");
849 }
850 return err;
851}
852
20ad93d4
JD
853static ssize_t set_pwm_enable(struct device *dev,
854 struct device_attribute *attr, const char *buf, size_t count)
1da177e4 855{
20ad93d4
JD
856 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
857 int nr = sensor_attr->index;
858
b74f3fdd 859 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 860 long val;
1da177e4 861
179c4fdb 862 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
b99883dc
JD
863 return -EINVAL;
864
cccfc9c4
JD
865 /* Check trip points before switching to automatic mode */
866 if (val == 2) {
867 if (check_trip_points(dev, nr) < 0)
868 return -EINVAL;
869 }
870
9a61bf63 871 mutex_lock(&data->update_lock);
1da177e4
LT
872
873 if (val == 0) {
874 int tmp;
875 /* make sure the fan is on when in on/off mode */
b74f3fdd 876 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
877 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1da177e4
LT
878 /* set on/off mode */
879 data->fan_main_ctrl &= ~(1 << nr);
5f2dc798
JD
880 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
881 data->fan_main_ctrl);
b99883dc
JD
882 } else {
883 if (val == 1) /* Manual mode */
16b5dda2 884 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
6229cdb2
JD
885 data->pwm_temp_map[nr] :
886 data->pwm_duty[nr];
b99883dc
JD
887 else /* Automatic mode */
888 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
889 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1da177e4
LT
890 /* set SmartGuardian mode */
891 data->fan_main_ctrl |= (1 << nr);
5f2dc798
JD
892 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
893 data->fan_main_ctrl);
1da177e4
LT
894 }
895
9a61bf63 896 mutex_unlock(&data->update_lock);
1da177e4
LT
897 return count;
898}
20ad93d4
JD
899static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
900 const char *buf, size_t count)
1da177e4 901{
20ad93d4
JD
902 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
903 int nr = sensor_attr->index;
904
b74f3fdd 905 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 906 long val;
1da177e4 907
179c4fdb 908 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1da177e4
LT
909 return -EINVAL;
910
9a61bf63 911 mutex_lock(&data->update_lock);
16b5dda2 912 if (has_newer_autopwm(data)) {
4a0d71cf
GR
913 /*
914 * If we are in automatic mode, the PWM duty cycle register
915 * is read-only so we can't write the value.
916 */
6229cdb2
JD
917 if (data->pwm_ctrl[nr] & 0x80) {
918 mutex_unlock(&data->update_lock);
919 return -EBUSY;
920 }
921 data->pwm_duty[nr] = pwm_to_reg(data, val);
922 it87_write_value(data, IT87_REG_PWM_DUTY(nr),
923 data->pwm_duty[nr]);
924 } else {
925 data->pwm_duty[nr] = pwm_to_reg(data, val);
4a0d71cf
GR
926 /*
927 * If we are in manual mode, write the duty cycle immediately;
928 * otherwise, just store it for later use.
929 */
6229cdb2
JD
930 if (!(data->pwm_ctrl[nr] & 0x80)) {
931 data->pwm_ctrl[nr] = data->pwm_duty[nr];
932 it87_write_value(data, IT87_REG_PWM(nr),
933 data->pwm_ctrl[nr]);
934 }
b99883dc 935 }
9a61bf63 936 mutex_unlock(&data->update_lock);
1da177e4
LT
937 return count;
938}
f8d0c19a
JD
939static ssize_t set_pwm_freq(struct device *dev,
940 struct device_attribute *attr, const char *buf, size_t count)
941{
b74f3fdd 942 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 943 unsigned long val;
f8d0c19a
JD
944 int i;
945
179c4fdb 946 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD
947 return -EINVAL;
948
f8d0c19a
JD
949 /* Search for the nearest available frequency */
950 for (i = 0; i < 7; i++) {
951 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
952 break;
953 }
954
955 mutex_lock(&data->update_lock);
b74f3fdd 956 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
f8d0c19a 957 data->fan_ctl |= i << 4;
b74f3fdd 958 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
f8d0c19a
JD
959 mutex_unlock(&data->update_lock);
960
961 return count;
962}
94ac7ee6
JD
963static ssize_t show_pwm_temp_map(struct device *dev,
964 struct device_attribute *attr, char *buf)
965{
966 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
967 int nr = sensor_attr->index;
968
969 struct it87_data *data = it87_update_device(dev);
970 int map;
971
972 if (data->pwm_temp_map[nr] < 3)
973 map = 1 << data->pwm_temp_map[nr];
974 else
975 map = 0; /* Should never happen */
976 return sprintf(buf, "%d\n", map);
977}
978static ssize_t set_pwm_temp_map(struct device *dev,
979 struct device_attribute *attr, const char *buf, size_t count)
980{
981 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
982 int nr = sensor_attr->index;
983
984 struct it87_data *data = dev_get_drvdata(dev);
985 long val;
986 u8 reg;
987
4a0d71cf
GR
988 /*
989 * This check can go away if we ever support automatic fan speed
990 * control on newer chips.
991 */
4f3f51bc
JD
992 if (!has_old_autopwm(data)) {
993 dev_notice(dev, "Mapping change disabled for safety reasons\n");
994 return -EINVAL;
995 }
996
179c4fdb 997 if (kstrtol(buf, 10, &val) < 0)
94ac7ee6
JD
998 return -EINVAL;
999
1000 switch (val) {
1001 case (1 << 0):
1002 reg = 0x00;
1003 break;
1004 case (1 << 1):
1005 reg = 0x01;
1006 break;
1007 case (1 << 2):
1008 reg = 0x02;
1009 break;
1010 default:
1011 return -EINVAL;
1012 }
1013
1014 mutex_lock(&data->update_lock);
1015 data->pwm_temp_map[nr] = reg;
4a0d71cf
GR
1016 /*
1017 * If we are in automatic mode, write the temp mapping immediately;
1018 * otherwise, just store it for later use.
1019 */
94ac7ee6
JD
1020 if (data->pwm_ctrl[nr] & 0x80) {
1021 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1022 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1023 }
1024 mutex_unlock(&data->update_lock);
1025 return count;
1026}
1da177e4 1027
4f3f51bc
JD
1028static ssize_t show_auto_pwm(struct device *dev,
1029 struct device_attribute *attr, char *buf)
1030{
1031 struct it87_data *data = it87_update_device(dev);
1032 struct sensor_device_attribute_2 *sensor_attr =
1033 to_sensor_dev_attr_2(attr);
1034 int nr = sensor_attr->nr;
1035 int point = sensor_attr->index;
1036
44c1bcd4
JD
1037 return sprintf(buf, "%d\n",
1038 pwm_from_reg(data, data->auto_pwm[nr][point]));
4f3f51bc
JD
1039}
1040
1041static ssize_t set_auto_pwm(struct device *dev,
1042 struct device_attribute *attr, const char *buf, size_t count)
1043{
1044 struct it87_data *data = dev_get_drvdata(dev);
1045 struct sensor_device_attribute_2 *sensor_attr =
1046 to_sensor_dev_attr_2(attr);
1047 int nr = sensor_attr->nr;
1048 int point = sensor_attr->index;
1049 long val;
1050
179c4fdb 1051 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
4f3f51bc
JD
1052 return -EINVAL;
1053
1054 mutex_lock(&data->update_lock);
44c1bcd4 1055 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
4f3f51bc
JD
1056 it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1057 data->auto_pwm[nr][point]);
1058 mutex_unlock(&data->update_lock);
1059 return count;
1060}
1061
1062static ssize_t show_auto_temp(struct device *dev,
1063 struct device_attribute *attr, char *buf)
1064{
1065 struct it87_data *data = it87_update_device(dev);
1066 struct sensor_device_attribute_2 *sensor_attr =
1067 to_sensor_dev_attr_2(attr);
1068 int nr = sensor_attr->nr;
1069 int point = sensor_attr->index;
1070
1071 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1072}
1073
1074static ssize_t set_auto_temp(struct device *dev,
1075 struct device_attribute *attr, const char *buf, size_t count)
1076{
1077 struct it87_data *data = dev_get_drvdata(dev);
1078 struct sensor_device_attribute_2 *sensor_attr =
1079 to_sensor_dev_attr_2(attr);
1080 int nr = sensor_attr->nr;
1081 int point = sensor_attr->index;
1082 long val;
1083
179c4fdb 1084 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
4f3f51bc
JD
1085 return -EINVAL;
1086
1087 mutex_lock(&data->update_lock);
1088 data->auto_temp[nr][point] = TEMP_TO_REG(val);
1089 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1090 data->auto_temp[nr][point]);
1091 mutex_unlock(&data->update_lock);
1092 return count;
1093}
1094
20ad93d4
JD
1095#define show_fan_offset(offset) \
1096static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
1097 show_fan, NULL, offset - 1); \
1098static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
1099 show_fan_min, set_fan_min, offset - 1); \
1100static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
1101 show_fan_div, set_fan_div, offset - 1);
1da177e4
LT
1102
1103show_fan_offset(1);
1104show_fan_offset(2);
1105show_fan_offset(3);
1106
1107#define show_pwm_offset(offset) \
20ad93d4
JD
1108static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
1109 show_pwm_enable, set_pwm_enable, offset - 1); \
1110static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
f8d0c19a
JD
1111 show_pwm, set_pwm, offset - 1); \
1112static DEVICE_ATTR(pwm##offset##_freq, \
1113 (offset == 1 ? S_IRUGO | S_IWUSR : S_IRUGO), \
94ac7ee6
JD
1114 show_pwm_freq, (offset == 1 ? set_pwm_freq : NULL)); \
1115static SENSOR_DEVICE_ATTR(pwm##offset##_auto_channels_temp, \
4f3f51bc
JD
1116 S_IRUGO | S_IWUSR, show_pwm_temp_map, set_pwm_temp_map, \
1117 offset - 1); \
1118static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_pwm, \
1119 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1120 offset - 1, 0); \
1121static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_pwm, \
1122 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1123 offset - 1, 1); \
1124static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_pwm, \
1125 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1126 offset - 1, 2); \
1127static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_pwm, \
1128 S_IRUGO, show_auto_pwm, NULL, offset - 1, 3); \
1129static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp, \
1130 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1131 offset - 1, 1); \
1132static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp_hyst, \
1133 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1134 offset - 1, 0); \
1135static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_temp, \
1136 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1137 offset - 1, 2); \
1138static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_temp, \
1139 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1140 offset - 1, 3); \
1141static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_temp, \
1142 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1143 offset - 1, 4);
1da177e4
LT
1144
1145show_pwm_offset(1);
1146show_pwm_offset(2);
1147show_pwm_offset(3);
1148
17d648bf
JD
1149/* A different set of callbacks for 16-bit fans */
1150static ssize_t show_fan16(struct device *dev, struct device_attribute *attr,
1151 char *buf)
1152{
1153 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1154 int nr = sensor_attr->index;
1155 struct it87_data *data = it87_update_device(dev);
1156 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan[nr]));
1157}
1158
1159static ssize_t show_fan16_min(struct device *dev, struct device_attribute *attr,
1160 char *buf)
1161{
1162 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1163 int nr = sensor_attr->index;
1164 struct it87_data *data = it87_update_device(dev);
1165 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan_min[nr]));
1166}
1167
1168static ssize_t set_fan16_min(struct device *dev, struct device_attribute *attr,
1169 const char *buf, size_t count)
1170{
1171 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1172 int nr = sensor_attr->index;
b74f3fdd 1173 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
1174 long val;
1175
179c4fdb 1176 if (kstrtol(buf, 10, &val) < 0)
f5f64501 1177 return -EINVAL;
17d648bf
JD
1178
1179 mutex_lock(&data->update_lock);
1180 data->fan_min[nr] = FAN16_TO_REG(val);
c7f1f716 1181 it87_write_value(data, IT87_REG_FAN_MIN[nr],
17d648bf 1182 data->fan_min[nr] & 0xff);
c7f1f716 1183 it87_write_value(data, IT87_REG_FANX_MIN[nr],
17d648bf
JD
1184 data->fan_min[nr] >> 8);
1185 mutex_unlock(&data->update_lock);
1186 return count;
1187}
1188
4a0d71cf
GR
1189/*
1190 * We want to use the same sysfs file names as 8-bit fans, but we need
1191 * different variable names, so we have to use SENSOR_ATTR instead of
1192 * SENSOR_DEVICE_ATTR.
1193 */
17d648bf
JD
1194#define show_fan16_offset(offset) \
1195static struct sensor_device_attribute sensor_dev_attr_fan##offset##_input16 \
1196 = SENSOR_ATTR(fan##offset##_input, S_IRUGO, \
1197 show_fan16, NULL, offset - 1); \
1198static struct sensor_device_attribute sensor_dev_attr_fan##offset##_min16 \
1199 = SENSOR_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
1200 show_fan16_min, set_fan16_min, offset - 1)
1201
1202show_fan16_offset(1);
1203show_fan16_offset(2);
1204show_fan16_offset(3);
c7f1f716
JD
1205show_fan16_offset(4);
1206show_fan16_offset(5);
17d648bf 1207
1da177e4 1208/* Alarms */
5f2dc798
JD
1209static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1210 char *buf)
1da177e4
LT
1211{
1212 struct it87_data *data = it87_update_device(dev);
68188ba7 1213 return sprintf(buf, "%u\n", data->alarms);
1da177e4 1214}
1d66c64c 1215static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1da177e4 1216
0124dd78
JD
1217static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1218 char *buf)
1219{
1220 int bitnr = to_sensor_dev_attr(attr)->index;
1221 struct it87_data *data = it87_update_device(dev);
1222 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1223}
3d30f9e6
JD
1224
1225static ssize_t clear_intrusion(struct device *dev, struct device_attribute
1226 *attr, const char *buf, size_t count)
1227{
1228 struct it87_data *data = dev_get_drvdata(dev);
1229 long val;
1230 int config;
1231
179c4fdb 1232 if (kstrtol(buf, 10, &val) < 0 || val != 0)
3d30f9e6
JD
1233 return -EINVAL;
1234
1235 mutex_lock(&data->update_lock);
1236 config = it87_read_value(data, IT87_REG_CONFIG);
1237 if (config < 0) {
1238 count = config;
1239 } else {
1240 config |= 1 << 5;
1241 it87_write_value(data, IT87_REG_CONFIG, config);
1242 /* Invalidate cache to force re-read */
1243 data->valid = 0;
1244 }
1245 mutex_unlock(&data->update_lock);
1246
1247 return count;
1248}
1249
0124dd78
JD
1250static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1251static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1252static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1253static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1254static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1255static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1256static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1257static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1258static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1259static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1260static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1261static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1262static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1263static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1264static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1265static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
3d30f9e6
JD
1266static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1267 show_alarm, clear_intrusion, 4);
0124dd78 1268
d9b327c3
JD
1269static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1270 char *buf)
1271{
1272 int bitnr = to_sensor_dev_attr(attr)->index;
1273 struct it87_data *data = it87_update_device(dev);
1274 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1275}
1276static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1277 const char *buf, size_t count)
1278{
1279 int bitnr = to_sensor_dev_attr(attr)->index;
1280 struct it87_data *data = dev_get_drvdata(dev);
1281 long val;
1282
179c4fdb 1283 if (kstrtol(buf, 10, &val) < 0
d9b327c3
JD
1284 || (val != 0 && val != 1))
1285 return -EINVAL;
1286
1287 mutex_lock(&data->update_lock);
1288 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1289 if (val)
1290 data->beeps |= (1 << bitnr);
1291 else
1292 data->beeps &= ~(1 << bitnr);
1293 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1294 mutex_unlock(&data->update_lock);
1295 return count;
1296}
1297
1298static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1299 show_beep, set_beep, 1);
1300static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1301static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1302static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1303static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1304static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1305static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1306static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1307/* fanX_beep writability is set later */
1308static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1309static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1310static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1311static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1312static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1313static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1314 show_beep, set_beep, 2);
1315static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1316static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1317
5f2dc798
JD
1318static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1319 char *buf)
1da177e4 1320{
90d6619a 1321 struct it87_data *data = dev_get_drvdata(dev);
a7be58a1 1322 return sprintf(buf, "%u\n", data->vrm);
1da177e4 1323}
5f2dc798
JD
1324static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1325 const char *buf, size_t count)
1da177e4 1326{
b74f3fdd 1327 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD
1328 unsigned long val;
1329
179c4fdb 1330 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 1331 return -EINVAL;
1da177e4 1332
1da177e4
LT
1333 data->vrm = val;
1334
1335 return count;
1336}
1337static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4 1338
5f2dc798
JD
1339static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1340 char *buf)
1da177e4
LT
1341{
1342 struct it87_data *data = it87_update_device(dev);
1343 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1344}
1345static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
87808be4 1346
738e5e05
JD
1347static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1348 char *buf)
1349{
3c4c4971 1350 static const char * const labels[] = {
738e5e05
JD
1351 "+5V",
1352 "5VSB",
1353 "Vbat",
1354 };
3c4c4971 1355 static const char * const labels_it8721[] = {
44c1bcd4
JD
1356 "+3.3V",
1357 "3VSB",
1358 "Vbat",
1359 };
1360 struct it87_data *data = dev_get_drvdata(dev);
738e5e05
JD
1361 int nr = to_sensor_dev_attr(attr)->index;
1362
16b5dda2
JD
1363 return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr]
1364 : labels[nr]);
738e5e05
JD
1365}
1366static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1367static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1368static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1369
b74f3fdd 1370static ssize_t show_name(struct device *dev, struct device_attribute
1371 *devattr, char *buf)
1372{
1373 struct it87_data *data = dev_get_drvdata(dev);
1374 return sprintf(buf, "%s\n", data->name);
1375}
1376static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1377
9172b5d1
GR
1378static struct attribute *it87_attributes_in[9][5] = {
1379{
87808be4 1380 &sensor_dev_attr_in0_input.dev_attr.attr,
87808be4 1381 &sensor_dev_attr_in0_min.dev_attr.attr,
87808be4 1382 &sensor_dev_attr_in0_max.dev_attr.attr,
0124dd78 1383 &sensor_dev_attr_in0_alarm.dev_attr.attr,
9172b5d1
GR
1384 NULL
1385}, {
1386 &sensor_dev_attr_in1_input.dev_attr.attr,
1387 &sensor_dev_attr_in1_min.dev_attr.attr,
1388 &sensor_dev_attr_in1_max.dev_attr.attr,
0124dd78 1389 &sensor_dev_attr_in1_alarm.dev_attr.attr,
9172b5d1
GR
1390 NULL
1391}, {
1392 &sensor_dev_attr_in2_input.dev_attr.attr,
1393 &sensor_dev_attr_in2_min.dev_attr.attr,
1394 &sensor_dev_attr_in2_max.dev_attr.attr,
0124dd78 1395 &sensor_dev_attr_in2_alarm.dev_attr.attr,
9172b5d1
GR
1396 NULL
1397}, {
1398 &sensor_dev_attr_in3_input.dev_attr.attr,
1399 &sensor_dev_attr_in3_min.dev_attr.attr,
1400 &sensor_dev_attr_in3_max.dev_attr.attr,
0124dd78 1401 &sensor_dev_attr_in3_alarm.dev_attr.attr,
9172b5d1
GR
1402 NULL
1403}, {
1404 &sensor_dev_attr_in4_input.dev_attr.attr,
1405 &sensor_dev_attr_in4_min.dev_attr.attr,
1406 &sensor_dev_attr_in4_max.dev_attr.attr,
0124dd78 1407 &sensor_dev_attr_in4_alarm.dev_attr.attr,
9172b5d1
GR
1408 NULL
1409}, {
1410 &sensor_dev_attr_in5_input.dev_attr.attr,
1411 &sensor_dev_attr_in5_min.dev_attr.attr,
1412 &sensor_dev_attr_in5_max.dev_attr.attr,
0124dd78 1413 &sensor_dev_attr_in5_alarm.dev_attr.attr,
9172b5d1
GR
1414 NULL
1415}, {
1416 &sensor_dev_attr_in6_input.dev_attr.attr,
1417 &sensor_dev_attr_in6_min.dev_attr.attr,
1418 &sensor_dev_attr_in6_max.dev_attr.attr,
0124dd78 1419 &sensor_dev_attr_in6_alarm.dev_attr.attr,
9172b5d1
GR
1420 NULL
1421}, {
1422 &sensor_dev_attr_in7_input.dev_attr.attr,
1423 &sensor_dev_attr_in7_min.dev_attr.attr,
1424 &sensor_dev_attr_in7_max.dev_attr.attr,
0124dd78 1425 &sensor_dev_attr_in7_alarm.dev_attr.attr,
9172b5d1
GR
1426 NULL
1427}, {
1428 &sensor_dev_attr_in8_input.dev_attr.attr,
1429 NULL
1430} };
87808be4 1431
9172b5d1
GR
1432static const struct attribute_group it87_group_in[9] = {
1433 { .attrs = it87_attributes_in[0] },
1434 { .attrs = it87_attributes_in[1] },
1435 { .attrs = it87_attributes_in[2] },
1436 { .attrs = it87_attributes_in[3] },
1437 { .attrs = it87_attributes_in[4] },
1438 { .attrs = it87_attributes_in[5] },
1439 { .attrs = it87_attributes_in[6] },
1440 { .attrs = it87_attributes_in[7] },
1441 { .attrs = it87_attributes_in[8] },
1442};
1443
4573acbc
GR
1444static struct attribute *it87_attributes_temp[3][6] = {
1445{
87808be4 1446 &sensor_dev_attr_temp1_input.dev_attr.attr,
87808be4 1447 &sensor_dev_attr_temp1_max.dev_attr.attr,
87808be4 1448 &sensor_dev_attr_temp1_min.dev_attr.attr,
87808be4 1449 &sensor_dev_attr_temp1_type.dev_attr.attr,
0124dd78 1450 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
4573acbc
GR
1451 NULL
1452} , {
1453 &sensor_dev_attr_temp2_input.dev_attr.attr,
1454 &sensor_dev_attr_temp2_max.dev_attr.attr,
1455 &sensor_dev_attr_temp2_min.dev_attr.attr,
1456 &sensor_dev_attr_temp2_type.dev_attr.attr,
0124dd78 1457 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
4573acbc
GR
1458 NULL
1459} , {
1460 &sensor_dev_attr_temp3_input.dev_attr.attr,
1461 &sensor_dev_attr_temp3_max.dev_attr.attr,
1462 &sensor_dev_attr_temp3_min.dev_attr.attr,
1463 &sensor_dev_attr_temp3_type.dev_attr.attr,
0124dd78 1464 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
4573acbc
GR
1465 NULL
1466} };
1467
1468static const struct attribute_group it87_group_temp[3] = {
1469 { .attrs = it87_attributes_temp[0] },
1470 { .attrs = it87_attributes_temp[1] },
1471 { .attrs = it87_attributes_temp[2] },
1472};
87808be4 1473
4573acbc 1474static struct attribute *it87_attributes[] = {
87808be4 1475 &dev_attr_alarms.attr,
3d30f9e6 1476 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
b74f3fdd 1477 &dev_attr_name.attr,
87808be4
JD
1478 NULL
1479};
1480
1481static const struct attribute_group it87_group = {
1482 .attrs = it87_attributes,
1483};
1484
9172b5d1 1485static struct attribute *it87_attributes_in_beep[] = {
d9b327c3
JD
1486 &sensor_dev_attr_in0_beep.dev_attr.attr,
1487 &sensor_dev_attr_in1_beep.dev_attr.attr,
1488 &sensor_dev_attr_in2_beep.dev_attr.attr,
1489 &sensor_dev_attr_in3_beep.dev_attr.attr,
1490 &sensor_dev_attr_in4_beep.dev_attr.attr,
1491 &sensor_dev_attr_in5_beep.dev_attr.attr,
1492 &sensor_dev_attr_in6_beep.dev_attr.attr,
1493 &sensor_dev_attr_in7_beep.dev_attr.attr,
9172b5d1
GR
1494 NULL
1495};
d9b327c3 1496
4573acbc 1497static struct attribute *it87_attributes_temp_beep[] = {
d9b327c3
JD
1498 &sensor_dev_attr_temp1_beep.dev_attr.attr,
1499 &sensor_dev_attr_temp2_beep.dev_attr.attr,
1500 &sensor_dev_attr_temp3_beep.dev_attr.attr,
d9b327c3
JD
1501};
1502
723a0aa0 1503static struct attribute *it87_attributes_fan16[5][3+1] = { {
87808be4
JD
1504 &sensor_dev_attr_fan1_input16.dev_attr.attr,
1505 &sensor_dev_attr_fan1_min16.dev_attr.attr,
723a0aa0
JD
1506 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1507 NULL
1508}, {
87808be4
JD
1509 &sensor_dev_attr_fan2_input16.dev_attr.attr,
1510 &sensor_dev_attr_fan2_min16.dev_attr.attr,
723a0aa0
JD
1511 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1512 NULL
1513}, {
87808be4
JD
1514 &sensor_dev_attr_fan3_input16.dev_attr.attr,
1515 &sensor_dev_attr_fan3_min16.dev_attr.attr,
723a0aa0
JD
1516 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1517 NULL
1518}, {
c7f1f716
JD
1519 &sensor_dev_attr_fan4_input16.dev_attr.attr,
1520 &sensor_dev_attr_fan4_min16.dev_attr.attr,
723a0aa0
JD
1521 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1522 NULL
1523}, {
c7f1f716
JD
1524 &sensor_dev_attr_fan5_input16.dev_attr.attr,
1525 &sensor_dev_attr_fan5_min16.dev_attr.attr,
723a0aa0
JD
1526 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1527 NULL
1528} };
1529
1530static const struct attribute_group it87_group_fan16[5] = {
1531 { .attrs = it87_attributes_fan16[0] },
1532 { .attrs = it87_attributes_fan16[1] },
1533 { .attrs = it87_attributes_fan16[2] },
1534 { .attrs = it87_attributes_fan16[3] },
1535 { .attrs = it87_attributes_fan16[4] },
1536};
87808be4 1537
723a0aa0 1538static struct attribute *it87_attributes_fan[3][4+1] = { {
87808be4
JD
1539 &sensor_dev_attr_fan1_input.dev_attr.attr,
1540 &sensor_dev_attr_fan1_min.dev_attr.attr,
1541 &sensor_dev_attr_fan1_div.dev_attr.attr,
723a0aa0
JD
1542 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1543 NULL
1544}, {
87808be4
JD
1545 &sensor_dev_attr_fan2_input.dev_attr.attr,
1546 &sensor_dev_attr_fan2_min.dev_attr.attr,
1547 &sensor_dev_attr_fan2_div.dev_attr.attr,
723a0aa0
JD
1548 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1549 NULL
1550}, {
87808be4
JD
1551 &sensor_dev_attr_fan3_input.dev_attr.attr,
1552 &sensor_dev_attr_fan3_min.dev_attr.attr,
1553 &sensor_dev_attr_fan3_div.dev_attr.attr,
0124dd78 1554 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
723a0aa0
JD
1555 NULL
1556} };
1557
1558static const struct attribute_group it87_group_fan[3] = {
1559 { .attrs = it87_attributes_fan[0] },
1560 { .attrs = it87_attributes_fan[1] },
1561 { .attrs = it87_attributes_fan[2] },
1562};
1563
1564static const struct attribute_group *
1565it87_get_fan_group(const struct it87_data *data)
1566{
1567 return has_16bit_fans(data) ? it87_group_fan16 : it87_group_fan;
1568}
0124dd78 1569
723a0aa0 1570static struct attribute *it87_attributes_pwm[3][4+1] = { {
87808be4 1571 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
87808be4 1572 &sensor_dev_attr_pwm1.dev_attr.attr,
d5b0b5d6 1573 &dev_attr_pwm1_freq.attr,
94ac7ee6 1574 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
723a0aa0
JD
1575 NULL
1576}, {
1577 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1578 &sensor_dev_attr_pwm2.dev_attr.attr,
1579 &dev_attr_pwm2_freq.attr,
94ac7ee6 1580 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
723a0aa0
JD
1581 NULL
1582}, {
1583 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1584 &sensor_dev_attr_pwm3.dev_attr.attr,
1585 &dev_attr_pwm3_freq.attr,
94ac7ee6 1586 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
723a0aa0
JD
1587 NULL
1588} };
87808be4 1589
723a0aa0
JD
1590static const struct attribute_group it87_group_pwm[3] = {
1591 { .attrs = it87_attributes_pwm[0] },
1592 { .attrs = it87_attributes_pwm[1] },
1593 { .attrs = it87_attributes_pwm[2] },
1594};
1595
4f3f51bc
JD
1596static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1597 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1598 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1599 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1600 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1601 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1602 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1603 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1604 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1605 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1606 NULL
1607}, {
1608 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1609 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1610 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1611 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1612 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1613 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1614 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1615 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1616 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1617 NULL
1618}, {
1619 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1620 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1621 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1622 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1623 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1624 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
1625 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1626 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1627 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
1628 NULL
1629} };
1630
1631static const struct attribute_group it87_group_autopwm[3] = {
1632 { .attrs = it87_attributes_autopwm[0] },
1633 { .attrs = it87_attributes_autopwm[1] },
1634 { .attrs = it87_attributes_autopwm[2] },
1635};
1636
d9b327c3
JD
1637static struct attribute *it87_attributes_fan_beep[] = {
1638 &sensor_dev_attr_fan1_beep.dev_attr.attr,
1639 &sensor_dev_attr_fan2_beep.dev_attr.attr,
1640 &sensor_dev_attr_fan3_beep.dev_attr.attr,
1641 &sensor_dev_attr_fan4_beep.dev_attr.attr,
1642 &sensor_dev_attr_fan5_beep.dev_attr.attr,
1643};
1644
6a8d7acf 1645static struct attribute *it87_attributes_vid[] = {
87808be4
JD
1646 &dev_attr_vrm.attr,
1647 &dev_attr_cpu0_vid.attr,
1648 NULL
1649};
1650
6a8d7acf
JD
1651static const struct attribute_group it87_group_vid = {
1652 .attrs = it87_attributes_vid,
87808be4 1653};
1da177e4 1654
738e5e05
JD
1655static struct attribute *it87_attributes_label[] = {
1656 &sensor_dev_attr_in3_label.dev_attr.attr,
1657 &sensor_dev_attr_in7_label.dev_attr.attr,
1658 &sensor_dev_attr_in8_label.dev_attr.attr,
1659 NULL
1660};
1661
1662static const struct attribute_group it87_group_label = {
fa8b6975 1663 .attrs = it87_attributes_label,
738e5e05
JD
1664};
1665
2d8672c5 1666/* SuperIO detection - will change isa_address if a chip is found */
b74f3fdd 1667static int __init it87_find(unsigned short *address,
1668 struct it87_sio_data *sio_data)
1da177e4 1669{
5b0380c9 1670 int err;
b74f3fdd 1671 u16 chip_type;
98dd22c3 1672 const char *board_vendor, *board_name;
1da177e4 1673
5b0380c9
NG
1674 err = superio_enter();
1675 if (err)
1676 return err;
1677
1678 err = -ENODEV;
67b671bc 1679 chip_type = force_id ? force_id : superio_inw(DEVID);
b74f3fdd 1680
1681 switch (chip_type) {
1682 case IT8705F_DEVID:
1683 sio_data->type = it87;
1684 break;
1685 case IT8712F_DEVID:
1686 sio_data->type = it8712;
1687 break;
1688 case IT8716F_DEVID:
1689 case IT8726F_DEVID:
1690 sio_data->type = it8716;
1691 break;
1692 case IT8718F_DEVID:
1693 sio_data->type = it8718;
1694 break;
b4da93e4
JMS
1695 case IT8720F_DEVID:
1696 sio_data->type = it8720;
1697 break;
44c1bcd4
JD
1698 case IT8721F_DEVID:
1699 sio_data->type = it8721;
1700 break;
16b5dda2
JD
1701 case IT8728F_DEVID:
1702 sio_data->type = it8728;
1703 break;
0531d98b
GR
1704 case IT8782F_DEVID:
1705 sio_data->type = it8782;
1706 break;
1707 case IT8783E_DEVID:
1708 sio_data->type = it8783;
1709 break;
b74f3fdd 1710 case 0xffff: /* No device at all */
1711 goto exit;
1712 default:
a8ca1037 1713 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
b74f3fdd 1714 goto exit;
1715 }
1da177e4 1716
87673dd7 1717 superio_select(PME);
1da177e4 1718 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
a8ca1037 1719 pr_info("Device not activated, skipping\n");
1da177e4
LT
1720 goto exit;
1721 }
1722
1723 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1724 if (*address == 0) {
a8ca1037 1725 pr_info("Base address not set, skipping\n");
1da177e4
LT
1726 goto exit;
1727 }
1728
1729 err = 0;
0475169c 1730 sio_data->revision = superio_inb(DEVREV) & 0x0f;
a8ca1037 1731 pr_info("Found IT%04xF chip at 0x%x, revision %d\n",
0475169c 1732 chip_type, *address, sio_data->revision);
1da177e4 1733
738e5e05
JD
1734 /* in8 (Vbat) is always internal */
1735 sio_data->internal = (1 << 2);
1736
87673dd7 1737 /* Read GPIO config and VID value from LDN 7 (GPIO) */
895ff267
JD
1738 if (sio_data->type == it87) {
1739 /* The IT8705F doesn't have VID pins at all */
1740 sio_data->skip_vid = 1;
d9b327c3
JD
1741
1742 /* The IT8705F has a different LD number for GPIO */
1743 superio_select(5);
1744 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
0531d98b
GR
1745 } else if (sio_data->type == it8783) {
1746 int reg25, reg27, reg2A, reg2C, regEF;
0531d98b
GR
1747
1748 sio_data->skip_vid = 1; /* No VID */
1749
1750 superio_select(GPIO);
1751
1752 reg25 = superio_inb(IT87_SIO_GPIO1_REG);
1753 reg27 = superio_inb(IT87_SIO_GPIO3_REG);
1754 reg2A = superio_inb(IT87_SIO_PINX1_REG);
1755 reg2C = superio_inb(IT87_SIO_PINX2_REG);
1756 regEF = superio_inb(IT87_SIO_SPI_REG);
1757
0531d98b 1758 /* Check if fan3 is there or not */
9172b5d1 1759 if ((reg27 & (1 << 0)) || !(reg2C & (1 << 2)))
0531d98b
GR
1760 sio_data->skip_fan |= (1 << 2);
1761 if ((reg25 & (1 << 4))
1762 || (!(reg2A & (1 << 1)) && (regEF & (1 << 0))))
1763 sio_data->skip_pwm |= (1 << 2);
1764
1765 /* Check if fan2 is there or not */
1766 if (reg27 & (1 << 7))
1767 sio_data->skip_fan |= (1 << 1);
1768 if (reg27 & (1 << 3))
1769 sio_data->skip_pwm |= (1 << 1);
1770
1771 /* VIN5 */
9172b5d1
GR
1772 if ((reg27 & (1 << 0)) || (reg2C & (1 << 2)))
1773 sio_data->skip_in |= (1 << 5); /* No VIN5 */
0531d98b
GR
1774
1775 /* VIN6 */
9172b5d1
GR
1776 if (reg27 & (1 << 1))
1777 sio_data->skip_in |= (1 << 6); /* No VIN6 */
0531d98b
GR
1778
1779 /*
1780 * VIN7
1781 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
1782 */
9172b5d1
GR
1783 if (reg27 & (1 << 2)) {
1784 /*
1785 * The data sheet is a bit unclear regarding the
1786 * internal voltage divider for VCCH5V. It says
1787 * "This bit enables and switches VIN7 (pin 91) to the
1788 * internal voltage divider for VCCH5V".
1789 * This is different to other chips, where the internal
1790 * voltage divider would connect VIN7 to an internal
1791 * voltage source. Maybe that is the case here as well.
1792 *
1793 * Since we don't know for sure, re-route it if that is
1794 * not the case, and ask the user to report if the
1795 * resulting voltage is sane.
1796 */
1797 if (!(reg2C & (1 << 1))) {
1798 reg2C |= (1 << 1);
1799 superio_outb(IT87_SIO_PINX2_REG, reg2C);
1800 pr_notice("Routing internal VCCH5V to in7.\n");
1801 }
1802 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
1803 pr_notice("Please report if it displays a reasonable voltage.\n");
1804 }
0531d98b
GR
1805
1806 if (reg2C & (1 << 0))
1807 sio_data->internal |= (1 << 0);
1808 if (reg2C & (1 << 1))
1809 sio_data->internal |= (1 << 1);
1810
1811 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
1812
895ff267 1813 } else {
87673dd7 1814 int reg;
9172b5d1 1815 bool uart6;
87673dd7
JD
1816
1817 superio_select(GPIO);
44c1bcd4 1818
895ff267 1819 reg = superio_inb(IT87_SIO_GPIO3_REG);
0531d98b
GR
1820 if (sio_data->type == it8721 || sio_data->type == it8728 ||
1821 sio_data->type == it8782) {
16b5dda2 1822 /*
0531d98b
GR
1823 * IT8721F/IT8758E, and IT8782F don't have VID pins
1824 * at all, not sure about the IT8728F.
16b5dda2 1825 */
895ff267 1826 sio_data->skip_vid = 1;
44c1bcd4
JD
1827 } else {
1828 /* We need at least 4 VID pins */
1829 if (reg & 0x0f) {
a8ca1037 1830 pr_info("VID is disabled (pins used for GPIO)\n");
44c1bcd4
JD
1831 sio_data->skip_vid = 1;
1832 }
895ff267
JD
1833 }
1834
591ec650
JD
1835 /* Check if fan3 is there or not */
1836 if (reg & (1 << 6))
1837 sio_data->skip_pwm |= (1 << 2);
1838 if (reg & (1 << 7))
1839 sio_data->skip_fan |= (1 << 2);
1840
1841 /* Check if fan2 is there or not */
1842 reg = superio_inb(IT87_SIO_GPIO5_REG);
1843 if (reg & (1 << 1))
1844 sio_data->skip_pwm |= (1 << 1);
1845 if (reg & (1 << 2))
1846 sio_data->skip_fan |= (1 << 1);
1847
895ff267
JD
1848 if ((sio_data->type == it8718 || sio_data->type == it8720)
1849 && !(sio_data->skip_vid))
b74f3fdd 1850 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
87673dd7
JD
1851
1852 reg = superio_inb(IT87_SIO_PINX2_REG);
9172b5d1
GR
1853
1854 uart6 = sio_data->type == it8782 && (reg & (1 << 2));
1855
436cad2a
JD
1856 /*
1857 * The IT8720F has no VIN7 pin, so VCCH should always be
1858 * routed internally to VIN7 with an internal divider.
1859 * Curiously, there still is a configuration bit to control
1860 * this, which means it can be set incorrectly. And even
1861 * more curiously, many boards out there are improperly
1862 * configured, even though the IT8720F datasheet claims
1863 * that the internal routing of VCCH to VIN7 is the default
1864 * setting. So we force the internal routing in this case.
0531d98b
GR
1865 *
1866 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
9172b5d1
GR
1867 * If UART6 is enabled, re-route VIN7 to the internal divider
1868 * if that is not already the case.
436cad2a 1869 */
9172b5d1 1870 if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) {
436cad2a
JD
1871 reg |= (1 << 1);
1872 superio_outb(IT87_SIO_PINX2_REG, reg);
a8ca1037 1873 pr_notice("Routing internal VCCH to in7\n");
436cad2a 1874 }
87673dd7 1875 if (reg & (1 << 0))
738e5e05 1876 sio_data->internal |= (1 << 0);
16b5dda2
JD
1877 if ((reg & (1 << 1)) || sio_data->type == it8721 ||
1878 sio_data->type == it8728)
738e5e05 1879 sio_data->internal |= (1 << 1);
d9b327c3 1880
9172b5d1
GR
1881 /*
1882 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
1883 * While VIN7 can be routed to the internal voltage divider,
1884 * VIN5 and VIN6 are not available if UART6 is enabled.
4573acbc
GR
1885 *
1886 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
1887 * is the temperature source. Since we can not read the
1888 * temperature source here, skip_temp is preliminary.
9172b5d1 1889 */
4573acbc 1890 if (uart6) {
9172b5d1 1891 sio_data->skip_in |= (1 << 5) | (1 << 6);
4573acbc
GR
1892 sio_data->skip_temp |= (1 << 2);
1893 }
9172b5d1 1894
d9b327c3 1895 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
87673dd7 1896 }
d9b327c3 1897 if (sio_data->beep_pin)
a8ca1037 1898 pr_info("Beeping is supported\n");
87673dd7 1899
98dd22c3
JD
1900 /* Disable specific features based on DMI strings */
1901 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
1902 board_name = dmi_get_system_info(DMI_BOARD_NAME);
1903 if (board_vendor && board_name) {
1904 if (strcmp(board_vendor, "nVIDIA") == 0
1905 && strcmp(board_name, "FN68PT") == 0) {
4a0d71cf
GR
1906 /*
1907 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
1908 * connected to a fan, but to something else. One user
1909 * has reported instant system power-off when changing
1910 * the PWM2 duty cycle, so we disable it.
1911 * I use the board name string as the trigger in case
1912 * the same board is ever used in other systems.
1913 */
a8ca1037 1914 pr_info("Disabling pwm2 due to hardware constraints\n");
98dd22c3
JD
1915 sio_data->skip_pwm = (1 << 1);
1916 }
1917 }
1918
1da177e4
LT
1919exit:
1920 superio_exit();
1921 return err;
1922}
1923
723a0aa0
JD
1924static void it87_remove_files(struct device *dev)
1925{
1926 struct it87_data *data = platform_get_drvdata(pdev);
1927 struct it87_sio_data *sio_data = dev->platform_data;
1928 const struct attribute_group *fan_group = it87_get_fan_group(data);
1929 int i;
1930
1931 sysfs_remove_group(&dev->kobj, &it87_group);
9172b5d1
GR
1932 for (i = 0; i < 9; i++) {
1933 if (sio_data->skip_in & (1 << i))
1934 continue;
1935 sysfs_remove_group(&dev->kobj, &it87_group_in[i]);
1936 if (it87_attributes_in_beep[i])
1937 sysfs_remove_file(&dev->kobj,
1938 it87_attributes_in_beep[i]);
1939 }
4573acbc
GR
1940 for (i = 0; i < 3; i++) {
1941 if (!(data->has_temp & (1 << i)))
1942 continue;
1943 sysfs_remove_group(&dev->kobj, &it87_group_temp[i]);
1944 if (sio_data->beep_pin)
1945 sysfs_remove_file(&dev->kobj,
1946 it87_attributes_temp_beep[i]);
1947 }
723a0aa0
JD
1948 for (i = 0; i < 5; i++) {
1949 if (!(data->has_fan & (1 << i)))
1950 continue;
1951 sysfs_remove_group(&dev->kobj, &fan_group[i]);
d9b327c3
JD
1952 if (sio_data->beep_pin)
1953 sysfs_remove_file(&dev->kobj,
1954 it87_attributes_fan_beep[i]);
723a0aa0
JD
1955 }
1956 for (i = 0; i < 3; i++) {
1957 if (sio_data->skip_pwm & (1 << 0))
1958 continue;
1959 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
4f3f51bc
JD
1960 if (has_old_autopwm(data))
1961 sysfs_remove_group(&dev->kobj,
1962 &it87_group_autopwm[i]);
723a0aa0 1963 }
6a8d7acf
JD
1964 if (!sio_data->skip_vid)
1965 sysfs_remove_group(&dev->kobj, &it87_group_vid);
738e5e05 1966 sysfs_remove_group(&dev->kobj, &it87_group_label);
723a0aa0
JD
1967}
1968
b74f3fdd 1969static int __devinit it87_probe(struct platform_device *pdev)
1da177e4 1970{
1da177e4 1971 struct it87_data *data;
b74f3fdd 1972 struct resource *res;
1973 struct device *dev = &pdev->dev;
1974 struct it87_sio_data *sio_data = dev->platform_data;
723a0aa0
JD
1975 const struct attribute_group *fan_group;
1976 int err = 0, i;
1da177e4 1977 int enable_pwm_interface;
d9b327c3 1978 int fan_beep_need_rw;
3c4c4971 1979 static const char * const names[] = {
b74f3fdd 1980 "it87",
1981 "it8712",
1982 "it8716",
1983 "it8718",
b4da93e4 1984 "it8720",
44c1bcd4 1985 "it8721",
16b5dda2 1986 "it8728",
0531d98b
GR
1987 "it8782",
1988 "it8783",
b74f3fdd 1989 };
1990
1991 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
62a1d05f
GR
1992 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
1993 DRVNAME)) {
b74f3fdd 1994 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1995 (unsigned long)res->start,
87b4b663 1996 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
62a1d05f 1997 return -EBUSY;
8e9afcbb 1998 }
1da177e4 1999
62a1d05f
GR
2000 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
2001 if (!data)
2002 return -ENOMEM;
1da177e4 2003
b74f3fdd 2004 data->addr = res->start;
2005 data->type = sio_data->type;
0475169c 2006 data->revision = sio_data->revision;
b74f3fdd 2007 data->name = names[sio_data->type];
1da177e4
LT
2008
2009 /* Now, we do the remaining detection. */
b74f3fdd 2010 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
62a1d05f
GR
2011 || it87_read_value(data, IT87_REG_CHIPID) != 0x90)
2012 return -ENODEV;
1da177e4 2013
b74f3fdd 2014 platform_set_drvdata(pdev, data);
1da177e4 2015
9a61bf63 2016 mutex_init(&data->update_lock);
1da177e4 2017
1da177e4 2018 /* Check PWM configuration */
b74f3fdd 2019 enable_pwm_interface = it87_check_pwm(dev);
1da177e4 2020
44c1bcd4 2021 /* Starting with IT8721F, we handle scaling of internal voltages */
16b5dda2 2022 if (has_12mv_adc(data)) {
44c1bcd4
JD
2023 if (sio_data->internal & (1 << 0))
2024 data->in_scaled |= (1 << 3); /* in3 is AVCC */
2025 if (sio_data->internal & (1 << 1))
2026 data->in_scaled |= (1 << 7); /* in7 is VSB */
2027 if (sio_data->internal & (1 << 2))
2028 data->in_scaled |= (1 << 8); /* in8 is Vbat */
0531d98b
GR
2029 } else if (sio_data->type == it8782 || sio_data->type == it8783) {
2030 if (sio_data->internal & (1 << 0))
2031 data->in_scaled |= (1 << 3); /* in3 is VCC5V */
2032 if (sio_data->internal & (1 << 1))
2033 data->in_scaled |= (1 << 7); /* in7 is VCCH5V */
44c1bcd4
JD
2034 }
2035
4573acbc
GR
2036 data->has_temp = 0x07;
2037 if (sio_data->skip_temp & (1 << 2)) {
2038 if (sio_data->type == it8782
2039 && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
2040 data->has_temp &= ~(1 << 2);
2041 }
2042
1da177e4 2043 /* Initialize the IT87 chip */
b74f3fdd 2044 it87_init_device(pdev);
1da177e4
LT
2045
2046 /* Register sysfs hooks */
5f2dc798
JD
2047 err = sysfs_create_group(&dev->kobj, &it87_group);
2048 if (err)
62a1d05f 2049 return err;
17d648bf 2050
9172b5d1
GR
2051 for (i = 0; i < 9; i++) {
2052 if (sio_data->skip_in & (1 << i))
2053 continue;
2054 err = sysfs_create_group(&dev->kobj, &it87_group_in[i]);
2055 if (err)
62a1d05f 2056 goto error;
9172b5d1
GR
2057 if (sio_data->beep_pin && it87_attributes_in_beep[i]) {
2058 err = sysfs_create_file(&dev->kobj,
2059 it87_attributes_in_beep[i]);
2060 if (err)
62a1d05f 2061 goto error;
9172b5d1
GR
2062 }
2063 }
2064
4573acbc
GR
2065 for (i = 0; i < 3; i++) {
2066 if (!(data->has_temp & (1 << i)))
2067 continue;
2068 err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]);
d9b327c3 2069 if (err)
62a1d05f 2070 goto error;
4573acbc
GR
2071 if (sio_data->beep_pin) {
2072 err = sysfs_create_file(&dev->kobj,
2073 it87_attributes_temp_beep[i]);
2074 if (err)
2075 goto error;
2076 }
d9b327c3
JD
2077 }
2078
9060f8bd 2079 /* Do not create fan files for disabled fans */
723a0aa0 2080 fan_group = it87_get_fan_group(data);
d9b327c3 2081 fan_beep_need_rw = 1;
723a0aa0
JD
2082 for (i = 0; i < 5; i++) {
2083 if (!(data->has_fan & (1 << i)))
2084 continue;
2085 err = sysfs_create_group(&dev->kobj, &fan_group[i]);
2086 if (err)
62a1d05f 2087 goto error;
d9b327c3
JD
2088
2089 if (sio_data->beep_pin) {
2090 err = sysfs_create_file(&dev->kobj,
2091 it87_attributes_fan_beep[i]);
2092 if (err)
62a1d05f 2093 goto error;
d9b327c3
JD
2094 if (!fan_beep_need_rw)
2095 continue;
2096
4a0d71cf
GR
2097 /*
2098 * As we have a single beep enable bit for all fans,
d9b327c3 2099 * only the first enabled fan has a writable attribute
4a0d71cf
GR
2100 * for it.
2101 */
d9b327c3
JD
2102 if (sysfs_chmod_file(&dev->kobj,
2103 it87_attributes_fan_beep[i],
2104 S_IRUGO | S_IWUSR))
2105 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
2106 i + 1);
2107 fan_beep_need_rw = 0;
2108 }
17d648bf
JD
2109 }
2110
1da177e4 2111 if (enable_pwm_interface) {
723a0aa0
JD
2112 for (i = 0; i < 3; i++) {
2113 if (sio_data->skip_pwm & (1 << i))
2114 continue;
2115 err = sysfs_create_group(&dev->kobj,
2116 &it87_group_pwm[i]);
2117 if (err)
62a1d05f 2118 goto error;
4f3f51bc
JD
2119
2120 if (!has_old_autopwm(data))
2121 continue;
2122 err = sysfs_create_group(&dev->kobj,
2123 &it87_group_autopwm[i]);
2124 if (err)
62a1d05f 2125 goto error;
98dd22c3 2126 }
1da177e4
LT
2127 }
2128
895ff267 2129 if (!sio_data->skip_vid) {
303760b4 2130 data->vrm = vid_which_vrm();
87673dd7 2131 /* VID reading from Super-I/O config space if available */
b74f3fdd 2132 data->vid = sio_data->vid_value;
6a8d7acf
JD
2133 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
2134 if (err)
62a1d05f 2135 goto error;
87808be4
JD
2136 }
2137
738e5e05
JD
2138 /* Export labels for internal sensors */
2139 for (i = 0; i < 3; i++) {
2140 if (!(sio_data->internal & (1 << i)))
2141 continue;
2142 err = sysfs_create_file(&dev->kobj,
2143 it87_attributes_label[i]);
2144 if (err)
62a1d05f 2145 goto error;
738e5e05
JD
2146 }
2147
1beeffe4
TJ
2148 data->hwmon_dev = hwmon_device_register(dev);
2149 if (IS_ERR(data->hwmon_dev)) {
2150 err = PTR_ERR(data->hwmon_dev);
62a1d05f 2151 goto error;
1da177e4
LT
2152 }
2153
2154 return 0;
2155
62a1d05f 2156error:
723a0aa0 2157 it87_remove_files(dev);
1da177e4
LT
2158 return err;
2159}
2160
b74f3fdd 2161static int __devexit it87_remove(struct platform_device *pdev)
1da177e4 2162{
b74f3fdd 2163 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2164
1beeffe4 2165 hwmon_device_unregister(data->hwmon_dev);
723a0aa0 2166 it87_remove_files(&pdev->dev);
943b0830 2167
1da177e4
LT
2168 return 0;
2169}
2170
4a0d71cf
GR
2171/*
2172 * Must be called with data->update_lock held, except during initialization.
2173 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2174 * would slow down the IT87 access and should not be necessary.
2175 */
b74f3fdd 2176static int it87_read_value(struct it87_data *data, u8 reg)
1da177e4 2177{
b74f3fdd 2178 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2179 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT
2180}
2181
4a0d71cf
GR
2182/*
2183 * Must be called with data->update_lock held, except during initialization.
2184 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2185 * would slow down the IT87 access and should not be necessary.
2186 */
b74f3fdd 2187static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
1da177e4 2188{
b74f3fdd 2189 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2190 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT
2191}
2192
2193/* Return 1 if and only if the PWM interface is safe to use */
b74f3fdd 2194static int __devinit it87_check_pwm(struct device *dev)
1da177e4 2195{
b74f3fdd 2196 struct it87_data *data = dev_get_drvdata(dev);
4a0d71cf
GR
2197 /*
2198 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
1da177e4 2199 * and polarity set to active low is sign that this is the case so we
4a0d71cf
GR
2200 * disable pwm control to protect the user.
2201 */
b74f3fdd 2202 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1da177e4
LT
2203 if ((tmp & 0x87) == 0) {
2204 if (fix_pwm_polarity) {
4a0d71cf
GR
2205 /*
2206 * The user asks us to attempt a chip reconfiguration.
1da177e4 2207 * This means switching to active high polarity and
4a0d71cf
GR
2208 * inverting all fan speed values.
2209 */
1da177e4
LT
2210 int i;
2211 u8 pwm[3];
2212
2213 for (i = 0; i < 3; i++)
b74f3fdd 2214 pwm[i] = it87_read_value(data,
1da177e4
LT
2215 IT87_REG_PWM(i));
2216
4a0d71cf
GR
2217 /*
2218 * If any fan is in automatic pwm mode, the polarity
1da177e4
LT
2219 * might be correct, as suspicious as it seems, so we
2220 * better don't change anything (but still disable the
4a0d71cf
GR
2221 * PWM interface).
2222 */
1da177e4 2223 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
b74f3fdd 2224 dev_info(dev, "Reconfiguring PWM to "
1da177e4 2225 "active high polarity\n");
b74f3fdd 2226 it87_write_value(data, IT87_REG_FAN_CTL,
1da177e4
LT
2227 tmp | 0x87);
2228 for (i = 0; i < 3; i++)
b74f3fdd 2229 it87_write_value(data,
1da177e4
LT
2230 IT87_REG_PWM(i),
2231 0x7f & ~pwm[i]);
2232 return 1;
2233 }
2234
b74f3fdd 2235 dev_info(dev, "PWM configuration is "
1da177e4
LT
2236 "too broken to be fixed\n");
2237 }
2238
b74f3fdd 2239 dev_info(dev, "Detected broken BIOS "
1da177e4
LT
2240 "defaults, disabling PWM interface\n");
2241 return 0;
2242 } else if (fix_pwm_polarity) {
b74f3fdd 2243 dev_info(dev, "PWM configuration looks "
1da177e4
LT
2244 "sane, won't touch\n");
2245 }
2246
2247 return 1;
2248}
2249
2250/* Called when we have found a new IT87. */
b74f3fdd 2251static void __devinit it87_init_device(struct platform_device *pdev)
1da177e4 2252{
591ec650 2253 struct it87_sio_data *sio_data = pdev->dev.platform_data;
b74f3fdd 2254 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2255 int tmp, i;
591ec650 2256 u8 mask;
1da177e4 2257
4a0d71cf
GR
2258 /*
2259 * For each PWM channel:
b99883dc
JD
2260 * - If it is in automatic mode, setting to manual mode should set
2261 * the fan to full speed by default.
2262 * - If it is in manual mode, we need a mapping to temperature
2263 * channels to use when later setting to automatic mode later.
2264 * Use a 1:1 mapping by default (we are clueless.)
2265 * In both cases, the value can (and should) be changed by the user
6229cdb2
JD
2266 * prior to switching to a different mode.
2267 * Note that this is no longer needed for the IT8721F and later, as
2268 * these have separate registers for the temperature mapping and the
4a0d71cf
GR
2269 * manual duty cycle.
2270 */
1da177e4 2271 for (i = 0; i < 3; i++) {
b99883dc
JD
2272 data->pwm_temp_map[i] = i;
2273 data->pwm_duty[i] = 0x7f; /* Full speed */
4f3f51bc 2274 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
1da177e4
LT
2275 }
2276
4a0d71cf
GR
2277 /*
2278 * Some chips seem to have default value 0xff for all limit
c5df9b7a
JD
2279 * registers. For low voltage limits it makes no sense and triggers
2280 * alarms, so change to 0 instead. For high temperature limits, it
2281 * means -1 degree C, which surprisingly doesn't trigger an alarm,
4a0d71cf
GR
2282 * but is still confusing, so change to 127 degrees C.
2283 */
c5df9b7a 2284 for (i = 0; i < 8; i++) {
b74f3fdd 2285 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
c5df9b7a 2286 if (tmp == 0xff)
b74f3fdd 2287 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
c5df9b7a
JD
2288 }
2289 for (i = 0; i < 3; i++) {
b74f3fdd 2290 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
c5df9b7a 2291 if (tmp == 0xff)
b74f3fdd 2292 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
c5df9b7a
JD
2293 }
2294
4a0d71cf
GR
2295 /*
2296 * Temperature channels are not forcibly enabled, as they can be
a00afb97
JD
2297 * set to two different sensor types and we can't guess which one
2298 * is correct for a given system. These channels can be enabled at
4a0d71cf
GR
2299 * run-time through the temp{1-3}_type sysfs accessors if needed.
2300 */
1da177e4
LT
2301
2302 /* Check if voltage monitors are reset manually or by some reason */
b74f3fdd 2303 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
1da177e4
LT
2304 if ((tmp & 0xff) == 0) {
2305 /* Enable all voltage monitors */
b74f3fdd 2306 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
1da177e4
LT
2307 }
2308
2309 /* Check if tachometers are reset manually or by some reason */
591ec650 2310 mask = 0x70 & ~(sio_data->skip_fan << 4);
b74f3fdd 2311 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
591ec650 2312 if ((data->fan_main_ctrl & mask) == 0) {
1da177e4 2313 /* Enable all fan tachometers */
591ec650 2314 data->fan_main_ctrl |= mask;
5f2dc798
JD
2315 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2316 data->fan_main_ctrl);
1da177e4 2317 }
9060f8bd 2318 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
1da177e4 2319
17d648bf 2320 /* Set tachometers to 16-bit mode if needed */
0475169c 2321 if (has_16bit_fans(data)) {
b74f3fdd 2322 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
9060f8bd 2323 if (~tmp & 0x07 & data->has_fan) {
b74f3fdd 2324 dev_dbg(&pdev->dev,
17d648bf 2325 "Setting fan1-3 to 16-bit mode\n");
b74f3fdd 2326 it87_write_value(data, IT87_REG_FAN_16BIT,
17d648bf
JD
2327 tmp | 0x07);
2328 }
0531d98b
GR
2329 /* IT8705F, IT8782F, and IT8783E/F only support three fans. */
2330 if (data->type != it87 && data->type != it8782 &&
2331 data->type != it8783) {
816d8c6a
AP
2332 if (tmp & (1 << 4))
2333 data->has_fan |= (1 << 3); /* fan4 enabled */
2334 if (tmp & (1 << 5))
2335 data->has_fan |= (1 << 4); /* fan5 enabled */
2336 }
17d648bf
JD
2337 }
2338
591ec650
JD
2339 /* Fan input pins may be used for alternative functions */
2340 data->has_fan &= ~sio_data->skip_fan;
2341
1da177e4 2342 /* Start monitoring */
b74f3fdd 2343 it87_write_value(data, IT87_REG_CONFIG,
41002f8d 2344 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
1da177e4
LT
2345 | (update_vbat ? 0x41 : 0x01));
2346}
2347
b99883dc
JD
2348static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
2349{
2350 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
16b5dda2 2351 if (has_newer_autopwm(data)) {
b99883dc 2352 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
6229cdb2
JD
2353 data->pwm_duty[nr] = it87_read_value(data,
2354 IT87_REG_PWM_DUTY(nr));
2355 } else {
2356 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
2357 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2358 else /* Manual mode */
2359 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
2360 }
4f3f51bc
JD
2361
2362 if (has_old_autopwm(data)) {
2363 int i;
2364
2365 for (i = 0; i < 5 ; i++)
2366 data->auto_temp[nr][i] = it87_read_value(data,
2367 IT87_REG_AUTO_TEMP(nr, i));
2368 for (i = 0; i < 3 ; i++)
2369 data->auto_pwm[nr][i] = it87_read_value(data,
2370 IT87_REG_AUTO_PWM(nr, i));
2371 }
b99883dc
JD
2372}
2373
1da177e4
LT
2374static struct it87_data *it87_update_device(struct device *dev)
2375{
b74f3fdd 2376 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT
2377 int i;
2378
9a61bf63 2379 mutex_lock(&data->update_lock);
1da177e4
LT
2380
2381 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
2382 || !data->valid) {
1da177e4 2383 if (update_vbat) {
4a0d71cf
GR
2384 /*
2385 * Cleared after each update, so reenable. Value
2386 * returned by this read will be previous value
2387 */
b74f3fdd 2388 it87_write_value(data, IT87_REG_CONFIG,
5f2dc798 2389 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1da177e4
LT
2390 }
2391 for (i = 0; i <= 7; i++) {
2392 data->in[i] =
5f2dc798 2393 it87_read_value(data, IT87_REG_VIN(i));
1da177e4 2394 data->in_min[i] =
5f2dc798 2395 it87_read_value(data, IT87_REG_VIN_MIN(i));
1da177e4 2396 data->in_max[i] =
5f2dc798 2397 it87_read_value(data, IT87_REG_VIN_MAX(i));
1da177e4 2398 }
3543a53f 2399 /* in8 (battery) has no limit registers */
5f2dc798 2400 data->in[8] = it87_read_value(data, IT87_REG_VIN(8));
1da177e4 2401
c7f1f716 2402 for (i = 0; i < 5; i++) {
9060f8bd
JD
2403 /* Skip disabled fans */
2404 if (!(data->has_fan & (1 << i)))
2405 continue;
2406
1da177e4 2407 data->fan_min[i] =
5f2dc798 2408 it87_read_value(data, IT87_REG_FAN_MIN[i]);
b74f3fdd 2409 data->fan[i] = it87_read_value(data,
c7f1f716 2410 IT87_REG_FAN[i]);
17d648bf 2411 /* Add high byte if in 16-bit mode */
0475169c 2412 if (has_16bit_fans(data)) {
b74f3fdd 2413 data->fan[i] |= it87_read_value(data,
c7f1f716 2414 IT87_REG_FANX[i]) << 8;
b74f3fdd 2415 data->fan_min[i] |= it87_read_value(data,
c7f1f716 2416 IT87_REG_FANX_MIN[i]) << 8;
17d648bf 2417 }
1da177e4
LT
2418 }
2419 for (i = 0; i < 3; i++) {
4573acbc
GR
2420 if (!(data->has_temp & (1 << i)))
2421 continue;
1da177e4 2422 data->temp[i] =
5f2dc798 2423 it87_read_value(data, IT87_REG_TEMP(i));
1da177e4 2424 data->temp_high[i] =
5f2dc798 2425 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
1da177e4 2426 data->temp_low[i] =
5f2dc798 2427 it87_read_value(data, IT87_REG_TEMP_LOW(i));
1da177e4
LT
2428 }
2429
17d648bf 2430 /* Newer chips don't have clock dividers */
0475169c 2431 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
b74f3fdd 2432 i = it87_read_value(data, IT87_REG_FAN_DIV);
17d648bf
JD
2433 data->fan_div[0] = i & 0x07;
2434 data->fan_div[1] = (i >> 3) & 0x07;
2435 data->fan_div[2] = (i & 0x40) ? 3 : 1;
2436 }
1da177e4
LT
2437
2438 data->alarms =
b74f3fdd 2439 it87_read_value(data, IT87_REG_ALARM1) |
2440 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
2441 (it87_read_value(data, IT87_REG_ALARM3) << 16);
d9b327c3 2442 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
b99883dc 2443
b74f3fdd 2444 data->fan_main_ctrl = it87_read_value(data,
2445 IT87_REG_FAN_MAIN_CTRL);
2446 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
b99883dc
JD
2447 for (i = 0; i < 3; i++)
2448 it87_update_pwm_ctrl(data, i);
b74f3fdd 2449
2450 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
4a0d71cf
GR
2451 /*
2452 * The IT8705F does not have VID capability.
2453 * The IT8718F and later don't use IT87_REG_VID for the
2454 * same purpose.
2455 */
17d648bf 2456 if (data->type == it8712 || data->type == it8716) {
b74f3fdd 2457 data->vid = it87_read_value(data, IT87_REG_VID);
4a0d71cf
GR
2458 /*
2459 * The older IT8712F revisions had only 5 VID pins,
2460 * but we assume it is always safe to read 6 bits.
2461 */
17d648bf 2462 data->vid &= 0x3f;
1da177e4
LT
2463 }
2464 data->last_updated = jiffies;
2465 data->valid = 1;
2466 }
2467
9a61bf63 2468 mutex_unlock(&data->update_lock);
1da177e4
LT
2469
2470 return data;
2471}
2472
b74f3fdd 2473static int __init it87_device_add(unsigned short address,
2474 const struct it87_sio_data *sio_data)
2475{
2476 struct resource res = {
87b4b663
BH
2477 .start = address + IT87_EC_OFFSET,
2478 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
b74f3fdd 2479 .name = DRVNAME,
2480 .flags = IORESOURCE_IO,
2481 };
2482 int err;
2483
b9acb64a
JD
2484 err = acpi_check_resource_conflict(&res);
2485 if (err)
2486 goto exit;
2487
b74f3fdd 2488 pdev = platform_device_alloc(DRVNAME, address);
2489 if (!pdev) {
2490 err = -ENOMEM;
a8ca1037 2491 pr_err("Device allocation failed\n");
b74f3fdd 2492 goto exit;
2493 }
2494
2495 err = platform_device_add_resources(pdev, &res, 1);
2496 if (err) {
a8ca1037 2497 pr_err("Device resource addition failed (%d)\n", err);
b74f3fdd 2498 goto exit_device_put;
2499 }
2500
2501 err = platform_device_add_data(pdev, sio_data,
2502 sizeof(struct it87_sio_data));
2503 if (err) {
a8ca1037 2504 pr_err("Platform data allocation failed\n");
b74f3fdd 2505 goto exit_device_put;
2506 }
2507
2508 err = platform_device_add(pdev);
2509 if (err) {
a8ca1037 2510 pr_err("Device addition failed (%d)\n", err);
b74f3fdd 2511 goto exit_device_put;
2512 }
2513
2514 return 0;
2515
2516exit_device_put:
2517 platform_device_put(pdev);
2518exit:
2519 return err;
2520}
2521
1da177e4
LT
2522static int __init sm_it87_init(void)
2523{
b74f3fdd 2524 int err;
5f2dc798 2525 unsigned short isa_address = 0;
b74f3fdd 2526 struct it87_sio_data sio_data;
2527
98dd22c3 2528 memset(&sio_data, 0, sizeof(struct it87_sio_data));
b74f3fdd 2529 err = it87_find(&isa_address, &sio_data);
2530 if (err)
2531 return err;
2532 err = platform_driver_register(&it87_driver);
2533 if (err)
2534 return err;
fde09509 2535
b74f3fdd 2536 err = it87_device_add(isa_address, &sio_data);
5f2dc798 2537 if (err) {
b74f3fdd 2538 platform_driver_unregister(&it87_driver);
2539 return err;
2540 }
2541
2542 return 0;
1da177e4
LT
2543}
2544
2545static void __exit sm_it87_exit(void)
2546{
b74f3fdd 2547 platform_device_unregister(pdev);
2548 platform_driver_unregister(&it87_driver);
1da177e4
LT
2549}
2550
2551
f1d8e332 2552MODULE_AUTHOR("Chris Gauthron, "
b19367c6 2553 "Jean Delvare <khali@linux-fr.org>");
44c1bcd4 2554MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
1da177e4
LT
2555module_param(update_vbat, bool, 0);
2556MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2557module_param(fix_pwm_polarity, bool, 0);
5f2dc798
JD
2558MODULE_PARM_DESC(fix_pwm_polarity,
2559 "Force PWM polarity to active high (DANGEROUS)");
1da177e4
LT
2560MODULE_LICENSE("GPL");
2561
2562module_init(sm_it87_init);
2563module_exit(sm_it87_exit);