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hwmon: (it87) Avoid quoted string splits across lines
[linux-2.6-block.git] / drivers / hwmon / it87.c
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1da177e4 1/*
5f2dc798
JD		 2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring.
4 *
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
8 * Fan Controller)
9 *
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
12 *
13 * Supports: IT8705F Super I/O chip w/LPC interface
14 * IT8712F Super I/O chip w/LPC interface
15 * IT8716F Super I/O chip w/LPC interface
16 * IT8718F Super I/O chip w/LPC interface
17 * IT8720F Super I/O chip w/LPC interface
44c1bcd4 18 * IT8721F Super I/O chip w/LPC interface
5f2dc798 19 * IT8726F Super I/O chip w/LPC interface
16b5dda2 20 * IT8728F Super I/O chip w/LPC interface
44c1bcd4 21 * IT8758E Super I/O chip w/LPC interface
0531d98b
GR		 22 * IT8782F Super I/O chip w/LPC interface
23 * IT8783E/F Super I/O chip w/LPC interface
5f2dc798
JD		 24 * Sis950 A clone of the IT8705F
25 *
26 * Copyright (C) 2001 Chris Gauthron
27 * Copyright (C) 2005-2010 Jean Delvare <khali@linux-fr.org>
28 *
29 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License as published by
31 * the Free Software Foundation; either version 2 of the License, or
32 * (at your option) any later version.
33 *
34 * This program is distributed in the hope that it will be useful,
35 * but WITHOUT ANY WARRANTY; without even the implied warranty of
36 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
37 * GNU General Public License for more details.
38 *
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
42 */
1da177e4 43
a8ca1037
JP		 44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
1da177e4
LT		 46#include <linux/module.h>
47#include <linux/init.h>
48#include <linux/slab.h>
49#include <linux/jiffies.h>
b74f3fdd 50#include <linux/platform_device.h>
943b0830 51#include <linux/hwmon.h>
303760b4
JD		 52#include <linux/hwmon-sysfs.h>
53#include <linux/hwmon-vid.h>
943b0830 54#include <linux/err.h>
9a61bf63 55#include <linux/mutex.h>
87808be4 56#include <linux/sysfs.h>
98dd22c3
JD		 57#include <linux/string.h>
58#include <linux/dmi.h>
b9acb64a 59#include <linux/acpi.h>
6055fae8 60#include <linux/io.h>
1da177e4 61
b74f3fdd 62#define DRVNAME "it87"
1da177e4 63
0531d98b
GR		 64enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8782,
65 it8783 };
1da177e4 66
67b671bc
JD		 67static unsigned short force_id;
68module_param(force_id, ushort, 0);
69MODULE_PARM_DESC(force_id, "Override the detected device ID");
70
b74f3fdd 71static struct platform_device *pdev;
72
1da177e4
LT		 73#define REG 0x2e /* The register to read/write */
74#define DEV 0x07 /* Register: Logical device select */
75#define VAL 0x2f /* The value to read/write */
76#define PME 0x04 /* The device with the fan registers in it */
b4da93e4
JMS		 77
78/* The device with the IT8718F/IT8720F VID value in it */
79#define GPIO 0x07
80
1da177e4
LT		 81#define DEVID 0x20 /* Register: Device ID */
82#define DEVREV 0x22 /* Register: Device Revision */
83
5b0380c9 84static inline int superio_inb(int reg)
1da177e4
LT		 85{
86 outb(reg, REG);
87 return inb(VAL);
88}
89
5b0380c9 90static inline void superio_outb(int reg, int val)
436cad2a
JD		 91{
92 outb(reg, REG);
93 outb(val, VAL);
94}
95
1da177e4
LT		 96static int superio_inw(int reg)
97{
98 int val;
99 outb(reg++, REG);
100 val = inb(VAL) << 8;
101 outb(reg, REG);
102 val |= inb(VAL);
103 return val;
104}
105
5b0380c9 106static inline void superio_select(int ldn)
1da177e4
LT		 107{
108 outb(DEV, REG);
87673dd7 109 outb(ldn, VAL);
1da177e4
LT		 110}
111
5b0380c9 112static inline int superio_enter(void)
1da177e4 113{
5b0380c9
NG		 114 /*
115 * Try to reserve REG and REG + 1 for exclusive access.
116 */
117 if (!request_muxed_region(REG, 2, DRVNAME))
118 return -EBUSY;
119
1da177e4
LT		 120 outb(0x87, REG);
121 outb(0x01, REG);
122 outb(0x55, REG);
123 outb(0x55, REG);
5b0380c9 124 return 0;
1da177e4
LT		 125}
126
5b0380c9 127static inline void superio_exit(void)
1da177e4
LT		 128{
129 outb(0x02, REG);
130 outb(0x02, VAL);
5b0380c9 131 release_region(REG, 2);
1da177e4
LT		 132}
133
87673dd7 134/* Logical device 4 registers */
1da177e4
LT		 135#define IT8712F_DEVID 0x8712
136#define IT8705F_DEVID 0x8705
17d648bf 137#define IT8716F_DEVID 0x8716
87673dd7 138#define IT8718F_DEVID 0x8718
b4da93e4 139#define IT8720F_DEVID 0x8720
44c1bcd4 140#define IT8721F_DEVID 0x8721
08a8f6e9 141#define IT8726F_DEVID 0x8726
16b5dda2 142#define IT8728F_DEVID 0x8728
0531d98b
GR		 143#define IT8782F_DEVID 0x8782
144#define IT8783E_DEVID 0x8783
1da177e4
LT		 145#define IT87_ACT_REG 0x30
146#define IT87_BASE_REG 0x60
147
87673dd7 148/* Logical device 7 registers (IT8712F and later) */
0531d98b 149#define IT87_SIO_GPIO1_REG 0x25
895ff267 150#define IT87_SIO_GPIO3_REG 0x27
591ec650 151#define IT87_SIO_GPIO5_REG 0x29
0531d98b 152#define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
87673dd7 153#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
0531d98b 154#define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
87673dd7 155#define IT87_SIO_VID_REG 0xfc /* VID value */
d9b327c3 156#define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
87673dd7 157
1da177e4 158/* Update battery voltage after every reading if true */
90ab5ee9 159static bool update_vbat;
1da177e4
LT		 160
161/* Not all BIOSes properly configure the PWM registers */
90ab5ee9 162static bool fix_pwm_polarity;
1da177e4 163
1da177e4
LT		 164/* Many IT87 constants specified below */
165
166/* Length of ISA address segment */
167#define IT87_EXTENT 8
168
87b4b663
BH		 169/* Length of ISA address segment for Environmental Controller */
170#define IT87_EC_EXTENT 2
171
172/* Offset of EC registers from ISA base address */
173#define IT87_EC_OFFSET 5
174
175/* Where are the ISA address/data registers relative to the EC base address */
176#define IT87_ADDR_REG_OFFSET 0
177#define IT87_DATA_REG_OFFSET 1
1da177e4
LT		 178
179/*----- The IT87 registers -----*/
180
181#define IT87_REG_CONFIG 0x00
182
183#define IT87_REG_ALARM1 0x01
184#define IT87_REG_ALARM2 0x02
185#define IT87_REG_ALARM3 0x03
186
4a0d71cf
GR		 187/*
188 * The IT8718F and IT8720F have the VID value in a different register, in
189 * Super-I/O configuration space.
190 */
1da177e4 191#define IT87_REG_VID 0x0a
4a0d71cf
GR		 192/*
193 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
194 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
195 * mode.
196 */
1da177e4 197#define IT87_REG_FAN_DIV 0x0b
17d648bf 198#define IT87_REG_FAN_16BIT 0x0c
1da177e4
LT		 199
200/* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
201
c7f1f716
JD		 202static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
203static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 };
204static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 };
205static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
161d898a
GR		 206static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
207
1da177e4
LT		 208#define IT87_REG_FAN_MAIN_CTRL 0x13
209#define IT87_REG_FAN_CTL 0x14
210#define IT87_REG_PWM(nr) (0x15 + (nr))
6229cdb2 211#define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8)
1da177e4
LT		 212
213#define IT87_REG_VIN(nr) (0x20 + (nr))
214#define IT87_REG_TEMP(nr) (0x29 + (nr))
215
216#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
217#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
218#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
219#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
220
1da177e4
LT		 221#define IT87_REG_VIN_ENABLE 0x50
222#define IT87_REG_TEMP_ENABLE 0x51
4573acbc 223#define IT87_REG_TEMP_EXTRA 0x55
d9b327c3 224#define IT87_REG_BEEP_ENABLE 0x5c
1da177e4
LT		 225
226#define IT87_REG_CHIPID 0x58
227
4f3f51bc
JD		 228#define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
229#define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i))
230
1da177e4 231
b74f3fdd 232struct it87_sio_data {
233 enum chips type;
234 /* Values read from Super-I/O config space */
0475169c 235 u8 revision;
b74f3fdd 236 u8 vid_value;
d9b327c3 237 u8 beep_pin;
738e5e05 238 u8 internal; /* Internal sensors can be labeled */
591ec650 239 /* Features skipped based on config or DMI */
9172b5d1 240 u16 skip_in;
895ff267 241 u8 skip_vid;
591ec650 242 u8 skip_fan;
98dd22c3 243 u8 skip_pwm;
4573acbc 244 u8 skip_temp;
b74f3fdd 245};
246
4a0d71cf
GR		 247/*
248 * For each registered chip, we need to keep some data in memory.
249 * The structure is dynamically allocated.
250 */
1da177e4 251struct it87_data {
1beeffe4 252 struct device *hwmon_dev;
1da177e4 253 enum chips type;
0475169c 254 u8 revision;
1da177e4 255
b74f3fdd 256 unsigned short addr;
257 const char *name;
9a61bf63 258 struct mutex update_lock;
1da177e4
LT		 259 char valid; /* !=0 if following fields are valid */
260 unsigned long last_updated; /* In jiffies */
261
44c1bcd4 262 u16 in_scaled; /* Internal voltage sensors are scaled */
929c6a56 263 u8 in[9][3]; /* [nr][0]=in, [1]=min, [2]=max */
9060f8bd 264 u8 has_fan; /* Bitfield, fans enabled */
e1169ba0 265 u16 fan[5][2]; /* Register values, [nr][0]=fan, [1]=min */
4573acbc 266 u8 has_temp; /* Bitfield, temp sensors enabled */
161d898a 267 s8 temp[3][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
1da177e4
LT		 268 u8 sensor; /* Register value */
269 u8 fan_div[3]; /* Register encoding, shifted right */
270 u8 vid; /* Register encoding, combined */
a7be58a1 271 u8 vrm;
1da177e4 272 u32 alarms; /* Register encoding, combined */
d9b327c3 273 u8 beeps; /* Register encoding */
1da177e4 274 u8 fan_main_ctrl; /* Register value */
f8d0c19a 275 u8 fan_ctl; /* Register value */
b99883dc 276
4a0d71cf
GR		 277 /*
278 * The following 3 arrays correspond to the same registers up to
6229cdb2
JD		 279 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
280 * 7, and we want to preserve settings on mode changes, so we have
281 * to track all values separately.
282 * Starting with the IT8721F, the manual PWM duty cycles are stored
283 * in separate registers (8-bit values), so the separate tracking
284 * is no longer needed, but it is still done to keep the driver
4a0d71cf
GR		 285 * simple.
286 */
b99883dc 287 u8 pwm_ctrl[3]; /* Register value */
6229cdb2 288 u8 pwm_duty[3]; /* Manual PWM value set by user */
b99883dc 289 u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */
4f3f51bc
JD		 290
291 /* Automatic fan speed control registers */
292 u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */
293 s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */
1da177e4 294};
0df6454d 295
16b5dda2
JD		 296static inline int has_12mv_adc(const struct it87_data *data)
297{
298 /*
299 * IT8721F and later have a 12 mV ADC, also with internal scaling
300 * on selected inputs.
301 */
302 return data->type == it8721
303 || data->type == it8728;
304}
305
306static inline int has_newer_autopwm(const struct it87_data *data)
307{
308 /*
309 * IT8721F and later have separate registers for the temperature
310 * mapping and the manual duty cycle.
311 */
312 return data->type == it8721
313 || data->type == it8728;
314}
315
161d898a
GR		 316static inline int has_temp_offset(const struct it87_data *data)
317{
318 return data->type == it8716
319 || data->type == it8718
320 || data->type == it8720
321 || data->type == it8721
322 || data->type == it8728
323 || data->type == it8782
324 || data->type == it8783;
325}
326
0531d98b 327static int adc_lsb(const struct it87_data *data, int nr)
44c1bcd4 328{
0531d98b
GR		 329 int lsb = has_12mv_adc(data) ? 12 : 16;
330 if (data->in_scaled & (1 << nr))
331 lsb <<= 1;
332 return lsb;
333}
44c1bcd4 334
0531d98b
GR		 335static u8 in_to_reg(const struct it87_data *data, int nr, long val)
336{
337 val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr));
44c1bcd4
JD		 338 return SENSORS_LIMIT(val, 0, 255);
339}
340
341static int in_from_reg(const struct it87_data *data, int nr, int val)
342{
0531d98b 343 return val * adc_lsb(data, nr);
44c1bcd4 344}
0df6454d
JD		 345
346static inline u8 FAN_TO_REG(long rpm, int div)
347{
348 if (rpm == 0)
349 return 255;
350 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
351 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
352 254);
353}
354
355static inline u16 FAN16_TO_REG(long rpm)
356{
357 if (rpm == 0)
358 return 0xffff;
359 return SENSORS_LIMIT((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
360}
361
362#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
363 1350000 / ((val) * (div)))
364/* The divider is fixed to 2 in 16-bit mode */
365#define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
366 1350000 / ((val) * 2))
367
368#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (((val) - 500) / 1000) : \
369 ((val) + 500) / 1000), -128, 127))
370#define TEMP_FROM_REG(val) ((val) * 1000)
371
44c1bcd4
JD		 372static u8 pwm_to_reg(const struct it87_data *data, long val)
373{
16b5dda2 374 if (has_newer_autopwm(data))
44c1bcd4
JD		 375 return val;
376 else
377 return val >> 1;
378}
379
380static int pwm_from_reg(const struct it87_data *data, u8 reg)
381{
16b5dda2 382 if (has_newer_autopwm(data))
44c1bcd4
JD		 383 return reg;
384 else
385 return (reg & 0x7f) << 1;
386}
387
0df6454d
JD		 388
389static int DIV_TO_REG(int val)
390{
391 int answer = 0;
392 while (answer < 7 && (val >>= 1))
393 answer++;
394 return answer;
395}
396#define DIV_FROM_REG(val) (1 << (val))
397
398static const unsigned int pwm_freq[8] = {
399 48000000 / 128,
400 24000000 / 128,
401 12000000 / 128,
402 8000000 / 128,
403 6000000 / 128,
404 3000000 / 128,
405 1500000 / 128,
406 750000 / 128,
407};
1da177e4 408
0475169c
AP		 409static inline int has_16bit_fans(const struct it87_data *data)
410{
4a0d71cf
GR		 411 /*
412 * IT8705F Datasheet 0.4.1, 3h == Version G.
413 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
414 * These are the first revisions with 16-bit tachometer support.
415 */
816d8c6a 416 return (data->type == it87 && data->revision >= 0x03)
859b9ef3 417 || (data->type == it8712 && data->revision >= 0x08)
0475169c 418 || data->type == it8716
b4da93e4 419 || data->type == it8718
44c1bcd4 420 || data->type == it8720
16b5dda2 421 || data->type == it8721
0531d98b
GR		 422 || data->type == it8728
423 || data->type == it8782
424 || data->type == it8783;
0475169c 425}
1da177e4 426
4f3f51bc
JD		 427static inline int has_old_autopwm(const struct it87_data *data)
428{
4a0d71cf
GR		 429 /*
430 * The old automatic fan speed control interface is implemented
431 * by IT8705F chips up to revision F and IT8712F chips up to
432 * revision G.
433 */
4f3f51bc
JD		 434 return (data->type == it87 && data->revision < 0x03)
435 || (data->type == it8712 && data->revision < 0x08);
436}
437
b74f3fdd 438static int it87_probe(struct platform_device *pdev);
281dfd0b 439static int it87_remove(struct platform_device *pdev);
1da177e4 440
b74f3fdd 441static int it87_read_value(struct it87_data *data, u8 reg);
442static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
1da177e4 443static struct it87_data *it87_update_device(struct device *dev);
b74f3fdd 444static int it87_check_pwm(struct device *dev);
445static void it87_init_device(struct platform_device *pdev);
1da177e4
LT		 446
447
b74f3fdd 448static struct platform_driver it87_driver = {
cdaf7934 449 .driver = {
87218842 450 .owner = THIS_MODULE,
b74f3fdd 451 .name = DRVNAME,
cdaf7934 452 },
b74f3fdd 453 .probe = it87_probe,
9e5e9b7a 454 .remove = it87_remove,
fde09509
JD		 455};
456
20ad93d4 457static ssize_t show_in(struct device *dev, struct device_attribute *attr,
929c6a56 458 char *buf)
1da177e4 459{
929c6a56
GR		 460 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
461 int nr = sattr->nr;
462 int index = sattr->index;
20ad93d4 463
1da177e4 464 struct it87_data *data = it87_update_device(dev);
929c6a56 465 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1da177e4
LT		 466}
467
929c6a56
GR		 468static ssize_t set_in(struct device *dev, struct device_attribute *attr,
469 const char *buf, size_t count)
1da177e4 470{
929c6a56
GR		 471 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
472 int nr = sattr->nr;
473 int index = sattr->index;
20ad93d4 474
b74f3fdd 475 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 476 unsigned long val;
477
179c4fdb 478 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 479 return -EINVAL;
1da177e4 480
9a61bf63 481 mutex_lock(&data->update_lock);
929c6a56
GR		 482 data->in[nr][index] = in_to_reg(data, nr, val);
483 it87_write_value(data,
484 index == 1 ? IT87_REG_VIN_MIN(nr)
485 : IT87_REG_VIN_MAX(nr),
486 data->in[nr][index]);
9a61bf63 487 mutex_unlock(&data->update_lock);
1da177e4
LT		 488 return count;
489}
20ad93d4 490
929c6a56
GR		 491static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
492static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
493 0, 1);
494static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
495 0, 2);
f5f64501 496
929c6a56
GR		 497static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
498static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
499 1, 1);
500static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
501 1, 2);
1da177e4 502
929c6a56
GR		 503static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
504static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
505 2, 1);
506static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
507 2, 2);
1da177e4 508
929c6a56
GR		 509static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
510static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
511 3, 1);
512static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
513 3, 2);
514
515static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
516static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
517 4, 1);
518static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
519 4, 2);
520
521static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
522static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
523 5, 1);
524static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
525 5, 2);
526
527static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
528static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
529 6, 1);
530static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
531 6, 2);
532
533static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
534static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
535 7, 1);
536static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
537 7, 2);
538
539static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1da177e4
LT		 540
541/* 3 temperatures */
20ad93d4 542static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
60ca385a 543 char *buf)
1da177e4 544{
60ca385a
GR		 545 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
546 int nr = sattr->nr;
547 int index = sattr->index;
1da177e4 548 struct it87_data *data = it87_update_device(dev);
20ad93d4 549
60ca385a 550 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1da177e4 551}
20ad93d4 552
60ca385a
GR		 553static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
554 const char *buf, size_t count)
1da177e4 555{
60ca385a
GR		 556 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
557 int nr = sattr->nr;
558 int index = sattr->index;
b74f3fdd 559 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 560 long val;
161d898a 561 u8 reg, regval;
f5f64501 562
179c4fdb 563 if (kstrtol(buf, 10, &val) < 0)
f5f64501 564 return -EINVAL;
1da177e4 565
9a61bf63 566 mutex_lock(&data->update_lock);
161d898a
GR		 567
568 switch (index) {
569 default:
570 case 1:
571 reg = IT87_REG_TEMP_LOW(nr);
572 break;
573 case 2:
574 reg = IT87_REG_TEMP_HIGH(nr);
575 break;
576 case 3:
577 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
578 if (!(regval & 0x80)) {
579 regval |= 0x80;
580 it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
581 }
582 data->valid = 0;
583 reg = IT87_REG_TEMP_OFFSET[nr];
584 break;
585 }
586
60ca385a 587 data->temp[nr][index] = TEMP_TO_REG(val);
161d898a 588 it87_write_value(data, reg, data->temp[nr][index]);
9a61bf63 589 mutex_unlock(&data->update_lock);
1da177e4
LT		 590 return count;
591}
1da177e4 592
60ca385a
GR		 593static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
594static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
595 0, 1);
596static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
597 0, 2);
161d898a
GR		 598static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
599 set_temp, 0, 3);
60ca385a
GR		 600static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
601static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
602 1, 1);
603static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
604 1, 2);
161d898a
GR		 605static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
606 set_temp, 1, 3);
60ca385a
GR		 607static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
608static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
609 2, 1);
610static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
611 2, 2);
161d898a
GR		 612static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
613 set_temp, 2, 3);
1da177e4 614
2cece01f
GR		 615static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
616 char *buf)
1da177e4 617{
20ad93d4
JD		 618 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
619 int nr = sensor_attr->index;
1da177e4 620 struct it87_data *data = it87_update_device(dev);
4a0d71cf 621 u8 reg = data->sensor; /* In case value is updated while used */
5f2dc798 622
1da177e4
LT		 623 if (reg & (1 << nr))
624 return sprintf(buf, "3\n"); /* thermal diode */
625 if (reg & (8 << nr))
4ed10779 626 return sprintf(buf, "4\n"); /* thermistor */
1da177e4
LT		 627 return sprintf(buf, "0\n"); /* disabled */
628}
2cece01f
GR		 629
630static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
631 const char *buf, size_t count)
1da177e4 632{
20ad93d4
JD		 633 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
634 int nr = sensor_attr->index;
635
b74f3fdd 636 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 637 long val;
8acf07c5 638 u8 reg;
f5f64501 639
179c4fdb 640 if (kstrtol(buf, 10, &val) < 0)
f5f64501 641 return -EINVAL;
1da177e4 642
8acf07c5
JD		 643 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
644 reg &= ~(1 << nr);
645 reg &= ~(8 << nr);
4ed10779 646 if (val == 2) { /* backwards compatibility */
1d9bcf6a
GR		 647 dev_warn(dev,
648 "Sensor type 2 is deprecated, please use 4 instead\n");
4ed10779
JD		 649 val = 4;
650 }
651 /* 3 = thermal diode; 4 = thermistor; 0 = disabled */
1da177e4 652 if (val == 3)
8acf07c5 653 reg |= 1 << nr;
4ed10779 654 else if (val == 4)
8acf07c5
JD		 655 reg |= 8 << nr;
656 else if (val != 0)
1da177e4 657 return -EINVAL;
8acf07c5
JD		 658
659 mutex_lock(&data->update_lock);
660 data->sensor = reg;
b74f3fdd 661 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
2b3d1d87 662 data->valid = 0; /* Force cache refresh */
9a61bf63 663 mutex_unlock(&data->update_lock);
1da177e4
LT		 664 return count;
665}
1da177e4 666
2cece01f
GR		 667static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
668 set_temp_type, 0);
669static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
670 set_temp_type, 1);
671static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
672 set_temp_type, 2);
1da177e4
LT		 673
674/* 3 Fans */
b99883dc
JD		 675
676static int pwm_mode(const struct it87_data *data, int nr)
677{
678 int ctrl = data->fan_main_ctrl & (1 << nr);
679
680 if (ctrl == 0) /* Full speed */
681 return 0;
682 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
683 return 2;
684 else /* Manual mode */
685 return 1;
686}
687
20ad93d4 688static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
e1169ba0 689 char *buf)
1da177e4 690{
e1169ba0
GR		 691 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
692 int nr = sattr->nr;
693 int index = sattr->index;
694 int speed;
1da177e4 695 struct it87_data *data = it87_update_device(dev);
20ad93d4 696
e1169ba0
GR		 697 speed = has_16bit_fans(data) ?
698 FAN16_FROM_REG(data->fan[nr][index]) :
699 FAN_FROM_REG(data->fan[nr][index],
700 DIV_FROM_REG(data->fan_div[nr]));
701 return sprintf(buf, "%d\n", speed);
1da177e4 702}
e1169ba0 703
20ad93d4
JD		 704static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
705 char *buf)
1da177e4 706{
20ad93d4
JD		 707 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
708 int nr = sensor_attr->index;
709
1da177e4
LT		 710 struct it87_data *data = it87_update_device(dev);
711 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
712}
5f2dc798
JD		 713static ssize_t show_pwm_enable(struct device *dev,
714 struct device_attribute *attr, char *buf)
1da177e4 715{
20ad93d4
JD		 716 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
717 int nr = sensor_attr->index;
718
1da177e4 719 struct it87_data *data = it87_update_device(dev);
b99883dc 720 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1da177e4 721}
20ad93d4
JD		 722static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
723 char *buf)
1da177e4 724{
20ad93d4
JD		 725 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
726 int nr = sensor_attr->index;
727
1da177e4 728 struct it87_data *data = it87_update_device(dev);
44c1bcd4
JD		 729 return sprintf(buf, "%d\n",
730 pwm_from_reg(data, data->pwm_duty[nr]));
1da177e4 731}
f8d0c19a
JD		 732static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
733 char *buf)
734{
735 struct it87_data *data = it87_update_device(dev);
736 int index = (data->fan_ctl >> 4) & 0x07;
737
738 return sprintf(buf, "%u\n", pwm_freq[index]);
739}
e1169ba0
GR		 740
741static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
742 const char *buf, size_t count)
1da177e4 743{
e1169ba0
GR		 744 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
745 int nr = sattr->nr;
746 int index = sattr->index;
20ad93d4 747
b74f3fdd 748 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 749 long val;
7f999aa7 750 u8 reg;
1da177e4 751
179c4fdb 752 if (kstrtol(buf, 10, &val) < 0)
f5f64501
JD		 753 return -EINVAL;
754
9a61bf63 755 mutex_lock(&data->update_lock);
e1169ba0
GR		 756
757 if (has_16bit_fans(data)) {
758 data->fan[nr][index] = FAN16_TO_REG(val);
759 it87_write_value(data, IT87_REG_FAN_MIN[nr],
760 data->fan[nr][index] & 0xff);
761 it87_write_value(data, IT87_REG_FANX_MIN[nr],
762 data->fan[nr][index] >> 8);
763 } else {
764 reg = it87_read_value(data, IT87_REG_FAN_DIV);
765 switch (nr) {
766 case 0:
767 data->fan_div[nr] = reg & 0x07;
768 break;
769 case 1:
770 data->fan_div[nr] = (reg >> 3) & 0x07;
771 break;
772 case 2:
773 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
774 break;
775 }
776 data->fan[nr][index] =
777 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
778 it87_write_value(data, IT87_REG_FAN_MIN[nr],
779 data->fan[nr][index]);
07eab46d
JD		 780 }
781
9a61bf63 782 mutex_unlock(&data->update_lock);
1da177e4
LT		 783 return count;
784}
e1169ba0 785
20ad93d4
JD		 786static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
787 const char *buf, size_t count)
1da177e4 788{
20ad93d4
JD		 789 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
790 int nr = sensor_attr->index;
791
b74f3fdd 792 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 793 unsigned long val;
8ab4ec3e 794 int min;
1da177e4
LT		 795 u8 old;
796
179c4fdb 797 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD		 798 return -EINVAL;
799
9a61bf63 800 mutex_lock(&data->update_lock);
b74f3fdd 801 old = it87_read_value(data, IT87_REG_FAN_DIV);
1da177e4 802
8ab4ec3e 803 /* Save fan min limit */
e1169ba0 804 min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1da177e4
LT		 805
806 switch (nr) {
807 case 0:
808 case 1:
809 data->fan_div[nr] = DIV_TO_REG(val);
810 break;
811 case 2:
812 if (val < 8)
813 data->fan_div[nr] = 1;
814 else
815 data->fan_div[nr] = 3;
816 }
817 val = old & 0x80;
818 val |= (data->fan_div[0] & 0x07);
819 val |= (data->fan_div[1] & 0x07) << 3;
820 if (data->fan_div[2] == 3)
821 val |= 0x1 << 6;
b74f3fdd 822 it87_write_value(data, IT87_REG_FAN_DIV, val);
1da177e4 823
8ab4ec3e 824 /* Restore fan min limit */
e1169ba0
GR		 825 data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
826 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
8ab4ec3e 827
9a61bf63 828 mutex_unlock(&data->update_lock);
1da177e4
LT		 829 return count;
830}
cccfc9c4
JD		 831
832/* Returns 0 if OK, -EINVAL otherwise */
833static int check_trip_points(struct device *dev, int nr)
834{
835 const struct it87_data *data = dev_get_drvdata(dev);
836 int i, err = 0;
837
838 if (has_old_autopwm(data)) {
839 for (i = 0; i < 3; i++) {
840 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
841 err = -EINVAL;
842 }
843 for (i = 0; i < 2; i++) {
844 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
845 err = -EINVAL;
846 }
847 }
848
849 if (err) {
1d9bcf6a
GR		 850 dev_err(dev,
851 "Inconsistent trip points, not switching to automatic mode\n");
cccfc9c4
JD		 852 dev_err(dev, "Adjust the trip points and try again\n");
853 }
854 return err;
855}
856
20ad93d4
JD		 857static ssize_t set_pwm_enable(struct device *dev,
858 struct device_attribute *attr, const char *buf, size_t count)
1da177e4 859{
20ad93d4
JD		 860 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
861 int nr = sensor_attr->index;
862
b74f3fdd 863 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 864 long val;
1da177e4 865
179c4fdb 866 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
b99883dc
JD		 867 return -EINVAL;
868
cccfc9c4
JD		 869 /* Check trip points before switching to automatic mode */
870 if (val == 2) {
871 if (check_trip_points(dev, nr) < 0)
872 return -EINVAL;
873 }
874
9a61bf63 875 mutex_lock(&data->update_lock);
1da177e4
LT		 876
877 if (val == 0) {
878 int tmp;
879 /* make sure the fan is on when in on/off mode */
b74f3fdd 880 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
881 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1da177e4
LT		 882 /* set on/off mode */
883 data->fan_main_ctrl &= ~(1 << nr);
5f2dc798
JD		 884 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
885 data->fan_main_ctrl);
b99883dc
JD		 886 } else {
887 if (val == 1) /* Manual mode */
16b5dda2 888 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
6229cdb2
JD		 889 data->pwm_temp_map[nr] :
890 data->pwm_duty[nr];
b99883dc
JD		 891 else /* Automatic mode */
892 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
893 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1da177e4
LT		 894 /* set SmartGuardian mode */
895 data->fan_main_ctrl |= (1 << nr);
5f2dc798
JD		 896 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
897 data->fan_main_ctrl);
1da177e4
LT		 898 }
899
9a61bf63 900 mutex_unlock(&data->update_lock);
1da177e4
LT		 901 return count;
902}
20ad93d4
JD		 903static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
904 const char *buf, size_t count)
1da177e4 905{
20ad93d4
JD		 906 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
907 int nr = sensor_attr->index;
908
b74f3fdd 909 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 910 long val;
1da177e4 911
179c4fdb 912 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1da177e4
LT		 913 return -EINVAL;
914
9a61bf63 915 mutex_lock(&data->update_lock);
16b5dda2 916 if (has_newer_autopwm(data)) {
4a0d71cf
GR		 917 /*
918 * If we are in automatic mode, the PWM duty cycle register
919 * is read-only so we can't write the value.
920 */
6229cdb2
JD		 921 if (data->pwm_ctrl[nr] & 0x80) {
922 mutex_unlock(&data->update_lock);
923 return -EBUSY;
924 }
925 data->pwm_duty[nr] = pwm_to_reg(data, val);
926 it87_write_value(data, IT87_REG_PWM_DUTY(nr),
927 data->pwm_duty[nr]);
928 } else {
929 data->pwm_duty[nr] = pwm_to_reg(data, val);
4a0d71cf
GR		 930 /*
931 * If we are in manual mode, write the duty cycle immediately;
932 * otherwise, just store it for later use.
933 */
6229cdb2
JD		 934 if (!(data->pwm_ctrl[nr] & 0x80)) {
935 data->pwm_ctrl[nr] = data->pwm_duty[nr];
936 it87_write_value(data, IT87_REG_PWM(nr),
937 data->pwm_ctrl[nr]);
938 }
b99883dc 939 }
9a61bf63 940 mutex_unlock(&data->update_lock);
1da177e4
LT		 941 return count;
942}
f8d0c19a
JD		 943static ssize_t set_pwm_freq(struct device *dev,
944 struct device_attribute *attr, const char *buf, size_t count)
945{
b74f3fdd 946 struct it87_data *data = dev_get_drvdata(dev);
f5f64501 947 unsigned long val;
f8d0c19a
JD		 948 int i;
949
179c4fdb 950 if (kstrtoul(buf, 10, &val) < 0)
f5f64501
JD		 951 return -EINVAL;
952
f8d0c19a
JD		 953 /* Search for the nearest available frequency */
954 for (i = 0; i < 7; i++) {
955 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
956 break;
957 }
958
959 mutex_lock(&data->update_lock);
b74f3fdd 960 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
f8d0c19a 961 data->fan_ctl |= i << 4;
b74f3fdd 962 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
f8d0c19a
JD		 963 mutex_unlock(&data->update_lock);
964
965 return count;
966}
94ac7ee6
JD		 967static ssize_t show_pwm_temp_map(struct device *dev,
968 struct device_attribute *attr, char *buf)
969{
970 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
971 int nr = sensor_attr->index;
972
973 struct it87_data *data = it87_update_device(dev);
974 int map;
975
976 if (data->pwm_temp_map[nr] < 3)
977 map = 1 << data->pwm_temp_map[nr];
978 else
979 map = 0; /* Should never happen */
980 return sprintf(buf, "%d\n", map);
981}
982static ssize_t set_pwm_temp_map(struct device *dev,
983 struct device_attribute *attr, const char *buf, size_t count)
984{
985 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
986 int nr = sensor_attr->index;
987
988 struct it87_data *data = dev_get_drvdata(dev);
989 long val;
990 u8 reg;
991
4a0d71cf
GR		 992 /*
993 * This check can go away if we ever support automatic fan speed
994 * control on newer chips.
995 */
4f3f51bc
JD		 996 if (!has_old_autopwm(data)) {
997 dev_notice(dev, "Mapping change disabled for safety reasons\n");
998 return -EINVAL;
999 }
1000
179c4fdb 1001 if (kstrtol(buf, 10, &val) < 0)
94ac7ee6
JD		 1002 return -EINVAL;
1003
1004 switch (val) {
1005 case (1 << 0):
1006 reg = 0x00;
1007 break;
1008 case (1 << 1):
1009 reg = 0x01;
1010 break;
1011 case (1 << 2):
1012 reg = 0x02;
1013 break;
1014 default:
1015 return -EINVAL;
1016 }
1017
1018 mutex_lock(&data->update_lock);
1019 data->pwm_temp_map[nr] = reg;
4a0d71cf
GR		 1020 /*
1021 * If we are in automatic mode, write the temp mapping immediately;
1022 * otherwise, just store it for later use.
1023 */
94ac7ee6
JD		 1024 if (data->pwm_ctrl[nr] & 0x80) {
1025 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1026 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1027 }
1028 mutex_unlock(&data->update_lock);
1029 return count;
1030}
1da177e4 1031
4f3f51bc
JD		 1032static ssize_t show_auto_pwm(struct device *dev,
1033 struct device_attribute *attr, char *buf)
1034{
1035 struct it87_data *data = it87_update_device(dev);
1036 struct sensor_device_attribute_2 *sensor_attr =
1037 to_sensor_dev_attr_2(attr);
1038 int nr = sensor_attr->nr;
1039 int point = sensor_attr->index;
1040
44c1bcd4
JD		 1041 return sprintf(buf, "%d\n",
1042 pwm_from_reg(data, data->auto_pwm[nr][point]));
4f3f51bc
JD		 1043}
1044
1045static ssize_t set_auto_pwm(struct device *dev,
1046 struct device_attribute *attr, const char *buf, size_t count)
1047{
1048 struct it87_data *data = dev_get_drvdata(dev);
1049 struct sensor_device_attribute_2 *sensor_attr =
1050 to_sensor_dev_attr_2(attr);
1051 int nr = sensor_attr->nr;
1052 int point = sensor_attr->index;
1053 long val;
1054
179c4fdb 1055 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
4f3f51bc
JD		 1056 return -EINVAL;
1057
1058 mutex_lock(&data->update_lock);
44c1bcd4 1059 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
4f3f51bc
JD		 1060 it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1061 data->auto_pwm[nr][point]);
1062 mutex_unlock(&data->update_lock);
1063 return count;
1064}
1065
1066static ssize_t show_auto_temp(struct device *dev,
1067 struct device_attribute *attr, char *buf)
1068{
1069 struct it87_data *data = it87_update_device(dev);
1070 struct sensor_device_attribute_2 *sensor_attr =
1071 to_sensor_dev_attr_2(attr);
1072 int nr = sensor_attr->nr;
1073 int point = sensor_attr->index;
1074
1075 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1076}
1077
1078static ssize_t set_auto_temp(struct device *dev,
1079 struct device_attribute *attr, const char *buf, size_t count)
1080{
1081 struct it87_data *data = dev_get_drvdata(dev);
1082 struct sensor_device_attribute_2 *sensor_attr =
1083 to_sensor_dev_attr_2(attr);
1084 int nr = sensor_attr->nr;
1085 int point = sensor_attr->index;
1086 long val;
1087
179c4fdb 1088 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
4f3f51bc
JD		 1089 return -EINVAL;
1090
1091 mutex_lock(&data->update_lock);
1092 data->auto_temp[nr][point] = TEMP_TO_REG(val);
1093 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1094 data->auto_temp[nr][point]);
1095 mutex_unlock(&data->update_lock);
1096 return count;
1097}
1098
e1169ba0
GR		 1099static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1100static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1101 0, 1);
1102static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1103 set_fan_div, 0);
1104
1105static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1106static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1107 1, 1);
1108static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1109 set_fan_div, 1);
1110
1111static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1112static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1113 2, 1);
1114static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1115 set_fan_div, 2);
1116
1117static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1118static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1119 3, 1);
1da177e4 1120
e1169ba0
GR		 1121static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1122static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1123 4, 1);
1da177e4
LT		 1124
1125#define show_pwm_offset(offset) \
20ad93d4
JD		 1126static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
1127 show_pwm_enable, set_pwm_enable, offset - 1); \
1128static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
f8d0c19a
JD		 1129 show_pwm, set_pwm, offset - 1); \
1130static DEVICE_ATTR(pwm##offset##_freq, \
1131 (offset == 1 ? S_IRUGO | S_IWUSR : S_IRUGO), \
94ac7ee6
JD		 1132 show_pwm_freq, (offset == 1 ? set_pwm_freq : NULL)); \
1133static SENSOR_DEVICE_ATTR(pwm##offset##_auto_channels_temp, \
4f3f51bc
JD		 1134 S_IRUGO | S_IWUSR, show_pwm_temp_map, set_pwm_temp_map, \
1135 offset - 1); \
1136static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_pwm, \
1137 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1138 offset - 1, 0); \
1139static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_pwm, \
1140 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1141 offset - 1, 1); \
1142static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_pwm, \
1143 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1144 offset - 1, 2); \
1145static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_pwm, \
1146 S_IRUGO, show_auto_pwm, NULL, offset - 1, 3); \
1147static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp, \
1148 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1149 offset - 1, 1); \
1150static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp_hyst, \
1151 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1152 offset - 1, 0); \
1153static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_temp, \
1154 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1155 offset - 1, 2); \
1156static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_temp, \
1157 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1158 offset - 1, 3); \
1159static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_temp, \
1160 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1161 offset - 1, 4);
1da177e4
LT		 1162
1163show_pwm_offset(1);
1164show_pwm_offset(2);
1165show_pwm_offset(3);
1166
1167/* Alarms */
5f2dc798
JD		 1168static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1169 char *buf)
1da177e4
LT		 1170{
1171 struct it87_data *data = it87_update_device(dev);
68188ba7 1172 return sprintf(buf, "%u\n", data->alarms);
1da177e4 1173}
1d66c64c 1174static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1da177e4 1175
0124dd78
JD		 1176static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1177 char *buf)
1178{
1179 int bitnr = to_sensor_dev_attr(attr)->index;
1180 struct it87_data *data = it87_update_device(dev);
1181 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1182}
3d30f9e6
JD		 1183
1184static ssize_t clear_intrusion(struct device *dev, struct device_attribute
1185 *attr, const char *buf, size_t count)
1186{
1187 struct it87_data *data = dev_get_drvdata(dev);
1188 long val;
1189 int config;
1190
179c4fdb 1191 if (kstrtol(buf, 10, &val) < 0 || val != 0)
3d30f9e6
JD		 1192 return -EINVAL;
1193
1194 mutex_lock(&data->update_lock);
1195 config = it87_read_value(data, IT87_REG_CONFIG);
1196 if (config < 0) {
1197 count = config;
1198 } else {
1199 config |= 1 << 5;
1200 it87_write_value(data, IT87_REG_CONFIG, config);
1201 /* Invalidate cache to force re-read */
1202 data->valid = 0;
1203 }
1204 mutex_unlock(&data->update_lock);
1205
1206 return count;
1207}
1208
0124dd78
JD		 1209static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1210static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1211static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1212static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1213static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1214static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1215static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1216static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1217static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1218static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1219static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1220static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1221static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1222static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1223static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1224static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
3d30f9e6
JD		 1225static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1226 show_alarm, clear_intrusion, 4);
0124dd78 1227
d9b327c3
JD		 1228static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1229 char *buf)
1230{
1231 int bitnr = to_sensor_dev_attr(attr)->index;
1232 struct it87_data *data = it87_update_device(dev);
1233 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1234}
1235static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1236 const char *buf, size_t count)
1237{
1238 int bitnr = to_sensor_dev_attr(attr)->index;
1239 struct it87_data *data = dev_get_drvdata(dev);
1240 long val;
1241
179c4fdb 1242 if (kstrtol(buf, 10, &val) < 0
d9b327c3
JD		 1243 || (val != 0 && val != 1))
1244 return -EINVAL;
1245
1246 mutex_lock(&data->update_lock);
1247 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1248 if (val)
1249 data->beeps |= (1 << bitnr);
1250 else
1251 data->beeps &= ~(1 << bitnr);
1252 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1253 mutex_unlock(&data->update_lock);
1254 return count;
1255}
1256
1257static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1258 show_beep, set_beep, 1);
1259static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1260static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1261static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1262static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1263static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1264static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1265static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1266/* fanX_beep writability is set later */
1267static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1268static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1269static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1270static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1271static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1272static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1273 show_beep, set_beep, 2);
1274static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1275static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1276
5f2dc798
JD		 1277static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1278 char *buf)
1da177e4 1279{
90d6619a 1280 struct it87_data *data = dev_get_drvdata(dev);
a7be58a1 1281 return sprintf(buf, "%u\n", data->vrm);
1da177e4 1282}
5f2dc798
JD		 1283static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1284 const char *buf, size_t count)
1da177e4 1285{
b74f3fdd 1286 struct it87_data *data = dev_get_drvdata(dev);
f5f64501
JD		 1287 unsigned long val;
1288
179c4fdb 1289 if (kstrtoul(buf, 10, &val) < 0)
f5f64501 1290 return -EINVAL;
1da177e4 1291
1da177e4
LT		 1292 data->vrm = val;
1293
1294 return count;
1295}
1296static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1da177e4 1297
5f2dc798
JD		 1298static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1299 char *buf)
1da177e4
LT		 1300{
1301 struct it87_data *data = it87_update_device(dev);
1302 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1303}
1304static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
87808be4 1305
738e5e05
JD		 1306static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1307 char *buf)
1308{
3c4c4971 1309 static const char * const labels[] = {
738e5e05
JD		 1310 "+5V",
1311 "5VSB",
1312 "Vbat",
1313 };
3c4c4971 1314 static const char * const labels_it8721[] = {
44c1bcd4
JD		 1315 "+3.3V",
1316 "3VSB",
1317 "Vbat",
1318 };
1319 struct it87_data *data = dev_get_drvdata(dev);
738e5e05
JD		 1320 int nr = to_sensor_dev_attr(attr)->index;
1321
16b5dda2
JD		 1322 return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr]
1323 : labels[nr]);
738e5e05
JD		 1324}
1325static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1326static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1327static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1328
b74f3fdd 1329static ssize_t show_name(struct device *dev, struct device_attribute
1330 *devattr, char *buf)
1331{
1332 struct it87_data *data = dev_get_drvdata(dev);
1333 return sprintf(buf, "%s\n", data->name);
1334}
1335static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1336
9172b5d1
GR		 1337static struct attribute *it87_attributes_in[9][5] = {
1338{
87808be4 1339 &sensor_dev_attr_in0_input.dev_attr.attr,
87808be4 1340 &sensor_dev_attr_in0_min.dev_attr.attr,
87808be4 1341 &sensor_dev_attr_in0_max.dev_attr.attr,
0124dd78 1342 &sensor_dev_attr_in0_alarm.dev_attr.attr,
9172b5d1
GR		 1343 NULL
1344}, {
1345 &sensor_dev_attr_in1_input.dev_attr.attr,
1346 &sensor_dev_attr_in1_min.dev_attr.attr,
1347 &sensor_dev_attr_in1_max.dev_attr.attr,
0124dd78 1348 &sensor_dev_attr_in1_alarm.dev_attr.attr,
9172b5d1
GR		 1349 NULL
1350}, {
1351 &sensor_dev_attr_in2_input.dev_attr.attr,
1352 &sensor_dev_attr_in2_min.dev_attr.attr,
1353 &sensor_dev_attr_in2_max.dev_attr.attr,
0124dd78 1354 &sensor_dev_attr_in2_alarm.dev_attr.attr,
9172b5d1
GR		 1355 NULL
1356}, {
1357 &sensor_dev_attr_in3_input.dev_attr.attr,
1358 &sensor_dev_attr_in3_min.dev_attr.attr,
1359 &sensor_dev_attr_in3_max.dev_attr.attr,
0124dd78 1360 &sensor_dev_attr_in3_alarm.dev_attr.attr,
9172b5d1
GR		 1361 NULL
1362}, {
1363 &sensor_dev_attr_in4_input.dev_attr.attr,
1364 &sensor_dev_attr_in4_min.dev_attr.attr,
1365 &sensor_dev_attr_in4_max.dev_attr.attr,
0124dd78 1366 &sensor_dev_attr_in4_alarm.dev_attr.attr,
9172b5d1
GR		 1367 NULL
1368}, {
1369 &sensor_dev_attr_in5_input.dev_attr.attr,
1370 &sensor_dev_attr_in5_min.dev_attr.attr,
1371 &sensor_dev_attr_in5_max.dev_attr.attr,
0124dd78 1372 &sensor_dev_attr_in5_alarm.dev_attr.attr,
9172b5d1
GR		 1373 NULL
1374}, {
1375 &sensor_dev_attr_in6_input.dev_attr.attr,
1376 &sensor_dev_attr_in6_min.dev_attr.attr,
1377 &sensor_dev_attr_in6_max.dev_attr.attr,
0124dd78 1378 &sensor_dev_attr_in6_alarm.dev_attr.attr,
9172b5d1
GR		 1379 NULL
1380}, {
1381 &sensor_dev_attr_in7_input.dev_attr.attr,
1382 &sensor_dev_attr_in7_min.dev_attr.attr,
1383 &sensor_dev_attr_in7_max.dev_attr.attr,
0124dd78 1384 &sensor_dev_attr_in7_alarm.dev_attr.attr,
9172b5d1
GR		 1385 NULL
1386}, {
1387 &sensor_dev_attr_in8_input.dev_attr.attr,
1388 NULL
1389} };
87808be4 1390
9172b5d1
GR		 1391static const struct attribute_group it87_group_in[9] = {
1392 { .attrs = it87_attributes_in[0] },
1393 { .attrs = it87_attributes_in[1] },
1394 { .attrs = it87_attributes_in[2] },
1395 { .attrs = it87_attributes_in[3] },
1396 { .attrs = it87_attributes_in[4] },
1397 { .attrs = it87_attributes_in[5] },
1398 { .attrs = it87_attributes_in[6] },
1399 { .attrs = it87_attributes_in[7] },
1400 { .attrs = it87_attributes_in[8] },
1401};
1402
4573acbc
GR		 1403static struct attribute *it87_attributes_temp[3][6] = {
1404{
87808be4 1405 &sensor_dev_attr_temp1_input.dev_attr.attr,
87808be4 1406 &sensor_dev_attr_temp1_max.dev_attr.attr,
87808be4 1407 &sensor_dev_attr_temp1_min.dev_attr.attr,
87808be4 1408 &sensor_dev_attr_temp1_type.dev_attr.attr,
0124dd78 1409 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
4573acbc
GR		 1410 NULL
1411} , {
1412 &sensor_dev_attr_temp2_input.dev_attr.attr,
1413 &sensor_dev_attr_temp2_max.dev_attr.attr,
1414 &sensor_dev_attr_temp2_min.dev_attr.attr,
1415 &sensor_dev_attr_temp2_type.dev_attr.attr,
0124dd78 1416 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
4573acbc
GR		 1417 NULL
1418} , {
1419 &sensor_dev_attr_temp3_input.dev_attr.attr,
1420 &sensor_dev_attr_temp3_max.dev_attr.attr,
1421 &sensor_dev_attr_temp3_min.dev_attr.attr,
1422 &sensor_dev_attr_temp3_type.dev_attr.attr,
0124dd78 1423 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
4573acbc
GR		 1424 NULL
1425} };
1426
1427static const struct attribute_group it87_group_temp[3] = {
1428 { .attrs = it87_attributes_temp[0] },
1429 { .attrs = it87_attributes_temp[1] },
1430 { .attrs = it87_attributes_temp[2] },
1431};
87808be4 1432
161d898a
GR		 1433static struct attribute *it87_attributes_temp_offset[] = {
1434 &sensor_dev_attr_temp1_offset.dev_attr.attr,
1435 &sensor_dev_attr_temp2_offset.dev_attr.attr,
1436 &sensor_dev_attr_temp3_offset.dev_attr.attr,
1437};
1438
4573acbc 1439static struct attribute *it87_attributes[] = {
87808be4 1440 &dev_attr_alarms.attr,
3d30f9e6 1441 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
b74f3fdd 1442 &dev_attr_name.attr,
87808be4
JD		 1443 NULL
1444};
1445
1446static const struct attribute_group it87_group = {
1447 .attrs = it87_attributes,
1448};
1449
9172b5d1 1450static struct attribute *it87_attributes_in_beep[] = {
d9b327c3
JD		 1451 &sensor_dev_attr_in0_beep.dev_attr.attr,
1452 &sensor_dev_attr_in1_beep.dev_attr.attr,
1453 &sensor_dev_attr_in2_beep.dev_attr.attr,
1454 &sensor_dev_attr_in3_beep.dev_attr.attr,
1455 &sensor_dev_attr_in4_beep.dev_attr.attr,
1456 &sensor_dev_attr_in5_beep.dev_attr.attr,
1457 &sensor_dev_attr_in6_beep.dev_attr.attr,
1458 &sensor_dev_attr_in7_beep.dev_attr.attr,
9172b5d1
GR		 1459 NULL
1460};
d9b327c3 1461
4573acbc 1462static struct attribute *it87_attributes_temp_beep[] = {
d9b327c3
JD		 1463 &sensor_dev_attr_temp1_beep.dev_attr.attr,
1464 &sensor_dev_attr_temp2_beep.dev_attr.attr,
1465 &sensor_dev_attr_temp3_beep.dev_attr.attr,
d9b327c3
JD		 1466};
1467
e1169ba0
GR		 1468static struct attribute *it87_attributes_fan[5][3+1] = { {
1469 &sensor_dev_attr_fan1_input.dev_attr.attr,
1470 &sensor_dev_attr_fan1_min.dev_attr.attr,
723a0aa0
JD		 1471 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1472 NULL
1473}, {
e1169ba0
GR		 1474 &sensor_dev_attr_fan2_input.dev_attr.attr,
1475 &sensor_dev_attr_fan2_min.dev_attr.attr,
723a0aa0
JD		 1476 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1477 NULL
1478}, {
e1169ba0
GR		 1479 &sensor_dev_attr_fan3_input.dev_attr.attr,
1480 &sensor_dev_attr_fan3_min.dev_attr.attr,
723a0aa0
JD		 1481 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1482 NULL
1483}, {
e1169ba0
GR		 1484 &sensor_dev_attr_fan4_input.dev_attr.attr,
1485 &sensor_dev_attr_fan4_min.dev_attr.attr,
723a0aa0
JD		 1486 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1487 NULL
1488}, {
e1169ba0
GR		 1489 &sensor_dev_attr_fan5_input.dev_attr.attr,
1490 &sensor_dev_attr_fan5_min.dev_attr.attr,
723a0aa0
JD		 1491 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1492 NULL
1493} };
1494
e1169ba0
GR		 1495static const struct attribute_group it87_group_fan[5] = {
1496 { .attrs = it87_attributes_fan[0] },
1497 { .attrs = it87_attributes_fan[1] },
1498 { .attrs = it87_attributes_fan[2] },
1499 { .attrs = it87_attributes_fan[3] },
1500 { .attrs = it87_attributes_fan[4] },
723a0aa0 1501};
87808be4 1502
e1169ba0 1503static const struct attribute *it87_attributes_fan_div[] = {
87808be4 1504 &sensor_dev_attr_fan1_div.dev_attr.attr,
87808be4 1505 &sensor_dev_attr_fan2_div.dev_attr.attr,
87808be4 1506 &sensor_dev_attr_fan3_div.dev_attr.attr,
723a0aa0
JD		 1507};
1508
723a0aa0 1509static struct attribute *it87_attributes_pwm[3][4+1] = { {
87808be4 1510 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
87808be4 1511 &sensor_dev_attr_pwm1.dev_attr.attr,
d5b0b5d6 1512 &dev_attr_pwm1_freq.attr,
94ac7ee6 1513 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1514 NULL
1515}, {
1516 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1517 &sensor_dev_attr_pwm2.dev_attr.attr,
1518 &dev_attr_pwm2_freq.attr,
94ac7ee6 1519 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1520 NULL
1521}, {
1522 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1523 &sensor_dev_attr_pwm3.dev_attr.attr,
1524 &dev_attr_pwm3_freq.attr,
94ac7ee6 1525 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
723a0aa0
JD		 1526 NULL
1527} };
87808be4 1528
723a0aa0
JD		 1529static const struct attribute_group it87_group_pwm[3] = {
1530 { .attrs = it87_attributes_pwm[0] },
1531 { .attrs = it87_attributes_pwm[1] },
1532 { .attrs = it87_attributes_pwm[2] },
1533};
1534
4f3f51bc
JD		 1535static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1536 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1537 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1538 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1539 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1540 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1541 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1542 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1543 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1544 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1545 NULL
1546}, {
1547 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1548 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1549 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1550 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1551 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1552 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1553 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1554 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1555 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1556 NULL
1557}, {
1558 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1559 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1560 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1561 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1562 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1563 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
1564 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1565 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1566 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
1567 NULL
1568} };
1569
1570static const struct attribute_group it87_group_autopwm[3] = {
1571 { .attrs = it87_attributes_autopwm[0] },
1572 { .attrs = it87_attributes_autopwm[1] },
1573 { .attrs = it87_attributes_autopwm[2] },
1574};
1575
d9b327c3
JD		 1576static struct attribute *it87_attributes_fan_beep[] = {
1577 &sensor_dev_attr_fan1_beep.dev_attr.attr,
1578 &sensor_dev_attr_fan2_beep.dev_attr.attr,
1579 &sensor_dev_attr_fan3_beep.dev_attr.attr,
1580 &sensor_dev_attr_fan4_beep.dev_attr.attr,
1581 &sensor_dev_attr_fan5_beep.dev_attr.attr,
1582};
1583
6a8d7acf 1584static struct attribute *it87_attributes_vid[] = {
87808be4
JD		 1585 &dev_attr_vrm.attr,
1586 &dev_attr_cpu0_vid.attr,
1587 NULL
1588};
1589
6a8d7acf
JD		 1590static const struct attribute_group it87_group_vid = {
1591 .attrs = it87_attributes_vid,
87808be4 1592};
1da177e4 1593
738e5e05
JD		 1594static struct attribute *it87_attributes_label[] = {
1595 &sensor_dev_attr_in3_label.dev_attr.attr,
1596 &sensor_dev_attr_in7_label.dev_attr.attr,
1597 &sensor_dev_attr_in8_label.dev_attr.attr,
1598 NULL
1599};
1600
1601static const struct attribute_group it87_group_label = {
fa8b6975 1602 .attrs = it87_attributes_label,
738e5e05
JD		 1603};
1604
2d8672c5 1605/* SuperIO detection - will change isa_address if a chip is found */
b74f3fdd 1606static int __init it87_find(unsigned short *address,
1607 struct it87_sio_data *sio_data)
1da177e4 1608{
5b0380c9 1609 int err;
b74f3fdd 1610 u16 chip_type;
98dd22c3 1611 const char *board_vendor, *board_name;
1da177e4 1612
5b0380c9
NG		 1613 err = superio_enter();
1614 if (err)
1615 return err;
1616
1617 err = -ENODEV;
67b671bc 1618 chip_type = force_id ? force_id : superio_inw(DEVID);
b74f3fdd 1619
1620 switch (chip_type) {
1621 case IT8705F_DEVID:
1622 sio_data->type = it87;
1623 break;
1624 case IT8712F_DEVID:
1625 sio_data->type = it8712;
1626 break;
1627 case IT8716F_DEVID:
1628 case IT8726F_DEVID:
1629 sio_data->type = it8716;
1630 break;
1631 case IT8718F_DEVID:
1632 sio_data->type = it8718;
1633 break;
b4da93e4
JMS		 1634 case IT8720F_DEVID:
1635 sio_data->type = it8720;
1636 break;
44c1bcd4
JD		 1637 case IT8721F_DEVID:
1638 sio_data->type = it8721;
1639 break;
16b5dda2
JD		 1640 case IT8728F_DEVID:
1641 sio_data->type = it8728;
1642 break;
0531d98b
GR		 1643 case IT8782F_DEVID:
1644 sio_data->type = it8782;
1645 break;
1646 case IT8783E_DEVID:
1647 sio_data->type = it8783;
1648 break;
b74f3fdd 1649 case 0xffff: /* No device at all */
1650 goto exit;
1651 default:
a8ca1037 1652 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
b74f3fdd 1653 goto exit;
1654 }
1da177e4 1655
87673dd7 1656 superio_select(PME);
1da177e4 1657 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
a8ca1037 1658 pr_info("Device not activated, skipping\n");
1da177e4
LT		 1659 goto exit;
1660 }
1661
1662 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1663 if (*address == 0) {
a8ca1037 1664 pr_info("Base address not set, skipping\n");
1da177e4
LT		 1665 goto exit;
1666 }
1667
1668 err = 0;
0475169c 1669 sio_data->revision = superio_inb(DEVREV) & 0x0f;
a8ca1037 1670 pr_info("Found IT%04xF chip at 0x%x, revision %d\n",
0475169c 1671 chip_type, *address, sio_data->revision);
1da177e4 1672
738e5e05
JD		 1673 /* in8 (Vbat) is always internal */
1674 sio_data->internal = (1 << 2);
1675
87673dd7 1676 /* Read GPIO config and VID value from LDN 7 (GPIO) */
895ff267
JD		 1677 if (sio_data->type == it87) {
1678 /* The IT8705F doesn't have VID pins at all */
1679 sio_data->skip_vid = 1;
d9b327c3
JD		 1680
1681 /* The IT8705F has a different LD number for GPIO */
1682 superio_select(5);
1683 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
0531d98b
GR		 1684 } else if (sio_data->type == it8783) {
1685 int reg25, reg27, reg2A, reg2C, regEF;
0531d98b
GR		 1686
1687 sio_data->skip_vid = 1; /* No VID */
1688
1689 superio_select(GPIO);
1690
1691 reg25 = superio_inb(IT87_SIO_GPIO1_REG);
1692 reg27 = superio_inb(IT87_SIO_GPIO3_REG);
1693 reg2A = superio_inb(IT87_SIO_PINX1_REG);
1694 reg2C = superio_inb(IT87_SIO_PINX2_REG);
1695 regEF = superio_inb(IT87_SIO_SPI_REG);
1696
0531d98b 1697 /* Check if fan3 is there or not */
9172b5d1 1698 if ((reg27 & (1 << 0)) || !(reg2C & (1 << 2)))
0531d98b
GR		 1699 sio_data->skip_fan |= (1 << 2);
1700 if ((reg25 & (1 << 4))
1701 || (!(reg2A & (1 << 1)) && (regEF & (1 << 0))))
1702 sio_data->skip_pwm |= (1 << 2);
1703
1704 /* Check if fan2 is there or not */
1705 if (reg27 & (1 << 7))
1706 sio_data->skip_fan |= (1 << 1);
1707 if (reg27 & (1 << 3))
1708 sio_data->skip_pwm |= (1 << 1);
1709
1710 /* VIN5 */
9172b5d1
GR		 1711 if ((reg27 & (1 << 0)) || (reg2C & (1 << 2)))
1712 sio_data->skip_in |= (1 << 5); /* No VIN5 */
0531d98b
GR		 1713
1714 /* VIN6 */
9172b5d1
GR		 1715 if (reg27 & (1 << 1))
1716 sio_data->skip_in |= (1 << 6); /* No VIN6 */
0531d98b
GR		 1717
1718 /*
1719 * VIN7
1720 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
1721 */
9172b5d1
GR		 1722 if (reg27 & (1 << 2)) {
1723 /*
1724 * The data sheet is a bit unclear regarding the
1725 * internal voltage divider for VCCH5V. It says
1726 * "This bit enables and switches VIN7 (pin 91) to the
1727 * internal voltage divider for VCCH5V".
1728 * This is different to other chips, where the internal
1729 * voltage divider would connect VIN7 to an internal
1730 * voltage source. Maybe that is the case here as well.
1731 *
1732 * Since we don't know for sure, re-route it if that is
1733 * not the case, and ask the user to report if the
1734 * resulting voltage is sane.
1735 */
1736 if (!(reg2C & (1 << 1))) {
1737 reg2C |= (1 << 1);
1738 superio_outb(IT87_SIO_PINX2_REG, reg2C);
1739 pr_notice("Routing internal VCCH5V to in7.\n");
1740 }
1741 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
1742 pr_notice("Please report if it displays a reasonable voltage.\n");
1743 }
0531d98b
GR		 1744
1745 if (reg2C & (1 << 0))
1746 sio_data->internal |= (1 << 0);
1747 if (reg2C & (1 << 1))
1748 sio_data->internal |= (1 << 1);
1749
1750 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
1751
895ff267 1752 } else {
87673dd7 1753 int reg;
9172b5d1 1754 bool uart6;
87673dd7
JD		 1755
1756 superio_select(GPIO);
44c1bcd4 1757
895ff267 1758 reg = superio_inb(IT87_SIO_GPIO3_REG);
0531d98b
GR		 1759 if (sio_data->type == it8721 || sio_data->type == it8728 ||
1760 sio_data->type == it8782) {
16b5dda2 1761 /*
0531d98b
GR		 1762 * IT8721F/IT8758E, and IT8782F don't have VID pins
1763 * at all, not sure about the IT8728F.
16b5dda2 1764 */
895ff267 1765 sio_data->skip_vid = 1;
44c1bcd4
JD		 1766 } else {
1767 /* We need at least 4 VID pins */
1768 if (reg & 0x0f) {
a8ca1037 1769 pr_info("VID is disabled (pins used for GPIO)\n");
44c1bcd4
JD		 1770 sio_data->skip_vid = 1;
1771 }
895ff267
JD		 1772 }
1773
591ec650
JD		 1774 /* Check if fan3 is there or not */
1775 if (reg & (1 << 6))
1776 sio_data->skip_pwm |= (1 << 2);
1777 if (reg & (1 << 7))
1778 sio_data->skip_fan |= (1 << 2);
1779
1780 /* Check if fan2 is there or not */
1781 reg = superio_inb(IT87_SIO_GPIO5_REG);
1782 if (reg & (1 << 1))
1783 sio_data->skip_pwm |= (1 << 1);
1784 if (reg & (1 << 2))
1785 sio_data->skip_fan |= (1 << 1);
1786
895ff267
JD		 1787 if ((sio_data->type == it8718 || sio_data->type == it8720)
1788 && !(sio_data->skip_vid))
b74f3fdd 1789 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
87673dd7
JD		 1790
1791 reg = superio_inb(IT87_SIO_PINX2_REG);
9172b5d1
GR		 1792
1793 uart6 = sio_data->type == it8782 && (reg & (1 << 2));
1794
436cad2a
JD		 1795 /*
1796 * The IT8720F has no VIN7 pin, so VCCH should always be
1797 * routed internally to VIN7 with an internal divider.
1798 * Curiously, there still is a configuration bit to control
1799 * this, which means it can be set incorrectly. And even
1800 * more curiously, many boards out there are improperly
1801 * configured, even though the IT8720F datasheet claims
1802 * that the internal routing of VCCH to VIN7 is the default
1803 * setting. So we force the internal routing in this case.
0531d98b
GR		 1804 *
1805 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
9172b5d1
GR		 1806 * If UART6 is enabled, re-route VIN7 to the internal divider
1807 * if that is not already the case.
436cad2a 1808 */
9172b5d1 1809 if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) {
436cad2a
JD		 1810 reg |= (1 << 1);
1811 superio_outb(IT87_SIO_PINX2_REG, reg);
a8ca1037 1812 pr_notice("Routing internal VCCH to in7\n");
436cad2a 1813 }
87673dd7 1814 if (reg & (1 << 0))
738e5e05 1815 sio_data->internal |= (1 << 0);
16b5dda2
JD		 1816 if ((reg & (1 << 1)) || sio_data->type == it8721 ||
1817 sio_data->type == it8728)
738e5e05 1818 sio_data->internal |= (1 << 1);
d9b327c3 1819
9172b5d1
GR		 1820 /*
1821 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
1822 * While VIN7 can be routed to the internal voltage divider,
1823 * VIN5 and VIN6 are not available if UART6 is enabled.
4573acbc
GR		 1824 *
1825 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
1826 * is the temperature source. Since we can not read the
1827 * temperature source here, skip_temp is preliminary.
9172b5d1 1828 */
4573acbc 1829 if (uart6) {
9172b5d1 1830 sio_data->skip_in |= (1 << 5) | (1 << 6);
4573acbc
GR		 1831 sio_data->skip_temp |= (1 << 2);
1832 }
9172b5d1 1833
d9b327c3 1834 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
87673dd7 1835 }
d9b327c3 1836 if (sio_data->beep_pin)
a8ca1037 1837 pr_info("Beeping is supported\n");
87673dd7 1838
98dd22c3
JD		 1839 /* Disable specific features based on DMI strings */
1840 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
1841 board_name = dmi_get_system_info(DMI_BOARD_NAME);
1842 if (board_vendor && board_name) {
1843 if (strcmp(board_vendor, "nVIDIA") == 0
1844 && strcmp(board_name, "FN68PT") == 0) {
4a0d71cf
GR		 1845 /*
1846 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
1847 * connected to a fan, but to something else. One user
1848 * has reported instant system power-off when changing
1849 * the PWM2 duty cycle, so we disable it.
1850 * I use the board name string as the trigger in case
1851 * the same board is ever used in other systems.
1852 */
a8ca1037 1853 pr_info("Disabling pwm2 due to hardware constraints\n");
98dd22c3
JD		 1854 sio_data->skip_pwm = (1 << 1);
1855 }
1856 }
1857
1da177e4
LT		 1858exit:
1859 superio_exit();
1860 return err;
1861}
1862
723a0aa0
JD		 1863static void it87_remove_files(struct device *dev)
1864{
1865 struct it87_data *data = platform_get_drvdata(pdev);
1866 struct it87_sio_data *sio_data = dev->platform_data;
723a0aa0
JD		 1867 int i;
1868
1869 sysfs_remove_group(&dev->kobj, &it87_group);
9172b5d1
GR		 1870 for (i = 0; i < 9; i++) {
1871 if (sio_data->skip_in & (1 << i))
1872 continue;
1873 sysfs_remove_group(&dev->kobj, &it87_group_in[i]);
1874 if (it87_attributes_in_beep[i])
1875 sysfs_remove_file(&dev->kobj,
1876 it87_attributes_in_beep[i]);
1877 }
4573acbc
GR		 1878 for (i = 0; i < 3; i++) {
1879 if (!(data->has_temp & (1 << i)))
1880 continue;
1881 sysfs_remove_group(&dev->kobj, &it87_group_temp[i]);
161d898a
GR		 1882 if (has_temp_offset(data))
1883 sysfs_remove_file(&dev->kobj,
1884 it87_attributes_temp_offset[i]);
4573acbc
GR		 1885 if (sio_data->beep_pin)
1886 sysfs_remove_file(&dev->kobj,
1887 it87_attributes_temp_beep[i]);
1888 }
723a0aa0
JD		 1889 for (i = 0; i < 5; i++) {
1890 if (!(data->has_fan & (1 << i)))
1891 continue;
e1169ba0 1892 sysfs_remove_group(&dev->kobj, &it87_group_fan[i]);
d9b327c3
JD		 1893 if (sio_data->beep_pin)
1894 sysfs_remove_file(&dev->kobj,
1895 it87_attributes_fan_beep[i]);
e1169ba0
GR		 1896 if (i < 3 && !has_16bit_fans(data))
1897 sysfs_remove_file(&dev->kobj,
1898 it87_attributes_fan_div[i]);
723a0aa0
JD		 1899 }
1900 for (i = 0; i < 3; i++) {
1901 if (sio_data->skip_pwm & (1 << 0))
1902 continue;
1903 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
4f3f51bc
JD		 1904 if (has_old_autopwm(data))
1905 sysfs_remove_group(&dev->kobj,
1906 &it87_group_autopwm[i]);
723a0aa0 1907 }
6a8d7acf
JD		 1908 if (!sio_data->skip_vid)
1909 sysfs_remove_group(&dev->kobj, &it87_group_vid);
738e5e05 1910 sysfs_remove_group(&dev->kobj, &it87_group_label);
723a0aa0
JD		 1911}
1912
6c931ae1 1913static int it87_probe(struct platform_device *pdev)
1da177e4 1914{
1da177e4 1915 struct it87_data *data;
b74f3fdd 1916 struct resource *res;
1917 struct device *dev = &pdev->dev;
1918 struct it87_sio_data *sio_data = dev->platform_data;
723a0aa0 1919 int err = 0, i;
1da177e4 1920 int enable_pwm_interface;
d9b327c3 1921 int fan_beep_need_rw;
3c4c4971 1922 static const char * const names[] = {
b74f3fdd 1923 "it87",
1924 "it8712",
1925 "it8716",
1926 "it8718",
b4da93e4 1927 "it8720",
44c1bcd4 1928 "it8721",
16b5dda2 1929 "it8728",
0531d98b
GR		 1930 "it8782",
1931 "it8783",
b74f3fdd 1932 };
1933
1934 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
62a1d05f
GR		 1935 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
1936 DRVNAME)) {
b74f3fdd 1937 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1938 (unsigned long)res->start,
87b4b663 1939 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
62a1d05f 1940 return -EBUSY;
8e9afcbb 1941 }
1da177e4 1942
62a1d05f
GR		 1943 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
1944 if (!data)
1945 return -ENOMEM;
1da177e4 1946
b74f3fdd 1947 data->addr = res->start;
1948 data->type = sio_data->type;
0475169c 1949 data->revision = sio_data->revision;
b74f3fdd 1950 data->name = names[sio_data->type];
1da177e4
LT		 1951
1952 /* Now, we do the remaining detection. */
b74f3fdd 1953 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
62a1d05f
GR		 1954 || it87_read_value(data, IT87_REG_CHIPID) != 0x90)
1955 return -ENODEV;
1da177e4 1956
b74f3fdd 1957 platform_set_drvdata(pdev, data);
1da177e4 1958
9a61bf63 1959 mutex_init(&data->update_lock);
1da177e4 1960
1da177e4 1961 /* Check PWM configuration */
b74f3fdd 1962 enable_pwm_interface = it87_check_pwm(dev);
1da177e4 1963
44c1bcd4 1964 /* Starting with IT8721F, we handle scaling of internal voltages */
16b5dda2 1965 if (has_12mv_adc(data)) {
44c1bcd4
JD		 1966 if (sio_data->internal & (1 << 0))
1967 data->in_scaled |= (1 << 3); /* in3 is AVCC */
1968 if (sio_data->internal & (1 << 1))
1969 data->in_scaled |= (1 << 7); /* in7 is VSB */
1970 if (sio_data->internal & (1 << 2))
1971 data->in_scaled |= (1 << 8); /* in8 is Vbat */
0531d98b
GR		 1972 } else if (sio_data->type == it8782 || sio_data->type == it8783) {
1973 if (sio_data->internal & (1 << 0))
1974 data->in_scaled |= (1 << 3); /* in3 is VCC5V */
1975 if (sio_data->internal & (1 << 1))
1976 data->in_scaled |= (1 << 7); /* in7 is VCCH5V */
44c1bcd4
JD		 1977 }
1978
4573acbc
GR		 1979 data->has_temp = 0x07;
1980 if (sio_data->skip_temp & (1 << 2)) {
1981 if (sio_data->type == it8782
1982 && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
1983 data->has_temp &= ~(1 << 2);
1984 }
1985
1da177e4 1986 /* Initialize the IT87 chip */
b74f3fdd 1987 it87_init_device(pdev);
1da177e4
LT		 1988
1989 /* Register sysfs hooks */
5f2dc798
JD		 1990 err = sysfs_create_group(&dev->kobj, &it87_group);
1991 if (err)
62a1d05f 1992 return err;
17d648bf 1993
9172b5d1
GR		 1994 for (i = 0; i < 9; i++) {
1995 if (sio_data->skip_in & (1 << i))
1996 continue;
1997 err = sysfs_create_group(&dev->kobj, &it87_group_in[i]);
1998 if (err)
62a1d05f 1999 goto error;
9172b5d1
GR		 2000 if (sio_data->beep_pin && it87_attributes_in_beep[i]) {
2001 err = sysfs_create_file(&dev->kobj,
2002 it87_attributes_in_beep[i]);
2003 if (err)
62a1d05f 2004 goto error;
9172b5d1
GR		 2005 }
2006 }
2007
4573acbc
GR		 2008 for (i = 0; i < 3; i++) {
2009 if (!(data->has_temp & (1 << i)))
2010 continue;
2011 err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]);
d9b327c3 2012 if (err)
62a1d05f 2013 goto error;
161d898a
GR		 2014 if (has_temp_offset(data)) {
2015 err = sysfs_create_file(&dev->kobj,
2016 it87_attributes_temp_offset[i]);
2017 if (err)
2018 goto error;
2019 }
4573acbc
GR		 2020 if (sio_data->beep_pin) {
2021 err = sysfs_create_file(&dev->kobj,
2022 it87_attributes_temp_beep[i]);
2023 if (err)
2024 goto error;
2025 }
d9b327c3
JD		 2026 }
2027
9060f8bd 2028 /* Do not create fan files for disabled fans */
d9b327c3 2029 fan_beep_need_rw = 1;
723a0aa0
JD		 2030 for (i = 0; i < 5; i++) {
2031 if (!(data->has_fan & (1 << i)))
2032 continue;
e1169ba0 2033 err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]);
723a0aa0 2034 if (err)
62a1d05f 2035 goto error;
d9b327c3 2036
e1169ba0
GR		 2037 if (i < 3 && !has_16bit_fans(data)) {
2038 err = sysfs_create_file(&dev->kobj,
2039 it87_attributes_fan_div[i]);
2040 if (err)
2041 goto error;
2042 }
2043
d9b327c3
JD		 2044 if (sio_data->beep_pin) {
2045 err = sysfs_create_file(&dev->kobj,
2046 it87_attributes_fan_beep[i]);
2047 if (err)
62a1d05f 2048 goto error;
d9b327c3
JD		 2049 if (!fan_beep_need_rw)
2050 continue;
2051
4a0d71cf
GR		 2052 /*
2053 * As we have a single beep enable bit for all fans,
d9b327c3 2054 * only the first enabled fan has a writable attribute
4a0d71cf
GR		 2055 * for it.
2056 */
d9b327c3
JD		 2057 if (sysfs_chmod_file(&dev->kobj,
2058 it87_attributes_fan_beep[i],
2059 S_IRUGO | S_IWUSR))
2060 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
2061 i + 1);
2062 fan_beep_need_rw = 0;
2063 }
17d648bf
JD		 2064 }
2065
1da177e4 2066 if (enable_pwm_interface) {
723a0aa0
JD		 2067 for (i = 0; i < 3; i++) {
2068 if (sio_data->skip_pwm & (1 << i))
2069 continue;
2070 err = sysfs_create_group(&dev->kobj,
2071 &it87_group_pwm[i]);
2072 if (err)
62a1d05f 2073 goto error;
4f3f51bc
JD		 2074
2075 if (!has_old_autopwm(data))
2076 continue;
2077 err = sysfs_create_group(&dev->kobj,
2078 &it87_group_autopwm[i]);
2079 if (err)
62a1d05f 2080 goto error;
98dd22c3 2081 }
1da177e4
LT		 2082 }
2083
895ff267 2084 if (!sio_data->skip_vid) {
303760b4 2085 data->vrm = vid_which_vrm();
87673dd7 2086 /* VID reading from Super-I/O config space if available */
b74f3fdd 2087 data->vid = sio_data->vid_value;
6a8d7acf
JD		 2088 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
2089 if (err)
62a1d05f 2090 goto error;
87808be4
JD		 2091 }
2092
738e5e05
JD		 2093 /* Export labels for internal sensors */
2094 for (i = 0; i < 3; i++) {
2095 if (!(sio_data->internal & (1 << i)))
2096 continue;
2097 err = sysfs_create_file(&dev->kobj,
2098 it87_attributes_label[i]);
2099 if (err)
62a1d05f 2100 goto error;
738e5e05
JD		 2101 }
2102
1beeffe4
TJ		 2103 data->hwmon_dev = hwmon_device_register(dev);
2104 if (IS_ERR(data->hwmon_dev)) {
2105 err = PTR_ERR(data->hwmon_dev);
62a1d05f 2106 goto error;
1da177e4
LT		 2107 }
2108
2109 return 0;
2110
62a1d05f 2111error:
723a0aa0 2112 it87_remove_files(dev);
1da177e4
LT		 2113 return err;
2114}
2115
281dfd0b 2116static int it87_remove(struct platform_device *pdev)
1da177e4 2117{
b74f3fdd 2118 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2119
1beeffe4 2120 hwmon_device_unregister(data->hwmon_dev);
723a0aa0 2121 it87_remove_files(&pdev->dev);
943b0830 2122
1da177e4
LT		 2123 return 0;
2124}
2125
4a0d71cf
GR		 2126/*
2127 * Must be called with data->update_lock held, except during initialization.
2128 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2129 * would slow down the IT87 access and should not be necessary.
2130 */
b74f3fdd 2131static int it87_read_value(struct it87_data *data, u8 reg)
1da177e4 2132{
b74f3fdd 2133 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2134 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT		 2135}
2136
4a0d71cf
GR		 2137/*
2138 * Must be called with data->update_lock held, except during initialization.
2139 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2140 * would slow down the IT87 access and should not be necessary.
2141 */
b74f3fdd 2142static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
1da177e4 2143{
b74f3fdd 2144 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2145 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
1da177e4
LT		 2146}
2147
2148/* Return 1 if and only if the PWM interface is safe to use */
6c931ae1 2149static int it87_check_pwm(struct device *dev)
1da177e4 2150{
b74f3fdd 2151 struct it87_data *data = dev_get_drvdata(dev);
4a0d71cf
GR		 2152 /*
2153 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
1da177e4 2154 * and polarity set to active low is sign that this is the case so we
4a0d71cf
GR		 2155 * disable pwm control to protect the user.
2156 */
b74f3fdd 2157 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1da177e4
LT		 2158 if ((tmp & 0x87) == 0) {
2159 if (fix_pwm_polarity) {
4a0d71cf
GR		 2160 /*
2161 * The user asks us to attempt a chip reconfiguration.
1da177e4 2162 * This means switching to active high polarity and
4a0d71cf
GR		 2163 * inverting all fan speed values.
2164 */
1da177e4
LT		 2165 int i;
2166 u8 pwm[3];
2167
2168 for (i = 0; i < 3; i++)
b74f3fdd 2169 pwm[i] = it87_read_value(data,
1da177e4
LT		 2170 IT87_REG_PWM(i));
2171
4a0d71cf
GR		 2172 /*
2173 * If any fan is in automatic pwm mode, the polarity
1da177e4
LT		 2174 * might be correct, as suspicious as it seems, so we
2175 * better don't change anything (but still disable the
4a0d71cf
GR		 2176 * PWM interface).
2177 */
1da177e4 2178 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
1d9bcf6a
GR		 2179 dev_info(dev,
2180 "Reconfiguring PWM to active high polarity\n");
b74f3fdd 2181 it87_write_value(data, IT87_REG_FAN_CTL,
1da177e4
LT		 2182 tmp | 0x87);
2183 for (i = 0; i < 3; i++)
b74f3fdd 2184 it87_write_value(data,
1da177e4
LT		 2185 IT87_REG_PWM(i),
2186 0x7f & ~pwm[i]);
2187 return 1;
2188 }
2189
1d9bcf6a
GR		 2190 dev_info(dev,
2191 "PWM configuration is too broken to be fixed\n");
1da177e4
LT		 2192 }
2193
1d9bcf6a
GR		 2194 dev_info(dev,
2195 "Detected broken BIOS defaults, disabling PWM interface\n");
1da177e4
LT		 2196 return 0;
2197 } else if (fix_pwm_polarity) {
1d9bcf6a
GR		 2198 dev_info(dev,
2199 "PWM configuration looks sane, won't touch\n");
1da177e4
LT		 2200 }
2201
2202 return 1;
2203}
2204
2205/* Called when we have found a new IT87. */
6c931ae1 2206static void it87_init_device(struct platform_device *pdev)
1da177e4 2207{
591ec650 2208 struct it87_sio_data *sio_data = pdev->dev.platform_data;
b74f3fdd 2209 struct it87_data *data = platform_get_drvdata(pdev);
1da177e4 2210 int tmp, i;
591ec650 2211 u8 mask;
1da177e4 2212
4a0d71cf
GR		 2213 /*
2214 * For each PWM channel:
b99883dc
JD		 2215 * - If it is in automatic mode, setting to manual mode should set
2216 * the fan to full speed by default.
2217 * - If it is in manual mode, we need a mapping to temperature
2218 * channels to use when later setting to automatic mode later.
2219 * Use a 1:1 mapping by default (we are clueless.)
2220 * In both cases, the value can (and should) be changed by the user
6229cdb2
JD		 2221 * prior to switching to a different mode.
2222 * Note that this is no longer needed for the IT8721F and later, as
2223 * these have separate registers for the temperature mapping and the
4a0d71cf
GR		 2224 * manual duty cycle.
2225 */
1da177e4 2226 for (i = 0; i < 3; i++) {
b99883dc
JD		 2227 data->pwm_temp_map[i] = i;
2228 data->pwm_duty[i] = 0x7f; /* Full speed */
4f3f51bc 2229 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
1da177e4
LT		 2230 }
2231
4a0d71cf
GR		 2232 /*
2233 * Some chips seem to have default value 0xff for all limit
c5df9b7a
JD		 2234 * registers. For low voltage limits it makes no sense and triggers
2235 * alarms, so change to 0 instead. For high temperature limits, it
2236 * means -1 degree C, which surprisingly doesn't trigger an alarm,
4a0d71cf
GR		 2237 * but is still confusing, so change to 127 degrees C.
2238 */
c5df9b7a 2239 for (i = 0; i < 8; i++) {
b74f3fdd 2240 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
c5df9b7a 2241 if (tmp == 0xff)
b74f3fdd 2242 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
c5df9b7a
JD		 2243 }
2244 for (i = 0; i < 3; i++) {
b74f3fdd 2245 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
c5df9b7a 2246 if (tmp == 0xff)
b74f3fdd 2247 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
c5df9b7a
JD		 2248 }
2249
4a0d71cf
GR		 2250 /*
2251 * Temperature channels are not forcibly enabled, as they can be
a00afb97
JD		 2252 * set to two different sensor types and we can't guess which one
2253 * is correct for a given system. These channels can be enabled at
4a0d71cf
GR		 2254 * run-time through the temp{1-3}_type sysfs accessors if needed.
2255 */
1da177e4
LT		 2256
2257 /* Check if voltage monitors are reset manually or by some reason */
b74f3fdd 2258 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
1da177e4
LT		 2259 if ((tmp & 0xff) == 0) {
2260 /* Enable all voltage monitors */
b74f3fdd 2261 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
1da177e4
LT		 2262 }
2263
2264 /* Check if tachometers are reset manually or by some reason */
591ec650 2265 mask = 0x70 & ~(sio_data->skip_fan << 4);
b74f3fdd 2266 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
591ec650 2267 if ((data->fan_main_ctrl & mask) == 0) {
1da177e4 2268 /* Enable all fan tachometers */
591ec650 2269 data->fan_main_ctrl |= mask;
5f2dc798
JD		 2270 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2271 data->fan_main_ctrl);
1da177e4 2272 }
9060f8bd 2273 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
1da177e4 2274
17d648bf 2275 /* Set tachometers to 16-bit mode if needed */
0475169c 2276 if (has_16bit_fans(data)) {
b74f3fdd 2277 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
9060f8bd 2278 if (~tmp & 0x07 & data->has_fan) {
b74f3fdd 2279 dev_dbg(&pdev->dev,
17d648bf 2280 "Setting fan1-3 to 16-bit mode\n");
b74f3fdd 2281 it87_write_value(data, IT87_REG_FAN_16BIT,
17d648bf
JD		 2282 tmp | 0x07);
2283 }
0531d98b
GR		 2284 /* IT8705F, IT8782F, and IT8783E/F only support three fans. */
2285 if (data->type != it87 && data->type != it8782 &&
2286 data->type != it8783) {
816d8c6a
AP		 2287 if (tmp & (1 << 4))
2288 data->has_fan |= (1 << 3); /* fan4 enabled */
2289 if (tmp & (1 << 5))
2290 data->has_fan |= (1 << 4); /* fan5 enabled */
2291 }
17d648bf
JD		 2292 }
2293
591ec650
JD		 2294 /* Fan input pins may be used for alternative functions */
2295 data->has_fan &= ~sio_data->skip_fan;
2296
1da177e4 2297 /* Start monitoring */
b74f3fdd 2298 it87_write_value(data, IT87_REG_CONFIG,
41002f8d 2299 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
1da177e4
LT		 2300 | (update_vbat ? 0x41 : 0x01));
2301}
2302
b99883dc
JD		 2303static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
2304{
2305 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
16b5dda2 2306 if (has_newer_autopwm(data)) {
b99883dc 2307 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
6229cdb2
JD		 2308 data->pwm_duty[nr] = it87_read_value(data,
2309 IT87_REG_PWM_DUTY(nr));
2310 } else {
2311 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
2312 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2313 else /* Manual mode */
2314 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
2315 }
4f3f51bc
JD		 2316
2317 if (has_old_autopwm(data)) {
2318 int i;
2319
2320 for (i = 0; i < 5 ; i++)
2321 data->auto_temp[nr][i] = it87_read_value(data,
2322 IT87_REG_AUTO_TEMP(nr, i));
2323 for (i = 0; i < 3 ; i++)
2324 data->auto_pwm[nr][i] = it87_read_value(data,
2325 IT87_REG_AUTO_PWM(nr, i));
2326 }
b99883dc
JD		 2327}
2328
1da177e4
LT		 2329static struct it87_data *it87_update_device(struct device *dev)
2330{
b74f3fdd 2331 struct it87_data *data = dev_get_drvdata(dev);
1da177e4
LT		 2332 int i;
2333
9a61bf63 2334 mutex_lock(&data->update_lock);
1da177e4
LT		 2335
2336 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
2337 || !data->valid) {
1da177e4 2338 if (update_vbat) {
4a0d71cf
GR		 2339 /*
2340 * Cleared after each update, so reenable. Value
2341 * returned by this read will be previous value
2342 */
b74f3fdd 2343 it87_write_value(data, IT87_REG_CONFIG,
5f2dc798 2344 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1da177e4
LT		 2345 }
2346 for (i = 0; i <= 7; i++) {
929c6a56 2347 data->in[i][0] =
5f2dc798 2348 it87_read_value(data, IT87_REG_VIN(i));
929c6a56 2349 data->in[i][1] =
5f2dc798 2350 it87_read_value(data, IT87_REG_VIN_MIN(i));
929c6a56 2351 data->in[i][2] =
5f2dc798 2352 it87_read_value(data, IT87_REG_VIN_MAX(i));
1da177e4 2353 }
3543a53f 2354 /* in8 (battery) has no limit registers */
929c6a56 2355 data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8));
1da177e4 2356
c7f1f716 2357 for (i = 0; i < 5; i++) {
9060f8bd
JD		 2358 /* Skip disabled fans */
2359 if (!(data->has_fan & (1 << i)))
2360 continue;
2361
e1169ba0 2362 data->fan[i][1] =
5f2dc798 2363 it87_read_value(data, IT87_REG_FAN_MIN[i]);
e1169ba0 2364 data->fan[i][0] = it87_read_value(data,
c7f1f716 2365 IT87_REG_FAN[i]);
17d648bf 2366 /* Add high byte if in 16-bit mode */
0475169c 2367 if (has_16bit_fans(data)) {
e1169ba0 2368 data->fan[i][0] |= it87_read_value(data,
c7f1f716 2369 IT87_REG_FANX[i]) << 8;
e1169ba0 2370 data->fan[i][1] |= it87_read_value(data,
c7f1f716 2371 IT87_REG_FANX_MIN[i]) << 8;
17d648bf 2372 }
1da177e4
LT		 2373 }
2374 for (i = 0; i < 3; i++) {
4573acbc
GR		 2375 if (!(data->has_temp & (1 << i)))
2376 continue;
60ca385a 2377 data->temp[i][0] =
5f2dc798 2378 it87_read_value(data, IT87_REG_TEMP(i));
60ca385a 2379 data->temp[i][1] =
5f2dc798 2380 it87_read_value(data, IT87_REG_TEMP_LOW(i));
60ca385a
GR		 2381 data->temp[i][2] =
2382 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
161d898a
GR		 2383 if (has_temp_offset(data))
2384 data->temp[i][3] =
2385 it87_read_value(data,
2386 IT87_REG_TEMP_OFFSET[i]);
1da177e4
LT		 2387 }
2388
17d648bf 2389 /* Newer chips don't have clock dividers */
0475169c 2390 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
b74f3fdd 2391 i = it87_read_value(data, IT87_REG_FAN_DIV);
17d648bf
JD		 2392 data->fan_div[0] = i & 0x07;
2393 data->fan_div[1] = (i >> 3) & 0x07;
2394 data->fan_div[2] = (i & 0x40) ? 3 : 1;
2395 }
1da177e4
LT		 2396
2397 data->alarms =
b74f3fdd 2398 it87_read_value(data, IT87_REG_ALARM1) |
2399 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
2400 (it87_read_value(data, IT87_REG_ALARM3) << 16);
d9b327c3 2401 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
b99883dc 2402
b74f3fdd 2403 data->fan_main_ctrl = it87_read_value(data,
2404 IT87_REG_FAN_MAIN_CTRL);
2405 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
b99883dc
JD		 2406 for (i = 0; i < 3; i++)
2407 it87_update_pwm_ctrl(data, i);
b74f3fdd 2408
2409 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
4a0d71cf
GR		 2410 /*
2411 * The IT8705F does not have VID capability.
2412 * The IT8718F and later don't use IT87_REG_VID for the
2413 * same purpose.
2414 */
17d648bf 2415 if (data->type == it8712 || data->type == it8716) {
b74f3fdd 2416 data->vid = it87_read_value(data, IT87_REG_VID);
4a0d71cf
GR		 2417 /*
2418 * The older IT8712F revisions had only 5 VID pins,
2419 * but we assume it is always safe to read 6 bits.
2420 */
17d648bf 2421 data->vid &= 0x3f;
1da177e4
LT		 2422 }
2423 data->last_updated = jiffies;
2424 data->valid = 1;
2425 }
2426
9a61bf63 2427 mutex_unlock(&data->update_lock);
1da177e4
LT		 2428
2429 return data;
2430}
2431
b74f3fdd 2432static int __init it87_device_add(unsigned short address,
2433 const struct it87_sio_data *sio_data)
2434{
2435 struct resource res = {
87b4b663
BH		 2436 .start = address + IT87_EC_OFFSET,
2437 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
b74f3fdd 2438 .name = DRVNAME,
2439 .flags = IORESOURCE_IO,
2440 };
2441 int err;
2442
b9acb64a
JD		 2443 err = acpi_check_resource_conflict(&res);
2444 if (err)
2445 goto exit;
2446
b74f3fdd 2447 pdev = platform_device_alloc(DRVNAME, address);
2448 if (!pdev) {
2449 err = -ENOMEM;
a8ca1037 2450 pr_err("Device allocation failed\n");
b74f3fdd 2451 goto exit;
2452 }
2453
2454 err = platform_device_add_resources(pdev, &res, 1);
2455 if (err) {
a8ca1037 2456 pr_err("Device resource addition failed (%d)\n", err);
b74f3fdd 2457 goto exit_device_put;
2458 }
2459
2460 err = platform_device_add_data(pdev, sio_data,
2461 sizeof(struct it87_sio_data));
2462 if (err) {
a8ca1037 2463 pr_err("Platform data allocation failed\n");
b74f3fdd 2464 goto exit_device_put;
2465 }
2466
2467 err = platform_device_add(pdev);
2468 if (err) {
a8ca1037 2469 pr_err("Device addition failed (%d)\n", err);
b74f3fdd 2470 goto exit_device_put;
2471 }
2472
2473 return 0;
2474
2475exit_device_put:
2476 platform_device_put(pdev);
2477exit:
2478 return err;
2479}
2480
1da177e4
LT		 2481static int __init sm_it87_init(void)
2482{
b74f3fdd 2483 int err;
5f2dc798 2484 unsigned short isa_address = 0;
b74f3fdd 2485 struct it87_sio_data sio_data;
2486
98dd22c3 2487 memset(&sio_data, 0, sizeof(struct it87_sio_data));
b74f3fdd 2488 err = it87_find(&isa_address, &sio_data);
2489 if (err)
2490 return err;
2491 err = platform_driver_register(&it87_driver);
2492 if (err)
2493 return err;
fde09509 2494
b74f3fdd 2495 err = it87_device_add(isa_address, &sio_data);
5f2dc798 2496 if (err) {
b74f3fdd 2497 platform_driver_unregister(&it87_driver);
2498 return err;
2499 }
2500
2501 return 0;
1da177e4
LT		 2502}
2503
2504static void __exit sm_it87_exit(void)
2505{
b74f3fdd 2506 platform_device_unregister(pdev);
2507 platform_driver_unregister(&it87_driver);
1da177e4
LT		 2508}
2509
2510
1d9bcf6a 2511MODULE_AUTHOR("Chris Gauthron, Jean Delvare <khali@linux-fr.org>");
44c1bcd4 2512MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
1da177e4
LT		 2513module_param(update_vbat, bool, 0);
2514MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2515module_param(fix_pwm_polarity, bool, 0);
5f2dc798
JD		 2516MODULE_PARM_DESC(fix_pwm_polarity,
2517 "Force PWM polarity to active high (DANGEROUS)");
1da177e4
LT		 2518MODULE_LICENSE("GPL");
2519
2520module_init(sm_it87_init);
2521module_exit(sm_it87_exit);
Linux 6.x block layer and io_uring tree(s)