hwmon: (sch5627) Use permission specific SENSOR[_DEVICE]_ATTR variants
[linux-2.6-block.git] / drivers / hwmon / ina3221.c
CommitLineData
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1/*
2 * INA3221 Triple Current/Voltage Monitor
3 *
4 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
5 * Andrew F. Davis <afd@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 */
16
17#include <linux/hwmon.h>
18#include <linux/hwmon-sysfs.h>
19#include <linux/i2c.h>
20#include <linux/module.h>
87625b24 21#include <linux/mutex.h>
7cb6dcff 22#include <linux/of.h>
323aeb0e 23#include <linux/pm_runtime.h>
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24#include <linux/regmap.h>
25
26#define INA3221_DRIVER_NAME "ina3221"
27
28#define INA3221_CONFIG 0x00
29#define INA3221_SHUNT1 0x01
30#define INA3221_BUS1 0x02
31#define INA3221_SHUNT2 0x03
32#define INA3221_BUS2 0x04
33#define INA3221_SHUNT3 0x05
34#define INA3221_BUS3 0x06
35#define INA3221_CRIT1 0x07
36#define INA3221_WARN1 0x08
37#define INA3221_CRIT2 0x09
38#define INA3221_WARN2 0x0a
39#define INA3221_CRIT3 0x0b
40#define INA3221_WARN3 0x0c
41#define INA3221_MASK_ENABLE 0x0f
42
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43#define INA3221_CONFIG_MODE_MASK GENMASK(2, 0)
44#define INA3221_CONFIG_MODE_POWERDOWN 0
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45#define INA3221_CONFIG_MODE_SHUNT BIT(0)
46#define INA3221_CONFIG_MODE_BUS BIT(1)
47#define INA3221_CONFIG_MODE_CONTINUOUS BIT(2)
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48#define INA3221_CONFIG_VSH_CT_SHIFT 3
49#define INA3221_CONFIG_VSH_CT_MASK GENMASK(5, 3)
50#define INA3221_CONFIG_VSH_CT(x) (((x) & GENMASK(5, 3)) >> 3)
51#define INA3221_CONFIG_VBUS_CT_SHIFT 6
52#define INA3221_CONFIG_VBUS_CT_MASK GENMASK(8, 6)
53#define INA3221_CONFIG_VBUS_CT(x) (((x) & GENMASK(8, 6)) >> 6)
54#define INA3221_CONFIG_CHs_EN_MASK GENMASK(14, 12)
a9e9dd9c 55#define INA3221_CONFIG_CHx_EN(x) BIT(14 - (x))
7cb6dcff 56
323aeb0e 57#define INA3221_CONFIG_DEFAULT 0x7127
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58#define INA3221_RSHUNT_DEFAULT 10000
59
60enum ina3221_fields {
61 /* Configuration */
62 F_RST,
63
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64 /* Status Flags */
65 F_CVRF,
66
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67 /* Alert Flags */
68 F_WF3, F_WF2, F_WF1,
69 F_CF3, F_CF2, F_CF1,
70
71 /* sentinel */
72 F_MAX_FIELDS
73};
74
75static const struct reg_field ina3221_reg_fields[] = {
76 [F_RST] = REG_FIELD(INA3221_CONFIG, 15, 15),
77
4c0415a3 78 [F_CVRF] = REG_FIELD(INA3221_MASK_ENABLE, 0, 0),
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79 [F_WF3] = REG_FIELD(INA3221_MASK_ENABLE, 3, 3),
80 [F_WF2] = REG_FIELD(INA3221_MASK_ENABLE, 4, 4),
81 [F_WF1] = REG_FIELD(INA3221_MASK_ENABLE, 5, 5),
82 [F_CF3] = REG_FIELD(INA3221_MASK_ENABLE, 7, 7),
83 [F_CF2] = REG_FIELD(INA3221_MASK_ENABLE, 8, 8),
84 [F_CF1] = REG_FIELD(INA3221_MASK_ENABLE, 9, 9),
85};
86
87enum ina3221_channels {
88 INA3221_CHANNEL1,
89 INA3221_CHANNEL2,
90 INA3221_CHANNEL3,
91 INA3221_NUM_CHANNELS
92};
93
a9e9dd9c
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94/**
95 * struct ina3221_input - channel input source specific information
96 * @label: label of channel input source
97 * @shunt_resistor: shunt resistor value of channel input source
98 * @disconnected: connection status of channel input source
99 */
100struct ina3221_input {
101 const char *label;
102 int shunt_resistor;
103 bool disconnected;
104};
105
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106/**
107 * struct ina3221_data - device specific information
323aeb0e 108 * @pm_dev: Device pointer for pm runtime
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109 * @regmap: Register map of the device
110 * @fields: Register fields of the device
a9e9dd9c 111 * @inputs: Array of channel input source specific structures
87625b24 112 * @lock: mutex lock to serialize sysfs attribute accesses
59d608e1 113 * @reg_config: Register value of INA3221_CONFIG
43dece16 114 * @single_shot: running in single-shot operating mode
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115 */
116struct ina3221_data {
323aeb0e 117 struct device *pm_dev;
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118 struct regmap *regmap;
119 struct regmap_field *fields[F_MAX_FIELDS];
a9e9dd9c 120 struct ina3221_input inputs[INA3221_NUM_CHANNELS];
87625b24 121 struct mutex lock;
59d608e1 122 u32 reg_config;
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123
124 bool single_shot;
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125};
126
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127static inline bool ina3221_is_enabled(struct ina3221_data *ina, int channel)
128{
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129 return pm_runtime_active(ina->pm_dev) &&
130 (ina->reg_config & INA3221_CONFIG_CHx_EN(channel));
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131}
132
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133/* Lookup table for Bus and Shunt conversion times in usec */
134static const u16 ina3221_conv_time[] = {
135 140, 204, 332, 588, 1100, 2116, 4156, 8244,
136};
137
138static inline int ina3221_wait_for_data(struct ina3221_data *ina)
139{
140 u32 channels = hweight16(ina->reg_config & INA3221_CONFIG_CHs_EN_MASK);
141 u32 vbus_ct_idx = INA3221_CONFIG_VBUS_CT(ina->reg_config);
142 u32 vsh_ct_idx = INA3221_CONFIG_VSH_CT(ina->reg_config);
143 u32 vbus_ct = ina3221_conv_time[vbus_ct_idx];
144 u32 vsh_ct = ina3221_conv_time[vsh_ct_idx];
145 u32 wait, cvrf;
146
147 /* Calculate total conversion time */
148 wait = channels * (vbus_ct + vsh_ct);
149
150 /* Polling the CVRF bit to make sure read data is ready */
151 return regmap_field_read_poll_timeout(ina->fields[F_CVRF],
152 cvrf, cvrf, wait, 100000);
153}
154
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155static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg,
156 int *val)
157{
158 unsigned int regval;
159 int ret;
160
161 ret = regmap_read(ina->regmap, reg, &regval);
162 if (ret)
163 return ret;
164
165 *val = sign_extend32(regval >> 3, 12);
166
167 return 0;
168}
169
170static const u8 ina3221_in_reg[] = {
171 INA3221_BUS1,
172 INA3221_BUS2,
173 INA3221_BUS3,
174 INA3221_SHUNT1,
175 INA3221_SHUNT2,
176 INA3221_SHUNT3,
177};
178
179static int ina3221_read_in(struct device *dev, u32 attr, int channel, long *val)
180{
181 const bool is_shunt = channel > INA3221_CHANNEL3;
182 struct ina3221_data *ina = dev_get_drvdata(dev);
183 u8 reg = ina3221_in_reg[channel];
184 int regval, ret;
185
186 /* Translate shunt channel index to sensor channel index */
187 channel %= INA3221_NUM_CHANNELS;
188
189 switch (attr) {
190 case hwmon_in_input:
191 if (!ina3221_is_enabled(ina, channel))
192 return -ENODATA;
193
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194 /* Write CONFIG register to trigger a single-shot measurement */
195 if (ina->single_shot)
196 regmap_write(ina->regmap, INA3221_CONFIG,
197 ina->reg_config);
198
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199 ret = ina3221_wait_for_data(ina);
200 if (ret)
201 return ret;
202
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203 ret = ina3221_read_value(ina, reg, &regval);
204 if (ret)
205 return ret;
206
207 /*
208 * Scale of shunt voltage (uV): LSB is 40uV
209 * Scale of bus voltage (mV): LSB is 8mV
210 */
211 *val = regval * (is_shunt ? 40 : 8);
212 return 0;
213 case hwmon_in_enable:
214 *val = ina3221_is_enabled(ina, channel);
215 return 0;
216 default:
217 return -EOPNOTSUPP;
218 }
219}
220
221static const u8 ina3221_curr_reg[][INA3221_NUM_CHANNELS] = {
222 [hwmon_curr_input] = { INA3221_SHUNT1, INA3221_SHUNT2, INA3221_SHUNT3 },
223 [hwmon_curr_max] = { INA3221_WARN1, INA3221_WARN2, INA3221_WARN3 },
224 [hwmon_curr_crit] = { INA3221_CRIT1, INA3221_CRIT2, INA3221_CRIT3 },
225 [hwmon_curr_max_alarm] = { F_WF1, F_WF2, F_WF3 },
226 [hwmon_curr_crit_alarm] = { F_CF1, F_CF2, F_CF3 },
227};
228
229static int ina3221_read_curr(struct device *dev, u32 attr,
230 int channel, long *val)
a9e9dd9c 231{
a9e9dd9c 232 struct ina3221_data *ina = dev_get_drvdata(dev);
a9e9dd9c 233 struct ina3221_input *input = &ina->inputs[channel];
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234 int resistance_uo = input->shunt_resistor;
235 u8 reg = ina3221_curr_reg[attr][channel];
236 int regval, voltage_nv, ret;
237
238 switch (attr) {
239 case hwmon_curr_input:
240 if (!ina3221_is_enabled(ina, channel))
241 return -ENODATA;
4c0415a3 242
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243 /* Write CONFIG register to trigger a single-shot measurement */
244 if (ina->single_shot)
245 regmap_write(ina->regmap, INA3221_CONFIG,
246 ina->reg_config);
247
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248 ret = ina3221_wait_for_data(ina);
249 if (ret)
250 return ret;
251
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252 /* fall through */
253 case hwmon_curr_crit:
254 case hwmon_curr_max:
255 ret = ina3221_read_value(ina, reg, &regval);
256 if (ret)
257 return ret;
a9e9dd9c 258
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259 /* Scale of shunt voltage: LSB is 40uV (40000nV) */
260 voltage_nv = regval * 40000;
261 /* Return current in mA */
262 *val = DIV_ROUND_CLOSEST(voltage_nv, resistance_uo);
263 return 0;
264 case hwmon_curr_crit_alarm:
265 case hwmon_curr_max_alarm:
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266 /* No actual register read if channel is disabled */
267 if (!ina3221_is_enabled(ina, channel)) {
268 /* Return 0 for alert flags */
269 *val = 0;
270 return 0;
271 }
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272 ret = regmap_field_read(ina->fields[reg], &regval);
273 if (ret)
274 return ret;
275 *val = regval;
276 return 0;
277 default:
278 return -EOPNOTSUPP;
279 }
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280}
281
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282static int ina3221_write_curr(struct device *dev, u32 attr,
283 int channel, long val)
a9e9dd9c 284{
a9e9dd9c 285 struct ina3221_data *ina = dev_get_drvdata(dev);
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286 struct ina3221_input *input = &ina->inputs[channel];
287 int resistance_uo = input->shunt_resistor;
288 u8 reg = ina3221_curr_reg[attr][channel];
289 int regval, current_ma, voltage_uv;
290
291 /* clamp current */
292 current_ma = clamp_val(val,
293 INT_MIN / resistance_uo,
294 INT_MAX / resistance_uo);
295
296 voltage_uv = DIV_ROUND_CLOSEST(current_ma * resistance_uo, 1000);
297
298 /* clamp voltage */
299 voltage_uv = clamp_val(voltage_uv, -163800, 163800);
300
301 /* 1 / 40uV(scale) << 3(register shift) = 5 */
302 regval = DIV_ROUND_CLOSEST(voltage_uv, 5) & 0xfff8;
a9e9dd9c 303
d4b0166d 304 return regmap_write(ina->regmap, reg, regval);
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305}
306
d4b0166d 307static int ina3221_write_enable(struct device *dev, int channel, bool enable)
a9e9dd9c 308{
a9e9dd9c 309 struct ina3221_data *ina = dev_get_drvdata(dev);
a9e9dd9c 310 u16 config, mask = INA3221_CONFIG_CHx_EN(channel);
323aeb0e 311 u16 config_old = ina->reg_config & mask;
a9e9dd9c
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312 int ret;
313
a9e9dd9c
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314 config = enable ? mask : 0;
315
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316 /* Bypass if enable status is not being changed */
317 if (config_old == config)
318 return 0;
319
320 /* For enabling routine, increase refcount and resume() at first */
321 if (enable) {
322 ret = pm_runtime_get_sync(ina->pm_dev);
323 if (ret < 0) {
324 dev_err(dev, "Failed to get PM runtime\n");
325 return ret;
326 }
327 }
328
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329 /* Enable or disable the channel */
330 ret = regmap_update_bits(ina->regmap, INA3221_CONFIG, mask, config);
331 if (ret)
323aeb0e 332 goto fail;
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333
334 /* Cache the latest config register value */
335 ret = regmap_read(ina->regmap, INA3221_CONFIG, &ina->reg_config);
336 if (ret)
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337 goto fail;
338
339 /* For disabling routine, decrease refcount or suspend() at last */
340 if (!enable)
341 pm_runtime_put_sync(ina->pm_dev);
a9e9dd9c 342
d4b0166d 343 return 0;
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344
345fail:
346 if (enable) {
347 dev_err(dev, "Failed to enable channel %d: error %d\n",
348 channel, ret);
349 pm_runtime_put_sync(ina->pm_dev);
350 }
351
352 return ret;
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353}
354
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355static int ina3221_read(struct device *dev, enum hwmon_sensor_types type,
356 u32 attr, int channel, long *val)
7cb6dcff 357{
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358 struct ina3221_data *ina = dev_get_drvdata(dev);
359 int ret;
360
361 mutex_lock(&ina->lock);
362
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363 switch (type) {
364 case hwmon_in:
365 /* 0-align channel ID */
87625b24
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366 ret = ina3221_read_in(dev, attr, channel - 1, val);
367 break;
d4b0166d 368 case hwmon_curr:
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369 ret = ina3221_read_curr(dev, attr, channel, val);
370 break;
d4b0166d 371 default:
87625b24
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372 ret = -EOPNOTSUPP;
373 break;
d4b0166d 374 }
87625b24
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375
376 mutex_unlock(&ina->lock);
377
378 return ret;
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379}
380
d4b0166d
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381static int ina3221_write(struct device *dev, enum hwmon_sensor_types type,
382 u32 attr, int channel, long val)
7cb6dcff 383{
87625b24
NC
384 struct ina3221_data *ina = dev_get_drvdata(dev);
385 int ret;
386
387 mutex_lock(&ina->lock);
388
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389 switch (type) {
390 case hwmon_in:
391 /* 0-align channel ID */
87625b24
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392 ret = ina3221_write_enable(dev, channel - 1, val);
393 break;
d4b0166d 394 case hwmon_curr:
87625b24
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395 ret = ina3221_write_curr(dev, attr, channel, val);
396 break;
d4b0166d 397 default:
87625b24
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398 ret = -EOPNOTSUPP;
399 break;
d4b0166d 400 }
87625b24
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401
402 mutex_unlock(&ina->lock);
403
404 return ret;
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405}
406
d4b0166d
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407static int ina3221_read_string(struct device *dev, enum hwmon_sensor_types type,
408 u32 attr, int channel, const char **str)
7cb6dcff 409{
7cb6dcff 410 struct ina3221_data *ina = dev_get_drvdata(dev);
d4b0166d 411 int index = channel - 1;
7cb6dcff 412
d4b0166d 413 *str = ina->inputs[index].label;
a9e9dd9c 414
d4b0166d 415 return 0;
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AD
416}
417
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418static umode_t ina3221_is_visible(const void *drvdata,
419 enum hwmon_sensor_types type,
420 u32 attr, int channel)
7cb6dcff 421{
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NC
422 const struct ina3221_data *ina = drvdata;
423 const struct ina3221_input *input = NULL;
424
425 switch (type) {
426 case hwmon_in:
427 /* Ignore in0_ */
428 if (channel == 0)
429 return 0;
430
431 switch (attr) {
432 case hwmon_in_label:
433 if (channel - 1 <= INA3221_CHANNEL3)
434 input = &ina->inputs[channel - 1];
435 /* Hide label node if label is not provided */
436 return (input && input->label) ? 0444 : 0;
437 case hwmon_in_input:
438 return 0444;
439 case hwmon_in_enable:
440 return 0644;
441 default:
442 return 0;
443 }
444 case hwmon_curr:
445 switch (attr) {
446 case hwmon_curr_input:
447 case hwmon_curr_crit_alarm:
448 case hwmon_curr_max_alarm:
449 return 0444;
450 case hwmon_curr_crit:
451 case hwmon_curr_max:
452 return 0644;
453 default:
454 return 0;
455 }
456 default:
457 return 0;
458 }
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459}
460
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461static const u32 ina3221_in_config[] = {
462 /* 0: dummy, skipped in is_visible */
463 HWMON_I_INPUT,
464 /* 1-3: input voltage Channels */
465 HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
466 HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
467 HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
468 /* 4-6: shunt voltage Channels */
469 HWMON_I_INPUT,
470 HWMON_I_INPUT,
471 HWMON_I_INPUT,
472 0
473};
7cb6dcff 474
d4b0166d
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475static const struct hwmon_channel_info ina3221_in = {
476 .type = hwmon_in,
477 .config = ina3221_in_config,
478};
7cb6dcff 479
d4b0166d
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480#define INA3221_HWMON_CURR_CONFIG (HWMON_C_INPUT | \
481 HWMON_C_CRIT | HWMON_C_CRIT_ALARM | \
482 HWMON_C_MAX | HWMON_C_MAX_ALARM)
7cb6dcff 483
d4b0166d
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484static const u32 ina3221_curr_config[] = {
485 INA3221_HWMON_CURR_CONFIG,
486 INA3221_HWMON_CURR_CONFIG,
487 INA3221_HWMON_CURR_CONFIG,
488 0
489};
7cb6dcff 490
d4b0166d
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491static const struct hwmon_channel_info ina3221_curr = {
492 .type = hwmon_curr,
493 .config = ina3221_curr_config,
494};
7cb6dcff 495
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496static const struct hwmon_channel_info *ina3221_info[] = {
497 &ina3221_in,
498 &ina3221_curr,
499 NULL
500};
7cb6dcff 501
d4b0166d
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502static const struct hwmon_ops ina3221_hwmon_ops = {
503 .is_visible = ina3221_is_visible,
504 .read_string = ina3221_read_string,
505 .read = ina3221_read,
506 .write = ina3221_write,
507};
7cb6dcff 508
d4b0166d
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509static const struct hwmon_chip_info ina3221_chip_info = {
510 .ops = &ina3221_hwmon_ops,
511 .info = ina3221_info,
512};
7cb6dcff 513
d4b0166d 514/* Extra attribute groups */
a4ec92ed 515static ssize_t ina3221_shunt_show(struct device *dev,
7cb6dcff
AD
516 struct device_attribute *attr, char *buf)
517{
518 struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);
519 struct ina3221_data *ina = dev_get_drvdata(dev);
520 unsigned int channel = sd_attr->index;
a9e9dd9c 521 struct ina3221_input *input = &ina->inputs[channel];
7cb6dcff 522
a9e9dd9c 523 return snprintf(buf, PAGE_SIZE, "%d\n", input->shunt_resistor);
7cb6dcff
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524}
525
a4ec92ed
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526static ssize_t ina3221_shunt_store(struct device *dev,
527 struct device_attribute *attr,
528 const char *buf, size_t count)
7cb6dcff
AD
529{
530 struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);
531 struct ina3221_data *ina = dev_get_drvdata(dev);
532 unsigned int channel = sd_attr->index;
a9e9dd9c 533 struct ina3221_input *input = &ina->inputs[channel];
9ad0df1a 534 int val;
7cb6dcff
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535 int ret;
536
9ad0df1a 537 ret = kstrtoint(buf, 0, &val);
7cb6dcff
AD
538 if (ret)
539 return ret;
540
9ad0df1a 541 val = clamp_val(val, 1, INT_MAX);
7cb6dcff 542
a9e9dd9c 543 input->shunt_resistor = val;
7cb6dcff
AD
544
545 return count;
546}
547
7cb6dcff 548/* shunt resistance */
a4ec92ed
GR
549static SENSOR_DEVICE_ATTR_RW(shunt1_resistor, ina3221_shunt, INA3221_CHANNEL1);
550static SENSOR_DEVICE_ATTR_RW(shunt2_resistor, ina3221_shunt, INA3221_CHANNEL2);
551static SENSOR_DEVICE_ATTR_RW(shunt3_resistor, ina3221_shunt, INA3221_CHANNEL3);
7cb6dcff 552
7cb6dcff 553static struct attribute *ina3221_attrs[] = {
7cb6dcff 554 &sensor_dev_attr_shunt1_resistor.dev_attr.attr,
7cb6dcff 555 &sensor_dev_attr_shunt2_resistor.dev_attr.attr,
7cb6dcff 556 &sensor_dev_attr_shunt3_resistor.dev_attr.attr,
7cb6dcff
AD
557 NULL,
558};
d4b0166d 559ATTRIBUTE_GROUPS(ina3221);
7cb6dcff
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560
561static const struct regmap_range ina3221_yes_ranges[] = {
c20217b3 562 regmap_reg_range(INA3221_CONFIG, INA3221_BUS3),
7cb6dcff
AD
563 regmap_reg_range(INA3221_MASK_ENABLE, INA3221_MASK_ENABLE),
564};
565
566static const struct regmap_access_table ina3221_volatile_table = {
567 .yes_ranges = ina3221_yes_ranges,
568 .n_yes_ranges = ARRAY_SIZE(ina3221_yes_ranges),
569};
570
571static const struct regmap_config ina3221_regmap_config = {
572 .reg_bits = 8,
573 .val_bits = 16,
574
575 .cache_type = REGCACHE_RBTREE,
576 .volatile_table = &ina3221_volatile_table,
577};
578
a9e9dd9c
NC
579static int ina3221_probe_child_from_dt(struct device *dev,
580 struct device_node *child,
581 struct ina3221_data *ina)
582{
583 struct ina3221_input *input;
584 u32 val;
585 int ret;
586
587 ret = of_property_read_u32(child, "reg", &val);
588 if (ret) {
1b1f4efa 589 dev_err(dev, "missing reg property of %pOFn\n", child);
a9e9dd9c
NC
590 return ret;
591 } else if (val > INA3221_CHANNEL3) {
1b1f4efa 592 dev_err(dev, "invalid reg %d of %pOFn\n", val, child);
a9e9dd9c
NC
593 return ret;
594 }
595
596 input = &ina->inputs[val];
597
598 /* Log the disconnected channel input */
599 if (!of_device_is_available(child)) {
600 input->disconnected = true;
601 return 0;
602 }
603
604 /* Save the connected input label if available */
605 of_property_read_string(child, "label", &input->label);
606
607 /* Overwrite default shunt resistor value optionally */
a6e43263
NC
608 if (!of_property_read_u32(child, "shunt-resistor-micro-ohms", &val)) {
609 if (val < 1 || val > INT_MAX) {
1b1f4efa
RH
610 dev_err(dev, "invalid shunt resistor value %u of %pOFn\n",
611 val, child);
a6e43263
NC
612 return -EINVAL;
613 }
a9e9dd9c 614 input->shunt_resistor = val;
a6e43263 615 }
a9e9dd9c
NC
616
617 return 0;
618}
619
620static int ina3221_probe_from_dt(struct device *dev, struct ina3221_data *ina)
621{
622 const struct device_node *np = dev->of_node;
623 struct device_node *child;
624 int ret;
625
626 /* Compatible with non-DT platforms */
627 if (!np)
628 return 0;
629
43dece16
NC
630 ina->single_shot = of_property_read_bool(np, "ti,single-shot");
631
a9e9dd9c
NC
632 for_each_child_of_node(np, child) {
633 ret = ina3221_probe_child_from_dt(dev, child, ina);
634 if (ret)
635 return ret;
636 }
637
638 return 0;
639}
640
7cb6dcff
AD
641static int ina3221_probe(struct i2c_client *client,
642 const struct i2c_device_id *id)
643{
644 struct device *dev = &client->dev;
645 struct ina3221_data *ina;
646 struct device *hwmon_dev;
647 int i, ret;
648
649 ina = devm_kzalloc(dev, sizeof(*ina), GFP_KERNEL);
650 if (!ina)
651 return -ENOMEM;
652
653 ina->regmap = devm_regmap_init_i2c(client, &ina3221_regmap_config);
654 if (IS_ERR(ina->regmap)) {
655 dev_err(dev, "Unable to allocate register map\n");
656 return PTR_ERR(ina->regmap);
657 }
658
659 for (i = 0; i < F_MAX_FIELDS; i++) {
660 ina->fields[i] = devm_regmap_field_alloc(dev,
661 ina->regmap,
662 ina3221_reg_fields[i]);
663 if (IS_ERR(ina->fields[i])) {
664 dev_err(dev, "Unable to allocate regmap fields\n");
665 return PTR_ERR(ina->fields[i]);
666 }
667 }
668
669 for (i = 0; i < INA3221_NUM_CHANNELS; i++)
a9e9dd9c
NC
670 ina->inputs[i].shunt_resistor = INA3221_RSHUNT_DEFAULT;
671
672 ret = ina3221_probe_from_dt(dev, ina);
673 if (ret) {
674 dev_err(dev, "Unable to probe from device tree\n");
675 return ret;
676 }
7cb6dcff 677
323aeb0e
NC
678 /* The driver will be reset, so use reset value */
679 ina->reg_config = INA3221_CONFIG_DEFAULT;
a9e9dd9c 680
43dece16
NC
681 /* Clear continuous bit to use single-shot mode */
682 if (ina->single_shot)
683 ina->reg_config &= ~INA3221_CONFIG_MODE_CONTINUOUS;
684
a9e9dd9c
NC
685 /* Disable channels if their inputs are disconnected */
686 for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
687 if (ina->inputs[i].disconnected)
688 ina->reg_config &= ~INA3221_CONFIG_CHx_EN(i);
689 }
a9e9dd9c 690
323aeb0e 691 ina->pm_dev = dev;
87625b24 692 mutex_init(&ina->lock);
59d608e1
NC
693 dev_set_drvdata(dev, ina);
694
323aeb0e
NC
695 /* Enable PM runtime -- status is suspended by default */
696 pm_runtime_enable(ina->pm_dev);
697
698 /* Initialize (resume) the device */
699 for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
700 if (ina->inputs[i].disconnected)
701 continue;
702 /* Match the refcount with number of enabled channels */
703 ret = pm_runtime_get_sync(ina->pm_dev);
704 if (ret < 0)
705 goto fail;
706 }
707
d4b0166d
NC
708 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, ina,
709 &ina3221_chip_info,
710 ina3221_groups);
7cb6dcff
AD
711 if (IS_ERR(hwmon_dev)) {
712 dev_err(dev, "Unable to register hwmon device\n");
323aeb0e
NC
713 ret = PTR_ERR(hwmon_dev);
714 goto fail;
7cb6dcff
AD
715 }
716
717 return 0;
323aeb0e
NC
718
719fail:
720 pm_runtime_disable(ina->pm_dev);
721 pm_runtime_set_suspended(ina->pm_dev);
722 /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */
723 for (i = 0; i < INA3221_NUM_CHANNELS; i++)
724 pm_runtime_put_noidle(ina->pm_dev);
725 mutex_destroy(&ina->lock);
726
727 return ret;
7cb6dcff
AD
728}
729
87625b24
NC
730static int ina3221_remove(struct i2c_client *client)
731{
732 struct ina3221_data *ina = dev_get_drvdata(&client->dev);
323aeb0e
NC
733 int i;
734
735 pm_runtime_disable(ina->pm_dev);
736 pm_runtime_set_suspended(ina->pm_dev);
737
738 /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */
739 for (i = 0; i < INA3221_NUM_CHANNELS; i++)
740 pm_runtime_put_noidle(ina->pm_dev);
87625b24
NC
741
742 mutex_destroy(&ina->lock);
743
744 return 0;
745}
746
ead21c77 747static int __maybe_unused ina3221_suspend(struct device *dev)
59d608e1
NC
748{
749 struct ina3221_data *ina = dev_get_drvdata(dev);
750 int ret;
751
752 /* Save config register value and enable cache-only */
753 ret = regmap_read(ina->regmap, INA3221_CONFIG, &ina->reg_config);
754 if (ret)
755 return ret;
756
757 /* Set to power-down mode for power saving */
758 ret = regmap_update_bits(ina->regmap, INA3221_CONFIG,
759 INA3221_CONFIG_MODE_MASK,
760 INA3221_CONFIG_MODE_POWERDOWN);
761 if (ret)
762 return ret;
763
764 regcache_cache_only(ina->regmap, true);
765 regcache_mark_dirty(ina->regmap);
766
767 return 0;
768}
769
ead21c77 770static int __maybe_unused ina3221_resume(struct device *dev)
59d608e1
NC
771{
772 struct ina3221_data *ina = dev_get_drvdata(dev);
773 int ret;
774
775 regcache_cache_only(ina->regmap, false);
776
777 /* Software reset the chip */
778 ret = regmap_field_write(ina->fields[F_RST], true);
779 if (ret) {
780 dev_err(dev, "Unable to reset device\n");
781 return ret;
782 }
783
784 /* Restore cached register values to hardware */
785 ret = regcache_sync(ina->regmap);
786 if (ret)
787 return ret;
788
789 /* Restore config register value to hardware */
790 ret = regmap_write(ina->regmap, INA3221_CONFIG, ina->reg_config);
791 if (ret)
792 return ret;
793
794 return 0;
795}
59d608e1
NC
796
797static const struct dev_pm_ops ina3221_pm = {
323aeb0e
NC
798 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
799 pm_runtime_force_resume)
800 SET_RUNTIME_PM_OPS(ina3221_suspend, ina3221_resume, NULL)
59d608e1
NC
801};
802
7cb6dcff
AD
803static const struct of_device_id ina3221_of_match_table[] = {
804 { .compatible = "ti,ina3221", },
805 { /* sentinel */ }
806};
807MODULE_DEVICE_TABLE(of, ina3221_of_match_table);
808
809static const struct i2c_device_id ina3221_ids[] = {
810 { "ina3221", 0 },
811 { /* sentinel */ }
812};
813MODULE_DEVICE_TABLE(i2c, ina3221_ids);
814
815static struct i2c_driver ina3221_i2c_driver = {
816 .probe = ina3221_probe,
87625b24 817 .remove = ina3221_remove,
7cb6dcff
AD
818 .driver = {
819 .name = INA3221_DRIVER_NAME,
820 .of_match_table = ina3221_of_match_table,
59d608e1 821 .pm = &ina3221_pm,
7cb6dcff
AD
822 },
823 .id_table = ina3221_ids,
824};
825module_i2c_driver(ina3221_i2c_driver);
826
827MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
828MODULE_DESCRIPTION("Texas Instruments INA3221 HWMon Driver");
829MODULE_LICENSE("GPL v2");