Commit | Line | Data |
---|---|---|
525ad373 GR |
1 | /* |
2 | * fschmd.c | |
569ff102 | 3 | * |
c69ab2b7 | 4 | * Copyright (C) 2007 - 2009 Hans de Goede <hdegoede@redhat.com> |
569ff102 HG |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
19 | */ | |
20 | ||
21 | /* | |
22 | * Merged Fujitsu Siemens hwmon driver, supporting the Poseidon, Hermes, | |
de15f093 | 23 | * Scylla, Heracles, Heimdall, Hades and Syleus chips |
569ff102 HG |
24 | * |
25 | * Based on the original 2.4 fscscy, 2.6 fscpos, 2.6 fscher and 2.6 | |
26 | * (candidate) fschmd drivers: | |
27 | * Copyright (C) 2006 Thilo Cestonaro | |
28 | * <thilo.cestonaro.external@fujitsu-siemens.com> | |
29 | * Copyright (C) 2004, 2005 Stefan Ott <stefan@desire.ch> | |
30 | * Copyright (C) 2003, 2004 Reinhard Nissl <rnissl@gmx.de> | |
31 | * Copyright (c) 2001 Martin Knoblauch <mkn@teraport.de, knobi@knobisoft.de> | |
32 | * Copyright (C) 2000 Hermann Jung <hej@odn.de> | |
33 | */ | |
34 | ||
35 | #include <linux/module.h> | |
36 | #include <linux/init.h> | |
37 | #include <linux/slab.h> | |
38 | #include <linux/jiffies.h> | |
39 | #include <linux/i2c.h> | |
40 | #include <linux/hwmon.h> | |
41 | #include <linux/hwmon-sysfs.h> | |
42 | #include <linux/err.h> | |
43 | #include <linux/mutex.h> | |
44 | #include <linux/sysfs.h> | |
7845cd79 | 45 | #include <linux/dmi.h> |
97950c3d HG |
46 | #include <linux/fs.h> |
47 | #include <linux/watchdog.h> | |
48 | #include <linux/miscdevice.h> | |
49 | #include <linux/uaccess.h> | |
50 | #include <linux/kref.h> | |
569ff102 HG |
51 | |
52 | /* Addresses to scan */ | |
25e9c86d | 53 | static const unsigned short normal_i2c[] = { 0x73, I2C_CLIENT_END }; |
569ff102 HG |
54 | |
55 | /* Insmod parameters */ | |
86a1e189 WVS |
56 | static bool nowayout = WATCHDOG_NOWAYOUT; |
57 | module_param(nowayout, bool, 0); | |
97950c3d HG |
58 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" |
59 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
e5e9f44c JD |
60 | |
61 | enum chips { fscpos, fscher, fscscy, fschrc, fschmd, fschds, fscsyl }; | |
569ff102 HG |
62 | |
63 | /* | |
64 | * The FSCHMD registers and other defines | |
65 | */ | |
66 | ||
67 | /* chip identification */ | |
68 | #define FSCHMD_REG_IDENT_0 0x00 | |
69 | #define FSCHMD_REG_IDENT_1 0x01 | |
70 | #define FSCHMD_REG_IDENT_2 0x02 | |
71 | #define FSCHMD_REG_REVISION 0x03 | |
72 | ||
73 | /* global control and status */ | |
74 | #define FSCHMD_REG_EVENT_STATE 0x04 | |
75 | #define FSCHMD_REG_CONTROL 0x05 | |
76 | ||
453e308d | 77 | #define FSCHMD_CONTROL_ALERT_LED 0x01 |
569ff102 | 78 | |
97950c3d | 79 | /* watchdog */ |
525ad373 GR |
80 | static const u8 FSCHMD_REG_WDOG_CONTROL[7] = { |
81 | 0x21, 0x21, 0x21, 0x21, 0x21, 0x28, 0x28 }; | |
82 | static const u8 FSCHMD_REG_WDOG_STATE[7] = { | |
83 | 0x23, 0x23, 0x23, 0x23, 0x23, 0x29, 0x29 }; | |
84 | static const u8 FSCHMD_REG_WDOG_PRESET[7] = { | |
85 | 0x28, 0x28, 0x28, 0x28, 0x28, 0x2a, 0x2a }; | |
569ff102 | 86 | |
97950c3d HG |
87 | #define FSCHMD_WDOG_CONTROL_TRIGGER 0x10 |
88 | #define FSCHMD_WDOG_CONTROL_STARTED 0x10 /* the same as trigger */ | |
89 | #define FSCHMD_WDOG_CONTROL_STOP 0x20 | |
90 | #define FSCHMD_WDOG_CONTROL_RESOLUTION 0x40 | |
91 | ||
92 | #define FSCHMD_WDOG_STATE_CARDRESET 0x02 | |
93 | ||
569ff102 | 94 | /* voltages, weird order is to keep the same order as the old drivers */ |
de15f093 | 95 | static const u8 FSCHMD_REG_VOLT[7][6] = { |
c69ab2b7 HG |
96 | { 0x45, 0x42, 0x48 }, /* pos */ |
97 | { 0x45, 0x42, 0x48 }, /* her */ | |
98 | { 0x45, 0x42, 0x48 }, /* scy */ | |
99 | { 0x45, 0x42, 0x48 }, /* hrc */ | |
100 | { 0x45, 0x42, 0x48 }, /* hmd */ | |
de15f093 | 101 | { 0x21, 0x20, 0x22 }, /* hds */ |
c69ab2b7 HG |
102 | { 0x21, 0x20, 0x22, 0x23, 0x24, 0x25 }, /* syl */ |
103 | }; | |
104 | ||
de15f093 | 105 | static const int FSCHMD_NO_VOLT_SENSORS[7] = { 3, 3, 3, 3, 3, 3, 6 }; |
569ff102 | 106 | |
525ad373 | 107 | /* |
2b2acdc8 | 108 | * minimum pwm at which the fan is driven (pwm can be increased depending on |
525ad373 GR |
109 | * the temp. Notice that for the scy some fans share there minimum speed. |
110 | * Also notice that with the scy the sensor order is different than with the | |
111 | * other chips, this order was in the 2.4 driver and kept for consistency. | |
112 | */ | |
de15f093 | 113 | static const u8 FSCHMD_REG_FAN_MIN[7][7] = { |
569ff102 HG |
114 | { 0x55, 0x65 }, /* pos */ |
115 | { 0x55, 0x65, 0xb5 }, /* her */ | |
116 | { 0x65, 0x65, 0x55, 0xa5, 0x55, 0xa5 }, /* scy */ | |
117 | { 0x55, 0x65, 0xa5, 0xb5 }, /* hrc */ | |
118 | { 0x55, 0x65, 0xa5, 0xb5, 0xc5 }, /* hmd */ | |
de15f093 | 119 | { 0x55, 0x65, 0xa5, 0xb5, 0xc5 }, /* hds */ |
c69ab2b7 | 120 | { 0x54, 0x64, 0x74, 0x84, 0x94, 0xa4, 0xb4 }, /* syl */ |
569ff102 HG |
121 | }; |
122 | ||
123 | /* actual fan speed */ | |
de15f093 | 124 | static const u8 FSCHMD_REG_FAN_ACT[7][7] = { |
569ff102 HG |
125 | { 0x0e, 0x6b, 0xab }, /* pos */ |
126 | { 0x0e, 0x6b, 0xbb }, /* her */ | |
127 | { 0x6b, 0x6c, 0x0e, 0xab, 0x5c, 0xbb }, /* scy */ | |
128 | { 0x0e, 0x6b, 0xab, 0xbb }, /* hrc */ | |
129 | { 0x5b, 0x6b, 0xab, 0xbb, 0xcb }, /* hmd */ | |
de15f093 | 130 | { 0x5b, 0x6b, 0xab, 0xbb, 0xcb }, /* hds */ |
c69ab2b7 | 131 | { 0x57, 0x67, 0x77, 0x87, 0x97, 0xa7, 0xb7 }, /* syl */ |
569ff102 HG |
132 | }; |
133 | ||
134 | /* fan status registers */ | |
de15f093 | 135 | static const u8 FSCHMD_REG_FAN_STATE[7][7] = { |
569ff102 HG |
136 | { 0x0d, 0x62, 0xa2 }, /* pos */ |
137 | { 0x0d, 0x62, 0xb2 }, /* her */ | |
138 | { 0x62, 0x61, 0x0d, 0xa2, 0x52, 0xb2 }, /* scy */ | |
139 | { 0x0d, 0x62, 0xa2, 0xb2 }, /* hrc */ | |
140 | { 0x52, 0x62, 0xa2, 0xb2, 0xc2 }, /* hmd */ | |
de15f093 | 141 | { 0x52, 0x62, 0xa2, 0xb2, 0xc2 }, /* hds */ |
c69ab2b7 | 142 | { 0x50, 0x60, 0x70, 0x80, 0x90, 0xa0, 0xb0 }, /* syl */ |
569ff102 HG |
143 | }; |
144 | ||
145 | /* fan ripple / divider registers */ | |
de15f093 | 146 | static const u8 FSCHMD_REG_FAN_RIPPLE[7][7] = { |
569ff102 HG |
147 | { 0x0f, 0x6f, 0xaf }, /* pos */ |
148 | { 0x0f, 0x6f, 0xbf }, /* her */ | |
149 | { 0x6f, 0x6f, 0x0f, 0xaf, 0x0f, 0xbf }, /* scy */ | |
150 | { 0x0f, 0x6f, 0xaf, 0xbf }, /* hrc */ | |
151 | { 0x5f, 0x6f, 0xaf, 0xbf, 0xcf }, /* hmd */ | |
de15f093 | 152 | { 0x5f, 0x6f, 0xaf, 0xbf, 0xcf }, /* hds */ |
c69ab2b7 | 153 | { 0x56, 0x66, 0x76, 0x86, 0x96, 0xa6, 0xb6 }, /* syl */ |
569ff102 HG |
154 | }; |
155 | ||
de15f093 | 156 | static const int FSCHMD_NO_FAN_SENSORS[7] = { 3, 3, 6, 4, 5, 5, 7 }; |
569ff102 HG |
157 | |
158 | /* Fan status register bitmasks */ | |
453e308d | 159 | #define FSCHMD_FAN_ALARM 0x04 /* called fault by FSC! */ |
c69ab2b7 HG |
160 | #define FSCHMD_FAN_NOT_PRESENT 0x08 |
161 | #define FSCHMD_FAN_DISABLED 0x80 | |
569ff102 HG |
162 | |
163 | ||
164 | /* actual temperature registers */ | |
de15f093 | 165 | static const u8 FSCHMD_REG_TEMP_ACT[7][11] = { |
569ff102 HG |
166 | { 0x64, 0x32, 0x35 }, /* pos */ |
167 | { 0x64, 0x32, 0x35 }, /* her */ | |
168 | { 0x64, 0xD0, 0x32, 0x35 }, /* scy */ | |
169 | { 0x64, 0x32, 0x35 }, /* hrc */ | |
170 | { 0x70, 0x80, 0x90, 0xd0, 0xe0 }, /* hmd */ | |
de15f093 | 171 | { 0x70, 0x80, 0x90, 0xd0, 0xe0 }, /* hds */ |
c69ab2b7 HG |
172 | { 0x58, 0x68, 0x78, 0x88, 0x98, 0xa8, /* syl */ |
173 | 0xb8, 0xc8, 0xd8, 0xe8, 0xf8 }, | |
569ff102 HG |
174 | }; |
175 | ||
176 | /* temperature state registers */ | |
de15f093 | 177 | static const u8 FSCHMD_REG_TEMP_STATE[7][11] = { |
569ff102 HG |
178 | { 0x71, 0x81, 0x91 }, /* pos */ |
179 | { 0x71, 0x81, 0x91 }, /* her */ | |
180 | { 0x71, 0xd1, 0x81, 0x91 }, /* scy */ | |
181 | { 0x71, 0x81, 0x91 }, /* hrc */ | |
7dcf9a31 | 182 | { 0x71, 0x81, 0x91, 0xd1, 0xe1 }, /* hmd */ |
de15f093 | 183 | { 0x71, 0x81, 0x91, 0xd1, 0xe1 }, /* hds */ |
c69ab2b7 HG |
184 | { 0x59, 0x69, 0x79, 0x89, 0x99, 0xa9, /* syl */ |
185 | 0xb9, 0xc9, 0xd9, 0xe9, 0xf9 }, | |
569ff102 HG |
186 | }; |
187 | ||
525ad373 GR |
188 | /* |
189 | * temperature high limit registers, FSC does not document these. Proven to be | |
190 | * there with field testing on the fscher and fschrc, already supported / used | |
191 | * in the fscscy 2.4 driver. FSC has confirmed that the fschmd has registers | |
192 | * at these addresses, but doesn't want to confirm they are the same as with | |
193 | * the fscher?? | |
194 | */ | |
de15f093 | 195 | static const u8 FSCHMD_REG_TEMP_LIMIT[7][11] = { |
569ff102 HG |
196 | { 0, 0, 0 }, /* pos */ |
197 | { 0x76, 0x86, 0x96 }, /* her */ | |
198 | { 0x76, 0xd6, 0x86, 0x96 }, /* scy */ | |
199 | { 0x76, 0x86, 0x96 }, /* hrc */ | |
7dcf9a31 | 200 | { 0x76, 0x86, 0x96, 0xd6, 0xe6 }, /* hmd */ |
de15f093 | 201 | { 0x76, 0x86, 0x96, 0xd6, 0xe6 }, /* hds */ |
c69ab2b7 HG |
202 | { 0x5a, 0x6a, 0x7a, 0x8a, 0x9a, 0xaa, /* syl */ |
203 | 0xba, 0xca, 0xda, 0xea, 0xfa }, | |
569ff102 HG |
204 | }; |
205 | ||
525ad373 GR |
206 | /* |
207 | * These were found through experimenting with an fscher, currently they are | |
208 | * not used, but we keep them around for future reference. | |
209 | * On the fscsyl AUTOP1 lives at 0x#c (so 0x5c for fan1, 0x6c for fan2, etc), | |
210 | * AUTOP2 lives at 0x#e, and 0x#1 is a bitmask defining which temps influence | |
211 | * the fan speed. | |
212 | * static const u8 FSCHER_REG_TEMP_AUTOP1[] = { 0x73, 0x83, 0x93 }; | |
213 | * static const u8 FSCHER_REG_TEMP_AUTOP2[] = { 0x75, 0x85, 0x95 }; | |
214 | */ | |
569ff102 | 215 | |
de15f093 | 216 | static const int FSCHMD_NO_TEMP_SENSORS[7] = { 3, 3, 4, 3, 5, 5, 11 }; |
569ff102 HG |
217 | |
218 | /* temp status register bitmasks */ | |
453e308d HG |
219 | #define FSCHMD_TEMP_WORKING 0x01 |
220 | #define FSCHMD_TEMP_ALERT 0x02 | |
c69ab2b7 | 221 | #define FSCHMD_TEMP_DISABLED 0x80 |
569ff102 HG |
222 | /* there only really is an alarm if the sensor is working and alert == 1 */ |
223 | #define FSCHMD_TEMP_ALARM_MASK \ | |
453e308d | 224 | (FSCHMD_TEMP_WORKING | FSCHMD_TEMP_ALERT) |
569ff102 HG |
225 | |
226 | /* | |
227 | * Functions declarations | |
228 | */ | |
229 | ||
40ac1994 JD |
230 | static int fschmd_probe(struct i2c_client *client, |
231 | const struct i2c_device_id *id); | |
310ec792 | 232 | static int fschmd_detect(struct i2c_client *client, |
40ac1994 JD |
233 | struct i2c_board_info *info); |
234 | static int fschmd_remove(struct i2c_client *client); | |
569ff102 HG |
235 | static struct fschmd_data *fschmd_update_device(struct device *dev); |
236 | ||
237 | /* | |
238 | * Driver data (common to all clients) | |
239 | */ | |
240 | ||
40ac1994 JD |
241 | static const struct i2c_device_id fschmd_id[] = { |
242 | { "fscpos", fscpos }, | |
243 | { "fscher", fscher }, | |
244 | { "fscscy", fscscy }, | |
245 | { "fschrc", fschrc }, | |
246 | { "fschmd", fschmd }, | |
de15f093 | 247 | { "fschds", fschds }, |
c69ab2b7 | 248 | { "fscsyl", fscsyl }, |
40ac1994 JD |
249 | { } |
250 | }; | |
251 | MODULE_DEVICE_TABLE(i2c, fschmd_id); | |
252 | ||
569ff102 | 253 | static struct i2c_driver fschmd_driver = { |
40ac1994 | 254 | .class = I2C_CLASS_HWMON, |
569ff102 | 255 | .driver = { |
453e308d | 256 | .name = "fschmd", |
569ff102 | 257 | }, |
40ac1994 JD |
258 | .probe = fschmd_probe, |
259 | .remove = fschmd_remove, | |
260 | .id_table = fschmd_id, | |
261 | .detect = fschmd_detect, | |
c3813d6a | 262 | .address_list = normal_i2c, |
569ff102 HG |
263 | }; |
264 | ||
265 | /* | |
266 | * Client data (each client gets its own) | |
267 | */ | |
268 | ||
269 | struct fschmd_data { | |
97950c3d | 270 | struct i2c_client *client; |
569ff102 HG |
271 | struct device *hwmon_dev; |
272 | struct mutex update_lock; | |
97950c3d HG |
273 | struct mutex watchdog_lock; |
274 | struct list_head list; /* member of the watchdog_data_list */ | |
275 | struct kref kref; | |
276 | struct miscdevice watchdog_miscdev; | |
dc71afe5 | 277 | enum chips kind; |
97950c3d HG |
278 | unsigned long watchdog_is_open; |
279 | char watchdog_expect_close; | |
280 | char watchdog_name[10]; /* must be unique to avoid sysfs conflict */ | |
569ff102 HG |
281 | char valid; /* zero until following fields are valid */ |
282 | unsigned long last_updated; /* in jiffies */ | |
283 | ||
284 | /* register values */ | |
97950c3d | 285 | u8 revision; /* chip revision */ |
569ff102 | 286 | u8 global_control; /* global control register */ |
97950c3d HG |
287 | u8 watchdog_control; /* watchdog control register */ |
288 | u8 watchdog_state; /* watchdog status register */ | |
289 | u8 watchdog_preset; /* watchdog counter preset on trigger val */ | |
c69ab2b7 HG |
290 | u8 volt[6]; /* voltage */ |
291 | u8 temp_act[11]; /* temperature */ | |
292 | u8 temp_status[11]; /* status of sensor */ | |
293 | u8 temp_max[11]; /* high temp limit, notice: undocumented! */ | |
294 | u8 fan_act[7]; /* fans revolutions per second */ | |
295 | u8 fan_status[7]; /* fan status */ | |
296 | u8 fan_min[7]; /* fan min value for rps */ | |
297 | u8 fan_ripple[7]; /* divider for rps */ | |
569ff102 HG |
298 | }; |
299 | ||
525ad373 GR |
300 | /* |
301 | * Global variables to hold information read from special DMI tables, which are | |
302 | * available on FSC machines with an fscher or later chip. There is no need to | |
303 | * protect these with a lock as they are only modified from our attach function | |
304 | * which always gets called with the i2c-core lock held and never accessed | |
305 | * before the attach function is done with them. | |
306 | */ | |
c69ab2b7 HG |
307 | static int dmi_mult[6] = { 490, 200, 100, 100, 200, 100 }; |
308 | static int dmi_offset[6] = { 0, 0, 0, 0, 0, 0 }; | |
7845cd79 HG |
309 | static int dmi_vref = -1; |
310 | ||
525ad373 GR |
311 | /* |
312 | * Somewhat ugly :( global data pointer list with all fschmd devices, so that | |
313 | * we can find our device data as when using misc_register there is no other | |
314 | * method to get to ones device data from the open fop. | |
315 | */ | |
97950c3d HG |
316 | static LIST_HEAD(watchdog_data_list); |
317 | /* Note this lock not only protect list access, but also data.kref access */ | |
318 | static DEFINE_MUTEX(watchdog_data_mutex); | |
319 | ||
525ad373 GR |
320 | /* |
321 | * Release our data struct when we're detached from the i2c client *and* all | |
322 | * references to our watchdog device are released | |
323 | */ | |
97950c3d HG |
324 | static void fschmd_release_resources(struct kref *ref) |
325 | { | |
326 | struct fschmd_data *data = container_of(ref, struct fschmd_data, kref); | |
327 | kfree(data); | |
328 | } | |
7845cd79 | 329 | |
569ff102 HG |
330 | /* |
331 | * Sysfs attr show / store functions | |
332 | */ | |
333 | ||
22ed7883 GR |
334 | static ssize_t in_value_show(struct device *dev, |
335 | struct device_attribute *devattr, char *buf) | |
569ff102 HG |
336 | { |
337 | const int max_reading[3] = { 14200, 6600, 3300 }; | |
338 | int index = to_sensor_dev_attr(devattr)->index; | |
339 | struct fschmd_data *data = fschmd_update_device(dev); | |
340 | ||
dc71afe5 | 341 | if (data->kind == fscher || data->kind >= fschrc) |
7845cd79 HG |
342 | return sprintf(buf, "%d\n", (data->volt[index] * dmi_vref * |
343 | dmi_mult[index]) / 255 + dmi_offset[index]); | |
344 | else | |
345 | return sprintf(buf, "%d\n", (data->volt[index] * | |
346 | max_reading[index] + 128) / 255); | |
569ff102 HG |
347 | } |
348 | ||
349 | ||
350 | #define TEMP_FROM_REG(val) (((val) - 128) * 1000) | |
351 | ||
22ed7883 GR |
352 | static ssize_t temp_value_show(struct device *dev, |
353 | struct device_attribute *devattr, char *buf) | |
569ff102 HG |
354 | { |
355 | int index = to_sensor_dev_attr(devattr)->index; | |
356 | struct fschmd_data *data = fschmd_update_device(dev); | |
357 | ||
358 | return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_act[index])); | |
359 | } | |
360 | ||
22ed7883 GR |
361 | static ssize_t temp_max_show(struct device *dev, |
362 | struct device_attribute *devattr, char *buf) | |
569ff102 HG |
363 | { |
364 | int index = to_sensor_dev_attr(devattr)->index; | |
365 | struct fschmd_data *data = fschmd_update_device(dev); | |
366 | ||
367 | return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_max[index])); | |
368 | } | |
369 | ||
22ed7883 GR |
370 | static ssize_t temp_max_store(struct device *dev, |
371 | struct device_attribute *devattr, | |
372 | const char *buf, size_t count) | |
569ff102 HG |
373 | { |
374 | int index = to_sensor_dev_attr(devattr)->index; | |
375 | struct fschmd_data *data = dev_get_drvdata(dev); | |
525ad373 GR |
376 | long v; |
377 | int err; | |
378 | ||
379 | err = kstrtol(buf, 10, &v); | |
380 | if (err) | |
381 | return err; | |
569ff102 | 382 | |
2a844c14 | 383 | v = clamp_val(v / 1000, -128, 127) + 128; |
569ff102 HG |
384 | |
385 | mutex_lock(&data->update_lock); | |
40ac1994 | 386 | i2c_smbus_write_byte_data(to_i2c_client(dev), |
569ff102 HG |
387 | FSCHMD_REG_TEMP_LIMIT[data->kind][index], v); |
388 | data->temp_max[index] = v; | |
389 | mutex_unlock(&data->update_lock); | |
390 | ||
391 | return count; | |
392 | } | |
393 | ||
22ed7883 GR |
394 | static ssize_t temp_fault_show(struct device *dev, |
395 | struct device_attribute *devattr, char *buf) | |
569ff102 HG |
396 | { |
397 | int index = to_sensor_dev_attr(devattr)->index; | |
398 | struct fschmd_data *data = fschmd_update_device(dev); | |
399 | ||
400 | /* bit 0 set means sensor working ok, so no fault! */ | |
453e308d | 401 | if (data->temp_status[index] & FSCHMD_TEMP_WORKING) |
569ff102 HG |
402 | return sprintf(buf, "0\n"); |
403 | else | |
404 | return sprintf(buf, "1\n"); | |
405 | } | |
406 | ||
22ed7883 GR |
407 | static ssize_t temp_alarm_show(struct device *dev, |
408 | struct device_attribute *devattr, char *buf) | |
569ff102 HG |
409 | { |
410 | int index = to_sensor_dev_attr(devattr)->index; | |
411 | struct fschmd_data *data = fschmd_update_device(dev); | |
412 | ||
413 | if ((data->temp_status[index] & FSCHMD_TEMP_ALARM_MASK) == | |
414 | FSCHMD_TEMP_ALARM_MASK) | |
415 | return sprintf(buf, "1\n"); | |
416 | else | |
417 | return sprintf(buf, "0\n"); | |
418 | } | |
419 | ||
420 | ||
421 | #define RPM_FROM_REG(val) ((val) * 60) | |
422 | ||
22ed7883 GR |
423 | static ssize_t fan_value_show(struct device *dev, |
424 | struct device_attribute *devattr, char *buf) | |
569ff102 HG |
425 | { |
426 | int index = to_sensor_dev_attr(devattr)->index; | |
427 | struct fschmd_data *data = fschmd_update_device(dev); | |
428 | ||
429 | return sprintf(buf, "%u\n", RPM_FROM_REG(data->fan_act[index])); | |
430 | } | |
431 | ||
22ed7883 GR |
432 | static ssize_t fan_div_show(struct device *dev, |
433 | struct device_attribute *devattr, char *buf) | |
569ff102 HG |
434 | { |
435 | int index = to_sensor_dev_attr(devattr)->index; | |
436 | struct fschmd_data *data = fschmd_update_device(dev); | |
437 | ||
438 | /* bits 2..7 reserved => mask with 3 */ | |
439 | return sprintf(buf, "%d\n", 1 << (data->fan_ripple[index] & 3)); | |
440 | } | |
441 | ||
22ed7883 GR |
442 | static ssize_t fan_div_store(struct device *dev, |
443 | struct device_attribute *devattr, | |
444 | const char *buf, size_t count) | |
569ff102 HG |
445 | { |
446 | u8 reg; | |
447 | int index = to_sensor_dev_attr(devattr)->index; | |
448 | struct fschmd_data *data = dev_get_drvdata(dev); | |
449 | /* supported values: 2, 4, 8 */ | |
525ad373 GR |
450 | unsigned long v; |
451 | int err; | |
452 | ||
453 | err = kstrtoul(buf, 10, &v); | |
454 | if (err) | |
455 | return err; | |
569ff102 HG |
456 | |
457 | switch (v) { | |
525ad373 GR |
458 | case 2: |
459 | v = 1; | |
460 | break; | |
461 | case 4: | |
462 | v = 2; | |
463 | break; | |
464 | case 8: | |
465 | v = 3; | |
466 | break; | |
569ff102 | 467 | default: |
b55f3757 GR |
468 | dev_err(dev, |
469 | "fan_div value %lu not supported. Choose one of 2, 4 or 8!\n", | |
470 | v); | |
569ff102 HG |
471 | return -EINVAL; |
472 | } | |
473 | ||
474 | mutex_lock(&data->update_lock); | |
475 | ||
40ac1994 | 476 | reg = i2c_smbus_read_byte_data(to_i2c_client(dev), |
569ff102 HG |
477 | FSCHMD_REG_FAN_RIPPLE[data->kind][index]); |
478 | ||
479 | /* bits 2..7 reserved => mask with 0x03 */ | |
480 | reg &= ~0x03; | |
481 | reg |= v; | |
482 | ||
40ac1994 | 483 | i2c_smbus_write_byte_data(to_i2c_client(dev), |
569ff102 HG |
484 | FSCHMD_REG_FAN_RIPPLE[data->kind][index], reg); |
485 | ||
486 | data->fan_ripple[index] = reg; | |
487 | ||
488 | mutex_unlock(&data->update_lock); | |
489 | ||
490 | return count; | |
491 | } | |
492 | ||
22ed7883 GR |
493 | static ssize_t fan_alarm_show(struct device *dev, |
494 | struct device_attribute *devattr, char *buf) | |
569ff102 HG |
495 | { |
496 | int index = to_sensor_dev_attr(devattr)->index; | |
497 | struct fschmd_data *data = fschmd_update_device(dev); | |
498 | ||
453e308d | 499 | if (data->fan_status[index] & FSCHMD_FAN_ALARM) |
569ff102 HG |
500 | return sprintf(buf, "1\n"); |
501 | else | |
502 | return sprintf(buf, "0\n"); | |
503 | } | |
504 | ||
22ed7883 GR |
505 | static ssize_t fan_fault_show(struct device *dev, |
506 | struct device_attribute *devattr, char *buf) | |
569ff102 HG |
507 | { |
508 | int index = to_sensor_dev_attr(devattr)->index; | |
509 | struct fschmd_data *data = fschmd_update_device(dev); | |
510 | ||
453e308d | 511 | if (data->fan_status[index] & FSCHMD_FAN_NOT_PRESENT) |
569ff102 HG |
512 | return sprintf(buf, "1\n"); |
513 | else | |
514 | return sprintf(buf, "0\n"); | |
515 | } | |
516 | ||
517 | ||
22ed7883 GR |
518 | static ssize_t pwm_auto_point1_pwm_show(struct device *dev, |
519 | struct device_attribute *devattr, | |
520 | char *buf) | |
569ff102 HG |
521 | { |
522 | int index = to_sensor_dev_attr(devattr)->index; | |
c69ab2b7 HG |
523 | struct fschmd_data *data = fschmd_update_device(dev); |
524 | int val = data->fan_min[index]; | |
569ff102 | 525 | |
c69ab2b7 | 526 | /* 0 = allow turning off (except on the syl), 1-255 = 50-100% */ |
dc71afe5 | 527 | if (val || data->kind == fscsyl) |
569ff102 HG |
528 | val = val / 2 + 128; |
529 | ||
530 | return sprintf(buf, "%d\n", val); | |
531 | } | |
532 | ||
22ed7883 GR |
533 | static ssize_t pwm_auto_point1_pwm_store(struct device *dev, |
534 | struct device_attribute *devattr, | |
535 | const char *buf, size_t count) | |
569ff102 HG |
536 | { |
537 | int index = to_sensor_dev_attr(devattr)->index; | |
538 | struct fschmd_data *data = dev_get_drvdata(dev); | |
525ad373 GR |
539 | unsigned long v; |
540 | int err; | |
541 | ||
542 | err = kstrtoul(buf, 10, &v); | |
543 | if (err) | |
544 | return err; | |
569ff102 | 545 | |
c69ab2b7 | 546 | /* reg: 0 = allow turning off (except on the syl), 1-255 = 50-100% */ |
dc71afe5 | 547 | if (v || data->kind == fscsyl) { |
2a844c14 | 548 | v = clamp_val(v, 128, 255); |
569ff102 HG |
549 | v = (v - 128) * 2 + 1; |
550 | } | |
551 | ||
552 | mutex_lock(&data->update_lock); | |
553 | ||
40ac1994 | 554 | i2c_smbus_write_byte_data(to_i2c_client(dev), |
569ff102 HG |
555 | FSCHMD_REG_FAN_MIN[data->kind][index], v); |
556 | data->fan_min[index] = v; | |
557 | ||
558 | mutex_unlock(&data->update_lock); | |
559 | ||
560 | return count; | |
561 | } | |
562 | ||
563 | ||
525ad373 GR |
564 | /* |
565 | * The FSC hwmon family has the ability to force an attached alert led to flash | |
566 | * from software, we export this as an alert_led sysfs attr | |
567 | */ | |
e34e885b | 568 | static ssize_t alert_led_show(struct device *dev, |
569ff102 HG |
569 | struct device_attribute *devattr, char *buf) |
570 | { | |
571 | struct fschmd_data *data = fschmd_update_device(dev); | |
572 | ||
453e308d | 573 | if (data->global_control & FSCHMD_CONTROL_ALERT_LED) |
569ff102 HG |
574 | return sprintf(buf, "1\n"); |
575 | else | |
576 | return sprintf(buf, "0\n"); | |
577 | } | |
578 | ||
e34e885b | 579 | static ssize_t alert_led_store(struct device *dev, |
569ff102 HG |
580 | struct device_attribute *devattr, const char *buf, size_t count) |
581 | { | |
582 | u8 reg; | |
583 | struct fschmd_data *data = dev_get_drvdata(dev); | |
525ad373 GR |
584 | unsigned long v; |
585 | int err; | |
586 | ||
587 | err = kstrtoul(buf, 10, &v); | |
588 | if (err) | |
589 | return err; | |
569ff102 HG |
590 | |
591 | mutex_lock(&data->update_lock); | |
592 | ||
40ac1994 | 593 | reg = i2c_smbus_read_byte_data(to_i2c_client(dev), FSCHMD_REG_CONTROL); |
569ff102 HG |
594 | |
595 | if (v) | |
453e308d | 596 | reg |= FSCHMD_CONTROL_ALERT_LED; |
569ff102 | 597 | else |
453e308d | 598 | reg &= ~FSCHMD_CONTROL_ALERT_LED; |
569ff102 | 599 | |
40ac1994 | 600 | i2c_smbus_write_byte_data(to_i2c_client(dev), FSCHMD_REG_CONTROL, reg); |
569ff102 HG |
601 | |
602 | data->global_control = reg; | |
603 | ||
604 | mutex_unlock(&data->update_lock); | |
605 | ||
606 | return count; | |
607 | } | |
608 | ||
e34e885b | 609 | static DEVICE_ATTR_RW(alert_led); |
c69ab2b7 | 610 | |
569ff102 | 611 | static struct sensor_device_attribute fschmd_attr[] = { |
22ed7883 GR |
612 | SENSOR_ATTR_RO(in0_input, in_value, 0), |
613 | SENSOR_ATTR_RO(in1_input, in_value, 1), | |
614 | SENSOR_ATTR_RO(in2_input, in_value, 2), | |
615 | SENSOR_ATTR_RO(in3_input, in_value, 3), | |
616 | SENSOR_ATTR_RO(in4_input, in_value, 4), | |
617 | SENSOR_ATTR_RO(in5_input, in_value, 5), | |
569ff102 HG |
618 | }; |
619 | ||
620 | static struct sensor_device_attribute fschmd_temp_attr[] = { | |
22ed7883 GR |
621 | SENSOR_ATTR_RO(temp1_input, temp_value, 0), |
622 | SENSOR_ATTR_RW(temp1_max, temp_max, 0), | |
623 | SENSOR_ATTR_RO(temp1_fault, temp_fault, 0), | |
624 | SENSOR_ATTR_RO(temp1_alarm, temp_alarm, 0), | |
625 | SENSOR_ATTR_RO(temp2_input, temp_value, 1), | |
626 | SENSOR_ATTR_RW(temp2_max, temp_max, 1), | |
627 | SENSOR_ATTR_RO(temp2_fault, temp_fault, 1), | |
628 | SENSOR_ATTR_RO(temp2_alarm, temp_alarm, 1), | |
629 | SENSOR_ATTR_RO(temp3_input, temp_value, 2), | |
630 | SENSOR_ATTR_RW(temp3_max, temp_max, 2), | |
631 | SENSOR_ATTR_RO(temp3_fault, temp_fault, 2), | |
632 | SENSOR_ATTR_RO(temp3_alarm, temp_alarm, 2), | |
633 | SENSOR_ATTR_RO(temp4_input, temp_value, 3), | |
634 | SENSOR_ATTR_RW(temp4_max, temp_max, 3), | |
635 | SENSOR_ATTR_RO(temp4_fault, temp_fault, 3), | |
636 | SENSOR_ATTR_RO(temp4_alarm, temp_alarm, 3), | |
637 | SENSOR_ATTR_RO(temp5_input, temp_value, 4), | |
638 | SENSOR_ATTR_RW(temp5_max, temp_max, 4), | |
639 | SENSOR_ATTR_RO(temp5_fault, temp_fault, 4), | |
640 | SENSOR_ATTR_RO(temp5_alarm, temp_alarm, 4), | |
641 | SENSOR_ATTR_RO(temp6_input, temp_value, 5), | |
642 | SENSOR_ATTR_RW(temp6_max, temp_max, 5), | |
643 | SENSOR_ATTR_RO(temp6_fault, temp_fault, 5), | |
644 | SENSOR_ATTR_RO(temp6_alarm, temp_alarm, 5), | |
645 | SENSOR_ATTR_RO(temp7_input, temp_value, 6), | |
646 | SENSOR_ATTR_RW(temp7_max, temp_max, 6), | |
647 | SENSOR_ATTR_RO(temp7_fault, temp_fault, 6), | |
648 | SENSOR_ATTR_RO(temp7_alarm, temp_alarm, 6), | |
649 | SENSOR_ATTR_RO(temp8_input, temp_value, 7), | |
650 | SENSOR_ATTR_RW(temp8_max, temp_max, 7), | |
651 | SENSOR_ATTR_RO(temp8_fault, temp_fault, 7), | |
652 | SENSOR_ATTR_RO(temp8_alarm, temp_alarm, 7), | |
653 | SENSOR_ATTR_RO(temp9_input, temp_value, 8), | |
654 | SENSOR_ATTR_RW(temp9_max, temp_max, 8), | |
655 | SENSOR_ATTR_RO(temp9_fault, temp_fault, 8), | |
656 | SENSOR_ATTR_RO(temp9_alarm, temp_alarm, 8), | |
657 | SENSOR_ATTR_RO(temp10_input, temp_value, 9), | |
658 | SENSOR_ATTR_RW(temp10_max, temp_max, 9), | |
659 | SENSOR_ATTR_RO(temp10_fault, temp_fault, 9), | |
660 | SENSOR_ATTR_RO(temp10_alarm, temp_alarm, 9), | |
661 | SENSOR_ATTR_RO(temp11_input, temp_value, 10), | |
662 | SENSOR_ATTR_RW(temp11_max, temp_max, 10), | |
663 | SENSOR_ATTR_RO(temp11_fault, temp_fault, 10), | |
664 | SENSOR_ATTR_RO(temp11_alarm, temp_alarm, 10), | |
569ff102 HG |
665 | }; |
666 | ||
667 | static struct sensor_device_attribute fschmd_fan_attr[] = { | |
22ed7883 GR |
668 | SENSOR_ATTR_RO(fan1_input, fan_value, 0), |
669 | SENSOR_ATTR_RW(fan1_div, fan_div, 0), | |
670 | SENSOR_ATTR_RO(fan1_alarm, fan_alarm, 0), | |
671 | SENSOR_ATTR_RO(fan1_fault, fan_fault, 0), | |
672 | SENSOR_ATTR_RW(pwm1_auto_point1_pwm, pwm_auto_point1_pwm, 0), | |
673 | SENSOR_ATTR_RO(fan2_input, fan_value, 1), | |
674 | SENSOR_ATTR_RW(fan2_div, fan_div, 1), | |
675 | SENSOR_ATTR_RO(fan2_alarm, fan_alarm, 1), | |
676 | SENSOR_ATTR_RO(fan2_fault, fan_fault, 1), | |
677 | SENSOR_ATTR_RW(pwm2_auto_point1_pwm, pwm_auto_point1_pwm, 1), | |
678 | SENSOR_ATTR_RO(fan3_input, fan_value, 2), | |
679 | SENSOR_ATTR_RW(fan3_div, fan_div, 2), | |
680 | SENSOR_ATTR_RO(fan3_alarm, fan_alarm, 2), | |
681 | SENSOR_ATTR_RO(fan3_fault, fan_fault, 2), | |
682 | SENSOR_ATTR_RW(pwm3_auto_point1_pwm, pwm_auto_point1_pwm, 2), | |
683 | SENSOR_ATTR_RO(fan4_input, fan_value, 3), | |
684 | SENSOR_ATTR_RW(fan4_div, fan_div, 3), | |
685 | SENSOR_ATTR_RO(fan4_alarm, fan_alarm, 3), | |
686 | SENSOR_ATTR_RO(fan4_fault, fan_fault, 3), | |
687 | SENSOR_ATTR_RW(pwm4_auto_point1_pwm, pwm_auto_point1_pwm, 3), | |
688 | SENSOR_ATTR_RO(fan5_input, fan_value, 4), | |
689 | SENSOR_ATTR_RW(fan5_div, fan_div, 4), | |
690 | SENSOR_ATTR_RO(fan5_alarm, fan_alarm, 4), | |
691 | SENSOR_ATTR_RO(fan5_fault, fan_fault, 4), | |
692 | SENSOR_ATTR_RW(pwm5_auto_point1_pwm, pwm_auto_point1_pwm, 4), | |
693 | SENSOR_ATTR_RO(fan6_input, fan_value, 5), | |
694 | SENSOR_ATTR_RW(fan6_div, fan_div, 5), | |
695 | SENSOR_ATTR_RO(fan6_alarm, fan_alarm, 5), | |
696 | SENSOR_ATTR_RO(fan6_fault, fan_fault, 5), | |
697 | SENSOR_ATTR_RW(pwm6_auto_point1_pwm, pwm_auto_point1_pwm, 5), | |
698 | SENSOR_ATTR_RO(fan7_input, fan_value, 6), | |
699 | SENSOR_ATTR_RW(fan7_div, fan_div, 6), | |
700 | SENSOR_ATTR_RO(fan7_alarm, fan_alarm, 6), | |
701 | SENSOR_ATTR_RO(fan7_fault, fan_fault, 6), | |
702 | SENSOR_ATTR_RW(pwm7_auto_point1_pwm, pwm_auto_point1_pwm, 6), | |
569ff102 HG |
703 | }; |
704 | ||
705 | ||
706 | /* | |
97950c3d HG |
707 | * Watchdog routines |
708 | */ | |
709 | ||
710 | static int watchdog_set_timeout(struct fschmd_data *data, int timeout) | |
711 | { | |
712 | int ret, resolution; | |
713 | int kind = data->kind + 1; /* 0-x array index -> 1-x module param */ | |
714 | ||
715 | /* 2 second or 60 second resolution? */ | |
716 | if (timeout <= 510 || kind == fscpos || kind == fscscy) | |
717 | resolution = 2; | |
718 | else | |
719 | resolution = 60; | |
720 | ||
721 | if (timeout < resolution || timeout > (resolution * 255)) | |
722 | return -EINVAL; | |
723 | ||
724 | mutex_lock(&data->watchdog_lock); | |
725 | if (!data->client) { | |
726 | ret = -ENODEV; | |
727 | goto leave; | |
728 | } | |
729 | ||
730 | if (resolution == 2) | |
731 | data->watchdog_control &= ~FSCHMD_WDOG_CONTROL_RESOLUTION; | |
732 | else | |
733 | data->watchdog_control |= FSCHMD_WDOG_CONTROL_RESOLUTION; | |
734 | ||
735 | data->watchdog_preset = DIV_ROUND_UP(timeout, resolution); | |
736 | ||
737 | /* Write new timeout value */ | |
c69ab2b7 HG |
738 | i2c_smbus_write_byte_data(data->client, |
739 | FSCHMD_REG_WDOG_PRESET[data->kind], data->watchdog_preset); | |
97950c3d | 740 | /* Write new control register, do not trigger! */ |
c69ab2b7 HG |
741 | i2c_smbus_write_byte_data(data->client, |
742 | FSCHMD_REG_WDOG_CONTROL[data->kind], | |
97950c3d HG |
743 | data->watchdog_control & ~FSCHMD_WDOG_CONTROL_TRIGGER); |
744 | ||
745 | ret = data->watchdog_preset * resolution; | |
746 | ||
747 | leave: | |
748 | mutex_unlock(&data->watchdog_lock); | |
749 | return ret; | |
750 | } | |
751 | ||
752 | static int watchdog_get_timeout(struct fschmd_data *data) | |
753 | { | |
754 | int timeout; | |
755 | ||
756 | mutex_lock(&data->watchdog_lock); | |
757 | if (data->watchdog_control & FSCHMD_WDOG_CONTROL_RESOLUTION) | |
758 | timeout = data->watchdog_preset * 60; | |
759 | else | |
760 | timeout = data->watchdog_preset * 2; | |
761 | mutex_unlock(&data->watchdog_lock); | |
762 | ||
763 | return timeout; | |
764 | } | |
765 | ||
766 | static int watchdog_trigger(struct fschmd_data *data) | |
767 | { | |
768 | int ret = 0; | |
769 | ||
770 | mutex_lock(&data->watchdog_lock); | |
771 | if (!data->client) { | |
772 | ret = -ENODEV; | |
773 | goto leave; | |
774 | } | |
775 | ||
776 | data->watchdog_control |= FSCHMD_WDOG_CONTROL_TRIGGER; | |
c69ab2b7 HG |
777 | i2c_smbus_write_byte_data(data->client, |
778 | FSCHMD_REG_WDOG_CONTROL[data->kind], | |
779 | data->watchdog_control); | |
97950c3d HG |
780 | leave: |
781 | mutex_unlock(&data->watchdog_lock); | |
782 | return ret; | |
783 | } | |
784 | ||
785 | static int watchdog_stop(struct fschmd_data *data) | |
786 | { | |
787 | int ret = 0; | |
788 | ||
789 | mutex_lock(&data->watchdog_lock); | |
790 | if (!data->client) { | |
791 | ret = -ENODEV; | |
792 | goto leave; | |
793 | } | |
794 | ||
795 | data->watchdog_control &= ~FSCHMD_WDOG_CONTROL_STARTED; | |
525ad373 GR |
796 | /* |
797 | * Don't store the stop flag in our watchdog control register copy, as | |
798 | * its a write only bit (read always returns 0) | |
799 | */ | |
c69ab2b7 HG |
800 | i2c_smbus_write_byte_data(data->client, |
801 | FSCHMD_REG_WDOG_CONTROL[data->kind], | |
97950c3d HG |
802 | data->watchdog_control | FSCHMD_WDOG_CONTROL_STOP); |
803 | leave: | |
804 | mutex_unlock(&data->watchdog_lock); | |
805 | return ret; | |
806 | } | |
807 | ||
808 | static int watchdog_open(struct inode *inode, struct file *filp) | |
809 | { | |
810 | struct fschmd_data *pos, *data = NULL; | |
c453615f | 811 | int watchdog_is_open; |
97950c3d | 812 | |
525ad373 GR |
813 | /* |
814 | * We get called from drivers/char/misc.c with misc_mtx hold, and we | |
815 | * call misc_register() from fschmd_probe() with watchdog_data_mutex | |
816 | * hold, as misc_register() takes the misc_mtx lock, this is a possible | |
817 | * deadlock, so we use mutex_trylock here. | |
818 | */ | |
97950c3d HG |
819 | if (!mutex_trylock(&watchdog_data_mutex)) |
820 | return -ERESTARTSYS; | |
821 | list_for_each_entry(pos, &watchdog_data_list, list) { | |
822 | if (pos->watchdog_miscdev.minor == iminor(inode)) { | |
823 | data = pos; | |
824 | break; | |
825 | } | |
826 | } | |
827 | /* Note we can never not have found data, so we don't check for this */ | |
c453615f HG |
828 | watchdog_is_open = test_and_set_bit(0, &data->watchdog_is_open); |
829 | if (!watchdog_is_open) | |
830 | kref_get(&data->kref); | |
97950c3d HG |
831 | mutex_unlock(&watchdog_data_mutex); |
832 | ||
c453615f | 833 | if (watchdog_is_open) |
97950c3d HG |
834 | return -EBUSY; |
835 | ||
836 | /* Start the watchdog */ | |
837 | watchdog_trigger(data); | |
838 | filp->private_data = data; | |
839 | ||
840 | return nonseekable_open(inode, filp); | |
841 | } | |
842 | ||
843 | static int watchdog_release(struct inode *inode, struct file *filp) | |
844 | { | |
845 | struct fschmd_data *data = filp->private_data; | |
846 | ||
847 | if (data->watchdog_expect_close) { | |
848 | watchdog_stop(data); | |
849 | data->watchdog_expect_close = 0; | |
850 | } else { | |
851 | watchdog_trigger(data); | |
852 | dev_crit(&data->client->dev, | |
853 | "unexpected close, not stopping watchdog!\n"); | |
854 | } | |
855 | ||
856 | clear_bit(0, &data->watchdog_is_open); | |
857 | ||
858 | mutex_lock(&watchdog_data_mutex); | |
859 | kref_put(&data->kref, fschmd_release_resources); | |
860 | mutex_unlock(&watchdog_data_mutex); | |
861 | ||
862 | return 0; | |
863 | } | |
864 | ||
865 | static ssize_t watchdog_write(struct file *filp, const char __user *buf, | |
866 | size_t count, loff_t *offset) | |
867 | { | |
c7702c31 | 868 | int ret; |
97950c3d HG |
869 | struct fschmd_data *data = filp->private_data; |
870 | ||
871 | if (count) { | |
872 | if (!nowayout) { | |
873 | size_t i; | |
874 | ||
875 | /* Clear it in case it was set with a previous write */ | |
876 | data->watchdog_expect_close = 0; | |
877 | ||
878 | for (i = 0; i != count; i++) { | |
879 | char c; | |
880 | if (get_user(c, buf + i)) | |
881 | return -EFAULT; | |
882 | if (c == 'V') | |
883 | data->watchdog_expect_close = 1; | |
884 | } | |
885 | } | |
886 | ret = watchdog_trigger(data); | |
887 | if (ret < 0) | |
888 | return ret; | |
889 | } | |
890 | return count; | |
891 | } | |
892 | ||
525ad373 GR |
893 | static long watchdog_ioctl(struct file *filp, unsigned int cmd, |
894 | unsigned long arg) | |
97950c3d | 895 | { |
1b7243e8 | 896 | struct watchdog_info ident = { |
97950c3d HG |
897 | .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | |
898 | WDIOF_CARDRESET, | |
899 | .identity = "FSC watchdog" | |
900 | }; | |
901 | int i, ret = 0; | |
902 | struct fschmd_data *data = filp->private_data; | |
903 | ||
904 | switch (cmd) { | |
905 | case WDIOC_GETSUPPORT: | |
906 | ident.firmware_version = data->revision; | |
907 | if (!nowayout) | |
908 | ident.options |= WDIOF_MAGICCLOSE; | |
909 | if (copy_to_user((void __user *)arg, &ident, sizeof(ident))) | |
910 | ret = -EFAULT; | |
911 | break; | |
912 | ||
913 | case WDIOC_GETSTATUS: | |
914 | ret = put_user(0, (int __user *)arg); | |
915 | break; | |
916 | ||
917 | case WDIOC_GETBOOTSTATUS: | |
918 | if (data->watchdog_state & FSCHMD_WDOG_STATE_CARDRESET) | |
919 | ret = put_user(WDIOF_CARDRESET, (int __user *)arg); | |
920 | else | |
921 | ret = put_user(0, (int __user *)arg); | |
922 | break; | |
923 | ||
924 | case WDIOC_KEEPALIVE: | |
925 | ret = watchdog_trigger(data); | |
926 | break; | |
927 | ||
928 | case WDIOC_GETTIMEOUT: | |
929 | i = watchdog_get_timeout(data); | |
930 | ret = put_user(i, (int __user *)arg); | |
931 | break; | |
932 | ||
933 | case WDIOC_SETTIMEOUT: | |
934 | if (get_user(i, (int __user *)arg)) { | |
935 | ret = -EFAULT; | |
936 | break; | |
937 | } | |
938 | ret = watchdog_set_timeout(data, i); | |
939 | if (ret > 0) | |
940 | ret = put_user(ret, (int __user *)arg); | |
941 | break; | |
942 | ||
943 | case WDIOC_SETOPTIONS: | |
944 | if (get_user(i, (int __user *)arg)) { | |
945 | ret = -EFAULT; | |
946 | break; | |
947 | } | |
948 | ||
949 | if (i & WDIOS_DISABLECARD) | |
950 | ret = watchdog_stop(data); | |
951 | else if (i & WDIOS_ENABLECARD) | |
952 | ret = watchdog_trigger(data); | |
953 | else | |
954 | ret = -EINVAL; | |
955 | ||
956 | break; | |
957 | default: | |
958 | ret = -ENOTTY; | |
959 | } | |
97950c3d HG |
960 | return ret; |
961 | } | |
962 | ||
828c0950 | 963 | static const struct file_operations watchdog_fops = { |
97950c3d HG |
964 | .owner = THIS_MODULE, |
965 | .llseek = no_llseek, | |
966 | .open = watchdog_open, | |
967 | .release = watchdog_release, | |
968 | .write = watchdog_write, | |
55929332 | 969 | .unlocked_ioctl = watchdog_ioctl, |
97950c3d HG |
970 | }; |
971 | ||
972 | ||
973 | /* | |
974 | * Detect, register, unregister and update device functions | |
569ff102 HG |
975 | */ |
976 | ||
525ad373 GR |
977 | /* |
978 | * DMI decode routine to read voltage scaling factors from special DMI tables, | |
979 | * which are available on FSC machines with an fscher or later chip. | |
980 | */ | |
e7a19c56 | 981 | static void fschmd_dmi_decode(const struct dmi_header *header, void *dummy) |
7845cd79 HG |
982 | { |
983 | int i, mult[3] = { 0 }, offset[3] = { 0 }, vref = 0, found = 0; | |
984 | ||
525ad373 GR |
985 | /* |
986 | * dmi code ugliness, we get passed the address of the contents of | |
987 | * a complete DMI record, but in the form of a dmi_header pointer, in | |
988 | * reality this address holds header->length bytes of which the header | |
989 | * are the first 4 bytes | |
990 | */ | |
7845cd79 HG |
991 | u8 *dmi_data = (u8 *)header; |
992 | ||
993 | /* We are looking for OEM-specific type 185 */ | |
994 | if (header->type != 185) | |
995 | return; | |
996 | ||
525ad373 GR |
997 | /* |
998 | * we are looking for what Siemens calls "subtype" 19, the subtype | |
999 | * is stored in byte 5 of the dmi block | |
1000 | */ | |
7845cd79 HG |
1001 | if (header->length < 5 || dmi_data[4] != 19) |
1002 | return; | |
1003 | ||
525ad373 GR |
1004 | /* |
1005 | * After the subtype comes 1 unknown byte and then blocks of 5 bytes, | |
1006 | * consisting of what Siemens calls an "Entity" number, followed by | |
1007 | * 2 16-bit words in LSB first order | |
1008 | */ | |
7845cd79 HG |
1009 | for (i = 6; (i + 4) < header->length; i += 5) { |
1010 | /* entity 1 - 3: voltage multiplier and offset */ | |
1011 | if (dmi_data[i] >= 1 && dmi_data[i] <= 3) { | |
1012 | /* Our in sensors order and the DMI order differ */ | |
1013 | const int shuffle[3] = { 1, 0, 2 }; | |
1014 | int in = shuffle[dmi_data[i] - 1]; | |
1015 | ||
1016 | /* Check for twice the same entity */ | |
1017 | if (found & (1 << in)) | |
1018 | return; | |
1019 | ||
1020 | mult[in] = dmi_data[i + 1] | (dmi_data[i + 2] << 8); | |
1021 | offset[in] = dmi_data[i + 3] | (dmi_data[i + 4] << 8); | |
1022 | ||
1023 | found |= 1 << in; | |
1024 | } | |
1025 | ||
1026 | /* entity 7: reference voltage */ | |
1027 | if (dmi_data[i] == 7) { | |
1028 | /* Check for twice the same entity */ | |
1029 | if (found & 0x08) | |
1030 | return; | |
1031 | ||
1032 | vref = dmi_data[i + 1] | (dmi_data[i + 2] << 8); | |
1033 | ||
1034 | found |= 0x08; | |
1035 | } | |
1036 | } | |
1037 | ||
1038 | if (found == 0x0F) { | |
1039 | for (i = 0; i < 3; i++) { | |
1040 | dmi_mult[i] = mult[i] * 10; | |
1041 | dmi_offset[i] = offset[i] * 10; | |
1042 | } | |
525ad373 GR |
1043 | /* |
1044 | * According to the docs there should be separate dmi entries | |
1045 | * for the mult's and offsets of in3-5 of the syl, but on | |
1046 | * my test machine these are not present | |
1047 | */ | |
c69ab2b7 HG |
1048 | dmi_mult[3] = dmi_mult[2]; |
1049 | dmi_mult[4] = dmi_mult[1]; | |
1050 | dmi_mult[5] = dmi_mult[2]; | |
1051 | dmi_offset[3] = dmi_offset[2]; | |
1052 | dmi_offset[4] = dmi_offset[1]; | |
1053 | dmi_offset[5] = dmi_offset[2]; | |
7845cd79 HG |
1054 | dmi_vref = vref; |
1055 | } | |
1056 | } | |
1057 | ||
310ec792 | 1058 | static int fschmd_detect(struct i2c_client *client, |
40ac1994 | 1059 | struct i2c_board_info *info) |
569ff102 | 1060 | { |
52df6440 | 1061 | enum chips kind; |
40ac1994 | 1062 | struct i2c_adapter *adapter = client->adapter; |
52df6440 | 1063 | char id[4]; |
569ff102 HG |
1064 | |
1065 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | |
40ac1994 | 1066 | return -ENODEV; |
569ff102 HG |
1067 | |
1068 | /* Detect & Identify the chip */ | |
52df6440 JD |
1069 | id[0] = i2c_smbus_read_byte_data(client, FSCHMD_REG_IDENT_0); |
1070 | id[1] = i2c_smbus_read_byte_data(client, FSCHMD_REG_IDENT_1); | |
1071 | id[2] = i2c_smbus_read_byte_data(client, FSCHMD_REG_IDENT_2); | |
1072 | id[3] = '\0'; | |
1073 | ||
1074 | if (!strcmp(id, "PEG")) | |
1075 | kind = fscpos; | |
1076 | else if (!strcmp(id, "HER")) | |
1077 | kind = fscher; | |
1078 | else if (!strcmp(id, "SCY")) | |
1079 | kind = fscscy; | |
1080 | else if (!strcmp(id, "HRC")) | |
1081 | kind = fschrc; | |
1082 | else if (!strcmp(id, "HMD")) | |
1083 | kind = fschmd; | |
1084 | else if (!strcmp(id, "HDS")) | |
1085 | kind = fschds; | |
1086 | else if (!strcmp(id, "SYL")) | |
1087 | kind = fscsyl; | |
1088 | else | |
1089 | return -ENODEV; | |
569ff102 | 1090 | |
dc71afe5 | 1091 | strlcpy(info->type, fschmd_id[kind].name, I2C_NAME_SIZE); |
40ac1994 JD |
1092 | |
1093 | return 0; | |
1094 | } | |
1095 | ||
1096 | static int fschmd_probe(struct i2c_client *client, | |
1097 | const struct i2c_device_id *id) | |
1098 | { | |
1099 | struct fschmd_data *data; | |
de15f093 HG |
1100 | const char * const names[7] = { "Poseidon", "Hermes", "Scylla", |
1101 | "Heracles", "Heimdall", "Hades", "Syleus" }; | |
97950c3d | 1102 | const int watchdog_minors[] = { WATCHDOG_MINOR, 212, 213, 214, 215 }; |
40ac1994 JD |
1103 | int i, err; |
1104 | enum chips kind = id->driver_data; | |
1105 | ||
1106 | data = kzalloc(sizeof(struct fschmd_data), GFP_KERNEL); | |
1107 | if (!data) | |
1108 | return -ENOMEM; | |
1109 | ||
1110 | i2c_set_clientdata(client, data); | |
1111 | mutex_init(&data->update_lock); | |
97950c3d HG |
1112 | mutex_init(&data->watchdog_lock); |
1113 | INIT_LIST_HEAD(&data->list); | |
1114 | kref_init(&data->kref); | |
525ad373 GR |
1115 | /* |
1116 | * Store client pointer in our data struct for watchdog usage | |
1117 | * (where the client is found through a data ptr instead of the | |
1118 | * otherway around) | |
1119 | */ | |
97950c3d | 1120 | data->client = client; |
dc71afe5 | 1121 | data->kind = kind; |
40ac1994 | 1122 | |
569ff102 | 1123 | if (kind == fscpos) { |
525ad373 GR |
1124 | /* |
1125 | * The Poseidon has hardwired temp limits, fill these | |
1126 | * in for the alarm resetting code | |
1127 | */ | |
569ff102 HG |
1128 | data->temp_max[0] = 70 + 128; |
1129 | data->temp_max[1] = 50 + 128; | |
1130 | data->temp_max[2] = 50 + 128; | |
1131 | } | |
1132 | ||
7845cd79 | 1133 | /* Read the special DMI table for fscher and newer chips */ |
453e308d | 1134 | if ((kind == fscher || kind >= fschrc) && dmi_vref == -1) { |
e7a19c56 | 1135 | dmi_walk(fschmd_dmi_decode, NULL); |
7845cd79 | 1136 | if (dmi_vref == -1) { |
453e308d HG |
1137 | dev_warn(&client->dev, |
1138 | "Couldn't get voltage scaling factors from " | |
7845cd79 HG |
1139 | "BIOS DMI table, using builtin defaults\n"); |
1140 | dmi_vref = 33; | |
1141 | } | |
1142 | } | |
1143 | ||
97950c3d HG |
1144 | /* Read in some never changing registers */ |
1145 | data->revision = i2c_smbus_read_byte_data(client, FSCHMD_REG_REVISION); | |
1146 | data->global_control = i2c_smbus_read_byte_data(client, | |
1147 | FSCHMD_REG_CONTROL); | |
1148 | data->watchdog_control = i2c_smbus_read_byte_data(client, | |
c69ab2b7 | 1149 | FSCHMD_REG_WDOG_CONTROL[data->kind]); |
97950c3d | 1150 | data->watchdog_state = i2c_smbus_read_byte_data(client, |
c69ab2b7 | 1151 | FSCHMD_REG_WDOG_STATE[data->kind]); |
97950c3d | 1152 | data->watchdog_preset = i2c_smbus_read_byte_data(client, |
c69ab2b7 | 1153 | FSCHMD_REG_WDOG_PRESET[data->kind]); |
97950c3d | 1154 | |
c69ab2b7 HG |
1155 | err = device_create_file(&client->dev, &dev_attr_alert_led); |
1156 | if (err) | |
1157 | goto exit_detach; | |
569ff102 | 1158 | |
c69ab2b7 | 1159 | for (i = 0; i < FSCHMD_NO_VOLT_SENSORS[data->kind]; i++) { |
569ff102 HG |
1160 | err = device_create_file(&client->dev, |
1161 | &fschmd_attr[i].dev_attr); | |
1162 | if (err) | |
1163 | goto exit_detach; | |
1164 | } | |
1165 | ||
1166 | for (i = 0; i < (FSCHMD_NO_TEMP_SENSORS[data->kind] * 4); i++) { | |
1167 | /* Poseidon doesn't have TEMP_LIMIT registers */ | |
1168 | if (kind == fscpos && fschmd_temp_attr[i].dev_attr.show == | |
22ed7883 | 1169 | temp_max_show) |
569ff102 HG |
1170 | continue; |
1171 | ||
c69ab2b7 HG |
1172 | if (kind == fscsyl) { |
1173 | if (i % 4 == 0) | |
1174 | data->temp_status[i / 4] = | |
1175 | i2c_smbus_read_byte_data(client, | |
1176 | FSCHMD_REG_TEMP_STATE | |
1177 | [data->kind][i / 4]); | |
1178 | if (data->temp_status[i / 4] & FSCHMD_TEMP_DISABLED) | |
1179 | continue; | |
1180 | } | |
1181 | ||
569ff102 HG |
1182 | err = device_create_file(&client->dev, |
1183 | &fschmd_temp_attr[i].dev_attr); | |
1184 | if (err) | |
1185 | goto exit_detach; | |
1186 | } | |
1187 | ||
1188 | for (i = 0; i < (FSCHMD_NO_FAN_SENSORS[data->kind] * 5); i++) { | |
1189 | /* Poseidon doesn't have a FAN_MIN register for its 3rd fan */ | |
1190 | if (kind == fscpos && | |
1191 | !strcmp(fschmd_fan_attr[i].dev_attr.attr.name, | |
1192 | "pwm3_auto_point1_pwm")) | |
1193 | continue; | |
1194 | ||
c69ab2b7 HG |
1195 | if (kind == fscsyl) { |
1196 | if (i % 5 == 0) | |
1197 | data->fan_status[i / 5] = | |
1198 | i2c_smbus_read_byte_data(client, | |
1199 | FSCHMD_REG_FAN_STATE | |
1200 | [data->kind][i / 5]); | |
1201 | if (data->fan_status[i / 5] & FSCHMD_FAN_DISABLED) | |
1202 | continue; | |
1203 | } | |
1204 | ||
569ff102 HG |
1205 | err = device_create_file(&client->dev, |
1206 | &fschmd_fan_attr[i].dev_attr); | |
1207 | if (err) | |
1208 | goto exit_detach; | |
1209 | } | |
1210 | ||
1211 | data->hwmon_dev = hwmon_device_register(&client->dev); | |
1212 | if (IS_ERR(data->hwmon_dev)) { | |
1213 | err = PTR_ERR(data->hwmon_dev); | |
1214 | data->hwmon_dev = NULL; | |
1215 | goto exit_detach; | |
1216 | } | |
1217 | ||
525ad373 GR |
1218 | /* |
1219 | * We take the data_mutex lock early so that watchdog_open() cannot | |
1220 | * run when misc_register() has completed, but we've not yet added | |
1221 | * our data to the watchdog_data_list (and set the default timeout) | |
1222 | */ | |
97950c3d HG |
1223 | mutex_lock(&watchdog_data_mutex); |
1224 | for (i = 0; i < ARRAY_SIZE(watchdog_minors); i++) { | |
1225 | /* Register our watchdog part */ | |
1226 | snprintf(data->watchdog_name, sizeof(data->watchdog_name), | |
1227 | "watchdog%c", (i == 0) ? '\0' : ('0' + i)); | |
1228 | data->watchdog_miscdev.name = data->watchdog_name; | |
1229 | data->watchdog_miscdev.fops = &watchdog_fops; | |
1230 | data->watchdog_miscdev.minor = watchdog_minors[i]; | |
1231 | err = misc_register(&data->watchdog_miscdev); | |
1232 | if (err == -EBUSY) | |
1233 | continue; | |
1234 | if (err) { | |
1235 | data->watchdog_miscdev.minor = 0; | |
1236 | dev_err(&client->dev, | |
1237 | "Registering watchdog chardev: %d\n", err); | |
1238 | break; | |
1239 | } | |
1240 | ||
1241 | list_add(&data->list, &watchdog_data_list); | |
1242 | watchdog_set_timeout(data, 60); | |
1243 | dev_info(&client->dev, | |
1244 | "Registered watchdog chardev major 10, minor: %d\n", | |
1245 | watchdog_minors[i]); | |
1246 | break; | |
1247 | } | |
1248 | if (i == ARRAY_SIZE(watchdog_minors)) { | |
1249 | data->watchdog_miscdev.minor = 0; | |
b55f3757 GR |
1250 | dev_warn(&client->dev, |
1251 | "Couldn't register watchdog chardev (due to no free minor)\n"); | |
97950c3d HG |
1252 | } |
1253 | mutex_unlock(&watchdog_data_mutex); | |
1254 | ||
453e308d | 1255 | dev_info(&client->dev, "Detected FSC %s chip, revision: %d\n", |
97950c3d | 1256 | names[data->kind], (int) data->revision); |
569ff102 HG |
1257 | |
1258 | return 0; | |
1259 | ||
1260 | exit_detach: | |
40ac1994 | 1261 | fschmd_remove(client); /* will also free data for us */ |
569ff102 HG |
1262 | return err; |
1263 | } | |
1264 | ||
40ac1994 | 1265 | static int fschmd_remove(struct i2c_client *client) |
569ff102 HG |
1266 | { |
1267 | struct fschmd_data *data = i2c_get_clientdata(client); | |
40ac1994 | 1268 | int i; |
569ff102 | 1269 | |
97950c3d HG |
1270 | /* Unregister the watchdog (if registered) */ |
1271 | if (data->watchdog_miscdev.minor) { | |
1272 | misc_deregister(&data->watchdog_miscdev); | |
1273 | if (data->watchdog_is_open) { | |
1274 | dev_warn(&client->dev, | |
1275 | "i2c client detached with watchdog open! " | |
1276 | "Stopping watchdog.\n"); | |
1277 | watchdog_stop(data); | |
1278 | } | |
1279 | mutex_lock(&watchdog_data_mutex); | |
1280 | list_del(&data->list); | |
1281 | mutex_unlock(&watchdog_data_mutex); | |
1282 | /* Tell the watchdog code the client is gone */ | |
1283 | mutex_lock(&data->watchdog_lock); | |
1284 | data->client = NULL; | |
1285 | mutex_unlock(&data->watchdog_lock); | |
1286 | } | |
1287 | ||
525ad373 GR |
1288 | /* |
1289 | * Check if registered in case we're called from fschmd_detect | |
1290 | * to cleanup after an error | |
1291 | */ | |
569ff102 HG |
1292 | if (data->hwmon_dev) |
1293 | hwmon_device_unregister(data->hwmon_dev); | |
1294 | ||
c69ab2b7 HG |
1295 | device_remove_file(&client->dev, &dev_attr_alert_led); |
1296 | for (i = 0; i < (FSCHMD_NO_VOLT_SENSORS[data->kind]); i++) | |
569ff102 HG |
1297 | device_remove_file(&client->dev, &fschmd_attr[i].dev_attr); |
1298 | for (i = 0; i < (FSCHMD_NO_TEMP_SENSORS[data->kind] * 4); i++) | |
1299 | device_remove_file(&client->dev, | |
1300 | &fschmd_temp_attr[i].dev_attr); | |
1301 | for (i = 0; i < (FSCHMD_NO_FAN_SENSORS[data->kind] * 5); i++) | |
1302 | device_remove_file(&client->dev, | |
1303 | &fschmd_fan_attr[i].dev_attr); | |
1304 | ||
97950c3d HG |
1305 | mutex_lock(&watchdog_data_mutex); |
1306 | kref_put(&data->kref, fschmd_release_resources); | |
1307 | mutex_unlock(&watchdog_data_mutex); | |
1308 | ||
569ff102 HG |
1309 | return 0; |
1310 | } | |
1311 | ||
1312 | static struct fschmd_data *fschmd_update_device(struct device *dev) | |
1313 | { | |
1314 | struct i2c_client *client = to_i2c_client(dev); | |
1315 | struct fschmd_data *data = i2c_get_clientdata(client); | |
1316 | int i; | |
1317 | ||
1318 | mutex_lock(&data->update_lock); | |
1319 | ||
1320 | if (time_after(jiffies, data->last_updated + 2 * HZ) || !data->valid) { | |
1321 | ||
1322 | for (i = 0; i < FSCHMD_NO_TEMP_SENSORS[data->kind]; i++) { | |
1323 | data->temp_act[i] = i2c_smbus_read_byte_data(client, | |
1324 | FSCHMD_REG_TEMP_ACT[data->kind][i]); | |
1325 | data->temp_status[i] = i2c_smbus_read_byte_data(client, | |
1326 | FSCHMD_REG_TEMP_STATE[data->kind][i]); | |
1327 | ||
1328 | /* The fscpos doesn't have TEMP_LIMIT registers */ | |
1329 | if (FSCHMD_REG_TEMP_LIMIT[data->kind][i]) | |
1330 | data->temp_max[i] = i2c_smbus_read_byte_data( | |
1331 | client, | |
1332 | FSCHMD_REG_TEMP_LIMIT[data->kind][i]); | |
1333 | ||
525ad373 GR |
1334 | /* |
1335 | * reset alarm if the alarm condition is gone, | |
1336 | * the chip doesn't do this itself | |
1337 | */ | |
569ff102 HG |
1338 | if ((data->temp_status[i] & FSCHMD_TEMP_ALARM_MASK) == |
1339 | FSCHMD_TEMP_ALARM_MASK && | |
1340 | data->temp_act[i] < data->temp_max[i]) | |
1341 | i2c_smbus_write_byte_data(client, | |
1342 | FSCHMD_REG_TEMP_STATE[data->kind][i], | |
c69ab2b7 | 1343 | data->temp_status[i]); |
569ff102 HG |
1344 | } |
1345 | ||
1346 | for (i = 0; i < FSCHMD_NO_FAN_SENSORS[data->kind]; i++) { | |
1347 | data->fan_act[i] = i2c_smbus_read_byte_data(client, | |
1348 | FSCHMD_REG_FAN_ACT[data->kind][i]); | |
1349 | data->fan_status[i] = i2c_smbus_read_byte_data(client, | |
1350 | FSCHMD_REG_FAN_STATE[data->kind][i]); | |
1351 | data->fan_ripple[i] = i2c_smbus_read_byte_data(client, | |
1352 | FSCHMD_REG_FAN_RIPPLE[data->kind][i]); | |
1353 | ||
1354 | /* The fscpos third fan doesn't have a fan_min */ | |
1355 | if (FSCHMD_REG_FAN_MIN[data->kind][i]) | |
1356 | data->fan_min[i] = i2c_smbus_read_byte_data( | |
1357 | client, | |
1358 | FSCHMD_REG_FAN_MIN[data->kind][i]); | |
1359 | ||
1360 | /* reset fan status if speed is back to > 0 */ | |
453e308d | 1361 | if ((data->fan_status[i] & FSCHMD_FAN_ALARM) && |
569ff102 HG |
1362 | data->fan_act[i]) |
1363 | i2c_smbus_write_byte_data(client, | |
1364 | FSCHMD_REG_FAN_STATE[data->kind][i], | |
c69ab2b7 | 1365 | data->fan_status[i]); |
569ff102 HG |
1366 | } |
1367 | ||
c69ab2b7 | 1368 | for (i = 0; i < FSCHMD_NO_VOLT_SENSORS[data->kind]; i++) |
569ff102 | 1369 | data->volt[i] = i2c_smbus_read_byte_data(client, |
c69ab2b7 | 1370 | FSCHMD_REG_VOLT[data->kind][i]); |
569ff102 | 1371 | |
569ff102 HG |
1372 | data->last_updated = jiffies; |
1373 | data->valid = 1; | |
1374 | } | |
1375 | ||
1376 | mutex_unlock(&data->update_lock); | |
1377 | ||
1378 | return data; | |
1379 | } | |
1380 | ||
f0967eea | 1381 | module_i2c_driver(fschmd_driver); |
569ff102 | 1382 | |
453e308d | 1383 | MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); |
de15f093 HG |
1384 | MODULE_DESCRIPTION("FSC Poseidon, Hermes, Scylla, Heracles, Heimdall, Hades " |
1385 | "and Syleus driver"); | |
569ff102 | 1386 | MODULE_LICENSE("GPL"); |