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hwmon: (f71882fg) Prepare for adding F8000 support
[linux-2.6-block.git] / drivers / hwmon / f71882fg.c
CommitLineData
45fb3669
HG		 1/***************************************************************************
2 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
c13548c5 3 * Copyright (C) 2007,2008 by Hans de Goede <hdegoede@redhat.com> *
45fb3669
HG		 4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20
21#include <linux/module.h>
22#include <linux/init.h>
23#include <linux/slab.h>
24#include <linux/jiffies.h>
25#include <linux/platform_device.h>
26#include <linux/hwmon.h>
27#include <linux/hwmon-sysfs.h>
28#include <linux/err.h>
29#include <linux/mutex.h>
77a4a3e2 30#include <linux/io.h>
45fb3669
HG		 31
32#define DRVNAME "f71882fg"
33
77a4a3e2 34#define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
45fb3669
HG		 35#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
36#define SIO_LOCK_KEY 0xAA /* Key to diasble Super-I/O */
37
38#define SIO_REG_LDSEL 0x07 /* Logical device select */
39#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
40#define SIO_REG_DEVREV 0x22 /* Device revision */
41#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
42#define SIO_REG_ENABLE 0x30 /* Logical device enable */
43#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
44
45#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
498be968 46#define SIO_F71862_ID 0x0601 /* Chipset ID */
45fb3669
HG		 47#define SIO_F71882_ID 0x0541 /* Chipset ID */
48
49#define REGION_LENGTH 8
50#define ADDR_REG_OFFSET 5
51#define DATA_REG_OFFSET 6
52
53#define F71882FG_REG_PECI 0x0A
54
498be968
HG		 55#define F71882FG_REG_IN_STATUS 0x12 /* f71882fg only */
56#define F71882FG_REG_IN_BEEP 0x13 /* f71882fg only */
45fb3669 57#define F71882FG_REG_IN(nr) (0x20 + (nr))
498be968 58#define F71882FG_REG_IN1_HIGH 0x32 /* f71882fg only */
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HG		 59
60#define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr)))
9ab796eb
MD		 61#define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr)))
62#define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr)))
45fb3669
HG		 63#define F71882FG_REG_FAN_STATUS 0x92
64#define F71882FG_REG_FAN_BEEP 0x93
65
7567a043
HG		 66#define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr))
67#define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr))
68#define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
45fb3669
HG		 69#define F71882FG_REG_TEMP_STATUS 0x62
70#define F71882FG_REG_TEMP_BEEP 0x63
71#define F71882FG_REG_TEMP_HYST1 0x6C
72#define F71882FG_REG_TEMP_HYST23 0x6D
73#define F71882FG_REG_TEMP_TYPE 0x6B
74#define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
75
9ab796eb
MD		 76#define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr)))
77#define F71882FG_REG_PWM_TYPE 0x94
78#define F71882FG_REG_PWM_ENABLE 0x96
79
80#define F71882FG_REG_FAN_HYST0 0x98
81#define F71882FG_REG_FAN_HYST1 0x99
82
83#define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm)))
84#define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm)))
85#define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr))
86
45fb3669
HG		 87#define F71882FG_REG_START 0x01
88
89#define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */
90
67b671bc
JD		 91static unsigned short force_id;
92module_param(force_id, ushort, 0);
93MODULE_PARM_DESC(force_id, "Override the detected device ID");
94
9ab796eb
MD		 95static int fan_mode[4] = { 0, 0, 0, 0 };
96module_param_array(fan_mode, int, NULL, 0644);
97MODULE_PARM_DESC(fan_mode, "List of fan control modes (f71882fg only) "
98 "(0=don't change, 1=pwm, 2=rpm)\n"
99 "Note: this needs a write to pwm#_enable to take effect");
100
498be968
HG		 101enum chips { f71862fg, f71882fg };
102
103static const char *f71882fg_names[] = {
104 "f71862fg",
105 "f71882fg",
106};
107
77a4a3e2 108static struct platform_device *f71882fg_pdev;
45fb3669
HG		 109
110/* Super-I/O Function prototypes */
111static inline int superio_inb(int base, int reg);
112static inline int superio_inw(int base, int reg);
113static inline void superio_enter(int base);
114static inline void superio_select(int base, int ld);
115static inline void superio_exit(int base);
116
498be968
HG		 117struct f71882fg_sio_data {
118 enum chips type;
119};
120
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HG		 121struct f71882fg_data {
122 unsigned short addr;
498be968 123 enum chips type;
1beeffe4 124 struct device *hwmon_dev;
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HG		 125
126 struct mutex update_lock;
127 char valid; /* !=0 if following fields are valid */
128 unsigned long last_updated; /* In jiffies */
129 unsigned long last_limits; /* In jiffies */
130
131 /* Register Values */
132 u8 in[9];
133 u8 in1_max;
134 u8 in_status;
135 u8 in_beep;
136 u16 fan[4];
9ab796eb
MD		 137 u16 fan_target[4];
138 u16 fan_full_speed[4];
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HG		 139 u8 fan_status;
140 u8 fan_beep;
7567a043
HG		 141 /* Note: all models have only 3 temperature channels, but on some
142 they are addressed as 0-2 and on others as 1-3, so for coding
143 convenience we reserve space for 4 channels */
144 u8 temp[4];
145 u8 temp_ovt[4];
146 u8 temp_high[4];
147 u8 temp_hyst[4];
148 u8 temp_type[4];
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HG		 149 u8 temp_status;
150 u8 temp_beep;
151 u8 temp_diode_open;
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MD		 152 u8 pwm[4];
153 u8 pwm_enable;
154 u8 pwm_auto_point_hyst[2];
155 u8 pwm_auto_point_mapping[4];
156 u8 pwm_auto_point_pwm[4][5];
157 u8 pwm_auto_point_temp[4][4];
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HG		 158};
159
77a4a3e2 160/* Sysfs in */
45fb3669
HG		 161static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
162 char *buf);
163static ssize_t show_in_max(struct device *dev, struct device_attribute
164 *devattr, char *buf);
165static ssize_t store_in_max(struct device *dev, struct device_attribute
166 *devattr, const char *buf, size_t count);
167static ssize_t show_in_beep(struct device *dev, struct device_attribute
168 *devattr, char *buf);
169static ssize_t store_in_beep(struct device *dev, struct device_attribute
170 *devattr, const char *buf, size_t count);
171static ssize_t show_in_alarm(struct device *dev, struct device_attribute
172 *devattr, char *buf);
173/* Sysfs Fan */
174static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
175 char *buf);
9ab796eb
MD		 176static ssize_t show_fan_full_speed(struct device *dev,
177 struct device_attribute *devattr, char *buf);
178static ssize_t store_fan_full_speed(struct device *dev,
179 struct device_attribute *devattr, const char *buf, size_t count);
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HG		 180static ssize_t show_fan_beep(struct device *dev, struct device_attribute
181 *devattr, char *buf);
182static ssize_t store_fan_beep(struct device *dev, struct device_attribute
183 *devattr, const char *buf, size_t count);
184static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
185 *devattr, char *buf);
186/* Sysfs Temp */
187static ssize_t show_temp(struct device *dev, struct device_attribute
188 *devattr, char *buf);
189static ssize_t show_temp_max(struct device *dev, struct device_attribute
190 *devattr, char *buf);
191static ssize_t store_temp_max(struct device *dev, struct device_attribute
192 *devattr, const char *buf, size_t count);
193static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
194 *devattr, char *buf);
195static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
196 *devattr, const char *buf, size_t count);
197static ssize_t show_temp_crit(struct device *dev, struct device_attribute
198 *devattr, char *buf);
199static ssize_t store_temp_crit(struct device *dev, struct device_attribute
200 *devattr, const char *buf, size_t count);
201static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
202 *devattr, char *buf);
203static ssize_t show_temp_type(struct device *dev, struct device_attribute
204 *devattr, char *buf);
205static ssize_t show_temp_beep(struct device *dev, struct device_attribute
206 *devattr, char *buf);
207static ssize_t store_temp_beep(struct device *dev, struct device_attribute
208 *devattr, const char *buf, size_t count);
209static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
210 *devattr, char *buf);
211static ssize_t show_temp_fault(struct device *dev, struct device_attribute
212 *devattr, char *buf);
9ab796eb
MD		 213/* PWM and Auto point control */
214static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
215 char *buf);
216static ssize_t store_pwm(struct device *dev, struct device_attribute *devattr,
217 const char *buf, size_t count);
218static ssize_t show_pwm_enable(struct device *dev,
219 struct device_attribute *devattr, char *buf);
220static ssize_t store_pwm_enable(struct device *dev,
221 struct device_attribute *devattr, const char *buf, size_t count);
222static ssize_t show_pwm_interpolate(struct device *dev,
223 struct device_attribute *devattr, char *buf);
224static ssize_t store_pwm_interpolate(struct device *dev,
225 struct device_attribute *devattr, const char *buf, size_t count);
226static ssize_t show_pwm_auto_point_channel(struct device *dev,
227 struct device_attribute *devattr, char *buf);
228static ssize_t store_pwm_auto_point_channel(struct device *dev,
229 struct device_attribute *devattr, const char *buf, size_t count);
230static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
231 struct device_attribute *devattr, char *buf);
232static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
233 struct device_attribute *devattr, const char *buf, size_t count);
234static ssize_t show_pwm_auto_point_pwm(struct device *dev,
235 struct device_attribute *devattr, char *buf);
236static ssize_t store_pwm_auto_point_pwm(struct device *dev,
237 struct device_attribute *devattr, const char *buf, size_t count);
238static ssize_t show_pwm_auto_point_temp(struct device *dev,
239 struct device_attribute *devattr, char *buf);
240static ssize_t store_pwm_auto_point_temp(struct device *dev,
241 struct device_attribute *devattr, const char *buf, size_t count);
45fb3669
HG		 242/* Sysfs misc */
243static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
244 char *buf);
245
246static int __devinit f71882fg_probe(struct platform_device * pdev);
c13548c5 247static int f71882fg_remove(struct platform_device *pdev);
45fb3669
HG		 248
249static struct platform_driver f71882fg_driver = {
250 .driver = {
251 .owner = THIS_MODULE,
252 .name = DRVNAME,
253 },
254 .probe = f71882fg_probe,
255 .remove = __devexit_p(f71882fg_remove),
256};
257
c13548c5 258static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
45fb3669 259
498be968 260static struct sensor_device_attribute_2 f718x2fg_in_temp_attr[] = {
bc37ae71
MD		 261 SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
262 SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
bc37ae71
MD		 263 SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
264 SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3),
265 SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4),
266 SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5),
267 SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6),
268 SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7),
269 SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8),
7567a043 270 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1),
bc37ae71 271 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
7567a043 272 store_temp_max, 0, 1),
bc37ae71 273 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
7567a043 274 store_temp_max_hyst, 0, 1),
bc37ae71 275 SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
7567a043 276 store_temp_crit, 0, 1),
bc37ae71 277 SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
7567a043
HG		 278 0, 1),
279 SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1),
bc37ae71 280 SENSOR_ATTR_2(temp1_beep, S_IRUGO|S_IWUSR, show_temp_beep,
7567a043
HG		 281 store_temp_beep, 0, 1),
282 SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
283 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
284 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2),
bc37ae71 285 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
7567a043 286 store_temp_max, 0, 2),
bc37ae71 287 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
7567a043 288 store_temp_max_hyst, 0, 2),
bc37ae71 289 SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
7567a043 290 store_temp_crit, 0, 2),
bc37ae71 291 SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
7567a043
HG		 292 0, 2),
293 SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2),
bc37ae71 294 SENSOR_ATTR_2(temp2_beep, S_IRUGO|S_IWUSR, show_temp_beep,
7567a043
HG		 295 store_temp_beep, 0, 2),
296 SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
297 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
298 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3),
bc37ae71 299 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
7567a043 300 store_temp_max, 0, 3),
bc37ae71 301 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
7567a043 302 store_temp_max_hyst, 0, 3),
bc37ae71 303 SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
7567a043 304 store_temp_crit, 0, 3),
bc37ae71 305 SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
7567a043
HG		 306 0, 3),
307 SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3),
bc37ae71 308 SENSOR_ATTR_2(temp3_beep, S_IRUGO|S_IWUSR, show_temp_beep,
7567a043
HG		 309 store_temp_beep, 0, 3),
310 SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3),
311 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3),
45fb3669
HG		 312};
313
498be968
HG		 314static struct sensor_device_attribute_2 f71882fg_in_temp_attr[] = {
315 SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max,
316 0, 1),
317 SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep,
318 0, 1),
319 SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1),
320};
321
322static struct sensor_device_attribute_2 f718x2fg_fan_attr[] = {
bc37ae71 323 SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0),
9ab796eb
MD		 324 SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR,
325 show_fan_full_speed,
326 store_fan_full_speed, 0, 0),
bc37ae71
MD		 327 SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
328 store_fan_beep, 0, 0),
329 SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0),
330 SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1),
9ab796eb
MD		 331 SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR,
332 show_fan_full_speed,
333 store_fan_full_speed, 0, 1),
bc37ae71
MD		 334 SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
335 store_fan_beep, 0, 1),
336 SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1),
337 SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
9ab796eb
MD		 338 SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR,
339 show_fan_full_speed,
340 store_fan_full_speed, 0, 2),
bc37ae71
MD		 341 SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
342 store_fan_beep, 0, 2),
343 SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
9ab796eb
MD		 344
345 SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0),
346 SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
347 store_pwm_enable, 0, 0),
348 SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR,
349 show_pwm_interpolate, store_pwm_interpolate, 0, 0),
350 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
351 show_pwm_auto_point_channel,
352 store_pwm_auto_point_channel, 0, 0),
498be968
HG		 353
354 SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1),
355 SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
356 store_pwm_enable, 0, 1),
357 SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR,
358 show_pwm_interpolate, store_pwm_interpolate, 0, 1),
359 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
360 show_pwm_auto_point_channel,
361 store_pwm_auto_point_channel, 0, 1),
362
363 SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2),
364 SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
365 store_pwm_enable, 0, 2),
366 SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR,
367 show_pwm_interpolate, store_pwm_interpolate, 0, 2),
368 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
369 show_pwm_auto_point_channel,
370 store_pwm_auto_point_channel, 0, 2),
371};
372
373static struct sensor_device_attribute_2 f71862fg_fan_attr[] = {
374 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
375 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
376 1, 0),
377 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
378 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
379 4, 0),
380 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
381 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
382 0, 0),
383 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
384 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
385 3, 0),
386 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
387 show_pwm_auto_point_temp_hyst,
388 store_pwm_auto_point_temp_hyst,
389 0, 0),
390 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
391 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
392
393 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
394 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
395 1, 1),
396 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
397 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
398 4, 1),
399 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
400 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
401 0, 1),
402 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
403 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
404 3, 1),
405 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
406 show_pwm_auto_point_temp_hyst,
407 store_pwm_auto_point_temp_hyst,
408 0, 1),
409 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
410 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
411};
412
413static struct sensor_device_attribute_2 f71882fg_fan_attr[] = {
414 SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
415 SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
416 show_fan_full_speed,
417 store_fan_full_speed, 0, 3),
418 SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
419 store_fan_beep, 0, 3),
420 SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
421
9ab796eb
MD		 422 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
423 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
424 0, 0),
425 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
426 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
427 1, 0),
428 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
429 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
430 2, 0),
431 SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR,
432 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
433 3, 0),
434 SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR,
435 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
436 4, 0),
437 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
438 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
439 0, 0),
440 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
441 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
442 1, 0),
443 SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR,
444 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
445 2, 0),
446 SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR,
447 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
448 3, 0),
449 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
450 show_pwm_auto_point_temp_hyst,
451 store_pwm_auto_point_temp_hyst,
452 0, 0),
453 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
454 show_pwm_auto_point_temp_hyst, NULL, 1, 0),
455 SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO,
456 show_pwm_auto_point_temp_hyst, NULL, 2, 0),
457 SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO,
458 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
459
9ab796eb
MD		 460 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
461 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
462 0, 1),
463 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
464 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
465 1, 1),
466 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
467 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
468 2, 1),
469 SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR,
470 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
471 3, 1),
472 SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR,
473 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
474 4, 1),
475 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
476 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
477 0, 1),
478 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
479 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
480 1, 1),
481 SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR,
482 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
483 2, 1),
484 SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR,
485 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
486 3, 1),
487 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
488 show_pwm_auto_point_temp_hyst,
489 store_pwm_auto_point_temp_hyst,
490 0, 1),
491 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
492 show_pwm_auto_point_temp_hyst, NULL, 1, 1),
493 SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO,
494 show_pwm_auto_point_temp_hyst, NULL, 2, 1),
495 SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO,
496 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
497
9ab796eb
MD		 498 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
499 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
500 0, 2),
501 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
502 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
503 1, 2),
504 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
505 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
506 2, 2),
507 SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR,
508 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
509 3, 2),
510 SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR,
511 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
512 4, 2),
513 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
514 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
515 0, 2),
516 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
517 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
518 1, 2),
519 SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR,
520 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
521 2, 2),
522 SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR,
523 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
524 3, 2),
525 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
526 show_pwm_auto_point_temp_hyst,
527 store_pwm_auto_point_temp_hyst,
528 0, 2),
529 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
530 show_pwm_auto_point_temp_hyst, NULL, 1, 2),
531 SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO,
532 show_pwm_auto_point_temp_hyst, NULL, 2, 2),
533 SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
534 show_pwm_auto_point_temp_hyst, NULL, 3, 2),
535
536 SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
537 SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
538 store_pwm_enable, 0, 3),
539 SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR,
540 show_pwm_interpolate, store_pwm_interpolate, 0, 3),
541 SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR,
542 show_pwm_auto_point_channel,
543 store_pwm_auto_point_channel, 0, 3),
544 SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR,
545 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
546 0, 3),
547 SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR,
548 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
549 1, 3),
550 SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR,
551 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
552 2, 3),
553 SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR,
554 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
555 3, 3),
556 SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR,
557 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
558 4, 3),
559 SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR,
560 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
561 0, 3),
562 SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR,
563 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
564 1, 3),
565 SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR,
566 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
567 2, 3),
568 SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR,
569 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
570 3, 3),
571 SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
572 show_pwm_auto_point_temp_hyst,
573 store_pwm_auto_point_temp_hyst,
574 0, 3),
575 SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO,
576 show_pwm_auto_point_temp_hyst, NULL, 1, 3),
577 SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO,
578 show_pwm_auto_point_temp_hyst, NULL, 2, 3),
579 SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO,
580 show_pwm_auto_point_temp_hyst, NULL, 3, 3),
45fb3669
HG		 581};
582
583
584/* Super I/O functions */
585static inline int superio_inb(int base, int reg)
586{
587 outb(reg, base);
588 return inb(base + 1);
589}
590
591static int superio_inw(int base, int reg)
592{
593 int val;
594 outb(reg++, base);
595 val = inb(base + 1) << 8;
596 outb(reg, base);
597 val |= inb(base + 1);
598 return val;
599}
600
601static inline void superio_enter(int base)
602{
603 /* according to the datasheet the key must be send twice! */
604 outb( SIO_UNLOCK_KEY, base);
605 outb( SIO_UNLOCK_KEY, base);
606}
607
608static inline void superio_select( int base, int ld)
609{
610 outb(SIO_REG_LDSEL, base);
611 outb(ld, base + 1);
612}
613
614static inline void superio_exit(int base)
615{
616 outb(SIO_LOCK_KEY, base);
617}
618
619static inline u16 fan_from_reg(u16 reg)
620{
621 return reg ? (1500000 / reg) : 0;
622}
623
9ab796eb
MD		 624static inline u16 fan_to_reg(u16 fan)
625{
626 return fan ? (1500000 / fan) : 0;
627}
628
45fb3669
HG		 629static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg)
630{
631 u8 val;
632
633 outb(reg, data->addr + ADDR_REG_OFFSET);
634 val = inb(data->addr + DATA_REG_OFFSET);
635
636 return val;
637}
638
639static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg)
640{
641 u16 val;
642
643 outb(reg++, data->addr + ADDR_REG_OFFSET);
644 val = inb(data->addr + DATA_REG_OFFSET) << 8;
645 outb(reg, data->addr + ADDR_REG_OFFSET);
646 val |= inb(data->addr + DATA_REG_OFFSET);
647
648 return val;
649}
650
651static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val)
652{
653 outb(reg, data->addr + ADDR_REG_OFFSET);
654 outb(val, data->addr + DATA_REG_OFFSET);
655}
656
9ab796eb
MD		 657static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val)
658{
659 outb(reg++, data->addr + ADDR_REG_OFFSET);
660 outb(val >> 8, data->addr + DATA_REG_OFFSET);
661 outb(reg, data->addr + ADDR_REG_OFFSET);
662 outb(val & 255, data->addr + DATA_REG_OFFSET);
663}
664
77a4a3e2 665static struct f71882fg_data *f71882fg_update_device(struct device *dev)
45fb3669
HG		 666{
667 struct f71882fg_data *data = dev_get_drvdata(dev);
668 int nr, reg, reg2;
498be968 669 int nr_fans = (data->type == f71862fg) ? 3 : 4;
45fb3669
HG		 670
671 mutex_lock(&data->update_lock);
672
673 /* Update once every 60 seconds */
674 if ( time_after(jiffies, data->last_limits + 60 * HZ ) ||
675 !data->valid) {
498be968
HG		 676 if (data->type == f71882fg) {
677 data->in1_max =
678 f71882fg_read8(data, F71882FG_REG_IN1_HIGH);
679 data->in_beep =
680 f71882fg_read8(data, F71882FG_REG_IN_BEEP);
681 }
45fb3669
HG		 682
683 /* Get High & boundary temps*/
7567a043 684 for (nr = 1; nr < 4; nr++) {
45fb3669
HG		 685 data->temp_ovt[nr] = f71882fg_read8(data,
686 F71882FG_REG_TEMP_OVT(nr));
687 data->temp_high[nr] = f71882fg_read8(data,
688 F71882FG_REG_TEMP_HIGH(nr));
689 }
690
691 /* Have to hardcode hyst*/
7567a043 692 data->temp_hyst[1] = f71882fg_read8(data,
45fb3669
HG		 693 F71882FG_REG_TEMP_HYST1) >> 4;
694 /* Hyst temps 2 & 3 stored in same register */
695 reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST23);
7567a043
HG		 696 data->temp_hyst[2] = reg & 0x0F;
697 data->temp_hyst[3] = reg >> 4;
45fb3669
HG		 698
699 /* Have to hardcode type, because temp1 is special */
700 reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
701 reg2 = f71882fg_read8(data, F71882FG_REG_PECI);
702 if ((reg2 & 0x03) == 0x01)
7567a043 703 data->temp_type[1] = 6 /* PECI */;
45fb3669 704 else if ((reg2 & 0x03) == 0x02)
7567a043 705 data->temp_type[1] = 5 /* AMDSI */;
45fb3669 706 else
7567a043 707 data->temp_type[1] = (reg & 0x02) ? 2 : 4;
45fb3669 708
7567a043
HG		 709 data->temp_type[2] = (reg & 0x04) ? 2 : 4;
710 data->temp_type[3] = (reg & 0x08) ? 2 : 4;
45fb3669
HG		 711
712 data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
713
714 data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
715
9ab796eb
MD		 716 data->pwm_enable = f71882fg_read8(data,
717 F71882FG_REG_PWM_ENABLE);
718 data->pwm_auto_point_hyst[0] = f71882fg_read8(data,
719 F71882FG_REG_FAN_HYST0);
720 data->pwm_auto_point_hyst[1] = f71882fg_read8(data,
721 F71882FG_REG_FAN_HYST1);
498be968 722 for (nr = 0; nr < nr_fans; nr++) {
9ab796eb
MD		 723 data->pwm_auto_point_mapping[nr] =
724 f71882fg_read8(data,
725 F71882FG_REG_POINT_MAPPING(nr));
726
498be968
HG		 727 if (data->type == f71882fg) {
728 int point;
729 for (point = 0; point < 5; point++) {
730 data->pwm_auto_point_pwm[nr][point] =
731 f71882fg_read8(data,
732 F71882FG_REG_POINT_PWM
733 (nr, point));
734 }
735 for (point = 0; point < 4; point++) {
736 data->pwm_auto_point_temp[nr][point] =
737 f71882fg_read8(data,
738 F71882FG_REG_POINT_TEMP
739 (nr, point));
740 }
741 } else {
742 data->pwm_auto_point_pwm[nr][1] =
743 f71882fg_read8(data,
744 F71882FG_REG_POINT_PWM
745 (nr, 1));
746 data->pwm_auto_point_pwm[nr][4] =
747 f71882fg_read8(data,
748 F71882FG_REG_POINT_PWM
749 (nr, 4));
750 data->pwm_auto_point_temp[nr][0] =
751 f71882fg_read8(data,
752 F71882FG_REG_POINT_TEMP
753 (nr, 0));
754 data->pwm_auto_point_temp[nr][3] =
755 f71882fg_read8(data,
756 F71882FG_REG_POINT_TEMP
757 (nr, 3));
9ab796eb
MD		 758 }
759 }
45fb3669
HG		 760 data->last_limits = jiffies;
761 }
762
763 /* Update every second */
8afb1049 764 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
45fb3669
HG		 765 data->temp_status = f71882fg_read8(data,
766 F71882FG_REG_TEMP_STATUS);
767 data->temp_diode_open = f71882fg_read8(data,
768 F71882FG_REG_TEMP_DIODE_OPEN);
7567a043 769 for (nr = 1; nr < 4; nr++)
45fb3669
HG		 770 data->temp[nr] = f71882fg_read8(data,
771 F71882FG_REG_TEMP(nr));
772
773 data->fan_status = f71882fg_read8(data,
774 F71882FG_REG_FAN_STATUS);
498be968 775 for (nr = 0; nr < nr_fans; nr++) {
45fb3669
HG		 776 data->fan[nr] = f71882fg_read16(data,
777 F71882FG_REG_FAN(nr));
9ab796eb
MD		 778 data->fan_target[nr] =
779 f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr));
780 data->fan_full_speed[nr] =
781 f71882fg_read16(data,
782 F71882FG_REG_FAN_FULL_SPEED(nr));
783 data->pwm[nr] =
784 f71882fg_read8(data, F71882FG_REG_PWM(nr));
785 }
45fb3669 786
498be968
HG		 787 if (data->type == f71882fg)
788 data->in_status = f71882fg_read8(data,
45fb3669
HG		 789 F71882FG_REG_IN_STATUS);
790 for (nr = 0; nr < 9; nr++)
791 data->in[nr] = f71882fg_read8(data,
792 F71882FG_REG_IN(nr));
793
794 data->last_updated = jiffies;
795 data->valid = 1;
796 }
797
798 mutex_unlock(&data->update_lock);
799
800 return data;
801}
802
803/* Sysfs Interface */
804static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
805 char *buf)
806{
807 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 808 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 809 int speed = fan_from_reg(data->fan[nr]);
810
811 if (speed == FAN_MIN_DETECT)
812 speed = 0;
813
814 return sprintf(buf, "%d\n", speed);
815}
816
9ab796eb
MD		 817static ssize_t show_fan_full_speed(struct device *dev,
818 struct device_attribute *devattr, char *buf)
819{
820 struct f71882fg_data *data = f71882fg_update_device(dev);
821 int nr = to_sensor_dev_attr_2(devattr)->index;
822 int speed = fan_from_reg(data->fan_full_speed[nr]);
823 return sprintf(buf, "%d\n", speed);
824}
825
826static ssize_t store_fan_full_speed(struct device *dev,
827 struct device_attribute *devattr,
828 const char *buf, size_t count)
829{
830 struct f71882fg_data *data = dev_get_drvdata(dev);
831 int nr = to_sensor_dev_attr_2(devattr)->index;
832 long val = simple_strtol(buf, NULL, 10);
833
834 val = SENSORS_LIMIT(val, 23, 1500000);
835 val = fan_to_reg(val);
836
837 mutex_lock(&data->update_lock);
838 if (data->pwm_enable & (1 << (2 * nr)))
839 /* PWM mode */
840 count = -EINVAL;
841 else {
842 /* RPM mode */
843 f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val);
844 data->fan_full_speed[nr] = val;
845 }
846 mutex_unlock(&data->update_lock);
847
848 return count;
849}
850
45fb3669
HG		 851static ssize_t show_fan_beep(struct device *dev, struct device_attribute
852 *devattr, char *buf)
853{
854 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 855 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 856
857 if (data->fan_beep & (1 << nr))
858 return sprintf(buf, "1\n");
859 else
860 return sprintf(buf, "0\n");
861}
862
863static ssize_t store_fan_beep(struct device *dev, struct device_attribute
864 *devattr, const char *buf, size_t count)
865{
866 struct f71882fg_data *data = dev_get_drvdata(dev);
bc37ae71 867 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 868 int val = simple_strtoul(buf, NULL, 10);
869
870 mutex_lock(&data->update_lock);
871 if (val)
872 data->fan_beep |= 1 << nr;
873 else
874 data->fan_beep &= ~(1 << nr);
875
876 f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep);
877 mutex_unlock(&data->update_lock);
878
879 return count;
880}
881
882static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
883 *devattr, char *buf)
884{
885 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 886 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 887
888 if (data->fan_status & (1 << nr))
889 return sprintf(buf, "1\n");
890 else
891 return sprintf(buf, "0\n");
892}
893
894static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
895 char *buf)
896{
897 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 898 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 899
900 return sprintf(buf, "%d\n", data->in[nr] * 8);
901}
902
903static ssize_t show_in_max(struct device *dev, struct device_attribute
904 *devattr, char *buf)
905{
906 struct f71882fg_data *data = f71882fg_update_device(dev);
907
908 return sprintf(buf, "%d\n", data->in1_max * 8);
909}
910
911static ssize_t store_in_max(struct device *dev, struct device_attribute
912 *devattr, const char *buf, size_t count)
913{
914 struct f71882fg_data *data = dev_get_drvdata(dev);
915 int val = simple_strtoul(buf, NULL, 10) / 8;
916
917 if (val > 255)
918 val = 255;
919
920 mutex_lock(&data->update_lock);
921 f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val);
922 data->in1_max = val;
923 mutex_unlock(&data->update_lock);
924
925 return count;
926}
927
928static ssize_t show_in_beep(struct device *dev, struct device_attribute
929 *devattr, char *buf)
930{
931 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 932 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 933
934 if (data->in_beep & (1 << nr))
935 return sprintf(buf, "1\n");
936 else
937 return sprintf(buf, "0\n");
938}
939
940static ssize_t store_in_beep(struct device *dev, struct device_attribute
941 *devattr, const char *buf, size_t count)
942{
943 struct f71882fg_data *data = dev_get_drvdata(dev);
bc37ae71 944 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 945 int val = simple_strtoul(buf, NULL, 10);
946
947 mutex_lock(&data->update_lock);
948 if (val)
949 data->in_beep |= 1 << nr;
950 else
951 data->in_beep &= ~(1 << nr);
952
953 f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep);
954 mutex_unlock(&data->update_lock);
955
956 return count;
957}
958
959static ssize_t show_in_alarm(struct device *dev, struct device_attribute
960 *devattr, char *buf)
961{
962 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 963 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 964
965 if (data->in_status & (1 << nr))
966 return sprintf(buf, "1\n");
967 else
968 return sprintf(buf, "0\n");
969}
970
971static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
972 char *buf)
973{
974 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 975 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 976
977 return sprintf(buf, "%d\n", data->temp[nr] * 1000);
978}
979
980static ssize_t show_temp_max(struct device *dev, struct device_attribute
981 *devattr, char *buf)
982{
983 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 984 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 985
986 return sprintf(buf, "%d\n", data->temp_high[nr] * 1000);
987}
988
989static ssize_t store_temp_max(struct device *dev, struct device_attribute
990 *devattr, const char *buf, size_t count)
991{
992 struct f71882fg_data *data = dev_get_drvdata(dev);
bc37ae71 993 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 994 int val = simple_strtoul(buf, NULL, 10) / 1000;
995
996 if (val > 255)
997 val = 255;
998
999 mutex_lock(&data->update_lock);
1000 f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val);
1001 data->temp_high[nr] = val;
1002 mutex_unlock(&data->update_lock);
1003
1004 return count;
1005}
1006
1007static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
1008 *devattr, char *buf)
1009{
1010 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1011 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1012
1013 return sprintf(buf, "%d\n",
1014 (data->temp_high[nr] - data->temp_hyst[nr]) * 1000);
1015}
1016
1017static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
1018 *devattr, const char *buf, size_t count)
1019{
1020 struct f71882fg_data *data = dev_get_drvdata(dev);
bc37ae71 1021 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1022 int val = simple_strtoul(buf, NULL, 10) / 1000;
1023 ssize_t ret = count;
1024
1025 mutex_lock(&data->update_lock);
1026
1027 /* convert abs to relative and check */
1028 val = data->temp_high[nr] - val;
1029 if (val < 0 || val > 15) {
1030 ret = -EINVAL;
1031 goto store_temp_max_hyst_exit;
1032 }
1033
1034 data->temp_hyst[nr] = val;
1035
1036 /* convert value to register contents */
8afb1049 1037 switch (nr) {
45fb3669 1038 case 1:
7567a043 1039 val = val << 4;
45fb3669
HG		 1040 break;
1041 case 2:
7567a043
HG		 1042 val = val | (data->temp_hyst[3] << 4);
1043 break;
1044 case 3:
1045 val = data->temp_hyst[2] | (val << 4);
45fb3669
HG		 1046 break;
1047 }
1048
7567a043
HG		 1049 f71882fg_write8(data, (nr <= 1) ? F71882FG_REG_TEMP_HYST1 :
1050 F71882FG_REG_TEMP_HYST23, val);
45fb3669
HG		 1051
1052store_temp_max_hyst_exit:
1053 mutex_unlock(&data->update_lock);
1054 return ret;
1055}
1056
1057static ssize_t show_temp_crit(struct device *dev, struct device_attribute
1058 *devattr, char *buf)
1059{
1060 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1061 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1062
1063 return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000);
1064}
1065
1066static ssize_t store_temp_crit(struct device *dev, struct device_attribute
1067 *devattr, const char *buf, size_t count)
1068{
1069 struct f71882fg_data *data = dev_get_drvdata(dev);
bc37ae71 1070 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1071 int val = simple_strtoul(buf, NULL, 10) / 1000;
1072
1073 if (val > 255)
1074 val = 255;
1075
1076 mutex_lock(&data->update_lock);
1077 f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val);
1078 data->temp_ovt[nr] = val;
1079 mutex_unlock(&data->update_lock);
1080
1081 return count;
1082}
1083
1084static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
1085 *devattr, char *buf)
1086{
1087 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1088 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1089
1090 return sprintf(buf, "%d\n",
1091 (data->temp_ovt[nr] - data->temp_hyst[nr]) * 1000);
1092}
1093
1094static ssize_t show_temp_type(struct device *dev, struct device_attribute
1095 *devattr, char *buf)
1096{
1097 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1098 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1099
1100 return sprintf(buf, "%d\n", data->temp_type[nr]);
1101}
1102
1103static ssize_t show_temp_beep(struct device *dev, struct device_attribute
1104 *devattr, char *buf)
1105{
1106 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1107 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 1108
7567a043 1109 if (data->temp_beep & (1 << nr))
45fb3669
HG		 1110 return sprintf(buf, "1\n");
1111 else
1112 return sprintf(buf, "0\n");
1113}
1114
1115static ssize_t store_temp_beep(struct device *dev, struct device_attribute
1116 *devattr, const char *buf, size_t count)
1117{
1118 struct f71882fg_data *data = dev_get_drvdata(dev);
bc37ae71 1119 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1120 int val = simple_strtoul(buf, NULL, 10);
1121
1122 mutex_lock(&data->update_lock);
1123 if (val)
7567a043 1124 data->temp_beep |= 1 << nr;
45fb3669 1125 else
7567a043 1126 data->temp_beep &= ~(1 << nr);
45fb3669
HG		 1127
1128 f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep);
1129 mutex_unlock(&data->update_lock);
1130
1131 return count;
1132}
1133
1134static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
1135 *devattr, char *buf)
1136{
1137 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1138 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 1139
7567a043 1140 if (data->temp_status & (1 << nr))
45fb3669
HG		 1141 return sprintf(buf, "1\n");
1142 else
1143 return sprintf(buf, "0\n");
1144}
1145
1146static ssize_t show_temp_fault(struct device *dev, struct device_attribute
1147 *devattr, char *buf)
1148{
1149 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1150 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 1151
7567a043 1152 if (data->temp_diode_open & (1 << nr))
45fb3669
HG		 1153 return sprintf(buf, "1\n");
1154 else
1155 return sprintf(buf, "0\n");
1156}
1157
9ab796eb
MD		 1158static ssize_t show_pwm(struct device *dev,
1159 struct device_attribute *devattr, char *buf)
1160{
1161 struct f71882fg_data *data = f71882fg_update_device(dev);
1162 int val, nr = to_sensor_dev_attr_2(devattr)->index;
1163 if (data->pwm_enable & (1 << (2 * nr)))
1164 /* PWM mode */
1165 val = data->pwm[nr];
1166 else {
1167 /* RPM mode */
1168 mutex_lock(&data->update_lock);
1169 val = 255 * fan_from_reg(data->fan_target[nr])
1170 / fan_from_reg(data->fan_full_speed[nr]);
1171 mutex_unlock(&data->update_lock);
1172 }
1173 return sprintf(buf, "%d\n", val);
1174}
1175
1176static ssize_t store_pwm(struct device *dev,
1177 struct device_attribute *devattr, const char *buf,
1178 size_t count)
1179{
1180 /* struct f71882fg_data *data = dev_get_drvdata(dev); */
1181 struct f71882fg_data *data = f71882fg_update_device(dev);
1182 int nr = to_sensor_dev_attr_2(devattr)->index;
1183 long val = simple_strtol(buf, NULL, 10);
1184 val = SENSORS_LIMIT(val, 0, 255);
1185
1186 mutex_lock(&data->update_lock);
1187 if (data->pwm_enable & (1 << (2 * nr))) {
1188 /* PWM mode */
1189 f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
1190 data->pwm[nr] = val;
1191 } else {
1192 /* RPM mode */
1193 int target = val * fan_from_reg(data->fan_full_speed[nr]) / 255;
1194 f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr),
1195 fan_to_reg(target));
1196 data->fan_target[nr] = fan_to_reg(target);
1197 }
1198 mutex_unlock(&data->update_lock);
1199
1200 return count;
1201}
1202
1203static ssize_t show_pwm_enable(struct device *dev,
1204 struct device_attribute *devattr, char *buf)
1205{
1206 int result;
1207 struct f71882fg_data *data = f71882fg_update_device(dev);
1208 int nr = to_sensor_dev_attr_2(devattr)->index;
1209
1210 if (data->pwm_enable & (2 << (2 * nr)))
1211 result = 1;
1212 else
1213 result = 2;
1214
1215 return sprintf(buf, "%d\n", result);
1216}
1217
1218static ssize_t store_pwm_enable(struct device *dev, struct device_attribute
1219 *devattr, const char *buf, size_t count)
1220{
1221 struct f71882fg_data *data = dev_get_drvdata(dev);
1222 int nr = to_sensor_dev_attr_2(devattr)->index;
1223 long val = simple_strtol(buf, NULL, 10);
1224 if (val < 1 || val > 2)
1225 return -EINVAL;
1226
1227 mutex_lock(&data->update_lock);
1228 switch (val) {
1229 case 1:
1230 data->pwm_enable |= 2 << (2 * nr);
1231 break; /* Manual */
1232 case 2:
1233 data->pwm_enable &= ~(2 << (2 * nr));
1234 break; /* Temperature ctrl */
1235 }
498be968
HG		 1236 if (data->type == f71882fg) {
1237 switch (fan_mode[nr]) {
1238 case 1:
1239 data->pwm_enable |= 1 << (2 * nr);
1240 break; /* Duty cycle mode */
1241 case 2:
1242 data->pwm_enable &= ~(1 << (2 * nr));
1243 break; /* RPM mode */
1244 }
9ab796eb
MD		 1245 }
1246 f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable);
1247 mutex_unlock(&data->update_lock);
1248
1249 return count;
1250}
1251
1252static ssize_t show_pwm_auto_point_pwm(struct device *dev,
1253 struct device_attribute *devattr,
1254 char *buf)
1255{
1256 int result;
1257 struct f71882fg_data *data = f71882fg_update_device(dev);
1258 int pwm = to_sensor_dev_attr_2(devattr)->index;
1259 int point = to_sensor_dev_attr_2(devattr)->nr;
1260
1261 if (data->pwm_enable & (1 << (2 * pwm))) {
1262 /* PWM mode */
1263 result = data->pwm_auto_point_pwm[pwm][point];
1264 } else {
1265 /* RPM mode */
1266 result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]);
1267 }
1268
1269 return sprintf(buf, "%d\n", result);
1270}
1271
1272static ssize_t store_pwm_auto_point_pwm(struct device *dev,
1273 struct device_attribute *devattr,
1274 const char *buf, size_t count)
1275{
1276 /* struct f71882fg_data *data = dev_get_drvdata(dev); */
1277 struct f71882fg_data *data = f71882fg_update_device(dev);
1278 int pwm = to_sensor_dev_attr_2(devattr)->index;
1279 int point = to_sensor_dev_attr_2(devattr)->nr;
1280 int val = simple_strtoul(buf, NULL, 10);
1281 val = SENSORS_LIMIT(val, 0, 255);
1282
1283 mutex_lock(&data->update_lock);
1284 if (data->pwm_enable & (1 << (2 * pwm))) {
1285 /* PWM mode */
1286 } else {
1287 /* RPM mode */
1288 if (val < 29) /* Prevent negative numbers */
1289 val = 255;
1290 else
1291 val = (255 - val) * 32 / val;
1292 }
1293 f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val);
1294 data->pwm_auto_point_pwm[pwm][point] = val;
1295 mutex_unlock(&data->update_lock);
1296
1297 return count;
1298}
1299
1300static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
1301 struct device_attribute *devattr,
1302 char *buf)
1303{
1304 int result = 0;
1305 struct f71882fg_data *data = f71882fg_update_device(dev);
1306 int nr = to_sensor_dev_attr_2(devattr)->index;
1307 int point = to_sensor_dev_attr_2(devattr)->nr;
1308
1309 mutex_lock(&data->update_lock);
1310 switch (nr) {
1311 case 0:
1312 result = data->pwm_auto_point_hyst[0] & 0x0f;
1313 break;
1314 case 1:
1315 result = data->pwm_auto_point_hyst[0] >> 4;
1316 break;
1317 case 2:
1318 result = data->pwm_auto_point_hyst[1] & 0x0f;
1319 break;
1320 case 3:
1321 result = data->pwm_auto_point_hyst[1] >> 4;
1322 break;
1323 }
1324 result = 1000 * (data->pwm_auto_point_temp[nr][point] - result);
1325 mutex_unlock(&data->update_lock);
1326
1327 return sprintf(buf, "%d\n", result);
1328}
1329
1330static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
1331 struct device_attribute *devattr,
1332 const char *buf, size_t count)
1333{
1334 struct f71882fg_data *data = f71882fg_update_device(dev);
1335 int nr = to_sensor_dev_attr_2(devattr)->index;
1336 int point = to_sensor_dev_attr_2(devattr)->nr;
1337 long val = simple_strtol(buf, NULL, 10) / 1000;
1338
1339 mutex_lock(&data->update_lock);
1340 val = SENSORS_LIMIT(val, data->pwm_auto_point_temp[nr][point] - 15,
1341 data->pwm_auto_point_temp[nr][point]);
1342 val = data->pwm_auto_point_temp[nr][point] - val;
1343
1344 switch (nr) {
1345 case 0:
1346 val = (data->pwm_auto_point_hyst[0] & 0xf0) | val;
1347 break;
1348 case 1:
1349 val = (data->pwm_auto_point_hyst[0] & 0x0f) | (val << 4);
1350 break;
1351 case 2:
1352 val = (data->pwm_auto_point_hyst[1] & 0xf0) | val;
1353 break;
1354 case 3:
1355 val = (data->pwm_auto_point_hyst[1] & 0x0f) | (val << 4);
1356 break;
1357 }
1358 if (nr == 0 || nr == 1) {
1359 f71882fg_write8(data, F71882FG_REG_FAN_HYST0, val);
1360 data->pwm_auto_point_hyst[0] = val;
1361 } else {
1362 f71882fg_write8(data, F71882FG_REG_FAN_HYST1, val);
1363 data->pwm_auto_point_hyst[1] = val;
1364 }
1365 mutex_unlock(&data->update_lock);
1366
1367 return count;
1368}
1369
1370static ssize_t show_pwm_interpolate(struct device *dev,
1371 struct device_attribute *devattr, char *buf)
1372{
1373 int result;
1374 struct f71882fg_data *data = f71882fg_update_device(dev);
1375 int nr = to_sensor_dev_attr_2(devattr)->index;
1376
1377 result = (data->pwm_auto_point_mapping[nr] >> 4) & 1;
1378
1379 return sprintf(buf, "%d\n", result);
1380}
1381
1382static ssize_t store_pwm_interpolate(struct device *dev,
1383 struct device_attribute *devattr,
1384 const char *buf, size_t count)
1385{
1386 /* struct f71882fg_data *data = dev_get_drvdata(dev); */
1387 struct f71882fg_data *data = f71882fg_update_device(dev);
1388 int nr = to_sensor_dev_attr_2(devattr)->index;
1389 int val = simple_strtoul(buf, NULL, 10);
1390 mutex_lock(&data->update_lock);
1391 if (val)
1392 val = data->pwm_auto_point_mapping[nr] | (1 << 4);
1393 else
1394 val = data->pwm_auto_point_mapping[nr] & (~(1 << 4));
1395 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
1396 data->pwm_auto_point_mapping[nr] = val;
1397 mutex_unlock(&data->update_lock);
1398
1399 return count;
1400}
1401
1402static ssize_t show_pwm_auto_point_channel(struct device *dev,
1403 struct device_attribute *devattr,
1404 char *buf)
1405{
1406 int result;
1407 struct f71882fg_data *data = f71882fg_update_device(dev);
1408 int nr = to_sensor_dev_attr_2(devattr)->index;
1409
1410 result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) - 1);
1411
1412 return sprintf(buf, "%d\n", result);
1413}
1414
1415static ssize_t store_pwm_auto_point_channel(struct device *dev,
1416 struct device_attribute *devattr,
1417 const char *buf, size_t count)
1418{
1419 /* struct f71882fg_data *data = dev_get_drvdata(dev); */
1420 struct f71882fg_data *data = f71882fg_update_device(dev);
1421 int nr = to_sensor_dev_attr_2(devattr)->index;
1422 long val = simple_strtol(buf, NULL, 10);
1423 switch (val) {
1424 case 1:
1425 val = 1;
1426 break;
1427 case 2:
1428 val = 2;
1429 break;
1430 case 4:
1431 val = 3;
1432 break;
1433 default:
1434 return -EINVAL;
1435 }
1436 mutex_lock(&data->update_lock);
1437 val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val;
1438 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
1439 data->pwm_auto_point_mapping[nr] = val;
1440 mutex_unlock(&data->update_lock);
1441
1442 return count;
1443}
1444
1445static ssize_t show_pwm_auto_point_temp(struct device *dev,
1446 struct device_attribute *devattr,
1447 char *buf)
1448{
1449 int result;
1450 struct f71882fg_data *data = f71882fg_update_device(dev);
1451 int pwm = to_sensor_dev_attr_2(devattr)->index;
1452 int point = to_sensor_dev_attr_2(devattr)->nr;
1453
1454 result = data->pwm_auto_point_temp[pwm][point];
1455 return sprintf(buf, "%d\n", 1000 * result);
1456}
1457
1458static ssize_t store_pwm_auto_point_temp(struct device *dev,
1459 struct device_attribute *devattr,
1460 const char *buf, size_t count)
1461{
1462 /* struct f71882fg_data *data = dev_get_drvdata(dev); */
1463 struct f71882fg_data *data = f71882fg_update_device(dev);
1464 int pwm = to_sensor_dev_attr_2(devattr)->index;
1465 int point = to_sensor_dev_attr_2(devattr)->nr;
1466 long val = simple_strtol(buf, NULL, 10) / 1000;
1467 val = SENSORS_LIMIT(val, 0, 255);
1468
1469 mutex_lock(&data->update_lock);
1470 f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val);
1471 data->pwm_auto_point_temp[pwm][point] = val;
1472 mutex_unlock(&data->update_lock);
1473
1474 return count;
1475}
1476
45fb3669
HG		 1477static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
1478 char *buf)
1479{
498be968
HG		 1480 struct f71882fg_data *data = dev_get_drvdata(dev);
1481 return sprintf(buf, "%s\n", f71882fg_names[data->type]);
45fb3669
HG		 1482}
1483
c13548c5
HG		 1484static int __devinit f71882fg_create_sysfs_files(struct platform_device *pdev,
1485 struct sensor_device_attribute_2 *attr, int count)
1486{
1487 int err, i;
1488
1489 for (i = 0; i < count; i++) {
1490 err = device_create_file(&pdev->dev, &attr[i].dev_attr);
1491 if (err)
1492 return err;
1493 }
1494 return 0;
1495}
45fb3669 1496
c13548c5 1497static int __devinit f71882fg_probe(struct platform_device *pdev)
45fb3669
HG		 1498{
1499 struct f71882fg_data *data;
498be968 1500 struct f71882fg_sio_data *sio_data = pdev->dev.platform_data;
c13548c5 1501 int err;
45fb3669
HG		 1502 u8 start_reg;
1503
c13548c5
HG		 1504 data = kzalloc(sizeof(struct f71882fg_data), GFP_KERNEL);
1505 if (!data)
45fb3669
HG		 1506 return -ENOMEM;
1507
1508 data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
498be968 1509 data->type = sio_data->type;
45fb3669
HG		 1510 mutex_init(&data->update_lock);
1511 platform_set_drvdata(pdev, data);
1512
3cc74758
HG		 1513 start_reg = f71882fg_read8(data, F71882FG_REG_START);
1514 if (!(start_reg & 0x03)) {
1515 dev_warn(&pdev->dev, "Hardware monitoring not activated\n");
1516 err = -ENODEV;
1517 goto exit_free;
1518 }
1519
1520 /* If it is a 71862 and the fan / pwm part is enabled sanity check
1521 the pwm settings */
1522 if (data->type == f71862fg && (start_reg & 0x02)) {
1523 u8 reg = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
1524 if ((reg & 0x15) != 0x15) {
1525 dev_err(&pdev->dev,
1526 "Invalid (reserved) pwm settings: 0x%02x\n",
1527 (unsigned int)reg);
1528 err = -ENODEV;
1529 goto exit_free;
1530 }
1531 }
1532
45fb3669 1533 /* Register sysfs interface files */
c13548c5
HG		 1534 err = device_create_file(&pdev->dev, &dev_attr_name);
1535 if (err)
1536 goto exit_unregister_sysfs;
45fb3669 1537
45fb3669 1538 if (start_reg & 0x01) {
498be968
HG		 1539 err = f71882fg_create_sysfs_files(pdev, f718x2fg_in_temp_attr,
1540 ARRAY_SIZE(f718x2fg_in_temp_attr));
c13548c5
HG		 1541 if (err)
1542 goto exit_unregister_sysfs;
498be968
HG		 1543
1544 if (data->type == f71882fg) {
1545 err = f71882fg_create_sysfs_files(pdev,
1546 f71882fg_in_temp_attr,
1547 ARRAY_SIZE(f71882fg_in_temp_attr));
1548 if (err)
1549 goto exit_unregister_sysfs;
1550 }
45fb3669
HG		 1551 }
1552
1553 if (start_reg & 0x02) {
498be968
HG		 1554 err = f71882fg_create_sysfs_files(pdev, f718x2fg_fan_attr,
1555 ARRAY_SIZE(f718x2fg_fan_attr));
1556 if (err)
1557 goto exit_unregister_sysfs;
1558
1559 if (data->type == f71862fg) {
1560 err = f71882fg_create_sysfs_files(pdev,
1561 f71862fg_fan_attr,
1562 ARRAY_SIZE(f71862fg_fan_attr));
1563 } else {
1564 err = f71882fg_create_sysfs_files(pdev,
1565 f71882fg_fan_attr,
c13548c5 1566 ARRAY_SIZE(f71882fg_fan_attr));
498be968 1567 }
c13548c5
HG		 1568 if (err)
1569 goto exit_unregister_sysfs;
45fb3669
HG		 1570 }
1571
1beeffe4
TJ		 1572 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1573 if (IS_ERR(data->hwmon_dev)) {
1574 err = PTR_ERR(data->hwmon_dev);
c13548c5 1575 data->hwmon_dev = NULL;
45fb3669
HG		 1576 goto exit_unregister_sysfs;
1577 }
1578
1579 return 0;
1580
1581exit_unregister_sysfs:
c13548c5 1582 f71882fg_remove(pdev); /* Will unregister the sysfs files for us */
3cc74758
HG		 1583 return err; /* f71882fg_remove() also frees our data */
1584exit_free:
1585 kfree(data);
45fb3669
HG		 1586 return err;
1587}
1588
c13548c5 1589static int f71882fg_remove(struct platform_device *pdev)
45fb3669
HG		 1590{
1591 int i;
1592 struct f71882fg_data *data = platform_get_drvdata(pdev);
1593
1594 platform_set_drvdata(pdev, NULL);
c13548c5
HG		 1595 if (data->hwmon_dev)
1596 hwmon_device_unregister(data->hwmon_dev);
45fb3669 1597
c13548c5 1598 device_remove_file(&pdev->dev, &dev_attr_name);
45fb3669 1599
498be968
HG		 1600 for (i = 0; i < ARRAY_SIZE(f718x2fg_in_temp_attr); i++)
1601 device_remove_file(&pdev->dev,
1602 &f718x2fg_in_temp_attr[i].dev_attr);
1603
45fb3669
HG		 1604 for (i = 0; i < ARRAY_SIZE(f71882fg_in_temp_attr); i++)
1605 device_remove_file(&pdev->dev,
1606 &f71882fg_in_temp_attr[i].dev_attr);
1607
498be968
HG		 1608 for (i = 0; i < ARRAY_SIZE(f718x2fg_fan_attr); i++)
1609 device_remove_file(&pdev->dev, &f718x2fg_fan_attr[i].dev_attr);
1610
1611 for (i = 0; i < ARRAY_SIZE(f71862fg_fan_attr); i++)
1612 device_remove_file(&pdev->dev, &f71862fg_fan_attr[i].dev_attr);
1613
45fb3669
HG		 1614 for (i = 0; i < ARRAY_SIZE(f71882fg_fan_attr); i++)
1615 device_remove_file(&pdev->dev, &f71882fg_fan_attr[i].dev_attr);
1616
1617 kfree(data);
1618
1619 return 0;
1620}
1621
498be968
HG		 1622static int __init f71882fg_find(int sioaddr, unsigned short *address,
1623 struct f71882fg_sio_data *sio_data)
45fb3669
HG		 1624{
1625 int err = -ENODEV;
1626 u16 devid;
45fb3669
HG		 1627
1628 superio_enter(sioaddr);
1629
1630 devid = superio_inw(sioaddr, SIO_REG_MANID);
1631 if (devid != SIO_FINTEK_ID) {
1632 printk(KERN_INFO DRVNAME ": Not a Fintek device\n");
1633 goto exit;
1634 }
1635
67b671bc 1636 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
498be968
HG		 1637 switch (devid) {
1638 case SIO_F71862_ID:
1639 sio_data->type = f71862fg;
1640 break;
1641 case SIO_F71882_ID:
1642 sio_data->type = f71882fg;
1643 break;
1644 default:
45fb3669
HG		 1645 printk(KERN_INFO DRVNAME ": Unsupported Fintek device\n");
1646 goto exit;
1647 }
1648
1649 superio_select(sioaddr, SIO_F71882FG_LD_HWM);
8afb1049 1650 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
45fb3669
HG		 1651 printk(KERN_WARNING DRVNAME ": Device not activated\n");
1652 goto exit;
1653 }
1654
1655 *address = superio_inw(sioaddr, SIO_REG_ADDR);
1656 if (*address == 0)
1657 {
1658 printk(KERN_WARNING DRVNAME ": Base address not set\n");
1659 goto exit;
1660 }
1661 *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
1662
45fb3669 1663 err = 0;
498be968
HG		 1664 printk(KERN_INFO DRVNAME ": Found %s chip at %#x, revision %d\n",
1665 f71882fg_names[sio_data->type], (unsigned int)*address,
45fb3669
HG		 1666 (int)superio_inb(sioaddr, SIO_REG_DEVREV));
1667exit:
1668 superio_exit(sioaddr);
1669 return err;
1670}
1671
498be968
HG		 1672static int __init f71882fg_device_add(unsigned short address,
1673 const struct f71882fg_sio_data *sio_data)
45fb3669
HG		 1674{
1675 struct resource res = {
1676 .start = address,
1677 .end = address + REGION_LENGTH - 1,
1678 .flags = IORESOURCE_IO,
1679 };
1680 int err;
1681
1682 f71882fg_pdev = platform_device_alloc(DRVNAME, address);
8afb1049 1683 if (!f71882fg_pdev)
45fb3669
HG		 1684 return -ENOMEM;
1685
1686 res.name = f71882fg_pdev->name;
1687 err = platform_device_add_resources(f71882fg_pdev, &res, 1);
8afb1049 1688 if (err) {
45fb3669
HG		 1689 printk(KERN_ERR DRVNAME ": Device resource addition failed\n");
1690 goto exit_device_put;
1691 }
1692
498be968
HG		 1693 err = platform_device_add_data(f71882fg_pdev, sio_data,
1694 sizeof(struct f71882fg_sio_data));
1695 if (err) {
1696 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1697 goto exit_device_put;
1698 }
1699
45fb3669 1700 err = platform_device_add(f71882fg_pdev);
8afb1049 1701 if (err) {
45fb3669
HG		 1702 printk(KERN_ERR DRVNAME ": Device addition failed\n");
1703 goto exit_device_put;
1704 }
1705
1706 return 0;
1707
1708exit_device_put:
1709 platform_device_put(f71882fg_pdev);
1710
1711 return err;
1712}
1713
1714static int __init f71882fg_init(void)
1715{
1716 int err = -ENODEV;
1717 unsigned short address;
498be968
HG		 1718 struct f71882fg_sio_data sio_data;
1719
1720 memset(&sio_data, 0, sizeof(sio_data));
45fb3669 1721
498be968
HG		 1722 if (f71882fg_find(0x2e, &address, &sio_data) &&
1723 f71882fg_find(0x4e, &address, &sio_data))
45fb3669
HG		 1724 goto exit;
1725
c13548c5
HG		 1726 err = platform_driver_register(&f71882fg_driver);
1727 if (err)
45fb3669
HG		 1728 goto exit;
1729
498be968 1730 err = f71882fg_device_add(address, &sio_data);
c13548c5 1731 if (err)
45fb3669
HG		 1732 goto exit_driver;
1733
1734 return 0;
1735
1736exit_driver:
1737 platform_driver_unregister(&f71882fg_driver);
1738exit:
1739 return err;
1740}
1741
1742static void __exit f71882fg_exit(void)
1743{
1744 platform_device_unregister(f71882fg_pdev);
1745 platform_driver_unregister(&f71882fg_driver);
1746}
1747
1748MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver");
c13548c5 1749MODULE_AUTHOR("Hans Edgington, Hans de Goede (hdegoede@redhat.com)");
45fb3669
HG		 1750MODULE_LICENSE("GPL");
1751
1752module_init(f71882fg_init);
1753module_exit(f71882fg_exit);
Linux 6.x block layer and io_uring tree(s)