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hwmon: (f71882fg) Separate max and crit alarm and beep
[linux-2.6-block.git] / drivers / hwmon / f71882fg.c
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45fb3669
HG		 1/***************************************************************************
2 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
c13548c5 3 * Copyright (C) 2007,2008 by Hans de Goede <hdegoede@redhat.com> *
45fb3669
HG		 4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20
21#include <linux/module.h>
22#include <linux/init.h>
23#include <linux/slab.h>
24#include <linux/jiffies.h>
25#include <linux/platform_device.h>
26#include <linux/hwmon.h>
27#include <linux/hwmon-sysfs.h>
28#include <linux/err.h>
29#include <linux/mutex.h>
77a4a3e2 30#include <linux/io.h>
45fb3669
HG		 31
32#define DRVNAME "f71882fg"
33
77a4a3e2 34#define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
45fb3669
HG		 35#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
36#define SIO_LOCK_KEY 0xAA /* Key to diasble Super-I/O */
37
38#define SIO_REG_LDSEL 0x07 /* Logical device select */
39#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
40#define SIO_REG_DEVREV 0x22 /* Device revision */
41#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
42#define SIO_REG_ENABLE 0x30 /* Logical device enable */
43#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
44
45#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
498be968 46#define SIO_F71862_ID 0x0601 /* Chipset ID */
45fb3669
HG		 47#define SIO_F71882_ID 0x0541 /* Chipset ID */
48
49#define REGION_LENGTH 8
50#define ADDR_REG_OFFSET 5
51#define DATA_REG_OFFSET 6
52
53#define F71882FG_REG_PECI 0x0A
54
498be968
HG		 55#define F71882FG_REG_IN_STATUS 0x12 /* f71882fg only */
56#define F71882FG_REG_IN_BEEP 0x13 /* f71882fg only */
45fb3669 57#define F71882FG_REG_IN(nr) (0x20 + (nr))
498be968 58#define F71882FG_REG_IN1_HIGH 0x32 /* f71882fg only */
45fb3669
HG		 59
60#define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr)))
9ab796eb
MD		 61#define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr)))
62#define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr)))
45fb3669
HG		 63#define F71882FG_REG_FAN_STATUS 0x92
64#define F71882FG_REG_FAN_BEEP 0x93
65
7567a043
HG		 66#define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr))
67#define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr))
68#define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
45fb3669
HG		 69#define F71882FG_REG_TEMP_STATUS 0x62
70#define F71882FG_REG_TEMP_BEEP 0x63
bc27490f 71#define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr))
45fb3669
HG		 72#define F71882FG_REG_TEMP_TYPE 0x6B
73#define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
74
9ab796eb
MD		 75#define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr)))
76#define F71882FG_REG_PWM_TYPE 0x94
77#define F71882FG_REG_PWM_ENABLE 0x96
78
bc27490f 79#define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr))
9ab796eb
MD		 80
81#define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm)))
82#define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm)))
83#define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr))
84
45fb3669
HG		 85#define F71882FG_REG_START 0x01
86
87#define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */
88
67b671bc
JD		 89static unsigned short force_id;
90module_param(force_id, ushort, 0);
91MODULE_PARM_DESC(force_id, "Override the detected device ID");
92
9ab796eb
MD		 93static int fan_mode[4] = { 0, 0, 0, 0 };
94module_param_array(fan_mode, int, NULL, 0644);
95MODULE_PARM_DESC(fan_mode, "List of fan control modes (f71882fg only) "
96 "(0=don't change, 1=pwm, 2=rpm)\n"
97 "Note: this needs a write to pwm#_enable to take effect");
98
498be968
HG		 99enum chips { f71862fg, f71882fg };
100
101static const char *f71882fg_names[] = {
102 "f71862fg",
103 "f71882fg",
104};
105
77a4a3e2 106static struct platform_device *f71882fg_pdev;
45fb3669
HG		 107
108/* Super-I/O Function prototypes */
109static inline int superio_inb(int base, int reg);
110static inline int superio_inw(int base, int reg);
111static inline void superio_enter(int base);
112static inline void superio_select(int base, int ld);
113static inline void superio_exit(int base);
114
498be968
HG		 115struct f71882fg_sio_data {
116 enum chips type;
117};
118
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HG		 119struct f71882fg_data {
120 unsigned short addr;
498be968 121 enum chips type;
1beeffe4 122 struct device *hwmon_dev;
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HG		 123
124 struct mutex update_lock;
125 char valid; /* !=0 if following fields are valid */
126 unsigned long last_updated; /* In jiffies */
127 unsigned long last_limits; /* In jiffies */
128
129 /* Register Values */
130 u8 in[9];
131 u8 in1_max;
132 u8 in_status;
133 u8 in_beep;
134 u16 fan[4];
9ab796eb
MD		 135 u16 fan_target[4];
136 u16 fan_full_speed[4];
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HG		 137 u8 fan_status;
138 u8 fan_beep;
7567a043
HG		 139 /* Note: all models have only 3 temperature channels, but on some
140 they are addressed as 0-2 and on others as 1-3, so for coding
141 convenience we reserve space for 4 channels */
142 u8 temp[4];
143 u8 temp_ovt[4];
144 u8 temp_high[4];
bc27490f 145 u8 temp_hyst[2]; /* 2 hysts stored per reg */
7567a043 146 u8 temp_type[4];
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HG		 147 u8 temp_status;
148 u8 temp_beep;
149 u8 temp_diode_open;
9ab796eb
MD		 150 u8 pwm[4];
151 u8 pwm_enable;
152 u8 pwm_auto_point_hyst[2];
153 u8 pwm_auto_point_mapping[4];
154 u8 pwm_auto_point_pwm[4][5];
155 u8 pwm_auto_point_temp[4][4];
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HG		 156};
157
77a4a3e2 158/* Sysfs in */
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HG		 159static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
160 char *buf);
161static ssize_t show_in_max(struct device *dev, struct device_attribute
162 *devattr, char *buf);
163static ssize_t store_in_max(struct device *dev, struct device_attribute
164 *devattr, const char *buf, size_t count);
165static ssize_t show_in_beep(struct device *dev, struct device_attribute
166 *devattr, char *buf);
167static ssize_t store_in_beep(struct device *dev, struct device_attribute
168 *devattr, const char *buf, size_t count);
169static ssize_t show_in_alarm(struct device *dev, struct device_attribute
170 *devattr, char *buf);
171/* Sysfs Fan */
172static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
173 char *buf);
9ab796eb
MD		 174static ssize_t show_fan_full_speed(struct device *dev,
175 struct device_attribute *devattr, char *buf);
176static ssize_t store_fan_full_speed(struct device *dev,
177 struct device_attribute *devattr, const char *buf, size_t count);
45fb3669
HG		 178static ssize_t show_fan_beep(struct device *dev, struct device_attribute
179 *devattr, char *buf);
180static ssize_t store_fan_beep(struct device *dev, struct device_attribute
181 *devattr, const char *buf, size_t count);
182static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
183 *devattr, char *buf);
184/* Sysfs Temp */
185static ssize_t show_temp(struct device *dev, struct device_attribute
186 *devattr, char *buf);
187static ssize_t show_temp_max(struct device *dev, struct device_attribute
188 *devattr, char *buf);
189static ssize_t store_temp_max(struct device *dev, struct device_attribute
190 *devattr, const char *buf, size_t count);
191static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
192 *devattr, char *buf);
193static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
194 *devattr, const char *buf, size_t count);
195static ssize_t show_temp_crit(struct device *dev, struct device_attribute
196 *devattr, char *buf);
197static ssize_t store_temp_crit(struct device *dev, struct device_attribute
198 *devattr, const char *buf, size_t count);
199static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
200 *devattr, char *buf);
201static ssize_t show_temp_type(struct device *dev, struct device_attribute
202 *devattr, char *buf);
203static ssize_t show_temp_beep(struct device *dev, struct device_attribute
204 *devattr, char *buf);
205static ssize_t store_temp_beep(struct device *dev, struct device_attribute
206 *devattr, const char *buf, size_t count);
207static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
208 *devattr, char *buf);
209static ssize_t show_temp_fault(struct device *dev, struct device_attribute
210 *devattr, char *buf);
9ab796eb
MD		 211/* PWM and Auto point control */
212static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
213 char *buf);
214static ssize_t store_pwm(struct device *dev, struct device_attribute *devattr,
215 const char *buf, size_t count);
216static ssize_t show_pwm_enable(struct device *dev,
217 struct device_attribute *devattr, char *buf);
218static ssize_t store_pwm_enable(struct device *dev,
219 struct device_attribute *devattr, const char *buf, size_t count);
220static ssize_t show_pwm_interpolate(struct device *dev,
221 struct device_attribute *devattr, char *buf);
222static ssize_t store_pwm_interpolate(struct device *dev,
223 struct device_attribute *devattr, const char *buf, size_t count);
224static ssize_t show_pwm_auto_point_channel(struct device *dev,
225 struct device_attribute *devattr, char *buf);
226static ssize_t store_pwm_auto_point_channel(struct device *dev,
227 struct device_attribute *devattr, const char *buf, size_t count);
228static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
229 struct device_attribute *devattr, char *buf);
230static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
231 struct device_attribute *devattr, const char *buf, size_t count);
232static ssize_t show_pwm_auto_point_pwm(struct device *dev,
233 struct device_attribute *devattr, char *buf);
234static ssize_t store_pwm_auto_point_pwm(struct device *dev,
235 struct device_attribute *devattr, const char *buf, size_t count);
236static ssize_t show_pwm_auto_point_temp(struct device *dev,
237 struct device_attribute *devattr, char *buf);
238static ssize_t store_pwm_auto_point_temp(struct device *dev,
239 struct device_attribute *devattr, const char *buf, size_t count);
45fb3669
HG		 240/* Sysfs misc */
241static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
242 char *buf);
243
244static int __devinit f71882fg_probe(struct platform_device * pdev);
c13548c5 245static int f71882fg_remove(struct platform_device *pdev);
45fb3669
HG		 246
247static struct platform_driver f71882fg_driver = {
248 .driver = {
249 .owner = THIS_MODULE,
250 .name = DRVNAME,
251 },
252 .probe = f71882fg_probe,
253 .remove = __devexit_p(f71882fg_remove),
254};
255
c13548c5 256static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
45fb3669 257
498be968 258static struct sensor_device_attribute_2 f718x2fg_in_temp_attr[] = {
bc37ae71
MD		 259 SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
260 SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
bc37ae71
MD		 261 SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
262 SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3),
263 SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4),
264 SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5),
265 SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6),
266 SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7),
267 SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8),
7567a043 268 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1),
bc37ae71 269 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
7567a043 270 store_temp_max, 0, 1),
bc37ae71 271 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
7567a043 272 store_temp_max_hyst, 0, 1),
754a5907
HG		 273 /* Should really be temp1_max_alarm, but older versions did not handle
274 the max and crit alarms separately and lm_sensors v2 depends on the
275 presence of temp#_alarm files. The same goes for temp2/3 _alarm. */
276 SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
277 SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
278 store_temp_beep, 0, 1),
bc37ae71 279 SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
7567a043 280 store_temp_crit, 0, 1),
bc37ae71 281 SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
7567a043 282 0, 1),
754a5907
HG		 283 SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
284 SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
285 store_temp_beep, 0, 5),
7567a043 286 SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1),
7567a043
HG		 287 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
288 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2),
bc37ae71 289 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
7567a043 290 store_temp_max, 0, 2),
bc37ae71 291 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
7567a043 292 store_temp_max_hyst, 0, 2),
754a5907
HG		 293 /* Should be temp2_max_alarm, see temp1_alarm note */
294 SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
295 SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
296 store_temp_beep, 0, 2),
bc37ae71 297 SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
7567a043 298 store_temp_crit, 0, 2),
bc37ae71 299 SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
7567a043 300 0, 2),
754a5907
HG		 301 SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
302 SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
303 store_temp_beep, 0, 6),
7567a043 304 SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2),
7567a043
HG		 305 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
306 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3),
bc37ae71 307 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
7567a043 308 store_temp_max, 0, 3),
bc37ae71 309 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
7567a043 310 store_temp_max_hyst, 0, 3),
754a5907
HG		 311 /* Should be temp3_max_alarm, see temp1_alarm note */
312 SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3),
313 SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
314 store_temp_beep, 0, 3),
bc37ae71 315 SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
7567a043 316 store_temp_crit, 0, 3),
bc37ae71 317 SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
7567a043 318 0, 3),
754a5907
HG		 319 SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 7),
320 SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
321 store_temp_beep, 0, 7),
7567a043 322 SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3),
7567a043 323 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3),
45fb3669
HG		 324};
325
498be968
HG		 326static struct sensor_device_attribute_2 f71882fg_in_temp_attr[] = {
327 SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max,
328 0, 1),
329 SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep,
330 0, 1),
331 SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1),
332};
333
334static struct sensor_device_attribute_2 f718x2fg_fan_attr[] = {
bc37ae71 335 SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0),
9ab796eb
MD		 336 SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR,
337 show_fan_full_speed,
338 store_fan_full_speed, 0, 0),
bc37ae71
MD		 339 SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
340 store_fan_beep, 0, 0),
341 SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0),
342 SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1),
9ab796eb
MD		 343 SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR,
344 show_fan_full_speed,
345 store_fan_full_speed, 0, 1),
bc37ae71
MD		 346 SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
347 store_fan_beep, 0, 1),
348 SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1),
349 SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
9ab796eb
MD		 350 SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR,
351 show_fan_full_speed,
352 store_fan_full_speed, 0, 2),
bc37ae71
MD		 353 SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
354 store_fan_beep, 0, 2),
355 SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
9ab796eb
MD		 356
357 SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0),
358 SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
359 store_pwm_enable, 0, 0),
360 SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR,
361 show_pwm_interpolate, store_pwm_interpolate, 0, 0),
362 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
363 show_pwm_auto_point_channel,
364 store_pwm_auto_point_channel, 0, 0),
498be968
HG		 365
366 SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1),
367 SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
368 store_pwm_enable, 0, 1),
369 SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR,
370 show_pwm_interpolate, store_pwm_interpolate, 0, 1),
371 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
372 show_pwm_auto_point_channel,
373 store_pwm_auto_point_channel, 0, 1),
374
375 SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2),
376 SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
377 store_pwm_enable, 0, 2),
378 SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR,
379 show_pwm_interpolate, store_pwm_interpolate, 0, 2),
380 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
381 show_pwm_auto_point_channel,
382 store_pwm_auto_point_channel, 0, 2),
383};
384
385static struct sensor_device_attribute_2 f71862fg_fan_attr[] = {
386 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
387 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
388 1, 0),
389 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
390 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
391 4, 0),
392 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
393 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
394 0, 0),
395 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
396 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
397 3, 0),
398 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
399 show_pwm_auto_point_temp_hyst,
400 store_pwm_auto_point_temp_hyst,
401 0, 0),
402 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
403 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
404
405 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
406 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
407 1, 1),
408 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
409 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
410 4, 1),
411 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
412 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
413 0, 1),
414 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
415 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
416 3, 1),
417 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
418 show_pwm_auto_point_temp_hyst,
419 store_pwm_auto_point_temp_hyst,
420 0, 1),
421 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
422 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
423};
424
425static struct sensor_device_attribute_2 f71882fg_fan_attr[] = {
426 SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
427 SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
428 show_fan_full_speed,
429 store_fan_full_speed, 0, 3),
430 SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
431 store_fan_beep, 0, 3),
432 SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
433
9ab796eb
MD		 434 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
435 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
436 0, 0),
437 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
438 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
439 1, 0),
440 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
441 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
442 2, 0),
443 SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR,
444 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
445 3, 0),
446 SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR,
447 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
448 4, 0),
449 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
450 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
451 0, 0),
452 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
453 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
454 1, 0),
455 SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR,
456 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
457 2, 0),
458 SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR,
459 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
460 3, 0),
461 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
462 show_pwm_auto_point_temp_hyst,
463 store_pwm_auto_point_temp_hyst,
464 0, 0),
465 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
466 show_pwm_auto_point_temp_hyst, NULL, 1, 0),
467 SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO,
468 show_pwm_auto_point_temp_hyst, NULL, 2, 0),
469 SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO,
470 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
471
9ab796eb
MD		 472 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
473 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
474 0, 1),
475 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
476 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
477 1, 1),
478 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
479 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
480 2, 1),
481 SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR,
482 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
483 3, 1),
484 SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR,
485 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
486 4, 1),
487 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
488 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
489 0, 1),
490 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
491 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
492 1, 1),
493 SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR,
494 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
495 2, 1),
496 SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR,
497 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
498 3, 1),
499 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
500 show_pwm_auto_point_temp_hyst,
501 store_pwm_auto_point_temp_hyst,
502 0, 1),
503 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
504 show_pwm_auto_point_temp_hyst, NULL, 1, 1),
505 SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO,
506 show_pwm_auto_point_temp_hyst, NULL, 2, 1),
507 SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO,
508 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
509
9ab796eb
MD		 510 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
511 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
512 0, 2),
513 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
514 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
515 1, 2),
516 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
517 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
518 2, 2),
519 SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR,
520 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
521 3, 2),
522 SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR,
523 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
524 4, 2),
525 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
526 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
527 0, 2),
528 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
529 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
530 1, 2),
531 SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR,
532 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
533 2, 2),
534 SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR,
535 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
536 3, 2),
537 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
538 show_pwm_auto_point_temp_hyst,
539 store_pwm_auto_point_temp_hyst,
540 0, 2),
541 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
542 show_pwm_auto_point_temp_hyst, NULL, 1, 2),
543 SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO,
544 show_pwm_auto_point_temp_hyst, NULL, 2, 2),
545 SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
546 show_pwm_auto_point_temp_hyst, NULL, 3, 2),
547
548 SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
549 SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
550 store_pwm_enable, 0, 3),
551 SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR,
552 show_pwm_interpolate, store_pwm_interpolate, 0, 3),
553 SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR,
554 show_pwm_auto_point_channel,
555 store_pwm_auto_point_channel, 0, 3),
556 SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR,
557 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
558 0, 3),
559 SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR,
560 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
561 1, 3),
562 SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR,
563 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
564 2, 3),
565 SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR,
566 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
567 3, 3),
568 SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR,
569 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
570 4, 3),
571 SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR,
572 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
573 0, 3),
574 SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR,
575 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
576 1, 3),
577 SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR,
578 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
579 2, 3),
580 SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR,
581 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
582 3, 3),
583 SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
584 show_pwm_auto_point_temp_hyst,
585 store_pwm_auto_point_temp_hyst,
586 0, 3),
587 SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO,
588 show_pwm_auto_point_temp_hyst, NULL, 1, 3),
589 SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO,
590 show_pwm_auto_point_temp_hyst, NULL, 2, 3),
591 SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO,
592 show_pwm_auto_point_temp_hyst, NULL, 3, 3),
45fb3669
HG		 593};
594
595
596/* Super I/O functions */
597static inline int superio_inb(int base, int reg)
598{
599 outb(reg, base);
600 return inb(base + 1);
601}
602
603static int superio_inw(int base, int reg)
604{
605 int val;
606 outb(reg++, base);
607 val = inb(base + 1) << 8;
608 outb(reg, base);
609 val |= inb(base + 1);
610 return val;
611}
612
613static inline void superio_enter(int base)
614{
615 /* according to the datasheet the key must be send twice! */
616 outb( SIO_UNLOCK_KEY, base);
617 outb( SIO_UNLOCK_KEY, base);
618}
619
620static inline void superio_select( int base, int ld)
621{
622 outb(SIO_REG_LDSEL, base);
623 outb(ld, base + 1);
624}
625
626static inline void superio_exit(int base)
627{
628 outb(SIO_LOCK_KEY, base);
629}
630
631static inline u16 fan_from_reg(u16 reg)
632{
633 return reg ? (1500000 / reg) : 0;
634}
635
9ab796eb
MD		 636static inline u16 fan_to_reg(u16 fan)
637{
638 return fan ? (1500000 / fan) : 0;
639}
640
45fb3669
HG		 641static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg)
642{
643 u8 val;
644
645 outb(reg, data->addr + ADDR_REG_OFFSET);
646 val = inb(data->addr + DATA_REG_OFFSET);
647
648 return val;
649}
650
651static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg)
652{
653 u16 val;
654
655 outb(reg++, data->addr + ADDR_REG_OFFSET);
656 val = inb(data->addr + DATA_REG_OFFSET) << 8;
657 outb(reg, data->addr + ADDR_REG_OFFSET);
658 val |= inb(data->addr + DATA_REG_OFFSET);
659
660 return val;
661}
662
663static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val)
664{
665 outb(reg, data->addr + ADDR_REG_OFFSET);
666 outb(val, data->addr + DATA_REG_OFFSET);
667}
668
9ab796eb
MD		 669static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val)
670{
671 outb(reg++, data->addr + ADDR_REG_OFFSET);
672 outb(val >> 8, data->addr + DATA_REG_OFFSET);
673 outb(reg, data->addr + ADDR_REG_OFFSET);
674 outb(val & 255, data->addr + DATA_REG_OFFSET);
675}
676
77a4a3e2 677static struct f71882fg_data *f71882fg_update_device(struct device *dev)
45fb3669
HG		 678{
679 struct f71882fg_data *data = dev_get_drvdata(dev);
680 int nr, reg, reg2;
498be968 681 int nr_fans = (data->type == f71862fg) ? 3 : 4;
45fb3669
HG		 682
683 mutex_lock(&data->update_lock);
684
685 /* Update once every 60 seconds */
686 if ( time_after(jiffies, data->last_limits + 60 * HZ ) ||
687 !data->valid) {
498be968
HG		 688 if (data->type == f71882fg) {
689 data->in1_max =
690 f71882fg_read8(data, F71882FG_REG_IN1_HIGH);
691 data->in_beep =
692 f71882fg_read8(data, F71882FG_REG_IN_BEEP);
693 }
45fb3669
HG		 694
695 /* Get High & boundary temps*/
7567a043 696 for (nr = 1; nr < 4; nr++) {
45fb3669
HG		 697 data->temp_ovt[nr] = f71882fg_read8(data,
698 F71882FG_REG_TEMP_OVT(nr));
699 data->temp_high[nr] = f71882fg_read8(data,
700 F71882FG_REG_TEMP_HIGH(nr));
701 }
702
bc27490f
HG		 703 /* hyst */
704 data->temp_hyst[0] =
705 f71882fg_read8(data, F71882FG_REG_TEMP_HYST(0));
706 data->temp_hyst[1] =
707 f71882fg_read8(data, F71882FG_REG_TEMP_HYST(1));
45fb3669
HG		 708
709 /* Have to hardcode type, because temp1 is special */
710 reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
711 reg2 = f71882fg_read8(data, F71882FG_REG_PECI);
712 if ((reg2 & 0x03) == 0x01)
7567a043 713 data->temp_type[1] = 6 /* PECI */;
45fb3669 714 else if ((reg2 & 0x03) == 0x02)
7567a043 715 data->temp_type[1] = 5 /* AMDSI */;
45fb3669 716 else
7567a043 717 data->temp_type[1] = (reg & 0x02) ? 2 : 4;
45fb3669 718
7567a043
HG		 719 data->temp_type[2] = (reg & 0x04) ? 2 : 4;
720 data->temp_type[3] = (reg & 0x08) ? 2 : 4;
45fb3669
HG		 721
722 data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
723
724 data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
725
9ab796eb
MD		 726 data->pwm_enable = f71882fg_read8(data,
727 F71882FG_REG_PWM_ENABLE);
bc27490f
HG		 728 data->pwm_auto_point_hyst[0] =
729 f71882fg_read8(data, F71882FG_REG_FAN_HYST(0));
730 data->pwm_auto_point_hyst[1] =
731 f71882fg_read8(data, F71882FG_REG_FAN_HYST(1));
732
498be968 733 for (nr = 0; nr < nr_fans; nr++) {
9ab796eb
MD		 734 data->pwm_auto_point_mapping[nr] =
735 f71882fg_read8(data,
736 F71882FG_REG_POINT_MAPPING(nr));
737
498be968
HG		 738 if (data->type == f71882fg) {
739 int point;
740 for (point = 0; point < 5; point++) {
741 data->pwm_auto_point_pwm[nr][point] =
742 f71882fg_read8(data,
743 F71882FG_REG_POINT_PWM
744 (nr, point));
745 }
746 for (point = 0; point < 4; point++) {
747 data->pwm_auto_point_temp[nr][point] =
748 f71882fg_read8(data,
749 F71882FG_REG_POINT_TEMP
750 (nr, point));
751 }
752 } else {
753 data->pwm_auto_point_pwm[nr][1] =
754 f71882fg_read8(data,
755 F71882FG_REG_POINT_PWM
756 (nr, 1));
757 data->pwm_auto_point_pwm[nr][4] =
758 f71882fg_read8(data,
759 F71882FG_REG_POINT_PWM
760 (nr, 4));
761 data->pwm_auto_point_temp[nr][0] =
762 f71882fg_read8(data,
763 F71882FG_REG_POINT_TEMP
764 (nr, 0));
765 data->pwm_auto_point_temp[nr][3] =
766 f71882fg_read8(data,
767 F71882FG_REG_POINT_TEMP
768 (nr, 3));
9ab796eb
MD		 769 }
770 }
45fb3669
HG		 771 data->last_limits = jiffies;
772 }
773
774 /* Update every second */
8afb1049 775 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
45fb3669
HG		 776 data->temp_status = f71882fg_read8(data,
777 F71882FG_REG_TEMP_STATUS);
778 data->temp_diode_open = f71882fg_read8(data,
779 F71882FG_REG_TEMP_DIODE_OPEN);
7567a043 780 for (nr = 1; nr < 4; nr++)
45fb3669
HG		 781 data->temp[nr] = f71882fg_read8(data,
782 F71882FG_REG_TEMP(nr));
783
784 data->fan_status = f71882fg_read8(data,
785 F71882FG_REG_FAN_STATUS);
498be968 786 for (nr = 0; nr < nr_fans; nr++) {
45fb3669
HG		 787 data->fan[nr] = f71882fg_read16(data,
788 F71882FG_REG_FAN(nr));
9ab796eb
MD		 789 data->fan_target[nr] =
790 f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr));
791 data->fan_full_speed[nr] =
792 f71882fg_read16(data,
793 F71882FG_REG_FAN_FULL_SPEED(nr));
794 data->pwm[nr] =
795 f71882fg_read8(data, F71882FG_REG_PWM(nr));
796 }
45fb3669 797
498be968
HG		 798 if (data->type == f71882fg)
799 data->in_status = f71882fg_read8(data,
45fb3669
HG		 800 F71882FG_REG_IN_STATUS);
801 for (nr = 0; nr < 9; nr++)
802 data->in[nr] = f71882fg_read8(data,
803 F71882FG_REG_IN(nr));
804
805 data->last_updated = jiffies;
806 data->valid = 1;
807 }
808
809 mutex_unlock(&data->update_lock);
810
811 return data;
812}
813
814/* Sysfs Interface */
815static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
816 char *buf)
817{
818 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 819 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 820 int speed = fan_from_reg(data->fan[nr]);
821
822 if (speed == FAN_MIN_DETECT)
823 speed = 0;
824
825 return sprintf(buf, "%d\n", speed);
826}
827
9ab796eb
MD		 828static ssize_t show_fan_full_speed(struct device *dev,
829 struct device_attribute *devattr, char *buf)
830{
831 struct f71882fg_data *data = f71882fg_update_device(dev);
832 int nr = to_sensor_dev_attr_2(devattr)->index;
833 int speed = fan_from_reg(data->fan_full_speed[nr]);
834 return sprintf(buf, "%d\n", speed);
835}
836
837static ssize_t store_fan_full_speed(struct device *dev,
838 struct device_attribute *devattr,
839 const char *buf, size_t count)
840{
841 struct f71882fg_data *data = dev_get_drvdata(dev);
842 int nr = to_sensor_dev_attr_2(devattr)->index;
843 long val = simple_strtol(buf, NULL, 10);
844
845 val = SENSORS_LIMIT(val, 23, 1500000);
846 val = fan_to_reg(val);
847
848 mutex_lock(&data->update_lock);
ce0bfa5e 849 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
9ab796eb
MD		 850 if (data->pwm_enable & (1 << (2 * nr)))
851 /* PWM mode */
852 count = -EINVAL;
853 else {
854 /* RPM mode */
855 f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val);
856 data->fan_full_speed[nr] = val;
857 }
858 mutex_unlock(&data->update_lock);
859
860 return count;
861}
862
45fb3669
HG		 863static ssize_t show_fan_beep(struct device *dev, struct device_attribute
864 *devattr, char *buf)
865{
866 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 867 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 868
869 if (data->fan_beep & (1 << nr))
870 return sprintf(buf, "1\n");
871 else
872 return sprintf(buf, "0\n");
873}
874
875static ssize_t store_fan_beep(struct device *dev, struct device_attribute
876 *devattr, const char *buf, size_t count)
877{
878 struct f71882fg_data *data = dev_get_drvdata(dev);
bc37ae71 879 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 880 unsigned long val = simple_strtoul(buf, NULL, 10);
45fb3669
HG		 881
882 mutex_lock(&data->update_lock);
ce0bfa5e 883 data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
45fb3669
HG		 884 if (val)
885 data->fan_beep |= 1 << nr;
886 else
887 data->fan_beep &= ~(1 << nr);
888
889 f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep);
890 mutex_unlock(&data->update_lock);
891
892 return count;
893}
894
895static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
896 *devattr, char *buf)
897{
898 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 899 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 900
901 if (data->fan_status & (1 << nr))
902 return sprintf(buf, "1\n");
903 else
904 return sprintf(buf, "0\n");
905}
906
907static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
908 char *buf)
909{
910 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 911 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 912
913 return sprintf(buf, "%d\n", data->in[nr] * 8);
914}
915
916static ssize_t show_in_max(struct device *dev, struct device_attribute
917 *devattr, char *buf)
918{
919 struct f71882fg_data *data = f71882fg_update_device(dev);
920
921 return sprintf(buf, "%d\n", data->in1_max * 8);
922}
923
924static ssize_t store_in_max(struct device *dev, struct device_attribute
925 *devattr, const char *buf, size_t count)
926{
927 struct f71882fg_data *data = dev_get_drvdata(dev);
ce0bfa5e
HG		 928 long val = simple_strtol(buf, NULL, 10) / 8;
929 val = SENSORS_LIMIT(val, 0, 255);
45fb3669
HG		 930
931 mutex_lock(&data->update_lock);
932 f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val);
933 data->in1_max = val;
934 mutex_unlock(&data->update_lock);
935
936 return count;
937}
938
939static ssize_t show_in_beep(struct device *dev, struct device_attribute
940 *devattr, char *buf)
941{
942 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 943 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 944
945 if (data->in_beep & (1 << nr))
946 return sprintf(buf, "1\n");
947 else
948 return sprintf(buf, "0\n");
949}
950
951static ssize_t store_in_beep(struct device *dev, struct device_attribute
952 *devattr, const char *buf, size_t count)
953{
954 struct f71882fg_data *data = dev_get_drvdata(dev);
bc37ae71 955 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 956 unsigned long val = simple_strtoul(buf, NULL, 10);
45fb3669
HG		 957
958 mutex_lock(&data->update_lock);
ce0bfa5e 959 data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP);
45fb3669
HG		 960 if (val)
961 data->in_beep |= 1 << nr;
962 else
963 data->in_beep &= ~(1 << nr);
964
965 f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep);
966 mutex_unlock(&data->update_lock);
967
968 return count;
969}
970
971static ssize_t show_in_alarm(struct device *dev, struct device_attribute
972 *devattr, char *buf)
973{
974 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 975 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 976
977 if (data->in_status & (1 << nr))
978 return sprintf(buf, "1\n");
979 else
980 return sprintf(buf, "0\n");
981}
982
983static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
984 char *buf)
985{
986 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 987 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 988
989 return sprintf(buf, "%d\n", data->temp[nr] * 1000);
990}
991
992static ssize_t show_temp_max(struct device *dev, struct device_attribute
993 *devattr, char *buf)
994{
995 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 996 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 997
998 return sprintf(buf, "%d\n", data->temp_high[nr] * 1000);
999}
1000
1001static ssize_t store_temp_max(struct device *dev, struct device_attribute
1002 *devattr, const char *buf, size_t count)
1003{
1004 struct f71882fg_data *data = dev_get_drvdata(dev);
bc37ae71 1005 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e
HG		 1006 long val = simple_strtol(buf, NULL, 10) / 1000;
1007 val = SENSORS_LIMIT(val, 0, 255);
45fb3669
HG		 1008
1009 mutex_lock(&data->update_lock);
1010 f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val);
1011 data->temp_high[nr] = val;
1012 mutex_unlock(&data->update_lock);
1013
1014 return count;
1015}
1016
1017static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
1018 *devattr, char *buf)
1019{
1020 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1021 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 1022 int temp_max_hyst;
45fb3669 1023
ce0bfa5e 1024 mutex_lock(&data->update_lock);
bc27490f
HG		 1025 if (nr & 1)
1026 temp_max_hyst = data->temp_hyst[nr / 2] >> 4;
1027 else
1028 temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f;
1029 temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000;
ce0bfa5e
HG		 1030 mutex_unlock(&data->update_lock);
1031
1032 return sprintf(buf, "%d\n", temp_max_hyst);
45fb3669
HG		 1033}
1034
1035static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
1036 *devattr, const char *buf, size_t count)
1037{
1038 struct f71882fg_data *data = dev_get_drvdata(dev);
bc37ae71 1039 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 1040 long val = simple_strtol(buf, NULL, 10) / 1000;
45fb3669 1041 ssize_t ret = count;
ce0bfa5e 1042 u8 reg;
45fb3669
HG		 1043
1044 mutex_lock(&data->update_lock);
1045
1046 /* convert abs to relative and check */
ce0bfa5e
HG		 1047 data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr));
1048 val = SENSORS_LIMIT(val, data->temp_high[nr] - 15,
1049 data->temp_high[nr]);
45fb3669 1050 val = data->temp_high[nr] - val;
45fb3669
HG		 1051
1052 /* convert value to register contents */
bc27490f
HG		 1053 reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2));
1054 if (nr & 1)
1055 reg = (reg & 0x0f) | (val << 4);
1056 else
1057 reg = (reg & 0xf0) | val;
1058 f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg);
1059 data->temp_hyst[nr / 2] = reg;
45fb3669 1060
45fb3669
HG		 1061 mutex_unlock(&data->update_lock);
1062 return ret;
1063}
1064
1065static ssize_t show_temp_crit(struct device *dev, struct device_attribute
1066 *devattr, char *buf)
1067{
1068 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1069 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1070
1071 return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000);
1072}
1073
1074static ssize_t store_temp_crit(struct device *dev, struct device_attribute
1075 *devattr, const char *buf, size_t count)
1076{
1077 struct f71882fg_data *data = dev_get_drvdata(dev);
bc37ae71 1078 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e
HG		 1079 long val = simple_strtol(buf, NULL, 10) / 1000;
1080 val = SENSORS_LIMIT(val, 0, 255);
45fb3669
HG		 1081
1082 mutex_lock(&data->update_lock);
1083 f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val);
1084 data->temp_ovt[nr] = val;
1085 mutex_unlock(&data->update_lock);
1086
1087 return count;
1088}
1089
1090static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
1091 *devattr, char *buf)
1092{
1093 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1094 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 1095 int temp_crit_hyst;
45fb3669 1096
ce0bfa5e 1097 mutex_lock(&data->update_lock);
bc27490f
HG		 1098 if (nr & 1)
1099 temp_crit_hyst = data->temp_hyst[nr / 2] >> 4;
1100 else
1101 temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f;
1102 temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000;
ce0bfa5e
HG		 1103 mutex_unlock(&data->update_lock);
1104
1105 return sprintf(buf, "%d\n", temp_crit_hyst);
45fb3669
HG		 1106}
1107
1108static ssize_t show_temp_type(struct device *dev, struct device_attribute
1109 *devattr, char *buf)
1110{
1111 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1112 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 1113
1114 return sprintf(buf, "%d\n", data->temp_type[nr]);
1115}
1116
1117static ssize_t show_temp_beep(struct device *dev, struct device_attribute
1118 *devattr, char *buf)
1119{
1120 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1121 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 1122
7567a043 1123 if (data->temp_beep & (1 << nr))
45fb3669
HG		 1124 return sprintf(buf, "1\n");
1125 else
1126 return sprintf(buf, "0\n");
1127}
1128
1129static ssize_t store_temp_beep(struct device *dev, struct device_attribute
1130 *devattr, const char *buf, size_t count)
1131{
1132 struct f71882fg_data *data = dev_get_drvdata(dev);
bc37ae71 1133 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 1134 unsigned long val = simple_strtoul(buf, NULL, 10);
45fb3669
HG		 1135
1136 mutex_lock(&data->update_lock);
ce0bfa5e 1137 data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
45fb3669 1138 if (val)
7567a043 1139 data->temp_beep |= 1 << nr;
45fb3669 1140 else
7567a043 1141 data->temp_beep &= ~(1 << nr);
45fb3669
HG		 1142
1143 f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep);
1144 mutex_unlock(&data->update_lock);
1145
1146 return count;
1147}
1148
1149static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
1150 *devattr, char *buf)
1151{
1152 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1153 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 1154
7567a043 1155 if (data->temp_status & (1 << nr))
45fb3669
HG		 1156 return sprintf(buf, "1\n");
1157 else
1158 return sprintf(buf, "0\n");
1159}
1160
1161static ssize_t show_temp_fault(struct device *dev, struct device_attribute
1162 *devattr, char *buf)
1163{
1164 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 1165 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 1166
7567a043 1167 if (data->temp_diode_open & (1 << nr))
45fb3669
HG		 1168 return sprintf(buf, "1\n");
1169 else
1170 return sprintf(buf, "0\n");
1171}
1172
9ab796eb
MD		 1173static ssize_t show_pwm(struct device *dev,
1174 struct device_attribute *devattr, char *buf)
1175{
1176 struct f71882fg_data *data = f71882fg_update_device(dev);
1177 int val, nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 1178 mutex_lock(&data->update_lock);
9ab796eb
MD		 1179 if (data->pwm_enable & (1 << (2 * nr)))
1180 /* PWM mode */
1181 val = data->pwm[nr];
1182 else {
1183 /* RPM mode */
9ab796eb
MD		 1184 val = 255 * fan_from_reg(data->fan_target[nr])
1185 / fan_from_reg(data->fan_full_speed[nr]);
9ab796eb 1186 }
ce0bfa5e 1187 mutex_unlock(&data->update_lock);
9ab796eb
MD		 1188 return sprintf(buf, "%d\n", val);
1189}
1190
1191static ssize_t store_pwm(struct device *dev,
1192 struct device_attribute *devattr, const char *buf,
1193 size_t count)
1194{
ce0bfa5e 1195 struct f71882fg_data *data = dev_get_drvdata(dev);
9ab796eb
MD		 1196 int nr = to_sensor_dev_attr_2(devattr)->index;
1197 long val = simple_strtol(buf, NULL, 10);
1198 val = SENSORS_LIMIT(val, 0, 255);
1199
1200 mutex_lock(&data->update_lock);
ce0bfa5e 1201 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
9ab796eb
MD		 1202 if (data->pwm_enable & (1 << (2 * nr))) {
1203 /* PWM mode */
1204 f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
1205 data->pwm[nr] = val;
1206 } else {
1207 /* RPM mode */
ce0bfa5e
HG		 1208 int target, full_speed;
1209 full_speed = f71882fg_read16(data,
1210 F71882FG_REG_FAN_FULL_SPEED(nr));
1211 target = fan_to_reg(val * fan_from_reg(full_speed) / 255);
1212 f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target);
1213 data->fan_target[nr] = target;
1214 data->fan_full_speed[nr] = full_speed;
9ab796eb
MD		 1215 }
1216 mutex_unlock(&data->update_lock);
1217
1218 return count;
1219}
1220
1221static ssize_t show_pwm_enable(struct device *dev,
1222 struct device_attribute *devattr, char *buf)
1223{
1224 int result;
1225 struct f71882fg_data *data = f71882fg_update_device(dev);
1226 int nr = to_sensor_dev_attr_2(devattr)->index;
1227
1228 if (data->pwm_enable & (2 << (2 * nr)))
1229 result = 1;
1230 else
1231 result = 2;
1232
1233 return sprintf(buf, "%d\n", result);
1234}
1235
1236static ssize_t store_pwm_enable(struct device *dev, struct device_attribute
1237 *devattr, const char *buf, size_t count)
1238{
1239 struct f71882fg_data *data = dev_get_drvdata(dev);
1240 int nr = to_sensor_dev_attr_2(devattr)->index;
1241 long val = simple_strtol(buf, NULL, 10);
1242 if (val < 1 || val > 2)
1243 return -EINVAL;
1244
1245 mutex_lock(&data->update_lock);
ce0bfa5e 1246 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
9ab796eb
MD		 1247 switch (val) {
1248 case 1:
1249 data->pwm_enable |= 2 << (2 * nr);
1250 break; /* Manual */
1251 case 2:
1252 data->pwm_enable &= ~(2 << (2 * nr));
1253 break; /* Temperature ctrl */
1254 }
498be968
HG		 1255 if (data->type == f71882fg) {
1256 switch (fan_mode[nr]) {
1257 case 1:
1258 data->pwm_enable |= 1 << (2 * nr);
1259 break; /* Duty cycle mode */
1260 case 2:
1261 data->pwm_enable &= ~(1 << (2 * nr));
1262 break; /* RPM mode */
1263 }
9ab796eb
MD		 1264 }
1265 f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable);
1266 mutex_unlock(&data->update_lock);
1267
1268 return count;
1269}
1270
1271static ssize_t show_pwm_auto_point_pwm(struct device *dev,
1272 struct device_attribute *devattr,
1273 char *buf)
1274{
1275 int result;
1276 struct f71882fg_data *data = f71882fg_update_device(dev);
1277 int pwm = to_sensor_dev_attr_2(devattr)->index;
1278 int point = to_sensor_dev_attr_2(devattr)->nr;
1279
ce0bfa5e 1280 mutex_lock(&data->update_lock);
9ab796eb
MD		 1281 if (data->pwm_enable & (1 << (2 * pwm))) {
1282 /* PWM mode */
1283 result = data->pwm_auto_point_pwm[pwm][point];
1284 } else {
1285 /* RPM mode */
1286 result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]);
1287 }
ce0bfa5e 1288 mutex_unlock(&data->update_lock);
9ab796eb
MD		 1289
1290 return sprintf(buf, "%d\n", result);
1291}
1292
1293static ssize_t store_pwm_auto_point_pwm(struct device *dev,
1294 struct device_attribute *devattr,
1295 const char *buf, size_t count)
1296{
ce0bfa5e 1297 struct f71882fg_data *data = dev_get_drvdata(dev);
9ab796eb
MD		 1298 int pwm = to_sensor_dev_attr_2(devattr)->index;
1299 int point = to_sensor_dev_attr_2(devattr)->nr;
ce0bfa5e 1300 long val = simple_strtol(buf, NULL, 10);
9ab796eb
MD		 1301 val = SENSORS_LIMIT(val, 0, 255);
1302
1303 mutex_lock(&data->update_lock);
ce0bfa5e 1304 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
9ab796eb
MD		 1305 if (data->pwm_enable & (1 << (2 * pwm))) {
1306 /* PWM mode */
1307 } else {
1308 /* RPM mode */
1309 if (val < 29) /* Prevent negative numbers */
1310 val = 255;
1311 else
1312 val = (255 - val) * 32 / val;
1313 }
1314 f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val);
1315 data->pwm_auto_point_pwm[pwm][point] = val;
1316 mutex_unlock(&data->update_lock);
1317
1318 return count;
1319}
1320
1321static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
1322 struct device_attribute *devattr,
1323 char *buf)
1324{
1325 int result = 0;
1326 struct f71882fg_data *data = f71882fg_update_device(dev);
1327 int nr = to_sensor_dev_attr_2(devattr)->index;
1328 int point = to_sensor_dev_attr_2(devattr)->nr;
1329
1330 mutex_lock(&data->update_lock);
bc27490f
HG		 1331 if (nr & 1)
1332 result = data->pwm_auto_point_hyst[nr / 2] >> 4;
1333 else
1334 result = data->pwm_auto_point_hyst[nr / 2] & 0x0f;
9ab796eb
MD		 1335 result = 1000 * (data->pwm_auto_point_temp[nr][point] - result);
1336 mutex_unlock(&data->update_lock);
1337
1338 return sprintf(buf, "%d\n", result);
1339}
1340
1341static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
1342 struct device_attribute *devattr,
1343 const char *buf, size_t count)
1344{
ce0bfa5e 1345 struct f71882fg_data *data = dev_get_drvdata(dev);
9ab796eb
MD		 1346 int nr = to_sensor_dev_attr_2(devattr)->index;
1347 int point = to_sensor_dev_attr_2(devattr)->nr;
1348 long val = simple_strtol(buf, NULL, 10) / 1000;
bc27490f 1349 u8 reg;
9ab796eb
MD		 1350
1351 mutex_lock(&data->update_lock);
ce0bfa5e
HG		 1352 data->pwm_auto_point_temp[nr][point] =
1353 f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point));
9ab796eb
MD		 1354 val = SENSORS_LIMIT(val, data->pwm_auto_point_temp[nr][point] - 15,
1355 data->pwm_auto_point_temp[nr][point]);
1356 val = data->pwm_auto_point_temp[nr][point] - val;
1357
bc27490f
HG		 1358 reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2));
1359 if (nr & 1)
1360 reg = (reg & 0x0f) | (val << 4);
1361 else
1362 reg = (reg & 0xf0) | val;
1363
1364 f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg);
1365 data->pwm_auto_point_hyst[nr / 2] = reg;
9ab796eb
MD		 1366 mutex_unlock(&data->update_lock);
1367
1368 return count;
1369}
1370
1371static ssize_t show_pwm_interpolate(struct device *dev,
1372 struct device_attribute *devattr, char *buf)
1373{
1374 int result;
1375 struct f71882fg_data *data = f71882fg_update_device(dev);
1376 int nr = to_sensor_dev_attr_2(devattr)->index;
1377
1378 result = (data->pwm_auto_point_mapping[nr] >> 4) & 1;
1379
1380 return sprintf(buf, "%d\n", result);
1381}
1382
1383static ssize_t store_pwm_interpolate(struct device *dev,
1384 struct device_attribute *devattr,
1385 const char *buf, size_t count)
1386{
ce0bfa5e 1387 struct f71882fg_data *data = dev_get_drvdata(dev);
9ab796eb 1388 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e
HG		 1389 unsigned long val = simple_strtoul(buf, NULL, 10);
1390
9ab796eb 1391 mutex_lock(&data->update_lock);
ce0bfa5e
HG		 1392 data->pwm_auto_point_mapping[nr] =
1393 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
9ab796eb
MD		 1394 if (val)
1395 val = data->pwm_auto_point_mapping[nr] | (1 << 4);
1396 else
1397 val = data->pwm_auto_point_mapping[nr] & (~(1 << 4));
1398 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
1399 data->pwm_auto_point_mapping[nr] = val;
1400 mutex_unlock(&data->update_lock);
1401
1402 return count;
1403}
1404
1405static ssize_t show_pwm_auto_point_channel(struct device *dev,
1406 struct device_attribute *devattr,
1407 char *buf)
1408{
1409 int result;
1410 struct f71882fg_data *data = f71882fg_update_device(dev);
1411 int nr = to_sensor_dev_attr_2(devattr)->index;
1412
1413 result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) - 1);
1414
1415 return sprintf(buf, "%d\n", result);
1416}
1417
1418static ssize_t store_pwm_auto_point_channel(struct device *dev,
1419 struct device_attribute *devattr,
1420 const char *buf, size_t count)
1421{
ce0bfa5e 1422 struct f71882fg_data *data = dev_get_drvdata(dev);
9ab796eb
MD		 1423 int nr = to_sensor_dev_attr_2(devattr)->index;
1424 long val = simple_strtol(buf, NULL, 10);
1425 switch (val) {
1426 case 1:
1427 val = 1;
1428 break;
1429 case 2:
1430 val = 2;
1431 break;
1432 case 4:
1433 val = 3;
1434 break;
1435 default:
1436 return -EINVAL;
1437 }
1438 mutex_lock(&data->update_lock);
ce0bfa5e
HG		 1439 data->pwm_auto_point_mapping[nr] =
1440 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
9ab796eb
MD		 1441 val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val;
1442 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
1443 data->pwm_auto_point_mapping[nr] = val;
1444 mutex_unlock(&data->update_lock);
1445
1446 return count;
1447}
1448
1449static ssize_t show_pwm_auto_point_temp(struct device *dev,
1450 struct device_attribute *devattr,
1451 char *buf)
1452{
1453 int result;
1454 struct f71882fg_data *data = f71882fg_update_device(dev);
1455 int pwm = to_sensor_dev_attr_2(devattr)->index;
1456 int point = to_sensor_dev_attr_2(devattr)->nr;
1457
1458 result = data->pwm_auto_point_temp[pwm][point];
1459 return sprintf(buf, "%d\n", 1000 * result);
1460}
1461
1462static ssize_t store_pwm_auto_point_temp(struct device *dev,
1463 struct device_attribute *devattr,
1464 const char *buf, size_t count)
1465{
ce0bfa5e 1466 struct f71882fg_data *data = dev_get_drvdata(dev);
9ab796eb
MD		 1467 int pwm = to_sensor_dev_attr_2(devattr)->index;
1468 int point = to_sensor_dev_attr_2(devattr)->nr;
1469 long val = simple_strtol(buf, NULL, 10) / 1000;
1470 val = SENSORS_LIMIT(val, 0, 255);
1471
1472 mutex_lock(&data->update_lock);
1473 f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val);
1474 data->pwm_auto_point_temp[pwm][point] = val;
1475 mutex_unlock(&data->update_lock);
1476
1477 return count;
1478}
1479
45fb3669
HG		 1480static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
1481 char *buf)
1482{
498be968
HG		 1483 struct f71882fg_data *data = dev_get_drvdata(dev);
1484 return sprintf(buf, "%s\n", f71882fg_names[data->type]);
45fb3669
HG		 1485}
1486
c13548c5
HG		 1487static int __devinit f71882fg_create_sysfs_files(struct platform_device *pdev,
1488 struct sensor_device_attribute_2 *attr, int count)
1489{
1490 int err, i;
1491
1492 for (i = 0; i < count; i++) {
1493 err = device_create_file(&pdev->dev, &attr[i].dev_attr);
1494 if (err)
1495 return err;
1496 }
1497 return 0;
1498}
45fb3669 1499
c13548c5 1500static int __devinit f71882fg_probe(struct platform_device *pdev)
45fb3669
HG		 1501{
1502 struct f71882fg_data *data;
498be968 1503 struct f71882fg_sio_data *sio_data = pdev->dev.platform_data;
c13548c5 1504 int err;
45fb3669
HG		 1505 u8 start_reg;
1506
c13548c5
HG		 1507 data = kzalloc(sizeof(struct f71882fg_data), GFP_KERNEL);
1508 if (!data)
45fb3669
HG		 1509 return -ENOMEM;
1510
1511 data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
498be968 1512 data->type = sio_data->type;
45fb3669
HG		 1513 mutex_init(&data->update_lock);
1514 platform_set_drvdata(pdev, data);
1515
3cc74758 1516 start_reg = f71882fg_read8(data, F71882FG_REG_START);
12d66e84
HG		 1517 if (start_reg & 0x04) {
1518 dev_warn(&pdev->dev, "Hardware monitor is powered down\n");
1519 err = -ENODEV;
1520 goto exit_free;
1521 }
3cc74758
HG		 1522 if (!(start_reg & 0x03)) {
1523 dev_warn(&pdev->dev, "Hardware monitoring not activated\n");
1524 err = -ENODEV;
1525 goto exit_free;
1526 }
1527
1528 /* If it is a 71862 and the fan / pwm part is enabled sanity check
1529 the pwm settings */
1530 if (data->type == f71862fg && (start_reg & 0x02)) {
1531 u8 reg = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
1532 if ((reg & 0x15) != 0x15) {
1533 dev_err(&pdev->dev,
1534 "Invalid (reserved) pwm settings: 0x%02x\n",
1535 (unsigned int)reg);
1536 err = -ENODEV;
1537 goto exit_free;
1538 }
1539 }
1540
45fb3669 1541 /* Register sysfs interface files */
c13548c5
HG		 1542 err = device_create_file(&pdev->dev, &dev_attr_name);
1543 if (err)
1544 goto exit_unregister_sysfs;
45fb3669 1545
45fb3669 1546 if (start_reg & 0x01) {
498be968
HG		 1547 err = f71882fg_create_sysfs_files(pdev, f718x2fg_in_temp_attr,
1548 ARRAY_SIZE(f718x2fg_in_temp_attr));
c13548c5
HG		 1549 if (err)
1550 goto exit_unregister_sysfs;
498be968
HG		 1551
1552 if (data->type == f71882fg) {
1553 err = f71882fg_create_sysfs_files(pdev,
1554 f71882fg_in_temp_attr,
1555 ARRAY_SIZE(f71882fg_in_temp_attr));
1556 if (err)
1557 goto exit_unregister_sysfs;
1558 }
45fb3669
HG		 1559 }
1560
1561 if (start_reg & 0x02) {
498be968
HG		 1562 err = f71882fg_create_sysfs_files(pdev, f718x2fg_fan_attr,
1563 ARRAY_SIZE(f718x2fg_fan_attr));
1564 if (err)
1565 goto exit_unregister_sysfs;
1566
1567 if (data->type == f71862fg) {
1568 err = f71882fg_create_sysfs_files(pdev,
1569 f71862fg_fan_attr,
1570 ARRAY_SIZE(f71862fg_fan_attr));
1571 } else {
1572 err = f71882fg_create_sysfs_files(pdev,
1573 f71882fg_fan_attr,
c13548c5 1574 ARRAY_SIZE(f71882fg_fan_attr));
498be968 1575 }
c13548c5
HG		 1576 if (err)
1577 goto exit_unregister_sysfs;
45fb3669
HG		 1578 }
1579
1beeffe4
TJ		 1580 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1581 if (IS_ERR(data->hwmon_dev)) {
1582 err = PTR_ERR(data->hwmon_dev);
c13548c5 1583 data->hwmon_dev = NULL;
45fb3669
HG		 1584 goto exit_unregister_sysfs;
1585 }
1586
1587 return 0;
1588
1589exit_unregister_sysfs:
c13548c5 1590 f71882fg_remove(pdev); /* Will unregister the sysfs files for us */
3cc74758
HG		 1591 return err; /* f71882fg_remove() also frees our data */
1592exit_free:
1593 kfree(data);
45fb3669
HG		 1594 return err;
1595}
1596
c13548c5 1597static int f71882fg_remove(struct platform_device *pdev)
45fb3669
HG		 1598{
1599 int i;
1600 struct f71882fg_data *data = platform_get_drvdata(pdev);
1601
1602 platform_set_drvdata(pdev, NULL);
c13548c5
HG		 1603 if (data->hwmon_dev)
1604 hwmon_device_unregister(data->hwmon_dev);
45fb3669 1605
c13548c5 1606 device_remove_file(&pdev->dev, &dev_attr_name);
45fb3669 1607
498be968
HG		 1608 for (i = 0; i < ARRAY_SIZE(f718x2fg_in_temp_attr); i++)
1609 device_remove_file(&pdev->dev,
1610 &f718x2fg_in_temp_attr[i].dev_attr);
1611
45fb3669
HG		 1612 for (i = 0; i < ARRAY_SIZE(f71882fg_in_temp_attr); i++)
1613 device_remove_file(&pdev->dev,
1614 &f71882fg_in_temp_attr[i].dev_attr);
1615
498be968
HG		 1616 for (i = 0; i < ARRAY_SIZE(f718x2fg_fan_attr); i++)
1617 device_remove_file(&pdev->dev, &f718x2fg_fan_attr[i].dev_attr);
1618
1619 for (i = 0; i < ARRAY_SIZE(f71862fg_fan_attr); i++)
1620 device_remove_file(&pdev->dev, &f71862fg_fan_attr[i].dev_attr);
1621
45fb3669
HG		 1622 for (i = 0; i < ARRAY_SIZE(f71882fg_fan_attr); i++)
1623 device_remove_file(&pdev->dev, &f71882fg_fan_attr[i].dev_attr);
1624
1625 kfree(data);
1626
1627 return 0;
1628}
1629
498be968
HG		 1630static int __init f71882fg_find(int sioaddr, unsigned short *address,
1631 struct f71882fg_sio_data *sio_data)
45fb3669
HG		 1632{
1633 int err = -ENODEV;
1634 u16 devid;
45fb3669
HG		 1635
1636 superio_enter(sioaddr);
1637
1638 devid = superio_inw(sioaddr, SIO_REG_MANID);
1639 if (devid != SIO_FINTEK_ID) {
1640 printk(KERN_INFO DRVNAME ": Not a Fintek device\n");
1641 goto exit;
1642 }
1643
67b671bc 1644 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
498be968
HG		 1645 switch (devid) {
1646 case SIO_F71862_ID:
1647 sio_data->type = f71862fg;
1648 break;
1649 case SIO_F71882_ID:
1650 sio_data->type = f71882fg;
1651 break;
1652 default:
45fb3669
HG		 1653 printk(KERN_INFO DRVNAME ": Unsupported Fintek device\n");
1654 goto exit;
1655 }
1656
1657 superio_select(sioaddr, SIO_F71882FG_LD_HWM);
8afb1049 1658 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
45fb3669
HG		 1659 printk(KERN_WARNING DRVNAME ": Device not activated\n");
1660 goto exit;
1661 }
1662
1663 *address = superio_inw(sioaddr, SIO_REG_ADDR);
1664 if (*address == 0)
1665 {
1666 printk(KERN_WARNING DRVNAME ": Base address not set\n");
1667 goto exit;
1668 }
1669 *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
1670
45fb3669 1671 err = 0;
498be968
HG		 1672 printk(KERN_INFO DRVNAME ": Found %s chip at %#x, revision %d\n",
1673 f71882fg_names[sio_data->type], (unsigned int)*address,
45fb3669
HG		 1674 (int)superio_inb(sioaddr, SIO_REG_DEVREV));
1675exit:
1676 superio_exit(sioaddr);
1677 return err;
1678}
1679
498be968
HG		 1680static int __init f71882fg_device_add(unsigned short address,
1681 const struct f71882fg_sio_data *sio_data)
45fb3669
HG		 1682{
1683 struct resource res = {
1684 .start = address,
1685 .end = address + REGION_LENGTH - 1,
1686 .flags = IORESOURCE_IO,
1687 };
1688 int err;
1689
1690 f71882fg_pdev = platform_device_alloc(DRVNAME, address);
8afb1049 1691 if (!f71882fg_pdev)
45fb3669
HG		 1692 return -ENOMEM;
1693
1694 res.name = f71882fg_pdev->name;
1695 err = platform_device_add_resources(f71882fg_pdev, &res, 1);
8afb1049 1696 if (err) {
45fb3669
HG		 1697 printk(KERN_ERR DRVNAME ": Device resource addition failed\n");
1698 goto exit_device_put;
1699 }
1700
498be968
HG		 1701 err = platform_device_add_data(f71882fg_pdev, sio_data,
1702 sizeof(struct f71882fg_sio_data));
1703 if (err) {
1704 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1705 goto exit_device_put;
1706 }
1707
45fb3669 1708 err = platform_device_add(f71882fg_pdev);
8afb1049 1709 if (err) {
45fb3669
HG		 1710 printk(KERN_ERR DRVNAME ": Device addition failed\n");
1711 goto exit_device_put;
1712 }
1713
1714 return 0;
1715
1716exit_device_put:
1717 platform_device_put(f71882fg_pdev);
1718
1719 return err;
1720}
1721
1722static int __init f71882fg_init(void)
1723{
1724 int err = -ENODEV;
1725 unsigned short address;
498be968
HG		 1726 struct f71882fg_sio_data sio_data;
1727
1728 memset(&sio_data, 0, sizeof(sio_data));
45fb3669 1729
498be968
HG		 1730 if (f71882fg_find(0x2e, &address, &sio_data) &&
1731 f71882fg_find(0x4e, &address, &sio_data))
45fb3669
HG		 1732 goto exit;
1733
c13548c5
HG		 1734 err = platform_driver_register(&f71882fg_driver);
1735 if (err)
45fb3669
HG		 1736 goto exit;
1737
498be968 1738 err = f71882fg_device_add(address, &sio_data);
c13548c5 1739 if (err)
45fb3669
HG		 1740 goto exit_driver;
1741
1742 return 0;
1743
1744exit_driver:
1745 platform_driver_unregister(&f71882fg_driver);
1746exit:
1747 return err;
1748}
1749
1750static void __exit f71882fg_exit(void)
1751{
1752 platform_device_unregister(f71882fg_pdev);
1753 platform_driver_unregister(&f71882fg_driver);
1754}
1755
1756MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver");
c13548c5 1757MODULE_AUTHOR("Hans Edgington, Hans de Goede (hdegoede@redhat.com)");
45fb3669
HG		 1758MODULE_LICENSE("GPL");
1759
1760module_init(f71882fg_init);
1761module_exit(f71882fg_exit);
Linux 6.x block layer and io_uring tree(s)