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Merge tag 'driver-core-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-block.git] / drivers / hwmon / f71882fg.c
CommitLineData
1a59d1b8 1// SPDX-License-Identifier: GPL-2.0-or-later
45fb3669
HG		 2/***************************************************************************
3 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
44c4dc52 4 * Copyright (C) 2007-2011 Hans de Goede <hdegoede@redhat.com> *
45fb3669 5 * *
45fb3669
HG		 6 ***************************************************************************/
7
22d3b412
JP		 8#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9
45fb3669
HG		 10#include <linux/module.h>
11#include <linux/init.h>
12#include <linux/slab.h>
13#include <linux/jiffies.h>
14#include <linux/platform_device.h>
15#include <linux/hwmon.h>
16#include <linux/hwmon-sysfs.h>
17#include <linux/err.h>
18#include <linux/mutex.h>
77a4a3e2 19#include <linux/io.h>
b9acb64a 20#include <linux/acpi.h>
45fb3669
HG		 21
22#define DRVNAME "f71882fg"
23
09475d32 24#define SIO_F71858FG_LD_HWM 0x02 /* Hardware monitor logical device */
77a4a3e2 25#define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
45fb3669 26#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
14a4019d 27#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
45fb3669
HG		 28
29#define SIO_REG_LDSEL 0x07 /* Logical device select */
30#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
31#define SIO_REG_DEVREV 0x22 /* Device revision */
32#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
33#define SIO_REG_ENABLE 0x30 /* Logical device enable */
34#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
35
36#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
e5e713cb 37#define SIO_F71808E_ID 0x0901 /* Chipset ID */
629c58ba 38#define SIO_F71808A_ID 0x1001 /* Chipset ID */
09475d32 39#define SIO_F71858_ID 0x0507 /* Chipset ID */
498be968 40#define SIO_F71862_ID 0x0601 /* Chipset ID */
2725fe2b 41#define SIO_F71868_ID 0x1106 /* Chipset ID */
c11bb993 42#define SIO_F71869_ID 0x0814 /* Chipset ID */
5da556e3 43#define SIO_F71869A_ID 0x1007 /* Chipset ID */
45fb3669 44#define SIO_F71882_ID 0x0541 /* Chipset ID */
7669896f 45#define SIO_F71889_ID 0x0723 /* Chipset ID */
3cad4022 46#define SIO_F71889E_ID 0x0909 /* Chipset ID */
a66c1088 47#define SIO_F71889A_ID 0x1005 /* Chipset ID */
ed4f7c20 48#define SIO_F8000_ID 0x0581 /* Chipset ID */
d8363bb5 49#define SIO_F81768D_ID 0x1210 /* Chipset ID */
383586b1 50#define SIO_F81865_ID 0x0704 /* Chipset ID */
2725fe2b 51#define SIO_F81866_ID 0x1010 /* Chipset ID */
739743ec 52#define SIO_F71858AD_ID 0x0903 /* Chipset ID */
df293076 53#define SIO_F81966_ID 0x1502 /* Chipset ID */
45fb3669
HG		 54
55#define REGION_LENGTH 8
56#define ADDR_REG_OFFSET 5
57#define DATA_REG_OFFSET 6
58
3cad4022
HG		 59#define F71882FG_REG_IN_STATUS 0x12 /* f7188x only */
60#define F71882FG_REG_IN_BEEP 0x13 /* f7188x only */
45fb3669 61#define F71882FG_REG_IN(nr) (0x20 + (nr))
3cad4022 62#define F71882FG_REG_IN1_HIGH 0x32 /* f7188x only */
45fb3669 63
3e40b860
PH		 64#define F81866_REG_IN_STATUS 0x16 /* F81866 only */
65#define F81866_REG_IN_BEEP 0x17 /* F81866 only */
66#define F81866_REG_IN1_HIGH 0x3a /* F81866 only */
67
45fb3669 68#define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr)))
9ab796eb
MD		 69#define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr)))
70#define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr)))
45fb3669
HG		 71#define F71882FG_REG_FAN_STATUS 0x92
72#define F71882FG_REG_FAN_BEEP 0x93
73
7567a043
HG		 74#define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr))
75#define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr))
76#define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
45fb3669
HG		 77#define F71882FG_REG_TEMP_STATUS 0x62
78#define F71882FG_REG_TEMP_BEEP 0x63
09475d32 79#define F71882FG_REG_TEMP_CONFIG 0x69
bc27490f 80#define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr))
45fb3669
HG		 81#define F71882FG_REG_TEMP_TYPE 0x6B
82#define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
83
9ab796eb
MD		 84#define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr)))
85#define F71882FG_REG_PWM_TYPE 0x94
86#define F71882FG_REG_PWM_ENABLE 0x96
87
bc27490f 88#define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr))
9ab796eb 89
98f7ba19
HG		 90#define F71882FG_REG_FAN_FAULT_T 0x9F
91#define F71882FG_FAN_NEG_TEMP_EN 0x20
3cad4022 92#define F71882FG_FAN_PROG_SEL 0x80
98f7ba19 93
9ab796eb
MD		 94#define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm)))
95#define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm)))
96#define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr))
97
45fb3669
HG		 98#define F71882FG_REG_START 0x01
99
d8363bb5 100#define F71882FG_MAX_INS 11
0bae6400 101
45fb3669
HG		 102#define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */
103
67b671bc
JD		 104static unsigned short force_id;
105module_param(force_id, ushort, 0);
106MODULE_PARM_DESC(force_id, "Override the detected device ID");
107
2725fe2b 108enum chips { f71808e, f71808a, f71858fg, f71862fg, f71868a, f71869, f71869a,
d8363bb5
GJ		 109 f71882fg, f71889fg, f71889ed, f71889a, f8000, f81768d, f81865f,
110 f81866a};
498be968 111
1dc37089 112static const char *const f71882fg_names[] = {
e5e713cb 113 "f71808e",
629c58ba 114 "f71808a",
09475d32 115 "f71858fg",
498be968 116 "f71862fg",
2725fe2b 117 "f71868a",
c11bb993 118 "f71869", /* Both f71869f and f71869e, reg. compatible and same id */
5da556e3 119 "f71869a",
498be968 120 "f71882fg",
5d7f77bf 121 "f71889fg", /* f81801u too, same id */
3cad4022 122 "f71889ed",
a66c1088 123 "f71889a",
ed4f7c20 124 "f8000",
d8363bb5 125 "f81768d",
383586b1 126 "f81865f",
2725fe2b 127 "f81866a",
498be968
HG		 128};
129
2740c60c 130static const char f71882fg_has_in[][F71882FG_MAX_INS] = {
d8363bb5
GJ		 131 [f71808e] = { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0 },
132 [f71808a] = { 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0 },
133 [f71858fg] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 },
134 [f71862fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
135 [f71868a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0 },
136 [f71869] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
137 [f71869a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
138 [f71882fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
139 [f71889fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
140 [f71889ed] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
141 [f71889a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
142 [f8000] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 },
143 [f81768d] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 },
144 [f81865f] = { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 },
145 [f81866a] = { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0 },
0bae6400
HG		 146};
147
2740c60c
JD		 148static const char f71882fg_has_in1_alarm[] = {
149 [f71808e] = 0,
629c58ba 150 [f71808a] = 0,
2740c60c
JD		 151 [f71858fg] = 0,
152 [f71862fg] = 0,
2725fe2b 153 [f71868a] = 0,
2740c60c 154 [f71869] = 0,
5da556e3 155 [f71869a] = 0,
2740c60c
JD		 156 [f71882fg] = 1,
157 [f71889fg] = 1,
158 [f71889ed] = 1,
a66c1088 159 [f71889a] = 1,
2740c60c 160 [f8000] = 0,
d8363bb5 161 [f81768d] = 1,
383586b1 162 [f81865f] = 1,
2725fe2b 163 [f81866a] = 1,
0bae6400
HG		 164};
165
4d53811a 166static const char f71882fg_fan_has_beep[] = {
2740c60c 167 [f71808e] = 0,
629c58ba 168 [f71808a] = 0,
2740c60c
JD		 169 [f71858fg] = 0,
170 [f71862fg] = 1,
2725fe2b 171 [f71868a] = 1,
2740c60c 172 [f71869] = 1,
5da556e3 173 [f71869a] = 1,
2740c60c
JD		 174 [f71882fg] = 1,
175 [f71889fg] = 1,
176 [f71889ed] = 1,
a66c1088 177 [f71889a] = 1,
2740c60c 178 [f8000] = 0,
d8363bb5 179 [f81768d] = 1,
383586b1 180 [f81865f] = 1,
2725fe2b 181 [f81866a] = 1,
78aa4f72
HG		 182};
183
f27def07
JD		 184static const char f71882fg_nr_fans[] = {
185 [f71808e] = 3,
629c58ba 186 [f71808a] = 2, /* +1 fan which is monitor + simple pwm only */
f27def07
JD		 187 [f71858fg] = 3,
188 [f71862fg] = 3,
2725fe2b 189 [f71868a] = 3,
f27def07 190 [f71869] = 3,
5da556e3 191 [f71869a] = 3,
f27def07
JD		 192 [f71882fg] = 4,
193 [f71889fg] = 3,
194 [f71889ed] = 3,
a66c1088 195 [f71889a] = 3,
629c58ba 196 [f8000] = 3, /* +1 fan which is monitor only */
d8363bb5 197 [f81768d] = 3,
383586b1 198 [f81865f] = 2,
2725fe2b 199 [f81866a] = 3,
f27def07
JD		 200};
201
4d53811a
HG		 202static const char f71882fg_temp_has_beep[] = {
203 [f71808e] = 0,
629c58ba 204 [f71808a] = 1,
4d53811a
HG		 205 [f71858fg] = 0,
206 [f71862fg] = 1,
2725fe2b 207 [f71868a] = 1,
4d53811a 208 [f71869] = 1,
5da556e3 209 [f71869a] = 1,
4d53811a
HG		 210 [f71882fg] = 1,
211 [f71889fg] = 1,
212 [f71889ed] = 1,
213 [f71889a] = 1,
214 [f8000] = 0,
d8363bb5 215 [f81768d] = 1,
4d53811a 216 [f81865f] = 1,
2725fe2b 217 [f81866a] = 1,
4d53811a
HG		 218};
219
f27def07
JD		 220static const char f71882fg_nr_temps[] = {
221 [f71808e] = 2,
629c58ba 222 [f71808a] = 2,
f27def07
JD		 223 [f71858fg] = 3,
224 [f71862fg] = 3,
2725fe2b 225 [f71868a] = 3,
f27def07 226 [f71869] = 3,
5da556e3 227 [f71869a] = 3,
f27def07
JD		 228 [f71882fg] = 3,
229 [f71889fg] = 3,
230 [f71889ed] = 3,
a66c1088 231 [f71889a] = 3,
f27def07 232 [f8000] = 3,
d8363bb5 233 [f81768d] = 3,
383586b1 234 [f81865f] = 2,
2725fe2b 235 [f81866a] = 3,
f27def07
JD		 236};
237
77a4a3e2 238static struct platform_device *f71882fg_pdev;
45fb3669 239
498be968
HG		 240struct f71882fg_sio_data {
241 enum chips type;
242};
243
45fb3669
HG		 244struct f71882fg_data {
245 unsigned short addr;
498be968 246 enum chips type;
1beeffe4 247 struct device *hwmon_dev;
45fb3669
HG		 248
249 struct mutex update_lock;
09475d32 250 int temp_start; /* temp numbering start (0 or 1) */
952a11ca 251 bool valid; /* true if following fields are valid */
98f7ba19 252 char auto_point_temp_signed;
45fb3669
HG		 253 unsigned long last_updated; /* In jiffies */
254 unsigned long last_limits; /* In jiffies */
255
256 /* Register Values */
0bae6400 257 u8 in[F71882FG_MAX_INS];
45fb3669
HG		 258 u8 in1_max;
259 u8 in_status;
260 u8 in_beep;
261 u16 fan[4];
9ab796eb
MD		 262 u16 fan_target[4];
263 u16 fan_full_speed[4];
45fb3669
HG		 264 u8 fan_status;
265 u8 fan_beep;
20eaf724
GR		 266 /*
267 * Note: all models have max 3 temperature channels, but on some
268 * they are addressed as 0-2 and on others as 1-3, so for coding
269 * convenience we reserve space for 4 channels
270 */
09475d32 271 u16 temp[4];
7567a043
HG		 272 u8 temp_ovt[4];
273 u8 temp_high[4];
bc27490f 274 u8 temp_hyst[2]; /* 2 hysts stored per reg */
7567a043 275 u8 temp_type[4];
45fb3669
HG		 276 u8 temp_status;
277 u8 temp_beep;
278 u8 temp_diode_open;
09475d32 279 u8 temp_config;
9ab796eb
MD		 280 u8 pwm[4];
281 u8 pwm_enable;
282 u8 pwm_auto_point_hyst[2];
283 u8 pwm_auto_point_mapping[4];
284 u8 pwm_auto_point_pwm[4][5];
7669896f 285 s8 pwm_auto_point_temp[4][4];
45fb3669
HG		 286};
287
df9ec2da
UKK		 288static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg)
289{
290 u8 val;
45fb3669 291
df9ec2da
UKK		 292 outb(reg, data->addr + ADDR_REG_OFFSET);
293 val = inb(data->addr + DATA_REG_OFFSET);
45fb3669 294
df9ec2da
UKK		 295 return val;
296}
45fb3669 297
df9ec2da
UKK		 298static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg)
299{
300 u16 val;
45fb3669 301
df9ec2da
UKK		 302 val = f71882fg_read8(data, reg) << 8;
303 val |= f71882fg_read8(data, reg + 1);
09475d32 304
df9ec2da
UKK		 305 return val;
306}
45fb3669 307
df9ec2da
UKK		 308static inline int fan_from_reg(u16 reg)
309{
310 return reg ? (1500000 / reg) : 0;
311}
78aa4f72 312
df9ec2da
UKK		 313static inline u16 fan_to_reg(int fan)
314{
315 return fan ? (1500000 / fan) : 0;
316}
dcd956fc 317
df9ec2da
UKK		 318static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val)
319{
320 outb(reg, data->addr + ADDR_REG_OFFSET);
321 outb(val, data->addr + DATA_REG_OFFSET);
322}
ed4f7c20 323
df9ec2da
UKK		 324static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val)
325{
326 f71882fg_write8(data, reg, val >> 8);
327 f71882fg_write8(data, reg + 1, val & 0xff);
328}
0bae6400 329
df9ec2da
UKK		 330static u16 f71882fg_read_temp(struct f71882fg_data *data, int nr)
331{
332 if (data->type == f71858fg)
333 return f71882fg_read16(data, F71882FG_REG_TEMP(nr));
334 else
335 return f71882fg_read8(data, F71882FG_REG_TEMP(nr));
336}
0bae6400 337
df9ec2da
UKK		 338static struct f71882fg_data *f71882fg_update_device(struct device *dev)
339{
340 struct f71882fg_data *data = dev_get_drvdata(dev);
341 int nr_fans = f71882fg_nr_fans[data->type];
342 int nr_temps = f71882fg_nr_temps[data->type];
343 int nr, reg, point;
498be968 344
df9ec2da 345 mutex_lock(&data->update_lock);
629c58ba 346
df9ec2da
UKK		 347 /* Update once every 60 seconds */
348 if (time_after(jiffies, data->last_limits + 60 * HZ) ||
349 !data->valid) {
350 if (f71882fg_has_in1_alarm[data->type]) {
351 if (data->type == f81866a) {
352 data->in1_max =
353 f71882fg_read8(data,
354 F81866_REG_IN1_HIGH);
355 data->in_beep =
356 f71882fg_read8(data,
357 F81866_REG_IN_BEEP);
358 } else {
359 data->in1_max =
360 f71882fg_read8(data,
361 F71882FG_REG_IN1_HIGH);
362 data->in_beep =
363 f71882fg_read8(data,
364 F71882FG_REG_IN_BEEP);
365 }
366 }
ed4f7c20 367
df9ec2da
UKK		 368 /* Get High & boundary temps*/
369 for (nr = data->temp_start; nr < nr_temps + data->temp_start;
370 nr++) {
371 data->temp_ovt[nr] = f71882fg_read8(data,
372 F71882FG_REG_TEMP_OVT(nr));
373 data->temp_high[nr] = f71882fg_read8(data,
374 F71882FG_REG_TEMP_HIGH(nr));
375 }
498be968 376
df9ec2da
UKK		 377 if (data->type != f8000) {
378 data->temp_hyst[0] = f71882fg_read8(data,
379 F71882FG_REG_TEMP_HYST(0));
380 data->temp_hyst[1] = f71882fg_read8(data,
381 F71882FG_REG_TEMP_HYST(1));
382 }
383 /* All but the f71858fg / f8000 have this register */
384 if ((data->type != f71858fg) && (data->type != f8000)) {
385 reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
386 data->temp_type[1] = (reg & 0x02) ? 2 : 4;
387 data->temp_type[2] = (reg & 0x04) ? 2 : 4;
388 data->temp_type[3] = (reg & 0x08) ? 2 : 4;
389 }
c11bb993 390
df9ec2da
UKK		 391 if (f71882fg_fan_has_beep[data->type])
392 data->fan_beep = f71882fg_read8(data,
393 F71882FG_REG_FAN_BEEP);
45fb3669 394
df9ec2da
UKK		 395 if (f71882fg_temp_has_beep[data->type])
396 data->temp_beep = f71882fg_read8(data,
397 F71882FG_REG_TEMP_BEEP);
45fb3669 398
9ab796eb
MD		 399 data->pwm_enable = f71882fg_read8(data,
400 F71882FG_REG_PWM_ENABLE);
bc27490f
HG		 401 data->pwm_auto_point_hyst[0] =
402 f71882fg_read8(data, F71882FG_REG_FAN_HYST(0));
403 data->pwm_auto_point_hyst[1] =
404 f71882fg_read8(data, F71882FG_REG_FAN_HYST(1));
405
498be968 406 for (nr = 0; nr < nr_fans; nr++) {
9ab796eb
MD		 407 data->pwm_auto_point_mapping[nr] =
408 f71882fg_read8(data,
409 F71882FG_REG_POINT_MAPPING(nr));
410
e5e713cb
HG		 411 switch (data->type) {
412 default:
498be968
HG		 413 for (point = 0; point < 5; point++) {
414 data->pwm_auto_point_pwm[nr][point] =
415 f71882fg_read8(data,
416 F71882FG_REG_POINT_PWM
417 (nr, point));
418 }
419 for (point = 0; point < 4; point++) {
420 data->pwm_auto_point_temp[nr][point] =
421 f71882fg_read8(data,
422 F71882FG_REG_POINT_TEMP
423 (nr, point));
424 }
e5e713cb
HG		 425 break;
426 case f71808e:
427 case f71869:
428 data->pwm_auto_point_pwm[nr][0] =
429 f71882fg_read8(data,
430 F71882FG_REG_POINT_PWM(nr, 0));
df561f66 431 fallthrough;
e5e713cb 432 case f71862fg:
498be968
HG		 433 data->pwm_auto_point_pwm[nr][1] =
434 f71882fg_read8(data,
435 F71882FG_REG_POINT_PWM
436 (nr, 1));
437 data->pwm_auto_point_pwm[nr][4] =
438 f71882fg_read8(data,
439 F71882FG_REG_POINT_PWM
440 (nr, 4));
441 data->pwm_auto_point_temp[nr][0] =
442 f71882fg_read8(data,
443 F71882FG_REG_POINT_TEMP
444 (nr, 0));
445 data->pwm_auto_point_temp[nr][3] =
446 f71882fg_read8(data,
447 F71882FG_REG_POINT_TEMP
448 (nr, 3));
e5e713cb 449 break;
9ab796eb
MD		 450 }
451 }
45fb3669
HG		 452 data->last_limits = jiffies;
453 }
454
455 /* Update every second */
8afb1049 456 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
45fb3669
HG		 457 data->temp_status = f71882fg_read8(data,
458 F71882FG_REG_TEMP_STATUS);
459 data->temp_diode_open = f71882fg_read8(data,
460 F71882FG_REG_TEMP_DIODE_OPEN);
e5e713cb
HG		 461 for (nr = data->temp_start; nr < nr_temps + data->temp_start;
462 nr++)
09475d32 463 data->temp[nr] = f71882fg_read_temp(data, nr);
45fb3669
HG		 464
465 data->fan_status = f71882fg_read8(data,
466 F71882FG_REG_FAN_STATUS);
498be968 467 for (nr = 0; nr < nr_fans; nr++) {
45fb3669
HG		 468 data->fan[nr] = f71882fg_read16(data,
469 F71882FG_REG_FAN(nr));
9ab796eb
MD		 470 data->fan_target[nr] =
471 f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr));
472 data->fan_full_speed[nr] =
473 f71882fg_read16(data,
474 F71882FG_REG_FAN_FULL_SPEED(nr));
475 data->pwm[nr] =
476 f71882fg_read8(data, F71882FG_REG_PWM(nr));
477 }
629c58ba
HG		 478 /* Some models have 1 more fan with limited capabilities */
479 if (data->type == f71808a) {
480 data->fan[2] = f71882fg_read16(data,
481 F71882FG_REG_FAN(2));
482 data->pwm[2] = f71882fg_read8(data,
483 F71882FG_REG_PWM(2));
484 }
ed4f7c20
HG		 485 if (data->type == f8000)
486 data->fan[3] = f71882fg_read16(data,
487 F71882FG_REG_FAN(3));
0bae6400 488
3e40b860
PH		 489 if (f71882fg_has_in1_alarm[data->type]) {
490 if (data->type == f81866a)
491 data->in_status = f71882fg_read8(data,
492 F81866_REG_IN_STATUS);
493
494 else
495 data->in_status = f71882fg_read8(data,
45fb3669 496 F71882FG_REG_IN_STATUS);
3e40b860
PH		 497 }
498
0bae6400
HG		 499 for (nr = 0; nr < F71882FG_MAX_INS; nr++)
500 if (f71882fg_has_in[data->type][nr])
501 data->in[nr] = f71882fg_read8(data,
502 F71882FG_REG_IN(nr));
45fb3669
HG		 503
504 data->last_updated = jiffies;
952a11ca 505 data->valid = true;
45fb3669
HG		 506 }
507
508 mutex_unlock(&data->update_lock);
509
510 return data;
511}
512
df9ec2da
UKK		 513static ssize_t name_show(struct device *dev, struct device_attribute *devattr,
514 char *buf)
515{
516 struct f71882fg_data *data = dev_get_drvdata(dev);
517 return sprintf(buf, "%s\n", f71882fg_names[data->type]);
518}
519
520static DEVICE_ATTR_RO(name);
521
522static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
45fb3669
HG		 523 char *buf)
524{
525 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 526 int nr = to_sensor_dev_attr_2(devattr)->index;
df9ec2da 527 int sign, temp;
45fb3669 528
df9ec2da
UKK		 529 if (data->type == f71858fg) {
530 /* TEMP_TABLE_SEL 1 or 3 ? */
531 if (data->temp_config & 1) {
532 sign = data->temp[nr] & 0x0001;
533 temp = (data->temp[nr] >> 5) & 0x7ff;
534 } else {
535 sign = data->temp[nr] & 0x8000;
536 temp = (data->temp[nr] >> 5) & 0x3ff;
537 }
538 temp *= 125;
539 if (sign)
540 temp -= 128000;
541 } else {
542 temp = ((s8)data->temp[nr]) * 1000;
543 }
45fb3669 544
df9ec2da 545 return sprintf(buf, "%d\n", temp);
45fb3669
HG		 546}
547
df9ec2da
UKK		 548static ssize_t show_temp_max(struct device *dev, struct device_attribute
549 *devattr, char *buf)
45fb3669
HG		 550{
551 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 552 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 553
554 return sprintf(buf, "%d\n", data->temp_high[nr] * 1000);
555}
556
557static ssize_t store_temp_max(struct device *dev, struct device_attribute
558 *devattr, const char *buf, size_t count)
559{
560 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS		 561 int err, nr = to_sensor_dev_attr_2(devattr)->index;
562 long val;
563
179c4fdb 564 err = kstrtol(buf, 10, &val);
e8a4eaca
GS		 565 if (err)
566 return err;
567
568 val /= 1000;
2a844c14 569 val = clamp_val(val, 0, 255);
45fb3669
HG		 570
571 mutex_lock(&data->update_lock);
572 f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val);
573 data->temp_high[nr] = val;
574 mutex_unlock(&data->update_lock);
575
576 return count;
577}
578
579static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
580 *devattr, char *buf)
581{
582 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 583 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 584 int temp_max_hyst;
45fb3669 585
ce0bfa5e 586 mutex_lock(&data->update_lock);
bc27490f
HG		 587 if (nr & 1)
588 temp_max_hyst = data->temp_hyst[nr / 2] >> 4;
589 else
590 temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f;
591 temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000;
ce0bfa5e
HG		 592 mutex_unlock(&data->update_lock);
593
594 return sprintf(buf, "%d\n", temp_max_hyst);
45fb3669
HG		 595}
596
597static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
598 *devattr, const char *buf, size_t count)
599{
600 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca 601 int err, nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 602 ssize_t ret = count;
ce0bfa5e 603 u8 reg;
e8a4eaca
GS		 604 long val;
605
179c4fdb 606 err = kstrtol(buf, 10, &val);
e8a4eaca
GS		 607 if (err)
608 return err;
609
610 val /= 1000;
45fb3669
HG		 611
612 mutex_lock(&data->update_lock);
613
614 /* convert abs to relative and check */
ce0bfa5e 615 data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr));
2a844c14 616 val = clamp_val(val, data->temp_high[nr] - 15, data->temp_high[nr]);
45fb3669 617 val = data->temp_high[nr] - val;
45fb3669
HG		 618
619 /* convert value to register contents */
bc27490f
HG		 620 reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2));
621 if (nr & 1)
622 reg = (reg & 0x0f) | (val << 4);
623 else
624 reg = (reg & 0xf0) | val;
625 f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg);
626 data->temp_hyst[nr / 2] = reg;
45fb3669 627
45fb3669
HG		 628 mutex_unlock(&data->update_lock);
629 return ret;
630}
631
df9ec2da
UKK		 632static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
633 *devattr, char *buf)
634{
635 struct f71882fg_data *data = f71882fg_update_device(dev);
636 int nr = to_sensor_dev_attr_2(devattr)->index;
637
638 if (data->temp_status & (1 << nr))
639 return sprintf(buf, "1\n");
640 else
641 return sprintf(buf, "0\n");
642}
643
45fb3669
HG		 644static ssize_t show_temp_crit(struct device *dev, struct device_attribute
645 *devattr, char *buf)
646{
647 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 648 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669
HG		 649
650 return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000);
651}
652
653static ssize_t store_temp_crit(struct device *dev, struct device_attribute
654 *devattr, const char *buf, size_t count)
655{
656 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS		 657 int err, nr = to_sensor_dev_attr_2(devattr)->index;
658 long val;
659
179c4fdb 660 err = kstrtol(buf, 10, &val);
e8a4eaca
GS		 661 if (err)
662 return err;
663
664 val /= 1000;
2a844c14 665 val = clamp_val(val, 0, 255);
45fb3669
HG		 666
667 mutex_lock(&data->update_lock);
668 f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val);
669 data->temp_ovt[nr] = val;
670 mutex_unlock(&data->update_lock);
671
672 return count;
673}
674
675static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
676 *devattr, char *buf)
677{
678 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 679 int nr = to_sensor_dev_attr_2(devattr)->index;
ce0bfa5e 680 int temp_crit_hyst;
45fb3669 681
ce0bfa5e 682 mutex_lock(&data->update_lock);
bc27490f
HG		 683 if (nr & 1)
684 temp_crit_hyst = data->temp_hyst[nr / 2] >> 4;
685 else
686 temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f;
687 temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000;
ce0bfa5e
HG		 688 mutex_unlock(&data->update_lock);
689
690 return sprintf(buf, "%d\n", temp_crit_hyst);
45fb3669
HG		 691}
692
df9ec2da 693static ssize_t show_temp_fault(struct device *dev, struct device_attribute
45fb3669
HG		 694 *devattr, char *buf)
695{
696 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 697 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 698
df9ec2da 699 if (data->temp_diode_open & (1 << nr))
45fb3669
HG		 700 return sprintf(buf, "1\n");
701 else
702 return sprintf(buf, "0\n");
703}
704
df9ec2da
UKK		 705/*
706 * Temp attr for the f71858fg, the f71858fg is special as it has its
707 * temperature indexes start at 0 (the others start at 1)
708 */
709static struct sensor_device_attribute_2 f71858fg_temp_attr[] = {
710 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
711 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
712 store_temp_max, 0, 0),
713 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
714 store_temp_max_hyst, 0, 0),
715 SENSOR_ATTR_2(temp1_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 0),
716 SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
717 store_temp_crit, 0, 0),
718 SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
719 0, 0),
720 SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
721 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
722 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
723 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
724 store_temp_max, 0, 1),
725 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
726 store_temp_max_hyst, 0, 1),
727 SENSOR_ATTR_2(temp2_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
728 SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
729 store_temp_crit, 0, 1),
730 SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
731 0, 1),
732 SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
733 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
734 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
735 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
736 store_temp_max, 0, 2),
737 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
738 store_temp_max_hyst, 0, 2),
739 SENSOR_ATTR_2(temp3_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
740 SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
741 store_temp_crit, 0, 2),
742 SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
743 0, 2),
744 SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
745 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
746};
45fb3669 747
df9ec2da 748static ssize_t show_temp_type(struct device *dev, struct device_attribute
45fb3669
HG		 749 *devattr, char *buf)
750{
751 struct f71882fg_data *data = f71882fg_update_device(dev);
bc37ae71 752 int nr = to_sensor_dev_attr_2(devattr)->index;
45fb3669 753
df9ec2da 754 return sprintf(buf, "%d\n", data->temp_type[nr]);
45fb3669
HG		 755}
756
df9ec2da
UKK		 757/* Temp attr for the standard models */
758static struct sensor_device_attribute_2 fxxxx_temp_attr[3][9] = { {
759 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1),
760 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
761 store_temp_max, 0, 1),
762 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
763 store_temp_max_hyst, 0, 1),
764 /*
765 * Should really be temp1_max_alarm, but older versions did not handle
766 * the max and crit alarms separately and lm_sensors v2 depends on the
767 * presence of temp#_alarm files. The same goes for temp2/3 _alarm.
768 */
769 SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
770 SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
771 store_temp_crit, 0, 1),
772 SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
773 0, 1),
774 SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
775 SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1),
776 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
777}, {
778 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2),
779 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
780 store_temp_max, 0, 2),
781 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
782 store_temp_max_hyst, 0, 2),
783 /* Should be temp2_max_alarm, see temp1_alarm note */
784 SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
785 SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
786 store_temp_crit, 0, 2),
787 SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
788 0, 2),
789 SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
790 SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2),
791 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
792}, {
793 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3),
794 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
795 store_temp_max, 0, 3),
796 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
797 store_temp_max_hyst, 0, 3),
798 /* Should be temp3_max_alarm, see temp1_alarm note */
799 SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3),
800 SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
801 store_temp_crit, 0, 3),
802 SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
803 0, 3),
804 SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 7),
805 SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3),
806 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3),
807} };
808
809static ssize_t show_temp_beep(struct device *dev, struct device_attribute
810 *devattr, char *buf)
9ab796eb
MD		 811{
812 struct f71882fg_data *data = f71882fg_update_device(dev);
df9ec2da
UKK		 813 int nr = to_sensor_dev_attr_2(devattr)->index;
814
815 if (data->temp_beep & (1 << nr))
816 return sprintf(buf, "1\n");
817 else
818 return sprintf(buf, "0\n");
9ab796eb
MD		 819}
820
df9ec2da
UKK		 821static ssize_t store_temp_beep(struct device *dev, struct device_attribute
822 *devattr, const char *buf, size_t count)
9ab796eb 823{
ce0bfa5e 824 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca 825 int err, nr = to_sensor_dev_attr_2(devattr)->index;
df9ec2da 826 unsigned long val;
e8a4eaca 827
df9ec2da 828 err = kstrtoul(buf, 10, &val);
e8a4eaca
GS		 829 if (err)
830 return err;
831
9ab796eb 832 mutex_lock(&data->update_lock);
df9ec2da
UKK		 833 data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
834 if (val)
835 data->temp_beep |= 1 << nr;
836 else
837 data->temp_beep &= ~(1 << nr);
838
839 f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep);
9ab796eb
MD		 840 mutex_unlock(&data->update_lock);
841
842 return count;
843}
844
df9ec2da
UKK		 845/* Temp attr for models which can beep on temp alarm */
846static struct sensor_device_attribute_2 fxxxx_temp_beep_attr[3][2] = { {
847 SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
848 store_temp_beep, 0, 1),
849 SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
850 store_temp_beep, 0, 5),
851}, {
852 SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
853 store_temp_beep, 0, 2),
854 SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
855 store_temp_beep, 0, 6),
856}, {
857 SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
858 store_temp_beep, 0, 3),
859 SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
860 store_temp_beep, 0, 7),
861} };
629c58ba 862
df9ec2da
UKK		 863static struct sensor_device_attribute_2 f81866_temp_beep_attr[3][2] = { {
864 SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
865 store_temp_beep, 0, 0),
866 SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
867 store_temp_beep, 0, 4),
868}, {
869 SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
870 store_temp_beep, 0, 1),
871 SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
872 store_temp_beep, 0, 5),
873}, {
874 SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
875 store_temp_beep, 0, 2),
876 SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
877 store_temp_beep, 0, 6),
878} };
629c58ba 879
df9ec2da
UKK		 880/*
881 * Temp attr for the f8000
882 * Note on the f8000 temp_ovt (crit) is used as max, and temp_high (max)
883 * is used as hysteresis value to clear alarms
884 * Also like the f71858fg its temperature indexes start at 0
885 */
886static struct sensor_device_attribute_2 f8000_temp_attr[] = {
887 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
888 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_crit,
889 store_temp_crit, 0, 0),
890 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
891 store_temp_max, 0, 0),
892 SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
893 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
894 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
895 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_crit,
896 store_temp_crit, 0, 1),
897 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
898 store_temp_max, 0, 1),
899 SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
900 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
901 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
902 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_crit,
903 store_temp_crit, 0, 2),
904 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
905 store_temp_max, 0, 2),
906 SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
907 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
908};
629c58ba 909
df9ec2da
UKK		 910static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
911 char *buf)
912{
913 struct f71882fg_data *data = f71882fg_update_device(dev);
914 int nr = to_sensor_dev_attr_2(devattr)->index;
629c58ba 915
df9ec2da
UKK		 916 return sprintf(buf, "%d\n", data->in[nr] * 8);
917}
629c58ba 918
df9ec2da
UKK		 919/* in attr for all models */
920static struct sensor_device_attribute_2 fxxxx_in_attr[] = {
921 SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
922 SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
923 SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
924 SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3),
925 SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4),
926 SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5),
927 SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6),
928 SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7),
929 SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8),
930 SENSOR_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 0, 9),
931 SENSOR_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 0, 10),
932};
933
934static ssize_t show_in_max(struct device *dev, struct device_attribute
935 *devattr, char *buf)
936{
937 struct f71882fg_data *data = f71882fg_update_device(dev);
938
939 return sprintf(buf, "%d\n", data->in1_max * 8);
940}
941
942static ssize_t store_in_max(struct device *dev, struct device_attribute
943 *devattr, const char *buf, size_t count)
944{
945 struct f71882fg_data *data = dev_get_drvdata(dev);
946 int err;
947 long val;
948
949 err = kstrtol(buf, 10, &val);
950 if (err)
951 return err;
952
953 val /= 8;
954 val = clamp_val(val, 0, 255);
955
956 mutex_lock(&data->update_lock);
957 if (data->type == f81866a)
958 f71882fg_write8(data, F81866_REG_IN1_HIGH, val);
959 else
960 f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val);
961 data->in1_max = val;
962 mutex_unlock(&data->update_lock);
963
964 return count;
965}
966
967static ssize_t show_in_beep(struct device *dev, struct device_attribute
968 *devattr, char *buf)
969{
970 struct f71882fg_data *data = f71882fg_update_device(dev);
971 int nr = to_sensor_dev_attr_2(devattr)->index;
972
973 if (data->in_beep & (1 << nr))
974 return sprintf(buf, "1\n");
975 else
976 return sprintf(buf, "0\n");
977}
978
979static ssize_t store_in_beep(struct device *dev, struct device_attribute
980 *devattr, const char *buf, size_t count)
981{
982 struct f71882fg_data *data = dev_get_drvdata(dev);
983 int err, nr = to_sensor_dev_attr_2(devattr)->index;
984 unsigned long val;
985
986 err = kstrtoul(buf, 10, &val);
987 if (err)
988 return err;
989
990 mutex_lock(&data->update_lock);
991 if (data->type == f81866a)
992 data->in_beep = f71882fg_read8(data, F81866_REG_IN_BEEP);
993 else
994 data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP);
995
996 if (val)
997 data->in_beep |= 1 << nr;
998 else
999 data->in_beep &= ~(1 << nr);
1000
1001 if (data->type == f81866a)
1002 f71882fg_write8(data, F81866_REG_IN_BEEP, data->in_beep);
1003 else
1004 f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep);
1005 mutex_unlock(&data->update_lock);
1006
1007 return count;
1008}
1009
1010static ssize_t show_in_alarm(struct device *dev, struct device_attribute
1011 *devattr, char *buf)
1012{
1013 struct f71882fg_data *data = f71882fg_update_device(dev);
1014 int nr = to_sensor_dev_attr_2(devattr)->index;
1015
1016 if (data->in_status & (1 << nr))
1017 return sprintf(buf, "1\n");
1018 else
1019 return sprintf(buf, "0\n");
1020}
1021
1022/* For models with in1 alarm capability */
1023static struct sensor_device_attribute_2 fxxxx_in1_alarm_attr[] = {
1024 SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max,
1025 0, 1),
1026 SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep,
1027 0, 1),
1028 SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1),
1029};
1030
1031static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
1032 char *buf)
1033{
1034 struct f71882fg_data *data = f71882fg_update_device(dev);
1035 int nr = to_sensor_dev_attr_2(devattr)->index;
1036 int speed = fan_from_reg(data->fan[nr]);
1037
1038 if (speed == FAN_MIN_DETECT)
1039 speed = 0;
1040
1041 return sprintf(buf, "%d\n", speed);
1042}
1043
1044static ssize_t show_fan_full_speed(struct device *dev,
1045 struct device_attribute *devattr, char *buf)
1046{
1047 struct f71882fg_data *data = f71882fg_update_device(dev);
1048 int nr = to_sensor_dev_attr_2(devattr)->index;
1049 int speed = fan_from_reg(data->fan_full_speed[nr]);
1050 return sprintf(buf, "%d\n", speed);
1051}
1052
1053static ssize_t store_fan_full_speed(struct device *dev,
1054 struct device_attribute *devattr,
1055 const char *buf, size_t count)
1056{
1057 struct f71882fg_data *data = dev_get_drvdata(dev);
1058 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1059 long val;
1060
1061 err = kstrtol(buf, 10, &val);
1062 if (err)
1063 return err;
1064
1065 val = clamp_val(val, 23, 1500000);
1066 val = fan_to_reg(val);
1067
1068 mutex_lock(&data->update_lock);
1069 f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val);
1070 data->fan_full_speed[nr] = val;
1071 mutex_unlock(&data->update_lock);
1072
1073 return count;
1074}
1075
1076static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
1077 *devattr, char *buf)
1078{
1079 struct f71882fg_data *data = f71882fg_update_device(dev);
1080 int nr = to_sensor_dev_attr_2(devattr)->index;
1081
1082 if (data->fan_status & (1 << nr))
1083 return sprintf(buf, "1\n");
1084 else
1085 return sprintf(buf, "0\n");
1086}
1087
1088static ssize_t show_pwm(struct device *dev,
1089 struct device_attribute *devattr, char *buf)
1090{
1091 struct f71882fg_data *data = f71882fg_update_device(dev);
1092 int val, nr = to_sensor_dev_attr_2(devattr)->index;
1093 mutex_lock(&data->update_lock);
1094 if (data->pwm_enable & (1 << (2 * nr)))
1095 /* PWM mode */
1096 val = data->pwm[nr];
1097 else {
1098 /* RPM mode */
1099 val = 255 * fan_from_reg(data->fan_target[nr])
1100 / fan_from_reg(data->fan_full_speed[nr]);
1101 }
1102 mutex_unlock(&data->update_lock);
1103 return sprintf(buf, "%d\n", val);
1104}
1105
1106static ssize_t store_pwm(struct device *dev,
1107 struct device_attribute *devattr, const char *buf,
1108 size_t count)
1109{
1110 struct f71882fg_data *data = dev_get_drvdata(dev);
1111 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1112 long val;
1113
1114 err = kstrtol(buf, 10, &val);
1115 if (err)
1116 return err;
1117
1118 val = clamp_val(val, 0, 255);
1119
1120 mutex_lock(&data->update_lock);
1121 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
1122 if ((data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 3) != 2) ||
1123 (data->type != f8000 && !((data->pwm_enable >> 2 * nr) & 2))) {
1124 count = -EROFS;
1125 goto leave;
1126 }
1127 if (data->pwm_enable & (1 << (2 * nr))) {
1128 /* PWM mode */
1129 f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
1130 data->pwm[nr] = val;
1131 } else {
1132 /* RPM mode */
1133 int target, full_speed;
1134 full_speed = f71882fg_read16(data,
1135 F71882FG_REG_FAN_FULL_SPEED(nr));
1136 target = fan_to_reg(val * fan_from_reg(full_speed) / 255);
1137 f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target);
1138 data->fan_target[nr] = target;
1139 data->fan_full_speed[nr] = full_speed;
1140 }
1141leave:
629c58ba
HG		 1142 mutex_unlock(&data->update_lock);
1143
1144 return count;
1145}
1146
9ab796eb
MD		 1147static ssize_t show_pwm_enable(struct device *dev,
1148 struct device_attribute *devattr, char *buf)
1149{
ed4f7c20 1150 int result = 0;
9ab796eb
MD		 1151 struct f71882fg_data *data = f71882fg_update_device(dev);
1152 int nr = to_sensor_dev_attr_2(devattr)->index;
1153
ed4f7c20
HG		 1154 switch ((data->pwm_enable >> 2 * nr) & 3) {
1155 case 0:
1156 case 1:
1157 result = 2; /* Normal auto mode */
1158 break;
1159 case 2:
1160 result = 1; /* Manual mode */
1161 break;
1162 case 3:
1163 if (data->type == f8000)
1164 result = 3; /* Thermostat mode */
1165 else
1166 result = 1; /* Manual mode */
1167 break;
1168 }
9ab796eb
MD		 1169
1170 return sprintf(buf, "%d\n", result);
1171}
1172
1173static ssize_t store_pwm_enable(struct device *dev, struct device_attribute
1174 *devattr, const char *buf, size_t count)
1175{
1176 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca
GS		 1177 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1178 long val;
1179
179c4fdb 1180 err = kstrtol(buf, 10, &val);
e8a4eaca
GS		 1181 if (err)
1182 return err;
9ab796eb 1183
3fc7838a
HG		 1184 /* Special case for F8000 pwm channel 3 which only does auto mode */
1185 if (data->type == f8000 && nr == 2 && val != 2)
1186 return -EINVAL;
1187
9ab796eb 1188 mutex_lock(&data->update_lock);
ce0bfa5e 1189 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
ed4f7c20
HG		 1190 /* Special case for F8000 auto PWM mode / Thermostat mode */
1191 if (data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 1)) {
1192 switch (val) {
1193 case 2:
1194 data->pwm_enable &= ~(2 << (2 * nr));
1195 break; /* Normal auto mode */
1196 case 3:
1197 data->pwm_enable |= 2 << (2 * nr);
1198 break; /* Thermostat mode */
1199 default:
1200 count = -EINVAL;
1201 goto leave;
1202 }
1203 } else {
1204 switch (val) {
1205 case 1:
09475d32
HG		 1206 /* The f71858fg does not support manual RPM mode */
1207 if (data->type == f71858fg &&
1208 ((data->pwm_enable >> (2 * nr)) & 1)) {
1209 count = -EINVAL;
1210 goto leave;
1211 }
ed4f7c20
HG		 1212 data->pwm_enable |= 2 << (2 * nr);
1213 break; /* Manual */
1214 case 2:
1215 data->pwm_enable &= ~(2 << (2 * nr));
1216 break; /* Normal auto mode */
1217 default:
1218 count = -EINVAL;
1219 goto leave;
1220 }
9ab796eb 1221 }
9ab796eb 1222 f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable);
ed4f7c20 1223leave:
9ab796eb
MD		 1224 mutex_unlock(&data->update_lock);
1225
1226 return count;
1227}
1228
df9ec2da
UKK		 1229static ssize_t show_pwm_interpolate(struct device *dev,
1230 struct device_attribute *devattr, char *buf)
9ab796eb
MD		 1231{
1232 int result;
1233 struct f71882fg_data *data = f71882fg_update_device(dev);
df9ec2da 1234 int nr = to_sensor_dev_attr_2(devattr)->index;
9ab796eb 1235
df9ec2da 1236 result = (data->pwm_auto_point_mapping[nr] >> 4) & 1;
9ab796eb
MD		 1237
1238 return sprintf(buf, "%d\n", result);
1239}
1240
df9ec2da
UKK		 1241static ssize_t store_pwm_interpolate(struct device *dev,
1242 struct device_attribute *devattr,
1243 const char *buf, size_t count)
9ab796eb 1244{
ce0bfa5e 1245 struct f71882fg_data *data = dev_get_drvdata(dev);
df9ec2da
UKK		 1246 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1247 unsigned long val;
e8a4eaca 1248
df9ec2da
UKK		 1249 err = kstrtoul(buf, 10, &val);
1250 if (err)
1251 return err;
1252
1253 mutex_lock(&data->update_lock);
1254 data->pwm_auto_point_mapping[nr] =
1255 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
1256 if (val)
1257 val = data->pwm_auto_point_mapping[nr] | (1 << 4);
1258 else
1259 val = data->pwm_auto_point_mapping[nr] & (~(1 << 4));
1260 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
1261 data->pwm_auto_point_mapping[nr] = val;
1262 mutex_unlock(&data->update_lock);
1263
1264 return count;
1265}
1266
1267/* Fan / PWM attr common to all models */
1268static struct sensor_device_attribute_2 fxxxx_fan_attr[4][6] = { {
1269 SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0),
1270 SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR,
1271 show_fan_full_speed,
1272 store_fan_full_speed, 0, 0),
1273 SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0),
1274 SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0),
1275 SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1276 store_pwm_enable, 0, 0),
1277 SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR,
1278 show_pwm_interpolate, store_pwm_interpolate, 0, 0),
1279}, {
1280 SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1),
1281 SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR,
1282 show_fan_full_speed,
1283 store_fan_full_speed, 0, 1),
1284 SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1),
1285 SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1),
1286 SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1287 store_pwm_enable, 0, 1),
1288 SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR,
1289 show_pwm_interpolate, store_pwm_interpolate, 0, 1),
1290}, {
1291 SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
1292 SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR,
1293 show_fan_full_speed,
1294 store_fan_full_speed, 0, 2),
1295 SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
1296 SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2),
1297 SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1298 store_pwm_enable, 0, 2),
1299 SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR,
1300 show_pwm_interpolate, store_pwm_interpolate, 0, 2),
1301}, {
1302 SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
1303 SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
1304 show_fan_full_speed,
1305 store_fan_full_speed, 0, 3),
1306 SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
1307 SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
1308 SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1309 store_pwm_enable, 0, 3),
1310 SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR,
1311 show_pwm_interpolate, store_pwm_interpolate, 0, 3),
1312} };
1313
1314static ssize_t show_simple_pwm(struct device *dev,
1315 struct device_attribute *devattr, char *buf)
1316{
1317 struct f71882fg_data *data = f71882fg_update_device(dev);
1318 int val, nr = to_sensor_dev_attr_2(devattr)->index;
1319
1320 val = data->pwm[nr];
1321 return sprintf(buf, "%d\n", val);
1322}
1323
1324static ssize_t store_simple_pwm(struct device *dev,
1325 struct device_attribute *devattr,
1326 const char *buf, size_t count)
1327{
1328 struct f71882fg_data *data = dev_get_drvdata(dev);
1329 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1330 long val;
1331
1332 err = kstrtol(buf, 10, &val);
e8a4eaca
GS		 1333 if (err)
1334 return err;
1335
2a844c14 1336 val = clamp_val(val, 0, 255);
9ab796eb
MD		 1337
1338 mutex_lock(&data->update_lock);
df9ec2da
UKK		 1339 f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
1340 data->pwm[nr] = val;
9ab796eb
MD		 1341 mutex_unlock(&data->update_lock);
1342
1343 return count;
1344}
1345
df9ec2da
UKK		 1346/* Attr for the third fan of the f71808a, which only has manual pwm */
1347static struct sensor_device_attribute_2 f71808a_fan3_attr[] = {
1348 SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
1349 SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
1350 SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR,
1351 show_simple_pwm, store_simple_pwm, 0, 2),
1352};
1353
1354static ssize_t show_fan_beep(struct device *dev, struct device_attribute
1355 *devattr, char *buf)
9ab796eb 1356{
9ab796eb
MD		 1357 struct f71882fg_data *data = f71882fg_update_device(dev);
1358 int nr = to_sensor_dev_attr_2(devattr)->index;
df9ec2da
UKK		 1359
1360 if (data->fan_beep & (1 << nr))
1361 return sprintf(buf, "1\n");
1362 else
1363 return sprintf(buf, "0\n");
1364}
1365
1366static ssize_t store_fan_beep(struct device *dev, struct device_attribute
1367 *devattr, const char *buf, size_t count)
1368{
1369 struct f71882fg_data *data = dev_get_drvdata(dev);
1370 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1371 unsigned long val;
1372
1373 err = kstrtoul(buf, 10, &val);
1374 if (err)
1375 return err;
9ab796eb
MD		 1376
1377 mutex_lock(&data->update_lock);
df9ec2da
UKK		 1378 data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
1379 if (val)
1380 data->fan_beep |= 1 << nr;
bc27490f 1381 else
df9ec2da
UKK		 1382 data->fan_beep &= ~(1 << nr);
1383
1384 f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep);
9ab796eb
MD		 1385 mutex_unlock(&data->update_lock);
1386
df9ec2da
UKK		 1387 return count;
1388}
1389
1390/* Attr for models which can beep on Fan alarm */
1391static struct sensor_device_attribute_2 fxxxx_fan_beep_attr[] = {
1392 SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
1393 store_fan_beep, 0, 0),
1394 SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
1395 store_fan_beep, 0, 1),
1396 SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
1397 store_fan_beep, 0, 2),
1398 SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
1399 store_fan_beep, 0, 3),
1400};
1401
1402static ssize_t show_pwm_auto_point_channel(struct device *dev,
1403 struct device_attribute *devattr,
1404 char *buf)
1405{
1406 int result;
1407 struct f71882fg_data *data = f71882fg_update_device(dev);
1408 int nr = to_sensor_dev_attr_2(devattr)->index;
1409
1410 result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) -
1411 data->temp_start);
1412
9ab796eb
MD		 1413 return sprintf(buf, "%d\n", result);
1414}
1415
df9ec2da
UKK		 1416static ssize_t store_pwm_auto_point_channel(struct device *dev,
1417 struct device_attribute *devattr,
1418 const char *buf, size_t count)
9ab796eb 1419{
ce0bfa5e 1420 struct f71882fg_data *data = dev_get_drvdata(dev);
e8a4eaca 1421 int err, nr = to_sensor_dev_attr_2(devattr)->index;
e8a4eaca
GS		 1422 long val;
1423
179c4fdb 1424 err = kstrtol(buf, 10, &val);
e8a4eaca
GS		 1425 if (err)
1426 return err;
1427
df9ec2da
UKK		 1428 switch (val) {
1429 case 1:
1430 val = 0;
1431 break;
1432 case 2:
1433 val = 1;
1434 break;
1435 case 4:
1436 val = 2;
1437 break;
1438 default:
1439 return -EINVAL;
1440 }
1441 val += data->temp_start;
9ab796eb 1442 mutex_lock(&data->update_lock);
df9ec2da
UKK		 1443 data->pwm_auto_point_mapping[nr] =
1444 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
1445 val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val;
1446 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
1447 data->pwm_auto_point_mapping[nr] = val;
9ab796eb
MD		 1448 mutex_unlock(&data->update_lock);
1449
1450 return count;
1451}
1452
df9ec2da
UKK		 1453static ssize_t show_pwm_auto_point_pwm(struct device *dev,
1454 struct device_attribute *devattr,
1455 char *buf)
9ab796eb
MD		 1456{
1457 int result;
1458 struct f71882fg_data *data = f71882fg_update_device(dev);
df9ec2da
UKK		 1459 int pwm = to_sensor_dev_attr_2(devattr)->index;
1460 int point = to_sensor_dev_attr_2(devattr)->nr;
1461
1462 mutex_lock(&data->update_lock);
1463 if (data->pwm_enable & (1 << (2 * pwm))) {
1464 /* PWM mode */
1465 result = data->pwm_auto_point_pwm[pwm][point];
1466 } else {
1467 /* RPM mode */
1468 result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]);
1469 }
1470 mutex_unlock(&data->update_lock);
1471
1472 return sprintf(buf, "%d\n", result);
1473}
1474
1475static ssize_t store_pwm_auto_point_pwm(struct device *dev,
1476 struct device_attribute *devattr,
1477 const char *buf, size_t count)
1478{
1479 struct f71882fg_data *data = dev_get_drvdata(dev);
1480 int err, pwm = to_sensor_dev_attr_2(devattr)->index;
1481 int point = to_sensor_dev_attr_2(devattr)->nr;
1482 long val;
1483
1484 err = kstrtol(buf, 10, &val);
1485 if (err)
1486 return err;
1487
1488 val = clamp_val(val, 0, 255);
1489
1490 mutex_lock(&data->update_lock);
1491 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
1492 if (data->pwm_enable & (1 << (2 * pwm))) {
1493 /* PWM mode */
1494 } else {
1495 /* RPM mode */
1496 if (val < 29) /* Prevent negative numbers */
1497 val = 255;
1498 else
1499 val = (255 - val) * 32 / val;
1500 }
1501 f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val);
1502 data->pwm_auto_point_pwm[pwm][point] = val;
1503 mutex_unlock(&data->update_lock);
1504
1505 return count;
1506}
1507
1508static ssize_t show_pwm_auto_point_temp(struct device *dev,
1509 struct device_attribute *devattr,
1510 char *buf)
1511{
1512 int result;
1513 struct f71882fg_data *data = f71882fg_update_device(dev);
1514 int pwm = to_sensor_dev_attr_2(devattr)->index;
1515 int point = to_sensor_dev_attr_2(devattr)->nr;
1516
1517 result = data->pwm_auto_point_temp[pwm][point];
1518 return sprintf(buf, "%d\n", 1000 * result);
1519}
1520
1521static ssize_t store_pwm_auto_point_temp(struct device *dev,
1522 struct device_attribute *devattr,
1523 const char *buf, size_t count)
1524{
1525 struct f71882fg_data *data = dev_get_drvdata(dev);
1526 int err, pwm = to_sensor_dev_attr_2(devattr)->index;
1527 int point = to_sensor_dev_attr_2(devattr)->nr;
1528 long val;
1529
1530 err = kstrtol(buf, 10, &val);
1531 if (err)
1532 return err;
1533
1534 val /= 1000;
1535
1536 if (data->auto_point_temp_signed)
1537 val = clamp_val(val, -128, 127);
1538 else
1539 val = clamp_val(val, 0, 127);
1540
1541 mutex_lock(&data->update_lock);
1542 f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val);
1543 data->pwm_auto_point_temp[pwm][point] = val;
1544 mutex_unlock(&data->update_lock);
1545
1546 return count;
1547}
1548
1549static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
1550 struct device_attribute *devattr,
1551 char *buf)
1552{
1553 int result = 0;
1554 struct f71882fg_data *data = f71882fg_update_device(dev);
1555 int nr = to_sensor_dev_attr_2(devattr)->index;
1556 int point = to_sensor_dev_attr_2(devattr)->nr;
1557
1558 mutex_lock(&data->update_lock);
1559 if (nr & 1)
1560 result = data->pwm_auto_point_hyst[nr / 2] >> 4;
1561 else
1562 result = data->pwm_auto_point_hyst[nr / 2] & 0x0f;
1563 result = 1000 * (data->pwm_auto_point_temp[nr][point] - result);
1564 mutex_unlock(&data->update_lock);
1565
1566 return sprintf(buf, "%d\n", result);
1567}
1568
1569static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
1570 struct device_attribute *devattr,
1571 const char *buf, size_t count)
1572{
1573 struct f71882fg_data *data = dev_get_drvdata(dev);
1574 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1575 int point = to_sensor_dev_attr_2(devattr)->nr;
1576 u8 reg;
1577 long val;
1578
1579 err = kstrtol(buf, 10, &val);
1580 if (err)
1581 return err;
1582
1583 val /= 1000;
1584
1585 mutex_lock(&data->update_lock);
1586 data->pwm_auto_point_temp[nr][point] =
1587 f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point));
1588 val = clamp_val(val, data->pwm_auto_point_temp[nr][point] - 15,
1589 data->pwm_auto_point_temp[nr][point]);
1590 val = data->pwm_auto_point_temp[nr][point] - val;
1591
1592 reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2));
1593 if (nr & 1)
1594 reg = (reg & 0x0f) | (val << 4);
1595 else
1596 reg = (reg & 0xf0) | val;
1597
1598 f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg);
1599 data->pwm_auto_point_hyst[nr / 2] = reg;
1600 mutex_unlock(&data->update_lock);
1601
1602 return count;
1603}
1604
1605/*
1606 * PWM attr for the f71862fg, fewer pwms and fewer zones per pwm than the
1607 * standard models
1608 */
1609static struct sensor_device_attribute_2 f71862fg_auto_pwm_attr[3][7] = { {
1610 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
1611 show_pwm_auto_point_channel,
1612 store_pwm_auto_point_channel, 0, 0),
1613 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
1614 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1615 1, 0),
1616 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
1617 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1618 4, 0),
1619 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
1620 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1621 0, 0),
1622 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
1623 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1624 3, 0),
1625 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1626 show_pwm_auto_point_temp_hyst,
1627 store_pwm_auto_point_temp_hyst,
1628 0, 0),
1629 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
1630 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
1631}, {
1632 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
1633 show_pwm_auto_point_channel,
1634 store_pwm_auto_point_channel, 0, 1),
1635 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
1636 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1637 1, 1),
1638 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
1639 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1640 4, 1),
1641 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
1642 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1643 0, 1),
1644 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
1645 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1646 3, 1),
1647 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1648 show_pwm_auto_point_temp_hyst,
1649 store_pwm_auto_point_temp_hyst,
1650 0, 1),
1651 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
1652 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
1653}, {
1654 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
1655 show_pwm_auto_point_channel,
1656 store_pwm_auto_point_channel, 0, 2),
1657 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
1658 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1659 1, 2),
1660 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
1661 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1662 4, 2),
1663 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
1664 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1665 0, 2),
1666 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
1667 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1668 3, 2),
1669 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1670 show_pwm_auto_point_temp_hyst,
1671 store_pwm_auto_point_temp_hyst,
1672 0, 2),
1673 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
1674 show_pwm_auto_point_temp_hyst, NULL, 3, 2),
1675} };
1676
1677/*
1678 * PWM attr for the f71808e/f71869, almost identical to the f71862fg, but the
1679 * pwm setting when the temperature is above the pwmX_auto_point1_temp can be
1680 * programmed instead of being hardcoded to 0xff
1681 */
1682static struct sensor_device_attribute_2 f71869_auto_pwm_attr[3][8] = { {
1683 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
1684 show_pwm_auto_point_channel,
1685 store_pwm_auto_point_channel, 0, 0),
1686 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
1687 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1688 0, 0),
1689 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
1690 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1691 1, 0),
1692 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
1693 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1694 4, 0),
1695 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
1696 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1697 0, 0),
1698 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
1699 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1700 3, 0),
1701 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1702 show_pwm_auto_point_temp_hyst,
1703 store_pwm_auto_point_temp_hyst,
1704 0, 0),
1705 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
1706 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
1707}, {
1708 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
1709 show_pwm_auto_point_channel,
1710 store_pwm_auto_point_channel, 0, 1),
1711 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
1712 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1713 0, 1),
1714 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
1715 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1716 1, 1),
1717 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
1718 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1719 4, 1),
1720 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
1721 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1722 0, 1),
1723 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
1724 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1725 3, 1),
1726 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1727 show_pwm_auto_point_temp_hyst,
1728 store_pwm_auto_point_temp_hyst,
1729 0, 1),
1730 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
1731 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
1732}, {
1733 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
1734 show_pwm_auto_point_channel,
1735 store_pwm_auto_point_channel, 0, 2),
1736 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
1737 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1738 0, 2),
1739 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
1740 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1741 1, 2),
1742 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
1743 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1744 4, 2),
1745 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
1746 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1747 0, 2),
1748 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
1749 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1750 3, 2),
1751 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1752 show_pwm_auto_point_temp_hyst,
1753 store_pwm_auto_point_temp_hyst,
1754 0, 2),
1755 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
1756 show_pwm_auto_point_temp_hyst, NULL, 3, 2),
1757} };
1758
1759/* PWM attr for the standard models */
1760static struct sensor_device_attribute_2 fxxxx_auto_pwm_attr[4][14] = { {
1761 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
1762 show_pwm_auto_point_channel,
1763 store_pwm_auto_point_channel, 0, 0),
1764 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
1765 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1766 0, 0),
1767 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
1768 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1769 1, 0),
1770 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
1771 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1772 2, 0),
1773 SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR,
1774 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1775 3, 0),
1776 SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR,
1777 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1778 4, 0),
1779 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
1780 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1781 0, 0),
1782 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
1783 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1784 1, 0),
1785 SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR,
1786 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1787 2, 0),
1788 SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR,
1789 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1790 3, 0),
1791 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1792 show_pwm_auto_point_temp_hyst,
1793 store_pwm_auto_point_temp_hyst,
1794 0, 0),
1795 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
1796 show_pwm_auto_point_temp_hyst, NULL, 1, 0),
1797 SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO,
1798 show_pwm_auto_point_temp_hyst, NULL, 2, 0),
1799 SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO,
1800 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
1801}, {
1802 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
1803 show_pwm_auto_point_channel,
1804 store_pwm_auto_point_channel, 0, 1),
1805 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
1806 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1807 0, 1),
1808 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
1809 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1810 1, 1),
1811 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
1812 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1813 2, 1),
1814 SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR,
1815 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1816 3, 1),
1817 SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR,
1818 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1819 4, 1),
1820 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
1821 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1822 0, 1),
1823 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
1824 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1825 1, 1),
1826 SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR,
1827 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1828 2, 1),
1829 SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR,
1830 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1831 3, 1),
1832 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1833 show_pwm_auto_point_temp_hyst,
1834 store_pwm_auto_point_temp_hyst,
1835 0, 1),
1836 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
1837 show_pwm_auto_point_temp_hyst, NULL, 1, 1),
1838 SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO,
1839 show_pwm_auto_point_temp_hyst, NULL, 2, 1),
1840 SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO,
1841 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
1842}, {
1843 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
1844 show_pwm_auto_point_channel,
1845 store_pwm_auto_point_channel, 0, 2),
1846 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
1847 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1848 0, 2),
1849 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
1850 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1851 1, 2),
1852 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
1853 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1854 2, 2),
1855 SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR,
1856 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1857 3, 2),
1858 SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR,
1859 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1860 4, 2),
1861 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
1862 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1863 0, 2),
1864 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
1865 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1866 1, 2),
1867 SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR,
1868 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1869 2, 2),
1870 SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR,
1871 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1872 3, 2),
1873 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1874 show_pwm_auto_point_temp_hyst,
1875 store_pwm_auto_point_temp_hyst,
1876 0, 2),
1877 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
1878 show_pwm_auto_point_temp_hyst, NULL, 1, 2),
1879 SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO,
1880 show_pwm_auto_point_temp_hyst, NULL, 2, 2),
1881 SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
1882 show_pwm_auto_point_temp_hyst, NULL, 3, 2),
1883}, {
1884 SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR,
1885 show_pwm_auto_point_channel,
1886 store_pwm_auto_point_channel, 0, 3),
1887 SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR,
1888 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1889 0, 3),
1890 SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR,
1891 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1892 1, 3),
1893 SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR,
1894 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1895 2, 3),
1896 SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR,
1897 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1898 3, 3),
1899 SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR,
1900 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1901 4, 3),
1902 SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR,
1903 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1904 0, 3),
1905 SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR,
1906 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1907 1, 3),
1908 SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR,
1909 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1910 2, 3),
1911 SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR,
1912 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1913 3, 3),
1914 SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1915 show_pwm_auto_point_temp_hyst,
1916 store_pwm_auto_point_temp_hyst,
1917 0, 3),
1918 SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO,
1919 show_pwm_auto_point_temp_hyst, NULL, 1, 3),
1920 SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO,
1921 show_pwm_auto_point_temp_hyst, NULL, 2, 3),
1922 SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO,
1923 show_pwm_auto_point_temp_hyst, NULL, 3, 3),
1924} };
9ab796eb 1925
df9ec2da
UKK		 1926/* Fan attr specific to the f8000 (4th fan input can only measure speed) */
1927static struct sensor_device_attribute_2 f8000_fan_attr[] = {
1928 SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
1929};
9ab796eb 1930
df9ec2da
UKK		 1931/*
1932 * PWM attr for the f8000, zones mapped to temp instead of to pwm!
1933 * Also the register block at offset A0 maps to TEMP1 (so our temp2, as the
1934 * F8000 starts counting temps at 0), B0 maps the TEMP2 and C0 maps to TEMP0
1935 */
1936static struct sensor_device_attribute_2 f8000_auto_pwm_attr[3][14] = { {
1937 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
1938 show_pwm_auto_point_channel,
1939 store_pwm_auto_point_channel, 0, 0),
1940 SENSOR_ATTR_2(temp1_auto_point1_pwm, S_IRUGO|S_IWUSR,
1941 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1942 0, 2),
1943 SENSOR_ATTR_2(temp1_auto_point2_pwm, S_IRUGO|S_IWUSR,
1944 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1945 1, 2),
1946 SENSOR_ATTR_2(temp1_auto_point3_pwm, S_IRUGO|S_IWUSR,
1947 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1948 2, 2),
1949 SENSOR_ATTR_2(temp1_auto_point4_pwm, S_IRUGO|S_IWUSR,
1950 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1951 3, 2),
1952 SENSOR_ATTR_2(temp1_auto_point5_pwm, S_IRUGO|S_IWUSR,
1953 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1954 4, 2),
1955 SENSOR_ATTR_2(temp1_auto_point1_temp, S_IRUGO|S_IWUSR,
1956 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1957 0, 2),
1958 SENSOR_ATTR_2(temp1_auto_point2_temp, S_IRUGO|S_IWUSR,
1959 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1960 1, 2),
1961 SENSOR_ATTR_2(temp1_auto_point3_temp, S_IRUGO|S_IWUSR,
1962 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1963 2, 2),
1964 SENSOR_ATTR_2(temp1_auto_point4_temp, S_IRUGO|S_IWUSR,
1965 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1966 3, 2),
1967 SENSOR_ATTR_2(temp1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1968 show_pwm_auto_point_temp_hyst,
1969 store_pwm_auto_point_temp_hyst,
1970 0, 2),
1971 SENSOR_ATTR_2(temp1_auto_point2_temp_hyst, S_IRUGO,
1972 show_pwm_auto_point_temp_hyst, NULL, 1, 2),
1973 SENSOR_ATTR_2(temp1_auto_point3_temp_hyst, S_IRUGO,
1974 show_pwm_auto_point_temp_hyst, NULL, 2, 2),
1975 SENSOR_ATTR_2(temp1_auto_point4_temp_hyst, S_IRUGO,
1976 show_pwm_auto_point_temp_hyst, NULL, 3, 2),
1977}, {
1978 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
1979 show_pwm_auto_point_channel,
1980 store_pwm_auto_point_channel, 0, 1),
1981 SENSOR_ATTR_2(temp2_auto_point1_pwm, S_IRUGO|S_IWUSR,
1982 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1983 0, 0),
1984 SENSOR_ATTR_2(temp2_auto_point2_pwm, S_IRUGO|S_IWUSR,
1985 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1986 1, 0),
1987 SENSOR_ATTR_2(temp2_auto_point3_pwm, S_IRUGO|S_IWUSR,
1988 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1989 2, 0),
1990 SENSOR_ATTR_2(temp2_auto_point4_pwm, S_IRUGO|S_IWUSR,
1991 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1992 3, 0),
1993 SENSOR_ATTR_2(temp2_auto_point5_pwm, S_IRUGO|S_IWUSR,
1994 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1995 4, 0),
1996 SENSOR_ATTR_2(temp2_auto_point1_temp, S_IRUGO|S_IWUSR,
1997 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1998 0, 0),
1999 SENSOR_ATTR_2(temp2_auto_point2_temp, S_IRUGO|S_IWUSR,
2000 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2001 1, 0),
2002 SENSOR_ATTR_2(temp2_auto_point3_temp, S_IRUGO|S_IWUSR,
2003 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2004 2, 0),
2005 SENSOR_ATTR_2(temp2_auto_point4_temp, S_IRUGO|S_IWUSR,
2006 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2007 3, 0),
2008 SENSOR_ATTR_2(temp2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
2009 show_pwm_auto_point_temp_hyst,
2010 store_pwm_auto_point_temp_hyst,
2011 0, 0),
2012 SENSOR_ATTR_2(temp2_auto_point2_temp_hyst, S_IRUGO,
2013 show_pwm_auto_point_temp_hyst, NULL, 1, 0),
2014 SENSOR_ATTR_2(temp2_auto_point3_temp_hyst, S_IRUGO,
2015 show_pwm_auto_point_temp_hyst, NULL, 2, 0),
2016 SENSOR_ATTR_2(temp2_auto_point4_temp_hyst, S_IRUGO,
2017 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
2018}, {
2019 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
2020 show_pwm_auto_point_channel,
2021 store_pwm_auto_point_channel, 0, 2),
2022 SENSOR_ATTR_2(temp3_auto_point1_pwm, S_IRUGO|S_IWUSR,
2023 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
2024 0, 1),
2025 SENSOR_ATTR_2(temp3_auto_point2_pwm, S_IRUGO|S_IWUSR,
2026 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
2027 1, 1),
2028 SENSOR_ATTR_2(temp3_auto_point3_pwm, S_IRUGO|S_IWUSR,
2029 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
2030 2, 1),
2031 SENSOR_ATTR_2(temp3_auto_point4_pwm, S_IRUGO|S_IWUSR,
2032 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
2033 3, 1),
2034 SENSOR_ATTR_2(temp3_auto_point5_pwm, S_IRUGO|S_IWUSR,
2035 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
2036 4, 1),
2037 SENSOR_ATTR_2(temp3_auto_point1_temp, S_IRUGO|S_IWUSR,
2038 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2039 0, 1),
2040 SENSOR_ATTR_2(temp3_auto_point2_temp, S_IRUGO|S_IWUSR,
2041 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2042 1, 1),
2043 SENSOR_ATTR_2(temp3_auto_point3_temp, S_IRUGO|S_IWUSR,
2044 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2045 2, 1),
2046 SENSOR_ATTR_2(temp3_auto_point4_temp, S_IRUGO|S_IWUSR,
2047 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2048 3, 1),
2049 SENSOR_ATTR_2(temp3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
2050 show_pwm_auto_point_temp_hyst,
2051 store_pwm_auto_point_temp_hyst,
2052 0, 1),
2053 SENSOR_ATTR_2(temp3_auto_point2_temp_hyst, S_IRUGO,
2054 show_pwm_auto_point_temp_hyst, NULL, 1, 1),
2055 SENSOR_ATTR_2(temp3_auto_point3_temp_hyst, S_IRUGO,
2056 show_pwm_auto_point_temp_hyst, NULL, 2, 1),
2057 SENSOR_ATTR_2(temp3_auto_point4_temp_hyst, S_IRUGO,
2058 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
2059} };
9ab796eb 2060
df9ec2da
UKK		 2061/* Super I/O functions */
2062static inline int superio_inb(int base, int reg)
9ab796eb 2063{
df9ec2da
UKK		 2064 outb(reg, base);
2065 return inb(base + 1);
9ab796eb
MD		 2066}
2067
df9ec2da 2068static int superio_inw(int base, int reg)
9ab796eb 2069{
df9ec2da
UKK		 2070 int val;
2071 val = superio_inb(base, reg) << 8;
2072 val |= superio_inb(base, reg + 1);
2073 return val;
9ab796eb
MD		 2074}
2075
df9ec2da 2076static inline int superio_enter(int base)
9ab796eb 2077{
df9ec2da
UKK		 2078 /* Don't step on other drivers' I/O space by accident */
2079 if (!request_muxed_region(base, 2, DRVNAME)) {
2080 pr_err("I/O address 0x%04x already in use\n", base);
2081 return -EBUSY;
9ab796eb 2082 }
9ab796eb 2083
df9ec2da
UKK		 2084 /* according to the datasheet the key must be send twice! */
2085 outb(SIO_UNLOCK_KEY, base);
2086 outb(SIO_UNLOCK_KEY, base);
9ab796eb 2087
df9ec2da 2088 return 0;
9ab796eb
MD		 2089}
2090
df9ec2da 2091static inline void superio_select(int base, int ld)
45fb3669 2092{
df9ec2da
UKK		 2093 outb(SIO_REG_LDSEL, base);
2094 outb(ld, base + 1);
2095}
2096
2097static inline void superio_exit(int base)
2098{
2099 outb(SIO_LOCK_KEY, base);
2100 release_region(base, 2);
45fb3669
HG		 2101}
2102
6c931ae1 2103static int f71882fg_create_sysfs_files(struct platform_device *pdev,
c13548c5
HG		 2104 struct sensor_device_attribute_2 *attr, int count)
2105{
2106 int err, i;
2107
2108 for (i = 0; i < count; i++) {
2109 err = device_create_file(&pdev->dev, &attr[i].dev_attr);
2110 if (err)
2111 return err;
2112 }
2113 return 0;
2114}
45fb3669 2115
fc16c56e
HG		 2116static void f71882fg_remove_sysfs_files(struct platform_device *pdev,
2117 struct sensor_device_attribute_2 *attr, int count)
2118{
2119 int i;
2120
2121 for (i = 0; i < count; i++)
2122 device_remove_file(&pdev->dev, &attr[i].dev_attr);
2123}
2124
6c931ae1 2125static int f71882fg_create_fan_sysfs_files(
6543439f 2126 struct platform_device *pdev, int idx)
9af0794c
HG		 2127{
2128 struct f71882fg_data *data = platform_get_drvdata(pdev);
2129 int err;
2130
6543439f
HG		 2131 /* Sanity check the pwm setting */
2132 err = 0;
2133 switch (data->type) {
2134 case f71858fg:
2135 if (((data->pwm_enable >> (idx * 2)) & 3) == 3)
2136 err = 1;
2137 break;
2138 case f71862fg:
2139 if (((data->pwm_enable >> (idx * 2)) & 1) != 1)
2140 err = 1;
2141 break;
2142 case f8000:
2143 if (idx == 2)
2144 err = data->pwm_enable & 0x20;
2145 break;
2146 default:
2147 break;
2148 }
2149 if (err) {
2150 dev_err(&pdev->dev,
2151 "Invalid (reserved) pwm settings: 0x%02x, "
2152 "skipping fan %d\n",
2153 (data->pwm_enable >> (idx * 2)) & 3, idx + 1);
2154 return 0; /* This is a non fatal condition */
2155 }
2156
9af0794c
HG		 2157 err = f71882fg_create_sysfs_files(pdev, &fxxxx_fan_attr[idx][0],
2158 ARRAY_SIZE(fxxxx_fan_attr[0]));
2159 if (err)
2160 return err;
2161
2162 if (f71882fg_fan_has_beep[data->type]) {
2163 err = f71882fg_create_sysfs_files(pdev,
2164 &fxxxx_fan_beep_attr[idx],
2165 1);
2166 if (err)
2167 return err;
2168 }
2169
6543439f
HG		 2170 dev_info(&pdev->dev, "Fan: %d is in %s mode\n", idx + 1,
2171 (data->pwm_enable & (1 << (2 * idx))) ? "duty-cycle" : "RPM");
2172
2173 /* Check for unsupported auto pwm settings */
2174 switch (data->type) {
2175 case f71808e:
2176 case f71808a:
2177 case f71869:
2178 case f71869a:
2179 case f71889fg:
2180 case f71889ed:
2181 case f71889a:
2182 data->pwm_auto_point_mapping[idx] =
2183 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(idx));
2184 if ((data->pwm_auto_point_mapping[idx] & 0x80) ||
2185 (data->pwm_auto_point_mapping[idx] & 3) == 0) {
2186 dev_warn(&pdev->dev,
2187 "Auto pwm controlled by raw digital "
2188 "data, disabling pwm auto_point "
2189 "sysfs attributes for fan %d\n", idx + 1);
2190 return 0; /* This is a non fatal condition */
2191 }
2192 break;
2193 default:
2194 break;
2195 }
9af0794c
HG		 2196
2197 switch (data->type) {
2198 case f71862fg:
2199 err = f71882fg_create_sysfs_files(pdev,
2200 &f71862fg_auto_pwm_attr[idx][0],
2201 ARRAY_SIZE(f71862fg_auto_pwm_attr[0]));
2202 break;
2203 case f71808e:
2204 case f71869:
2205 err = f71882fg_create_sysfs_files(pdev,
2206 &f71869_auto_pwm_attr[idx][0],
2207 ARRAY_SIZE(f71869_auto_pwm_attr[0]));
2208 break;
2209 case f8000:
2210 err = f71882fg_create_sysfs_files(pdev,
2211 &f8000_auto_pwm_attr[idx][0],
2212 ARRAY_SIZE(f8000_auto_pwm_attr[0]));
2213 break;
2214 default:
2215 err = f71882fg_create_sysfs_files(pdev,
2216 &fxxxx_auto_pwm_attr[idx][0],
2217 ARRAY_SIZE(fxxxx_auto_pwm_attr[0]));
2218 }
2219
2220 return err;
2221}
2222
df9ec2da
UKK		 2223static int f71882fg_remove(struct platform_device *pdev)
2224{
2225 struct f71882fg_data *data = platform_get_drvdata(pdev);
2226 int nr_fans = f71882fg_nr_fans[data->type];
2227 int nr_temps = f71882fg_nr_temps[data->type];
2228 int i;
2229 u8 start_reg = f71882fg_read8(data, F71882FG_REG_START);
2230
2231 if (data->hwmon_dev)
2232 hwmon_device_unregister(data->hwmon_dev);
2233
2234 device_remove_file(&pdev->dev, &dev_attr_name);
2235
2236 if (start_reg & 0x01) {
2237 switch (data->type) {
2238 case f71858fg:
2239 if (data->temp_config & 0x10)
2240 f71882fg_remove_sysfs_files(pdev,
2241 f8000_temp_attr,
2242 ARRAY_SIZE(f8000_temp_attr));
2243 else
2244 f71882fg_remove_sysfs_files(pdev,
2245 f71858fg_temp_attr,
2246 ARRAY_SIZE(f71858fg_temp_attr));
2247 break;
2248 case f8000:
2249 f71882fg_remove_sysfs_files(pdev,
2250 f8000_temp_attr,
2251 ARRAY_SIZE(f8000_temp_attr));
2252 break;
2253 case f81866a:
2254 f71882fg_remove_sysfs_files(pdev,
2255 f71858fg_temp_attr,
2256 ARRAY_SIZE(f71858fg_temp_attr));
2257 break;
2258 default:
2259 f71882fg_remove_sysfs_files(pdev,
2260 &fxxxx_temp_attr[0][0],
2261 ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
2262 }
2263 if (f71882fg_temp_has_beep[data->type]) {
2264 if (data->type == f81866a)
2265 f71882fg_remove_sysfs_files(pdev,
2266 &f81866_temp_beep_attr[0][0],
2267 ARRAY_SIZE(f81866_temp_beep_attr[0])
2268 * nr_temps);
2269 else
2270 f71882fg_remove_sysfs_files(pdev,
2271 &fxxxx_temp_beep_attr[0][0],
2272 ARRAY_SIZE(fxxxx_temp_beep_attr[0])
2273 * nr_temps);
2274 }
2275
2276 for (i = 0; i < F71882FG_MAX_INS; i++) {
2277 if (f71882fg_has_in[data->type][i]) {
2278 device_remove_file(&pdev->dev,
2279 &fxxxx_in_attr[i].dev_attr);
2280 }
2281 }
2282 if (f71882fg_has_in1_alarm[data->type]) {
2283 f71882fg_remove_sysfs_files(pdev,
2284 fxxxx_in1_alarm_attr,
2285 ARRAY_SIZE(fxxxx_in1_alarm_attr));
2286 }
2287 }
2288
2289 if (start_reg & 0x02) {
2290 f71882fg_remove_sysfs_files(pdev, &fxxxx_fan_attr[0][0],
2291 ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans);
2292
2293 if (f71882fg_fan_has_beep[data->type]) {
2294 f71882fg_remove_sysfs_files(pdev,
2295 fxxxx_fan_beep_attr, nr_fans);
2296 }
2297
2298 switch (data->type) {
2299 case f71808a:
2300 f71882fg_remove_sysfs_files(pdev,
2301 &fxxxx_auto_pwm_attr[0][0],
2302 ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
2303 f71882fg_remove_sysfs_files(pdev,
2304 f71808a_fan3_attr,
2305 ARRAY_SIZE(f71808a_fan3_attr));
2306 break;
2307 case f71862fg:
2308 f71882fg_remove_sysfs_files(pdev,
2309 &f71862fg_auto_pwm_attr[0][0],
2310 ARRAY_SIZE(f71862fg_auto_pwm_attr[0]) *
2311 nr_fans);
2312 break;
2313 case f71808e:
2314 case f71869:
2315 f71882fg_remove_sysfs_files(pdev,
2316 &f71869_auto_pwm_attr[0][0],
2317 ARRAY_SIZE(f71869_auto_pwm_attr[0]) * nr_fans);
2318 break;
2319 case f8000:
2320 f71882fg_remove_sysfs_files(pdev,
2321 f8000_fan_attr,
2322 ARRAY_SIZE(f8000_fan_attr));
2323 f71882fg_remove_sysfs_files(pdev,
2324 &f8000_auto_pwm_attr[0][0],
2325 ARRAY_SIZE(f8000_auto_pwm_attr[0]) * nr_fans);
2326 break;
2327 default:
2328 f71882fg_remove_sysfs_files(pdev,
2329 &fxxxx_auto_pwm_attr[0][0],
2330 ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
2331 }
2332 }
2333 return 0;
2334}
2335
6c931ae1 2336static int f71882fg_probe(struct platform_device *pdev)
45fb3669
HG		 2337{
2338 struct f71882fg_data *data;
a8b3a3a5 2339 struct f71882fg_sio_data *sio_data = dev_get_platdata(&pdev->dev);
f27def07
JD		 2340 int nr_fans = f71882fg_nr_fans[sio_data->type];
2341 int nr_temps = f71882fg_nr_temps[sio_data->type];
2342 int err, i;
dcd956fc 2343 int size;
98f7ba19 2344 u8 start_reg, reg;
45fb3669 2345
33cd66e3
GR		 2346 data = devm_kzalloc(&pdev->dev, sizeof(struct f71882fg_data),
2347 GFP_KERNEL);
c13548c5 2348 if (!data)
45fb3669
HG		 2349 return -ENOMEM;
2350
2351 data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
498be968 2352 data->type = sio_data->type;
09475d32 2353 data->temp_start =
dcd956fc
PH		 2354 (data->type == f71858fg || data->type == f8000 ||
2355 data->type == f81866a) ? 0 : 1;
45fb3669
HG		 2356 mutex_init(&data->update_lock);
2357 platform_set_drvdata(pdev, data);
2358
3cc74758 2359 start_reg = f71882fg_read8(data, F71882FG_REG_START);
12d66e84
HG		 2360 if (start_reg & 0x04) {
2361 dev_warn(&pdev->dev, "Hardware monitor is powered down\n");
33cd66e3 2362 return -ENODEV;
12d66e84 2363 }
3cc74758
HG		 2364 if (!(start_reg & 0x03)) {
2365 dev_warn(&pdev->dev, "Hardware monitoring not activated\n");
33cd66e3 2366 return -ENODEV;
3cc74758
HG		 2367 }
2368
45fb3669 2369 /* Register sysfs interface files */
c13548c5
HG		 2370 err = device_create_file(&pdev->dev, &dev_attr_name);
2371 if (err)
2372 goto exit_unregister_sysfs;
45fb3669 2373
45fb3669 2374 if (start_reg & 0x01) {
ed4f7c20 2375 switch (data->type) {
09475d32
HG		 2376 case f71858fg:
2377 data->temp_config =
2378 f71882fg_read8(data, F71882FG_REG_TEMP_CONFIG);
2379 if (data->temp_config & 0x10)
20eaf724
GR		 2380 /*
2381 * The f71858fg temperature alarms behave as
2382 * the f8000 alarms in this mode
2383 */
09475d32 2384 err = f71882fg_create_sysfs_files(pdev,
0bae6400
HG		 2385 f8000_temp_attr,
2386 ARRAY_SIZE(f8000_temp_attr));
09475d32
HG		 2387 else
2388 err = f71882fg_create_sysfs_files(pdev,
0bae6400
HG		 2389 f71858fg_temp_attr,
2390 ARRAY_SIZE(f71858fg_temp_attr));
ed4f7c20
HG		 2391 break;
2392 case f8000:
2393 err = f71882fg_create_sysfs_files(pdev,
0bae6400
HG		 2394 f8000_temp_attr,
2395 ARRAY_SIZE(f8000_temp_attr));
ed4f7c20 2396 break;
dcd956fc
PH		 2397 case f81866a:
2398 err = f71882fg_create_sysfs_files(pdev,
2399 f71858fg_temp_attr,
2400 ARRAY_SIZE(f71858fg_temp_attr));
2401 break;
0bae6400
HG		 2402 default:
2403 err = f71882fg_create_sysfs_files(pdev,
60d2b378
HG		 2404 &fxxxx_temp_attr[0][0],
2405 ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
498be968 2406 }
ed4f7c20
HG		 2407 if (err)
2408 goto exit_unregister_sysfs;
0bae6400 2409
4d53811a 2410 if (f71882fg_temp_has_beep[data->type]) {
dcd956fc
PH		 2411 if (data->type == f81866a) {
2412 size = ARRAY_SIZE(f81866_temp_beep_attr[0]);
2413 err = f71882fg_create_sysfs_files(pdev,
2414 &f81866_temp_beep_attr[0][0],
2415 size * nr_temps);
2416
2417 } else {
2418 size = ARRAY_SIZE(fxxxx_temp_beep_attr[0]);
2419 err = f71882fg_create_sysfs_files(pdev,
2420 &fxxxx_temp_beep_attr[0][0],
2421 size * nr_temps);
2422 }
78aa4f72
HG		 2423 if (err)
2424 goto exit_unregister_sysfs;
2425 }
2426
0bae6400
HG		 2427 for (i = 0; i < F71882FG_MAX_INS; i++) {
2428 if (f71882fg_has_in[data->type][i]) {
2429 err = device_create_file(&pdev->dev,
2430 &fxxxx_in_attr[i].dev_attr);
2431 if (err)
2432 goto exit_unregister_sysfs;
2433 }
2434 }
2435 if (f71882fg_has_in1_alarm[data->type]) {
2436 err = f71882fg_create_sysfs_files(pdev,
2437 fxxxx_in1_alarm_attr,
2438 ARRAY_SIZE(fxxxx_in1_alarm_attr));
2439 if (err)
2440 goto exit_unregister_sysfs;
2441 }
45fb3669
HG		 2442 }
2443
2444 if (start_reg & 0x02) {
98f7ba19 2445 switch (data->type) {
e5e713cb 2446 case f71808e:
629c58ba 2447 case f71808a:
c11bb993 2448 case f71869:
5da556e3 2449 case f71869a:
e5e713cb 2450 /* These always have signed auto point temps */
c11bb993 2451 data->auto_point_temp_signed = 1;
df561f66 2452 fallthrough; /* to select correct fan/pwm reg bank! */
98f7ba19 2453 case f71889fg:
3cad4022 2454 case f71889ed:
a66c1088 2455 case f71889a:
98f7ba19
HG		 2456 reg = f71882fg_read8(data, F71882FG_REG_FAN_FAULT_T);
2457 if (reg & F71882FG_FAN_NEG_TEMP_EN)
2458 data->auto_point_temp_signed = 1;
3cad4022
HG		 2459 /* Ensure banked pwm registers point to right bank */
2460 reg &= ~F71882FG_FAN_PROG_SEL;
2461 f71882fg_write8(data, F71882FG_REG_FAN_FAULT_T, reg);
98f7ba19
HG		 2462 break;
2463 default:
2464 break;
2465 }
2466
996cadb2
HG		 2467 data->pwm_enable =
2468 f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
2469
9af0794c 2470 for (i = 0; i < nr_fans; i++) {
6543439f 2471 err = f71882fg_create_fan_sysfs_files(pdev, i);
629c58ba
HG		 2472 if (err)
2473 goto exit_unregister_sysfs;
9af0794c
HG		 2474 }
2475
2476 /* Some types have 1 extra fan with limited functionality */
2477 switch (data->type) {
2478 case f71808a:
629c58ba
HG		 2479 err = f71882fg_create_sysfs_files(pdev,
2480 f71808a_fan3_attr,
2481 ARRAY_SIZE(f71808a_fan3_attr));
2482 break;
ed4f7c20
HG		 2483 case f8000:
2484 err = f71882fg_create_sysfs_files(pdev,
2485 f8000_fan_attr,
2486 ARRAY_SIZE(f8000_fan_attr));
2487 break;
e48a7f1a 2488 default:
9af0794c 2489 break;
498be968 2490 }
c13548c5
HG		 2491 if (err)
2492 goto exit_unregister_sysfs;
45fb3669
HG		 2493 }
2494
1beeffe4
TJ		 2495 data->hwmon_dev = hwmon_device_register(&pdev->dev);
2496 if (IS_ERR(data->hwmon_dev)) {
2497 err = PTR_ERR(data->hwmon_dev);
c13548c5 2498 data->hwmon_dev = NULL;
45fb3669
HG		 2499 goto exit_unregister_sysfs;
2500 }
2501
2502 return 0;
2503
2504exit_unregister_sysfs:
c13548c5 2505 f71882fg_remove(pdev); /* Will unregister the sysfs files for us */
3cc74758 2506 return err; /* f71882fg_remove() also frees our data */
45fb3669
HG		 2507}
2508
0038389a 2509static int __init f71882fg_find(int sioaddr, struct f71882fg_sio_data *sio_data)
45fb3669 2510{
45fb3669 2511 u16 devid;
0038389a 2512 unsigned short address;
cadb8657
GS		 2513 int err = superio_enter(sioaddr);
2514 if (err)
2515 return err;
45fb3669
HG		 2516
2517 devid = superio_inw(sioaddr, SIO_REG_MANID);
2518 if (devid != SIO_FINTEK_ID) {
22d3b412 2519 pr_debug("Not a Fintek device\n");
cadb8657 2520 err = -ENODEV;
45fb3669
HG		 2521 goto exit;
2522 }
2523
67b671bc 2524 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
498be968 2525 switch (devid) {
e5e713cb
HG		 2526 case SIO_F71808E_ID:
2527 sio_data->type = f71808e;
2528 break;
629c58ba
HG		 2529 case SIO_F71808A_ID:
2530 sio_data->type = f71808a;
2531 break;
09475d32 2532 case SIO_F71858_ID:
739743ec 2533 case SIO_F71858AD_ID:
09475d32
HG		 2534 sio_data->type = f71858fg;
2535 break;
498be968
HG		 2536 case SIO_F71862_ID:
2537 sio_data->type = f71862fg;
2538 break;
2725fe2b
PH		 2539 case SIO_F71868_ID:
2540 sio_data->type = f71868a;
2541 break;
c11bb993
HG		 2542 case SIO_F71869_ID:
2543 sio_data->type = f71869;
2544 break;
5da556e3
HG		 2545 case SIO_F71869A_ID:
2546 sio_data->type = f71869a;
2547 break;
498be968
HG		 2548 case SIO_F71882_ID:
2549 sio_data->type = f71882fg;
2550 break;
7669896f
HG		 2551 case SIO_F71889_ID:
2552 sio_data->type = f71889fg;
2553 break;
3cad4022
HG		 2554 case SIO_F71889E_ID:
2555 sio_data->type = f71889ed;
2556 break;
a66c1088
HG		 2557 case SIO_F71889A_ID:
2558 sio_data->type = f71889a;
2559 break;
ed4f7c20
HG		 2560 case SIO_F8000_ID:
2561 sio_data->type = f8000;
2562 break;
d8363bb5
GJ		 2563 case SIO_F81768D_ID:
2564 sio_data->type = f81768d;
2565 break;
383586b1
JD		 2566 case SIO_F81865_ID:
2567 sio_data->type = f81865f;
2568 break;
2725fe2b 2569 case SIO_F81866_ID:
df293076 2570 case SIO_F81966_ID:
2725fe2b
PH		 2571 sio_data->type = f81866a;
2572 break;
498be968 2573 default:
22d3b412
JP		 2574 pr_info("Unsupported Fintek device: %04x\n",
2575 (unsigned int)devid);
cadb8657 2576 err = -ENODEV;
45fb3669
HG		 2577 goto exit;
2578 }
2579
09475d32
HG		 2580 if (sio_data->type == f71858fg)
2581 superio_select(sioaddr, SIO_F71858FG_LD_HWM);
2582 else
2583 superio_select(sioaddr, SIO_F71882FG_LD_HWM);
2584
8afb1049 2585 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
22d3b412 2586 pr_warn("Device not activated\n");
cadb8657 2587 err = -ENODEV;
45fb3669
HG		 2588 goto exit;
2589 }
2590
0038389a
GR		 2591 address = superio_inw(sioaddr, SIO_REG_ADDR);
2592 if (address == 0) {
22d3b412 2593 pr_warn("Base address not set\n");
cadb8657 2594 err = -ENODEV;
45fb3669
HG		 2595 goto exit;
2596 }
0038389a 2597 address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
45fb3669 2598
0038389a 2599 err = address;
22d3b412 2600 pr_info("Found %s chip at %#x, revision %d\n",
0038389a 2601 f71882fg_names[sio_data->type], (unsigned int)address,
45fb3669
HG		 2602 (int)superio_inb(sioaddr, SIO_REG_DEVREV));
2603exit:
2604 superio_exit(sioaddr);
2605 return err;
2606}
2607
0038389a
GR		 2608static int __init f71882fg_device_add(int address,
2609 const struct f71882fg_sio_data *sio_data)
45fb3669
HG		 2610{
2611 struct resource res = {
2612 .start = address,
2613 .end = address + REGION_LENGTH - 1,
2614 .flags = IORESOURCE_IO,
2615 };
2616 int err;
2617
2618 f71882fg_pdev = platform_device_alloc(DRVNAME, address);
8afb1049 2619 if (!f71882fg_pdev)
45fb3669
HG		 2620 return -ENOMEM;
2621
2622 res.name = f71882fg_pdev->name;
b9acb64a
JD		 2623 err = acpi_check_resource_conflict(&res);
2624 if (err)
18632f84 2625 goto exit_device_put;
b9acb64a 2626
45fb3669 2627 err = platform_device_add_resources(f71882fg_pdev, &res, 1);
8afb1049 2628 if (err) {
22d3b412 2629 pr_err("Device resource addition failed\n");
45fb3669
HG		 2630 goto exit_device_put;
2631 }
2632
498be968
HG		 2633 err = platform_device_add_data(f71882fg_pdev, sio_data,
2634 sizeof(struct f71882fg_sio_data));
2635 if (err) {
22d3b412 2636 pr_err("Platform data allocation failed\n");
498be968
HG		 2637 goto exit_device_put;
2638 }
2639
45fb3669 2640 err = platform_device_add(f71882fg_pdev);
8afb1049 2641 if (err) {
22d3b412 2642 pr_err("Device addition failed\n");
45fb3669
HG		 2643 goto exit_device_put;
2644 }
2645
2646 return 0;
2647
2648exit_device_put:
2649 platform_device_put(f71882fg_pdev);
2650
2651 return err;
2652}
2653
df9ec2da
UKK		 2654static struct platform_driver f71882fg_driver = {
2655 .driver = {
2656 .name = DRVNAME,
2657 },
2658 .probe = f71882fg_probe,
2659 .remove = f71882fg_remove,
2660};
2661
45fb3669
HG		 2662static int __init f71882fg_init(void)
2663{
0038389a
GR		 2664 int err;
2665 int address;
498be968
HG		 2666 struct f71882fg_sio_data sio_data;
2667
2668 memset(&sio_data, 0, sizeof(sio_data));
45fb3669 2669
0038389a
GR		 2670 address = f71882fg_find(0x2e, &sio_data);
2671 if (address < 0)
2672 address = f71882fg_find(0x4e, &sio_data);
2673 if (address < 0)
2674 return address;
45fb3669 2675
c13548c5
HG		 2676 err = platform_driver_register(&f71882fg_driver);
2677 if (err)
0038389a 2678 return err;
45fb3669 2679
498be968 2680 err = f71882fg_device_add(address, &sio_data);
c13548c5 2681 if (err)
45fb3669
HG		 2682 goto exit_driver;
2683
2684 return 0;
2685
2686exit_driver:
2687 platform_driver_unregister(&f71882fg_driver);
45fb3669
HG		 2688 return err;
2689}
2690
2691static void __exit f71882fg_exit(void)
2692{
2693 platform_device_unregister(f71882fg_pdev);
2694 platform_driver_unregister(&f71882fg_driver);
2695}
2696
2697MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver");
7958e3b4 2698MODULE_AUTHOR("Hans Edgington, Hans de Goede <hdegoede@redhat.com>");
45fb3669
HG		 2699MODULE_LICENSE("GPL");
2700
2701module_init(f71882fg_init);
2702module_exit(f71882fg_exit);
Linux 6.x block layer and io_uring tree(s)