projects / linux-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
hwmon/f71805f: Add manual fan speed control
[linux-block.git] / drivers / hwmon / f71805f.c
CommitLineData
e53004e2
JD		 1/*
2 * f71805f.c - driver for the Fintek F71805F/FG Super-I/O chip integrated
3 * hardware monitoring features
2d45771e 4 * Copyright (C) 2005-2006 Jean Delvare <khali@linux-fr.org>
e53004e2
JD		 5 *
6 * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates
7 * complete hardware monitoring features: voltage, fan and temperature
8 * sensors, and manual and automatic fan speed control.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25#include <linux/module.h>
26#include <linux/init.h>
27#include <linux/slab.h>
28#include <linux/jiffies.h>
29#include <linux/platform_device.h>
30#include <linux/hwmon.h>
31#include <linux/hwmon-sysfs.h>
32#include <linux/err.h>
f0819184 33#include <linux/mutex.h>
0e39e01c 34#include <linux/sysfs.h>
e53004e2
JD		 35#include <asm/io.h>
36
37static struct platform_device *pdev;
38
39#define DRVNAME "f71805f"
40
41/*
42 * Super-I/O constants and functions
43 */
44
45#define F71805F_LD_HWM 0x04
46
47#define SIO_REG_LDSEL 0x07 /* Logical device select */
48#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
49#define SIO_REG_DEVREV 0x22 /* Device revision */
50#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
51#define SIO_REG_ENABLE 0x30 /* Logical device enable */
52#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
53
54#define SIO_FINTEK_ID 0x1934
55#define SIO_F71805F_ID 0x0406
56
57static inline int
58superio_inb(int base, int reg)
59{
60 outb(reg, base);
61 return inb(base + 1);
62}
63
64static int
65superio_inw(int base, int reg)
66{
67 int val;
68 outb(reg++, base);
69 val = inb(base + 1) << 8;
70 outb(reg, base);
71 val |= inb(base + 1);
72 return val;
73}
74
75static inline void
76superio_select(int base, int ld)
77{
78 outb(SIO_REG_LDSEL, base);
79 outb(ld, base + 1);
80}
81
82static inline void
83superio_enter(int base)
84{
85 outb(0x87, base);
86 outb(0x87, base);
87}
88
89static inline void
90superio_exit(int base)
91{
92 outb(0xaa, base);
93}
94
95/*
96 * ISA constants
97 */
98
99#define REGION_LENGTH 2
100#define ADDR_REG_OFFSET 0
101#define DATA_REG_OFFSET 1
102
e53004e2
JD		 103/*
104 * Registers
105 */
106
107/* in nr from 0 to 8 (8-bit values) */
108#define F71805F_REG_IN(nr) (0x10 + (nr))
109#define F71805F_REG_IN_HIGH(nr) (0x40 + 2 * (nr))
110#define F71805F_REG_IN_LOW(nr) (0x41 + 2 * (nr))
111/* fan nr from 0 to 2 (12-bit values, two registers) */
112#define F71805F_REG_FAN(nr) (0x20 + 2 * (nr))
113#define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr))
114#define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr))
95e35312 115#define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr))
e53004e2
JD		 116/* temp nr from 0 to 2 (8-bit values) */
117#define F71805F_REG_TEMP(nr) (0x1B + (nr))
118#define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr))
119#define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr))
120#define F71805F_REG_TEMP_MODE 0x01
121
122#define F71805F_REG_START 0x00
123/* status nr from 0 to 2 */
124#define F71805F_REG_STATUS(nr) (0x36 + (nr))
125
6b14a546
JD		 126/* individual register bits */
127#define FAN_CTRL_SKIP 0x80
95e35312
JD		 128#define FAN_CTRL_MODE_MASK 0x03
129#define FAN_CTRL_MODE_SPEED 0x00
130#define FAN_CTRL_MODE_TEMPERATURE 0x01
131#define FAN_CTRL_MODE_MANUAL 0x02
6b14a546 132
e53004e2
JD		 133/*
134 * Data structures and manipulation thereof
135 */
136
137struct f71805f_data {
138 unsigned short addr;
139 const char *name;
f0819184 140 struct mutex lock;
e53004e2
JD		 141 struct class_device *class_dev;
142
f0819184 143 struct mutex update_lock;
e53004e2
JD		 144 char valid; /* !=0 if following fields are valid */
145 unsigned long last_updated; /* In jiffies */
146 unsigned long last_limits; /* In jiffies */
147
148 /* Register values */
149 u8 in[9];
150 u8 in_high[9];
151 u8 in_low[9];
152 u16 fan[3];
153 u16 fan_low[3];
6b14a546 154 u8 fan_ctrl[3];
95e35312 155 u8 pwm[3];
e53004e2
JD		 156 u8 temp[3];
157 u8 temp_high[3];
158 u8 temp_hyst[3];
159 u8 temp_mode;
2d45771e 160 unsigned long alarms;
e53004e2
JD		 161};
162
163static inline long in_from_reg(u8 reg)
164{
165 return (reg * 8);
166}
167
168/* The 2 least significant bits are not used */
169static inline u8 in_to_reg(long val)
170{
171 if (val <= 0)
172 return 0;
173 if (val >= 2016)
174 return 0xfc;
175 return (((val + 16) / 32) << 2);
176}
177
178/* in0 is downscaled by a factor 2 internally */
179static inline long in0_from_reg(u8 reg)
180{
181 return (reg * 16);
182}
183
184static inline u8 in0_to_reg(long val)
185{
186 if (val <= 0)
187 return 0;
188 if (val >= 4032)
189 return 0xfc;
190 return (((val + 32) / 64) << 2);
191}
192
193/* The 4 most significant bits are not used */
194static inline long fan_from_reg(u16 reg)
195{
196 reg &= 0xfff;
197 if (!reg || reg == 0xfff)
198 return 0;
199 return (1500000 / reg);
200}
201
202static inline u16 fan_to_reg(long rpm)
203{
204 /* If the low limit is set below what the chip can measure,
205 store the largest possible 12-bit value in the registers,
206 so that no alarm will ever trigger. */
207 if (rpm < 367)
208 return 0xfff;
209 return (1500000 / rpm);
210}
211
212static inline long temp_from_reg(u8 reg)
213{
214 return (reg * 1000);
215}
216
217static inline u8 temp_to_reg(long val)
218{
219 if (val < 0)
220 val = 0;
221 else if (val > 1000 * 0xff)
222 val = 0xff;
223 return ((val + 500) / 1000);
224}
225
226/*
227 * Device I/O access
228 */
229
230static u8 f71805f_read8(struct f71805f_data *data, u8 reg)
231{
232 u8 val;
233
f0819184 234 mutex_lock(&data->lock);
e53004e2
JD		 235 outb(reg, data->addr + ADDR_REG_OFFSET);
236 val = inb(data->addr + DATA_REG_OFFSET);
f0819184 237 mutex_unlock(&data->lock);
e53004e2
JD		 238
239 return val;
240}
241
242static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val)
243{
f0819184 244 mutex_lock(&data->lock);
e53004e2
JD		 245 outb(reg, data->addr + ADDR_REG_OFFSET);
246 outb(val, data->addr + DATA_REG_OFFSET);
f0819184 247 mutex_unlock(&data->lock);
e53004e2
JD		 248}
249
250/* It is important to read the MSB first, because doing so latches the
251 value of the LSB, so we are sure both bytes belong to the same value. */
252static u16 f71805f_read16(struct f71805f_data *data, u8 reg)
253{
254 u16 val;
255
f0819184 256 mutex_lock(&data->lock);
e53004e2
JD		 257 outb(reg, data->addr + ADDR_REG_OFFSET);
258 val = inb(data->addr + DATA_REG_OFFSET) << 8;
259 outb(++reg, data->addr + ADDR_REG_OFFSET);
260 val |= inb(data->addr + DATA_REG_OFFSET);
f0819184 261 mutex_unlock(&data->lock);
e53004e2
JD		 262
263 return val;
264}
265
266static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val)
267{
f0819184 268 mutex_lock(&data->lock);
e53004e2
JD		 269 outb(reg, data->addr + ADDR_REG_OFFSET);
270 outb(val >> 8, data->addr + DATA_REG_OFFSET);
271 outb(++reg, data->addr + ADDR_REG_OFFSET);
272 outb(val & 0xff, data->addr + DATA_REG_OFFSET);
f0819184 273 mutex_unlock(&data->lock);
e53004e2
JD		 274}
275
276static struct f71805f_data *f71805f_update_device(struct device *dev)
277{
278 struct f71805f_data *data = dev_get_drvdata(dev);
279 int nr;
280
f0819184 281 mutex_lock(&data->update_lock);
e53004e2
JD		 282
283 /* Limit registers cache is refreshed after 60 seconds */
284 if (time_after(jiffies, data->last_updated + 60 * HZ)
285 || !data->valid) {
286 for (nr = 0; nr < 9; nr++) {
287 data->in_high[nr] = f71805f_read8(data,
288 F71805F_REG_IN_HIGH(nr));
289 data->in_low[nr] = f71805f_read8(data,
290 F71805F_REG_IN_LOW(nr));
291 }
292 for (nr = 0; nr < 3; nr++) {
6b14a546
JD		 293 if (data->fan_ctrl[nr] & FAN_CTRL_SKIP)
294 continue;
295 data->fan_low[nr] = f71805f_read16(data,
296 F71805F_REG_FAN_LOW(nr));
e53004e2
JD		 297 }
298 for (nr = 0; nr < 3; nr++) {
299 data->temp_high[nr] = f71805f_read8(data,
300 F71805F_REG_TEMP_HIGH(nr));
301 data->temp_hyst[nr] = f71805f_read8(data,
302 F71805F_REG_TEMP_HYST(nr));
303 }
304 data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE);
305
306 data->last_limits = jiffies;
307 }
308
309 /* Measurement registers cache is refreshed after 1 second */
310 if (time_after(jiffies, data->last_updated + HZ)
311 || !data->valid) {
312 for (nr = 0; nr < 9; nr++) {
313 data->in[nr] = f71805f_read8(data,
314 F71805F_REG_IN(nr));
315 }
316 for (nr = 0; nr < 3; nr++) {
6b14a546
JD		 317 if (data->fan_ctrl[nr] & FAN_CTRL_SKIP)
318 continue;
319 data->fan[nr] = f71805f_read16(data,
320 F71805F_REG_FAN(nr));
95e35312
JD		 321 data->fan_ctrl[nr] = f71805f_read8(data,
322 F71805F_REG_FAN_CTRL(nr));
323 data->pwm[nr] = f71805f_read8(data,
324 F71805F_REG_PWM_DUTY(nr));
e53004e2
JD		 325 }
326 for (nr = 0; nr < 3; nr++) {
327 data->temp[nr] = f71805f_read8(data,
328 F71805F_REG_TEMP(nr));
329 }
2d45771e
JD		 330 data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0))
331 + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8)
332 + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16);
e53004e2
JD		 333
334 data->last_updated = jiffies;
335 data->valid = 1;
336 }
337
f0819184 338 mutex_unlock(&data->update_lock);
e53004e2
JD		 339
340 return data;
341}
342
343/*
344 * Sysfs interface
345 */
346
347static ssize_t show_in0(struct device *dev, struct device_attribute *devattr,
348 char *buf)
349{
350 struct f71805f_data *data = f71805f_update_device(dev);
351
352 return sprintf(buf, "%ld\n", in0_from_reg(data->in[0]));
353}
354
355static ssize_t show_in0_max(struct device *dev, struct device_attribute
356 *devattr, char *buf)
357{
358 struct f71805f_data *data = f71805f_update_device(dev);
359
360 return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[0]));
361}
362
363static ssize_t show_in0_min(struct device *dev, struct device_attribute
364 *devattr, char *buf)
365{
366 struct f71805f_data *data = f71805f_update_device(dev);
367
368 return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[0]));
369}
370
371static ssize_t set_in0_max(struct device *dev, struct device_attribute
372 *devattr, const char *buf, size_t count)
373{
374 struct f71805f_data *data = dev_get_drvdata(dev);
375 long val = simple_strtol(buf, NULL, 10);
376
f0819184 377 mutex_lock(&data->update_lock);
e53004e2
JD		 378 data->in_high[0] = in0_to_reg(val);
379 f71805f_write8(data, F71805F_REG_IN_HIGH(0), data->in_high[0]);
f0819184 380 mutex_unlock(&data->update_lock);
e53004e2
JD		 381
382 return count;
383}
384
385static ssize_t set_in0_min(struct device *dev, struct device_attribute
386 *devattr, const char *buf, size_t count)
387{
388 struct f71805f_data *data = dev_get_drvdata(dev);
389 long val = simple_strtol(buf, NULL, 10);
390
f0819184 391 mutex_lock(&data->update_lock);
e53004e2
JD		 392 data->in_low[0] = in0_to_reg(val);
393 f71805f_write8(data, F71805F_REG_IN_LOW(0), data->in_low[0]);
f0819184 394 mutex_unlock(&data->update_lock);
e53004e2
JD		 395
396 return count;
397}
398
e53004e2
JD		 399static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
400 char *buf)
401{
402 struct f71805f_data *data = f71805f_update_device(dev);
403 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
404 int nr = attr->index;
405
406 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr]));
407}
408
409static ssize_t show_in_max(struct device *dev, struct device_attribute
410 *devattr, char *buf)
411{
412 struct f71805f_data *data = f71805f_update_device(dev);
413 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
414 int nr = attr->index;
415
416 return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr]));
417}
418
419static ssize_t show_in_min(struct device *dev, struct device_attribute
420 *devattr, char *buf)
421{
422 struct f71805f_data *data = f71805f_update_device(dev);
423 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
424 int nr = attr->index;
425
426 return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr]));
427}
428
429static ssize_t set_in_max(struct device *dev, struct device_attribute
430 *devattr, const char *buf, size_t count)
431{
432 struct f71805f_data *data = dev_get_drvdata(dev);
433 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
434 int nr = attr->index;
435 long val = simple_strtol(buf, NULL, 10);
436
f0819184 437 mutex_lock(&data->update_lock);
e53004e2
JD		 438 data->in_high[nr] = in_to_reg(val);
439 f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
f0819184 440 mutex_unlock(&data->update_lock);
e53004e2
JD		 441
442 return count;
443}
444
445static ssize_t set_in_min(struct device *dev, struct device_attribute
446 *devattr, const char *buf, size_t count)
447{
448 struct f71805f_data *data = dev_get_drvdata(dev);
449 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
450 int nr = attr->index;
451 long val = simple_strtol(buf, NULL, 10);
452
f0819184 453 mutex_lock(&data->update_lock);
e53004e2
JD		 454 data->in_low[nr] = in_to_reg(val);
455 f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
f0819184 456 mutex_unlock(&data->update_lock);
e53004e2
JD		 457
458 return count;
459}
460
e53004e2
JD		 461static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
462 char *buf)
463{
464 struct f71805f_data *data = f71805f_update_device(dev);
465 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
466 int nr = attr->index;
467
468 return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr]));
469}
470
471static ssize_t show_fan_min(struct device *dev, struct device_attribute
472 *devattr, char *buf)
473{
474 struct f71805f_data *data = f71805f_update_device(dev);
475 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
476 int nr = attr->index;
477
478 return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr]));
479}
480
481static ssize_t set_fan_min(struct device *dev, struct device_attribute
482 *devattr, const char *buf, size_t count)
483{
484 struct f71805f_data *data = dev_get_drvdata(dev);
485 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
486 int nr = attr->index;
487 long val = simple_strtol(buf, NULL, 10);
488
f0819184 489 mutex_lock(&data->update_lock);
e53004e2
JD		 490 data->fan_low[nr] = fan_to_reg(val);
491 f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]);
f0819184 492 mutex_unlock(&data->update_lock);
e53004e2
JD		 493
494 return count;
495}
496
95e35312
JD		 497static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
498 char *buf)
499{
500 struct f71805f_data *data = f71805f_update_device(dev);
501 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
502 int nr = attr->index;
503
504 return sprintf(buf, "%d\n", (int)data->pwm[nr]);
505}
506
507static ssize_t show_pwm_enable(struct device *dev, struct device_attribute
508 *devattr, char *buf)
509{
510 struct f71805f_data *data = f71805f_update_device(dev);
511 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
512 int nr = attr->index;
513 int mode;
514
515 switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) {
516 case FAN_CTRL_MODE_SPEED:
517 mode = 3;
518 break;
519 case FAN_CTRL_MODE_TEMPERATURE:
520 mode = 2;
521 break;
522 default: /* MANUAL */
523 mode = 1;
524 }
525
526 return sprintf(buf, "%d\n", mode);
527}
528
529static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr,
530 const char *buf, size_t count)
531{
532 struct f71805f_data *data = dev_get_drvdata(dev);
533 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
534 int nr = attr->index;
535 unsigned long val = simple_strtoul(buf, NULL, 10);
536
537 if (val > 255)
538 return -EINVAL;
539
540 mutex_lock(&data->update_lock);
541 data->pwm[nr] = val;
542 f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]);
543 mutex_unlock(&data->update_lock);
544
545 return count;
546}
547
548static struct attribute *f71805f_attr_pwm[];
549
550static ssize_t set_pwm_enable(struct device *dev, struct device_attribute
551 *devattr, const char *buf, size_t count)
552{
553 struct f71805f_data *data = dev_get_drvdata(dev);
554 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
555 int nr = attr->index;
556 unsigned long val = simple_strtoul(buf, NULL, 10);
557 u8 reg;
558
559 if (val < 1 || val > 3)
560 return -EINVAL;
561
562 if (val > 1) { /* Automatic mode, user can't set PWM value */
563 if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
564 S_IRUGO))
565 dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1);
566 }
567
568 mutex_lock(&data->update_lock);
569 reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr))
570 & ~FAN_CTRL_MODE_MASK;
571 switch (val) {
572 case 1:
573 reg |= FAN_CTRL_MODE_MANUAL;
574 break;
575 case 2:
576 reg |= FAN_CTRL_MODE_TEMPERATURE;
577 break;
578 case 3:
579 reg |= FAN_CTRL_MODE_SPEED;
580 break;
581 }
582 data->fan_ctrl[nr] = reg;
583 f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg);
584 mutex_unlock(&data->update_lock);
585
586 if (val == 1) { /* Manual mode, user can set PWM value */
587 if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
588 S_IRUGO | S_IWUSR))
589 dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1);
590 }
591
592 return count;
593}
594
e53004e2
JD		 595static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
596 char *buf)
597{
598 struct f71805f_data *data = f71805f_update_device(dev);
599 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
600 int nr = attr->index;
601
602 return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
603}
604
605static ssize_t show_temp_max(struct device *dev, struct device_attribute
606 *devattr, char *buf)
607{
608 struct f71805f_data *data = f71805f_update_device(dev);
609 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
610 int nr = attr->index;
611
612 return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr]));
613}
614
615static ssize_t show_temp_hyst(struct device *dev, struct device_attribute
616 *devattr, char *buf)
617{
618 struct f71805f_data *data = f71805f_update_device(dev);
619 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
620 int nr = attr->index;
621
622 return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr]));
623}
624
625static ssize_t show_temp_type(struct device *dev, struct device_attribute
626 *devattr, char *buf)
627{
628 struct f71805f_data *data = f71805f_update_device(dev);
629 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
630 int nr = attr->index;
631
632 /* 3 is diode, 4 is thermistor */
633 return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4);
634}
635
636static ssize_t set_temp_max(struct device *dev, struct device_attribute
637 *devattr, const char *buf, size_t count)
638{
639 struct f71805f_data *data = dev_get_drvdata(dev);
640 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
641 int nr = attr->index;
642 long val = simple_strtol(buf, NULL, 10);
643
f0819184 644 mutex_lock(&data->update_lock);
e53004e2
JD		 645 data->temp_high[nr] = temp_to_reg(val);
646 f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]);
f0819184 647 mutex_unlock(&data->update_lock);
e53004e2
JD		 648
649 return count;
650}
651
652static ssize_t set_temp_hyst(struct device *dev, struct device_attribute
653 *devattr, const char *buf, size_t count)
654{
655 struct f71805f_data *data = dev_get_drvdata(dev);
656 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
657 int nr = attr->index;
658 long val = simple_strtol(buf, NULL, 10);
659
f0819184 660 mutex_lock(&data->update_lock);
e53004e2
JD		 661 data->temp_hyst[nr] = temp_to_reg(val);
662 f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]);
f0819184 663 mutex_unlock(&data->update_lock);
e53004e2
JD		 664
665 return count;
666}
667
e53004e2
JD		 668static ssize_t show_alarms_in(struct device *dev, struct device_attribute
669 *devattr, char *buf)
670{
671 struct f71805f_data *data = f71805f_update_device(dev);
672
2d45771e 673 return sprintf(buf, "%lu\n", data->alarms & 0x1ff);
e53004e2
JD		 674}
675
676static ssize_t show_alarms_fan(struct device *dev, struct device_attribute
677 *devattr, char *buf)
678{
679 struct f71805f_data *data = f71805f_update_device(dev);
680
2d45771e 681 return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07);
e53004e2
JD		 682}
683
684static ssize_t show_alarms_temp(struct device *dev, struct device_attribute
685 *devattr, char *buf)
686{
687 struct f71805f_data *data = f71805f_update_device(dev);
688
2d45771e
JD		 689 return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07);
690}
691
692static ssize_t show_alarm(struct device *dev, struct device_attribute
693 *devattr, char *buf)
694{
695 struct f71805f_data *data = f71805f_update_device(dev);
696 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
697 int bitnr = attr->index;
698
699 return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1);
e53004e2
JD		 700}
701
e53004e2
JD		 702static ssize_t show_name(struct device *dev, struct device_attribute
703 *devattr, char *buf)
704{
705 struct f71805f_data *data = dev_get_drvdata(dev);
706
707 return sprintf(buf, "%s\n", data->name);
708}
709
0e39e01c
JD		 710static DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL);
711static DEVICE_ATTR(in0_max, S_IRUGO| S_IWUSR, show_in0_max, set_in0_max);
712static DEVICE_ATTR(in0_min, S_IRUGO| S_IWUSR, show_in0_min, set_in0_min);
713static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1);
714static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR,
715 show_in_max, set_in_max, 1);
716static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR,
717 show_in_min, set_in_min, 1);
718static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2);
719static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR,
720 show_in_max, set_in_max, 2);
721static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR,
722 show_in_min, set_in_min, 2);
723static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3);
724static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR,
725 show_in_max, set_in_max, 3);
726static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR,
727 show_in_min, set_in_min, 3);
728static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4);
729static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR,
730 show_in_max, set_in_max, 4);
731static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR,
732 show_in_min, set_in_min, 4);
733static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5);
734static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR,
735 show_in_max, set_in_max, 5);
736static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR,
737 show_in_min, set_in_min, 5);
738static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6);
739static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR,
740 show_in_max, set_in_max, 6);
741static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR,
742 show_in_min, set_in_min, 6);
743static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7);
744static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR,
745 show_in_max, set_in_max, 7);
746static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR,
747 show_in_min, set_in_min, 7);
748static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8);
749static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR,
750 show_in_max, set_in_max, 8);
751static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR,
752 show_in_min, set_in_min, 8);
753
754static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
755static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
756 show_fan_min, set_fan_min, 0);
757static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
758static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
759 show_fan_min, set_fan_min, 1);
760static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
761static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
762 show_fan_min, set_fan_min, 2);
763
764static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
765static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR,
766 show_temp_max, set_temp_max, 0);
767static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR,
768 show_temp_hyst, set_temp_hyst, 0);
769static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0);
770static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1);
771static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR,
772 show_temp_max, set_temp_max, 1);
773static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR,
774 show_temp_hyst, set_temp_hyst, 1);
775static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1);
776static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2);
777static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR,
778 show_temp_max, set_temp_max, 2);
779static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR,
780 show_temp_hyst, set_temp_hyst, 2);
781static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2);
782
95e35312
JD		 783/* pwm (value) files are created read-only, write permission is
784 then added or removed dynamically as needed */
785static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0);
786static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
787 show_pwm_enable, set_pwm_enable, 0);
788static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1);
789static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
790 show_pwm_enable, set_pwm_enable, 1);
791static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2);
792static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
793 show_pwm_enable, set_pwm_enable, 2);
794
0e39e01c
JD		 795static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
796static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
797static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
798static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
799static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
800static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
801static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
802static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
803static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
804static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11);
805static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12);
806static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
807static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16);
808static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17);
809static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18);
810static DEVICE_ATTR(alarms_in, S_IRUGO, show_alarms_in, NULL);
811static DEVICE_ATTR(alarms_fan, S_IRUGO, show_alarms_fan, NULL);
812static DEVICE_ATTR(alarms_temp, S_IRUGO, show_alarms_temp, NULL);
813
814static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
815
816static struct attribute *f71805f_attributes[] = {
817 &dev_attr_in0_input.attr,
818 &dev_attr_in0_max.attr,
819 &dev_attr_in0_min.attr,
820 &sensor_dev_attr_in1_input.dev_attr.attr,
821 &sensor_dev_attr_in1_max.dev_attr.attr,
822 &sensor_dev_attr_in1_min.dev_attr.attr,
823 &sensor_dev_attr_in2_input.dev_attr.attr,
824 &sensor_dev_attr_in2_max.dev_attr.attr,
825 &sensor_dev_attr_in2_min.dev_attr.attr,
826 &sensor_dev_attr_in3_input.dev_attr.attr,
827 &sensor_dev_attr_in3_max.dev_attr.attr,
828 &sensor_dev_attr_in3_min.dev_attr.attr,
829 &sensor_dev_attr_in4_input.dev_attr.attr,
830 &sensor_dev_attr_in4_max.dev_attr.attr,
831 &sensor_dev_attr_in4_min.dev_attr.attr,
832 &sensor_dev_attr_in5_input.dev_attr.attr,
833 &sensor_dev_attr_in5_max.dev_attr.attr,
834 &sensor_dev_attr_in5_min.dev_attr.attr,
835 &sensor_dev_attr_in6_input.dev_attr.attr,
836 &sensor_dev_attr_in6_max.dev_attr.attr,
837 &sensor_dev_attr_in6_min.dev_attr.attr,
838 &sensor_dev_attr_in7_input.dev_attr.attr,
839 &sensor_dev_attr_in7_max.dev_attr.attr,
840 &sensor_dev_attr_in7_min.dev_attr.attr,
841 &sensor_dev_attr_in8_input.dev_attr.attr,
842 &sensor_dev_attr_in8_max.dev_attr.attr,
843 &sensor_dev_attr_in8_min.dev_attr.attr,
844
845 &sensor_dev_attr_temp1_input.dev_attr.attr,
846 &sensor_dev_attr_temp1_max.dev_attr.attr,
847 &sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
848 &sensor_dev_attr_temp1_type.dev_attr.attr,
849 &sensor_dev_attr_temp2_input.dev_attr.attr,
850 &sensor_dev_attr_temp2_max.dev_attr.attr,
851 &sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
852 &sensor_dev_attr_temp2_type.dev_attr.attr,
853 &sensor_dev_attr_temp3_input.dev_attr.attr,
854 &sensor_dev_attr_temp3_max.dev_attr.attr,
855 &sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
856 &sensor_dev_attr_temp3_type.dev_attr.attr,
857
858 &sensor_dev_attr_in0_alarm.dev_attr.attr,
859 &sensor_dev_attr_in1_alarm.dev_attr.attr,
860 &sensor_dev_attr_in2_alarm.dev_attr.attr,
861 &sensor_dev_attr_in3_alarm.dev_attr.attr,
862 &sensor_dev_attr_in4_alarm.dev_attr.attr,
863 &sensor_dev_attr_in5_alarm.dev_attr.attr,
864 &sensor_dev_attr_in6_alarm.dev_attr.attr,
865 &sensor_dev_attr_in7_alarm.dev_attr.attr,
866 &sensor_dev_attr_in8_alarm.dev_attr.attr,
867 &dev_attr_alarms_in.attr,
868 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
869 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
870 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
871 &dev_attr_alarms_temp.attr,
872 &dev_attr_alarms_fan.attr,
873
874 &dev_attr_name.attr,
875 NULL
2488a39d
JD		 876};
877
0e39e01c
JD		 878static const struct attribute_group f71805f_group = {
879 .attrs = f71805f_attributes,
2488a39d
JD		 880};
881
95e35312 882static struct attribute *f71805f_attributes_fan[3][6] = {
0e39e01c
JD		 883 {
884 &sensor_dev_attr_fan1_input.dev_attr.attr,
885 &sensor_dev_attr_fan1_min.dev_attr.attr,
886 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
95e35312
JD		 887 &sensor_dev_attr_pwm1.dev_attr.attr,
888 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
0e39e01c
JD		 889 NULL
890 }, {
891 &sensor_dev_attr_fan2_input.dev_attr.attr,
892 &sensor_dev_attr_fan2_min.dev_attr.attr,
893 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
95e35312
JD		 894 &sensor_dev_attr_pwm2.dev_attr.attr,
895 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
0e39e01c
JD		 896 NULL
897 }, {
898 &sensor_dev_attr_fan3_input.dev_attr.attr,
899 &sensor_dev_attr_fan3_min.dev_attr.attr,
900 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
95e35312
JD		 901 &sensor_dev_attr_pwm3.dev_attr.attr,
902 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
0e39e01c
JD		 903 NULL
904 }
905};
906
907static const struct attribute_group f71805f_group_fan[3] = {
908 { .attrs = f71805f_attributes_fan[0] },
909 { .attrs = f71805f_attributes_fan[1] },
910 { .attrs = f71805f_attributes_fan[2] },
2488a39d 911};
e53004e2 912
95e35312
JD		 913/* We also need an indexed access to pwmN files to toggle writability */
914static struct attribute *f71805f_attr_pwm[] = {
915 &sensor_dev_attr_pwm1.dev_attr.attr,
916 &sensor_dev_attr_pwm2.dev_attr.attr,
917 &sensor_dev_attr_pwm3.dev_attr.attr,
918};
919
e53004e2
JD		 920/*
921 * Device registration and initialization
922 */
923
924static void __devinit f71805f_init_device(struct f71805f_data *data)
925{
926 u8 reg;
927 int i;
928
929 reg = f71805f_read8(data, F71805F_REG_START);
930 if ((reg & 0x41) != 0x01) {
931 printk(KERN_DEBUG DRVNAME ": Starting monitoring "
932 "operations\n");
933 f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40);
934 }
935
936 /* Fan monitoring can be disabled. If it is, we won't be polling
937 the register values, and won't create the related sysfs files. */
938 for (i = 0; i < 3; i++) {
6b14a546
JD		 939 data->fan_ctrl[i] = f71805f_read8(data,
940 F71805F_REG_FAN_CTRL(i));
e53004e2
JD		 941 }
942}
943
944static int __devinit f71805f_probe(struct platform_device *pdev)
945{
946 struct f71805f_data *data;
947 struct resource *res;
2488a39d 948 int i, err;
e53004e2
JD		 949
950 if (!(data = kzalloc(sizeof(struct f71805f_data), GFP_KERNEL))) {
951 err = -ENOMEM;
952 printk(KERN_ERR DRVNAME ": Out of memory\n");
953 goto exit;
954 }
955
956 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
957 data->addr = res->start;
f0819184 958 mutex_init(&data->lock);
e53004e2 959 data->name = "f71805f";
f0819184 960 mutex_init(&data->update_lock);
e53004e2
JD		 961
962 platform_set_drvdata(pdev, data);
963
e53004e2
JD		 964 /* Initialize the F71805F chip */
965 f71805f_init_device(data);
966
967 /* Register sysfs interface files */
0e39e01c
JD		 968 if ((err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group)))
969 goto exit_free;
970 for (i = 0; i < 3; i++) {
6b14a546 971 if (data->fan_ctrl[i] & FAN_CTRL_SKIP)
2488a39d 972 continue;
0e39e01c
JD		 973 if ((err = sysfs_create_group(&pdev->dev.kobj,
974 &f71805f_group_fan[i])))
975 goto exit_remove_files;
95e35312
JD		 976 /* If PWM is in manual mode, add write permission */
977 if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) {
978 if ((err = sysfs_chmod_file(&pdev->dev.kobj,
979 f71805f_attr_pwm[i],
980 S_IRUGO | S_IWUSR))) {
981 dev_err(&pdev->dev, "chmod +w pwm%d failed\n",
982 i + 1);
983 goto exit_remove_files;
984 }
985 }
0e39e01c
JD		 986 }
987
988 data->class_dev = hwmon_device_register(&pdev->dev);
989 if (IS_ERR(data->class_dev)) {
990 err = PTR_ERR(data->class_dev);
991 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
992 goto exit_remove_files;
e53004e2 993 }
e53004e2
JD		 994
995 return 0;
996
0e39e01c
JD		 997exit_remove_files:
998 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
999 for (i = 0; i < 3; i++)
1000 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_fan[i]);
e53004e2 1001exit_free:
0e39e01c 1002 platform_set_drvdata(pdev, NULL);
e53004e2
JD		 1003 kfree(data);
1004exit:
1005 return err;
1006}
1007
1008static int __devexit f71805f_remove(struct platform_device *pdev)
1009{
1010 struct f71805f_data *data = platform_get_drvdata(pdev);
0e39e01c 1011 int i;
e53004e2
JD		 1012
1013 platform_set_drvdata(pdev, NULL);
1014 hwmon_device_unregister(data->class_dev);
0e39e01c
JD		 1015 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
1016 for (i = 0; i < 3; i++)
1017 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_fan[i]);
e53004e2
JD		 1018 kfree(data);
1019
1020 return 0;
1021}
1022
1023static struct platform_driver f71805f_driver = {
1024 .driver = {
1025 .owner = THIS_MODULE,
1026 .name = DRVNAME,
1027 },
1028 .probe = f71805f_probe,
1029 .remove = __devexit_p(f71805f_remove),
1030};
1031
1032static int __init f71805f_device_add(unsigned short address)
1033{
568825c8
JD		 1034 struct resource res = {
1035 .start = address,
1036 .end = address + REGION_LENGTH - 1,
1037 .flags = IORESOURCE_IO,
1038 };
e53004e2
JD		 1039 int err;
1040
1041 pdev = platform_device_alloc(DRVNAME, address);
1042 if (!pdev) {
1043 err = -ENOMEM;
1044 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1045 goto exit;
1046 }
1047
568825c8
JD		 1048 res.name = pdev->name;
1049 err = platform_device_add_resources(pdev, &res, 1);
e53004e2
JD		 1050 if (err) {
1051 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1052 "(%d)\n", err);
1053 goto exit_device_put;
1054 }
1055
1056 err = platform_device_add(pdev);
1057 if (err) {
1058 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1059 err);
1060 goto exit_device_put;
1061 }
1062
1063 return 0;
1064
1065exit_device_put:
1066 platform_device_put(pdev);
1067exit:
1068 return err;
1069}
1070
1071static int __init f71805f_find(int sioaddr, unsigned short *address)
1072{
1073 int err = -ENODEV;
1074 u16 devid;
1075
1076 superio_enter(sioaddr);
1077
1078 devid = superio_inw(sioaddr, SIO_REG_MANID);
1079 if (devid != SIO_FINTEK_ID)
1080 goto exit;
1081
1082 devid = superio_inw(sioaddr, SIO_REG_DEVID);
1083 if (devid != SIO_F71805F_ID) {
1084 printk(KERN_INFO DRVNAME ": Unsupported Fintek device, "
1085 "skipping\n");
1086 goto exit;
1087 }
1088
1089 superio_select(sioaddr, F71805F_LD_HWM);
1090 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
1091 printk(KERN_WARNING DRVNAME ": Device not activated, "
1092 "skipping\n");
1093 goto exit;
1094 }
1095
1096 *address = superio_inw(sioaddr, SIO_REG_ADDR);
1097 if (*address == 0) {
1098 printk(KERN_WARNING DRVNAME ": Base address not set, "
1099 "skipping\n");
1100 goto exit;
1101 }
1102
1103 err = 0;
1104 printk(KERN_INFO DRVNAME ": Found F71805F chip at %#x, revision %u\n",
1105 *address, superio_inb(sioaddr, SIO_REG_DEVREV));
1106
1107exit:
1108 superio_exit(sioaddr);
1109 return err;
1110}
1111
1112static int __init f71805f_init(void)
1113{
1114 int err;
1115 unsigned short address;
1116
1117 if (f71805f_find(0x2e, &address)
1118 && f71805f_find(0x4e, &address))
1119 return -ENODEV;
1120
1121 err = platform_driver_register(&f71805f_driver);
1122 if (err)
1123 goto exit;
1124
1125 /* Sets global pdev as a side effect */
1126 err = f71805f_device_add(address);
1127 if (err)
1128 goto exit_driver;
1129
1130 return 0;
1131
1132exit_driver:
1133 platform_driver_unregister(&f71805f_driver);
1134exit:
1135 return err;
1136}
1137
1138static void __exit f71805f_exit(void)
1139{
1140 platform_device_unregister(pdev);
1141 platform_driver_unregister(&f71805f_driver);
1142}
1143
1144MODULE_AUTHOR("Jean Delvare <khali@linux-fr>");
1145MODULE_LICENSE("GPL");
1146MODULE_DESCRIPTION("F71805F hardware monitoring driver");
1147
1148module_init(f71805f_init);
1149module_exit(f71805f_exit);
Linux 6.x block layer and io_uring tree(s)