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sched/cputime: Add vtime guest task state
[linux-2.6-block.git] / drivers / hwmon / f71805f.c
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74ba9207 1// SPDX-License-Identifier: GPL-2.0-or-later
e53004e2 2/*
51c997d8
JD		 3 * f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O
4 * chips integrated hardware monitoring features
7c81c60f 5 * Copyright (C) 2005-2006 Jean Delvare <jdelvare@suse.de>
e53004e2
JD		 6 *
7 * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates
8 * complete hardware monitoring features: voltage, fan and temperature
9 * sensors, and manual and automatic fan speed control.
10 *
51c997d8
JD		 11 * The F71872F/FG is almost the same, with two more voltages monitored,
12 * and 6 VID inputs.
13 *
9cab0217
JD		 14 * The F71806F/FG is essentially the same as the F71872F/FG. It even has
15 * the same chip ID, so the driver can't differentiate between.
e53004e2
JD		 16 */
17
e54c5ad6
JP		 18#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19
e53004e2
JD		 20#include <linux/module.h>
21#include <linux/init.h>
22#include <linux/slab.h>
23#include <linux/jiffies.h>
24#include <linux/platform_device.h>
25#include <linux/hwmon.h>
26#include <linux/hwmon-sysfs.h>
27#include <linux/err.h>
f0819184 28#include <linux/mutex.h>
0e39e01c 29#include <linux/sysfs.h>
ce7ee4e8 30#include <linux/ioport.h>
b9acb64a 31#include <linux/acpi.h>
6055fae8 32#include <linux/io.h>
e53004e2 33
67b671bc
JD		 34static unsigned short force_id;
35module_param(force_id, ushort, 0);
36MODULE_PARM_DESC(force_id, "Override the detected device ID");
37
e53004e2
JD		 38static struct platform_device *pdev;
39
40#define DRVNAME "f71805f"
51c997d8 41enum kinds { f71805f, f71872f };
e53004e2
JD		 42
43/*
44 * Super-I/O constants and functions
45 */
46
47#define F71805F_LD_HWM 0x04
48
49#define SIO_REG_LDSEL 0x07 /* Logical device select */
50#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
51#define SIO_REG_DEVREV 0x22 /* Device revision */
52#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
51c997d8 53#define SIO_REG_FNSEL1 0x29 /* Multi Function Select 1 (F71872F) */
e53004e2
JD		 54#define SIO_REG_ENABLE 0x30 /* Logical device enable */
55#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
56
57#define SIO_FINTEK_ID 0x1934
58#define SIO_F71805F_ID 0x0406
51c997d8 59#define SIO_F71872F_ID 0x0341
e53004e2
JD		 60
61static inline int
62superio_inb(int base, int reg)
63{
64 outb(reg, base);
65 return inb(base + 1);
66}
67
68static int
69superio_inw(int base, int reg)
70{
71 int val;
72 outb(reg++, base);
73 val = inb(base + 1) << 8;
74 outb(reg, base);
75 val |= inb(base + 1);
76 return val;
77}
78
79static inline void
80superio_select(int base, int ld)
81{
82 outb(SIO_REG_LDSEL, base);
83 outb(ld, base + 1);
84}
85
73e6ff71 86static inline int
e53004e2
JD		 87superio_enter(int base)
88{
73e6ff71
GR		 89 if (!request_muxed_region(base, 2, DRVNAME))
90 return -EBUSY;
91
e53004e2
JD		 92 outb(0x87, base);
93 outb(0x87, base);
73e6ff71
GR		 94
95 return 0;
e53004e2
JD		 96}
97
98static inline void
99superio_exit(int base)
100{
101 outb(0xaa, base);
73e6ff71 102 release_region(base, 2);
e53004e2
JD		 103}
104
105/*
106 * ISA constants
107 */
108
75c99029
JD		 109#define REGION_LENGTH 8
110#define ADDR_REG_OFFSET 5
111#define DATA_REG_OFFSET 6
e53004e2 112
e53004e2
JD		 113/*
114 * Registers
115 */
116
51c997d8 117/* in nr from 0 to 10 (8-bit values) */
e53004e2 118#define F71805F_REG_IN(nr) (0x10 + (nr))
51c997d8
JD		 119#define F71805F_REG_IN_HIGH(nr) ((nr) < 10 ? 0x40 + 2 * (nr) : 0x2E)
120#define F71805F_REG_IN_LOW(nr) ((nr) < 10 ? 0x41 + 2 * (nr) : 0x2F)
e53004e2
JD		 121/* fan nr from 0 to 2 (12-bit values, two registers) */
122#define F71805F_REG_FAN(nr) (0x20 + 2 * (nr))
123#define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr))
315c7113 124#define F71805F_REG_FAN_TARGET(nr) (0x69 + 16 * (nr))
e53004e2 125#define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr))
6e2bc17b 126#define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr))
95e35312 127#define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr))
e53004e2
JD		 128/* temp nr from 0 to 2 (8-bit values) */
129#define F71805F_REG_TEMP(nr) (0x1B + (nr))
130#define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr))
131#define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr))
132#define F71805F_REG_TEMP_MODE 0x01
aba5073d
PE		 133/* pwm/fan pwmnr from 0 to 2, auto point apnr from 0 to 2 */
134/* map Fintek numbers to our numbers as follows: 9->0, 5->1, 1->2 */
135#define F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr) \
136 (0xA0 + 0x10 * (pwmnr) + (2 - (apnr)))
137#define F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr) \
138 (0xA4 + 0x10 * (pwmnr) + \
139 2 * (2 - (apnr)))
e53004e2
JD		 140
141#define F71805F_REG_START 0x00
142/* status nr from 0 to 2 */
143#define F71805F_REG_STATUS(nr) (0x36 + (nr))
144
6b14a546 145/* individual register bits */
e196783d 146#define FAN_CTRL_DC_MODE 0x10
315c7113 147#define FAN_CTRL_LATCH_FULL 0x08
95e35312
JD		 148#define FAN_CTRL_MODE_MASK 0x03
149#define FAN_CTRL_MODE_SPEED 0x00
150#define FAN_CTRL_MODE_TEMPERATURE 0x01
151#define FAN_CTRL_MODE_MANUAL 0x02
6b14a546 152
e53004e2
JD		 153/*
154 * Data structures and manipulation thereof
155 */
156
aba5073d
PE		 157struct f71805f_auto_point {
158 u8 temp[3];
159 u16 fan[3];
160};
161
e53004e2
JD		 162struct f71805f_data {
163 unsigned short addr;
164 const char *name;
1beeffe4 165 struct device *hwmon_dev;
e53004e2 166
f0819184 167 struct mutex update_lock;
e53004e2
JD		 168 char valid; /* !=0 if following fields are valid */
169 unsigned long last_updated; /* In jiffies */
170 unsigned long last_limits; /* In jiffies */
171
172 /* Register values */
51c997d8
JD		 173 u8 in[11];
174 u8 in_high[11];
175 u8 in_low[11];
176 u16 has_in;
e53004e2
JD		 177 u16 fan[3];
178 u16 fan_low[3];
315c7113 179 u16 fan_target[3];
6b14a546 180 u8 fan_ctrl[3];
95e35312 181 u8 pwm[3];
6e2bc17b 182 u8 pwm_freq[3];
e53004e2
JD		 183 u8 temp[3];
184 u8 temp_high[3];
185 u8 temp_hyst[3];
186 u8 temp_mode;
2d45771e 187 unsigned long alarms;
aba5073d 188 struct f71805f_auto_point auto_points[3];
e53004e2
JD		 189};
190
51c997d8
JD		 191struct f71805f_sio_data {
192 enum kinds kind;
193 u8 fnsel1;
194};
195
e53004e2
JD		 196static inline long in_from_reg(u8 reg)
197{
7fe83ad8 198 return reg * 8;
e53004e2
JD		 199}
200
201/* The 2 least significant bits are not used */
202static inline u8 in_to_reg(long val)
203{
204 if (val <= 0)
205 return 0;
206 if (val >= 2016)
207 return 0xfc;
7fe83ad8 208 return ((val + 16) / 32) << 2;
e53004e2
JD		 209}
210
211/* in0 is downscaled by a factor 2 internally */
212static inline long in0_from_reg(u8 reg)
213{
7fe83ad8 214 return reg * 16;
e53004e2
JD		 215}
216
217static inline u8 in0_to_reg(long val)
218{
219 if (val <= 0)
220 return 0;
221 if (val >= 4032)
222 return 0xfc;
7fe83ad8 223 return ((val + 32) / 64) << 2;
e53004e2
JD		 224}
225
226/* The 4 most significant bits are not used */
227static inline long fan_from_reg(u16 reg)
228{
229 reg &= 0xfff;
230 if (!reg || reg == 0xfff)
231 return 0;
7fe83ad8 232 return 1500000 / reg;
e53004e2
JD		 233}
234
235static inline u16 fan_to_reg(long rpm)
236{
2fff0840
GR		 237 /*
238 * If the low limit is set below what the chip can measure,
239 * store the largest possible 12-bit value in the registers,
240 * so that no alarm will ever trigger.
241 */
e53004e2
JD		 242 if (rpm < 367)
243 return 0xfff;
7fe83ad8 244 return 1500000 / rpm;
e53004e2
JD		 245}
246
6e2bc17b
JD		 247static inline unsigned long pwm_freq_from_reg(u8 reg)
248{
249 unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL;
250
251 reg &= 0x7f;
252 if (reg == 0)
253 reg++;
254 return clock / (reg << 8);
255}
256
257static inline u8 pwm_freq_to_reg(unsigned long val)
258{
259 if (val >= 187500) /* The highest we can do */
260 return 0x80;
261 if (val >= 1475) /* Use 48 MHz clock */
262 return 0x80 | (48000000UL / (val << 8));
263 if (val < 31) /* The lowest we can do */
264 return 0x7f;
265 else /* Use 1 MHz clock */
266 return 1000000UL / (val << 8);
267}
268
e196783d
JD		 269static inline int pwm_mode_from_reg(u8 reg)
270{
271 return !(reg & FAN_CTRL_DC_MODE);
272}
273
e53004e2
JD		 274static inline long temp_from_reg(u8 reg)
275{
7fe83ad8 276 return reg * 1000;
e53004e2
JD		 277}
278
279static inline u8 temp_to_reg(long val)
280{
86b2bbfd
JD		 281 if (val <= 0)
282 return 0;
283 if (val >= 1000 * 0xff)
284 return 0xff;
285 return (val + 500) / 1000;
e53004e2
JD		 286}
287
288/*
289 * Device I/O access
290 */
291
7f999aa7 292/* Must be called with data->update_lock held, except during initialization */
e53004e2
JD		 293static u8 f71805f_read8(struct f71805f_data *data, u8 reg)
294{
e53004e2 295 outb(reg, data->addr + ADDR_REG_OFFSET);
7f999aa7 296 return inb(data->addr + DATA_REG_OFFSET);
e53004e2
JD		 297}
298
7f999aa7 299/* Must be called with data->update_lock held, except during initialization */
e53004e2
JD		 300static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val)
301{
e53004e2
JD		 302 outb(reg, data->addr + ADDR_REG_OFFSET);
303 outb(val, data->addr + DATA_REG_OFFSET);
e53004e2
JD		 304}
305
2fff0840
GR		 306/*
307 * It is important to read the MSB first, because doing so latches the
308 * value of the LSB, so we are sure both bytes belong to the same value.
309 * Must be called with data->update_lock held, except during initialization
310 */
e53004e2
JD		 311static u16 f71805f_read16(struct f71805f_data *data, u8 reg)
312{
313 u16 val;
314
e53004e2
JD		 315 outb(reg, data->addr + ADDR_REG_OFFSET);
316 val = inb(data->addr + DATA_REG_OFFSET) << 8;
317 outb(++reg, data->addr + ADDR_REG_OFFSET);
318 val |= inb(data->addr + DATA_REG_OFFSET);
e53004e2
JD		 319
320 return val;
321}
322
7f999aa7 323/* Must be called with data->update_lock held, except during initialization */
e53004e2
JD		 324static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val)
325{
e53004e2
JD		 326 outb(reg, data->addr + ADDR_REG_OFFSET);
327 outb(val >> 8, data->addr + DATA_REG_OFFSET);
328 outb(++reg, data->addr + ADDR_REG_OFFSET);
329 outb(val & 0xff, data->addr + DATA_REG_OFFSET);
e53004e2
JD		 330}
331
332static struct f71805f_data *f71805f_update_device(struct device *dev)
333{
334 struct f71805f_data *data = dev_get_drvdata(dev);
aba5073d 335 int nr, apnr;
e53004e2 336
f0819184 337 mutex_lock(&data->update_lock);
e53004e2
JD		 338
339 /* Limit registers cache is refreshed after 60 seconds */
340 if (time_after(jiffies, data->last_updated + 60 * HZ)
341 || !data->valid) {
51c997d8
JD		 342 for (nr = 0; nr < 11; nr++) {
343 if (!(data->has_in & (1 << nr)))
344 continue;
e53004e2
JD		 345 data->in_high[nr] = f71805f_read8(data,
346 F71805F_REG_IN_HIGH(nr));
347 data->in_low[nr] = f71805f_read8(data,
348 F71805F_REG_IN_LOW(nr));
349 }
350 for (nr = 0; nr < 3; nr++) {
6b14a546
JD		 351 data->fan_low[nr] = f71805f_read16(data,
352 F71805F_REG_FAN_LOW(nr));
315c7113
JD		 353 data->fan_target[nr] = f71805f_read16(data,
354 F71805F_REG_FAN_TARGET(nr));
6e2bc17b
JD		 355 data->pwm_freq[nr] = f71805f_read8(data,
356 F71805F_REG_PWM_FREQ(nr));
e53004e2
JD		 357 }
358 for (nr = 0; nr < 3; nr++) {
359 data->temp_high[nr] = f71805f_read8(data,
360 F71805F_REG_TEMP_HIGH(nr));
361 data->temp_hyst[nr] = f71805f_read8(data,
362 F71805F_REG_TEMP_HYST(nr));
363 }
364 data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE);
aba5073d
PE		 365 for (nr = 0; nr < 3; nr++) {
366 for (apnr = 0; apnr < 3; apnr++) {
367 data->auto_points[nr].temp[apnr] =
368 f71805f_read8(data,
369 F71805F_REG_PWM_AUTO_POINT_TEMP(nr,
370 apnr));
371 data->auto_points[nr].fan[apnr] =
372 f71805f_read16(data,
373 F71805F_REG_PWM_AUTO_POINT_FAN(nr,
374 apnr));
375 }
376 }
e53004e2
JD		 377
378 data->last_limits = jiffies;
379 }
380
381 /* Measurement registers cache is refreshed after 1 second */
382 if (time_after(jiffies, data->last_updated + HZ)
383 || !data->valid) {
51c997d8
JD		 384 for (nr = 0; nr < 11; nr++) {
385 if (!(data->has_in & (1 << nr)))
386 continue;
e53004e2
JD		 387 data->in[nr] = f71805f_read8(data,
388 F71805F_REG_IN(nr));
389 }
390 for (nr = 0; nr < 3; nr++) {
6b14a546
JD		 391 data->fan[nr] = f71805f_read16(data,
392 F71805F_REG_FAN(nr));
95e35312
JD		 393 data->fan_ctrl[nr] = f71805f_read8(data,
394 F71805F_REG_FAN_CTRL(nr));
395 data->pwm[nr] = f71805f_read8(data,
396 F71805F_REG_PWM_DUTY(nr));
e53004e2
JD		 397 }
398 for (nr = 0; nr < 3; nr++) {
399 data->temp[nr] = f71805f_read8(data,
400 F71805F_REG_TEMP(nr));
401 }
2d45771e
JD		 402 data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0))
403 + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8)
404 + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16);
e53004e2
JD		 405
406 data->last_updated = jiffies;
407 data->valid = 1;
408 }
409
f0819184 410 mutex_unlock(&data->update_lock);
e53004e2
JD		 411
412 return data;
413}
414
415/*
416 * Sysfs interface
417 */
418
419static ssize_t show_in0(struct device *dev, struct device_attribute *devattr,
420 char *buf)
421{
422 struct f71805f_data *data = f71805f_update_device(dev);
51c997d8
JD		 423 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
424 int nr = attr->index;
e53004e2 425
51c997d8 426 return sprintf(buf, "%ld\n", in0_from_reg(data->in[nr]));
e53004e2
JD		 427}
428
429static ssize_t show_in0_max(struct device *dev, struct device_attribute
430 *devattr, char *buf)
431{
432 struct f71805f_data *data = f71805f_update_device(dev);
51c997d8
JD		 433 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
434 int nr = attr->index;
e53004e2 435
51c997d8 436 return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[nr]));
e53004e2
JD		 437}
438
439static ssize_t show_in0_min(struct device *dev, struct device_attribute
440 *devattr, char *buf)
441{
442 struct f71805f_data *data = f71805f_update_device(dev);
51c997d8
JD		 443 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
444 int nr = attr->index;
e53004e2 445
51c997d8 446 return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[nr]));
e53004e2
JD		 447}
448
449static ssize_t set_in0_max(struct device *dev, struct device_attribute
450 *devattr, const char *buf, size_t count)
451{
452 struct f71805f_data *data = dev_get_drvdata(dev);
51c997d8
JD		 453 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
454 int nr = attr->index;
2fff0840
GR		 455 long val;
456 int err;
457
458 err = kstrtol(buf, 10, &val);
459 if (err)
460 return err;
e53004e2 461
f0819184 462 mutex_lock(&data->update_lock);
51c997d8
JD		 463 data->in_high[nr] = in0_to_reg(val);
464 f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
f0819184 465 mutex_unlock(&data->update_lock);
e53004e2
JD		 466
467 return count;
468}
469
470static ssize_t set_in0_min(struct device *dev, struct device_attribute
471 *devattr, const char *buf, size_t count)
472{
473 struct f71805f_data *data = dev_get_drvdata(dev);
51c997d8
JD		 474 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
475 int nr = attr->index;
2fff0840
GR		 476 long val;
477 int err;
478
479 err = kstrtol(buf, 10, &val);
480 if (err)
481 return err;
e53004e2 482
f0819184 483 mutex_lock(&data->update_lock);
51c997d8
JD		 484 data->in_low[nr] = in0_to_reg(val);
485 f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
f0819184 486 mutex_unlock(&data->update_lock);
e53004e2
JD		 487
488 return count;
489}
490
e53004e2
JD		 491static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
492 char *buf)
493{
494 struct f71805f_data *data = f71805f_update_device(dev);
495 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
496 int nr = attr->index;
497
498 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr]));
499}
500
501static ssize_t show_in_max(struct device *dev, struct device_attribute
502 *devattr, char *buf)
503{
504 struct f71805f_data *data = f71805f_update_device(dev);
505 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
506 int nr = attr->index;
507
508 return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr]));
509}
510
511static ssize_t show_in_min(struct device *dev, struct device_attribute
512 *devattr, char *buf)
513{
514 struct f71805f_data *data = f71805f_update_device(dev);
515 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
516 int nr = attr->index;
517
518 return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr]));
519}
520
521static ssize_t set_in_max(struct device *dev, struct device_attribute
522 *devattr, const char *buf, size_t count)
523{
524 struct f71805f_data *data = dev_get_drvdata(dev);
525 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
526 int nr = attr->index;
2fff0840
GR		 527 long val;
528 int err;
529
530 err = kstrtol(buf, 10, &val);
531 if (err)
532 return err;
e53004e2 533
f0819184 534 mutex_lock(&data->update_lock);
e53004e2
JD		 535 data->in_high[nr] = in_to_reg(val);
536 f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
f0819184 537 mutex_unlock(&data->update_lock);
e53004e2
JD		 538
539 return count;
540}
541
542static ssize_t set_in_min(struct device *dev, struct device_attribute
543 *devattr, const char *buf, size_t count)
544{
545 struct f71805f_data *data = dev_get_drvdata(dev);
546 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
547 int nr = attr->index;
2fff0840
GR		 548 long val;
549 int err;
550
551 err = kstrtol(buf, 10, &val);
552 if (err)
553 return err;
e53004e2 554
f0819184 555 mutex_lock(&data->update_lock);
e53004e2
JD		 556 data->in_low[nr] = in_to_reg(val);
557 f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
f0819184 558 mutex_unlock(&data->update_lock);
e53004e2
JD		 559
560 return count;
561}
562
e53004e2
JD		 563static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
564 char *buf)
565{
566 struct f71805f_data *data = f71805f_update_device(dev);
567 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
568 int nr = attr->index;
569
570 return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr]));
571}
572
573static ssize_t show_fan_min(struct device *dev, struct device_attribute
574 *devattr, char *buf)
575{
576 struct f71805f_data *data = f71805f_update_device(dev);
577 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
578 int nr = attr->index;
579
580 return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr]));
581}
582
315c7113
JD		 583static ssize_t show_fan_target(struct device *dev, struct device_attribute
584 *devattr, char *buf)
585{
586 struct f71805f_data *data = f71805f_update_device(dev);
587 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
588 int nr = attr->index;
589
590 return sprintf(buf, "%ld\n", fan_from_reg(data->fan_target[nr]));
591}
592
e53004e2
JD		 593static ssize_t set_fan_min(struct device *dev, struct device_attribute
594 *devattr, const char *buf, size_t count)
595{
596 struct f71805f_data *data = dev_get_drvdata(dev);
597 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
598 int nr = attr->index;
2fff0840
GR		 599 long val;
600 int err;
601
602 err = kstrtol(buf, 10, &val);
603 if (err)
604 return err;
e53004e2 605
f0819184 606 mutex_lock(&data->update_lock);
e53004e2
JD		 607 data->fan_low[nr] = fan_to_reg(val);
608 f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]);
f0819184 609 mutex_unlock(&data->update_lock);
e53004e2
JD		 610
611 return count;
612}
613
315c7113
JD		 614static ssize_t set_fan_target(struct device *dev, struct device_attribute
615 *devattr, const char *buf, size_t count)
616{
617 struct f71805f_data *data = dev_get_drvdata(dev);
618 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
619 int nr = attr->index;
2fff0840
GR		 620 long val;
621 int err;
622
623 err = kstrtol(buf, 10, &val);
624 if (err)
625 return err;
315c7113
JD		 626
627 mutex_lock(&data->update_lock);
628 data->fan_target[nr] = fan_to_reg(val);
629 f71805f_write16(data, F71805F_REG_FAN_TARGET(nr),
630 data->fan_target[nr]);
631 mutex_unlock(&data->update_lock);
632
633 return count;
634}
635
95e35312
JD		 636static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
637 char *buf)
638{
639 struct f71805f_data *data = f71805f_update_device(dev);
640 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
641 int nr = attr->index;
642
643 return sprintf(buf, "%d\n", (int)data->pwm[nr]);
644}
645
646static ssize_t show_pwm_enable(struct device *dev, struct device_attribute
647 *devattr, char *buf)
648{
649 struct f71805f_data *data = f71805f_update_device(dev);
650 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
651 int nr = attr->index;
652 int mode;
653
654 switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) {
655 case FAN_CTRL_MODE_SPEED:
656 mode = 3;
657 break;
658 case FAN_CTRL_MODE_TEMPERATURE:
659 mode = 2;
660 break;
661 default: /* MANUAL */
662 mode = 1;
663 }
664
665 return sprintf(buf, "%d\n", mode);
666}
667
6e2bc17b
JD		 668static ssize_t show_pwm_freq(struct device *dev, struct device_attribute
669 *devattr, char *buf)
670{
671 struct f71805f_data *data = f71805f_update_device(dev);
672 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
673 int nr = attr->index;
674
675 return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr]));
676}
677
e196783d
JD		 678static ssize_t show_pwm_mode(struct device *dev, struct device_attribute
679 *devattr, char *buf)
680{
681 struct f71805f_data *data = f71805f_update_device(dev);
682 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
683 int nr = attr->index;
684
685 return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr]));
686}
687
95e35312
JD		 688static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr,
689 const char *buf, size_t count)
690{
691 struct f71805f_data *data = dev_get_drvdata(dev);
692 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
693 int nr = attr->index;
2fff0840
GR		 694 unsigned long val;
695 int err;
696
697 err = kstrtoul(buf, 10, &val);
698 if (err)
699 return err;
95e35312
JD		 700
701 if (val > 255)
702 return -EINVAL;
703
704 mutex_lock(&data->update_lock);
705 data->pwm[nr] = val;
706 f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]);
707 mutex_unlock(&data->update_lock);
708
709 return count;
710}
711
712static struct attribute *f71805f_attr_pwm[];
713
714static ssize_t set_pwm_enable(struct device *dev, struct device_attribute
715 *devattr, const char *buf, size_t count)
716{
717 struct f71805f_data *data = dev_get_drvdata(dev);
718 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
719 int nr = attr->index;
95e35312 720 u8 reg;
2fff0840
GR		 721 unsigned long val;
722 int err;
723
724 err = kstrtoul(buf, 10, &val);
725 if (err)
726 return err;
95e35312
JD		 727
728 if (val < 1 || val > 3)
729 return -EINVAL;
730
731 if (val > 1) { /* Automatic mode, user can't set PWM value */
732 if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
733 S_IRUGO))
734 dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1);
735 }
736
737 mutex_lock(&data->update_lock);
738 reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr))
739 & ~FAN_CTRL_MODE_MASK;
740 switch (val) {
741 case 1:
742 reg |= FAN_CTRL_MODE_MANUAL;
743 break;
744 case 2:
745 reg |= FAN_CTRL_MODE_TEMPERATURE;
746 break;
747 case 3:
748 reg |= FAN_CTRL_MODE_SPEED;
749 break;
750 }
751 data->fan_ctrl[nr] = reg;
752 f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg);
753 mutex_unlock(&data->update_lock);
754
755 if (val == 1) { /* Manual mode, user can set PWM value */
756 if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
757 S_IRUGO | S_IWUSR))
758 dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1);
759 }
760
761 return count;
762}
763
6e2bc17b
JD		 764static ssize_t set_pwm_freq(struct device *dev, struct device_attribute
765 *devattr, const char *buf, size_t count)
766{
767 struct f71805f_data *data = dev_get_drvdata(dev);
768 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
769 int nr = attr->index;
2fff0840
GR		 770 unsigned long val;
771 int err;
772
773 err = kstrtoul(buf, 10, &val);
774 if (err)
775 return err;
6e2bc17b
JD		 776
777 mutex_lock(&data->update_lock);
778 data->pwm_freq[nr] = pwm_freq_to_reg(val);
779 f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]);
780 mutex_unlock(&data->update_lock);
781
782 return count;
783}
784
aba5073d
PE		 785static ssize_t show_pwm_auto_point_temp(struct device *dev,
786 struct device_attribute *devattr,
2fff0840 787 char *buf)
aba5073d
PE		 788{
789 struct f71805f_data *data = dev_get_drvdata(dev);
790 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
791 int pwmnr = attr->nr;
792 int apnr = attr->index;
793
794 return sprintf(buf, "%ld\n",
795 temp_from_reg(data->auto_points[pwmnr].temp[apnr]));
796}
797
798static ssize_t set_pwm_auto_point_temp(struct device *dev,
799 struct device_attribute *devattr,
2fff0840 800 const char *buf, size_t count)
aba5073d
PE		 801{
802 struct f71805f_data *data = dev_get_drvdata(dev);
803 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
804 int pwmnr = attr->nr;
805 int apnr = attr->index;
2fff0840
GR		 806 unsigned long val;
807 int err;
808
809 err = kstrtoul(buf, 10, &val);
810 if (err)
811 return err;
aba5073d
PE		 812
813 mutex_lock(&data->update_lock);
814 data->auto_points[pwmnr].temp[apnr] = temp_to_reg(val);
815 f71805f_write8(data, F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr),
816 data->auto_points[pwmnr].temp[apnr]);
817 mutex_unlock(&data->update_lock);
818
819 return count;
820}
821
822static ssize_t show_pwm_auto_point_fan(struct device *dev,
823 struct device_attribute *devattr,
2fff0840 824 char *buf)
aba5073d
PE		 825{
826 struct f71805f_data *data = dev_get_drvdata(dev);
827 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
828 int pwmnr = attr->nr;
829 int apnr = attr->index;
830
831 return sprintf(buf, "%ld\n",
832 fan_from_reg(data->auto_points[pwmnr].fan[apnr]));
833}
834
835static ssize_t set_pwm_auto_point_fan(struct device *dev,
836 struct device_attribute *devattr,
2fff0840 837 const char *buf, size_t count)
aba5073d
PE		 838{
839 struct f71805f_data *data = dev_get_drvdata(dev);
840 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
841 int pwmnr = attr->nr;
842 int apnr = attr->index;
2fff0840
GR		 843 unsigned long val;
844 int err;
845
846 err = kstrtoul(buf, 10, &val);
847 if (err)
848 return err;
aba5073d
PE		 849
850 mutex_lock(&data->update_lock);
851 data->auto_points[pwmnr].fan[apnr] = fan_to_reg(val);
852 f71805f_write16(data, F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr),
2fff0840 853 data->auto_points[pwmnr].fan[apnr]);
aba5073d
PE		 854 mutex_unlock(&data->update_lock);
855
856 return count;
857}
858
e53004e2
JD		 859static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
860 char *buf)
861{
862 struct f71805f_data *data = f71805f_update_device(dev);
863 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
864 int nr = attr->index;
865
866 return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
867}
868
869static ssize_t show_temp_max(struct device *dev, struct device_attribute
870 *devattr, char *buf)
871{
872 struct f71805f_data *data = f71805f_update_device(dev);
873 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
874 int nr = attr->index;
875
876 return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr]));
877}
878
879static ssize_t show_temp_hyst(struct device *dev, struct device_attribute
880 *devattr, char *buf)
881{
882 struct f71805f_data *data = f71805f_update_device(dev);
883 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
884 int nr = attr->index;
885
886 return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr]));
887}
888
889static ssize_t show_temp_type(struct device *dev, struct device_attribute
890 *devattr, char *buf)
891{
892 struct f71805f_data *data = f71805f_update_device(dev);
893 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
894 int nr = attr->index;
895
896 /* 3 is diode, 4 is thermistor */
897 return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4);
898}
899
900static ssize_t set_temp_max(struct device *dev, struct device_attribute
901 *devattr, const char *buf, size_t count)
902{
903 struct f71805f_data *data = dev_get_drvdata(dev);
904 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
905 int nr = attr->index;
2fff0840
GR		 906 long val;
907 int err;
908
909 err = kstrtol(buf, 10, &val);
910 if (err)
911 return err;
e53004e2 912
f0819184 913 mutex_lock(&data->update_lock);
e53004e2
JD		 914 data->temp_high[nr] = temp_to_reg(val);
915 f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]);
f0819184 916 mutex_unlock(&data->update_lock);
e53004e2
JD		 917
918 return count;
919}
920
921static ssize_t set_temp_hyst(struct device *dev, struct device_attribute
922 *devattr, const char *buf, size_t count)
923{
924 struct f71805f_data *data = dev_get_drvdata(dev);
925 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
926 int nr = attr->index;
2fff0840
GR		 927 long val;
928 int err;
929
930 err = kstrtol(buf, 10, &val);
931 if (err)
932 return err;
e53004e2 933
f0819184 934 mutex_lock(&data->update_lock);
e53004e2
JD		 935 data->temp_hyst[nr] = temp_to_reg(val);
936 f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]);
f0819184 937 mutex_unlock(&data->update_lock);
e53004e2
JD		 938
939 return count;
940}
941
8258e490 942static ssize_t alarms_in_show(struct device *dev, struct device_attribute
e53004e2
JD		 943 *devattr, char *buf)
944{
945 struct f71805f_data *data = f71805f_update_device(dev);
946
51c997d8 947 return sprintf(buf, "%lu\n", data->alarms & 0x7ff);
e53004e2
JD		 948}
949
8258e490 950static ssize_t alarms_fan_show(struct device *dev, struct device_attribute
e53004e2
JD		 951 *devattr, char *buf)
952{
953 struct f71805f_data *data = f71805f_update_device(dev);
954
2d45771e 955 return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07);
e53004e2
JD		 956}
957
8258e490 958static ssize_t alarms_temp_show(struct device *dev, struct device_attribute
e53004e2
JD		 959 *devattr, char *buf)
960{
961 struct f71805f_data *data = f71805f_update_device(dev);
962
2d45771e
JD		 963 return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07);
964}
965
966static ssize_t show_alarm(struct device *dev, struct device_attribute
967 *devattr, char *buf)
968{
969 struct f71805f_data *data = f71805f_update_device(dev);
970 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
971 int bitnr = attr->index;
972
973 return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1);
e53004e2
JD		 974}
975
8258e490 976static ssize_t name_show(struct device *dev, struct device_attribute
e53004e2
JD		 977 *devattr, char *buf)
978{
979 struct f71805f_data *data = dev_get_drvdata(dev);
980
981 return sprintf(buf, "%s\n", data->name);
982}
983
51c997d8 984static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL, 0);
2fff0840 985static SENSOR_DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
51c997d8 986 show_in0_max, set_in0_max, 0);
2fff0840 987static SENSOR_DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
51c997d8 988 show_in0_min, set_in0_min, 0);
0e39e01c
JD		 989static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1);
990static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR,
991 show_in_max, set_in_max, 1);
992static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR,
993 show_in_min, set_in_min, 1);
994static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2);
995static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR,
996 show_in_max, set_in_max, 2);
997static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR,
998 show_in_min, set_in_min, 2);
999static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3);
1000static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR,
1001 show_in_max, set_in_max, 3);
1002static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR,
1003 show_in_min, set_in_min, 3);
1004static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4);
1005static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR,
1006 show_in_max, set_in_max, 4);
1007static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR,
1008 show_in_min, set_in_min, 4);
1009static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5);
1010static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR,
1011 show_in_max, set_in_max, 5);
1012static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR,
1013 show_in_min, set_in_min, 5);
1014static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6);
1015static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR,
1016 show_in_max, set_in_max, 6);
1017static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR,
1018 show_in_min, set_in_min, 6);
1019static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7);
1020static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR,
1021 show_in_max, set_in_max, 7);
1022static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR,
1023 show_in_min, set_in_min, 7);
1024static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8);
1025static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR,
1026 show_in_max, set_in_max, 8);
1027static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR,
1028 show_in_min, set_in_min, 8);
51c997d8
JD		 1029static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in0, NULL, 9);
1030static SENSOR_DEVICE_ATTR(in9_max, S_IRUGO | S_IWUSR,
1031 show_in0_max, set_in0_max, 9);
1032static SENSOR_DEVICE_ATTR(in9_min, S_IRUGO | S_IWUSR,
1033 show_in0_min, set_in0_min, 9);
1034static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in0, NULL, 10);
1035static SENSOR_DEVICE_ATTR(in10_max, S_IRUGO | S_IWUSR,
1036 show_in0_max, set_in0_max, 10);
1037static SENSOR_DEVICE_ATTR(in10_min, S_IRUGO | S_IWUSR,
1038 show_in0_min, set_in0_min, 10);
0e39e01c
JD		 1039
1040static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
1041static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
1042 show_fan_min, set_fan_min, 0);
315c7113
JD		 1043static SENSOR_DEVICE_ATTR(fan1_target, S_IRUGO | S_IWUSR,
1044 show_fan_target, set_fan_target, 0);
0e39e01c
JD		 1045static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
1046static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
1047 show_fan_min, set_fan_min, 1);
315c7113
JD		 1048static SENSOR_DEVICE_ATTR(fan2_target, S_IRUGO | S_IWUSR,
1049 show_fan_target, set_fan_target, 1);
0e39e01c
JD		 1050static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
1051static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
1052 show_fan_min, set_fan_min, 2);
315c7113
JD		 1053static SENSOR_DEVICE_ATTR(fan3_target, S_IRUGO | S_IWUSR,
1054 show_fan_target, set_fan_target, 2);
0e39e01c
JD		 1055
1056static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
1057static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR,
1058 show_temp_max, set_temp_max, 0);
1059static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR,
1060 show_temp_hyst, set_temp_hyst, 0);
1061static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0);
1062static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1);
1063static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR,
1064 show_temp_max, set_temp_max, 1);
1065static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR,
1066 show_temp_hyst, set_temp_hyst, 1);
1067static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1);
1068static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2);
1069static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR,
1070 show_temp_max, set_temp_max, 2);
1071static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR,
1072 show_temp_hyst, set_temp_hyst, 2);
1073static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2);
1074
2fff0840
GR		 1075/*
1076 * pwm (value) files are created read-only, write permission is
1077 * then added or removed dynamically as needed
1078 */
95e35312
JD		 1079static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0);
1080static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1081 show_pwm_enable, set_pwm_enable, 0);
6e2bc17b
JD		 1082static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR,
1083 show_pwm_freq, set_pwm_freq, 0);
e196783d 1084static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0);
95e35312
JD		 1085static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1);
1086static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1087 show_pwm_enable, set_pwm_enable, 1);
6e2bc17b
JD		 1088static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR,
1089 show_pwm_freq, set_pwm_freq, 1);
e196783d 1090static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1);
95e35312
JD		 1091static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2);
1092static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1093 show_pwm_enable, set_pwm_enable, 2);
6e2bc17b
JD		 1094static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR,
1095 show_pwm_freq, set_pwm_freq, 2);
e196783d 1096static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2);
95e35312 1097
aba5073d
PE		 1098static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1099 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1100 0, 0);
1101static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_fan, S_IRUGO | S_IWUSR,
1102 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1103 0, 0);
1104static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1105 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1106 0, 1);
1107static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_fan, S_IRUGO | S_IWUSR,
1108 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1109 0, 1);
1110static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1111 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1112 0, 2);
1113static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_fan, S_IRUGO | S_IWUSR,
1114 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1115 0, 2);
1116
1117static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1118 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1119 1, 0);
1120static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_fan, S_IRUGO | S_IWUSR,
1121 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1122 1, 0);
1123static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1124 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1125 1, 1);
1126static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_fan, S_IRUGO | S_IWUSR,
1127 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1128 1, 1);
1129static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1130 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1131 1, 2);
1132static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_fan, S_IRUGO | S_IWUSR,
1133 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1134 1, 2);
1135
1136static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1137 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1138 2, 0);
1139static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_fan, S_IRUGO | S_IWUSR,
1140 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1141 2, 0);
1142static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1143 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1144 2, 1);
1145static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_fan, S_IRUGO | S_IWUSR,
1146 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1147 2, 1);
1148static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1149 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1150 2, 2);
1151static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_fan, S_IRUGO | S_IWUSR,
1152 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1153 2, 2);
1154
0e39e01c
JD		 1155static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
1156static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
1157static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
1158static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
1159static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
1160static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
1161static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
1162static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
1163static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
51c997d8
JD		 1164static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
1165static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
0e39e01c
JD		 1166static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11);
1167static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12);
1168static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
1169static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16);
1170static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17);
1171static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18);
8258e490
JL		 1172static DEVICE_ATTR_RO(alarms_in);
1173static DEVICE_ATTR_RO(alarms_fan);
1174static DEVICE_ATTR_RO(alarms_temp);
0e39e01c 1175
8258e490 1176static DEVICE_ATTR_RO(name);
0e39e01c
JD		 1177
1178static struct attribute *f71805f_attributes[] = {
51c997d8
JD		 1179 &sensor_dev_attr_in0_input.dev_attr.attr,
1180 &sensor_dev_attr_in0_max.dev_attr.attr,
1181 &sensor_dev_attr_in0_min.dev_attr.attr,
0e39e01c
JD		 1182 &sensor_dev_attr_in1_input.dev_attr.attr,
1183 &sensor_dev_attr_in1_max.dev_attr.attr,
1184 &sensor_dev_attr_in1_min.dev_attr.attr,
1185 &sensor_dev_attr_in2_input.dev_attr.attr,
1186 &sensor_dev_attr_in2_max.dev_attr.attr,
1187 &sensor_dev_attr_in2_min.dev_attr.attr,
1188 &sensor_dev_attr_in3_input.dev_attr.attr,
1189 &sensor_dev_attr_in3_max.dev_attr.attr,
1190 &sensor_dev_attr_in3_min.dev_attr.attr,
0e39e01c
JD		 1191 &sensor_dev_attr_in5_input.dev_attr.attr,
1192 &sensor_dev_attr_in5_max.dev_attr.attr,
1193 &sensor_dev_attr_in5_min.dev_attr.attr,
1194 &sensor_dev_attr_in6_input.dev_attr.attr,
1195 &sensor_dev_attr_in6_max.dev_attr.attr,
1196 &sensor_dev_attr_in6_min.dev_attr.attr,
1197 &sensor_dev_attr_in7_input.dev_attr.attr,
1198 &sensor_dev_attr_in7_max.dev_attr.attr,
1199 &sensor_dev_attr_in7_min.dev_attr.attr,
0e39e01c 1200
c7176cb5
JD		 1201 &sensor_dev_attr_fan1_input.dev_attr.attr,
1202 &sensor_dev_attr_fan1_min.dev_attr.attr,
1203 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1204 &sensor_dev_attr_fan1_target.dev_attr.attr,
1205 &sensor_dev_attr_fan2_input.dev_attr.attr,
1206 &sensor_dev_attr_fan2_min.dev_attr.attr,
1207 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1208 &sensor_dev_attr_fan2_target.dev_attr.attr,
1209 &sensor_dev_attr_fan3_input.dev_attr.attr,
1210 &sensor_dev_attr_fan3_min.dev_attr.attr,
1211 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1212 &sensor_dev_attr_fan3_target.dev_attr.attr,
1213
1214 &sensor_dev_attr_pwm1.dev_attr.attr,
1215 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1216 &sensor_dev_attr_pwm1_mode.dev_attr.attr,
1217 &sensor_dev_attr_pwm2.dev_attr.attr,
1218 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1219 &sensor_dev_attr_pwm2_mode.dev_attr.attr,
1220 &sensor_dev_attr_pwm3.dev_attr.attr,
1221 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1222 &sensor_dev_attr_pwm3_mode.dev_attr.attr,
1223
0e39e01c
JD		 1224 &sensor_dev_attr_temp1_input.dev_attr.attr,
1225 &sensor_dev_attr_temp1_max.dev_attr.attr,
1226 &sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
1227 &sensor_dev_attr_temp1_type.dev_attr.attr,
1228 &sensor_dev_attr_temp2_input.dev_attr.attr,
1229 &sensor_dev_attr_temp2_max.dev_attr.attr,
1230 &sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
1231 &sensor_dev_attr_temp2_type.dev_attr.attr,
1232 &sensor_dev_attr_temp3_input.dev_attr.attr,
1233 &sensor_dev_attr_temp3_max.dev_attr.attr,
1234 &sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
1235 &sensor_dev_attr_temp3_type.dev_attr.attr,
1236
aba5073d
PE		 1237 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1238 &sensor_dev_attr_pwm1_auto_point1_fan.dev_attr.attr,
1239 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1240 &sensor_dev_attr_pwm1_auto_point2_fan.dev_attr.attr,
1241 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1242 &sensor_dev_attr_pwm1_auto_point3_fan.dev_attr.attr,
1243 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1244 &sensor_dev_attr_pwm2_auto_point1_fan.dev_attr.attr,
1245 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1246 &sensor_dev_attr_pwm2_auto_point2_fan.dev_attr.attr,
1247 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1248 &sensor_dev_attr_pwm2_auto_point3_fan.dev_attr.attr,
1249 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1250 &sensor_dev_attr_pwm3_auto_point1_fan.dev_attr.attr,
1251 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1252 &sensor_dev_attr_pwm3_auto_point2_fan.dev_attr.attr,
1253 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1254 &sensor_dev_attr_pwm3_auto_point3_fan.dev_attr.attr,
1255
0e39e01c
JD		 1256 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1257 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1258 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1259 &sensor_dev_attr_in3_alarm.dev_attr.attr,
0e39e01c
JD		 1260 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1261 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1262 &sensor_dev_attr_in7_alarm.dev_attr.attr,
0e39e01c
JD		 1263 &dev_attr_alarms_in.attr,
1264 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1265 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1266 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1267 &dev_attr_alarms_temp.attr,
1268 &dev_attr_alarms_fan.attr,
1269
1270 &dev_attr_name.attr,
1271 NULL
2488a39d
JD		 1272};
1273
0e39e01c
JD		 1274static const struct attribute_group f71805f_group = {
1275 .attrs = f71805f_attributes,
2488a39d
JD		 1276};
1277
51c997d8
JD		 1278static struct attribute *f71805f_attributes_optin[4][5] = {
1279 {
1280 &sensor_dev_attr_in4_input.dev_attr.attr,
1281 &sensor_dev_attr_in4_max.dev_attr.attr,
1282 &sensor_dev_attr_in4_min.dev_attr.attr,
1283 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1284 NULL
1285 }, {
1286 &sensor_dev_attr_in8_input.dev_attr.attr,
1287 &sensor_dev_attr_in8_max.dev_attr.attr,
1288 &sensor_dev_attr_in8_min.dev_attr.attr,
1289 &sensor_dev_attr_in8_alarm.dev_attr.attr,
1290 NULL
1291 }, {
1292 &sensor_dev_attr_in9_input.dev_attr.attr,
1293 &sensor_dev_attr_in9_max.dev_attr.attr,
1294 &sensor_dev_attr_in9_min.dev_attr.attr,
1295 &sensor_dev_attr_in9_alarm.dev_attr.attr,
1296 NULL
1297 }, {
1298 &sensor_dev_attr_in10_input.dev_attr.attr,
1299 &sensor_dev_attr_in10_max.dev_attr.attr,
1300 &sensor_dev_attr_in10_min.dev_attr.attr,
1301 &sensor_dev_attr_in10_alarm.dev_attr.attr,
1302 NULL
1303 }
1304};
1305
1306static const struct attribute_group f71805f_group_optin[4] = {
1307 { .attrs = f71805f_attributes_optin[0] },
1308 { .attrs = f71805f_attributes_optin[1] },
1309 { .attrs = f71805f_attributes_optin[2] },
1310 { .attrs = f71805f_attributes_optin[3] },
1311};
1312
2fff0840
GR		 1313/*
1314 * We don't include pwm_freq files in the arrays above, because they must be
1315 * created conditionally (only if pwm_mode is 1 == PWM)
1316 */
e196783d
JD		 1317static struct attribute *f71805f_attributes_pwm_freq[] = {
1318 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1319 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1320 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1321 NULL
1322};
1323
1324static const struct attribute_group f71805f_group_pwm_freq = {
1325 .attrs = f71805f_attributes_pwm_freq,
1326};
1327
95e35312
JD		 1328/* We also need an indexed access to pwmN files to toggle writability */
1329static struct attribute *f71805f_attr_pwm[] = {
1330 &sensor_dev_attr_pwm1.dev_attr.attr,
1331 &sensor_dev_attr_pwm2.dev_attr.attr,
1332 &sensor_dev_attr_pwm3.dev_attr.attr,
1333};
1334
e53004e2
JD		 1335/*
1336 * Device registration and initialization
1337 */
1338
6c931ae1 1339static void f71805f_init_device(struct f71805f_data *data)
e53004e2
JD		 1340{
1341 u8 reg;
1342 int i;
1343
1344 reg = f71805f_read8(data, F71805F_REG_START);
1345 if ((reg & 0x41) != 0x01) {
692fe501 1346 pr_debug("Starting monitoring operations\n");
e53004e2
JD		 1347 f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40);
1348 }
1349
2fff0840
GR		 1350 /*
1351 * Fan monitoring can be disabled. If it is, we won't be polling
1352 * the register values, and won't create the related sysfs files.
1353 */
e53004e2 1354 for (i = 0; i < 3; i++) {
6b14a546
JD		 1355 data->fan_ctrl[i] = f71805f_read8(data,
1356 F71805F_REG_FAN_CTRL(i));
2fff0840
GR		 1357 /*
1358 * Clear latch full bit, else "speed mode" fan speed control
1359 * doesn't work
1360 */
315c7113
JD		 1361 if (data->fan_ctrl[i] & FAN_CTRL_LATCH_FULL) {
1362 data->fan_ctrl[i] &= ~FAN_CTRL_LATCH_FULL;
1363 f71805f_write8(data, F71805F_REG_FAN_CTRL(i),
1364 data->fan_ctrl[i]);
1365 }
e53004e2
JD		 1366 }
1367}
1368
6c931ae1 1369static int f71805f_probe(struct platform_device *pdev)
e53004e2 1370{
a8b3a3a5 1371 struct f71805f_sio_data *sio_data = dev_get_platdata(&pdev->dev);
e53004e2
JD		 1372 struct f71805f_data *data;
1373 struct resource *res;
2488a39d 1374 int i, err;
e53004e2 1375
2fff0840 1376 static const char * const names[] = {
51c997d8
JD		 1377 "f71805f",
1378 "f71872f",
1379 };
1380
adc14132
GR		 1381 data = devm_kzalloc(&pdev->dev, sizeof(struct f71805f_data),
1382 GFP_KERNEL);
b83207fd 1383 if (!data)
adc14132 1384 return -ENOMEM;
e53004e2
JD		 1385
1386 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
adc14132
GR		 1387 if (!devm_request_region(&pdev->dev, res->start + ADDR_REG_OFFSET, 2,
1388 DRVNAME)) {
ce7ee4e8
JD		 1389 dev_err(&pdev->dev, "Failed to request region 0x%lx-0x%lx\n",
1390 (unsigned long)(res->start + ADDR_REG_OFFSET),
1391 (unsigned long)(res->start + ADDR_REG_OFFSET + 1));
adc14132 1392 return -EBUSY;
ce7ee4e8 1393 }
e53004e2 1394 data->addr = res->start;
51c997d8 1395 data->name = names[sio_data->kind];
f0819184 1396 mutex_init(&data->update_lock);
e53004e2
JD		 1397
1398 platform_set_drvdata(pdev, data);
1399
51c997d8
JD		 1400 /* Some voltage inputs depend on chip model and configuration */
1401 switch (sio_data->kind) {
1402 case f71805f:
1403 data->has_in = 0x1ff;
1404 break;
1405 case f71872f:
1406 data->has_in = 0x6ef;
1407 if (sio_data->fnsel1 & 0x01)
1408 data->has_in |= (1 << 4); /* in4 */
1409 if (sio_data->fnsel1 & 0x02)
1410 data->has_in |= (1 << 8); /* in8 */
1411 break;
1412 }
1413
e53004e2
JD		 1414 /* Initialize the F71805F chip */
1415 f71805f_init_device(data);
1416
1417 /* Register sysfs interface files */
2fff0840
GR		 1418 err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group);
1419 if (err)
adc14132 1420 return err;
51c997d8 1421 if (data->has_in & (1 << 4)) { /* in4 */
2fff0840
GR		 1422 err = sysfs_create_group(&pdev->dev.kobj,
1423 &f71805f_group_optin[0]);
1424 if (err)
51c997d8
JD		 1425 goto exit_remove_files;
1426 }
1427 if (data->has_in & (1 << 8)) { /* in8 */
2fff0840
GR		 1428 err = sysfs_create_group(&pdev->dev.kobj,
1429 &f71805f_group_optin[1]);
1430 if (err)
51c997d8
JD		 1431 goto exit_remove_files;
1432 }
1433 if (data->has_in & (1 << 9)) { /* in9 (F71872F/FG only) */
2fff0840
GR		 1434 err = sysfs_create_group(&pdev->dev.kobj,
1435 &f71805f_group_optin[2]);
1436 if (err)
51c997d8
JD		 1437 goto exit_remove_files;
1438 }
1439 if (data->has_in & (1 << 10)) { /* in9 (F71872F/FG only) */
2fff0840
GR		 1440 err = sysfs_create_group(&pdev->dev.kobj,
1441 &f71805f_group_optin[3]);
1442 if (err)
51c997d8
JD		 1443 goto exit_remove_files;
1444 }
0e39e01c 1445 for (i = 0; i < 3; i++) {
e196783d
JD		 1446 /* If control mode is PWM, create pwm_freq file */
1447 if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) {
2fff0840
GR		 1448 err = sysfs_create_file(&pdev->dev.kobj,
1449 f71805f_attributes_pwm_freq[i]);
1450 if (err)
e196783d
JD		 1451 goto exit_remove_files;
1452 }
95e35312
JD		 1453 /* If PWM is in manual mode, add write permission */
1454 if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) {
2fff0840
GR		 1455 err = sysfs_chmod_file(&pdev->dev.kobj,
1456 f71805f_attr_pwm[i],
1457 S_IRUGO | S_IWUSR);
1458 if (err) {
95e35312
JD		 1459 dev_err(&pdev->dev, "chmod +w pwm%d failed\n",
1460 i + 1);
1461 goto exit_remove_files;
1462 }
1463 }
0e39e01c
JD		 1464 }
1465
1beeffe4
TJ		 1466 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1467 if (IS_ERR(data->hwmon_dev)) {
1468 err = PTR_ERR(data->hwmon_dev);
0e39e01c
JD		 1469 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
1470 goto exit_remove_files;
e53004e2 1471 }
e53004e2
JD		 1472
1473 return 0;
1474
0e39e01c
JD		 1475exit_remove_files:
1476 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
51c997d8
JD		 1477 for (i = 0; i < 4; i++)
1478 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
e196783d 1479 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
e53004e2
JD		 1480 return err;
1481}
1482
281dfd0b 1483static int f71805f_remove(struct platform_device *pdev)
e53004e2
JD		 1484{
1485 struct f71805f_data *data = platform_get_drvdata(pdev);
0e39e01c 1486 int i;
e53004e2 1487
1beeffe4 1488 hwmon_device_unregister(data->hwmon_dev);
0e39e01c 1489 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
51c997d8
JD		 1490 for (i = 0; i < 4; i++)
1491 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
e196783d 1492 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
ce7ee4e8 1493
e53004e2
JD		 1494 return 0;
1495}
1496
1497static struct platform_driver f71805f_driver = {
1498 .driver = {
e53004e2
JD		 1499 .name = DRVNAME,
1500 },
1501 .probe = f71805f_probe,
9e5e9b7a 1502 .remove = f71805f_remove,
e53004e2
JD		 1503};
1504
51c997d8
JD		 1505static int __init f71805f_device_add(unsigned short address,
1506 const struct f71805f_sio_data *sio_data)
e53004e2 1507{
568825c8
JD		 1508 struct resource res = {
1509 .start = address,
1510 .end = address + REGION_LENGTH - 1,
1511 .flags = IORESOURCE_IO,
1512 };
e53004e2
JD		 1513 int err;
1514
1515 pdev = platform_device_alloc(DRVNAME, address);
1516 if (!pdev) {
1517 err = -ENOMEM;
e54c5ad6 1518 pr_err("Device allocation failed\n");
e53004e2
JD		 1519 goto exit;
1520 }
1521
568825c8 1522 res.name = pdev->name;
b9acb64a
JD		 1523 err = acpi_check_resource_conflict(&res);
1524 if (err)
1525 goto exit_device_put;
1526
568825c8 1527 err = platform_device_add_resources(pdev, &res, 1);
e53004e2 1528 if (err) {
e54c5ad6 1529 pr_err("Device resource addition failed (%d)\n", err);
e53004e2
JD		 1530 goto exit_device_put;
1531 }
1532
2df6d811
JD		 1533 err = platform_device_add_data(pdev, sio_data,
1534 sizeof(struct f71805f_sio_data));
1535 if (err) {
e54c5ad6 1536 pr_err("Platform data allocation failed\n");
51c997d8
JD		 1537 goto exit_device_put;
1538 }
51c997d8 1539
e53004e2
JD		 1540 err = platform_device_add(pdev);
1541 if (err) {
e54c5ad6 1542 pr_err("Device addition failed (%d)\n", err);
a117dddf 1543 goto exit_device_put;
e53004e2
JD		 1544 }
1545
1546 return 0;
1547
1548exit_device_put:
1549 platform_device_put(pdev);
1550exit:
1551 return err;
1552}
1553
51c997d8
JD		 1554static int __init f71805f_find(int sioaddr, unsigned short *address,
1555 struct f71805f_sio_data *sio_data)
e53004e2 1556{
73e6ff71 1557 int err;
e53004e2
JD		 1558 u16 devid;
1559
2fff0840 1560 static const char * const names[] = {
51c997d8 1561 "F71805F/FG",
9cab0217 1562 "F71872F/FG or F71806F/FG",
51c997d8
JD		 1563 };
1564
73e6ff71
GR		 1565 err = superio_enter(sioaddr);
1566 if (err)
1567 return err;
e53004e2 1568
73e6ff71 1569 err = -ENODEV;
e53004e2
JD		 1570 devid = superio_inw(sioaddr, SIO_REG_MANID);
1571 if (devid != SIO_FINTEK_ID)
1572 goto exit;
1573
67b671bc 1574 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
51c997d8
JD		 1575 switch (devid) {
1576 case SIO_F71805F_ID:
1577 sio_data->kind = f71805f;
1578 break;
1579 case SIO_F71872F_ID:
1580 sio_data->kind = f71872f;
1581 sio_data->fnsel1 = superio_inb(sioaddr, SIO_REG_FNSEL1);
1582 break;
1583 default:
e54c5ad6 1584 pr_info("Unsupported Fintek device, skipping\n");
e53004e2
JD		 1585 goto exit;
1586 }
1587
1588 superio_select(sioaddr, F71805F_LD_HWM);
1589 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
e54c5ad6 1590 pr_warn("Device not activated, skipping\n");
e53004e2
JD		 1591 goto exit;
1592 }
1593
1594 *address = superio_inw(sioaddr, SIO_REG_ADDR);
1595 if (*address == 0) {
e54c5ad6 1596 pr_warn("Base address not set, skipping\n");
e53004e2
JD		 1597 goto exit;
1598 }
75c99029 1599 *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
e53004e2
JD		 1600
1601 err = 0;
e54c5ad6
JP		 1602 pr_info("Found %s chip at %#x, revision %u\n",
1603 names[sio_data->kind], *address,
1604 superio_inb(sioaddr, SIO_REG_DEVREV));
e53004e2
JD		 1605
1606exit:
1607 superio_exit(sioaddr);
1608 return err;
1609}
1610
1611static int __init f71805f_init(void)
1612{
1613 int err;
1614 unsigned short address;
51c997d8 1615 struct f71805f_sio_data sio_data;
e53004e2 1616
51c997d8
JD		 1617 if (f71805f_find(0x2e, &address, &sio_data)
1618 && f71805f_find(0x4e, &address, &sio_data))
e53004e2
JD		 1619 return -ENODEV;
1620
1621 err = platform_driver_register(&f71805f_driver);
1622 if (err)
1623 goto exit;
1624
1625 /* Sets global pdev as a side effect */
51c997d8 1626 err = f71805f_device_add(address, &sio_data);
e53004e2
JD		 1627 if (err)
1628 goto exit_driver;
1629
1630 return 0;
1631
1632exit_driver:
1633 platform_driver_unregister(&f71805f_driver);
1634exit:
1635 return err;
1636}
1637
1638static void __exit f71805f_exit(void)
1639{
1640 platform_device_unregister(pdev);
1641 platform_driver_unregister(&f71805f_driver);
1642}
1643
964f945b 1644MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
e53004e2 1645MODULE_LICENSE("GPL");
51c997d8 1646MODULE_DESCRIPTION("F71805F/F71872F hardware monitoring driver");
e53004e2
JD		 1647
1648module_init(f71805f_init);
1649module_exit(f71805f_exit);
Linux 6.x block layer and io_uring tree(s)