projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
hwmon: (dme1737) demacrofy for readability
[linux-2.6-block.git] / drivers / hwmon / dme1737.c
CommitLineData
9431996f 1/*
e95c237d
JH		 2 * dme1737.c - Driver for the SMSC DME1737, Asus A8000, and SMSC SCH311x
3 * Super-I/O chips integrated hardware monitoring features.
9431996f
JH		 4 * Copyright (c) 2007 Juerg Haefliger <juergh@gmail.com>
5 *
e95c237d
JH		 6 * This driver is an I2C/ISA hybrid, meaning that it uses the I2C bus to access
7 * the chip registers if a DME1737 (or A8000) is found and the ISA bus if a
8 * SCH311x chip is found. Both types of chips have very similar hardware
9 * monitoring capabilities but differ in the way they can be accessed.
9431996f
JH		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26#include <linux/module.h>
27#include <linux/init.h>
28#include <linux/slab.h>
29#include <linux/jiffies.h>
30#include <linux/i2c.h>
e95c237d 31#include <linux/platform_device.h>
9431996f
JH		 32#include <linux/hwmon.h>
33#include <linux/hwmon-sysfs.h>
34#include <linux/hwmon-vid.h>
35#include <linux/err.h>
36#include <linux/mutex.h>
37#include <asm/io.h>
38
e95c237d
JH		 39/* ISA device, if found */
40static struct platform_device *pdev;
41
9431996f
JH		 42/* Module load parameters */
43static int force_start;
44module_param(force_start, bool, 0);
45MODULE_PARM_DESC(force_start, "Force the chip to start monitoring inputs");
46
67b671bc
JD		 47static unsigned short force_id;
48module_param(force_id, ushort, 0);
49MODULE_PARM_DESC(force_id, "Override the detected device ID");
50
9431996f 51/* Addresses to scan */
25e9c86d 52static const unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END};
9431996f
JH		 53
54/* Insmod parameters */
55I2C_CLIENT_INSMOD_1(dme1737);
56
57/* ---------------------------------------------------------------------
58 * Registers
59 *
60 * The sensors are defined as follows:
61 *
62 * Voltages Temperatures
63 * -------- ------------
64 * in0 +5VTR (+5V stdby) temp1 Remote diode 1
65 * in1 Vccp (proc core) temp2 Internal temp
66 * in2 VCC (internal +3.3V) temp3 Remote diode 2
67 * in3 +5V
68 * in4 +12V
69 * in5 VTR (+3.3V stby)
70 * in6 Vbat
71 *
72 * --------------------------------------------------------------------- */
73
74/* Voltages (in) numbered 0-6 (ix) */
75#define DME1737_REG_IN(ix) ((ix) < 5 ? 0x20 + (ix) \
76 : 0x94 + (ix))
77#define DME1737_REG_IN_MIN(ix) ((ix) < 5 ? 0x44 + (ix) * 2 \
78 : 0x91 + (ix) * 2)
79#define DME1737_REG_IN_MAX(ix) ((ix) < 5 ? 0x45 + (ix) * 2 \
80 : 0x92 + (ix) * 2)
81
82/* Temperatures (temp) numbered 0-2 (ix) */
83#define DME1737_REG_TEMP(ix) (0x25 + (ix))
84#define DME1737_REG_TEMP_MIN(ix) (0x4e + (ix) * 2)
85#define DME1737_REG_TEMP_MAX(ix) (0x4f + (ix) * 2)
86#define DME1737_REG_TEMP_OFFSET(ix) ((ix) == 0 ? 0x1f \
87 : 0x1c + (ix))
88
89/* Voltage and temperature LSBs
90 * The LSBs (4 bits each) are stored in 5 registers with the following layouts:
91 * IN_TEMP_LSB(0) = [in5, in6]
92 * IN_TEMP_LSB(1) = [temp3, temp1]
93 * IN_TEMP_LSB(2) = [in4, temp2]
94 * IN_TEMP_LSB(3) = [in3, in0]
95 * IN_TEMP_LSB(4) = [in2, in1] */
96#define DME1737_REG_IN_TEMP_LSB(ix) (0x84 + (ix))
97static const u8 DME1737_REG_IN_LSB[] = {3, 4, 4, 3, 2, 0, 0};
98static const u8 DME1737_REG_IN_LSB_SHL[] = {4, 4, 0, 0, 0, 0, 4};
99static const u8 DME1737_REG_TEMP_LSB[] = {1, 2, 1};
100static const u8 DME1737_REG_TEMP_LSB_SHL[] = {4, 4, 0};
101
102/* Fans numbered 0-5 (ix) */
103#define DME1737_REG_FAN(ix) ((ix) < 4 ? 0x28 + (ix) * 2 \
104 : 0xa1 + (ix) * 2)
105#define DME1737_REG_FAN_MIN(ix) ((ix) < 4 ? 0x54 + (ix) * 2 \
106 : 0xa5 + (ix) * 2)
107#define DME1737_REG_FAN_OPT(ix) ((ix) < 4 ? 0x90 + (ix) \
108 : 0xb2 + (ix))
109#define DME1737_REG_FAN_MAX(ix) (0xb4 + (ix)) /* only for fan[4-5] */
110
111/* PWMs numbered 0-2, 4-5 (ix) */
112#define DME1737_REG_PWM(ix) ((ix) < 3 ? 0x30 + (ix) \
113 : 0xa1 + (ix))
114#define DME1737_REG_PWM_CONFIG(ix) (0x5c + (ix)) /* only for pwm[0-2] */
115#define DME1737_REG_PWM_MIN(ix) (0x64 + (ix)) /* only for pwm[0-2] */
116#define DME1737_REG_PWM_FREQ(ix) ((ix) < 3 ? 0x5f + (ix) \
117 : 0xa3 + (ix))
118/* The layout of the ramp rate registers is different from the other pwm
119 * registers. The bits for the 3 PWMs are stored in 2 registers:
120 * PWM_RR(0) = [OFF3, OFF2, OFF1, RES, RR1E, RR1-2, RR1-1, RR1-0]
121 * PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0] */
122#define DME1737_REG_PWM_RR(ix) (0x62 + (ix)) /* only for pwm[0-2] */
123
124/* Thermal zones 0-2 */
125#define DME1737_REG_ZONE_LOW(ix) (0x67 + (ix))
126#define DME1737_REG_ZONE_ABS(ix) (0x6a + (ix))
127/* The layout of the hysteresis registers is different from the other zone
128 * registers. The bits for the 3 zones are stored in 2 registers:
129 * ZONE_HYST(0) = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0]
130 * ZONE_HYST(1) = [H3-3, H3-2, H3-1, H3-0, RES, RES, RES, RES] */
131#define DME1737_REG_ZONE_HYST(ix) (0x6d + (ix))
132
133/* Alarm registers and bit mapping
134 * The 3 8-bit alarm registers will be concatenated to a single 32-bit
135 * alarm value [0, ALARM3, ALARM2, ALARM1]. */
136#define DME1737_REG_ALARM1 0x41
137#define DME1737_REG_ALARM2 0x42
138#define DME1737_REG_ALARM3 0x83
139static const u8 DME1737_BIT_ALARM_IN[] = {0, 1, 2, 3, 8, 16, 17};
140static const u8 DME1737_BIT_ALARM_TEMP[] = {4, 5, 6};
141static const u8 DME1737_BIT_ALARM_FAN[] = {10, 11, 12, 13, 22, 23};
142
143/* Miscellaneous registers */
e95c237d 144#define DME1737_REG_DEVICE 0x3d
9431996f
JH		 145#define DME1737_REG_COMPANY 0x3e
146#define DME1737_REG_VERSTEP 0x3f
147#define DME1737_REG_CONFIG 0x40
148#define DME1737_REG_CONFIG2 0x7f
149#define DME1737_REG_VID 0x43
150#define DME1737_REG_TACH_PWM 0x81
151
152/* ---------------------------------------------------------------------
153 * Misc defines
154 * --------------------------------------------------------------------- */
155
156/* Chip identification */
157#define DME1737_COMPANY_SMSC 0x5c
158#define DME1737_VERSTEP 0x88
159#define DME1737_VERSTEP_MASK 0xf8
e95c237d
JH		 160#define SCH311X_DEVICE 0x8c
161
162/* Length of ISA address segment */
163#define DME1737_EXTENT 2
9431996f
JH		 164
165/* ---------------------------------------------------------------------
166 * Data structures and manipulation thereof
167 * --------------------------------------------------------------------- */
168
e95c237d
JH		 169/* For ISA chips, we abuse the i2c_client addr and name fields. We also use
170 the driver field to differentiate between I2C and ISA chips. */
9431996f
JH		 171struct dme1737_data {
172 struct i2c_client client;
1beeffe4 173 struct device *hwmon_dev;
9431996f
JH		 174
175 struct mutex update_lock;
176 int valid; /* !=0 if following fields are valid */
177 unsigned long last_update; /* in jiffies */
178 unsigned long last_vbat; /* in jiffies */
179
180 u8 vid;
181 u8 pwm_rr_en;
182 u8 has_pwm;
183 u8 has_fan;
184
185 /* Register values */
186 u16 in[7];
187 u8 in_min[7];
188 u8 in_max[7];
189 s16 temp[3];
190 s8 temp_min[3];
191 s8 temp_max[3];
192 s8 temp_offset[3];
193 u8 config;
194 u8 config2;
195 u8 vrm;
196 u16 fan[6];
197 u16 fan_min[6];
198 u8 fan_max[2];
199 u8 fan_opt[6];
200 u8 pwm[6];
201 u8 pwm_min[3];
202 u8 pwm_config[3];
203 u8 pwm_acz[3];
204 u8 pwm_freq[6];
205 u8 pwm_rr[2];
206 u8 zone_low[3];
207 u8 zone_abs[3];
208 u8 zone_hyst[2];
209 u32 alarms;
210};
211
212/* Nominal voltage values */
213static const int IN_NOMINAL[] = {5000, 2250, 3300, 5000, 12000, 3300, 3300};
214
215/* Voltage input
216 * Voltage inputs have 16 bits resolution, limit values have 8 bits
217 * resolution. */
218static inline int IN_FROM_REG(int reg, int ix, int res)
219{
220 return (reg * IN_NOMINAL[ix] + (3 << (res - 3))) / (3 << (res - 2));
221}
222
223static inline int IN_TO_REG(int val, int ix)
224{
225 return SENSORS_LIMIT((val * 192 + IN_NOMINAL[ix] / 2) /
226 IN_NOMINAL[ix], 0, 255);
227}
228
229/* Temperature input
230 * The register values represent temperatures in 2's complement notation from
231 * -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit
232 * values have 8 bits resolution. */
233static inline int TEMP_FROM_REG(int reg, int res)
234{
235 return (reg * 1000) >> (res - 8);
236}
237
238static inline int TEMP_TO_REG(int val)
239{
240 return SENSORS_LIMIT((val < 0 ? val - 500 : val + 500) / 1000,
241 -128, 127);
242}
243
244/* Temperature range */
245static const int TEMP_RANGE[] = {2000, 2500, 3333, 4000, 5000, 6666, 8000,
246 10000, 13333, 16000, 20000, 26666, 32000,
247 40000, 53333, 80000};
248
249static inline int TEMP_RANGE_FROM_REG(int reg)
250{
251 return TEMP_RANGE[(reg >> 4) & 0x0f];
252}
253
254static int TEMP_RANGE_TO_REG(int val, int reg)
255{
256 int i;
257
258 for (i = 15; i > 0; i--) {
259 if (val > (TEMP_RANGE[i] + TEMP_RANGE[i - 1] + 1) / 2) {
260 break;
261 }
262 }
263
264 return (reg & 0x0f) | (i << 4);
265}
266
267/* Temperature hysteresis
268 * Register layout:
269 * reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0]
270 * reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx] */
271static inline int TEMP_HYST_FROM_REG(int reg, int ix)
272{
273 return (((ix == 1) ? reg : reg >> 4) & 0x0f) * 1000;
274}
275
276static inline int TEMP_HYST_TO_REG(int val, int ix, int reg)
277{
278 int hyst = SENSORS_LIMIT((val + 500) / 1000, 0, 15);
279
280 return (ix == 1) ? (reg & 0xf0) | hyst : (reg & 0x0f) | (hyst << 4);
281}
282
283/* Fan input RPM */
284static inline int FAN_FROM_REG(int reg, int tpc)
285{
ff8421f7
JH		 286 if (tpc) {
287 return tpc * reg;
288 } else {
289 return (reg == 0 || reg == 0xffff) ? 0 : 90000 * 60 / reg;
290 }
9431996f
JH		 291}
292
293static inline int FAN_TO_REG(int val, int tpc)
294{
ff8421f7
JH		 295 if (tpc) {
296 return SENSORS_LIMIT(val / tpc, 0, 0xffff);
297 } else {
298 return (val <= 0) ? 0xffff :
299 SENSORS_LIMIT(90000 * 60 / val, 0, 0xfffe);
300 }
9431996f
JH		 301}
302
303/* Fan TPC (tach pulse count)
304 * Converts a register value to a TPC multiplier or returns 0 if the tachometer
305 * is configured in legacy (non-tpc) mode */
306static inline int FAN_TPC_FROM_REG(int reg)
307{
308 return (reg & 0x20) ? 0 : 60 >> (reg & 0x03);
309}
310
311/* Fan type
312 * The type of a fan is expressed in number of pulses-per-revolution that it
313 * emits */
314static inline int FAN_TYPE_FROM_REG(int reg)
315{
316 int edge = (reg >> 1) & 0x03;
317
318 return (edge > 0) ? 1 << (edge - 1) : 0;
319}
320
321static inline int FAN_TYPE_TO_REG(int val, int reg)
322{
323 int edge = (val == 4) ? 3 : val;
324
325 return (reg & 0xf9) | (edge << 1);
326}
327
328/* Fan max RPM */
329static const int FAN_MAX[] = {0x54, 0x38, 0x2a, 0x21, 0x1c, 0x18, 0x15, 0x12,
330 0x11, 0x0f, 0x0e};
331
332static int FAN_MAX_FROM_REG(int reg)
333{
334 int i;
335
336 for (i = 10; i > 0; i--) {
337 if (reg == FAN_MAX[i]) {
338 break;
339 }
340 }
341
342 return 1000 + i * 500;
343}
344
345static int FAN_MAX_TO_REG(int val)
346{
347 int i;
348
349 for (i = 10; i > 0; i--) {
350 if (val > (1000 + (i - 1) * 500)) {
351 break;
352 }
353 }
354
355 return FAN_MAX[i];
356}
357
358/* PWM enable
359 * Register to enable mapping:
360 * 000: 2 fan on zone 1 auto
361 * 001: 2 fan on zone 2 auto
362 * 010: 2 fan on zone 3 auto
363 * 011: 0 fan full on
364 * 100: -1 fan disabled
365 * 101: 2 fan on hottest of zones 2,3 auto
366 * 110: 2 fan on hottest of zones 1,2,3 auto
367 * 111: 1 fan in manual mode */
368static inline int PWM_EN_FROM_REG(int reg)
369{
370 static const int en[] = {2, 2, 2, 0, -1, 2, 2, 1};
371
372 return en[(reg >> 5) & 0x07];
373}
374
375static inline int PWM_EN_TO_REG(int val, int reg)
376{
377 int en = (val == 1) ? 7 : 3;
378
379 return (reg & 0x1f) | ((en & 0x07) << 5);
380}
381
382/* PWM auto channels zone
383 * Register to auto channels zone mapping (ACZ is a bitfield with bit x
384 * corresponding to zone x+1):
385 * 000: 001 fan on zone 1 auto
386 * 001: 010 fan on zone 2 auto
387 * 010: 100 fan on zone 3 auto
388 * 011: 000 fan full on
389 * 100: 000 fan disabled
390 * 101: 110 fan on hottest of zones 2,3 auto
391 * 110: 111 fan on hottest of zones 1,2,3 auto
392 * 111: 000 fan in manual mode */
393static inline int PWM_ACZ_FROM_REG(int reg)
394{
395 static const int acz[] = {1, 2, 4, 0, 0, 6, 7, 0};
396
397 return acz[(reg >> 5) & 0x07];
398}
399
400static inline int PWM_ACZ_TO_REG(int val, int reg)
401{
402 int acz = (val == 4) ? 2 : val - 1;
403
404 return (reg & 0x1f) | ((acz & 0x07) << 5);
405}
406
407/* PWM frequency */
408static const int PWM_FREQ[] = {11, 15, 22, 29, 35, 44, 59, 88,
409 15000, 20000, 30000, 25000, 0, 0, 0, 0};
410
411static inline int PWM_FREQ_FROM_REG(int reg)
412{
413 return PWM_FREQ[reg & 0x0f];
414}
415
416static int PWM_FREQ_TO_REG(int val, int reg)
417{
418 int i;
419
420 /* the first two cases are special - stupid chip design! */
421 if (val > 27500) {
422 i = 10;
423 } else if (val > 22500) {
424 i = 11;
425 } else {
426 for (i = 9; i > 0; i--) {
427 if (val > (PWM_FREQ[i] + PWM_FREQ[i - 1] + 1) / 2) {
428 break;
429 }
430 }
431 }
432
433 return (reg & 0xf0) | i;
434}
435
436/* PWM ramp rate
437 * Register layout:
438 * reg[0] = [OFF3, OFF2, OFF1, RES, RR1-E, RR1-2, RR1-1, RR1-0]
439 * reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0] */
440static const u8 PWM_RR[] = {206, 104, 69, 41, 26, 18, 10, 5};
441
442static inline int PWM_RR_FROM_REG(int reg, int ix)
443{
444 int rr = (ix == 1) ? reg >> 4 : reg;
445
446 return (rr & 0x08) ? PWM_RR[rr & 0x07] : 0;
447}
448
449static int PWM_RR_TO_REG(int val, int ix, int reg)
450{
451 int i;
452
453 for (i = 0; i < 7; i++) {
454 if (val > (PWM_RR[i] + PWM_RR[i + 1] + 1) / 2) {
455 break;
456 }
457 }
458
459 return (ix == 1) ? (reg & 0x8f) | (i << 4) : (reg & 0xf8) | i;
460}
461
462/* PWM ramp rate enable */
463static inline int PWM_RR_EN_FROM_REG(int reg, int ix)
464{
465 return PWM_RR_FROM_REG(reg, ix) ? 1 : 0;
466}
467
468static inline int PWM_RR_EN_TO_REG(int val, int ix, int reg)
469{
470 int en = (ix == 1) ? 0x80 : 0x08;
471
472 return val ? reg | en : reg & ~en;
473}
474
475/* PWM min/off
476 * The PWM min/off bits are part of the PMW ramp rate register 0 (see above for
477 * the register layout). */
478static inline int PWM_OFF_FROM_REG(int reg, int ix)
479{
480 return (reg >> (ix + 5)) & 0x01;
481}
482
483static inline int PWM_OFF_TO_REG(int val, int ix, int reg)
484{
485 return (reg & ~(1 << (ix + 5))) | ((val & 0x01) << (ix + 5));
486}
487
488/* ---------------------------------------------------------------------
489 * Device I/O access
e95c237d
JH		 490 *
491 * ISA access is performed through an index/data register pair and needs to
492 * be protected by a mutex during runtime (not required for initialization).
493 * We use data->update_lock for this and need to ensure that we acquire it
494 * before calling dme1737_read or dme1737_write.
9431996f
JH		 495 * --------------------------------------------------------------------- */
496
497static u8 dme1737_read(struct i2c_client *client, u8 reg)
498{
e95c237d 499 s32 val;
9431996f 500
e95c237d
JH		 501 if (client->driver) { /* I2C device */
502 val = i2c_smbus_read_byte_data(client, reg);
503
504 if (val < 0) {
505 dev_warn(&client->dev, "Read from register "
506 "0x%02x failed! Please report to the driver "
507 "maintainer.\n", reg);
508 }
509 } else { /* ISA device */
510 outb(reg, client->addr);
511 val = inb(client->addr + 1);
9431996f
JH		 512 }
513
514 return val;
515}
516
e95c237d 517static s32 dme1737_write(struct i2c_client *client, u8 reg, u8 val)
9431996f 518{
e95c237d
JH		 519 s32 res = 0;
520
521 if (client->driver) { /* I2C device */
522 res = i2c_smbus_write_byte_data(client, reg, val);
9431996f 523
e95c237d
JH		 524 if (res < 0) {
525 dev_warn(&client->dev, "Write to register "
526 "0x%02x failed! Please report to the driver "
527 "maintainer.\n", reg);
528 }
529 } else { /* ISA device */
530 outb(reg, client->addr);
531 outb(val, client->addr + 1);
9431996f
JH		 532 }
533
534 return res;
535}
536
537static struct dme1737_data *dme1737_update_device(struct device *dev)
538{
b237eb25
JH		 539 struct dme1737_data *data = dev_get_drvdata(dev);
540 struct i2c_client *client = &data->client;
9431996f
JH		 541 int ix;
542 u8 lsb[5];
543
544 mutex_lock(&data->update_lock);
545
546 /* Enable a Vbat monitoring cycle every 10 mins */
547 if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) {
548 dme1737_write(client, DME1737_REG_CONFIG, dme1737_read(client,
549 DME1737_REG_CONFIG) | 0x10);
550 data->last_vbat = jiffies;
551 }
552
553 /* Sample register contents every 1 sec */
554 if (time_after(jiffies, data->last_update + HZ) || !data->valid) {
555 data->vid = dme1737_read(client, DME1737_REG_VID) & 0x3f;
556
557 /* In (voltage) registers */
558 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
559 /* Voltage inputs are stored as 16 bit values even
560 * though they have only 12 bits resolution. This is
561 * to make it consistent with the temp inputs. */
562 data->in[ix] = dme1737_read(client,
563 DME1737_REG_IN(ix)) << 8;
564 data->in_min[ix] = dme1737_read(client,
565 DME1737_REG_IN_MIN(ix));
566 data->in_max[ix] = dme1737_read(client,
567 DME1737_REG_IN_MAX(ix));
568 }
569
570 /* Temp registers */
571 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
572 /* Temp inputs are stored as 16 bit values even
573 * though they have only 12 bits resolution. This is
574 * to take advantage of implicit conversions between
575 * register values (2's complement) and temp values
576 * (signed decimal). */
577 data->temp[ix] = dme1737_read(client,
578 DME1737_REG_TEMP(ix)) << 8;
579 data->temp_min[ix] = dme1737_read(client,
580 DME1737_REG_TEMP_MIN(ix));
581 data->temp_max[ix] = dme1737_read(client,
582 DME1737_REG_TEMP_MAX(ix));
583 data->temp_offset[ix] = dme1737_read(client,
584 DME1737_REG_TEMP_OFFSET(ix));
585 }
586
587 /* In and temp LSB registers
588 * The LSBs are latched when the MSBs are read, so the order in
589 * which the registers are read (MSB first, then LSB) is
590 * important! */
591 for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) {
592 lsb[ix] = dme1737_read(client,
593 DME1737_REG_IN_TEMP_LSB(ix));
594 }
595 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
596 data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] <<
597 DME1737_REG_IN_LSB_SHL[ix]) & 0xf0;
598 }
599 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
600 data->temp[ix] |= (lsb[DME1737_REG_TEMP_LSB[ix]] <<
601 DME1737_REG_TEMP_LSB_SHL[ix]) & 0xf0;
602 }
603
604 /* Fan registers */
605 for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) {
606 /* Skip reading registers if optional fans are not
607 * present */
608 if (!(data->has_fan & (1 << ix))) {
609 continue;
610 }
611 data->fan[ix] = dme1737_read(client,
612 DME1737_REG_FAN(ix));
613 data->fan[ix] |= dme1737_read(client,
614 DME1737_REG_FAN(ix) + 1) << 8;
615 data->fan_min[ix] = dme1737_read(client,
616 DME1737_REG_FAN_MIN(ix));
617 data->fan_min[ix] |= dme1737_read(client,
618 DME1737_REG_FAN_MIN(ix) + 1) << 8;
619 data->fan_opt[ix] = dme1737_read(client,
620 DME1737_REG_FAN_OPT(ix));
621 /* fan_max exists only for fan[5-6] */
622 if (ix > 3) {
623 data->fan_max[ix - 4] = dme1737_read(client,
624 DME1737_REG_FAN_MAX(ix));
625 }
626 }
627
628 /* PWM registers */
629 for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) {
630 /* Skip reading registers if optional PWMs are not
631 * present */
632 if (!(data->has_pwm & (1 << ix))) {
633 continue;
634 }
635 data->pwm[ix] = dme1737_read(client,
636 DME1737_REG_PWM(ix));
637 data->pwm_freq[ix] = dme1737_read(client,
638 DME1737_REG_PWM_FREQ(ix));
639 /* pwm_config and pwm_min exist only for pwm[1-3] */
640 if (ix < 3) {
641 data->pwm_config[ix] = dme1737_read(client,
642 DME1737_REG_PWM_CONFIG(ix));
643 data->pwm_min[ix] = dme1737_read(client,
644 DME1737_REG_PWM_MIN(ix));
645 }
646 }
647 for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) {
648 data->pwm_rr[ix] = dme1737_read(client,
649 DME1737_REG_PWM_RR(ix));
650 }
651
652 /* Thermal zone registers */
653 for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) {
654 data->zone_low[ix] = dme1737_read(client,
655 DME1737_REG_ZONE_LOW(ix));
656 data->zone_abs[ix] = dme1737_read(client,
657 DME1737_REG_ZONE_ABS(ix));
658 }
659 for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) {
660 data->zone_hyst[ix] = dme1737_read(client,
661 DME1737_REG_ZONE_HYST(ix));
662 }
663
664 /* Alarm registers */
665 data->alarms = dme1737_read(client,
666 DME1737_REG_ALARM1);
667 /* Bit 7 tells us if the other alarm registers are non-zero and
668 * therefore also need to be read */
669 if (data->alarms & 0x80) {
670 data->alarms |= dme1737_read(client,
671 DME1737_REG_ALARM2) << 8;
672 data->alarms |= dme1737_read(client,
673 DME1737_REG_ALARM3) << 16;
674 }
675
e95c237d
JH		 676 /* The ISA chips require explicit clearing of alarm bits.
677 * Don't worry, an alarm will come back if the condition
678 * that causes it still exists */
679 if (!client->driver) {
680 if (data->alarms & 0xff0000) {
681 dme1737_write(client, DME1737_REG_ALARM3,
682 0xff);
683 }
684 if (data->alarms & 0xff00) {
685 dme1737_write(client, DME1737_REG_ALARM2,
686 0xff);
687 }
688 if (data->alarms & 0xff) {
689 dme1737_write(client, DME1737_REG_ALARM1,
690 0xff);
691 }
692 }
693
9431996f
JH		 694 data->last_update = jiffies;
695 data->valid = 1;
696 }
697
698 mutex_unlock(&data->update_lock);
699
700 return data;
701}
702
703/* ---------------------------------------------------------------------
704 * Voltage sysfs attributes
705 * ix = [0-5]
706 * --------------------------------------------------------------------- */
707
708#define SYS_IN_INPUT 0
709#define SYS_IN_MIN 1
710#define SYS_IN_MAX 2
711#define SYS_IN_ALARM 3
712
713static ssize_t show_in(struct device *dev, struct device_attribute *attr,
714 char *buf)
715{
716 struct dme1737_data *data = dme1737_update_device(dev);
717 struct sensor_device_attribute_2
718 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
719 int ix = sensor_attr_2->index;
720 int fn = sensor_attr_2->nr;
721 int res;
722
723 switch (fn) {
724 case SYS_IN_INPUT:
725 res = IN_FROM_REG(data->in[ix], ix, 16);
726 break;
727 case SYS_IN_MIN:
728 res = IN_FROM_REG(data->in_min[ix], ix, 8);
729 break;
730 case SYS_IN_MAX:
731 res = IN_FROM_REG(data->in_max[ix], ix, 8);
732 break;
733 case SYS_IN_ALARM:
734 res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01;
735 break;
736 default:
737 res = 0;
b237eb25 738 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 739 }
740
741 return sprintf(buf, "%d\n", res);
742}
743
744static ssize_t set_in(struct device *dev, struct device_attribute *attr,
745 const char *buf, size_t count)
746{
b237eb25
JH		 747 struct dme1737_data *data = dev_get_drvdata(dev);
748 struct i2c_client *client = &data->client;
9431996f
JH		 749 struct sensor_device_attribute_2
750 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
751 int ix = sensor_attr_2->index;
752 int fn = sensor_attr_2->nr;
753 long val = simple_strtol(buf, NULL, 10);
754
755 mutex_lock(&data->update_lock);
756 switch (fn) {
757 case SYS_IN_MIN:
758 data->in_min[ix] = IN_TO_REG(val, ix);
759 dme1737_write(client, DME1737_REG_IN_MIN(ix),
760 data->in_min[ix]);
761 break;
762 case SYS_IN_MAX:
763 data->in_max[ix] = IN_TO_REG(val, ix);
764 dme1737_write(client, DME1737_REG_IN_MAX(ix),
765 data->in_max[ix]);
766 break;
767 default:
b237eb25 768 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 769 }
770 mutex_unlock(&data->update_lock);
771
772 return count;
773}
774
775/* ---------------------------------------------------------------------
776 * Temperature sysfs attributes
777 * ix = [0-2]
778 * --------------------------------------------------------------------- */
779
780#define SYS_TEMP_INPUT 0
781#define SYS_TEMP_MIN 1
782#define SYS_TEMP_MAX 2
783#define SYS_TEMP_OFFSET 3
784#define SYS_TEMP_ALARM 4
785#define SYS_TEMP_FAULT 5
786
787static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
788 char *buf)
789{
790 struct dme1737_data *data = dme1737_update_device(dev);
791 struct sensor_device_attribute_2
792 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
793 int ix = sensor_attr_2->index;
794 int fn = sensor_attr_2->nr;
795 int res;
796
797 switch (fn) {
798 case SYS_TEMP_INPUT:
799 res = TEMP_FROM_REG(data->temp[ix], 16);
800 break;
801 case SYS_TEMP_MIN:
802 res = TEMP_FROM_REG(data->temp_min[ix], 8);
803 break;
804 case SYS_TEMP_MAX:
805 res = TEMP_FROM_REG(data->temp_max[ix], 8);
806 break;
807 case SYS_TEMP_OFFSET:
808 res = TEMP_FROM_REG(data->temp_offset[ix], 8);
809 break;
810 case SYS_TEMP_ALARM:
811 res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01;
812 break;
813 case SYS_TEMP_FAULT:
c0f31403 814 res = (((u16)data->temp[ix] & 0xff00) == 0x8000);
9431996f
JH		 815 break;
816 default:
817 res = 0;
b237eb25 818 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 819 }
820
821 return sprintf(buf, "%d\n", res);
822}
823
824static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
825 const char *buf, size_t count)
826{
b237eb25
JH		 827 struct dme1737_data *data = dev_get_drvdata(dev);
828 struct i2c_client *client = &data->client;
9431996f
JH		 829 struct sensor_device_attribute_2
830 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
831 int ix = sensor_attr_2->index;
832 int fn = sensor_attr_2->nr;
833 long val = simple_strtol(buf, NULL, 10);
834
835 mutex_lock(&data->update_lock);
836 switch (fn) {
837 case SYS_TEMP_MIN:
838 data->temp_min[ix] = TEMP_TO_REG(val);
839 dme1737_write(client, DME1737_REG_TEMP_MIN(ix),
840 data->temp_min[ix]);
841 break;
842 case SYS_TEMP_MAX:
843 data->temp_max[ix] = TEMP_TO_REG(val);
844 dme1737_write(client, DME1737_REG_TEMP_MAX(ix),
845 data->temp_max[ix]);
846 break;
847 case SYS_TEMP_OFFSET:
848 data->temp_offset[ix] = TEMP_TO_REG(val);
849 dme1737_write(client, DME1737_REG_TEMP_OFFSET(ix),
850 data->temp_offset[ix]);
851 break;
852 default:
b237eb25 853 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 854 }
855 mutex_unlock(&data->update_lock);
856
857 return count;
858}
859
860/* ---------------------------------------------------------------------
861 * Zone sysfs attributes
862 * ix = [0-2]
863 * --------------------------------------------------------------------- */
864
865#define SYS_ZONE_AUTO_CHANNELS_TEMP 0
866#define SYS_ZONE_AUTO_POINT1_TEMP_HYST 1
867#define SYS_ZONE_AUTO_POINT1_TEMP 2
868#define SYS_ZONE_AUTO_POINT2_TEMP 3
869#define SYS_ZONE_AUTO_POINT3_TEMP 4
870
871static ssize_t show_zone(struct device *dev, struct device_attribute *attr,
872 char *buf)
873{
874 struct dme1737_data *data = dme1737_update_device(dev);
875 struct sensor_device_attribute_2
876 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
877 int ix = sensor_attr_2->index;
878 int fn = sensor_attr_2->nr;
879 int res;
880
881 switch (fn) {
882 case SYS_ZONE_AUTO_CHANNELS_TEMP:
883 /* check config2 for non-standard temp-to-zone mapping */
884 if ((ix == 1) && (data->config2 & 0x02)) {
885 res = 4;
886 } else {
887 res = 1 << ix;
888 }
889 break;
890 case SYS_ZONE_AUTO_POINT1_TEMP_HYST:
891 res = TEMP_FROM_REG(data->zone_low[ix], 8) -
892 TEMP_HYST_FROM_REG(data->zone_hyst[ix == 2], ix);
893 break;
894 case SYS_ZONE_AUTO_POINT1_TEMP:
895 res = TEMP_FROM_REG(data->zone_low[ix], 8);
896 break;
897 case SYS_ZONE_AUTO_POINT2_TEMP:
898 /* pwm_freq holds the temp range bits in the upper nibble */
899 res = TEMP_FROM_REG(data->zone_low[ix], 8) +
900 TEMP_RANGE_FROM_REG(data->pwm_freq[ix]);
901 break;
902 case SYS_ZONE_AUTO_POINT3_TEMP:
903 res = TEMP_FROM_REG(data->zone_abs[ix], 8);
904 break;
905 default:
906 res = 0;
b237eb25 907 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 908 }
909
910 return sprintf(buf, "%d\n", res);
911}
912
913static ssize_t set_zone(struct device *dev, struct device_attribute *attr,
914 const char *buf, size_t count)
915{
b237eb25
JH		 916 struct dme1737_data *data = dev_get_drvdata(dev);
917 struct i2c_client *client = &data->client;
9431996f
JH		 918 struct sensor_device_attribute_2
919 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
920 int ix = sensor_attr_2->index;
921 int fn = sensor_attr_2->nr;
922 long val = simple_strtol(buf, NULL, 10);
923
924 mutex_lock(&data->update_lock);
925 switch (fn) {
926 case SYS_ZONE_AUTO_POINT1_TEMP_HYST:
927 /* Refresh the cache */
928 data->zone_low[ix] = dme1737_read(client,
929 DME1737_REG_ZONE_LOW(ix));
930 /* Modify the temp hyst value */
931 data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG(
932 TEMP_FROM_REG(data->zone_low[ix], 8) -
933 val, ix, dme1737_read(client,
934 DME1737_REG_ZONE_HYST(ix == 2)));
935 dme1737_write(client, DME1737_REG_ZONE_HYST(ix == 2),
936 data->zone_hyst[ix == 2]);
937 break;
938 case SYS_ZONE_AUTO_POINT1_TEMP:
939 data->zone_low[ix] = TEMP_TO_REG(val);
940 dme1737_write(client, DME1737_REG_ZONE_LOW(ix),
941 data->zone_low[ix]);
942 break;
943 case SYS_ZONE_AUTO_POINT2_TEMP:
944 /* Refresh the cache */
945 data->zone_low[ix] = dme1737_read(client,
946 DME1737_REG_ZONE_LOW(ix));
947 /* Modify the temp range value (which is stored in the upper
948 * nibble of the pwm_freq register) */
949 data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val -
950 TEMP_FROM_REG(data->zone_low[ix], 8),
951 dme1737_read(client,
952 DME1737_REG_PWM_FREQ(ix)));
953 dme1737_write(client, DME1737_REG_PWM_FREQ(ix),
954 data->pwm_freq[ix]);
955 break;
956 case SYS_ZONE_AUTO_POINT3_TEMP:
957 data->zone_abs[ix] = TEMP_TO_REG(val);
958 dme1737_write(client, DME1737_REG_ZONE_ABS(ix),
959 data->zone_abs[ix]);
960 break;
961 default:
b237eb25 962 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 963 }
964 mutex_unlock(&data->update_lock);
965
966 return count;
967}
968
969/* ---------------------------------------------------------------------
970 * Fan sysfs attributes
971 * ix = [0-5]
972 * --------------------------------------------------------------------- */
973
974#define SYS_FAN_INPUT 0
975#define SYS_FAN_MIN 1
976#define SYS_FAN_MAX 2
977#define SYS_FAN_ALARM 3
978#define SYS_FAN_TYPE 4
979
980static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
981 char *buf)
982{
983 struct dme1737_data *data = dme1737_update_device(dev);
984 struct sensor_device_attribute_2
985 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
986 int ix = sensor_attr_2->index;
987 int fn = sensor_attr_2->nr;
988 int res;
989
990 switch (fn) {
991 case SYS_FAN_INPUT:
992 res = FAN_FROM_REG(data->fan[ix],
993 ix < 4 ? 0 :
994 FAN_TPC_FROM_REG(data->fan_opt[ix]));
995 break;
996 case SYS_FAN_MIN:
997 res = FAN_FROM_REG(data->fan_min[ix],
998 ix < 4 ? 0 :
999 FAN_TPC_FROM_REG(data->fan_opt[ix]));
1000 break;
1001 case SYS_FAN_MAX:
1002 /* only valid for fan[5-6] */
1003 res = FAN_MAX_FROM_REG(data->fan_max[ix - 4]);
1004 break;
1005 case SYS_FAN_ALARM:
1006 res = (data->alarms >> DME1737_BIT_ALARM_FAN[ix]) & 0x01;
1007 break;
1008 case SYS_FAN_TYPE:
1009 /* only valid for fan[1-4] */
1010 res = FAN_TYPE_FROM_REG(data->fan_opt[ix]);
1011 break;
1012 default:
1013 res = 0;
b237eb25 1014 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 1015 }
1016
1017 return sprintf(buf, "%d\n", res);
1018}
1019
1020static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1021 const char *buf, size_t count)
1022{
b237eb25
JH		 1023 struct dme1737_data *data = dev_get_drvdata(dev);
1024 struct i2c_client *client = &data->client;
9431996f
JH		 1025 struct sensor_device_attribute_2
1026 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1027 int ix = sensor_attr_2->index;
1028 int fn = sensor_attr_2->nr;
1029 long val = simple_strtol(buf, NULL, 10);
1030
1031 mutex_lock(&data->update_lock);
1032 switch (fn) {
1033 case SYS_FAN_MIN:
1034 if (ix < 4) {
1035 data->fan_min[ix] = FAN_TO_REG(val, 0);
1036 } else {
1037 /* Refresh the cache */
1038 data->fan_opt[ix] = dme1737_read(client,
1039 DME1737_REG_FAN_OPT(ix));
1040 /* Modify the fan min value */
1041 data->fan_min[ix] = FAN_TO_REG(val,
1042 FAN_TPC_FROM_REG(data->fan_opt[ix]));
1043 }
1044 dme1737_write(client, DME1737_REG_FAN_MIN(ix),
1045 data->fan_min[ix] & 0xff);
1046 dme1737_write(client, DME1737_REG_FAN_MIN(ix) + 1,
1047 data->fan_min[ix] >> 8);
1048 break;
1049 case SYS_FAN_MAX:
1050 /* Only valid for fan[5-6] */
1051 data->fan_max[ix - 4] = FAN_MAX_TO_REG(val);
1052 dme1737_write(client, DME1737_REG_FAN_MAX(ix),
1053 data->fan_max[ix - 4]);
1054 break;
1055 case SYS_FAN_TYPE:
1056 /* Only valid for fan[1-4] */
1057 if (!(val == 1 || val == 2 || val == 4)) {
1058 count = -EINVAL;
e95c237d 1059 dev_warn(dev, "Fan type value %ld not "
9431996f
JH		 1060 "supported. Choose one of 1, 2, or 4.\n",
1061 val);
1062 goto exit;
1063 }
1064 data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(client,
1065 DME1737_REG_FAN_OPT(ix)));
1066 dme1737_write(client, DME1737_REG_FAN_OPT(ix),
1067 data->fan_opt[ix]);
1068 break;
1069 default:
b237eb25 1070 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 1071 }
1072exit:
1073 mutex_unlock(&data->update_lock);
1074
1075 return count;
1076}
1077
1078/* ---------------------------------------------------------------------
1079 * PWM sysfs attributes
1080 * ix = [0-4]
1081 * --------------------------------------------------------------------- */
1082
1083#define SYS_PWM 0
1084#define SYS_PWM_FREQ 1
1085#define SYS_PWM_ENABLE 2
1086#define SYS_PWM_RAMP_RATE 3
1087#define SYS_PWM_AUTO_CHANNELS_ZONE 4
1088#define SYS_PWM_AUTO_PWM_MIN 5
1089#define SYS_PWM_AUTO_POINT1_PWM 6
1090#define SYS_PWM_AUTO_POINT2_PWM 7
1091
1092static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1093 char *buf)
1094{
1095 struct dme1737_data *data = dme1737_update_device(dev);
1096 struct sensor_device_attribute_2
1097 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1098 int ix = sensor_attr_2->index;
1099 int fn = sensor_attr_2->nr;
1100 int res;
1101
1102 switch (fn) {
1103 case SYS_PWM:
1104 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0) {
1105 res = 255;
1106 } else {
1107 res = data->pwm[ix];
1108 }
1109 break;
1110 case SYS_PWM_FREQ:
1111 res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]);
1112 break;
1113 case SYS_PWM_ENABLE:
1114 if (ix > 3) {
1115 res = 1; /* pwm[5-6] hard-wired to manual mode */
1116 } else {
1117 res = PWM_EN_FROM_REG(data->pwm_config[ix]);
1118 }
1119 break;
1120 case SYS_PWM_RAMP_RATE:
1121 /* Only valid for pwm[1-3] */
1122 res = PWM_RR_FROM_REG(data->pwm_rr[ix > 0], ix);
1123 break;
1124 case SYS_PWM_AUTO_CHANNELS_ZONE:
1125 /* Only valid for pwm[1-3] */
1126 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1127 res = PWM_ACZ_FROM_REG(data->pwm_config[ix]);
1128 } else {
1129 res = data->pwm_acz[ix];
1130 }
1131 break;
1132 case SYS_PWM_AUTO_PWM_MIN:
1133 /* Only valid for pwm[1-3] */
1134 if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix)) {
1135 res = data->pwm_min[ix];
1136 } else {
1137 res = 0;
1138 }
1139 break;
1140 case SYS_PWM_AUTO_POINT1_PWM:
1141 /* Only valid for pwm[1-3] */
1142 res = data->pwm_min[ix];
1143 break;
1144 case SYS_PWM_AUTO_POINT2_PWM:
1145 /* Only valid for pwm[1-3] */
1146 res = 255; /* hard-wired */
1147 break;
1148 default:
1149 res = 0;
b237eb25 1150 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 1151 }
1152
1153 return sprintf(buf, "%d\n", res);
1154}
1155
1156static struct attribute *dme1737_attr_pwm[];
b237eb25 1157static void dme1737_chmod_file(struct device*, struct attribute*, mode_t);
9431996f
JH		 1158
1159static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1160 const char *buf, size_t count)
1161{
b237eb25
JH		 1162 struct dme1737_data *data = dev_get_drvdata(dev);
1163 struct i2c_client *client = &data->client;
9431996f
JH		 1164 struct sensor_device_attribute_2
1165 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1166 int ix = sensor_attr_2->index;
1167 int fn = sensor_attr_2->nr;
1168 long val = simple_strtol(buf, NULL, 10);
1169
1170 mutex_lock(&data->update_lock);
1171 switch (fn) {
1172 case SYS_PWM:
1173 data->pwm[ix] = SENSORS_LIMIT(val, 0, 255);
1174 dme1737_write(client, DME1737_REG_PWM(ix), data->pwm[ix]);
1175 break;
1176 case SYS_PWM_FREQ:
1177 data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(client,
1178 DME1737_REG_PWM_FREQ(ix)));
1179 dme1737_write(client, DME1737_REG_PWM_FREQ(ix),
1180 data->pwm_freq[ix]);
1181 break;
1182 case SYS_PWM_ENABLE:
1183 /* Only valid for pwm[1-3] */
1184 if (val < 0 || val > 2) {
1185 count = -EINVAL;
e95c237d 1186 dev_warn(dev, "PWM enable %ld not "
9431996f
JH		 1187 "supported. Choose one of 0, 1, or 2.\n",
1188 val);
1189 goto exit;
1190 }
1191 /* Refresh the cache */
1192 data->pwm_config[ix] = dme1737_read(client,
1193 DME1737_REG_PWM_CONFIG(ix));
1194 if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) {
1195 /* Bail out if no change */
1196 goto exit;
1197 }
1198 /* Do some housekeeping if we are currently in auto mode */
1199 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1200 /* Save the current zone channel assignment */
1201 data->pwm_acz[ix] = PWM_ACZ_FROM_REG(
1202 data->pwm_config[ix]);
1203 /* Save the current ramp rate state and disable it */
1204 data->pwm_rr[ix > 0] = dme1737_read(client,
1205 DME1737_REG_PWM_RR(ix > 0));
1206 data->pwm_rr_en &= ~(1 << ix);
1207 if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) {
1208 data->pwm_rr_en |= (1 << ix);
1209 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix,
1210 data->pwm_rr[ix > 0]);
1211 dme1737_write(client,
1212 DME1737_REG_PWM_RR(ix > 0),
1213 data->pwm_rr[ix > 0]);
1214 }
1215 }
1216 /* Set the new PWM mode */
1217 switch (val) {
1218 case 0:
1219 /* Change permissions of pwm[ix] to read-only */
b237eb25 1220 dme1737_chmod_file(dev, dme1737_attr_pwm[ix],
9431996f
JH		 1221 S_IRUGO);
1222 /* Turn fan fully on */
1223 data->pwm_config[ix] = PWM_EN_TO_REG(0,
1224 data->pwm_config[ix]);
1225 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1226 data->pwm_config[ix]);
1227 break;
1228 case 1:
1229 /* Turn on manual mode */
1230 data->pwm_config[ix] = PWM_EN_TO_REG(1,
1231 data->pwm_config[ix]);
1232 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1233 data->pwm_config[ix]);
1234 /* Change permissions of pwm[ix] to read-writeable */
b237eb25 1235 dme1737_chmod_file(dev, dme1737_attr_pwm[ix],
9431996f
JH		 1236 S_IRUGO | S_IWUSR);
1237 break;
1238 case 2:
1239 /* Change permissions of pwm[ix] to read-only */
b237eb25 1240 dme1737_chmod_file(dev, dme1737_attr_pwm[ix],
9431996f
JH		 1241 S_IRUGO);
1242 /* Turn on auto mode using the saved zone channel
1243 * assignment */
1244 data->pwm_config[ix] = PWM_ACZ_TO_REG(
1245 data->pwm_acz[ix],
1246 data->pwm_config[ix]);
1247 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1248 data->pwm_config[ix]);
1249 /* Enable PWM ramp rate if previously enabled */
1250 if (data->pwm_rr_en & (1 << ix)) {
1251 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix,
1252 dme1737_read(client,
1253 DME1737_REG_PWM_RR(ix > 0)));
1254 dme1737_write(client,
1255 DME1737_REG_PWM_RR(ix > 0),
1256 data->pwm_rr[ix > 0]);
1257 }
1258 break;
1259 }
1260 break;
1261 case SYS_PWM_RAMP_RATE:
1262 /* Only valid for pwm[1-3] */
1263 /* Refresh the cache */
1264 data->pwm_config[ix] = dme1737_read(client,
1265 DME1737_REG_PWM_CONFIG(ix));
1266 data->pwm_rr[ix > 0] = dme1737_read(client,
1267 DME1737_REG_PWM_RR(ix > 0));
1268 /* Set the ramp rate value */
1269 if (val > 0) {
1270 data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix,
1271 data->pwm_rr[ix > 0]);
1272 }
1273 /* Enable/disable the feature only if the associated PWM
1274 * output is in automatic mode. */
1275 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1276 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix,
1277 data->pwm_rr[ix > 0]);
1278 }
1279 dme1737_write(client, DME1737_REG_PWM_RR(ix > 0),
1280 data->pwm_rr[ix > 0]);
1281 break;
1282 case SYS_PWM_AUTO_CHANNELS_ZONE:
1283 /* Only valid for pwm[1-3] */
1284 if (!(val == 1 || val == 2 || val == 4 ||
1285 val == 6 || val == 7)) {
1286 count = -EINVAL;
e95c237d 1287 dev_warn(dev, "PWM auto channels zone %ld "
9431996f
JH		 1288 "not supported. Choose one of 1, 2, 4, 6, "
1289 "or 7.\n", val);
1290 goto exit;
1291 }
1292 /* Refresh the cache */
1293 data->pwm_config[ix] = dme1737_read(client,
1294 DME1737_REG_PWM_CONFIG(ix));
1295 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1296 /* PWM is already in auto mode so update the temp
1297 * channel assignment */
1298 data->pwm_config[ix] = PWM_ACZ_TO_REG(val,
1299 data->pwm_config[ix]);
1300 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1301 data->pwm_config[ix]);
1302 } else {
1303 /* PWM is not in auto mode so we save the temp
1304 * channel assignment for later use */
1305 data->pwm_acz[ix] = val;
1306 }
1307 break;
1308 case SYS_PWM_AUTO_PWM_MIN:
1309 /* Only valid for pwm[1-3] */
1310 /* Refresh the cache */
1311 data->pwm_min[ix] = dme1737_read(client,
1312 DME1737_REG_PWM_MIN(ix));
1313 /* There are only 2 values supported for the auto_pwm_min
1314 * value: 0 or auto_point1_pwm. So if the temperature drops
1315 * below the auto_point1_temp_hyst value, the fan either turns
1316 * off or runs at auto_point1_pwm duty-cycle. */
1317 if (val > ((data->pwm_min[ix] + 1) / 2)) {
1318 data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix,
1319 dme1737_read(client,
1320 DME1737_REG_PWM_RR(0)));
9431996f
JH		 1321 } else {
1322 data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix,
1323 dme1737_read(client,
1324 DME1737_REG_PWM_RR(0)));
9431996f
JH		 1325 }
1326 dme1737_write(client, DME1737_REG_PWM_RR(0),
1327 data->pwm_rr[0]);
1328 break;
1329 case SYS_PWM_AUTO_POINT1_PWM:
1330 /* Only valid for pwm[1-3] */
1331 data->pwm_min[ix] = SENSORS_LIMIT(val, 0, 255);
1332 dme1737_write(client, DME1737_REG_PWM_MIN(ix),
1333 data->pwm_min[ix]);
1334 break;
1335 default:
b237eb25 1336 dev_dbg(dev, "Unknown function %d.\n", fn);
9431996f
JH		 1337 }
1338exit:
1339 mutex_unlock(&data->update_lock);
1340
1341 return count;
1342}
1343
1344/* ---------------------------------------------------------------------
1345 * Miscellaneous sysfs attributes
1346 * --------------------------------------------------------------------- */
1347
1348static ssize_t show_vrm(struct device *dev, struct device_attribute *attr,
1349 char *buf)
1350{
1351 struct i2c_client *client = to_i2c_client(dev);
1352 struct dme1737_data *data = i2c_get_clientdata(client);
1353
1354 return sprintf(buf, "%d\n", data->vrm);
1355}
1356
1357static ssize_t set_vrm(struct device *dev, struct device_attribute *attr,
1358 const char *buf, size_t count)
1359{
b237eb25 1360 struct dme1737_data *data = dev_get_drvdata(dev);
9431996f
JH		 1361 long val = simple_strtol(buf, NULL, 10);
1362
1363 data->vrm = val;
1364 return count;
1365}
1366
1367static ssize_t show_vid(struct device *dev, struct device_attribute *attr,
1368 char *buf)
1369{
1370 struct dme1737_data *data = dme1737_update_device(dev);
1371
1372 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1373}
1374
e95c237d
JH		 1375static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1376 char *buf)
1377{
1378 struct dme1737_data *data = dev_get_drvdata(dev);
1379
1380 return sprintf(buf, "%s\n", data->client.name);
1381}
1382
9431996f
JH		 1383/* ---------------------------------------------------------------------
1384 * Sysfs device attribute defines and structs
1385 * --------------------------------------------------------------------- */
1386
1387/* Voltages 0-6 */
1388
1389#define SENSOR_DEVICE_ATTR_IN(ix) \
1390static SENSOR_DEVICE_ATTR_2(in##ix##_input, S_IRUGO, \
b237eb25 1391 show_in, NULL, SYS_IN_INPUT, ix); \
9431996f 1392static SENSOR_DEVICE_ATTR_2(in##ix##_min, S_IRUGO | S_IWUSR, \
b237eb25 1393 show_in, set_in, SYS_IN_MIN, ix); \
9431996f 1394static SENSOR_DEVICE_ATTR_2(in##ix##_max, S_IRUGO | S_IWUSR, \
b237eb25 1395 show_in, set_in, SYS_IN_MAX, ix); \
9431996f 1396static SENSOR_DEVICE_ATTR_2(in##ix##_alarm, S_IRUGO, \
b237eb25 1397 show_in, NULL, SYS_IN_ALARM, ix)
9431996f
JH		 1398
1399SENSOR_DEVICE_ATTR_IN(0);
1400SENSOR_DEVICE_ATTR_IN(1);
1401SENSOR_DEVICE_ATTR_IN(2);
1402SENSOR_DEVICE_ATTR_IN(3);
1403SENSOR_DEVICE_ATTR_IN(4);
1404SENSOR_DEVICE_ATTR_IN(5);
1405SENSOR_DEVICE_ATTR_IN(6);
1406
1407/* Temperatures 1-3 */
1408
1409#define SENSOR_DEVICE_ATTR_TEMP(ix) \
1410static SENSOR_DEVICE_ATTR_2(temp##ix##_input, S_IRUGO, \
b237eb25 1411 show_temp, NULL, SYS_TEMP_INPUT, ix-1); \
9431996f 1412static SENSOR_DEVICE_ATTR_2(temp##ix##_min, S_IRUGO | S_IWUSR, \
b237eb25 1413 show_temp, set_temp, SYS_TEMP_MIN, ix-1); \
9431996f 1414static SENSOR_DEVICE_ATTR_2(temp##ix##_max, S_IRUGO | S_IWUSR, \
b237eb25 1415 show_temp, set_temp, SYS_TEMP_MAX, ix-1); \
9431996f 1416static SENSOR_DEVICE_ATTR_2(temp##ix##_offset, S_IRUGO, \
b237eb25 1417 show_temp, set_temp, SYS_TEMP_OFFSET, ix-1); \
9431996f 1418static SENSOR_DEVICE_ATTR_2(temp##ix##_alarm, S_IRUGO, \
b237eb25 1419 show_temp, NULL, SYS_TEMP_ALARM, ix-1); \
9431996f 1420static SENSOR_DEVICE_ATTR_2(temp##ix##_fault, S_IRUGO, \
b237eb25 1421 show_temp, NULL, SYS_TEMP_FAULT, ix-1)
9431996f
JH		 1422
1423SENSOR_DEVICE_ATTR_TEMP(1);
1424SENSOR_DEVICE_ATTR_TEMP(2);
1425SENSOR_DEVICE_ATTR_TEMP(3);
1426
1427/* Zones 1-3 */
1428
1429#define SENSOR_DEVICE_ATTR_ZONE(ix) \
1430static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_channels_temp, S_IRUGO, \
b237eb25 1431 show_zone, NULL, SYS_ZONE_AUTO_CHANNELS_TEMP, ix-1); \
9431996f 1432static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp_hyst, S_IRUGO, \
b237eb25 1433 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP_HYST, ix-1); \
9431996f 1434static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp, S_IRUGO, \
b237eb25 1435 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP, ix-1); \
9431996f 1436static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point2_temp, S_IRUGO, \
b237eb25 1437 show_zone, set_zone, SYS_ZONE_AUTO_POINT2_TEMP, ix-1); \
9431996f 1438static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point3_temp, S_IRUGO, \
b237eb25 1439 show_zone, set_zone, SYS_ZONE_AUTO_POINT3_TEMP, ix-1)
9431996f
JH		 1440
1441SENSOR_DEVICE_ATTR_ZONE(1);
1442SENSOR_DEVICE_ATTR_ZONE(2);
1443SENSOR_DEVICE_ATTR_ZONE(3);
1444
1445/* Fans 1-4 */
1446
1447#define SENSOR_DEVICE_ATTR_FAN_1TO4(ix) \
1448static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \
b237eb25 1449 show_fan, NULL, SYS_FAN_INPUT, ix-1); \
9431996f 1450static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
b237eb25 1451 show_fan, set_fan, SYS_FAN_MIN, ix-1); \
9431996f 1452static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \
b237eb25 1453 show_fan, NULL, SYS_FAN_ALARM, ix-1); \
9431996f 1454static SENSOR_DEVICE_ATTR_2(fan##ix##_type, S_IRUGO | S_IWUSR, \
b237eb25 1455 show_fan, set_fan, SYS_FAN_TYPE, ix-1)
9431996f
JH		 1456
1457SENSOR_DEVICE_ATTR_FAN_1TO4(1);
1458SENSOR_DEVICE_ATTR_FAN_1TO4(2);
1459SENSOR_DEVICE_ATTR_FAN_1TO4(3);
1460SENSOR_DEVICE_ATTR_FAN_1TO4(4);
1461
1462/* Fans 5-6 */
1463
1464#define SENSOR_DEVICE_ATTR_FAN_5TO6(ix) \
1465static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \
b237eb25 1466 show_fan, NULL, SYS_FAN_INPUT, ix-1); \
9431996f 1467static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
b237eb25 1468 show_fan, set_fan, SYS_FAN_MIN, ix-1); \
9431996f 1469static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \
b237eb25 1470 show_fan, NULL, SYS_FAN_ALARM, ix-1); \
9431996f 1471static SENSOR_DEVICE_ATTR_2(fan##ix##_max, S_IRUGO | S_IWUSR, \
b237eb25 1472 show_fan, set_fan, SYS_FAN_MAX, ix-1)
9431996f
JH		 1473
1474SENSOR_DEVICE_ATTR_FAN_5TO6(5);
1475SENSOR_DEVICE_ATTR_FAN_5TO6(6);
1476
1477/* PWMs 1-3 */
1478
1479#define SENSOR_DEVICE_ATTR_PWM_1TO3(ix) \
1480static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \
b237eb25 1481 show_pwm, set_pwm, SYS_PWM, ix-1); \
9431996f 1482static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \
b237eb25 1483 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
9431996f 1484static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
b237eb25 1485 show_pwm, set_pwm, SYS_PWM_ENABLE, ix-1); \
9431996f 1486static SENSOR_DEVICE_ATTR_2(pwm##ix##_ramp_rate, S_IRUGO, \
b237eb25 1487 show_pwm, set_pwm, SYS_PWM_RAMP_RATE, ix-1); \
9431996f 1488static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_channels_zone, S_IRUGO, \
b237eb25 1489 show_pwm, set_pwm, SYS_PWM_AUTO_CHANNELS_ZONE, ix-1); \
9431996f 1490static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_pwm_min, S_IRUGO, \
b237eb25 1491 show_pwm, set_pwm, SYS_PWM_AUTO_PWM_MIN, ix-1); \
9431996f 1492static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point1_pwm, S_IRUGO, \
b237eb25 1493 show_pwm, set_pwm, SYS_PWM_AUTO_POINT1_PWM, ix-1); \
9431996f 1494static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point2_pwm, S_IRUGO, \
b237eb25 1495 show_pwm, NULL, SYS_PWM_AUTO_POINT2_PWM, ix-1)
9431996f
JH		 1496
1497SENSOR_DEVICE_ATTR_PWM_1TO3(1);
1498SENSOR_DEVICE_ATTR_PWM_1TO3(2);
1499SENSOR_DEVICE_ATTR_PWM_1TO3(3);
1500
1501/* PWMs 5-6 */
1502
1503#define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) \
9b257714 1504static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \
b237eb25 1505 show_pwm, set_pwm, SYS_PWM, ix-1); \
9b257714 1506static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \
b237eb25 1507 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
9431996f 1508static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
b237eb25 1509 show_pwm, NULL, SYS_PWM_ENABLE, ix-1)
9431996f
JH		 1510
1511SENSOR_DEVICE_ATTR_PWM_5TO6(5);
1512SENSOR_DEVICE_ATTR_PWM_5TO6(6);
1513
1514/* Misc */
1515
1516static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm);
1517static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
e95c237d 1518static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); /* for ISA devices */
9431996f 1519
9431996f
JH		 1520/* This struct holds all the attributes that are always present and need to be
1521 * created unconditionally. The attributes that need modification of their
1522 * permissions are created read-only and write permissions are added or removed
1523 * on the fly when required */
1524static struct attribute *dme1737_attr[] ={
b237eb25 1525 /* Voltages */
9b257714
JH		 1526 &sensor_dev_attr_in0_input.dev_attr.attr,
1527 &sensor_dev_attr_in0_min.dev_attr.attr,
1528 &sensor_dev_attr_in0_max.dev_attr.attr,
1529 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1530 &sensor_dev_attr_in1_input.dev_attr.attr,
1531 &sensor_dev_attr_in1_min.dev_attr.attr,
1532 &sensor_dev_attr_in1_max.dev_attr.attr,
1533 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1534 &sensor_dev_attr_in2_input.dev_attr.attr,
1535 &sensor_dev_attr_in2_min.dev_attr.attr,
1536 &sensor_dev_attr_in2_max.dev_attr.attr,
1537 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1538 &sensor_dev_attr_in3_input.dev_attr.attr,
1539 &sensor_dev_attr_in3_min.dev_attr.attr,
1540 &sensor_dev_attr_in3_max.dev_attr.attr,
1541 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1542 &sensor_dev_attr_in4_input.dev_attr.attr,
1543 &sensor_dev_attr_in4_min.dev_attr.attr,
1544 &sensor_dev_attr_in4_max.dev_attr.attr,
1545 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1546 &sensor_dev_attr_in5_input.dev_attr.attr,
1547 &sensor_dev_attr_in5_min.dev_attr.attr,
1548 &sensor_dev_attr_in5_max.dev_attr.attr,
1549 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1550 &sensor_dev_attr_in6_input.dev_attr.attr,
1551 &sensor_dev_attr_in6_min.dev_attr.attr,
1552 &sensor_dev_attr_in6_max.dev_attr.attr,
1553 &sensor_dev_attr_in6_alarm.dev_attr.attr,
b237eb25 1554 /* Temperatures */
9b257714
JH		 1555 &sensor_dev_attr_temp1_input.dev_attr.attr,
1556 &sensor_dev_attr_temp1_min.dev_attr.attr,
1557 &sensor_dev_attr_temp1_max.dev_attr.attr,
1558 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1559 &sensor_dev_attr_temp1_fault.dev_attr.attr,
1560 &sensor_dev_attr_temp1_offset.dev_attr.attr,
1561 &sensor_dev_attr_temp2_input.dev_attr.attr,
1562 &sensor_dev_attr_temp2_min.dev_attr.attr,
1563 &sensor_dev_attr_temp2_max.dev_attr.attr,
1564 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1565 &sensor_dev_attr_temp2_fault.dev_attr.attr,
1566 &sensor_dev_attr_temp2_offset.dev_attr.attr,
1567 &sensor_dev_attr_temp3_input.dev_attr.attr,
1568 &sensor_dev_attr_temp3_min.dev_attr.attr,
1569 &sensor_dev_attr_temp3_max.dev_attr.attr,
1570 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1571 &sensor_dev_attr_temp3_fault.dev_attr.attr,
1572 &sensor_dev_attr_temp3_offset.dev_attr.attr,
b237eb25 1573 /* Zones */
9b257714
JH		 1574 &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr,
1575 &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr,
1576 &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr,
1577 &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr,
1578 &sensor_dev_attr_zone1_auto_channels_temp.dev_attr.attr,
1579 &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr,
1580 &sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr,
1581 &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr,
1582 &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr,
1583 &sensor_dev_attr_zone2_auto_channels_temp.dev_attr.attr,
1584 &sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr,
1585 &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr,
1586 &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr,
1587 &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr,
1588 &sensor_dev_attr_zone3_auto_channels_temp.dev_attr.attr,
b237eb25
JH		 1589 /* Misc */
1590 &dev_attr_vrm.attr,
1591 &dev_attr_cpu0_vid.attr,
9431996f
JH		 1592 NULL
1593};
1594
1595static const struct attribute_group dme1737_group = {
b237eb25 1596 .attrs = dme1737_attr,
9431996f
JH		 1597};
1598
1599/* The following structs hold the PWM attributes, some of which are optional.
1600 * Their creation depends on the chip configuration which is determined during
1601 * module load. */
1602static struct attribute *dme1737_attr_pwm1[] = {
9b257714
JH		 1603 &sensor_dev_attr_pwm1.dev_attr.attr,
1604 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1605 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1606 &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr,
1607 &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr,
1608 &sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr,
1609 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1610 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
9431996f
JH		 1611 NULL
1612};
1613static struct attribute *dme1737_attr_pwm2[] = {
9b257714
JH		 1614 &sensor_dev_attr_pwm2.dev_attr.attr,
1615 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1616 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1617 &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr,
1618 &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr,
1619 &sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr,
1620 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1621 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
9431996f
JH		 1622 NULL
1623};
1624static struct attribute *dme1737_attr_pwm3[] = {
9b257714
JH		 1625 &sensor_dev_attr_pwm3.dev_attr.attr,
1626 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1627 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1628 &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr,
1629 &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr,
1630 &sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr,
1631 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1632 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
9431996f
JH		 1633 NULL
1634};
1635static struct attribute *dme1737_attr_pwm5[] = {
9b257714
JH		 1636 &sensor_dev_attr_pwm5.dev_attr.attr,
1637 &sensor_dev_attr_pwm5_freq.dev_attr.attr,
1638 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
9431996f
JH		 1639 NULL
1640};
1641static struct attribute *dme1737_attr_pwm6[] = {
9b257714
JH		 1642 &sensor_dev_attr_pwm6.dev_attr.attr,
1643 &sensor_dev_attr_pwm6_freq.dev_attr.attr,
1644 &sensor_dev_attr_pwm6_enable.dev_attr.attr,
9431996f
JH		 1645 NULL
1646};
1647
1648static const struct attribute_group dme1737_pwm_group[] = {
1649 { .attrs = dme1737_attr_pwm1 },
1650 { .attrs = dme1737_attr_pwm2 },
1651 { .attrs = dme1737_attr_pwm3 },
1652 { .attrs = NULL },
1653 { .attrs = dme1737_attr_pwm5 },
1654 { .attrs = dme1737_attr_pwm6 },
1655};
1656
1657/* The following structs hold the fan attributes, some of which are optional.
1658 * Their creation depends on the chip configuration which is determined during
1659 * module load. */
1660static struct attribute *dme1737_attr_fan1[] = {
9b257714
JH		 1661 &sensor_dev_attr_fan1_input.dev_attr.attr,
1662 &sensor_dev_attr_fan1_min.dev_attr.attr,
1663 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1664 &sensor_dev_attr_fan1_type.dev_attr.attr,
9431996f
JH		 1665 NULL
1666};
1667static struct attribute *dme1737_attr_fan2[] = {
9b257714
JH		 1668 &sensor_dev_attr_fan2_input.dev_attr.attr,
1669 &sensor_dev_attr_fan2_min.dev_attr.attr,
1670 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1671 &sensor_dev_attr_fan2_type.dev_attr.attr,
9431996f
JH		 1672 NULL
1673};
1674static struct attribute *dme1737_attr_fan3[] = {
9b257714
JH		 1675 &sensor_dev_attr_fan3_input.dev_attr.attr,
1676 &sensor_dev_attr_fan3_min.dev_attr.attr,
1677 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1678 &sensor_dev_attr_fan3_type.dev_attr.attr,
9431996f
JH		 1679 NULL
1680};
1681static struct attribute *dme1737_attr_fan4[] = {
9b257714
JH		 1682 &sensor_dev_attr_fan4_input.dev_attr.attr,
1683 &sensor_dev_attr_fan4_min.dev_attr.attr,
1684 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1685 &sensor_dev_attr_fan4_type.dev_attr.attr,
9431996f
JH		 1686 NULL
1687};
1688static struct attribute *dme1737_attr_fan5[] = {
9b257714
JH		 1689 &sensor_dev_attr_fan5_input.dev_attr.attr,
1690 &sensor_dev_attr_fan5_min.dev_attr.attr,
1691 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1692 &sensor_dev_attr_fan5_max.dev_attr.attr,
9431996f
JH		 1693 NULL
1694};
1695static struct attribute *dme1737_attr_fan6[] = {
9b257714
JH		 1696 &sensor_dev_attr_fan6_input.dev_attr.attr,
1697 &sensor_dev_attr_fan6_min.dev_attr.attr,
1698 &sensor_dev_attr_fan6_alarm.dev_attr.attr,
1699 &sensor_dev_attr_fan6_max.dev_attr.attr,
9431996f
JH		 1700 NULL
1701};
1702
1703static const struct attribute_group dme1737_fan_group[] = {
1704 { .attrs = dme1737_attr_fan1 },
1705 { .attrs = dme1737_attr_fan2 },
1706 { .attrs = dme1737_attr_fan3 },
1707 { .attrs = dme1737_attr_fan4 },
1708 { .attrs = dme1737_attr_fan5 },
1709 { .attrs = dme1737_attr_fan6 },
1710};
1711
1712/* The permissions of all of the following attributes are changed to read-
1713 * writeable if the chip is *not* locked. Otherwise they stay read-only. */
1714static struct attribute *dme1737_attr_lock[] = {
1715 /* Temperatures */
9b257714
JH		 1716 &sensor_dev_attr_temp1_offset.dev_attr.attr,
1717 &sensor_dev_attr_temp2_offset.dev_attr.attr,
1718 &sensor_dev_attr_temp3_offset.dev_attr.attr,
9431996f 1719 /* Zones */
9b257714
JH		 1720 &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr,
1721 &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr,
1722 &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr,
1723 &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr,
1724 &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr,
1725 &sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr,
1726 &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr,
1727 &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr,
1728 &sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr,
1729 &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr,
1730 &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr,
1731 &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr,
9431996f
JH		 1732 NULL
1733};
1734
1735static const struct attribute_group dme1737_lock_group = {
1736 .attrs = dme1737_attr_lock,
1737};
1738
1739/* The permissions of the following PWM attributes are changed to read-
1740 * writeable if the chip is *not* locked and the respective PWM is available.
1741 * Otherwise they stay read-only. */
1742static struct attribute *dme1737_attr_pwm1_lock[] = {
9b257714
JH		 1743 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1744 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1745 &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr,
1746 &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr,
1747 &sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr,
1748 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
9431996f
JH		 1749 NULL
1750};
1751static struct attribute *dme1737_attr_pwm2_lock[] = {
9b257714
JH		 1752 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1753 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1754 &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr,
1755 &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr,
1756 &sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr,
1757 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
9431996f
JH		 1758 NULL
1759};
1760static struct attribute *dme1737_attr_pwm3_lock[] = {
9b257714
JH		 1761 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1762 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1763 &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr,
1764 &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr,
1765 &sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr,
1766 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
9431996f
JH		 1767 NULL
1768};
1769static struct attribute *dme1737_attr_pwm5_lock[] = {
9b257714
JH		 1770 &sensor_dev_attr_pwm5.dev_attr.attr,
1771 &sensor_dev_attr_pwm5_freq.dev_attr.attr,
9431996f
JH		 1772 NULL
1773};
1774static struct attribute *dme1737_attr_pwm6_lock[] = {
9b257714
JH		 1775 &sensor_dev_attr_pwm6.dev_attr.attr,
1776 &sensor_dev_attr_pwm6_freq.dev_attr.attr,
9431996f
JH		 1777 NULL
1778};
1779
1780static const struct attribute_group dme1737_pwm_lock_group[] = {
1781 { .attrs = dme1737_attr_pwm1_lock },
1782 { .attrs = dme1737_attr_pwm2_lock },
1783 { .attrs = dme1737_attr_pwm3_lock },
1784 { .attrs = NULL },
1785 { .attrs = dme1737_attr_pwm5_lock },
1786 { .attrs = dme1737_attr_pwm6_lock },
1787};
1788
1789/* Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the
1790 * chip is not locked. Otherwise they are read-only. */
1791static struct attribute *dme1737_attr_pwm[] = {
1792 &sensor_dev_attr_pwm1.dev_attr.attr,
1793 &sensor_dev_attr_pwm2.dev_attr.attr,
1794 &sensor_dev_attr_pwm3.dev_attr.attr,
1795};
1796
1797/* ---------------------------------------------------------------------
1798 * Super-IO functions
1799 * --------------------------------------------------------------------- */
1800
b237eb25
JH		 1801static inline void dme1737_sio_enter(int sio_cip)
1802{
1803 outb(0x55, sio_cip);
1804}
1805
1806static inline void dme1737_sio_exit(int sio_cip)
1807{
1808 outb(0xaa, sio_cip);
1809}
1810
9431996f
JH		 1811static inline int dme1737_sio_inb(int sio_cip, int reg)
1812{
1813 outb(reg, sio_cip);
1814 return inb(sio_cip + 1);
1815}
1816
1817static inline void dme1737_sio_outb(int sio_cip, int reg, int val)
1818{
1819 outb(reg, sio_cip);
1820 outb(val, sio_cip + 1);
1821}
1822
9431996f 1823/* ---------------------------------------------------------------------
e95c237d 1824 * Device initialization
9431996f
JH		 1825 * --------------------------------------------------------------------- */
1826
67e2f328 1827static int dme1737_i2c_get_features(int, struct dme1737_data*);
9431996f 1828
b237eb25 1829static void dme1737_chmod_file(struct device *dev,
9431996f
JH		 1830 struct attribute *attr, mode_t mode)
1831{
b237eb25
JH		 1832 if (sysfs_chmod_file(&dev->kobj, attr, mode)) {
1833 dev_warn(dev, "Failed to change permissions of %s.\n",
9431996f
JH		 1834 attr->name);
1835 }
1836}
1837
b237eb25 1838static void dme1737_chmod_group(struct device *dev,
9431996f
JH		 1839 const struct attribute_group *group,
1840 mode_t mode)
1841{
1842 struct attribute **attr;
1843
1844 for (attr = group->attrs; *attr; attr++) {
b237eb25 1845 dme1737_chmod_file(dev, *attr, mode);
9431996f
JH		 1846 }
1847}
1848
b237eb25 1849static void dme1737_remove_files(struct device *dev)
9431996f 1850{
b237eb25
JH		 1851 struct dme1737_data *data = dev_get_drvdata(dev);
1852 int ix;
1853
1854 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
1855 if (data->has_fan & (1 << ix)) {
1856 sysfs_remove_group(&dev->kobj,
1857 &dme1737_fan_group[ix]);
1858 }
1859 }
1860
1861 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) {
1862 if (data->has_pwm & (1 << ix)) {
1863 sysfs_remove_group(&dev->kobj,
1864 &dme1737_pwm_group[ix]);
1865 }
1866 }
1867
1868 sysfs_remove_group(&dev->kobj, &dme1737_group);
e95c237d
JH		 1869
1870 if (!data->client.driver) {
1871 sysfs_remove_file(&dev->kobj, &dev_attr_name.attr);
1872 }
b237eb25
JH		 1873}
1874
1875static int dme1737_create_files(struct device *dev)
1876{
1877 struct dme1737_data *data = dev_get_drvdata(dev);
1878 int err, ix;
1879
e95c237d
JH		 1880 /* Create a name attribute for ISA devices */
1881 if (!data->client.driver &&
1882 (err = sysfs_create_file(&dev->kobj, &dev_attr_name.attr))) {
1883 goto exit;
1884 }
1885
b237eb25
JH		 1886 /* Create standard sysfs attributes */
1887 if ((err = sysfs_create_group(&dev->kobj, &dme1737_group))) {
e95c237d 1888 goto exit_remove;
b237eb25
JH		 1889 }
1890
1891 /* Create fan sysfs attributes */
1892 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
1893 if (data->has_fan & (1 << ix)) {
1894 if ((err = sysfs_create_group(&dev->kobj,
1895 &dme1737_fan_group[ix]))) {
1896 goto exit_remove;
1897 }
1898 }
1899 }
1900
1901 /* Create PWM sysfs attributes */
1902 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) {
1903 if (data->has_pwm & (1 << ix)) {
1904 if ((err = sysfs_create_group(&dev->kobj,
1905 &dme1737_pwm_group[ix]))) {
1906 goto exit_remove;
1907 }
1908 }
1909 }
1910
1911 /* Inform if the device is locked. Otherwise change the permissions of
1912 * selected attributes from read-only to read-writeable. */
1913 if (data->config & 0x02) {
1914 dev_info(dev, "Device is locked. Some attributes "
1915 "will be read-only.\n");
1916 } else {
1917 /* Change permissions of standard attributes */
1918 dme1737_chmod_group(dev, &dme1737_lock_group,
1919 S_IRUGO | S_IWUSR);
1920
1921 /* Change permissions of PWM attributes */
1922 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_lock_group); ix++) {
1923 if (data->has_pwm & (1 << ix)) {
1924 dme1737_chmod_group(dev,
1925 &dme1737_pwm_lock_group[ix],
1926 S_IRUGO | S_IWUSR);
1927 }
1928 }
1929
1930 /* Change permissions of pwm[1-3] if in manual mode */
1931 for (ix = 0; ix < 3; ix++) {
1932 if ((data->has_pwm & (1 << ix)) &&
1933 (PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) {
1934 dme1737_chmod_file(dev,
1935 dme1737_attr_pwm[ix],
1936 S_IRUGO | S_IWUSR);
1937 }
1938 }
1939 }
1940
1941 return 0;
1942
1943exit_remove:
1944 dme1737_remove_files(dev);
1945exit:
1946 return err;
1947}
1948
1949static int dme1737_init_device(struct device *dev)
1950{
1951 struct dme1737_data *data = dev_get_drvdata(dev);
1952 struct i2c_client *client = &data->client;
9431996f
JH		 1953 int ix;
1954 u8 reg;
1955
b237eb25
JH		 1956 data->config = dme1737_read(client, DME1737_REG_CONFIG);
1957 /* Inform if part is not monitoring/started */
1958 if (!(data->config & 0x01)) {
1959 if (!force_start) {
1960 dev_err(dev, "Device is not monitoring. "
1961 "Use the force_start load parameter to "
1962 "override.\n");
1963 return -EFAULT;
1964 }
1965
1966 /* Force monitoring */
1967 data->config |= 0x01;
1968 dme1737_write(client, DME1737_REG_CONFIG, data->config);
1969 }
9431996f
JH		 1970 /* Inform if part is not ready */
1971 if (!(data->config & 0x04)) {
b237eb25 1972 dev_err(dev, "Device is not ready.\n");
9431996f
JH		 1973 return -EFAULT;
1974 }
1975
e95c237d
JH		 1976 /* Determine which optional fan and pwm features are enabled/present */
1977 if (client->driver) { /* I2C chip */
1978 data->config2 = dme1737_read(client, DME1737_REG_CONFIG2);
1979 /* Check if optional fan3 input is enabled */
1980 if (data->config2 & 0x04) {
1981 data->has_fan |= (1 << 2);
1982 }
9431996f 1983
e95c237d
JH		 1984 /* Fan4 and pwm3 are only available if the client's I2C address
1985 * is the default 0x2e. Otherwise the I/Os associated with
1986 * these functions are used for addr enable/select. */
1987 if (data->client.addr == 0x2e) {
1988 data->has_fan |= (1 << 3);
1989 data->has_pwm |= (1 << 2);
1990 }
9431996f 1991
e95c237d
JH		 1992 /* Determine which of the optional fan[5-6] and pwm[5-6]
1993 * features are enabled. For this, we need to query the runtime
1994 * registers through the Super-IO LPC interface. Try both
1995 * config ports 0x2e and 0x4e. */
1996 if (dme1737_i2c_get_features(0x2e, data) &&
1997 dme1737_i2c_get_features(0x4e, data)) {
1998 dev_warn(dev, "Failed to query Super-IO for optional "
1999 "features.\n");
2000 }
2001 } else { /* ISA chip */
2002 /* Fan3 and pwm3 are always available. Fan[4-5] and pwm[5-6]
2003 * don't exist in the ISA chip. */
2004 data->has_fan |= (1 << 2);
2005 data->has_pwm |= (1 << 2);
9431996f
JH		 2006 }
2007
2008 /* Fan1, fan2, pwm1, and pwm2 are always present */
2009 data->has_fan |= 0x03;
2010 data->has_pwm |= 0x03;
2011
b237eb25 2012 dev_info(dev, "Optional features: pwm3=%s, pwm5=%s, pwm6=%s, "
9431996f
JH		 2013 "fan3=%s, fan4=%s, fan5=%s, fan6=%s.\n",
2014 (data->has_pwm & (1 << 2)) ? "yes" : "no",
2015 (data->has_pwm & (1 << 4)) ? "yes" : "no",
2016 (data->has_pwm & (1 << 5)) ? "yes" : "no",
2017 (data->has_fan & (1 << 2)) ? "yes" : "no",
2018 (data->has_fan & (1 << 3)) ? "yes" : "no",
2019 (data->has_fan & (1 << 4)) ? "yes" : "no",
2020 (data->has_fan & (1 << 5)) ? "yes" : "no");
2021
2022 reg = dme1737_read(client, DME1737_REG_TACH_PWM);
2023 /* Inform if fan-to-pwm mapping differs from the default */
e95c237d 2024 if (client->driver && reg != 0xa4) { /* I2C chip */
b237eb25 2025 dev_warn(dev, "Non-standard fan to pwm mapping: "
9431996f
JH		 2026 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, "
2027 "fan4->pwm%d. Please report to the driver "
2028 "maintainer.\n",
2029 (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1,
2030 ((reg >> 4) & 0x03) + 1, ((reg >> 6) & 0x03) + 1);
e95c237d
JH		 2031 } else if (!client->driver && reg != 0x24) { /* ISA chip */
2032 dev_warn(dev, "Non-standard fan to pwm mapping: "
2033 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d. "
2034 "Please report to the driver maintainer.\n",
2035 (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1,
2036 ((reg >> 4) & 0x03) + 1);
9431996f
JH		 2037 }
2038
2039 /* Switch pwm[1-3] to manual mode if they are currently disabled and
2040 * set the duty-cycles to 0% (which is identical to the PWMs being
2041 * disabled). */
2042 if (!(data->config & 0x02)) {
2043 for (ix = 0; ix < 3; ix++) {
2044 data->pwm_config[ix] = dme1737_read(client,
2045 DME1737_REG_PWM_CONFIG(ix));
2046 if ((data->has_pwm & (1 << ix)) &&
2047 (PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) {
b237eb25 2048 dev_info(dev, "Switching pwm%d to "
9431996f
JH		 2049 "manual mode.\n", ix + 1);
2050 data->pwm_config[ix] = PWM_EN_TO_REG(1,
2051 data->pwm_config[ix]);
2052 dme1737_write(client, DME1737_REG_PWM(ix), 0);
2053 dme1737_write(client,
2054 DME1737_REG_PWM_CONFIG(ix),
2055 data->pwm_config[ix]);
2056 }
2057 }
2058 }
2059
2060 /* Initialize the default PWM auto channels zone (acz) assignments */
2061 data->pwm_acz[0] = 1; /* pwm1 -> zone1 */
2062 data->pwm_acz[1] = 2; /* pwm2 -> zone2 */
2063 data->pwm_acz[2] = 4; /* pwm3 -> zone3 */
2064
2065 /* Set VRM */
2066 data->vrm = vid_which_vrm();
2067
2068 return 0;
2069}
2070
67e2f328
JH		 2071/* ---------------------------------------------------------------------
2072 * I2C device detection and registration
2073 * --------------------------------------------------------------------- */
2074
2075static struct i2c_driver dme1737_i2c_driver;
2076
2077static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data)
2078{
2079 int err = 0, reg;
2080 u16 addr;
2081
2082 dme1737_sio_enter(sio_cip);
2083
2084 /* Check device ID
2085 * The DME1737 can return either 0x78 or 0x77 as its device ID. */
345a2224 2086 reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20);
67e2f328
JH		 2087 if (!(reg == 0x77 || reg == 0x78)) {
2088 err = -ENODEV;
2089 goto exit;
2090 }
2091
2092 /* Select logical device A (runtime registers) */
2093 dme1737_sio_outb(sio_cip, 0x07, 0x0a);
2094
2095 /* Get the base address of the runtime registers */
2096 if (!(addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) |
2097 dme1737_sio_inb(sio_cip, 0x61))) {
2098 err = -ENODEV;
2099 goto exit;
2100 }
2101
2102 /* Read the runtime registers to determine which optional features
2103 * are enabled and available. Bits [3:2] of registers 0x43-0x46 are set
2104 * to '10' if the respective feature is enabled. */
2105 if ((inb(addr + 0x43) & 0x0c) == 0x08) { /* fan6 */
2106 data->has_fan |= (1 << 5);
2107 }
2108 if ((inb(addr + 0x44) & 0x0c) == 0x08) { /* pwm6 */
2109 data->has_pwm |= (1 << 5);
2110 }
2111 if ((inb(addr + 0x45) & 0x0c) == 0x08) { /* fan5 */
2112 data->has_fan |= (1 << 4);
2113 }
2114 if ((inb(addr + 0x46) & 0x0c) == 0x08) { /* pwm5 */
2115 data->has_pwm |= (1 << 4);
2116 }
2117
2118exit:
2119 dme1737_sio_exit(sio_cip);
2120
2121 return err;
2122}
2123
b237eb25
JH		 2124static int dme1737_i2c_detect(struct i2c_adapter *adapter, int address,
2125 int kind)
9431996f
JH		 2126{
2127 u8 company, verstep = 0;
2128 struct i2c_client *client;
2129 struct dme1737_data *data;
b237eb25
JH		 2130 struct device *dev;
2131 int err = 0;
9431996f
JH		 2132 const char *name;
2133
2134 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
2135 goto exit;
2136 }
2137
2138 if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) {
2139 err = -ENOMEM;
2140 goto exit;
2141 }
2142
2143 client = &data->client;
2144 i2c_set_clientdata(client, data);
2145 client->addr = address;
2146 client->adapter = adapter;
b237eb25
JH		 2147 client->driver = &dme1737_i2c_driver;
2148 dev = &client->dev;
9431996f
JH		 2149
2150 /* A negative kind means that the driver was loaded with no force
2151 * parameter (default), so we must identify the chip. */
2152 if (kind < 0) {
2153 company = dme1737_read(client, DME1737_REG_COMPANY);
2154 verstep = dme1737_read(client, DME1737_REG_VERSTEP);
2155
2156 if (!((company == DME1737_COMPANY_SMSC) &&
2157 ((verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP))) {
2158 err = -ENODEV;
2159 goto exit_kfree;
2160 }
2161 }
2162
2163 kind = dme1737;
2164 name = "dme1737";
2165
2166 /* Fill in the remaining client fields and put it into the global
2167 * list */
2168 strlcpy(client->name, name, I2C_NAME_SIZE);
2169 mutex_init(&data->update_lock);
2170
2171 /* Tell the I2C layer a new client has arrived */
2172 if ((err = i2c_attach_client(client))) {
2173 goto exit_kfree;
2174 }
2175
b237eb25
JH		 2176 dev_info(dev, "Found a DME1737 chip at 0x%02x (rev 0x%02x).\n",
2177 client->addr, verstep);
2178
9431996f 2179 /* Initialize the DME1737 chip */
b237eb25
JH		 2180 if ((err = dme1737_init_device(dev))) {
2181 dev_err(dev, "Failed to initialize device.\n");
9431996f
JH		 2182 goto exit_detach;
2183 }
2184
b237eb25
JH		 2185 /* Create sysfs files */
2186 if ((err = dme1737_create_files(dev))) {
2187 dev_err(dev, "Failed to create sysfs files.\n");
2188 goto exit_detach;
9431996f
JH		 2189 }
2190
2191 /* Register device */
62ee3e10 2192 data->hwmon_dev = hwmon_device_register(dev);
1beeffe4 2193 if (IS_ERR(data->hwmon_dev)) {
b237eb25 2194 dev_err(dev, "Failed to register device.\n");
1beeffe4 2195 err = PTR_ERR(data->hwmon_dev);
9431996f
JH		 2196 goto exit_remove;
2197 }
2198
9431996f
JH		 2199 return 0;
2200
2201exit_remove:
b237eb25 2202 dme1737_remove_files(dev);
9431996f
JH		 2203exit_detach:
2204 i2c_detach_client(client);
2205exit_kfree:
2206 kfree(data);
2207exit:
2208 return err;
2209}
2210
b237eb25 2211static int dme1737_i2c_attach_adapter(struct i2c_adapter *adapter)
9431996f
JH		 2212{
2213 if (!(adapter->class & I2C_CLASS_HWMON)) {
2214 return 0;
2215 }
2216
b237eb25 2217 return i2c_probe(adapter, &addr_data, dme1737_i2c_detect);
9431996f
JH		 2218}
2219
b237eb25 2220static int dme1737_i2c_detach_client(struct i2c_client *client)
9431996f
JH		 2221{
2222 struct dme1737_data *data = i2c_get_clientdata(client);
b237eb25 2223 int err;
9431996f 2224
1beeffe4 2225 hwmon_device_unregister(data->hwmon_dev);
b237eb25 2226 dme1737_remove_files(&client->dev);
9431996f
JH		 2227
2228 if ((err = i2c_detach_client(client))) {
2229 return err;
2230 }
2231
2232 kfree(data);
2233 return 0;
2234}
2235
b237eb25 2236static struct i2c_driver dme1737_i2c_driver = {
9431996f
JH		 2237 .driver = {
2238 .name = "dme1737",
2239 },
b237eb25
JH		 2240 .attach_adapter = dme1737_i2c_attach_adapter,
2241 .detach_client = dme1737_i2c_detach_client,
9431996f
JH		 2242};
2243
e95c237d
JH		 2244/* ---------------------------------------------------------------------
2245 * ISA device detection and registration
2246 * --------------------------------------------------------------------- */
2247
2248static int __init dme1737_isa_detect(int sio_cip, unsigned short *addr)
2249{
2250 int err = 0, reg;
2251 unsigned short base_addr;
2252
2253 dme1737_sio_enter(sio_cip);
2254
2255 /* Check device ID
2256 * We currently know about SCH3112 (0x7c), SCH3114 (0x7d), and
2257 * SCH3116 (0x7f). */
67b671bc 2258 reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20);
e95c237d
JH		 2259 if (!(reg == 0x7c || reg == 0x7d || reg == 0x7f)) {
2260 err = -ENODEV;
2261 goto exit;
2262 }
2263
2264 /* Select logical device A (runtime registers) */
2265 dme1737_sio_outb(sio_cip, 0x07, 0x0a);
2266
2267 /* Get the base address of the runtime registers */
2268 if (!(base_addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) |
2269 dme1737_sio_inb(sio_cip, 0x61))) {
2270 printk(KERN_ERR "dme1737: Base address not set.\n");
2271 err = -ENODEV;
2272 goto exit;
2273 }
2274
2275 /* Access to the hwmon registers is through an index/data register
2276 * pair located at offset 0x70/0x71. */
2277 *addr = base_addr + 0x70;
2278
2279exit:
2280 dme1737_sio_exit(sio_cip);
2281 return err;
2282}
2283
2284static int __init dme1737_isa_device_add(unsigned short addr)
2285{
2286 struct resource res = {
2287 .start = addr,
2288 .end = addr + DME1737_EXTENT - 1,
2289 .name = "dme1737",
2290 .flags = IORESOURCE_IO,
2291 };
2292 int err;
2293
2294 if (!(pdev = platform_device_alloc("dme1737", addr))) {
2295 printk(KERN_ERR "dme1737: Failed to allocate device.\n");
2296 err = -ENOMEM;
2297 goto exit;
2298 }
2299
2300 if ((err = platform_device_add_resources(pdev, &res, 1))) {
2301 printk(KERN_ERR "dme1737: Failed to add device resource "
2302 "(err = %d).\n", err);
2303 goto exit_device_put;
2304 }
2305
2306 if ((err = platform_device_add(pdev))) {
2307 printk(KERN_ERR "dme1737: Failed to add device (err = %d).\n",
2308 err);
2309 goto exit_device_put;
2310 }
2311
2312 return 0;
2313
2314exit_device_put:
2315 platform_device_put(pdev);
2316 pdev = NULL;
2317exit:
2318 return err;
2319}
2320
2321static int __devinit dme1737_isa_probe(struct platform_device *pdev)
2322{
2323 u8 company, device;
2324 struct resource *res;
2325 struct i2c_client *client;
2326 struct dme1737_data *data;
2327 struct device *dev = &pdev->dev;
2328 int err;
2329
2330 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2331 if (!request_region(res->start, DME1737_EXTENT, "dme1737")) {
2332 dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n",
2333 (unsigned short)res->start,
2334 (unsigned short)res->start + DME1737_EXTENT - 1);
2335 err = -EBUSY;
2336 goto exit;
2337 }
2338
2339 if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) {
2340 err = -ENOMEM;
2341 goto exit_release_region;
2342 }
2343
2344 client = &data->client;
2345 i2c_set_clientdata(client, data);
2346 client->addr = res->start;
2347 platform_set_drvdata(pdev, data);
2348
2349 company = dme1737_read(client, DME1737_REG_COMPANY);
2350 device = dme1737_read(client, DME1737_REG_DEVICE);
2351
2352 if (!((company == DME1737_COMPANY_SMSC) &&
2353 (device == SCH311X_DEVICE))) {
2354 err = -ENODEV;
2355 goto exit_kfree;
2356 }
2357
2358 /* Fill in the remaining client fields and initialize the mutex */
2359 strlcpy(client->name, "sch311x", I2C_NAME_SIZE);
2360 mutex_init(&data->update_lock);
2361
2362 dev_info(dev, "Found a SCH311x chip at 0x%04x\n", client->addr);
2363
2364 /* Initialize the chip */
2365 if ((err = dme1737_init_device(dev))) {
2366 dev_err(dev, "Failed to initialize device.\n");
2367 goto exit_kfree;
2368 }
2369
2370 /* Create sysfs files */
2371 if ((err = dme1737_create_files(dev))) {
2372 dev_err(dev, "Failed to create sysfs files.\n");
2373 goto exit_kfree;
2374 }
2375
2376 /* Register device */
2377 data->hwmon_dev = hwmon_device_register(dev);
2378 if (IS_ERR(data->hwmon_dev)) {
2379 dev_err(dev, "Failed to register device.\n");
2380 err = PTR_ERR(data->hwmon_dev);
2381 goto exit_remove_files;
2382 }
2383
2384 return 0;
2385
2386exit_remove_files:
2387 dme1737_remove_files(dev);
2388exit_kfree:
2389 platform_set_drvdata(pdev, NULL);
2390 kfree(data);
2391exit_release_region:
2392 release_region(res->start, DME1737_EXTENT);
2393exit:
2394 return err;
2395}
2396
2397static int __devexit dme1737_isa_remove(struct platform_device *pdev)
2398{
2399 struct dme1737_data *data = platform_get_drvdata(pdev);
2400
2401 hwmon_device_unregister(data->hwmon_dev);
2402 dme1737_remove_files(&pdev->dev);
2403 release_region(data->client.addr, DME1737_EXTENT);
2404 platform_set_drvdata(pdev, NULL);
2405 kfree(data);
2406
2407 return 0;
2408}
2409
2410static struct platform_driver dme1737_isa_driver = {
2411 .driver = {
2412 .owner = THIS_MODULE,
2413 .name = "dme1737",
2414 },
2415 .probe = dme1737_isa_probe,
2416 .remove = __devexit_p(dme1737_isa_remove),
2417};
2418
67e2f328
JH		 2419/* ---------------------------------------------------------------------
2420 * Module initialization and cleanup
2421 * --------------------------------------------------------------------- */
2422
9431996f
JH		 2423static int __init dme1737_init(void)
2424{
e95c237d
JH		 2425 int err;
2426 unsigned short addr;
2427
2428 if ((err = i2c_add_driver(&dme1737_i2c_driver))) {
2429 goto exit;
2430 }
2431
2432 if (dme1737_isa_detect(0x2e, &addr) &&
2433 dme1737_isa_detect(0x4e, &addr)) {
2434 /* Return 0 if we didn't find an ISA device */
2435 return 0;
2436 }
2437
2438 if ((err = platform_driver_register(&dme1737_isa_driver))) {
2439 goto exit_del_i2c_driver;
2440 }
2441
2442 /* Sets global pdev as a side effect */
2443 if ((err = dme1737_isa_device_add(addr))) {
2444 goto exit_del_isa_driver;
2445 }
2446
2447 return 0;
2448
2449exit_del_isa_driver:
2450 platform_driver_unregister(&dme1737_isa_driver);
2451exit_del_i2c_driver:
2452 i2c_del_driver(&dme1737_i2c_driver);
2453exit:
2454 return err;
9431996f
JH		 2455}
2456
2457static void __exit dme1737_exit(void)
2458{
e95c237d
JH		 2459 if (pdev) {
2460 platform_device_unregister(pdev);
2461 platform_driver_unregister(&dme1737_isa_driver);
2462 }
2463
b237eb25 2464 i2c_del_driver(&dme1737_i2c_driver);
9431996f
JH		 2465}
2466
2467MODULE_AUTHOR("Juerg Haefliger <juergh@gmail.com>");
2468MODULE_DESCRIPTION("DME1737 sensors");
2469MODULE_LICENSE("GPL");
2470
2471module_init(dme1737_init);
2472module_exit(dme1737_exit);
Linux 6.x block layer and io_uring tree(s)