hwmon: Retire SENSORS_LIMIT
[linux-2.6-block.git] / drivers / hwmon / coretemp.c
CommitLineData
bebe4678
RM
1/*
2 * coretemp.c - Linux kernel module for hardware monitoring
3 *
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
5 *
6 * Inspired from many hwmon drivers
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301 USA.
21 */
22
f8bb8925
JP
23#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24
bebe4678 25#include <linux/module.h>
bebe4678
RM
26#include <linux/init.h>
27#include <linux/slab.h>
28#include <linux/jiffies.h>
29#include <linux/hwmon.h>
30#include <linux/sysfs.h>
31#include <linux/hwmon-sysfs.h>
32#include <linux/err.h>
33#include <linux/mutex.h>
34#include <linux/list.h>
35#include <linux/platform_device.h>
36#include <linux/cpu.h>
4cc45275 37#include <linux/smp.h>
a45a8c85 38#include <linux/moduleparam.h>
bebe4678
RM
39#include <asm/msr.h>
40#include <asm/processor.h>
9b38096f 41#include <asm/cpu_device_id.h>
bebe4678
RM
42
43#define DRVNAME "coretemp"
44
a45a8c85
JD
45/*
46 * force_tjmax only matters when TjMax can't be read from the CPU itself.
47 * When set, it replaces the driver's suboptimal heuristic.
48 */
49static int force_tjmax;
50module_param_named(tjmax, force_tjmax, int, 0444);
51MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
52
199e0de7 53#define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
bdc71c9a 54#define NUM_REAL_CORES 32 /* Number of Real cores per cpu */
199e0de7 55#define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */
c814a4c7 56#define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
f4af6fd6 57#define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
199e0de7
D
58#define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
59
780affe0
GR
60#define TO_PHYS_ID(cpu) (cpu_data(cpu).phys_proc_id)
61#define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id)
141168c3
KW
62#define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
63
64#ifdef CONFIG_SMP
bb74e8ca 65#define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu))
199e0de7 66#else
bb74e8ca 67#define for_each_sibling(i, cpu) for (i = 0; false; )
199e0de7 68#endif
bebe4678
RM
69
70/*
199e0de7
D
71 * Per-Core Temperature Data
72 * @last_updated: The time when the current temperature value was updated
73 * earlier (in jiffies).
74 * @cpu_core_id: The CPU Core from which temperature values should be read
75 * This value is passed as "id" field to rdmsr/wrmsr functions.
76 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
77 * from where the temperature values should be read.
c814a4c7 78 * @attr_size: Total number of pre-core attrs displayed in the sysfs.
199e0de7
D
79 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
80 * Otherwise, temp_data holds coretemp data.
81 * @valid: If this is 1, the current temperature is valid.
bebe4678 82 */
199e0de7 83struct temp_data {
bebe4678 84 int temp;
6369a288 85 int ttarget;
199e0de7
D
86 int tjmax;
87 unsigned long last_updated;
88 unsigned int cpu;
89 u32 cpu_core_id;
90 u32 status_reg;
c814a4c7 91 int attr_size;
199e0de7
D
92 bool is_pkg_data;
93 bool valid;
c814a4c7
D
94 struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
95 char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
199e0de7 96 struct mutex update_lock;
bebe4678
RM
97};
98
199e0de7
D
99/* Platform Data per Physical CPU */
100struct platform_data {
101 struct device *hwmon_dev;
102 u16 phys_proc_id;
103 struct temp_data *core_data[MAX_CORE_DATA];
104 struct device_attribute name_attr;
105};
bebe4678 106
199e0de7
D
107struct pdev_entry {
108 struct list_head list;
109 struct platform_device *pdev;
199e0de7 110 u16 phys_proc_id;
199e0de7
D
111};
112
113static LIST_HEAD(pdev_list);
114static DEFINE_MUTEX(pdev_list_mutex);
115
116static ssize_t show_name(struct device *dev,
117 struct device_attribute *devattr, char *buf)
118{
119 return sprintf(buf, "%s\n", DRVNAME);
120}
121
122static ssize_t show_label(struct device *dev,
123 struct device_attribute *devattr, char *buf)
bebe4678 124{
bebe4678 125 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
199e0de7
D
126 struct platform_data *pdata = dev_get_drvdata(dev);
127 struct temp_data *tdata = pdata->core_data[attr->index];
128
129 if (tdata->is_pkg_data)
130 return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
bebe4678 131
199e0de7 132 return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
bebe4678
RM
133}
134
199e0de7
D
135static ssize_t show_crit_alarm(struct device *dev,
136 struct device_attribute *devattr, char *buf)
bebe4678 137{
199e0de7
D
138 u32 eax, edx;
139 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
140 struct platform_data *pdata = dev_get_drvdata(dev);
141 struct temp_data *tdata = pdata->core_data[attr->index];
142
143 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
144
145 return sprintf(buf, "%d\n", (eax >> 5) & 1);
bebe4678
RM
146}
147
199e0de7
D
148static ssize_t show_tjmax(struct device *dev,
149 struct device_attribute *devattr, char *buf)
bebe4678
RM
150{
151 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
199e0de7 152 struct platform_data *pdata = dev_get_drvdata(dev);
bebe4678 153
199e0de7 154 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
bebe4678
RM
155}
156
199e0de7
D
157static ssize_t show_ttarget(struct device *dev,
158 struct device_attribute *devattr, char *buf)
159{
160 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
161 struct platform_data *pdata = dev_get_drvdata(dev);
bebe4678 162
199e0de7
D
163 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
164}
bebe4678 165
199e0de7
D
166static ssize_t show_temp(struct device *dev,
167 struct device_attribute *devattr, char *buf)
bebe4678 168{
199e0de7
D
169 u32 eax, edx;
170 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
171 struct platform_data *pdata = dev_get_drvdata(dev);
172 struct temp_data *tdata = pdata->core_data[attr->index];
bebe4678 173
199e0de7 174 mutex_lock(&tdata->update_lock);
bebe4678 175
199e0de7
D
176 /* Check whether the time interval has elapsed */
177 if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
178 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
179 tdata->valid = 0;
180 /* Check whether the data is valid */
bebe4678 181 if (eax & 0x80000000) {
199e0de7 182 tdata->temp = tdata->tjmax -
4cc45275 183 ((eax >> 16) & 0x7f) * 1000;
199e0de7 184 tdata->valid = 1;
bebe4678 185 }
199e0de7 186 tdata->last_updated = jiffies;
bebe4678
RM
187 }
188
199e0de7
D
189 mutex_unlock(&tdata->update_lock);
190 return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
bebe4678
RM
191}
192
41e58a1f
GR
193struct tjmax {
194 char const *id;
195 int tjmax;
196};
197
64f50307 198static const struct tjmax __cpuinitconst tjmax_table[] = {
1102dcab
GR
199 { "CPU 230", 100000 }, /* Model 0x1c, stepping 2 */
200 { "CPU 330", 125000 }, /* Model 0x1c, stepping 2 */
201 { "CPU CE4110", 110000 }, /* Model 0x1c, stepping 10 */
202 { "CPU CE4150", 110000 }, /* Model 0x1c, stepping 10 */
203 { "CPU CE4170", 110000 }, /* Model 0x1c, stepping 10 */
41e58a1f
GR
204};
205
2fa5222e
GR
206struct tjmax_model {
207 u8 model;
208 u8 mask;
209 int tjmax;
210};
211
212#define ANY 0xff
213
214static const struct tjmax_model __cpuinitconst tjmax_model_table[] = {
215 { 0x1c, 10, 100000 }, /* D4xx, N4xx, D5xx, N5xx */
216 { 0x1c, ANY, 90000 }, /* Z5xx, N2xx, possibly others
217 * Note: Also matches 230 and 330,
218 * which are covered by tjmax_table
219 */
220 { 0x26, ANY, 90000 }, /* Atom Tunnel Creek (Exx), Lincroft (Z6xx)
221 * Note: TjMax for E6xxT is 110C, but CPU type
222 * is undetectable by software
223 */
224 { 0x27, ANY, 90000 }, /* Atom Medfield (Z2460) */
225 { 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx) */
226};
227
d6db23c7
JD
228static int __cpuinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id,
229 struct device *dev)
118a8871
RM
230{
231 /* The 100C is default for both mobile and non mobile CPUs */
232
233 int tjmax = 100000;
eccfed42 234 int tjmax_ee = 85000;
708a62bc 235 int usemsr_ee = 1;
118a8871
RM
236 int err;
237 u32 eax, edx;
41e58a1f
GR
238 int i;
239
240 /* explicit tjmax table entries override heuristics */
241 for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
242 if (strstr(c->x86_model_id, tjmax_table[i].id))
243 return tjmax_table[i].tjmax;
244 }
118a8871 245
2fa5222e
GR
246 for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) {
247 const struct tjmax_model *tm = &tjmax_model_table[i];
248 if (c->x86_model == tm->model &&
249 (tm->mask == ANY || c->x86_mask == tm->mask))
250 return tm->tjmax;
72cbdddc 251 }
1fe63ab4 252
72cbdddc 253 /* Early chips have no MSR for TjMax */
1fe63ab4 254
72cbdddc 255 if (c->x86_model == 0xf && c->x86_mask < 4)
5592906f 256 usemsr_ee = 0;
708a62bc 257
4cc45275 258 if (c->x86_model > 0xe && usemsr_ee) {
eccfed42 259 u8 platform_id;
118a8871 260
4cc45275
GR
261 /*
262 * Now we can detect the mobile CPU using Intel provided table
263 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
264 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
265 */
118a8871
RM
266 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
267 if (err) {
268 dev_warn(dev,
269 "Unable to access MSR 0x17, assuming desktop"
270 " CPU\n");
708a62bc 271 usemsr_ee = 0;
eccfed42 272 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
4cc45275
GR
273 /*
274 * Trust bit 28 up to Penryn, I could not find any
275 * documentation on that; if you happen to know
276 * someone at Intel please ask
277 */
708a62bc 278 usemsr_ee = 0;
eccfed42
RM
279 } else {
280 /* Platform ID bits 52:50 (EDX starts at bit 32) */
281 platform_id = (edx >> 18) & 0x7;
282
4cc45275
GR
283 /*
284 * Mobile Penryn CPU seems to be platform ID 7 or 5
285 * (guesswork)
286 */
287 if (c->x86_model == 0x17 &&
288 (platform_id == 5 || platform_id == 7)) {
289 /*
290 * If MSR EE bit is set, set it to 90 degrees C,
291 * otherwise 105 degrees C
292 */
eccfed42
RM
293 tjmax_ee = 90000;
294 tjmax = 105000;
295 }
118a8871
RM
296 }
297 }
298
708a62bc 299 if (usemsr_ee) {
118a8871
RM
300 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
301 if (err) {
302 dev_warn(dev,
303 "Unable to access MSR 0xEE, for Tjmax, left"
4d7a5644 304 " at default\n");
118a8871 305 } else if (eax & 0x40000000) {
eccfed42 306 tjmax = tjmax_ee;
118a8871 307 }
708a62bc 308 } else if (tjmax == 100000) {
4cc45275
GR
309 /*
310 * If we don't use msr EE it means we are desktop CPU
311 * (with exeception of Atom)
312 */
118a8871
RM
313 dev_warn(dev, "Using relative temperature scale!\n");
314 }
315
316 return tjmax;
317}
318
d6db23c7
JD
319static int __cpuinit get_tjmax(struct cpuinfo_x86 *c, u32 id,
320 struct device *dev)
a321cedb 321{
a321cedb
CE
322 int err;
323 u32 eax, edx;
324 u32 val;
325
4cc45275
GR
326 /*
327 * A new feature of current Intel(R) processors, the
328 * IA32_TEMPERATURE_TARGET contains the TjMax value
329 */
a321cedb
CE
330 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
331 if (err) {
6bf9e9b0
JD
332 if (c->x86_model > 0xe && c->x86_model != 0x1c)
333 dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
a321cedb
CE
334 } else {
335 val = (eax >> 16) & 0xff;
336 /*
337 * If the TjMax is not plausible, an assumption
338 * will be used
339 */
bb9973e4 340 if (val) {
6bf9e9b0 341 dev_dbg(dev, "TjMax is %d degrees C\n", val);
a321cedb
CE
342 return val * 1000;
343 }
344 }
345
a45a8c85
JD
346 if (force_tjmax) {
347 dev_notice(dev, "TjMax forced to %d degrees C by user\n",
348 force_tjmax);
349 return force_tjmax * 1000;
350 }
351
a321cedb
CE
352 /*
353 * An assumption is made for early CPUs and unreadable MSR.
4f5f71a7 354 * NOTE: the calculated value may not be correct.
a321cedb 355 */
4f5f71a7 356 return adjust_tjmax(c, id, dev);
a321cedb
CE
357}
358
6c931ae1 359static int create_name_attr(struct platform_data *pdata,
d6db23c7 360 struct device *dev)
199e0de7 361{
4258781a 362 sysfs_attr_init(&pdata->name_attr.attr);
199e0de7
D
363 pdata->name_attr.attr.name = "name";
364 pdata->name_attr.attr.mode = S_IRUGO;
365 pdata->name_attr.show = show_name;
366 return device_create_file(dev, &pdata->name_attr);
367}
bebe4678 368
d6db23c7
JD
369static int __cpuinit create_core_attrs(struct temp_data *tdata,
370 struct device *dev, int attr_no)
199e0de7
D
371{
372 int err, i;
e3204ed3 373 static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
199e0de7 374 struct device_attribute *devattr, char *buf) = {
c814a4c7 375 show_label, show_crit_alarm, show_temp, show_tjmax,
f4af6fd6 376 show_ttarget };
e3204ed3 377 static const char *const names[TOTAL_ATTRS] = {
199e0de7 378 "temp%d_label", "temp%d_crit_alarm",
c814a4c7 379 "temp%d_input", "temp%d_crit",
f4af6fd6 380 "temp%d_max" };
199e0de7 381
c814a4c7 382 for (i = 0; i < tdata->attr_size; i++) {
199e0de7
D
383 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
384 attr_no);
4258781a 385 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
199e0de7
D
386 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
387 tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
388 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
199e0de7
D
389 tdata->sd_attrs[i].index = attr_no;
390 err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
391 if (err)
392 goto exit_free;
bebe4678 393 }
199e0de7
D
394 return 0;
395
396exit_free:
397 while (--i >= 0)
398 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
399 return err;
400}
401
199e0de7 402
0eb9782a 403static int __cpuinit chk_ucode_version(unsigned int cpu)
199e0de7 404{
0eb9782a 405 struct cpuinfo_x86 *c = &cpu_data(cpu);
67f363b1 406
199e0de7
D
407 /*
408 * Check if we have problem with errata AE18 of Core processors:
409 * Readings might stop update when processor visited too deep sleep,
410 * fixed for stepping D0 (6EC).
411 */
ca8bc8dc
AK
412 if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
413 pr_err("Errata AE18 not fixed, update BIOS or "
414 "microcode of the CPU!\n");
415 return -ENODEV;
67f363b1 416 }
199e0de7
D
417 return 0;
418}
419
d6db23c7 420static struct platform_device __cpuinit *coretemp_get_pdev(unsigned int cpu)
199e0de7
D
421{
422 u16 phys_proc_id = TO_PHYS_ID(cpu);
423 struct pdev_entry *p;
424
425 mutex_lock(&pdev_list_mutex);
426
427 list_for_each_entry(p, &pdev_list, list)
428 if (p->phys_proc_id == phys_proc_id) {
429 mutex_unlock(&pdev_list_mutex);
430 return p->pdev;
431 }
432
433 mutex_unlock(&pdev_list_mutex);
434 return NULL;
435}
436
d6db23c7
JD
437static struct temp_data __cpuinit *init_temp_data(unsigned int cpu,
438 int pkg_flag)
199e0de7
D
439{
440 struct temp_data *tdata;
441
442 tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
443 if (!tdata)
444 return NULL;
445
446 tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
447 MSR_IA32_THERM_STATUS;
448 tdata->is_pkg_data = pkg_flag;
449 tdata->cpu = cpu;
450 tdata->cpu_core_id = TO_CORE_ID(cpu);
c814a4c7 451 tdata->attr_size = MAX_CORE_ATTRS;
199e0de7
D
452 mutex_init(&tdata->update_lock);
453 return tdata;
454}
67f363b1 455
d6db23c7 456static int __cpuinit create_core_data(struct platform_device *pdev,
199e0de7
D
457 unsigned int cpu, int pkg_flag)
458{
459 struct temp_data *tdata;
2f1c3db0 460 struct platform_data *pdata = platform_get_drvdata(pdev);
199e0de7
D
461 struct cpuinfo_x86 *c = &cpu_data(cpu);
462 u32 eax, edx;
463 int err, attr_no;
bebe4678 464
a321cedb 465 /*
199e0de7
D
466 * Find attr number for sysfs:
467 * We map the attr number to core id of the CPU
468 * The attr number is always core id + 2
469 * The Pkgtemp will always show up as temp1_*, if available
a321cedb 470 */
199e0de7 471 attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
6369a288 472
199e0de7
D
473 if (attr_no > MAX_CORE_DATA - 1)
474 return -ERANGE;
475
f4e0bcf0
GR
476 /*
477 * Provide a single set of attributes for all HT siblings of a core
478 * to avoid duplicate sensors (the processor ID and core ID of all
6777b9e4
GR
479 * HT siblings of a core are the same).
480 * Skip if a HT sibling of this core is already registered.
f4e0bcf0
GR
481 * This is not an error.
482 */
199e0de7
D
483 if (pdata->core_data[attr_no] != NULL)
484 return 0;
6369a288 485
199e0de7
D
486 tdata = init_temp_data(cpu, pkg_flag);
487 if (!tdata)
488 return -ENOMEM;
bebe4678 489
199e0de7
D
490 /* Test if we can access the status register */
491 err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
492 if (err)
493 goto exit_free;
494
495 /* We can access status register. Get Critical Temperature */
6bf9e9b0 496 tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
199e0de7 497
c814a4c7 498 /*
f4af6fd6
GR
499 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
500 * The target temperature is available on older CPUs but not in this
501 * register. Atoms don't have the register at all.
c814a4c7 502 */
f4af6fd6
GR
503 if (c->x86_model > 0xe && c->x86_model != 0x1c) {
504 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
505 &eax, &edx);
506 if (!err) {
507 tdata->ttarget
508 = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
509 tdata->attr_size++;
510 }
c814a4c7
D
511 }
512
199e0de7
D
513 pdata->core_data[attr_no] = tdata;
514
515 /* Create sysfs interfaces */
516 err = create_core_attrs(tdata, &pdev->dev, attr_no);
517 if (err)
518 goto exit_free;
bebe4678
RM
519
520 return 0;
199e0de7 521exit_free:
20ecb499 522 pdata->core_data[attr_no] = NULL;
199e0de7
D
523 kfree(tdata);
524 return err;
525}
526
d6db23c7 527static void __cpuinit coretemp_add_core(unsigned int cpu, int pkg_flag)
199e0de7 528{
199e0de7
D
529 struct platform_device *pdev = coretemp_get_pdev(cpu);
530 int err;
531
532 if (!pdev)
533 return;
534
2f1c3db0 535 err = create_core_data(pdev, cpu, pkg_flag);
199e0de7
D
536 if (err)
537 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
538}
539
540static void coretemp_remove_core(struct platform_data *pdata,
541 struct device *dev, int indx)
542{
543 int i;
544 struct temp_data *tdata = pdata->core_data[indx];
545
546 /* Remove the sysfs attributes */
c814a4c7 547 for (i = 0; i < tdata->attr_size; i++)
199e0de7
D
548 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
549
550 kfree(pdata->core_data[indx]);
551 pdata->core_data[indx] = NULL;
552}
553
6c931ae1 554static int coretemp_probe(struct platform_device *pdev)
199e0de7
D
555{
556 struct platform_data *pdata;
557 int err;
bebe4678 558
199e0de7
D
559 /* Initialize the per-package data structures */
560 pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
561 if (!pdata)
562 return -ENOMEM;
563
564 err = create_name_attr(pdata, &pdev->dev);
565 if (err)
566 goto exit_free;
567
b3a242a6 568 pdata->phys_proc_id = pdev->id;
199e0de7
D
569 platform_set_drvdata(pdev, pdata);
570
571 pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
572 if (IS_ERR(pdata->hwmon_dev)) {
573 err = PTR_ERR(pdata->hwmon_dev);
574 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
575 goto exit_name;
576 }
577 return 0;
578
579exit_name:
580 device_remove_file(&pdev->dev, &pdata->name_attr);
581 platform_set_drvdata(pdev, NULL);
bebe4678 582exit_free:
199e0de7 583 kfree(pdata);
bebe4678
RM
584 return err;
585}
586
281dfd0b 587static int coretemp_remove(struct platform_device *pdev)
bebe4678 588{
199e0de7
D
589 struct platform_data *pdata = platform_get_drvdata(pdev);
590 int i;
bebe4678 591
199e0de7
D
592 for (i = MAX_CORE_DATA - 1; i >= 0; --i)
593 if (pdata->core_data[i])
594 coretemp_remove_core(pdata, &pdev->dev, i);
595
596 device_remove_file(&pdev->dev, &pdata->name_attr);
597 hwmon_device_unregister(pdata->hwmon_dev);
bebe4678 598 platform_set_drvdata(pdev, NULL);
199e0de7 599 kfree(pdata);
bebe4678
RM
600 return 0;
601}
602
603static struct platform_driver coretemp_driver = {
604 .driver = {
605 .owner = THIS_MODULE,
606 .name = DRVNAME,
607 },
608 .probe = coretemp_probe,
9e5e9b7a 609 .remove = coretemp_remove,
bebe4678
RM
610};
611
bebe4678
RM
612static int __cpuinit coretemp_device_add(unsigned int cpu)
613{
614 int err;
615 struct platform_device *pdev;
616 struct pdev_entry *pdev_entry;
d883b9f0
JD
617
618 mutex_lock(&pdev_list_mutex);
619
b3a242a6 620 pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
bebe4678
RM
621 if (!pdev) {
622 err = -ENOMEM;
f8bb8925 623 pr_err("Device allocation failed\n");
bebe4678
RM
624 goto exit;
625 }
626
627 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
628 if (!pdev_entry) {
629 err = -ENOMEM;
630 goto exit_device_put;
631 }
632
633 err = platform_device_add(pdev);
634 if (err) {
f8bb8925 635 pr_err("Device addition failed (%d)\n", err);
bebe4678
RM
636 goto exit_device_free;
637 }
638
639 pdev_entry->pdev = pdev;
0eb9782a 640 pdev_entry->phys_proc_id = pdev->id;
199e0de7 641
bebe4678
RM
642 list_add_tail(&pdev_entry->list, &pdev_list);
643 mutex_unlock(&pdev_list_mutex);
644
645 return 0;
646
647exit_device_free:
648 kfree(pdev_entry);
649exit_device_put:
650 platform_device_put(pdev);
651exit:
d883b9f0 652 mutex_unlock(&pdev_list_mutex);
bebe4678
RM
653 return err;
654}
655
d6db23c7 656static void __cpuinit coretemp_device_remove(unsigned int cpu)
bebe4678 657{
199e0de7
D
658 struct pdev_entry *p, *n;
659 u16 phys_proc_id = TO_PHYS_ID(cpu);
e40cc4bd 660
bebe4678 661 mutex_lock(&pdev_list_mutex);
199e0de7
D
662 list_for_each_entry_safe(p, n, &pdev_list, list) {
663 if (p->phys_proc_id != phys_proc_id)
e40cc4bd 664 continue;
e40cc4bd
JB
665 platform_device_unregister(p->pdev);
666 list_del(&p->list);
e40cc4bd 667 kfree(p);
bebe4678
RM
668 }
669 mutex_unlock(&pdev_list_mutex);
670}
671
d6db23c7 672static bool __cpuinit is_any_core_online(struct platform_data *pdata)
199e0de7
D
673{
674 int i;
675
676 /* Find online cores, except pkgtemp data */
677 for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
678 if (pdata->core_data[i] &&
679 !pdata->core_data[i]->is_pkg_data) {
680 return true;
681 }
682 }
683 return false;
684}
685
686static void __cpuinit get_core_online(unsigned int cpu)
687{
688 struct cpuinfo_x86 *c = &cpu_data(cpu);
689 struct platform_device *pdev = coretemp_get_pdev(cpu);
690 int err;
691
692 /*
693 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
694 * sensors. We check this bit only, all the early CPUs
695 * without thermal sensors will be filtered out.
696 */
4ad33411 697 if (!cpu_has(c, X86_FEATURE_DTHERM))
199e0de7
D
698 return;
699
700 if (!pdev) {
0eb9782a
JD
701 /* Check the microcode version of the CPU */
702 if (chk_ucode_version(cpu))
703 return;
704
199e0de7
D
705 /*
706 * Alright, we have DTS support.
707 * We are bringing the _first_ core in this pkg
708 * online. So, initialize per-pkg data structures and
709 * then bring this core online.
710 */
711 err = coretemp_device_add(cpu);
712 if (err)
713 return;
714 /*
715 * Check whether pkgtemp support is available.
716 * If so, add interfaces for pkgtemp.
717 */
718 if (cpu_has(c, X86_FEATURE_PTS))
719 coretemp_add_core(cpu, 1);
720 }
721 /*
722 * Physical CPU device already exists.
723 * So, just add interfaces for this core.
724 */
725 coretemp_add_core(cpu, 0);
726}
727
728static void __cpuinit put_core_offline(unsigned int cpu)
729{
730 int i, indx;
731 struct platform_data *pdata;
732 struct platform_device *pdev = coretemp_get_pdev(cpu);
733
734 /* If the physical CPU device does not exist, just return */
735 if (!pdev)
736 return;
737
738 pdata = platform_get_drvdata(pdev);
739
740 indx = TO_ATTR_NO(cpu);
741
b7048711
KS
742 /* The core id is too big, just return */
743 if (indx > MAX_CORE_DATA - 1)
744 return;
745
199e0de7
D
746 if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
747 coretemp_remove_core(pdata, &pdev->dev, indx);
748
f4e0bcf0 749 /*
6777b9e4
GR
750 * If a HT sibling of a core is taken offline, but another HT sibling
751 * of the same core is still online, register the alternate sibling.
752 * This ensures that exactly one set of attributes is provided as long
753 * as at least one HT sibling of a core is online.
f4e0bcf0 754 */
bb74e8ca 755 for_each_sibling(i, cpu) {
199e0de7
D
756 if (i != cpu) {
757 get_core_online(i);
f4e0bcf0
GR
758 /*
759 * Display temperature sensor data for one HT sibling
760 * per core only, so abort the loop after one such
761 * sibling has been found.
762 */
199e0de7
D
763 break;
764 }
765 }
766 /*
767 * If all cores in this pkg are offline, remove the device.
768 * coretemp_device_remove calls unregister_platform_device,
769 * which in turn calls coretemp_remove. This removes the
770 * pkgtemp entry and does other clean ups.
771 */
772 if (!is_any_core_online(pdata))
773 coretemp_device_remove(cpu);
774}
775
ba7c1927 776static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
bebe4678
RM
777 unsigned long action, void *hcpu)
778{
779 unsigned int cpu = (unsigned long) hcpu;
780
781 switch (action) {
782 case CPU_ONLINE:
561d9a96 783 case CPU_DOWN_FAILED:
199e0de7 784 get_core_online(cpu);
bebe4678 785 break;
561d9a96 786 case CPU_DOWN_PREPARE:
199e0de7 787 put_core_offline(cpu);
bebe4678
RM
788 break;
789 }
790 return NOTIFY_OK;
791}
792
ba7c1927 793static struct notifier_block coretemp_cpu_notifier __refdata = {
bebe4678
RM
794 .notifier_call = coretemp_cpu_callback,
795};
bebe4678 796
e273bd98 797static const struct x86_cpu_id __initconst coretemp_ids[] = {
4ad33411 798 { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM },
9b38096f
AK
799 {}
800};
801MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
802
bebe4678
RM
803static int __init coretemp_init(void)
804{
1268a172 805 int i, err;
bebe4678 806
9b38096f
AK
807 /*
808 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
809 * sensors. We check this bit only, all the early CPUs
810 * without thermal sensors will be filtered out.
811 */
812 if (!x86_match_cpu(coretemp_ids))
813 return -ENODEV;
bebe4678
RM
814
815 err = platform_driver_register(&coretemp_driver);
816 if (err)
817 goto exit;
818
641f1456 819 get_online_cpus();
a4659053 820 for_each_online_cpu(i)
199e0de7 821 get_core_online(i);
89a3fd35
JB
822
823#ifndef CONFIG_HOTPLUG_CPU
bebe4678 824 if (list_empty(&pdev_list)) {
641f1456 825 put_online_cpus();
bebe4678
RM
826 err = -ENODEV;
827 goto exit_driver_unreg;
828 }
89a3fd35 829#endif
bebe4678 830
bebe4678 831 register_hotcpu_notifier(&coretemp_cpu_notifier);
641f1456 832 put_online_cpus();
bebe4678
RM
833 return 0;
834
0dca94ba 835#ifndef CONFIG_HOTPLUG_CPU
89a3fd35 836exit_driver_unreg:
bebe4678 837 platform_driver_unregister(&coretemp_driver);
0dca94ba 838#endif
bebe4678
RM
839exit:
840 return err;
841}
842
843static void __exit coretemp_exit(void)
844{
845 struct pdev_entry *p, *n;
17c10d61 846
641f1456 847 get_online_cpus();
bebe4678 848 unregister_hotcpu_notifier(&coretemp_cpu_notifier);
bebe4678
RM
849 mutex_lock(&pdev_list_mutex);
850 list_for_each_entry_safe(p, n, &pdev_list, list) {
851 platform_device_unregister(p->pdev);
852 list_del(&p->list);
853 kfree(p);
854 }
855 mutex_unlock(&pdev_list_mutex);
641f1456 856 put_online_cpus();
bebe4678
RM
857 platform_driver_unregister(&coretemp_driver);
858}
859
860MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
861MODULE_DESCRIPTION("Intel Core temperature monitor");
862MODULE_LICENSE("GPL");
863
864module_init(coretemp_init)
865module_exit(coretemp_exit)