Commit | Line | Data |
---|---|---|
bebe4678 RM |
1 | /* |
2 | * coretemp.c - Linux kernel module for hardware monitoring | |
3 | * | |
4 | * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz> | |
5 | * | |
6 | * Inspired from many hwmon drivers | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; version 2 of the License. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
20 | * 02110-1301 USA. | |
21 | */ | |
22 | ||
f8bb8925 JP |
23 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
24 | ||
bebe4678 | 25 | #include <linux/module.h> |
bebe4678 RM |
26 | #include <linux/init.h> |
27 | #include <linux/slab.h> | |
28 | #include <linux/jiffies.h> | |
29 | #include <linux/hwmon.h> | |
30 | #include <linux/sysfs.h> | |
31 | #include <linux/hwmon-sysfs.h> | |
32 | #include <linux/err.h> | |
33 | #include <linux/mutex.h> | |
34 | #include <linux/list.h> | |
35 | #include <linux/platform_device.h> | |
36 | #include <linux/cpu.h> | |
4cc45275 | 37 | #include <linux/smp.h> |
a45a8c85 | 38 | #include <linux/moduleparam.h> |
14513ee6 | 39 | #include <linux/pci.h> |
bebe4678 RM |
40 | #include <asm/msr.h> |
41 | #include <asm/processor.h> | |
9b38096f | 42 | #include <asm/cpu_device_id.h> |
bebe4678 RM |
43 | |
44 | #define DRVNAME "coretemp" | |
45 | ||
a45a8c85 JD |
46 | /* |
47 | * force_tjmax only matters when TjMax can't be read from the CPU itself. | |
48 | * When set, it replaces the driver's suboptimal heuristic. | |
49 | */ | |
50 | static int force_tjmax; | |
51 | module_param_named(tjmax, force_tjmax, int, 0444); | |
52 | MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius"); | |
53 | ||
199e0de7 | 54 | #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */ |
bdc71c9a | 55 | #define NUM_REAL_CORES 32 /* Number of Real cores per cpu */ |
3f9aec76 | 56 | #define CORETEMP_NAME_LENGTH 19 /* String Length of attrs */ |
c814a4c7 | 57 | #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */ |
f4af6fd6 | 58 | #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1) |
199e0de7 D |
59 | #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO) |
60 | ||
780affe0 GR |
61 | #define TO_PHYS_ID(cpu) (cpu_data(cpu).phys_proc_id) |
62 | #define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id) | |
141168c3 KW |
63 | #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO) |
64 | ||
65 | #ifdef CONFIG_SMP | |
bb74e8ca | 66 | #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu)) |
199e0de7 | 67 | #else |
bb74e8ca | 68 | #define for_each_sibling(i, cpu) for (i = 0; false; ) |
199e0de7 | 69 | #endif |
bebe4678 RM |
70 | |
71 | /* | |
199e0de7 D |
72 | * Per-Core Temperature Data |
73 | * @last_updated: The time when the current temperature value was updated | |
74 | * earlier (in jiffies). | |
75 | * @cpu_core_id: The CPU Core from which temperature values should be read | |
76 | * This value is passed as "id" field to rdmsr/wrmsr functions. | |
77 | * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS, | |
78 | * from where the temperature values should be read. | |
c814a4c7 | 79 | * @attr_size: Total number of pre-core attrs displayed in the sysfs. |
199e0de7 D |
80 | * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data. |
81 | * Otherwise, temp_data holds coretemp data. | |
82 | * @valid: If this is 1, the current temperature is valid. | |
bebe4678 | 83 | */ |
199e0de7 | 84 | struct temp_data { |
bebe4678 | 85 | int temp; |
6369a288 | 86 | int ttarget; |
199e0de7 D |
87 | int tjmax; |
88 | unsigned long last_updated; | |
89 | unsigned int cpu; | |
90 | u32 cpu_core_id; | |
91 | u32 status_reg; | |
c814a4c7 | 92 | int attr_size; |
199e0de7 D |
93 | bool is_pkg_data; |
94 | bool valid; | |
c814a4c7 D |
95 | struct sensor_device_attribute sd_attrs[TOTAL_ATTRS]; |
96 | char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH]; | |
199e0de7 | 97 | struct mutex update_lock; |
bebe4678 RM |
98 | }; |
99 | ||
199e0de7 D |
100 | /* Platform Data per Physical CPU */ |
101 | struct platform_data { | |
102 | struct device *hwmon_dev; | |
103 | u16 phys_proc_id; | |
104 | struct temp_data *core_data[MAX_CORE_DATA]; | |
105 | struct device_attribute name_attr; | |
106 | }; | |
bebe4678 | 107 | |
199e0de7 D |
108 | struct pdev_entry { |
109 | struct list_head list; | |
110 | struct platform_device *pdev; | |
199e0de7 | 111 | u16 phys_proc_id; |
199e0de7 D |
112 | }; |
113 | ||
114 | static LIST_HEAD(pdev_list); | |
115 | static DEFINE_MUTEX(pdev_list_mutex); | |
116 | ||
117 | static ssize_t show_name(struct device *dev, | |
118 | struct device_attribute *devattr, char *buf) | |
119 | { | |
120 | return sprintf(buf, "%s\n", DRVNAME); | |
121 | } | |
122 | ||
123 | static ssize_t show_label(struct device *dev, | |
124 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 125 | { |
bebe4678 | 126 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
199e0de7 D |
127 | struct platform_data *pdata = dev_get_drvdata(dev); |
128 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
129 | ||
130 | if (tdata->is_pkg_data) | |
131 | return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id); | |
bebe4678 | 132 | |
199e0de7 | 133 | return sprintf(buf, "Core %u\n", tdata->cpu_core_id); |
bebe4678 RM |
134 | } |
135 | ||
199e0de7 D |
136 | static ssize_t show_crit_alarm(struct device *dev, |
137 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 138 | { |
199e0de7 D |
139 | u32 eax, edx; |
140 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
141 | struct platform_data *pdata = dev_get_drvdata(dev); | |
142 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
143 | ||
144 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); | |
145 | ||
146 | return sprintf(buf, "%d\n", (eax >> 5) & 1); | |
bebe4678 RM |
147 | } |
148 | ||
199e0de7 D |
149 | static ssize_t show_tjmax(struct device *dev, |
150 | struct device_attribute *devattr, char *buf) | |
bebe4678 RM |
151 | { |
152 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
199e0de7 | 153 | struct platform_data *pdata = dev_get_drvdata(dev); |
bebe4678 | 154 | |
199e0de7 | 155 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax); |
bebe4678 RM |
156 | } |
157 | ||
199e0de7 D |
158 | static ssize_t show_ttarget(struct device *dev, |
159 | struct device_attribute *devattr, char *buf) | |
160 | { | |
161 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
162 | struct platform_data *pdata = dev_get_drvdata(dev); | |
bebe4678 | 163 | |
199e0de7 D |
164 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget); |
165 | } | |
bebe4678 | 166 | |
199e0de7 D |
167 | static ssize_t show_temp(struct device *dev, |
168 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 169 | { |
199e0de7 D |
170 | u32 eax, edx; |
171 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
172 | struct platform_data *pdata = dev_get_drvdata(dev); | |
173 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
bebe4678 | 174 | |
199e0de7 | 175 | mutex_lock(&tdata->update_lock); |
bebe4678 | 176 | |
199e0de7 D |
177 | /* Check whether the time interval has elapsed */ |
178 | if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) { | |
179 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); | |
180 | tdata->valid = 0; | |
181 | /* Check whether the data is valid */ | |
bebe4678 | 182 | if (eax & 0x80000000) { |
199e0de7 | 183 | tdata->temp = tdata->tjmax - |
4cc45275 | 184 | ((eax >> 16) & 0x7f) * 1000; |
199e0de7 | 185 | tdata->valid = 1; |
bebe4678 | 186 | } |
199e0de7 | 187 | tdata->last_updated = jiffies; |
bebe4678 RM |
188 | } |
189 | ||
199e0de7 D |
190 | mutex_unlock(&tdata->update_lock); |
191 | return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN; | |
bebe4678 RM |
192 | } |
193 | ||
14513ee6 GR |
194 | struct tjmax_pci { |
195 | unsigned int device; | |
196 | int tjmax; | |
197 | }; | |
198 | ||
199 | static const struct tjmax_pci tjmax_pci_table[] = { | |
347c16cf | 200 | { 0x0708, 110000 }, /* CE41x0 (Sodaville ) */ |
14513ee6 GR |
201 | { 0x0c72, 102000 }, /* Atom S1240 (Centerton) */ |
202 | { 0x0c73, 95000 }, /* Atom S1220 (Centerton) */ | |
203 | { 0x0c75, 95000 }, /* Atom S1260 (Centerton) */ | |
204 | }; | |
205 | ||
41e58a1f GR |
206 | struct tjmax { |
207 | char const *id; | |
208 | int tjmax; | |
209 | }; | |
210 | ||
d23e2ae1 | 211 | static const struct tjmax tjmax_table[] = { |
1102dcab GR |
212 | { "CPU 230", 100000 }, /* Model 0x1c, stepping 2 */ |
213 | { "CPU 330", 125000 }, /* Model 0x1c, stepping 2 */ | |
41e58a1f GR |
214 | }; |
215 | ||
2fa5222e GR |
216 | struct tjmax_model { |
217 | u8 model; | |
218 | u8 mask; | |
219 | int tjmax; | |
220 | }; | |
221 | ||
222 | #define ANY 0xff | |
223 | ||
d23e2ae1 | 224 | static const struct tjmax_model tjmax_model_table[] = { |
9e3970fb | 225 | { 0x1c, 10, 100000 }, /* D4xx, K4xx, N4xx, D5xx, K5xx, N5xx */ |
2fa5222e GR |
226 | { 0x1c, ANY, 90000 }, /* Z5xx, N2xx, possibly others |
227 | * Note: Also matches 230 and 330, | |
228 | * which are covered by tjmax_table | |
229 | */ | |
230 | { 0x26, ANY, 90000 }, /* Atom Tunnel Creek (Exx), Lincroft (Z6xx) | |
231 | * Note: TjMax for E6xxT is 110C, but CPU type | |
232 | * is undetectable by software | |
233 | */ | |
234 | { 0x27, ANY, 90000 }, /* Atom Medfield (Z2460) */ | |
14513ee6 GR |
235 | { 0x35, ANY, 90000 }, /* Atom Clover Trail/Cloverview (Z27x0) */ |
236 | { 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx) | |
237 | * Also matches S12x0 (stepping 9), covered by | |
238 | * PCI table | |
239 | */ | |
2fa5222e GR |
240 | }; |
241 | ||
d23e2ae1 | 242 | static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) |
118a8871 RM |
243 | { |
244 | /* The 100C is default for both mobile and non mobile CPUs */ | |
245 | ||
246 | int tjmax = 100000; | |
eccfed42 | 247 | int tjmax_ee = 85000; |
708a62bc | 248 | int usemsr_ee = 1; |
118a8871 RM |
249 | int err; |
250 | u32 eax, edx; | |
41e58a1f | 251 | int i; |
14513ee6 GR |
252 | struct pci_dev *host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0)); |
253 | ||
254 | /* | |
255 | * Explicit tjmax table entries override heuristics. | |
256 | * First try PCI host bridge IDs, followed by model ID strings | |
257 | * and model/stepping information. | |
258 | */ | |
259 | if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL) { | |
260 | for (i = 0; i < ARRAY_SIZE(tjmax_pci_table); i++) { | |
261 | if (host_bridge->device == tjmax_pci_table[i].device) | |
262 | return tjmax_pci_table[i].tjmax; | |
263 | } | |
264 | } | |
41e58a1f | 265 | |
41e58a1f GR |
266 | for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) { |
267 | if (strstr(c->x86_model_id, tjmax_table[i].id)) | |
268 | return tjmax_table[i].tjmax; | |
269 | } | |
118a8871 | 270 | |
2fa5222e GR |
271 | for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) { |
272 | const struct tjmax_model *tm = &tjmax_model_table[i]; | |
273 | if (c->x86_model == tm->model && | |
274 | (tm->mask == ANY || c->x86_mask == tm->mask)) | |
275 | return tm->tjmax; | |
72cbdddc | 276 | } |
1fe63ab4 | 277 | |
72cbdddc | 278 | /* Early chips have no MSR for TjMax */ |
1fe63ab4 | 279 | |
72cbdddc | 280 | if (c->x86_model == 0xf && c->x86_mask < 4) |
5592906f | 281 | usemsr_ee = 0; |
708a62bc | 282 | |
4cc45275 | 283 | if (c->x86_model > 0xe && usemsr_ee) { |
eccfed42 | 284 | u8 platform_id; |
118a8871 | 285 | |
4cc45275 GR |
286 | /* |
287 | * Now we can detect the mobile CPU using Intel provided table | |
288 | * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm | |
289 | * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU | |
290 | */ | |
118a8871 RM |
291 | err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx); |
292 | if (err) { | |
293 | dev_warn(dev, | |
294 | "Unable to access MSR 0x17, assuming desktop" | |
295 | " CPU\n"); | |
708a62bc | 296 | usemsr_ee = 0; |
eccfed42 | 297 | } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) { |
4cc45275 GR |
298 | /* |
299 | * Trust bit 28 up to Penryn, I could not find any | |
300 | * documentation on that; if you happen to know | |
301 | * someone at Intel please ask | |
302 | */ | |
708a62bc | 303 | usemsr_ee = 0; |
eccfed42 RM |
304 | } else { |
305 | /* Platform ID bits 52:50 (EDX starts at bit 32) */ | |
306 | platform_id = (edx >> 18) & 0x7; | |
307 | ||
4cc45275 GR |
308 | /* |
309 | * Mobile Penryn CPU seems to be platform ID 7 or 5 | |
310 | * (guesswork) | |
311 | */ | |
312 | if (c->x86_model == 0x17 && | |
313 | (platform_id == 5 || platform_id == 7)) { | |
314 | /* | |
315 | * If MSR EE bit is set, set it to 90 degrees C, | |
316 | * otherwise 105 degrees C | |
317 | */ | |
eccfed42 RM |
318 | tjmax_ee = 90000; |
319 | tjmax = 105000; | |
320 | } | |
118a8871 RM |
321 | } |
322 | } | |
323 | ||
708a62bc | 324 | if (usemsr_ee) { |
118a8871 RM |
325 | err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx); |
326 | if (err) { | |
327 | dev_warn(dev, | |
328 | "Unable to access MSR 0xEE, for Tjmax, left" | |
4d7a5644 | 329 | " at default\n"); |
118a8871 | 330 | } else if (eax & 0x40000000) { |
eccfed42 | 331 | tjmax = tjmax_ee; |
118a8871 | 332 | } |
708a62bc | 333 | } else if (tjmax == 100000) { |
4cc45275 GR |
334 | /* |
335 | * If we don't use msr EE it means we are desktop CPU | |
336 | * (with exeception of Atom) | |
337 | */ | |
118a8871 RM |
338 | dev_warn(dev, "Using relative temperature scale!\n"); |
339 | } | |
340 | ||
341 | return tjmax; | |
342 | } | |
343 | ||
1c2faa22 GR |
344 | static bool cpu_has_tjmax(struct cpuinfo_x86 *c) |
345 | { | |
346 | u8 model = c->x86_model; | |
347 | ||
348 | return model > 0xe && | |
349 | model != 0x1c && | |
350 | model != 0x26 && | |
351 | model != 0x27 && | |
352 | model != 0x35 && | |
353 | model != 0x36; | |
354 | } | |
355 | ||
d23e2ae1 | 356 | static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) |
a321cedb | 357 | { |
a321cedb CE |
358 | int err; |
359 | u32 eax, edx; | |
360 | u32 val; | |
361 | ||
4cc45275 GR |
362 | /* |
363 | * A new feature of current Intel(R) processors, the | |
364 | * IA32_TEMPERATURE_TARGET contains the TjMax value | |
365 | */ | |
a321cedb CE |
366 | err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx); |
367 | if (err) { | |
1c2faa22 | 368 | if (cpu_has_tjmax(c)) |
6bf9e9b0 | 369 | dev_warn(dev, "Unable to read TjMax from CPU %u\n", id); |
a321cedb | 370 | } else { |
9fb6c9c7 | 371 | val = (eax >> 16) & 0x7f; |
a321cedb CE |
372 | /* |
373 | * If the TjMax is not plausible, an assumption | |
374 | * will be used | |
375 | */ | |
9fb6c9c7 | 376 | if (val >= 85) { |
6bf9e9b0 | 377 | dev_dbg(dev, "TjMax is %d degrees C\n", val); |
a321cedb CE |
378 | return val * 1000; |
379 | } | |
380 | } | |
381 | ||
a45a8c85 JD |
382 | if (force_tjmax) { |
383 | dev_notice(dev, "TjMax forced to %d degrees C by user\n", | |
384 | force_tjmax); | |
385 | return force_tjmax * 1000; | |
386 | } | |
387 | ||
a321cedb CE |
388 | /* |
389 | * An assumption is made for early CPUs and unreadable MSR. | |
4f5f71a7 | 390 | * NOTE: the calculated value may not be correct. |
a321cedb | 391 | */ |
4f5f71a7 | 392 | return adjust_tjmax(c, id, dev); |
a321cedb CE |
393 | } |
394 | ||
6c931ae1 | 395 | static int create_name_attr(struct platform_data *pdata, |
d6db23c7 | 396 | struct device *dev) |
199e0de7 | 397 | { |
4258781a | 398 | sysfs_attr_init(&pdata->name_attr.attr); |
199e0de7 D |
399 | pdata->name_attr.attr.name = "name"; |
400 | pdata->name_attr.attr.mode = S_IRUGO; | |
401 | pdata->name_attr.show = show_name; | |
402 | return device_create_file(dev, &pdata->name_attr); | |
403 | } | |
bebe4678 | 404 | |
d23e2ae1 PG |
405 | static int create_core_attrs(struct temp_data *tdata, struct device *dev, |
406 | int attr_no) | |
199e0de7 D |
407 | { |
408 | int err, i; | |
e3204ed3 | 409 | static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev, |
199e0de7 | 410 | struct device_attribute *devattr, char *buf) = { |
c814a4c7 | 411 | show_label, show_crit_alarm, show_temp, show_tjmax, |
f4af6fd6 | 412 | show_ttarget }; |
e3204ed3 | 413 | static const char *const names[TOTAL_ATTRS] = { |
199e0de7 | 414 | "temp%d_label", "temp%d_crit_alarm", |
c814a4c7 | 415 | "temp%d_input", "temp%d_crit", |
f4af6fd6 | 416 | "temp%d_max" }; |
199e0de7 | 417 | |
c814a4c7 | 418 | for (i = 0; i < tdata->attr_size; i++) { |
199e0de7 D |
419 | snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i], |
420 | attr_no); | |
4258781a | 421 | sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr); |
199e0de7 D |
422 | tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i]; |
423 | tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO; | |
424 | tdata->sd_attrs[i].dev_attr.show = rd_ptr[i]; | |
199e0de7 D |
425 | tdata->sd_attrs[i].index = attr_no; |
426 | err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr); | |
427 | if (err) | |
428 | goto exit_free; | |
bebe4678 | 429 | } |
199e0de7 D |
430 | return 0; |
431 | ||
432 | exit_free: | |
433 | while (--i >= 0) | |
434 | device_remove_file(dev, &tdata->sd_attrs[i].dev_attr); | |
435 | return err; | |
436 | } | |
437 | ||
199e0de7 | 438 | |
d23e2ae1 | 439 | static int chk_ucode_version(unsigned int cpu) |
199e0de7 | 440 | { |
0eb9782a | 441 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
67f363b1 | 442 | |
199e0de7 D |
443 | /* |
444 | * Check if we have problem with errata AE18 of Core processors: | |
445 | * Readings might stop update when processor visited too deep sleep, | |
446 | * fixed for stepping D0 (6EC). | |
447 | */ | |
ca8bc8dc | 448 | if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) { |
b55f3757 | 449 | pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n"); |
ca8bc8dc | 450 | return -ENODEV; |
67f363b1 | 451 | } |
199e0de7 D |
452 | return 0; |
453 | } | |
454 | ||
d23e2ae1 | 455 | static struct platform_device *coretemp_get_pdev(unsigned int cpu) |
199e0de7 D |
456 | { |
457 | u16 phys_proc_id = TO_PHYS_ID(cpu); | |
458 | struct pdev_entry *p; | |
459 | ||
460 | mutex_lock(&pdev_list_mutex); | |
461 | ||
462 | list_for_each_entry(p, &pdev_list, list) | |
463 | if (p->phys_proc_id == phys_proc_id) { | |
464 | mutex_unlock(&pdev_list_mutex); | |
465 | return p->pdev; | |
466 | } | |
467 | ||
468 | mutex_unlock(&pdev_list_mutex); | |
469 | return NULL; | |
470 | } | |
471 | ||
d23e2ae1 | 472 | static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag) |
199e0de7 D |
473 | { |
474 | struct temp_data *tdata; | |
475 | ||
476 | tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL); | |
477 | if (!tdata) | |
478 | return NULL; | |
479 | ||
480 | tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS : | |
481 | MSR_IA32_THERM_STATUS; | |
482 | tdata->is_pkg_data = pkg_flag; | |
483 | tdata->cpu = cpu; | |
484 | tdata->cpu_core_id = TO_CORE_ID(cpu); | |
c814a4c7 | 485 | tdata->attr_size = MAX_CORE_ATTRS; |
199e0de7 D |
486 | mutex_init(&tdata->update_lock); |
487 | return tdata; | |
488 | } | |
67f363b1 | 489 | |
d23e2ae1 PG |
490 | static int create_core_data(struct platform_device *pdev, unsigned int cpu, |
491 | int pkg_flag) | |
199e0de7 D |
492 | { |
493 | struct temp_data *tdata; | |
2f1c3db0 | 494 | struct platform_data *pdata = platform_get_drvdata(pdev); |
199e0de7 D |
495 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
496 | u32 eax, edx; | |
497 | int err, attr_no; | |
bebe4678 | 498 | |
a321cedb | 499 | /* |
199e0de7 D |
500 | * Find attr number for sysfs: |
501 | * We map the attr number to core id of the CPU | |
502 | * The attr number is always core id + 2 | |
503 | * The Pkgtemp will always show up as temp1_*, if available | |
a321cedb | 504 | */ |
199e0de7 | 505 | attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu); |
6369a288 | 506 | |
199e0de7 D |
507 | if (attr_no > MAX_CORE_DATA - 1) |
508 | return -ERANGE; | |
509 | ||
f4e0bcf0 GR |
510 | /* |
511 | * Provide a single set of attributes for all HT siblings of a core | |
512 | * to avoid duplicate sensors (the processor ID and core ID of all | |
6777b9e4 GR |
513 | * HT siblings of a core are the same). |
514 | * Skip if a HT sibling of this core is already registered. | |
f4e0bcf0 GR |
515 | * This is not an error. |
516 | */ | |
199e0de7 D |
517 | if (pdata->core_data[attr_no] != NULL) |
518 | return 0; | |
6369a288 | 519 | |
199e0de7 D |
520 | tdata = init_temp_data(cpu, pkg_flag); |
521 | if (!tdata) | |
522 | return -ENOMEM; | |
bebe4678 | 523 | |
199e0de7 D |
524 | /* Test if we can access the status register */ |
525 | err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx); | |
526 | if (err) | |
527 | goto exit_free; | |
528 | ||
529 | /* We can access status register. Get Critical Temperature */ | |
6bf9e9b0 | 530 | tdata->tjmax = get_tjmax(c, cpu, &pdev->dev); |
199e0de7 | 531 | |
c814a4c7 | 532 | /* |
f4af6fd6 GR |
533 | * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET. |
534 | * The target temperature is available on older CPUs but not in this | |
535 | * register. Atoms don't have the register at all. | |
c814a4c7 | 536 | */ |
f4af6fd6 GR |
537 | if (c->x86_model > 0xe && c->x86_model != 0x1c) { |
538 | err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, | |
539 | &eax, &edx); | |
540 | if (!err) { | |
541 | tdata->ttarget | |
542 | = tdata->tjmax - ((eax >> 8) & 0xff) * 1000; | |
543 | tdata->attr_size++; | |
544 | } | |
c814a4c7 D |
545 | } |
546 | ||
199e0de7 D |
547 | pdata->core_data[attr_no] = tdata; |
548 | ||
549 | /* Create sysfs interfaces */ | |
550 | err = create_core_attrs(tdata, &pdev->dev, attr_no); | |
551 | if (err) | |
552 | goto exit_free; | |
bebe4678 RM |
553 | |
554 | return 0; | |
199e0de7 | 555 | exit_free: |
20ecb499 | 556 | pdata->core_data[attr_no] = NULL; |
199e0de7 D |
557 | kfree(tdata); |
558 | return err; | |
559 | } | |
560 | ||
d23e2ae1 | 561 | static void coretemp_add_core(unsigned int cpu, int pkg_flag) |
199e0de7 | 562 | { |
199e0de7 D |
563 | struct platform_device *pdev = coretemp_get_pdev(cpu); |
564 | int err; | |
565 | ||
566 | if (!pdev) | |
567 | return; | |
568 | ||
2f1c3db0 | 569 | err = create_core_data(pdev, cpu, pkg_flag); |
199e0de7 D |
570 | if (err) |
571 | dev_err(&pdev->dev, "Adding Core %u failed\n", cpu); | |
572 | } | |
573 | ||
574 | static void coretemp_remove_core(struct platform_data *pdata, | |
575 | struct device *dev, int indx) | |
576 | { | |
577 | int i; | |
578 | struct temp_data *tdata = pdata->core_data[indx]; | |
579 | ||
580 | /* Remove the sysfs attributes */ | |
c814a4c7 | 581 | for (i = 0; i < tdata->attr_size; i++) |
199e0de7 D |
582 | device_remove_file(dev, &tdata->sd_attrs[i].dev_attr); |
583 | ||
584 | kfree(pdata->core_data[indx]); | |
585 | pdata->core_data[indx] = NULL; | |
586 | } | |
587 | ||
6c931ae1 | 588 | static int coretemp_probe(struct platform_device *pdev) |
199e0de7 D |
589 | { |
590 | struct platform_data *pdata; | |
591 | int err; | |
bebe4678 | 592 | |
199e0de7 D |
593 | /* Initialize the per-package data structures */ |
594 | pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL); | |
595 | if (!pdata) | |
596 | return -ENOMEM; | |
597 | ||
598 | err = create_name_attr(pdata, &pdev->dev); | |
599 | if (err) | |
600 | goto exit_free; | |
601 | ||
b3a242a6 | 602 | pdata->phys_proc_id = pdev->id; |
199e0de7 D |
603 | platform_set_drvdata(pdev, pdata); |
604 | ||
605 | pdata->hwmon_dev = hwmon_device_register(&pdev->dev); | |
606 | if (IS_ERR(pdata->hwmon_dev)) { | |
607 | err = PTR_ERR(pdata->hwmon_dev); | |
608 | dev_err(&pdev->dev, "Class registration failed (%d)\n", err); | |
609 | goto exit_name; | |
610 | } | |
611 | return 0; | |
612 | ||
613 | exit_name: | |
614 | device_remove_file(&pdev->dev, &pdata->name_attr); | |
bebe4678 | 615 | exit_free: |
199e0de7 | 616 | kfree(pdata); |
bebe4678 RM |
617 | return err; |
618 | } | |
619 | ||
281dfd0b | 620 | static int coretemp_remove(struct platform_device *pdev) |
bebe4678 | 621 | { |
199e0de7 D |
622 | struct platform_data *pdata = platform_get_drvdata(pdev); |
623 | int i; | |
bebe4678 | 624 | |
199e0de7 D |
625 | for (i = MAX_CORE_DATA - 1; i >= 0; --i) |
626 | if (pdata->core_data[i]) | |
627 | coretemp_remove_core(pdata, &pdev->dev, i); | |
628 | ||
629 | device_remove_file(&pdev->dev, &pdata->name_attr); | |
630 | hwmon_device_unregister(pdata->hwmon_dev); | |
199e0de7 | 631 | kfree(pdata); |
bebe4678 RM |
632 | return 0; |
633 | } | |
634 | ||
635 | static struct platform_driver coretemp_driver = { | |
636 | .driver = { | |
637 | .owner = THIS_MODULE, | |
638 | .name = DRVNAME, | |
639 | }, | |
640 | .probe = coretemp_probe, | |
9e5e9b7a | 641 | .remove = coretemp_remove, |
bebe4678 RM |
642 | }; |
643 | ||
d23e2ae1 | 644 | static int coretemp_device_add(unsigned int cpu) |
bebe4678 RM |
645 | { |
646 | int err; | |
647 | struct platform_device *pdev; | |
648 | struct pdev_entry *pdev_entry; | |
d883b9f0 JD |
649 | |
650 | mutex_lock(&pdev_list_mutex); | |
651 | ||
b3a242a6 | 652 | pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu)); |
bebe4678 RM |
653 | if (!pdev) { |
654 | err = -ENOMEM; | |
f8bb8925 | 655 | pr_err("Device allocation failed\n"); |
bebe4678 RM |
656 | goto exit; |
657 | } | |
658 | ||
659 | pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL); | |
660 | if (!pdev_entry) { | |
661 | err = -ENOMEM; | |
662 | goto exit_device_put; | |
663 | } | |
664 | ||
665 | err = platform_device_add(pdev); | |
666 | if (err) { | |
f8bb8925 | 667 | pr_err("Device addition failed (%d)\n", err); |
bebe4678 RM |
668 | goto exit_device_free; |
669 | } | |
670 | ||
671 | pdev_entry->pdev = pdev; | |
0eb9782a | 672 | pdev_entry->phys_proc_id = pdev->id; |
199e0de7 | 673 | |
bebe4678 RM |
674 | list_add_tail(&pdev_entry->list, &pdev_list); |
675 | mutex_unlock(&pdev_list_mutex); | |
676 | ||
677 | return 0; | |
678 | ||
679 | exit_device_free: | |
680 | kfree(pdev_entry); | |
681 | exit_device_put: | |
682 | platform_device_put(pdev); | |
683 | exit: | |
d883b9f0 | 684 | mutex_unlock(&pdev_list_mutex); |
bebe4678 RM |
685 | return err; |
686 | } | |
687 | ||
d23e2ae1 | 688 | static void coretemp_device_remove(unsigned int cpu) |
bebe4678 | 689 | { |
199e0de7 D |
690 | struct pdev_entry *p, *n; |
691 | u16 phys_proc_id = TO_PHYS_ID(cpu); | |
e40cc4bd | 692 | |
bebe4678 | 693 | mutex_lock(&pdev_list_mutex); |
199e0de7 D |
694 | list_for_each_entry_safe(p, n, &pdev_list, list) { |
695 | if (p->phys_proc_id != phys_proc_id) | |
e40cc4bd | 696 | continue; |
e40cc4bd JB |
697 | platform_device_unregister(p->pdev); |
698 | list_del(&p->list); | |
e40cc4bd | 699 | kfree(p); |
bebe4678 RM |
700 | } |
701 | mutex_unlock(&pdev_list_mutex); | |
702 | } | |
703 | ||
d23e2ae1 | 704 | static bool is_any_core_online(struct platform_data *pdata) |
199e0de7 D |
705 | { |
706 | int i; | |
707 | ||
708 | /* Find online cores, except pkgtemp data */ | |
709 | for (i = MAX_CORE_DATA - 1; i >= 0; --i) { | |
710 | if (pdata->core_data[i] && | |
711 | !pdata->core_data[i]->is_pkg_data) { | |
712 | return true; | |
713 | } | |
714 | } | |
715 | return false; | |
716 | } | |
717 | ||
d23e2ae1 | 718 | static void get_core_online(unsigned int cpu) |
199e0de7 D |
719 | { |
720 | struct cpuinfo_x86 *c = &cpu_data(cpu); | |
721 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
722 | int err; | |
723 | ||
724 | /* | |
725 | * CPUID.06H.EAX[0] indicates whether the CPU has thermal | |
726 | * sensors. We check this bit only, all the early CPUs | |
727 | * without thermal sensors will be filtered out. | |
728 | */ | |
4ad33411 | 729 | if (!cpu_has(c, X86_FEATURE_DTHERM)) |
199e0de7 D |
730 | return; |
731 | ||
732 | if (!pdev) { | |
0eb9782a JD |
733 | /* Check the microcode version of the CPU */ |
734 | if (chk_ucode_version(cpu)) | |
735 | return; | |
736 | ||
199e0de7 D |
737 | /* |
738 | * Alright, we have DTS support. | |
739 | * We are bringing the _first_ core in this pkg | |
740 | * online. So, initialize per-pkg data structures and | |
741 | * then bring this core online. | |
742 | */ | |
743 | err = coretemp_device_add(cpu); | |
744 | if (err) | |
745 | return; | |
746 | /* | |
747 | * Check whether pkgtemp support is available. | |
748 | * If so, add interfaces for pkgtemp. | |
749 | */ | |
750 | if (cpu_has(c, X86_FEATURE_PTS)) | |
751 | coretemp_add_core(cpu, 1); | |
752 | } | |
753 | /* | |
754 | * Physical CPU device already exists. | |
755 | * So, just add interfaces for this core. | |
756 | */ | |
757 | coretemp_add_core(cpu, 0); | |
758 | } | |
759 | ||
d23e2ae1 | 760 | static void put_core_offline(unsigned int cpu) |
199e0de7 D |
761 | { |
762 | int i, indx; | |
763 | struct platform_data *pdata; | |
764 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
765 | ||
766 | /* If the physical CPU device does not exist, just return */ | |
767 | if (!pdev) | |
768 | return; | |
769 | ||
770 | pdata = platform_get_drvdata(pdev); | |
771 | ||
772 | indx = TO_ATTR_NO(cpu); | |
773 | ||
b7048711 KS |
774 | /* The core id is too big, just return */ |
775 | if (indx > MAX_CORE_DATA - 1) | |
776 | return; | |
777 | ||
199e0de7 D |
778 | if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu) |
779 | coretemp_remove_core(pdata, &pdev->dev, indx); | |
780 | ||
f4e0bcf0 | 781 | /* |
6777b9e4 GR |
782 | * If a HT sibling of a core is taken offline, but another HT sibling |
783 | * of the same core is still online, register the alternate sibling. | |
784 | * This ensures that exactly one set of attributes is provided as long | |
785 | * as at least one HT sibling of a core is online. | |
f4e0bcf0 | 786 | */ |
bb74e8ca | 787 | for_each_sibling(i, cpu) { |
199e0de7 D |
788 | if (i != cpu) { |
789 | get_core_online(i); | |
f4e0bcf0 GR |
790 | /* |
791 | * Display temperature sensor data for one HT sibling | |
792 | * per core only, so abort the loop after one such | |
793 | * sibling has been found. | |
794 | */ | |
199e0de7 D |
795 | break; |
796 | } | |
797 | } | |
798 | /* | |
799 | * If all cores in this pkg are offline, remove the device. | |
800 | * coretemp_device_remove calls unregister_platform_device, | |
801 | * which in turn calls coretemp_remove. This removes the | |
802 | * pkgtemp entry and does other clean ups. | |
803 | */ | |
804 | if (!is_any_core_online(pdata)) | |
805 | coretemp_device_remove(cpu); | |
806 | } | |
807 | ||
d23e2ae1 | 808 | static int coretemp_cpu_callback(struct notifier_block *nfb, |
bebe4678 RM |
809 | unsigned long action, void *hcpu) |
810 | { | |
811 | unsigned int cpu = (unsigned long) hcpu; | |
812 | ||
813 | switch (action) { | |
814 | case CPU_ONLINE: | |
561d9a96 | 815 | case CPU_DOWN_FAILED: |
199e0de7 | 816 | get_core_online(cpu); |
bebe4678 | 817 | break; |
561d9a96 | 818 | case CPU_DOWN_PREPARE: |
199e0de7 | 819 | put_core_offline(cpu); |
bebe4678 RM |
820 | break; |
821 | } | |
822 | return NOTIFY_OK; | |
823 | } | |
824 | ||
ba7c1927 | 825 | static struct notifier_block coretemp_cpu_notifier __refdata = { |
bebe4678 RM |
826 | .notifier_call = coretemp_cpu_callback, |
827 | }; | |
bebe4678 | 828 | |
e273bd98 | 829 | static const struct x86_cpu_id __initconst coretemp_ids[] = { |
4ad33411 | 830 | { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM }, |
9b38096f AK |
831 | {} |
832 | }; | |
833 | MODULE_DEVICE_TABLE(x86cpu, coretemp_ids); | |
834 | ||
bebe4678 RM |
835 | static int __init coretemp_init(void) |
836 | { | |
1268a172 | 837 | int i, err; |
bebe4678 | 838 | |
9b38096f AK |
839 | /* |
840 | * CPUID.06H.EAX[0] indicates whether the CPU has thermal | |
841 | * sensors. We check this bit only, all the early CPUs | |
842 | * without thermal sensors will be filtered out. | |
843 | */ | |
844 | if (!x86_match_cpu(coretemp_ids)) | |
845 | return -ENODEV; | |
bebe4678 RM |
846 | |
847 | err = platform_driver_register(&coretemp_driver); | |
848 | if (err) | |
849 | goto exit; | |
850 | ||
641f1456 | 851 | get_online_cpus(); |
a4659053 | 852 | for_each_online_cpu(i) |
199e0de7 | 853 | get_core_online(i); |
89a3fd35 JB |
854 | |
855 | #ifndef CONFIG_HOTPLUG_CPU | |
bebe4678 | 856 | if (list_empty(&pdev_list)) { |
641f1456 | 857 | put_online_cpus(); |
bebe4678 RM |
858 | err = -ENODEV; |
859 | goto exit_driver_unreg; | |
860 | } | |
89a3fd35 | 861 | #endif |
bebe4678 | 862 | |
bebe4678 | 863 | register_hotcpu_notifier(&coretemp_cpu_notifier); |
641f1456 | 864 | put_online_cpus(); |
bebe4678 RM |
865 | return 0; |
866 | ||
0dca94ba | 867 | #ifndef CONFIG_HOTPLUG_CPU |
89a3fd35 | 868 | exit_driver_unreg: |
bebe4678 | 869 | platform_driver_unregister(&coretemp_driver); |
0dca94ba | 870 | #endif |
bebe4678 RM |
871 | exit: |
872 | return err; | |
873 | } | |
874 | ||
875 | static void __exit coretemp_exit(void) | |
876 | { | |
877 | struct pdev_entry *p, *n; | |
17c10d61 | 878 | |
641f1456 | 879 | get_online_cpus(); |
bebe4678 | 880 | unregister_hotcpu_notifier(&coretemp_cpu_notifier); |
bebe4678 RM |
881 | mutex_lock(&pdev_list_mutex); |
882 | list_for_each_entry_safe(p, n, &pdev_list, list) { | |
883 | platform_device_unregister(p->pdev); | |
884 | list_del(&p->list); | |
885 | kfree(p); | |
886 | } | |
887 | mutex_unlock(&pdev_list_mutex); | |
641f1456 | 888 | put_online_cpus(); |
bebe4678 RM |
889 | platform_driver_unregister(&coretemp_driver); |
890 | } | |
891 | ||
892 | MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>"); | |
893 | MODULE_DESCRIPTION("Intel Core temperature monitor"); | |
894 | MODULE_LICENSE("GPL"); | |
895 | ||
896 | module_init(coretemp_init) | |
897 | module_exit(coretemp_exit) |