Commit | Line | Data |
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bebe4678 RM |
1 | /* |
2 | * coretemp.c - Linux kernel module for hardware monitoring | |
3 | * | |
4 | * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz> | |
5 | * | |
6 | * Inspired from many hwmon drivers | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; version 2 of the License. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
20 | * 02110-1301 USA. | |
21 | */ | |
22 | ||
f8bb8925 JP |
23 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
24 | ||
bebe4678 | 25 | #include <linux/module.h> |
bebe4678 RM |
26 | #include <linux/init.h> |
27 | #include <linux/slab.h> | |
28 | #include <linux/jiffies.h> | |
29 | #include <linux/hwmon.h> | |
30 | #include <linux/sysfs.h> | |
31 | #include <linux/hwmon-sysfs.h> | |
32 | #include <linux/err.h> | |
33 | #include <linux/mutex.h> | |
34 | #include <linux/list.h> | |
35 | #include <linux/platform_device.h> | |
36 | #include <linux/cpu.h> | |
1fe63ab4 | 37 | #include <linux/pci.h> |
4cc45275 | 38 | #include <linux/smp.h> |
a45a8c85 | 39 | #include <linux/moduleparam.h> |
bebe4678 RM |
40 | #include <asm/msr.h> |
41 | #include <asm/processor.h> | |
42 | ||
43 | #define DRVNAME "coretemp" | |
44 | ||
a45a8c85 JD |
45 | /* |
46 | * force_tjmax only matters when TjMax can't be read from the CPU itself. | |
47 | * When set, it replaces the driver's suboptimal heuristic. | |
48 | */ | |
49 | static int force_tjmax; | |
50 | module_param_named(tjmax, force_tjmax, int, 0444); | |
51 | MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius"); | |
52 | ||
199e0de7 D |
53 | #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */ |
54 | #define NUM_REAL_CORES 16 /* Number of Real cores per cpu */ | |
55 | #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */ | |
c814a4c7 D |
56 | #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */ |
57 | #define MAX_THRESH_ATTRS 3 /* Maximum no of Threshold attrs */ | |
58 | #define TOTAL_ATTRS (MAX_CORE_ATTRS + MAX_THRESH_ATTRS) | |
199e0de7 D |
59 | #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO) |
60 | ||
61 | #ifdef CONFIG_SMP | |
62 | #define TO_PHYS_ID(cpu) cpu_data(cpu).phys_proc_id | |
63 | #define TO_CORE_ID(cpu) cpu_data(cpu).cpu_core_id | |
64 | #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO) | |
bb74e8ca | 65 | #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu)) |
199e0de7 D |
66 | #else |
67 | #define TO_PHYS_ID(cpu) (cpu) | |
68 | #define TO_CORE_ID(cpu) (cpu) | |
69 | #define TO_ATTR_NO(cpu) (cpu) | |
bb74e8ca | 70 | #define for_each_sibling(i, cpu) for (i = 0; false; ) |
199e0de7 | 71 | #endif |
bebe4678 RM |
72 | |
73 | /* | |
199e0de7 D |
74 | * Per-Core Temperature Data |
75 | * @last_updated: The time when the current temperature value was updated | |
76 | * earlier (in jiffies). | |
77 | * @cpu_core_id: The CPU Core from which temperature values should be read | |
78 | * This value is passed as "id" field to rdmsr/wrmsr functions. | |
79 | * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS, | |
80 | * from where the temperature values should be read. | |
c814a4c7 D |
81 | * @intrpt_reg: One of IA32_THERM_INTERRUPT or IA32_PACKAGE_THERM_INTERRUPT, |
82 | * from where the thresholds are read. | |
83 | * @attr_size: Total number of pre-core attrs displayed in the sysfs. | |
199e0de7 D |
84 | * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data. |
85 | * Otherwise, temp_data holds coretemp data. | |
86 | * @valid: If this is 1, the current temperature is valid. | |
bebe4678 | 87 | */ |
199e0de7 | 88 | struct temp_data { |
bebe4678 | 89 | int temp; |
6369a288 | 90 | int ttarget; |
c814a4c7 | 91 | int tmin; |
199e0de7 D |
92 | int tjmax; |
93 | unsigned long last_updated; | |
94 | unsigned int cpu; | |
95 | u32 cpu_core_id; | |
96 | u32 status_reg; | |
c814a4c7 D |
97 | u32 intrpt_reg; |
98 | int attr_size; | |
199e0de7 D |
99 | bool is_pkg_data; |
100 | bool valid; | |
c814a4c7 D |
101 | struct sensor_device_attribute sd_attrs[TOTAL_ATTRS]; |
102 | char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH]; | |
199e0de7 | 103 | struct mutex update_lock; |
bebe4678 RM |
104 | }; |
105 | ||
199e0de7 D |
106 | /* Platform Data per Physical CPU */ |
107 | struct platform_data { | |
108 | struct device *hwmon_dev; | |
109 | u16 phys_proc_id; | |
110 | struct temp_data *core_data[MAX_CORE_DATA]; | |
111 | struct device_attribute name_attr; | |
112 | }; | |
bebe4678 | 113 | |
199e0de7 D |
114 | struct pdev_entry { |
115 | struct list_head list; | |
116 | struct platform_device *pdev; | |
199e0de7 | 117 | u16 phys_proc_id; |
199e0de7 D |
118 | }; |
119 | ||
120 | static LIST_HEAD(pdev_list); | |
121 | static DEFINE_MUTEX(pdev_list_mutex); | |
122 | ||
123 | static ssize_t show_name(struct device *dev, | |
124 | struct device_attribute *devattr, char *buf) | |
125 | { | |
126 | return sprintf(buf, "%s\n", DRVNAME); | |
127 | } | |
128 | ||
129 | static ssize_t show_label(struct device *dev, | |
130 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 131 | { |
bebe4678 | 132 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
199e0de7 D |
133 | struct platform_data *pdata = dev_get_drvdata(dev); |
134 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
135 | ||
136 | if (tdata->is_pkg_data) | |
137 | return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id); | |
bebe4678 | 138 | |
199e0de7 | 139 | return sprintf(buf, "Core %u\n", tdata->cpu_core_id); |
bebe4678 RM |
140 | } |
141 | ||
199e0de7 D |
142 | static ssize_t show_crit_alarm(struct device *dev, |
143 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 144 | { |
199e0de7 D |
145 | u32 eax, edx; |
146 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
147 | struct platform_data *pdata = dev_get_drvdata(dev); | |
148 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
149 | ||
150 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); | |
151 | ||
152 | return sprintf(buf, "%d\n", (eax >> 5) & 1); | |
bebe4678 RM |
153 | } |
154 | ||
c814a4c7 D |
155 | static ssize_t show_max_alarm(struct device *dev, |
156 | struct device_attribute *devattr, char *buf) | |
157 | { | |
158 | u32 eax, edx; | |
159 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
160 | struct platform_data *pdata = dev_get_drvdata(dev); | |
161 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
162 | ||
163 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); | |
164 | ||
165 | return sprintf(buf, "%d\n", !!(eax & THERM_STATUS_THRESHOLD1)); | |
166 | } | |
167 | ||
199e0de7 D |
168 | static ssize_t show_tjmax(struct device *dev, |
169 | struct device_attribute *devattr, char *buf) | |
bebe4678 RM |
170 | { |
171 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
199e0de7 | 172 | struct platform_data *pdata = dev_get_drvdata(dev); |
bebe4678 | 173 | |
199e0de7 | 174 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax); |
bebe4678 RM |
175 | } |
176 | ||
199e0de7 D |
177 | static ssize_t show_ttarget(struct device *dev, |
178 | struct device_attribute *devattr, char *buf) | |
179 | { | |
180 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
181 | struct platform_data *pdata = dev_get_drvdata(dev); | |
bebe4678 | 182 | |
199e0de7 D |
183 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget); |
184 | } | |
bebe4678 | 185 | |
c814a4c7 D |
186 | static ssize_t store_ttarget(struct device *dev, |
187 | struct device_attribute *devattr, | |
188 | const char *buf, size_t count) | |
189 | { | |
190 | struct platform_data *pdata = dev_get_drvdata(dev); | |
191 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
192 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
193 | u32 eax, edx; | |
194 | unsigned long val; | |
195 | int diff; | |
196 | ||
197 | if (strict_strtoul(buf, 10, &val)) | |
198 | return -EINVAL; | |
199 | ||
200 | /* | |
201 | * THERM_MASK_THRESHOLD1 is 7 bits wide. Values are entered in terms | |
202 | * of milli degree celsius. Hence don't accept val > (127 * 1000) | |
203 | */ | |
204 | if (val > tdata->tjmax || val > 127000) | |
205 | return -EINVAL; | |
206 | ||
207 | diff = (tdata->tjmax - val) / 1000; | |
208 | ||
209 | mutex_lock(&tdata->update_lock); | |
210 | rdmsr_on_cpu(tdata->cpu, tdata->intrpt_reg, &eax, &edx); | |
211 | eax = (eax & ~THERM_MASK_THRESHOLD1) | | |
212 | (diff << THERM_SHIFT_THRESHOLD1); | |
213 | wrmsr_on_cpu(tdata->cpu, tdata->intrpt_reg, eax, edx); | |
214 | tdata->ttarget = val; | |
215 | mutex_unlock(&tdata->update_lock); | |
216 | ||
217 | return count; | |
218 | } | |
219 | ||
220 | static ssize_t show_tmin(struct device *dev, | |
221 | struct device_attribute *devattr, char *buf) | |
222 | { | |
223 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
224 | struct platform_data *pdata = dev_get_drvdata(dev); | |
225 | ||
226 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tmin); | |
227 | } | |
228 | ||
229 | static ssize_t store_tmin(struct device *dev, | |
230 | struct device_attribute *devattr, | |
231 | const char *buf, size_t count) | |
232 | { | |
233 | struct platform_data *pdata = dev_get_drvdata(dev); | |
234 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
235 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
236 | u32 eax, edx; | |
237 | unsigned long val; | |
238 | int diff; | |
239 | ||
240 | if (strict_strtoul(buf, 10, &val)) | |
241 | return -EINVAL; | |
242 | ||
243 | /* | |
244 | * THERM_MASK_THRESHOLD0 is 7 bits wide. Values are entered in terms | |
245 | * of milli degree celsius. Hence don't accept val > (127 * 1000) | |
246 | */ | |
247 | if (val > tdata->tjmax || val > 127000) | |
248 | return -EINVAL; | |
249 | ||
250 | diff = (tdata->tjmax - val) / 1000; | |
251 | ||
252 | mutex_lock(&tdata->update_lock); | |
253 | rdmsr_on_cpu(tdata->cpu, tdata->intrpt_reg, &eax, &edx); | |
254 | eax = (eax & ~THERM_MASK_THRESHOLD0) | | |
255 | (diff << THERM_SHIFT_THRESHOLD0); | |
256 | wrmsr_on_cpu(tdata->cpu, tdata->intrpt_reg, eax, edx); | |
257 | tdata->tmin = val; | |
258 | mutex_unlock(&tdata->update_lock); | |
259 | ||
260 | return count; | |
261 | } | |
262 | ||
199e0de7 D |
263 | static ssize_t show_temp(struct device *dev, |
264 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 265 | { |
199e0de7 D |
266 | u32 eax, edx; |
267 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
268 | struct platform_data *pdata = dev_get_drvdata(dev); | |
269 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
bebe4678 | 270 | |
199e0de7 | 271 | mutex_lock(&tdata->update_lock); |
bebe4678 | 272 | |
199e0de7 D |
273 | /* Check whether the time interval has elapsed */ |
274 | if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) { | |
275 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); | |
276 | tdata->valid = 0; | |
277 | /* Check whether the data is valid */ | |
bebe4678 | 278 | if (eax & 0x80000000) { |
199e0de7 | 279 | tdata->temp = tdata->tjmax - |
4cc45275 | 280 | ((eax >> 16) & 0x7f) * 1000; |
199e0de7 | 281 | tdata->valid = 1; |
bebe4678 | 282 | } |
199e0de7 | 283 | tdata->last_updated = jiffies; |
bebe4678 RM |
284 | } |
285 | ||
199e0de7 D |
286 | mutex_unlock(&tdata->update_lock); |
287 | return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN; | |
bebe4678 RM |
288 | } |
289 | ||
199e0de7 | 290 | static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) |
118a8871 RM |
291 | { |
292 | /* The 100C is default for both mobile and non mobile CPUs */ | |
293 | ||
294 | int tjmax = 100000; | |
eccfed42 | 295 | int tjmax_ee = 85000; |
708a62bc | 296 | int usemsr_ee = 1; |
118a8871 RM |
297 | int err; |
298 | u32 eax, edx; | |
1fe63ab4 | 299 | struct pci_dev *host_bridge; |
118a8871 RM |
300 | |
301 | /* Early chips have no MSR for TjMax */ | |
302 | ||
4cc45275 | 303 | if (c->x86_model == 0xf && c->x86_mask < 4) |
708a62bc | 304 | usemsr_ee = 0; |
118a8871 | 305 | |
1fe63ab4 | 306 | /* Atom CPUs */ |
708a62bc RM |
307 | |
308 | if (c->x86_model == 0x1c) { | |
309 | usemsr_ee = 0; | |
1fe63ab4 YW |
310 | |
311 | host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0)); | |
312 | ||
313 | if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL | |
314 | && (host_bridge->device == 0xa000 /* NM10 based nettop */ | |
315 | || host_bridge->device == 0xa010)) /* NM10 based netbook */ | |
316 | tjmax = 100000; | |
317 | else | |
318 | tjmax = 90000; | |
319 | ||
320 | pci_dev_put(host_bridge); | |
708a62bc RM |
321 | } |
322 | ||
4cc45275 | 323 | if (c->x86_model > 0xe && usemsr_ee) { |
eccfed42 | 324 | u8 platform_id; |
118a8871 | 325 | |
4cc45275 GR |
326 | /* |
327 | * Now we can detect the mobile CPU using Intel provided table | |
328 | * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm | |
329 | * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU | |
330 | */ | |
118a8871 RM |
331 | err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx); |
332 | if (err) { | |
333 | dev_warn(dev, | |
334 | "Unable to access MSR 0x17, assuming desktop" | |
335 | " CPU\n"); | |
708a62bc | 336 | usemsr_ee = 0; |
eccfed42 | 337 | } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) { |
4cc45275 GR |
338 | /* |
339 | * Trust bit 28 up to Penryn, I could not find any | |
340 | * documentation on that; if you happen to know | |
341 | * someone at Intel please ask | |
342 | */ | |
708a62bc | 343 | usemsr_ee = 0; |
eccfed42 RM |
344 | } else { |
345 | /* Platform ID bits 52:50 (EDX starts at bit 32) */ | |
346 | platform_id = (edx >> 18) & 0x7; | |
347 | ||
4cc45275 GR |
348 | /* |
349 | * Mobile Penryn CPU seems to be platform ID 7 or 5 | |
350 | * (guesswork) | |
351 | */ | |
352 | if (c->x86_model == 0x17 && | |
353 | (platform_id == 5 || platform_id == 7)) { | |
354 | /* | |
355 | * If MSR EE bit is set, set it to 90 degrees C, | |
356 | * otherwise 105 degrees C | |
357 | */ | |
eccfed42 RM |
358 | tjmax_ee = 90000; |
359 | tjmax = 105000; | |
360 | } | |
118a8871 RM |
361 | } |
362 | } | |
363 | ||
708a62bc | 364 | if (usemsr_ee) { |
118a8871 RM |
365 | err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx); |
366 | if (err) { | |
367 | dev_warn(dev, | |
368 | "Unable to access MSR 0xEE, for Tjmax, left" | |
4d7a5644 | 369 | " at default\n"); |
118a8871 | 370 | } else if (eax & 0x40000000) { |
eccfed42 | 371 | tjmax = tjmax_ee; |
118a8871 | 372 | } |
708a62bc | 373 | } else if (tjmax == 100000) { |
4cc45275 GR |
374 | /* |
375 | * If we don't use msr EE it means we are desktop CPU | |
376 | * (with exeception of Atom) | |
377 | */ | |
118a8871 RM |
378 | dev_warn(dev, "Using relative temperature scale!\n"); |
379 | } | |
380 | ||
381 | return tjmax; | |
382 | } | |
383 | ||
199e0de7 | 384 | static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) |
a321cedb | 385 | { |
a321cedb CE |
386 | int err; |
387 | u32 eax, edx; | |
388 | u32 val; | |
389 | ||
4cc45275 GR |
390 | /* |
391 | * A new feature of current Intel(R) processors, the | |
392 | * IA32_TEMPERATURE_TARGET contains the TjMax value | |
393 | */ | |
a321cedb CE |
394 | err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx); |
395 | if (err) { | |
6bf9e9b0 JD |
396 | if (c->x86_model > 0xe && c->x86_model != 0x1c) |
397 | dev_warn(dev, "Unable to read TjMax from CPU %u\n", id); | |
a321cedb CE |
398 | } else { |
399 | val = (eax >> 16) & 0xff; | |
400 | /* | |
401 | * If the TjMax is not plausible, an assumption | |
402 | * will be used | |
403 | */ | |
bb9973e4 | 404 | if (val) { |
6bf9e9b0 | 405 | dev_dbg(dev, "TjMax is %d degrees C\n", val); |
a321cedb CE |
406 | return val * 1000; |
407 | } | |
408 | } | |
409 | ||
a45a8c85 JD |
410 | if (force_tjmax) { |
411 | dev_notice(dev, "TjMax forced to %d degrees C by user\n", | |
412 | force_tjmax); | |
413 | return force_tjmax * 1000; | |
414 | } | |
415 | ||
a321cedb CE |
416 | /* |
417 | * An assumption is made for early CPUs and unreadable MSR. | |
4f5f71a7 | 418 | * NOTE: the calculated value may not be correct. |
a321cedb | 419 | */ |
4f5f71a7 | 420 | return adjust_tjmax(c, id, dev); |
a321cedb CE |
421 | } |
422 | ||
32478006 JB |
423 | static void __devinit get_ucode_rev_on_cpu(void *edx) |
424 | { | |
425 | u32 eax; | |
426 | ||
427 | wrmsr(MSR_IA32_UCODE_REV, 0, 0); | |
428 | sync_core(); | |
429 | rdmsr(MSR_IA32_UCODE_REV, eax, *(u32 *)edx); | |
430 | } | |
431 | ||
199e0de7 D |
432 | static int create_name_attr(struct platform_data *pdata, struct device *dev) |
433 | { | |
4258781a | 434 | sysfs_attr_init(&pdata->name_attr.attr); |
199e0de7 D |
435 | pdata->name_attr.attr.name = "name"; |
436 | pdata->name_attr.attr.mode = S_IRUGO; | |
437 | pdata->name_attr.show = show_name; | |
438 | return device_create_file(dev, &pdata->name_attr); | |
439 | } | |
bebe4678 | 440 | |
199e0de7 D |
441 | static int create_core_attrs(struct temp_data *tdata, struct device *dev, |
442 | int attr_no) | |
443 | { | |
444 | int err, i; | |
c814a4c7 | 445 | static ssize_t (*rd_ptr[TOTAL_ATTRS]) (struct device *dev, |
199e0de7 | 446 | struct device_attribute *devattr, char *buf) = { |
c814a4c7 D |
447 | show_label, show_crit_alarm, show_temp, show_tjmax, |
448 | show_max_alarm, show_ttarget, show_tmin }; | |
449 | static ssize_t (*rw_ptr[TOTAL_ATTRS]) (struct device *dev, | |
450 | struct device_attribute *devattr, const char *buf, | |
451 | size_t count) = { NULL, NULL, NULL, NULL, NULL, | |
452 | store_ttarget, store_tmin }; | |
453 | static const char *names[TOTAL_ATTRS] = { | |
199e0de7 | 454 | "temp%d_label", "temp%d_crit_alarm", |
c814a4c7 D |
455 | "temp%d_input", "temp%d_crit", |
456 | "temp%d_max_alarm", "temp%d_max", | |
457 | "temp%d_max_hyst" }; | |
199e0de7 | 458 | |
c814a4c7 | 459 | for (i = 0; i < tdata->attr_size; i++) { |
199e0de7 D |
460 | snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i], |
461 | attr_no); | |
4258781a | 462 | sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr); |
199e0de7 D |
463 | tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i]; |
464 | tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO; | |
c814a4c7 D |
465 | if (rw_ptr[i]) { |
466 | tdata->sd_attrs[i].dev_attr.attr.mode |= S_IWUSR; | |
467 | tdata->sd_attrs[i].dev_attr.store = rw_ptr[i]; | |
468 | } | |
199e0de7 | 469 | tdata->sd_attrs[i].dev_attr.show = rd_ptr[i]; |
199e0de7 D |
470 | tdata->sd_attrs[i].index = attr_no; |
471 | err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr); | |
472 | if (err) | |
473 | goto exit_free; | |
bebe4678 | 474 | } |
199e0de7 D |
475 | return 0; |
476 | ||
477 | exit_free: | |
478 | while (--i >= 0) | |
479 | device_remove_file(dev, &tdata->sd_attrs[i].dev_attr); | |
480 | return err; | |
481 | } | |
482 | ||
199e0de7 | 483 | |
582e1b27 | 484 | static int __devinit chk_ucode_version(struct platform_device *pdev) |
199e0de7 D |
485 | { |
486 | struct cpuinfo_x86 *c = &cpu_data(pdev->id); | |
487 | int err; | |
488 | u32 edx; | |
67f363b1 | 489 | |
199e0de7 D |
490 | /* |
491 | * Check if we have problem with errata AE18 of Core processors: | |
492 | * Readings might stop update when processor visited too deep sleep, | |
493 | * fixed for stepping D0 (6EC). | |
494 | */ | |
4cc45275 | 495 | if (c->x86_model == 0xe && c->x86_mask < 0xc) { |
67f363b1 | 496 | /* check for microcode update */ |
199e0de7 | 497 | err = smp_call_function_single(pdev->id, get_ucode_rev_on_cpu, |
32478006 JB |
498 | &edx, 1); |
499 | if (err) { | |
500 | dev_err(&pdev->dev, | |
501 | "Cannot determine microcode revision of " | |
199e0de7 D |
502 | "CPU#%u (%d)!\n", pdev->id, err); |
503 | return -ENODEV; | |
32478006 | 504 | } else if (edx < 0x39) { |
67f363b1 RM |
505 | dev_err(&pdev->dev, |
506 | "Errata AE18 not fixed, update BIOS or " | |
507 | "microcode of the CPU!\n"); | |
199e0de7 | 508 | return -ENODEV; |
67f363b1 RM |
509 | } |
510 | } | |
199e0de7 D |
511 | return 0; |
512 | } | |
513 | ||
514 | static struct platform_device *coretemp_get_pdev(unsigned int cpu) | |
515 | { | |
516 | u16 phys_proc_id = TO_PHYS_ID(cpu); | |
517 | struct pdev_entry *p; | |
518 | ||
519 | mutex_lock(&pdev_list_mutex); | |
520 | ||
521 | list_for_each_entry(p, &pdev_list, list) | |
522 | if (p->phys_proc_id == phys_proc_id) { | |
523 | mutex_unlock(&pdev_list_mutex); | |
524 | return p->pdev; | |
525 | } | |
526 | ||
527 | mutex_unlock(&pdev_list_mutex); | |
528 | return NULL; | |
529 | } | |
530 | ||
531 | static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag) | |
532 | { | |
533 | struct temp_data *tdata; | |
534 | ||
535 | tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL); | |
536 | if (!tdata) | |
537 | return NULL; | |
538 | ||
539 | tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS : | |
540 | MSR_IA32_THERM_STATUS; | |
c814a4c7 D |
541 | tdata->intrpt_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_INTERRUPT : |
542 | MSR_IA32_THERM_INTERRUPT; | |
199e0de7 D |
543 | tdata->is_pkg_data = pkg_flag; |
544 | tdata->cpu = cpu; | |
545 | tdata->cpu_core_id = TO_CORE_ID(cpu); | |
c814a4c7 | 546 | tdata->attr_size = MAX_CORE_ATTRS; |
199e0de7 D |
547 | mutex_init(&tdata->update_lock); |
548 | return tdata; | |
549 | } | |
67f363b1 | 550 | |
199e0de7 D |
551 | static int create_core_data(struct platform_data *pdata, |
552 | struct platform_device *pdev, | |
553 | unsigned int cpu, int pkg_flag) | |
554 | { | |
555 | struct temp_data *tdata; | |
556 | struct cpuinfo_x86 *c = &cpu_data(cpu); | |
557 | u32 eax, edx; | |
558 | int err, attr_no; | |
bebe4678 | 559 | |
a321cedb | 560 | /* |
199e0de7 D |
561 | * Find attr number for sysfs: |
562 | * We map the attr number to core id of the CPU | |
563 | * The attr number is always core id + 2 | |
564 | * The Pkgtemp will always show up as temp1_*, if available | |
a321cedb | 565 | */ |
199e0de7 | 566 | attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu); |
6369a288 | 567 | |
199e0de7 D |
568 | if (attr_no > MAX_CORE_DATA - 1) |
569 | return -ERANGE; | |
570 | ||
f4e0bcf0 GR |
571 | /* |
572 | * Provide a single set of attributes for all HT siblings of a core | |
573 | * to avoid duplicate sensors (the processor ID and core ID of all | |
6777b9e4 GR |
574 | * HT siblings of a core are the same). |
575 | * Skip if a HT sibling of this core is already registered. | |
f4e0bcf0 GR |
576 | * This is not an error. |
577 | */ | |
199e0de7 D |
578 | if (pdata->core_data[attr_no] != NULL) |
579 | return 0; | |
6369a288 | 580 | |
199e0de7 D |
581 | tdata = init_temp_data(cpu, pkg_flag); |
582 | if (!tdata) | |
583 | return -ENOMEM; | |
bebe4678 | 584 | |
199e0de7 D |
585 | /* Test if we can access the status register */ |
586 | err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx); | |
587 | if (err) | |
588 | goto exit_free; | |
589 | ||
590 | /* We can access status register. Get Critical Temperature */ | |
6bf9e9b0 | 591 | tdata->tjmax = get_tjmax(c, cpu, &pdev->dev); |
199e0de7 | 592 | |
c814a4c7 D |
593 | /* |
594 | * Test if we can access the intrpt register. If so, increase the | |
595 | * 'size' enough to have ttarget/tmin/max_alarm interfaces. | |
596 | * Initialize ttarget with bits 16:22 of MSR_IA32_THERM_INTERRUPT | |
597 | */ | |
598 | err = rdmsr_safe_on_cpu(cpu, tdata->intrpt_reg, &eax, &edx); | |
599 | if (!err) { | |
600 | tdata->attr_size += MAX_THRESH_ATTRS; | |
cd5bd3df JD |
601 | tdata->tmin = tdata->tjmax - |
602 | ((eax & THERM_MASK_THRESHOLD0) >> | |
603 | THERM_SHIFT_THRESHOLD0) * 1000; | |
604 | tdata->ttarget = tdata->tjmax - | |
605 | ((eax & THERM_MASK_THRESHOLD1) >> | |
606 | THERM_SHIFT_THRESHOLD1) * 1000; | |
c814a4c7 D |
607 | } |
608 | ||
199e0de7 D |
609 | pdata->core_data[attr_no] = tdata; |
610 | ||
611 | /* Create sysfs interfaces */ | |
612 | err = create_core_attrs(tdata, &pdev->dev, attr_no); | |
613 | if (err) | |
614 | goto exit_free; | |
bebe4678 RM |
615 | |
616 | return 0; | |
199e0de7 D |
617 | exit_free: |
618 | kfree(tdata); | |
619 | return err; | |
620 | } | |
621 | ||
622 | static void coretemp_add_core(unsigned int cpu, int pkg_flag) | |
623 | { | |
624 | struct platform_data *pdata; | |
625 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
626 | int err; | |
627 | ||
628 | if (!pdev) | |
629 | return; | |
630 | ||
631 | pdata = platform_get_drvdata(pdev); | |
632 | ||
633 | err = create_core_data(pdata, pdev, cpu, pkg_flag); | |
634 | if (err) | |
635 | dev_err(&pdev->dev, "Adding Core %u failed\n", cpu); | |
636 | } | |
637 | ||
638 | static void coretemp_remove_core(struct platform_data *pdata, | |
639 | struct device *dev, int indx) | |
640 | { | |
641 | int i; | |
642 | struct temp_data *tdata = pdata->core_data[indx]; | |
643 | ||
644 | /* Remove the sysfs attributes */ | |
c814a4c7 | 645 | for (i = 0; i < tdata->attr_size; i++) |
199e0de7 D |
646 | device_remove_file(dev, &tdata->sd_attrs[i].dev_attr); |
647 | ||
648 | kfree(pdata->core_data[indx]); | |
649 | pdata->core_data[indx] = NULL; | |
650 | } | |
651 | ||
652 | static int __devinit coretemp_probe(struct platform_device *pdev) | |
653 | { | |
654 | struct platform_data *pdata; | |
655 | int err; | |
bebe4678 | 656 | |
199e0de7 D |
657 | /* Check the microcode version of the CPU */ |
658 | err = chk_ucode_version(pdev); | |
659 | if (err) | |
660 | return err; | |
661 | ||
662 | /* Initialize the per-package data structures */ | |
663 | pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL); | |
664 | if (!pdata) | |
665 | return -ENOMEM; | |
666 | ||
667 | err = create_name_attr(pdata, &pdev->dev); | |
668 | if (err) | |
669 | goto exit_free; | |
670 | ||
671 | pdata->phys_proc_id = TO_PHYS_ID(pdev->id); | |
672 | platform_set_drvdata(pdev, pdata); | |
673 | ||
674 | pdata->hwmon_dev = hwmon_device_register(&pdev->dev); | |
675 | if (IS_ERR(pdata->hwmon_dev)) { | |
676 | err = PTR_ERR(pdata->hwmon_dev); | |
677 | dev_err(&pdev->dev, "Class registration failed (%d)\n", err); | |
678 | goto exit_name; | |
679 | } | |
680 | return 0; | |
681 | ||
682 | exit_name: | |
683 | device_remove_file(&pdev->dev, &pdata->name_attr); | |
684 | platform_set_drvdata(pdev, NULL); | |
bebe4678 | 685 | exit_free: |
199e0de7 | 686 | kfree(pdata); |
bebe4678 RM |
687 | return err; |
688 | } | |
689 | ||
690 | static int __devexit coretemp_remove(struct platform_device *pdev) | |
691 | { | |
199e0de7 D |
692 | struct platform_data *pdata = platform_get_drvdata(pdev); |
693 | int i; | |
bebe4678 | 694 | |
199e0de7 D |
695 | for (i = MAX_CORE_DATA - 1; i >= 0; --i) |
696 | if (pdata->core_data[i]) | |
697 | coretemp_remove_core(pdata, &pdev->dev, i); | |
698 | ||
699 | device_remove_file(&pdev->dev, &pdata->name_attr); | |
700 | hwmon_device_unregister(pdata->hwmon_dev); | |
bebe4678 | 701 | platform_set_drvdata(pdev, NULL); |
199e0de7 | 702 | kfree(pdata); |
bebe4678 RM |
703 | return 0; |
704 | } | |
705 | ||
706 | static struct platform_driver coretemp_driver = { | |
707 | .driver = { | |
708 | .owner = THIS_MODULE, | |
709 | .name = DRVNAME, | |
710 | }, | |
711 | .probe = coretemp_probe, | |
712 | .remove = __devexit_p(coretemp_remove), | |
713 | }; | |
714 | ||
bebe4678 RM |
715 | static int __cpuinit coretemp_device_add(unsigned int cpu) |
716 | { | |
717 | int err; | |
718 | struct platform_device *pdev; | |
719 | struct pdev_entry *pdev_entry; | |
d883b9f0 JD |
720 | |
721 | mutex_lock(&pdev_list_mutex); | |
722 | ||
bebe4678 RM |
723 | pdev = platform_device_alloc(DRVNAME, cpu); |
724 | if (!pdev) { | |
725 | err = -ENOMEM; | |
f8bb8925 | 726 | pr_err("Device allocation failed\n"); |
bebe4678 RM |
727 | goto exit; |
728 | } | |
729 | ||
730 | pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL); | |
731 | if (!pdev_entry) { | |
732 | err = -ENOMEM; | |
733 | goto exit_device_put; | |
734 | } | |
735 | ||
736 | err = platform_device_add(pdev); | |
737 | if (err) { | |
f8bb8925 | 738 | pr_err("Device addition failed (%d)\n", err); |
bebe4678 RM |
739 | goto exit_device_free; |
740 | } | |
741 | ||
742 | pdev_entry->pdev = pdev; | |
199e0de7 | 743 | pdev_entry->phys_proc_id = TO_PHYS_ID(cpu); |
199e0de7 | 744 | |
bebe4678 RM |
745 | list_add_tail(&pdev_entry->list, &pdev_list); |
746 | mutex_unlock(&pdev_list_mutex); | |
747 | ||
748 | return 0; | |
749 | ||
750 | exit_device_free: | |
751 | kfree(pdev_entry); | |
752 | exit_device_put: | |
753 | platform_device_put(pdev); | |
754 | exit: | |
d883b9f0 | 755 | mutex_unlock(&pdev_list_mutex); |
bebe4678 RM |
756 | return err; |
757 | } | |
758 | ||
199e0de7 | 759 | static void coretemp_device_remove(unsigned int cpu) |
bebe4678 | 760 | { |
199e0de7 D |
761 | struct pdev_entry *p, *n; |
762 | u16 phys_proc_id = TO_PHYS_ID(cpu); | |
e40cc4bd | 763 | |
bebe4678 | 764 | mutex_lock(&pdev_list_mutex); |
199e0de7 D |
765 | list_for_each_entry_safe(p, n, &pdev_list, list) { |
766 | if (p->phys_proc_id != phys_proc_id) | |
e40cc4bd | 767 | continue; |
e40cc4bd JB |
768 | platform_device_unregister(p->pdev); |
769 | list_del(&p->list); | |
e40cc4bd | 770 | kfree(p); |
bebe4678 RM |
771 | } |
772 | mutex_unlock(&pdev_list_mutex); | |
773 | } | |
774 | ||
199e0de7 D |
775 | static bool is_any_core_online(struct platform_data *pdata) |
776 | { | |
777 | int i; | |
778 | ||
779 | /* Find online cores, except pkgtemp data */ | |
780 | for (i = MAX_CORE_DATA - 1; i >= 0; --i) { | |
781 | if (pdata->core_data[i] && | |
782 | !pdata->core_data[i]->is_pkg_data) { | |
783 | return true; | |
784 | } | |
785 | } | |
786 | return false; | |
787 | } | |
788 | ||
789 | static void __cpuinit get_core_online(unsigned int cpu) | |
790 | { | |
791 | struct cpuinfo_x86 *c = &cpu_data(cpu); | |
792 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
793 | int err; | |
794 | ||
795 | /* | |
796 | * CPUID.06H.EAX[0] indicates whether the CPU has thermal | |
797 | * sensors. We check this bit only, all the early CPUs | |
798 | * without thermal sensors will be filtered out. | |
799 | */ | |
800 | if (!cpu_has(c, X86_FEATURE_DTS)) | |
801 | return; | |
802 | ||
803 | if (!pdev) { | |
804 | /* | |
805 | * Alright, we have DTS support. | |
806 | * We are bringing the _first_ core in this pkg | |
807 | * online. So, initialize per-pkg data structures and | |
808 | * then bring this core online. | |
809 | */ | |
810 | err = coretemp_device_add(cpu); | |
811 | if (err) | |
812 | return; | |
813 | /* | |
814 | * Check whether pkgtemp support is available. | |
815 | * If so, add interfaces for pkgtemp. | |
816 | */ | |
817 | if (cpu_has(c, X86_FEATURE_PTS)) | |
818 | coretemp_add_core(cpu, 1); | |
819 | } | |
820 | /* | |
821 | * Physical CPU device already exists. | |
822 | * So, just add interfaces for this core. | |
823 | */ | |
824 | coretemp_add_core(cpu, 0); | |
825 | } | |
826 | ||
827 | static void __cpuinit put_core_offline(unsigned int cpu) | |
828 | { | |
829 | int i, indx; | |
830 | struct platform_data *pdata; | |
831 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
832 | ||
833 | /* If the physical CPU device does not exist, just return */ | |
834 | if (!pdev) | |
835 | return; | |
836 | ||
837 | pdata = platform_get_drvdata(pdev); | |
838 | ||
839 | indx = TO_ATTR_NO(cpu); | |
840 | ||
841 | if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu) | |
842 | coretemp_remove_core(pdata, &pdev->dev, indx); | |
843 | ||
f4e0bcf0 | 844 | /* |
6777b9e4 GR |
845 | * If a HT sibling of a core is taken offline, but another HT sibling |
846 | * of the same core is still online, register the alternate sibling. | |
847 | * This ensures that exactly one set of attributes is provided as long | |
848 | * as at least one HT sibling of a core is online. | |
f4e0bcf0 | 849 | */ |
bb74e8ca | 850 | for_each_sibling(i, cpu) { |
199e0de7 D |
851 | if (i != cpu) { |
852 | get_core_online(i); | |
f4e0bcf0 GR |
853 | /* |
854 | * Display temperature sensor data for one HT sibling | |
855 | * per core only, so abort the loop after one such | |
856 | * sibling has been found. | |
857 | */ | |
199e0de7 D |
858 | break; |
859 | } | |
860 | } | |
861 | /* | |
862 | * If all cores in this pkg are offline, remove the device. | |
863 | * coretemp_device_remove calls unregister_platform_device, | |
864 | * which in turn calls coretemp_remove. This removes the | |
865 | * pkgtemp entry and does other clean ups. | |
866 | */ | |
867 | if (!is_any_core_online(pdata)) | |
868 | coretemp_device_remove(cpu); | |
869 | } | |
870 | ||
ba7c1927 | 871 | static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb, |
bebe4678 RM |
872 | unsigned long action, void *hcpu) |
873 | { | |
874 | unsigned int cpu = (unsigned long) hcpu; | |
875 | ||
876 | switch (action) { | |
877 | case CPU_ONLINE: | |
561d9a96 | 878 | case CPU_DOWN_FAILED: |
199e0de7 | 879 | get_core_online(cpu); |
bebe4678 | 880 | break; |
561d9a96 | 881 | case CPU_DOWN_PREPARE: |
199e0de7 | 882 | put_core_offline(cpu); |
bebe4678 RM |
883 | break; |
884 | } | |
885 | return NOTIFY_OK; | |
886 | } | |
887 | ||
ba7c1927 | 888 | static struct notifier_block coretemp_cpu_notifier __refdata = { |
bebe4678 RM |
889 | .notifier_call = coretemp_cpu_callback, |
890 | }; | |
bebe4678 RM |
891 | |
892 | static int __init coretemp_init(void) | |
893 | { | |
894 | int i, err = -ENODEV; | |
bebe4678 | 895 | |
bebe4678 | 896 | /* quick check if we run Intel */ |
92cb7612 | 897 | if (cpu_data(0).x86_vendor != X86_VENDOR_INTEL) |
bebe4678 RM |
898 | goto exit; |
899 | ||
900 | err = platform_driver_register(&coretemp_driver); | |
901 | if (err) | |
902 | goto exit; | |
903 | ||
a4659053 | 904 | for_each_online_cpu(i) |
199e0de7 | 905 | get_core_online(i); |
89a3fd35 JB |
906 | |
907 | #ifndef CONFIG_HOTPLUG_CPU | |
bebe4678 RM |
908 | if (list_empty(&pdev_list)) { |
909 | err = -ENODEV; | |
910 | goto exit_driver_unreg; | |
911 | } | |
89a3fd35 | 912 | #endif |
bebe4678 | 913 | |
bebe4678 | 914 | register_hotcpu_notifier(&coretemp_cpu_notifier); |
bebe4678 RM |
915 | return 0; |
916 | ||
0dca94ba | 917 | #ifndef CONFIG_HOTPLUG_CPU |
89a3fd35 | 918 | exit_driver_unreg: |
bebe4678 | 919 | platform_driver_unregister(&coretemp_driver); |
0dca94ba | 920 | #endif |
bebe4678 RM |
921 | exit: |
922 | return err; | |
923 | } | |
924 | ||
925 | static void __exit coretemp_exit(void) | |
926 | { | |
927 | struct pdev_entry *p, *n; | |
17c10d61 | 928 | |
bebe4678 | 929 | unregister_hotcpu_notifier(&coretemp_cpu_notifier); |
bebe4678 RM |
930 | mutex_lock(&pdev_list_mutex); |
931 | list_for_each_entry_safe(p, n, &pdev_list, list) { | |
932 | platform_device_unregister(p->pdev); | |
933 | list_del(&p->list); | |
934 | kfree(p); | |
935 | } | |
936 | mutex_unlock(&pdev_list_mutex); | |
937 | platform_driver_unregister(&coretemp_driver); | |
938 | } | |
939 | ||
940 | MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>"); | |
941 | MODULE_DESCRIPTION("Intel Core temperature monitor"); | |
942 | MODULE_LICENSE("GPL"); | |
943 | ||
944 | module_init(coretemp_init) | |
945 | module_exit(coretemp_exit) |