Commit | Line | Data |
---|---|---|
bebe4678 RM |
1 | /* |
2 | * coretemp.c - Linux kernel module for hardware monitoring | |
3 | * | |
4 | * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz> | |
5 | * | |
6 | * Inspired from many hwmon drivers | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; version 2 of the License. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
20 | * 02110-1301 USA. | |
21 | */ | |
22 | ||
f8bb8925 JP |
23 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
24 | ||
bebe4678 | 25 | #include <linux/module.h> |
bebe4678 RM |
26 | #include <linux/init.h> |
27 | #include <linux/slab.h> | |
28 | #include <linux/jiffies.h> | |
29 | #include <linux/hwmon.h> | |
30 | #include <linux/sysfs.h> | |
31 | #include <linux/hwmon-sysfs.h> | |
32 | #include <linux/err.h> | |
33 | #include <linux/mutex.h> | |
34 | #include <linux/list.h> | |
35 | #include <linux/platform_device.h> | |
36 | #include <linux/cpu.h> | |
1fe63ab4 | 37 | #include <linux/pci.h> |
4cc45275 | 38 | #include <linux/smp.h> |
a45a8c85 | 39 | #include <linux/moduleparam.h> |
bebe4678 RM |
40 | #include <asm/msr.h> |
41 | #include <asm/processor.h> | |
9b38096f | 42 | #include <asm/cpu_device_id.h> |
bebe4678 RM |
43 | |
44 | #define DRVNAME "coretemp" | |
45 | ||
a45a8c85 JD |
46 | /* |
47 | * force_tjmax only matters when TjMax can't be read from the CPU itself. | |
48 | * When set, it replaces the driver's suboptimal heuristic. | |
49 | */ | |
50 | static int force_tjmax; | |
51 | module_param_named(tjmax, force_tjmax, int, 0444); | |
52 | MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius"); | |
53 | ||
199e0de7 | 54 | #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */ |
bdc71c9a | 55 | #define NUM_REAL_CORES 32 /* Number of Real cores per cpu */ |
199e0de7 | 56 | #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */ |
c814a4c7 | 57 | #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */ |
f4af6fd6 | 58 | #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1) |
199e0de7 D |
59 | #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO) |
60 | ||
780affe0 GR |
61 | #define TO_PHYS_ID(cpu) (cpu_data(cpu).phys_proc_id) |
62 | #define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id) | |
141168c3 KW |
63 | #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO) |
64 | ||
65 | #ifdef CONFIG_SMP | |
bb74e8ca | 66 | #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu)) |
199e0de7 | 67 | #else |
bb74e8ca | 68 | #define for_each_sibling(i, cpu) for (i = 0; false; ) |
199e0de7 | 69 | #endif |
bebe4678 RM |
70 | |
71 | /* | |
199e0de7 D |
72 | * Per-Core Temperature Data |
73 | * @last_updated: The time when the current temperature value was updated | |
74 | * earlier (in jiffies). | |
75 | * @cpu_core_id: The CPU Core from which temperature values should be read | |
76 | * This value is passed as "id" field to rdmsr/wrmsr functions. | |
77 | * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS, | |
78 | * from where the temperature values should be read. | |
c814a4c7 | 79 | * @attr_size: Total number of pre-core attrs displayed in the sysfs. |
199e0de7 D |
80 | * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data. |
81 | * Otherwise, temp_data holds coretemp data. | |
82 | * @valid: If this is 1, the current temperature is valid. | |
bebe4678 | 83 | */ |
199e0de7 | 84 | struct temp_data { |
bebe4678 | 85 | int temp; |
6369a288 | 86 | int ttarget; |
199e0de7 D |
87 | int tjmax; |
88 | unsigned long last_updated; | |
89 | unsigned int cpu; | |
90 | u32 cpu_core_id; | |
91 | u32 status_reg; | |
c814a4c7 | 92 | int attr_size; |
199e0de7 D |
93 | bool is_pkg_data; |
94 | bool valid; | |
c814a4c7 D |
95 | struct sensor_device_attribute sd_attrs[TOTAL_ATTRS]; |
96 | char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH]; | |
199e0de7 | 97 | struct mutex update_lock; |
bebe4678 RM |
98 | }; |
99 | ||
199e0de7 D |
100 | /* Platform Data per Physical CPU */ |
101 | struct platform_data { | |
102 | struct device *hwmon_dev; | |
103 | u16 phys_proc_id; | |
104 | struct temp_data *core_data[MAX_CORE_DATA]; | |
105 | struct device_attribute name_attr; | |
106 | }; | |
bebe4678 | 107 | |
199e0de7 D |
108 | struct pdev_entry { |
109 | struct list_head list; | |
110 | struct platform_device *pdev; | |
199e0de7 | 111 | u16 phys_proc_id; |
199e0de7 D |
112 | }; |
113 | ||
114 | static LIST_HEAD(pdev_list); | |
115 | static DEFINE_MUTEX(pdev_list_mutex); | |
116 | ||
117 | static ssize_t show_name(struct device *dev, | |
118 | struct device_attribute *devattr, char *buf) | |
119 | { | |
120 | return sprintf(buf, "%s\n", DRVNAME); | |
121 | } | |
122 | ||
123 | static ssize_t show_label(struct device *dev, | |
124 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 125 | { |
bebe4678 | 126 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
199e0de7 D |
127 | struct platform_data *pdata = dev_get_drvdata(dev); |
128 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
129 | ||
130 | if (tdata->is_pkg_data) | |
131 | return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id); | |
bebe4678 | 132 | |
199e0de7 | 133 | return sprintf(buf, "Core %u\n", tdata->cpu_core_id); |
bebe4678 RM |
134 | } |
135 | ||
199e0de7 D |
136 | static ssize_t show_crit_alarm(struct device *dev, |
137 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 138 | { |
199e0de7 D |
139 | u32 eax, edx; |
140 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
141 | struct platform_data *pdata = dev_get_drvdata(dev); | |
142 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
143 | ||
144 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); | |
145 | ||
146 | return sprintf(buf, "%d\n", (eax >> 5) & 1); | |
bebe4678 RM |
147 | } |
148 | ||
199e0de7 D |
149 | static ssize_t show_tjmax(struct device *dev, |
150 | struct device_attribute *devattr, char *buf) | |
bebe4678 RM |
151 | { |
152 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
199e0de7 | 153 | struct platform_data *pdata = dev_get_drvdata(dev); |
bebe4678 | 154 | |
199e0de7 | 155 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax); |
bebe4678 RM |
156 | } |
157 | ||
199e0de7 D |
158 | static ssize_t show_ttarget(struct device *dev, |
159 | struct device_attribute *devattr, char *buf) | |
160 | { | |
161 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
162 | struct platform_data *pdata = dev_get_drvdata(dev); | |
bebe4678 | 163 | |
199e0de7 D |
164 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget); |
165 | } | |
bebe4678 | 166 | |
199e0de7 D |
167 | static ssize_t show_temp(struct device *dev, |
168 | struct device_attribute *devattr, char *buf) | |
bebe4678 | 169 | { |
199e0de7 D |
170 | u32 eax, edx; |
171 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | |
172 | struct platform_data *pdata = dev_get_drvdata(dev); | |
173 | struct temp_data *tdata = pdata->core_data[attr->index]; | |
bebe4678 | 174 | |
199e0de7 | 175 | mutex_lock(&tdata->update_lock); |
bebe4678 | 176 | |
199e0de7 D |
177 | /* Check whether the time interval has elapsed */ |
178 | if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) { | |
179 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); | |
180 | tdata->valid = 0; | |
181 | /* Check whether the data is valid */ | |
bebe4678 | 182 | if (eax & 0x80000000) { |
199e0de7 | 183 | tdata->temp = tdata->tjmax - |
4cc45275 | 184 | ((eax >> 16) & 0x7f) * 1000; |
199e0de7 | 185 | tdata->valid = 1; |
bebe4678 | 186 | } |
199e0de7 | 187 | tdata->last_updated = jiffies; |
bebe4678 RM |
188 | } |
189 | ||
199e0de7 D |
190 | mutex_unlock(&tdata->update_lock); |
191 | return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN; | |
bebe4678 RM |
192 | } |
193 | ||
d6db23c7 JD |
194 | static int __cpuinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, |
195 | struct device *dev) | |
118a8871 RM |
196 | { |
197 | /* The 100C is default for both mobile and non mobile CPUs */ | |
198 | ||
199 | int tjmax = 100000; | |
eccfed42 | 200 | int tjmax_ee = 85000; |
708a62bc | 201 | int usemsr_ee = 1; |
118a8871 RM |
202 | int err; |
203 | u32 eax, edx; | |
1fe63ab4 | 204 | struct pci_dev *host_bridge; |
118a8871 RM |
205 | |
206 | /* Early chips have no MSR for TjMax */ | |
207 | ||
4cc45275 | 208 | if (c->x86_model == 0xf && c->x86_mask < 4) |
708a62bc | 209 | usemsr_ee = 0; |
118a8871 | 210 | |
1fe63ab4 | 211 | /* Atom CPUs */ |
708a62bc | 212 | |
fcc14ac1 JD |
213 | if (c->x86_model == 0x1c || c->x86_model == 0x26 |
214 | || c->x86_model == 0x27) { | |
708a62bc | 215 | usemsr_ee = 0; |
1fe63ab4 YW |
216 | |
217 | host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0)); | |
218 | ||
219 | if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL | |
220 | && (host_bridge->device == 0xa000 /* NM10 based nettop */ | |
221 | || host_bridge->device == 0xa010)) /* NM10 based netbook */ | |
222 | tjmax = 100000; | |
223 | else | |
224 | tjmax = 90000; | |
225 | ||
226 | pci_dev_put(host_bridge); | |
5592906f GR |
227 | } else if (c->x86_model == 0x36) { |
228 | usemsr_ee = 0; | |
229 | tjmax = 100000; | |
708a62bc RM |
230 | } |
231 | ||
4cc45275 | 232 | if (c->x86_model > 0xe && usemsr_ee) { |
eccfed42 | 233 | u8 platform_id; |
118a8871 | 234 | |
4cc45275 GR |
235 | /* |
236 | * Now we can detect the mobile CPU using Intel provided table | |
237 | * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm | |
238 | * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU | |
239 | */ | |
118a8871 RM |
240 | err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx); |
241 | if (err) { | |
242 | dev_warn(dev, | |
243 | "Unable to access MSR 0x17, assuming desktop" | |
244 | " CPU\n"); | |
708a62bc | 245 | usemsr_ee = 0; |
eccfed42 | 246 | } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) { |
4cc45275 GR |
247 | /* |
248 | * Trust bit 28 up to Penryn, I could not find any | |
249 | * documentation on that; if you happen to know | |
250 | * someone at Intel please ask | |
251 | */ | |
708a62bc | 252 | usemsr_ee = 0; |
eccfed42 RM |
253 | } else { |
254 | /* Platform ID bits 52:50 (EDX starts at bit 32) */ | |
255 | platform_id = (edx >> 18) & 0x7; | |
256 | ||
4cc45275 GR |
257 | /* |
258 | * Mobile Penryn CPU seems to be platform ID 7 or 5 | |
259 | * (guesswork) | |
260 | */ | |
261 | if (c->x86_model == 0x17 && | |
262 | (platform_id == 5 || platform_id == 7)) { | |
263 | /* | |
264 | * If MSR EE bit is set, set it to 90 degrees C, | |
265 | * otherwise 105 degrees C | |
266 | */ | |
eccfed42 RM |
267 | tjmax_ee = 90000; |
268 | tjmax = 105000; | |
269 | } | |
118a8871 RM |
270 | } |
271 | } | |
272 | ||
708a62bc | 273 | if (usemsr_ee) { |
118a8871 RM |
274 | err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx); |
275 | if (err) { | |
276 | dev_warn(dev, | |
277 | "Unable to access MSR 0xEE, for Tjmax, left" | |
4d7a5644 | 278 | " at default\n"); |
118a8871 | 279 | } else if (eax & 0x40000000) { |
eccfed42 | 280 | tjmax = tjmax_ee; |
118a8871 | 281 | } |
708a62bc | 282 | } else if (tjmax == 100000) { |
4cc45275 GR |
283 | /* |
284 | * If we don't use msr EE it means we are desktop CPU | |
285 | * (with exeception of Atom) | |
286 | */ | |
118a8871 RM |
287 | dev_warn(dev, "Using relative temperature scale!\n"); |
288 | } | |
289 | ||
290 | return tjmax; | |
291 | } | |
292 | ||
d6db23c7 JD |
293 | static int __cpuinit get_tjmax(struct cpuinfo_x86 *c, u32 id, |
294 | struct device *dev) | |
a321cedb | 295 | { |
a321cedb CE |
296 | int err; |
297 | u32 eax, edx; | |
298 | u32 val; | |
299 | ||
4cc45275 GR |
300 | /* |
301 | * A new feature of current Intel(R) processors, the | |
302 | * IA32_TEMPERATURE_TARGET contains the TjMax value | |
303 | */ | |
a321cedb CE |
304 | err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx); |
305 | if (err) { | |
6bf9e9b0 JD |
306 | if (c->x86_model > 0xe && c->x86_model != 0x1c) |
307 | dev_warn(dev, "Unable to read TjMax from CPU %u\n", id); | |
a321cedb CE |
308 | } else { |
309 | val = (eax >> 16) & 0xff; | |
310 | /* | |
311 | * If the TjMax is not plausible, an assumption | |
312 | * will be used | |
313 | */ | |
bb9973e4 | 314 | if (val) { |
6bf9e9b0 | 315 | dev_dbg(dev, "TjMax is %d degrees C\n", val); |
a321cedb CE |
316 | return val * 1000; |
317 | } | |
318 | } | |
319 | ||
a45a8c85 JD |
320 | if (force_tjmax) { |
321 | dev_notice(dev, "TjMax forced to %d degrees C by user\n", | |
322 | force_tjmax); | |
323 | return force_tjmax * 1000; | |
324 | } | |
325 | ||
a321cedb CE |
326 | /* |
327 | * An assumption is made for early CPUs and unreadable MSR. | |
4f5f71a7 | 328 | * NOTE: the calculated value may not be correct. |
a321cedb | 329 | */ |
4f5f71a7 | 330 | return adjust_tjmax(c, id, dev); |
a321cedb CE |
331 | } |
332 | ||
d6db23c7 JD |
333 | static int __devinit create_name_attr(struct platform_data *pdata, |
334 | struct device *dev) | |
199e0de7 | 335 | { |
4258781a | 336 | sysfs_attr_init(&pdata->name_attr.attr); |
199e0de7 D |
337 | pdata->name_attr.attr.name = "name"; |
338 | pdata->name_attr.attr.mode = S_IRUGO; | |
339 | pdata->name_attr.show = show_name; | |
340 | return device_create_file(dev, &pdata->name_attr); | |
341 | } | |
bebe4678 | 342 | |
d6db23c7 JD |
343 | static int __cpuinit create_core_attrs(struct temp_data *tdata, |
344 | struct device *dev, int attr_no) | |
199e0de7 D |
345 | { |
346 | int err, i; | |
e3204ed3 | 347 | static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev, |
199e0de7 | 348 | struct device_attribute *devattr, char *buf) = { |
c814a4c7 | 349 | show_label, show_crit_alarm, show_temp, show_tjmax, |
f4af6fd6 | 350 | show_ttarget }; |
e3204ed3 | 351 | static const char *const names[TOTAL_ATTRS] = { |
199e0de7 | 352 | "temp%d_label", "temp%d_crit_alarm", |
c814a4c7 | 353 | "temp%d_input", "temp%d_crit", |
f4af6fd6 | 354 | "temp%d_max" }; |
199e0de7 | 355 | |
c814a4c7 | 356 | for (i = 0; i < tdata->attr_size; i++) { |
199e0de7 D |
357 | snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i], |
358 | attr_no); | |
4258781a | 359 | sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr); |
199e0de7 D |
360 | tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i]; |
361 | tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO; | |
362 | tdata->sd_attrs[i].dev_attr.show = rd_ptr[i]; | |
199e0de7 D |
363 | tdata->sd_attrs[i].index = attr_no; |
364 | err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr); | |
365 | if (err) | |
366 | goto exit_free; | |
bebe4678 | 367 | } |
199e0de7 D |
368 | return 0; |
369 | ||
370 | exit_free: | |
371 | while (--i >= 0) | |
372 | device_remove_file(dev, &tdata->sd_attrs[i].dev_attr); | |
373 | return err; | |
374 | } | |
375 | ||
199e0de7 | 376 | |
0eb9782a | 377 | static int __cpuinit chk_ucode_version(unsigned int cpu) |
199e0de7 | 378 | { |
0eb9782a | 379 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
67f363b1 | 380 | |
199e0de7 D |
381 | /* |
382 | * Check if we have problem with errata AE18 of Core processors: | |
383 | * Readings might stop update when processor visited too deep sleep, | |
384 | * fixed for stepping D0 (6EC). | |
385 | */ | |
ca8bc8dc AK |
386 | if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) { |
387 | pr_err("Errata AE18 not fixed, update BIOS or " | |
388 | "microcode of the CPU!\n"); | |
389 | return -ENODEV; | |
67f363b1 | 390 | } |
199e0de7 D |
391 | return 0; |
392 | } | |
393 | ||
d6db23c7 | 394 | static struct platform_device __cpuinit *coretemp_get_pdev(unsigned int cpu) |
199e0de7 D |
395 | { |
396 | u16 phys_proc_id = TO_PHYS_ID(cpu); | |
397 | struct pdev_entry *p; | |
398 | ||
399 | mutex_lock(&pdev_list_mutex); | |
400 | ||
401 | list_for_each_entry(p, &pdev_list, list) | |
402 | if (p->phys_proc_id == phys_proc_id) { | |
403 | mutex_unlock(&pdev_list_mutex); | |
404 | return p->pdev; | |
405 | } | |
406 | ||
407 | mutex_unlock(&pdev_list_mutex); | |
408 | return NULL; | |
409 | } | |
410 | ||
d6db23c7 JD |
411 | static struct temp_data __cpuinit *init_temp_data(unsigned int cpu, |
412 | int pkg_flag) | |
199e0de7 D |
413 | { |
414 | struct temp_data *tdata; | |
415 | ||
416 | tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL); | |
417 | if (!tdata) | |
418 | return NULL; | |
419 | ||
420 | tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS : | |
421 | MSR_IA32_THERM_STATUS; | |
422 | tdata->is_pkg_data = pkg_flag; | |
423 | tdata->cpu = cpu; | |
424 | tdata->cpu_core_id = TO_CORE_ID(cpu); | |
c814a4c7 | 425 | tdata->attr_size = MAX_CORE_ATTRS; |
199e0de7 D |
426 | mutex_init(&tdata->update_lock); |
427 | return tdata; | |
428 | } | |
67f363b1 | 429 | |
d6db23c7 | 430 | static int __cpuinit create_core_data(struct platform_device *pdev, |
199e0de7 D |
431 | unsigned int cpu, int pkg_flag) |
432 | { | |
433 | struct temp_data *tdata; | |
2f1c3db0 | 434 | struct platform_data *pdata = platform_get_drvdata(pdev); |
199e0de7 D |
435 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
436 | u32 eax, edx; | |
437 | int err, attr_no; | |
bebe4678 | 438 | |
a321cedb | 439 | /* |
199e0de7 D |
440 | * Find attr number for sysfs: |
441 | * We map the attr number to core id of the CPU | |
442 | * The attr number is always core id + 2 | |
443 | * The Pkgtemp will always show up as temp1_*, if available | |
a321cedb | 444 | */ |
199e0de7 | 445 | attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu); |
6369a288 | 446 | |
199e0de7 D |
447 | if (attr_no > MAX_CORE_DATA - 1) |
448 | return -ERANGE; | |
449 | ||
f4e0bcf0 GR |
450 | /* |
451 | * Provide a single set of attributes for all HT siblings of a core | |
452 | * to avoid duplicate sensors (the processor ID and core ID of all | |
6777b9e4 GR |
453 | * HT siblings of a core are the same). |
454 | * Skip if a HT sibling of this core is already registered. | |
f4e0bcf0 GR |
455 | * This is not an error. |
456 | */ | |
199e0de7 D |
457 | if (pdata->core_data[attr_no] != NULL) |
458 | return 0; | |
6369a288 | 459 | |
199e0de7 D |
460 | tdata = init_temp_data(cpu, pkg_flag); |
461 | if (!tdata) | |
462 | return -ENOMEM; | |
bebe4678 | 463 | |
199e0de7 D |
464 | /* Test if we can access the status register */ |
465 | err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx); | |
466 | if (err) | |
467 | goto exit_free; | |
468 | ||
469 | /* We can access status register. Get Critical Temperature */ | |
6bf9e9b0 | 470 | tdata->tjmax = get_tjmax(c, cpu, &pdev->dev); |
199e0de7 | 471 | |
c814a4c7 | 472 | /* |
f4af6fd6 GR |
473 | * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET. |
474 | * The target temperature is available on older CPUs but not in this | |
475 | * register. Atoms don't have the register at all. | |
c814a4c7 | 476 | */ |
f4af6fd6 GR |
477 | if (c->x86_model > 0xe && c->x86_model != 0x1c) { |
478 | err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, | |
479 | &eax, &edx); | |
480 | if (!err) { | |
481 | tdata->ttarget | |
482 | = tdata->tjmax - ((eax >> 8) & 0xff) * 1000; | |
483 | tdata->attr_size++; | |
484 | } | |
c814a4c7 D |
485 | } |
486 | ||
199e0de7 D |
487 | pdata->core_data[attr_no] = tdata; |
488 | ||
489 | /* Create sysfs interfaces */ | |
490 | err = create_core_attrs(tdata, &pdev->dev, attr_no); | |
491 | if (err) | |
492 | goto exit_free; | |
bebe4678 RM |
493 | |
494 | return 0; | |
199e0de7 | 495 | exit_free: |
20ecb499 | 496 | pdata->core_data[attr_no] = NULL; |
199e0de7 D |
497 | kfree(tdata); |
498 | return err; | |
499 | } | |
500 | ||
d6db23c7 | 501 | static void __cpuinit coretemp_add_core(unsigned int cpu, int pkg_flag) |
199e0de7 | 502 | { |
199e0de7 D |
503 | struct platform_device *pdev = coretemp_get_pdev(cpu); |
504 | int err; | |
505 | ||
506 | if (!pdev) | |
507 | return; | |
508 | ||
2f1c3db0 | 509 | err = create_core_data(pdev, cpu, pkg_flag); |
199e0de7 D |
510 | if (err) |
511 | dev_err(&pdev->dev, "Adding Core %u failed\n", cpu); | |
512 | } | |
513 | ||
514 | static void coretemp_remove_core(struct platform_data *pdata, | |
515 | struct device *dev, int indx) | |
516 | { | |
517 | int i; | |
518 | struct temp_data *tdata = pdata->core_data[indx]; | |
519 | ||
520 | /* Remove the sysfs attributes */ | |
c814a4c7 | 521 | for (i = 0; i < tdata->attr_size; i++) |
199e0de7 D |
522 | device_remove_file(dev, &tdata->sd_attrs[i].dev_attr); |
523 | ||
524 | kfree(pdata->core_data[indx]); | |
525 | pdata->core_data[indx] = NULL; | |
526 | } | |
527 | ||
528 | static int __devinit coretemp_probe(struct platform_device *pdev) | |
529 | { | |
530 | struct platform_data *pdata; | |
531 | int err; | |
bebe4678 | 532 | |
199e0de7 D |
533 | /* Initialize the per-package data structures */ |
534 | pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL); | |
535 | if (!pdata) | |
536 | return -ENOMEM; | |
537 | ||
538 | err = create_name_attr(pdata, &pdev->dev); | |
539 | if (err) | |
540 | goto exit_free; | |
541 | ||
b3a242a6 | 542 | pdata->phys_proc_id = pdev->id; |
199e0de7 D |
543 | platform_set_drvdata(pdev, pdata); |
544 | ||
545 | pdata->hwmon_dev = hwmon_device_register(&pdev->dev); | |
546 | if (IS_ERR(pdata->hwmon_dev)) { | |
547 | err = PTR_ERR(pdata->hwmon_dev); | |
548 | dev_err(&pdev->dev, "Class registration failed (%d)\n", err); | |
549 | goto exit_name; | |
550 | } | |
551 | return 0; | |
552 | ||
553 | exit_name: | |
554 | device_remove_file(&pdev->dev, &pdata->name_attr); | |
555 | platform_set_drvdata(pdev, NULL); | |
bebe4678 | 556 | exit_free: |
199e0de7 | 557 | kfree(pdata); |
bebe4678 RM |
558 | return err; |
559 | } | |
560 | ||
561 | static int __devexit coretemp_remove(struct platform_device *pdev) | |
562 | { | |
199e0de7 D |
563 | struct platform_data *pdata = platform_get_drvdata(pdev); |
564 | int i; | |
bebe4678 | 565 | |
199e0de7 D |
566 | for (i = MAX_CORE_DATA - 1; i >= 0; --i) |
567 | if (pdata->core_data[i]) | |
568 | coretemp_remove_core(pdata, &pdev->dev, i); | |
569 | ||
570 | device_remove_file(&pdev->dev, &pdata->name_attr); | |
571 | hwmon_device_unregister(pdata->hwmon_dev); | |
bebe4678 | 572 | platform_set_drvdata(pdev, NULL); |
199e0de7 | 573 | kfree(pdata); |
bebe4678 RM |
574 | return 0; |
575 | } | |
576 | ||
577 | static struct platform_driver coretemp_driver = { | |
578 | .driver = { | |
579 | .owner = THIS_MODULE, | |
580 | .name = DRVNAME, | |
581 | }, | |
582 | .probe = coretemp_probe, | |
583 | .remove = __devexit_p(coretemp_remove), | |
584 | }; | |
585 | ||
bebe4678 RM |
586 | static int __cpuinit coretemp_device_add(unsigned int cpu) |
587 | { | |
588 | int err; | |
589 | struct platform_device *pdev; | |
590 | struct pdev_entry *pdev_entry; | |
d883b9f0 JD |
591 | |
592 | mutex_lock(&pdev_list_mutex); | |
593 | ||
b3a242a6 | 594 | pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu)); |
bebe4678 RM |
595 | if (!pdev) { |
596 | err = -ENOMEM; | |
f8bb8925 | 597 | pr_err("Device allocation failed\n"); |
bebe4678 RM |
598 | goto exit; |
599 | } | |
600 | ||
601 | pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL); | |
602 | if (!pdev_entry) { | |
603 | err = -ENOMEM; | |
604 | goto exit_device_put; | |
605 | } | |
606 | ||
607 | err = platform_device_add(pdev); | |
608 | if (err) { | |
f8bb8925 | 609 | pr_err("Device addition failed (%d)\n", err); |
bebe4678 RM |
610 | goto exit_device_free; |
611 | } | |
612 | ||
613 | pdev_entry->pdev = pdev; | |
0eb9782a | 614 | pdev_entry->phys_proc_id = pdev->id; |
199e0de7 | 615 | |
bebe4678 RM |
616 | list_add_tail(&pdev_entry->list, &pdev_list); |
617 | mutex_unlock(&pdev_list_mutex); | |
618 | ||
619 | return 0; | |
620 | ||
621 | exit_device_free: | |
622 | kfree(pdev_entry); | |
623 | exit_device_put: | |
624 | platform_device_put(pdev); | |
625 | exit: | |
d883b9f0 | 626 | mutex_unlock(&pdev_list_mutex); |
bebe4678 RM |
627 | return err; |
628 | } | |
629 | ||
d6db23c7 | 630 | static void __cpuinit coretemp_device_remove(unsigned int cpu) |
bebe4678 | 631 | { |
199e0de7 D |
632 | struct pdev_entry *p, *n; |
633 | u16 phys_proc_id = TO_PHYS_ID(cpu); | |
e40cc4bd | 634 | |
bebe4678 | 635 | mutex_lock(&pdev_list_mutex); |
199e0de7 D |
636 | list_for_each_entry_safe(p, n, &pdev_list, list) { |
637 | if (p->phys_proc_id != phys_proc_id) | |
e40cc4bd | 638 | continue; |
e40cc4bd JB |
639 | platform_device_unregister(p->pdev); |
640 | list_del(&p->list); | |
e40cc4bd | 641 | kfree(p); |
bebe4678 RM |
642 | } |
643 | mutex_unlock(&pdev_list_mutex); | |
644 | } | |
645 | ||
d6db23c7 | 646 | static bool __cpuinit is_any_core_online(struct platform_data *pdata) |
199e0de7 D |
647 | { |
648 | int i; | |
649 | ||
650 | /* Find online cores, except pkgtemp data */ | |
651 | for (i = MAX_CORE_DATA - 1; i >= 0; --i) { | |
652 | if (pdata->core_data[i] && | |
653 | !pdata->core_data[i]->is_pkg_data) { | |
654 | return true; | |
655 | } | |
656 | } | |
657 | return false; | |
658 | } | |
659 | ||
660 | static void __cpuinit get_core_online(unsigned int cpu) | |
661 | { | |
662 | struct cpuinfo_x86 *c = &cpu_data(cpu); | |
663 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
664 | int err; | |
665 | ||
666 | /* | |
667 | * CPUID.06H.EAX[0] indicates whether the CPU has thermal | |
668 | * sensors. We check this bit only, all the early CPUs | |
669 | * without thermal sensors will be filtered out. | |
670 | */ | |
671 | if (!cpu_has(c, X86_FEATURE_DTS)) | |
672 | return; | |
673 | ||
674 | if (!pdev) { | |
0eb9782a JD |
675 | /* Check the microcode version of the CPU */ |
676 | if (chk_ucode_version(cpu)) | |
677 | return; | |
678 | ||
199e0de7 D |
679 | /* |
680 | * Alright, we have DTS support. | |
681 | * We are bringing the _first_ core in this pkg | |
682 | * online. So, initialize per-pkg data structures and | |
683 | * then bring this core online. | |
684 | */ | |
685 | err = coretemp_device_add(cpu); | |
686 | if (err) | |
687 | return; | |
688 | /* | |
689 | * Check whether pkgtemp support is available. | |
690 | * If so, add interfaces for pkgtemp. | |
691 | */ | |
692 | if (cpu_has(c, X86_FEATURE_PTS)) | |
693 | coretemp_add_core(cpu, 1); | |
694 | } | |
695 | /* | |
696 | * Physical CPU device already exists. | |
697 | * So, just add interfaces for this core. | |
698 | */ | |
699 | coretemp_add_core(cpu, 0); | |
700 | } | |
701 | ||
702 | static void __cpuinit put_core_offline(unsigned int cpu) | |
703 | { | |
704 | int i, indx; | |
705 | struct platform_data *pdata; | |
706 | struct platform_device *pdev = coretemp_get_pdev(cpu); | |
707 | ||
708 | /* If the physical CPU device does not exist, just return */ | |
709 | if (!pdev) | |
710 | return; | |
711 | ||
712 | pdata = platform_get_drvdata(pdev); | |
713 | ||
714 | indx = TO_ATTR_NO(cpu); | |
715 | ||
b7048711 KS |
716 | /* The core id is too big, just return */ |
717 | if (indx > MAX_CORE_DATA - 1) | |
718 | return; | |
719 | ||
199e0de7 D |
720 | if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu) |
721 | coretemp_remove_core(pdata, &pdev->dev, indx); | |
722 | ||
f4e0bcf0 | 723 | /* |
6777b9e4 GR |
724 | * If a HT sibling of a core is taken offline, but another HT sibling |
725 | * of the same core is still online, register the alternate sibling. | |
726 | * This ensures that exactly one set of attributes is provided as long | |
727 | * as at least one HT sibling of a core is online. | |
f4e0bcf0 | 728 | */ |
bb74e8ca | 729 | for_each_sibling(i, cpu) { |
199e0de7 D |
730 | if (i != cpu) { |
731 | get_core_online(i); | |
f4e0bcf0 GR |
732 | /* |
733 | * Display temperature sensor data for one HT sibling | |
734 | * per core only, so abort the loop after one such | |
735 | * sibling has been found. | |
736 | */ | |
199e0de7 D |
737 | break; |
738 | } | |
739 | } | |
740 | /* | |
741 | * If all cores in this pkg are offline, remove the device. | |
742 | * coretemp_device_remove calls unregister_platform_device, | |
743 | * which in turn calls coretemp_remove. This removes the | |
744 | * pkgtemp entry and does other clean ups. | |
745 | */ | |
746 | if (!is_any_core_online(pdata)) | |
747 | coretemp_device_remove(cpu); | |
748 | } | |
749 | ||
ba7c1927 | 750 | static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb, |
bebe4678 RM |
751 | unsigned long action, void *hcpu) |
752 | { | |
753 | unsigned int cpu = (unsigned long) hcpu; | |
754 | ||
755 | switch (action) { | |
756 | case CPU_ONLINE: | |
561d9a96 | 757 | case CPU_DOWN_FAILED: |
199e0de7 | 758 | get_core_online(cpu); |
bebe4678 | 759 | break; |
561d9a96 | 760 | case CPU_DOWN_PREPARE: |
199e0de7 | 761 | put_core_offline(cpu); |
bebe4678 RM |
762 | break; |
763 | } | |
764 | return NOTIFY_OK; | |
765 | } | |
766 | ||
ba7c1927 | 767 | static struct notifier_block coretemp_cpu_notifier __refdata = { |
bebe4678 RM |
768 | .notifier_call = coretemp_cpu_callback, |
769 | }; | |
bebe4678 | 770 | |
9b38096f AK |
771 | static const struct x86_cpu_id coretemp_ids[] = { |
772 | { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTS }, | |
773 | {} | |
774 | }; | |
775 | MODULE_DEVICE_TABLE(x86cpu, coretemp_ids); | |
776 | ||
bebe4678 RM |
777 | static int __init coretemp_init(void) |
778 | { | |
779 | int i, err = -ENODEV; | |
bebe4678 | 780 | |
9b38096f AK |
781 | /* |
782 | * CPUID.06H.EAX[0] indicates whether the CPU has thermal | |
783 | * sensors. We check this bit only, all the early CPUs | |
784 | * without thermal sensors will be filtered out. | |
785 | */ | |
786 | if (!x86_match_cpu(coretemp_ids)) | |
787 | return -ENODEV; | |
bebe4678 RM |
788 | |
789 | err = platform_driver_register(&coretemp_driver); | |
790 | if (err) | |
791 | goto exit; | |
792 | ||
a4659053 | 793 | for_each_online_cpu(i) |
199e0de7 | 794 | get_core_online(i); |
89a3fd35 JB |
795 | |
796 | #ifndef CONFIG_HOTPLUG_CPU | |
bebe4678 RM |
797 | if (list_empty(&pdev_list)) { |
798 | err = -ENODEV; | |
799 | goto exit_driver_unreg; | |
800 | } | |
89a3fd35 | 801 | #endif |
bebe4678 | 802 | |
bebe4678 | 803 | register_hotcpu_notifier(&coretemp_cpu_notifier); |
bebe4678 RM |
804 | return 0; |
805 | ||
0dca94ba | 806 | #ifndef CONFIG_HOTPLUG_CPU |
89a3fd35 | 807 | exit_driver_unreg: |
bebe4678 | 808 | platform_driver_unregister(&coretemp_driver); |
0dca94ba | 809 | #endif |
bebe4678 RM |
810 | exit: |
811 | return err; | |
812 | } | |
813 | ||
814 | static void __exit coretemp_exit(void) | |
815 | { | |
816 | struct pdev_entry *p, *n; | |
17c10d61 | 817 | |
bebe4678 | 818 | unregister_hotcpu_notifier(&coretemp_cpu_notifier); |
bebe4678 RM |
819 | mutex_lock(&pdev_list_mutex); |
820 | list_for_each_entry_safe(p, n, &pdev_list, list) { | |
821 | platform_device_unregister(p->pdev); | |
822 | list_del(&p->list); | |
823 | kfree(p); | |
824 | } | |
825 | mutex_unlock(&pdev_list_mutex); | |
826 | platform_driver_unregister(&coretemp_driver); | |
827 | } | |
828 | ||
829 | MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>"); | |
830 | MODULE_DESCRIPTION("Intel Core temperature monitor"); | |
831 | MODULE_LICENSE("GPL"); | |
832 | ||
833 | module_init(coretemp_init) | |
834 | module_exit(coretemp_exit) |