[linux-block.git] / drivers / hwmon / axi-fan-control.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Fan Control HDL CORE driver
 *
 * Copyright 2019 Analog Devices Inc.
 */
#include <linux/bits.h>
#include <linux/clk.h>
#include <linux/fpga/adi-axi-common.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>

/* register map */
#define ADI_REG_RSTN		0x0080
#define ADI_REG_PWM_WIDTH	0x0084
#define ADI_REG_TACH_PERIOD	0x0088
#define ADI_REG_TACH_TOLERANCE	0x008c
#define ADI_REG_PWM_PERIOD	0x00c0
#define ADI_REG_TACH_MEASUR	0x00c4
#define ADI_REG_TEMPERATURE	0x00c8
#define ADI_REG_TEMP_00_H	0x0100
#define ADI_REG_TEMP_25_L	0x0104
#define ADI_REG_TEMP_25_H	0x0108
#define ADI_REG_TEMP_50_L	0x010c
#define ADI_REG_TEMP_50_H	0x0110
#define ADI_REG_TEMP_75_L	0x0114
#define ADI_REG_TEMP_75_H	0x0118
#define ADI_REG_TEMP_100_L	0x011c

#define ADI_REG_IRQ_MASK	0x0040
#define ADI_REG_IRQ_PENDING	0x0044
#define ADI_REG_IRQ_SRC		0x0048

/* IRQ sources */
#define ADI_IRQ_SRC_PWM_CHANGED		BIT(0)
#define ADI_IRQ_SRC_TACH_ERR		BIT(1)
#define ADI_IRQ_SRC_TEMP_INCREASE	BIT(2)
#define ADI_IRQ_SRC_NEW_MEASUR		BIT(3)
#define ADI_IRQ_SRC_MASK		GENMASK(3, 0)
#define ADI_IRQ_MASK_OUT_ALL		0xFFFFFFFFU

#define SYSFS_PWM_MAX			255

struct axi_fan_control_data {
	void __iomem *base;
	struct device *hdev;
	unsigned long clk_rate;
	int irq;
	/* pulses per revolution */
	u32 ppr;
	bool hw_pwm_req;
	bool update_tacho_params;
	u8 fan_fault;
};

static inline void axi_iowrite(const u32 val, const u32 reg,
			       const struct axi_fan_control_data *ctl)
{
	iowrite32(val, ctl->base + reg);
}

static inline u32 axi_ioread(const u32 reg,
			     const struct axi_fan_control_data *ctl)
{
	return ioread32(ctl->base + reg);
}

/*
 * The core calculates the temperature as:
 *	T = /raw * 509.3140064 / 65535) - 280.2308787
 */
static ssize_t axi_fan_control_show(struct device *dev, struct device_attribute *da, char *buf)
{
	struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
	u32 temp = axi_ioread(attr->index, ctl);

	temp = DIV_ROUND_CLOSEST_ULL(temp * 509314ULL, 65535) - 280230;

	return sprintf(buf, "%u\n", temp);
}

static ssize_t axi_fan_control_store(struct device *dev, struct device_attribute *da,
				     const char *buf, size_t count)
{
	struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
	u32 temp;
	int ret;

	ret = kstrtou32(buf, 10, &temp);
	if (ret)
		return ret;

	temp = DIV_ROUND_CLOSEST_ULL((temp + 280230) * 65535ULL, 509314);
	axi_iowrite(temp, attr->index, ctl);

	return count;
}

static long axi_fan_control_get_pwm_duty(const struct axi_fan_control_data *ctl)
{
	u32 pwm_width = axi_ioread(ADI_REG_PWM_WIDTH, ctl);
	u32 pwm_period = axi_ioread(ADI_REG_PWM_PERIOD, ctl);
	/*
	 * PWM_PERIOD is a RO register set by the core. It should never be 0.
	 * For now we are trusting the HW...
	 */
	return DIV_ROUND_CLOSEST(pwm_width * SYSFS_PWM_MAX, pwm_period);
}

static int axi_fan_control_set_pwm_duty(const long val,
					struct axi_fan_control_data *ctl)
{
	u32 pwm_period = axi_ioread(ADI_REG_PWM_PERIOD, ctl);
	u32 new_width;
	long __val = clamp_val(val, 0, SYSFS_PWM_MAX);

	new_width = DIV_ROUND_CLOSEST(__val * pwm_period, SYSFS_PWM_MAX);

	axi_iowrite(new_width, ADI_REG_PWM_WIDTH, ctl);

	return 0;
}

static long axi_fan_control_get_fan_rpm(const struct axi_fan_control_data *ctl)
{
	const u32 tach = axi_ioread(ADI_REG_TACH_MEASUR, ctl);

	if (tach == 0)
		/* should we return error, EAGAIN maybe? */
		return 0;
	/*
	 * The tacho period should be:
	 *      TACH = 60/(ppr * rpm), where rpm is revolutions per second
	 *      and ppr is pulses per revolution.
	 * Given the tacho period, we can multiply it by the input clock
	 * so that we know how many clocks we need to have this period.
	 * From this, we can derive the RPM value.
	 */
	return DIV_ROUND_CLOSEST(60 * ctl->clk_rate, ctl->ppr * tach);
}

static int axi_fan_control_read_temp(struct device *dev, u32 attr, long *val)
{
	struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
	long raw_temp;

	switch (attr) {
	case hwmon_temp_input:
		raw_temp = axi_ioread(ADI_REG_TEMPERATURE, ctl);
		/*
		 * The formula for the temperature is:
		 *      T = (ADC * 501.3743 / 2^bits) - 273.6777
		 * It's multiplied by 1000 to have millidegrees as
		 * specified by the hwmon sysfs interface.
		 */
		*val = ((raw_temp * 501374) >> 16) - 273677;
		return 0;
	default:
		return -ENOTSUPP;
	}
}

static int axi_fan_control_read_fan(struct device *dev, u32 attr, long *val)
{
	struct axi_fan_control_data *ctl = dev_get_drvdata(dev);

	switch (attr) {
	case hwmon_fan_fault:
		*val = ctl->fan_fault;
		/* clear it now */
		ctl->fan_fault = 0;
		return 0;
	case hwmon_fan_input:
		*val = axi_fan_control_get_fan_rpm(ctl);
		return 0;
	default:
		return -ENOTSUPP;
	}
}

static int axi_fan_control_read_pwm(struct device *dev, u32 attr, long *val)
{
	struct axi_fan_control_data *ctl = dev_get_drvdata(dev);

	switch (attr) {
	case hwmon_pwm_input:
		*val = axi_fan_control_get_pwm_duty(ctl);
		return 0;
	default:
		return -ENOTSUPP;
	}
}

static int axi_fan_control_write_pwm(struct device *dev, u32 attr, long val)
{
	struct axi_fan_control_data *ctl = dev_get_drvdata(dev);

	switch (attr) {
	case hwmon_pwm_input:
		return axi_fan_control_set_pwm_duty(val, ctl);
	default:
		return -ENOTSUPP;
	}
}

static int axi_fan_control_read_labels(struct device *dev,
				       enum hwmon_sensor_types type,
				       u32 attr, int channel, const char **str)
{
	switch (type) {
	case hwmon_fan:
		*str = "FAN";
		return 0;
	case hwmon_temp:
		*str = "SYSMON4";
		return 0;
	default:
		return -ENOTSUPP;
	}
}

static int axi_fan_control_read(struct device *dev,
				enum hwmon_sensor_types type,
				u32 attr, int channel, long *val)
{
	switch (type) {
	case hwmon_fan:
		return axi_fan_control_read_fan(dev, attr, val);
	case hwmon_pwm:
		return axi_fan_control_read_pwm(dev, attr, val);
	case hwmon_temp:
		return axi_fan_control_read_temp(dev, attr, val);
	default:
		return -ENOTSUPP;
	}
}

static int axi_fan_control_write(struct device *dev,
				 enum hwmon_sensor_types type,
				 u32 attr, int channel, long val)
{
	switch (type) {
	case hwmon_pwm:
		return axi_fan_control_write_pwm(dev, attr, val);
	default:
		return -ENOTSUPP;
	}
}

static umode_t axi_fan_control_fan_is_visible(const u32 attr)
{
	switch (attr) {
	case hwmon_fan_input:
	case hwmon_fan_fault:
	case hwmon_fan_label:
		return 0444;
	default:
		return 0;
	}
}

static umode_t axi_fan_control_pwm_is_visible(const u32 attr)
{
	switch (attr) {
	case hwmon_pwm_input:
		return 0644;
	default:
		return 0;
	}
}

static umode_t axi_fan_control_temp_is_visible(const u32 attr)
{
	switch (attr) {
	case hwmon_temp_input:
	case hwmon_temp_label:
		return 0444;
	default:
		return 0;
	}
}

static umode_t axi_fan_control_is_visible(const void *data,
					  enum hwmon_sensor_types type,
					  u32 attr, int channel)
{
	switch (type) {
	case hwmon_fan:
		return axi_fan_control_fan_is_visible(attr);
	case hwmon_pwm:
		return axi_fan_control_pwm_is_visible(attr);
	case hwmon_temp:
		return axi_fan_control_temp_is_visible(attr);
	default:
		return 0;
	}
}

/*
 * This core has two main ways of changing the PWM duty cycle. It is done,
 * either by a request from userspace (writing on pwm1_input) or by the
 * core itself. When the change is done by the core, it will use predefined
 * parameters to evaluate the tach signal and, on that case we cannot set them.
 * On the other hand, when the request is done by the user, with some arbitrary
 * value that the core does not now about, we have to provide the tach
 * parameters so that, the core can evaluate the signal. On the IRQ handler we
 * distinguish this by using the ADI_IRQ_SRC_TEMP_INCREASE interrupt. This tell
 * us that the CORE requested a new duty cycle. After this, there is 5s delay
 * on which the core waits for the fan rotation speed to stabilize. After this
 * we get ADI_IRQ_SRC_PWM_CHANGED irq where we will decide if we need to set
 * the tach parameters or not on the next tach measurement cycle (corresponding
 * already to the ney duty cycle) based on the %ctl->hw_pwm_req flag.
 */
static irqreturn_t axi_fan_control_irq_handler(int irq, void *data)
{
	struct axi_fan_control_data *ctl = (struct axi_fan_control_data *)data;
	u32 irq_pending = axi_ioread(ADI_REG_IRQ_PENDING, ctl);
	u32 clear_mask;

	if (irq_pending & ADI_IRQ_SRC_TEMP_INCREASE)
		/* hardware requested a new pwm */
		ctl->hw_pwm_req = true;

	if (irq_pending & ADI_IRQ_SRC_PWM_CHANGED) {
		/*
		 * if the pwm changes on behalf of software,
		 * we need to provide new tacho parameters to the core.
		 * Wait for the next measurement for that...
		 */
		if (!ctl->hw_pwm_req) {
			ctl->update_tacho_params = true;
		} else {
			ctl->hw_pwm_req = false;
			sysfs_notify(&ctl->hdev->kobj, NULL, "pwm1");
		}
	}

	if (irq_pending & ADI_IRQ_SRC_NEW_MEASUR) {
		if (ctl->update_tacho_params) {
			u32 new_tach = axi_ioread(ADI_REG_TACH_MEASUR, ctl);
			/* get 25% tolerance */
			u32 tach_tol = DIV_ROUND_CLOSEST(new_tach * 25, 100);

			/* set new tacho parameters */
			axi_iowrite(new_tach, ADI_REG_TACH_PERIOD, ctl);
			axi_iowrite(tach_tol, ADI_REG_TACH_TOLERANCE, ctl);
			ctl->update_tacho_params = false;
		}
	}

	if (irq_pending & ADI_IRQ_SRC_TACH_ERR)
		ctl->fan_fault = 1;

	/* clear all interrupts */
	clear_mask = irq_pending & ADI_IRQ_SRC_MASK;
	axi_iowrite(clear_mask, ADI_REG_IRQ_PENDING, ctl);

	return IRQ_HANDLED;
}

static int axi_fan_control_init(struct axi_fan_control_data *ctl,
				const struct device_node *np)
{
	int ret;

	/* get fan pulses per revolution */
	ret = of_property_read_u32(np, "pulses-per-revolution", &ctl->ppr);
	if (ret)
		return ret;

	/* 1, 2 and 4 are the typical and accepted values */
	if (ctl->ppr != 1 && ctl->ppr != 2 && ctl->ppr != 4)
		return -EINVAL;
	/*
	 * Enable all IRQs
	 */
	axi_iowrite(ADI_IRQ_MASK_OUT_ALL &
		    ~(ADI_IRQ_SRC_NEW_MEASUR | ADI_IRQ_SRC_TACH_ERR |
		      ADI_IRQ_SRC_PWM_CHANGED | ADI_IRQ_SRC_TEMP_INCREASE),
		    ADI_REG_IRQ_MASK, ctl);

	/* bring the device out of reset */
	axi_iowrite(0x01, ADI_REG_RSTN, ctl);

	return ret;
}

static void axi_fan_control_clk_disable(void *clk)
{
	clk_disable_unprepare(clk);
}

static const struct hwmon_channel_info *axi_fan_control_info[] = {
	HWMON_CHANNEL_INFO(pwm, HWMON_PWM_INPUT),
	HWMON_CHANNEL_INFO(fan, HWMON_F_INPUT | HWMON_F_FAULT | HWMON_F_LABEL),
	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_LABEL),
	NULL
};

static const struct hwmon_ops axi_fan_control_hwmon_ops = {
	.is_visible = axi_fan_control_is_visible,
	.read = axi_fan_control_read,
	.write = axi_fan_control_write,
	.read_string = axi_fan_control_read_labels,
};

static const struct hwmon_chip_info axi_chip_info = {
	.ops = &axi_fan_control_hwmon_ops,
	.info = axi_fan_control_info,
};

/* temperature threshold below which PWM should be 0% */
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point1_temp_hyst, axi_fan_control, ADI_REG_TEMP_00_H);
/* temperature threshold above which PWM should be 25% */
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point1_temp, axi_fan_control, ADI_REG_TEMP_25_L);
/* temperature threshold below which PWM should be 25% */
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point2_temp_hyst, axi_fan_control, ADI_REG_TEMP_25_H);
/* temperature threshold above which PWM should be 50% */
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point2_temp, axi_fan_control, ADI_REG_TEMP_50_L);
/* temperature threshold below which PWM should be 50% */
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point3_temp_hyst, axi_fan_control, ADI_REG_TEMP_50_H);
/* temperature threshold above which PWM should be 75% */
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point3_temp, axi_fan_control, ADI_REG_TEMP_75_L);
/* temperature threshold below which PWM should be 75% */
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point4_temp_hyst, axi_fan_control, ADI_REG_TEMP_75_H);
/* temperature threshold above which PWM should be 100% */
static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point4_temp, axi_fan_control, ADI_REG_TEMP_100_L);

static struct attribute *axi_fan_control_attrs[] = {
	&sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
	&sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
	&sensor_dev_attr_pwm1_auto_point2_temp_hyst.dev_attr.attr,
	&sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
	&sensor_dev_attr_pwm1_auto_point3_temp_hyst.dev_attr.attr,
	&sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
	&sensor_dev_attr_pwm1_auto_point4_temp_hyst.dev_attr.attr,
	&sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
	NULL,
};
ATTRIBUTE_GROUPS(axi_fan_control);

static const u32 version_1_0_0 = ADI_AXI_PCORE_VER(1, 0, 'a');

static const struct of_device_id axi_fan_control_of_match[] = {
	{ .compatible = "adi,axi-fan-control-1.00.a",
		.data = (void *)&version_1_0_0},
	{},
};
MODULE_DEVICE_TABLE(of, axi_fan_control_of_match);

static int axi_fan_control_probe(struct platform_device *pdev)
{
	struct axi_fan_control_data *ctl;
	struct clk *clk;
	const struct of_device_id *id;
	const char *name = "axi_fan_control";
	u32 version;
	int ret;

	id = of_match_node(axi_fan_control_of_match, pdev->dev.of_node);
	if (!id)
		return -EINVAL;

	ctl = devm_kzalloc(&pdev->dev, sizeof(*ctl), GFP_KERNEL);
	if (!ctl)
		return -ENOMEM;

	ctl->base = devm_platform_ioremap_resource(pdev, 0);
	if (IS_ERR(ctl->base))
		return PTR_ERR(ctl->base);

	clk = devm_clk_get(&pdev->dev, NULL);
	if (IS_ERR(clk)) {
		dev_err(&pdev->dev, "clk_get failed with %ld\n", PTR_ERR(clk));
		return PTR_ERR(clk);
	}

	ret = clk_prepare_enable(clk);
	if (ret)
		return ret;

	ret = devm_add_action_or_reset(&pdev->dev, axi_fan_control_clk_disable, clk);
	if (ret)
		return ret;

	ctl->clk_rate = clk_get_rate(clk);
	if (!ctl->clk_rate)
		return -EINVAL;

	version = axi_ioread(ADI_AXI_REG_VERSION, ctl);
	if (ADI_AXI_PCORE_VER_MAJOR(version) !=
	    ADI_AXI_PCORE_VER_MAJOR((*(u32 *)id->data))) {
		dev_err(&pdev->dev, "Major version mismatch. Expected %d.%.2d.%c, Reported %d.%.2d.%c\n",
			ADI_AXI_PCORE_VER_MAJOR((*(u32 *)id->data)),
			ADI_AXI_PCORE_VER_MINOR((*(u32 *)id->data)),
			ADI_AXI_PCORE_VER_PATCH((*(u32 *)id->data)),
			ADI_AXI_PCORE_VER_MAJOR(version),
			ADI_AXI_PCORE_VER_MINOR(version),
			ADI_AXI_PCORE_VER_PATCH(version));
		return -ENODEV;
	}

	ctl->irq = platform_get_irq(pdev, 0);
	if (ctl->irq < 0)
		return ctl->irq;

	ret = devm_request_threaded_irq(&pdev->dev, ctl->irq, NULL,
					axi_fan_control_irq_handler,
					IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
					pdev->driver_override, ctl);
	if (ret) {
		dev_err(&pdev->dev, "failed to request an irq, %d", ret);
		return ret;
	}

	ret = axi_fan_control_init(ctl, pdev->dev.of_node);
	if (ret) {
		dev_err(&pdev->dev, "Failed to initialize device\n");
		return ret;
	}

	ctl->hdev = devm_hwmon_device_register_with_info(&pdev->dev,
							 name,
							 ctl,
							 &axi_chip_info,
							 axi_fan_control_groups);

	return PTR_ERR_OR_ZERO(ctl->hdev);
}

static struct platform_driver axi_fan_control_driver = {
	.driver = {
		.name = "axi_fan_control_driver",
		.of_match_table = axi_fan_control_of_match,
	},
	.probe = axi_fan_control_probe,
};
module_platform_driver(axi_fan_control_driver);

MODULE_AUTHOR("Nuno Sa <nuno.sa@analog.com>");
MODULE_DESCRIPTION("Analog Devices Fan Control HDL CORE driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
8412b410 NS	1	// SPDX-License-Identifier: GPL-2.0
	2	/*
	3	* Fan Control HDL CORE driver
	4	*
	5	* Copyright 2019 Analog Devices Inc.
	6	*/
	7	#include <linux/bits.h>
	8	#include <linux/clk.h>
	9	#include <linux/fpga/adi-axi-common.h>
	10	#include <linux/hwmon.h>
2aee7e67	11	#include <linux/hwmon-sysfs.h>
8412b410 NS	12	#include <linux/interrupt.h>
	13	#include <linux/io.h>
	14	#include <linux/kernel.h>
	15	#include <linux/module.h>
	16	#include <linux/of.h>
	17	#include <linux/platform_device.h>
	18
8412b410 NS	19	/* register map */
	20	#define ADI_REG_RSTN 0x0080
	21	#define ADI_REG_PWM_WIDTH 0x0084
	22	#define ADI_REG_TACH_PERIOD 0x0088
	23	#define ADI_REG_TACH_TOLERANCE 0x008c
	24	#define ADI_REG_PWM_PERIOD 0x00c0
	25	#define ADI_REG_TACH_MEASUR 0x00c4
	26	#define ADI_REG_TEMPERATURE 0x00c8
2aee7e67 NS	27	#define ADI_REG_TEMP_00_H 0x0100
	28	#define ADI_REG_TEMP_25_L 0x0104
	29	#define ADI_REG_TEMP_25_H 0x0108
	30	#define ADI_REG_TEMP_50_L 0x010c
	31	#define ADI_REG_TEMP_50_H 0x0110
	32	#define ADI_REG_TEMP_75_L 0x0114
	33	#define ADI_REG_TEMP_75_H 0x0118
	34	#define ADI_REG_TEMP_100_L 0x011c
8412b410 NS	35
	36	#define ADI_REG_IRQ_MASK 0x0040
	37	#define ADI_REG_IRQ_PENDING 0x0044
	38	#define ADI_REG_IRQ_SRC 0x0048
	39
	40	/* IRQ sources */
	41	#define ADI_IRQ_SRC_PWM_CHANGED BIT(0)
	42	#define ADI_IRQ_SRC_TACH_ERR BIT(1)
	43	#define ADI_IRQ_SRC_TEMP_INCREASE BIT(2)
	44	#define ADI_IRQ_SRC_NEW_MEASUR BIT(3)
	45	#define ADI_IRQ_SRC_MASK GENMASK(3, 0)
	46	#define ADI_IRQ_MASK_OUT_ALL 0xFFFFFFFFU
	47
	48	#define SYSFS_PWM_MAX 255
	49
	50	struct axi_fan_control_data {
	51	void __iomem *base;
	52	struct device *hdev;
	53	unsigned long clk_rate;
	54	int irq;
	55	/* pulses per revolution */
	56	u32 ppr;
	57	bool hw_pwm_req;
	58	bool update_tacho_params;
	59	u8 fan_fault;
	60	};
	61
	62	static inline void axi_iowrite(const u32 val, const u32 reg,
	63	const struct axi_fan_control_data *ctl)
	64	{
	65	iowrite32(val, ctl->base + reg);
	66	}
	67
	68	static inline u32 axi_ioread(const u32 reg,
	69	const struct axi_fan_control_data *ctl)
	70	{
	71	return ioread32(ctl->base + reg);
	72	}
	73
2aee7e67 NS	74	/*
	75	* The core calculates the temperature as:
	76	* T = /raw * 509.3140064 / 65535) - 280.2308787
	77	*/
	78	static ssize_t axi_fan_control_show(struct device dev, struct device_attribute da, char *buf)
	79	{
	80	struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
	81	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
	82	u32 temp = axi_ioread(attr->index, ctl);
	83
	84	temp = DIV_ROUND_CLOSEST_ULL(temp * 509314ULL, 65535) - 280230;
	85
	86	return sprintf(buf, "%u\n", temp);
	87	}
	88
	89	static ssize_t axi_fan_control_store(struct device dev, struct device_attribute da,
	90	const char *buf, size_t count)
	91	{
	92	struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
	93	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
	94	u32 temp;
	95	int ret;
	96
	97	ret = kstrtou32(buf, 10, &temp);
	98	if (ret)
	99	return ret;
	100
	101	temp = DIV_ROUND_CLOSEST_ULL((temp + 280230) * 65535ULL, 509314);
	102	axi_iowrite(temp, attr->index, ctl);
	103
	104	return count;
	105	}
	106
8412b410 NS	107	static long axi_fan_control_get_pwm_duty(const struct axi_fan_control_data *ctl)
	108	{
	109	u32 pwm_width = axi_ioread(ADI_REG_PWM_WIDTH, ctl);
	110	u32 pwm_period = axi_ioread(ADI_REG_PWM_PERIOD, ctl);
	111	/*
	112	* PWM_PERIOD is a RO register set by the core. It should never be 0.
	113	* For now we are trusting the HW...
	114	*/
	115	return DIV_ROUND_CLOSEST(pwm_width * SYSFS_PWM_MAX, pwm_period);
	116	}
	117
	118	static int axi_fan_control_set_pwm_duty(const long val,
	119	struct axi_fan_control_data *ctl)
	120	{
	121	u32 pwm_period = axi_ioread(ADI_REG_PWM_PERIOD, ctl);
	122	u32 new_width;
	123	long __val = clamp_val(val, 0, SYSFS_PWM_MAX);
	124
	125	new_width = DIV_ROUND_CLOSEST(__val * pwm_period, SYSFS_PWM_MAX);
	126
	127	axi_iowrite(new_width, ADI_REG_PWM_WIDTH, ctl);
	128
	129	return 0;
	130	}
	131
	132	static long axi_fan_control_get_fan_rpm(const struct axi_fan_control_data *ctl)
	133	{
	134	const u32 tach = axi_ioread(ADI_REG_TACH_MEASUR, ctl);
	135
	136	if (tach == 0)
	137	/* should we return error, EAGAIN maybe? */
	138	return 0;
	139	/*
	140	* The tacho period should be:
	141	* TACH = 60/(ppr * rpm), where rpm is revolutions per second
	142	* and ppr is pulses per revolution.
	143	* Given the tacho period, we can multiply it by the input clock
	144	* so that we know how many clocks we need to have this period.
	145	* From this, we can derive the RPM value.
	146	*/
	147	return DIV_ROUND_CLOSEST(60 * ctl->clk_rate, ctl->ppr * tach);
	148	}
	149
	150	static int axi_fan_control_read_temp(struct device dev, u32 attr, long val)
	151	{
	152	struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
	153	long raw_temp;
	154
	155	switch (attr) {
	156	case hwmon_temp_input:
	157	raw_temp = axi_ioread(ADI_REG_TEMPERATURE, ctl);
	158	/*
	159	* The formula for the temperature is:
	160	* T = (ADC * 501.3743 / 2^bits) - 273.6777
	161	* It's multiplied by 1000 to have millidegrees as
	162	* specified by the hwmon sysfs interface.
	163	*/
	164	val = ((raw_temp 501374) >> 16) - 273677;
	165	return 0;
	166	default:
	167	return -ENOTSUPP;
	168	}
	169	}
	170
171	static int axi_fan_control_read_fan(struct device dev, u32 attr, long val)
172	{
173	struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
174
175	switch (attr) {
176	case hwmon_fan_fault:
177	*val = ctl->fan_fault;
178	/* clear it now */
179	ctl->fan_fault = 0;
180	return 0;
181	case hwmon_fan_input:
182	*val = axi_fan_control_get_fan_rpm(ctl);
183	return 0;
184	default:
185	return -ENOTSUPP;
186	}
187	}
188
189	static int axi_fan_control_read_pwm(struct device dev, u32 attr, long val)
190	{
191	struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
192
193	switch (attr) {
194	case hwmon_pwm_input:
195	*val = axi_fan_control_get_pwm_duty(ctl);
196	return 0;
197	default:
198	return -ENOTSUPP;
199	}
200	}
201
202	static int axi_fan_control_write_pwm(struct device *dev, u32 attr, long val)
203	{
204	struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
205
206	switch (attr) {
207	case hwmon_pwm_input:
208	return axi_fan_control_set_pwm_duty(val, ctl);
209	default:
210	return -ENOTSUPP;
211	}
212	}
213
214	static int axi_fan_control_read_labels(struct device *dev,
215	enum hwmon_sensor_types type,
216	u32 attr, int channel, const char **str)
217	{
218	switch (type) {
219	case hwmon_fan:
220	*str = "FAN";
221	return 0;
222	case hwmon_temp:
223	*str = "SYSMON4";
224	return 0;
225	default:
226	return -ENOTSUPP;
227	}
228	}
229
230	static int axi_fan_control_read(struct device *dev,
231	enum hwmon_sensor_types type,
232	u32 attr, int channel, long *val)
233	{
234	switch (type) {
235	case hwmon_fan:
236	return axi_fan_control_read_fan(dev, attr, val);
237	case hwmon_pwm:
238	return axi_fan_control_read_pwm(dev, attr, val);
239	case hwmon_temp:
240	return axi_fan_control_read_temp(dev, attr, val);
241	default:
242	return -ENOTSUPP;
243	}
244	}
245
246	static int axi_fan_control_write(struct device *dev,
247	enum hwmon_sensor_types type,
248	u32 attr, int channel, long val)
249	{
250	switch (type) {
251	case hwmon_pwm:
252	return axi_fan_control_write_pwm(dev, attr, val);
253	default:
254	return -ENOTSUPP;
255	}
256	}
257
258	static umode_t axi_fan_control_fan_is_visible(const u32 attr)
259	{
260	switch (attr) {
261	case hwmon_fan_input:
262	case hwmon_fan_fault:
263	case hwmon_fan_label:
264	return 0444;
265	default:
266	return 0;
267	}
268	}
269
270	static umode_t axi_fan_control_pwm_is_visible(const u32 attr)
271	{
272	switch (attr) {
273	case hwmon_pwm_input:
274	return 0644;
275	default:
276	return 0;
277	}
278	}
279
280	static umode_t axi_fan_control_temp_is_visible(const u32 attr)
281	{
282	switch (attr) {
283	case hwmon_temp_input:
284	case hwmon_temp_label:
285	return 0444;
286	default:
287	return 0;
288	}
289	}
290
291	static umode_t axi_fan_control_is_visible(const void *data,
292	enum hwmon_sensor_types type,
293	u32 attr, int channel)
294	{
295	switch (type) {
296	case hwmon_fan:
297	return axi_fan_control_fan_is_visible(attr);
298	case hwmon_pwm:
299	return axi_fan_control_pwm_is_visible(attr);
300	case hwmon_temp:
301	return axi_fan_control_temp_is_visible(attr);
302	default:
303	return 0;
304	}
305	}
306
307	/*
308	* This core has two main ways of changing the PWM duty cycle. It is done,
309	* either by a request from userspace (writing on pwm1_input) or by the
310	* core itself. When the change is done by the core, it will use predefined
311	* parameters to evaluate the tach signal and, on that case we cannot set them.
312	* On the other hand, when the request is done by the user, with some arbitrary
313	* value that the core does not now about, we have to provide the tach
314	* parameters so that, the core can evaluate the signal. On the IRQ handler we
315	* distinguish this by using the ADI_IRQ_SRC_TEMP_INCREASE interrupt. This tell
316	* us that the CORE requested a new duty cycle. After this, there is 5s delay
317	* on which the core waits for the fan rotation speed to stabilize. After this
318	* we get ADI_IRQ_SRC_PWM_CHANGED irq where we will decide if we need to set
319	* the tach parameters or not on the next tach measurement cycle (corresponding
320	* already to the ney duty cycle) based on the %ctl->hw_pwm_req flag.
321	*/
322	static irqreturn_t axi_fan_control_irq_handler(int irq, void *data)
323	{
324	struct axi_fan_control_data ctl = (struct axi_fan_control_data )data;
325	u32 irq_pending = axi_ioread(ADI_REG_IRQ_PENDING, ctl);
326	u32 clear_mask;
327
e66705de NS	328	if (irq_pending & ADI_IRQ_SRC_TEMP_INCREASE)
	329	/* hardware requested a new pwm */
	330	ctl->hw_pwm_req = true;
8412b410 NS	331
	332	if (irq_pending & ADI_IRQ_SRC_PWM_CHANGED) {
	333	/*
	334	* if the pwm changes on behalf of software,
	335	* we need to provide new tacho parameters to the core.
	336	* Wait for the next measurement for that...
	337	*/
	338	if (!ctl->hw_pwm_req) {
	339	ctl->update_tacho_params = true;
	340	} else {
	341	ctl->hw_pwm_req = false;
	342	sysfs_notify(&ctl->hdev->kobj, NULL, "pwm1");
	343	}
	344	}
	345
e66705de NS	346	if (irq_pending & ADI_IRQ_SRC_NEW_MEASUR) {
	347	if (ctl->update_tacho_params) {
	348	u32 new_tach = axi_ioread(ADI_REG_TACH_MEASUR, ctl);
	349	/* get 25% tolerance */
	350	u32 tach_tol = DIV_ROUND_CLOSEST(new_tach * 25, 100);
	351
	352	/* set new tacho parameters */
	353	axi_iowrite(new_tach, ADI_REG_TACH_PERIOD, ctl);
	354	axi_iowrite(tach_tol, ADI_REG_TACH_TOLERANCE, ctl);
	355	ctl->update_tacho_params = false;
	356	}
	357	}
8412b410 NS	358
	359	if (irq_pending & ADI_IRQ_SRC_TACH_ERR)
	360	ctl->fan_fault = 1;
	361
	362	/* clear all interrupts */
	363	clear_mask = irq_pending & ADI_IRQ_SRC_MASK;
	364	axi_iowrite(clear_mask, ADI_REG_IRQ_PENDING, ctl);
	365
	366	return IRQ_HANDLED;
	367	}
	368
	369	static int axi_fan_control_init(struct axi_fan_control_data *ctl,
	370	const struct device_node *np)
	371	{
	372	int ret;
	373
	374	/* get fan pulses per revolution */
	375	ret = of_property_read_u32(np, "pulses-per-revolution", &ctl->ppr);
	376	if (ret)
	377	return ret;
	378
	379	/* 1, 2 and 4 are the typical and accepted values */
	380	if (ctl->ppr != 1 && ctl->ppr != 2 && ctl->ppr != 4)
	381	return -EINVAL;
	382	/*
	383	* Enable all IRQs
	384	*/
	385	axi_iowrite(ADI_IRQ_MASK_OUT_ALL &
	386	~(ADI_IRQ_SRC_NEW_MEASUR \| ADI_IRQ_SRC_TACH_ERR \|
	387	ADI_IRQ_SRC_PWM_CHANGED \| ADI_IRQ_SRC_TEMP_INCREASE),
	388	ADI_REG_IRQ_MASK, ctl);
	389
	390	/* bring the device out of reset */
	391	axi_iowrite(0x01, ADI_REG_RSTN, ctl);
	392
	393	return ret;
	394	}
	395
a3933625 NS	396	static void axi_fan_control_clk_disable(void *clk)
	397	{
	398	clk_disable_unprepare(clk);
	399	}
	400
8412b410 NS	401	static const struct hwmon_channel_info *axi_fan_control_info[] = {
	402	HWMON_CHANNEL_INFO(pwm, HWMON_PWM_INPUT),
	403	HWMON_CHANNEL_INFO(fan, HWMON_F_INPUT \| HWMON_F_FAULT \| HWMON_F_LABEL),
	404	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT \| HWMON_T_LABEL),
	405	NULL
	406	};
	407
	408	static const struct hwmon_ops axi_fan_control_hwmon_ops = {
	409	.is_visible = axi_fan_control_is_visible,
	410	.read = axi_fan_control_read,
	411	.write = axi_fan_control_write,
	412	.read_string = axi_fan_control_read_labels,
	413	};
	414
	415	static const struct hwmon_chip_info axi_chip_info = {
	416	.ops = &axi_fan_control_hwmon_ops,
	417	.info = axi_fan_control_info,
	418	};
	419
2aee7e67 NS	420	/* temperature threshold below which PWM should be 0% */
	421	static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point1_temp_hyst, axi_fan_control, ADI_REG_TEMP_00_H);
	422	/* temperature threshold above which PWM should be 25% */
	423	static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point1_temp, axi_fan_control, ADI_REG_TEMP_25_L);
	424	/* temperature threshold below which PWM should be 25% */
	425	static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point2_temp_hyst, axi_fan_control, ADI_REG_TEMP_25_H);
	426	/* temperature threshold above which PWM should be 50% */
	427	static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point2_temp, axi_fan_control, ADI_REG_TEMP_50_L);
	428	/* temperature threshold below which PWM should be 50% */
	429	static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point3_temp_hyst, axi_fan_control, ADI_REG_TEMP_50_H);
	430	/* temperature threshold above which PWM should be 75% */
	431	static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point3_temp, axi_fan_control, ADI_REG_TEMP_75_L);
	432	/* temperature threshold below which PWM should be 75% */
	433	static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point4_temp_hyst, axi_fan_control, ADI_REG_TEMP_75_H);
	434	/* temperature threshold above which PWM should be 100% */
	435	static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point4_temp, axi_fan_control, ADI_REG_TEMP_100_L);
	436
	437	static struct attribute *axi_fan_control_attrs[] = {
	438	&sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
	439	&sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
	440	&sensor_dev_attr_pwm1_auto_point2_temp_hyst.dev_attr.attr,
	441	&sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
	442	&sensor_dev_attr_pwm1_auto_point3_temp_hyst.dev_attr.attr,
	443	&sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
	444	&sensor_dev_attr_pwm1_auto_point4_temp_hyst.dev_attr.attr,
	445	&sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
	446	NULL,
	447	};
	448	ATTRIBUTE_GROUPS(axi_fan_control);
	449
8412b410 NS	450	static const u32 version_1_0_0 = ADI_AXI_PCORE_VER(1, 0, 'a');
	451
	452	static const struct of_device_id axi_fan_control_of_match[] = {
	453	{ .compatible = "adi,axi-fan-control-1.00.a",
	454	.data = (void *)&version_1_0_0},
	455	{},
	456	};
	457	MODULE_DEVICE_TABLE(of, axi_fan_control_of_match);
	458
	459	static int axi_fan_control_probe(struct platform_device *pdev)
	460	{
	461	struct axi_fan_control_data *ctl;
	462	struct clk *clk;
	463	const struct of_device_id *id;
	464	const char *name = "axi_fan_control";
	465	u32 version;
	466	int ret;
	467
	468	id = of_match_node(axi_fan_control_of_match, pdev->dev.of_node);
	469	if (!id)
	470	return -EINVAL;
	471
	472	ctl = devm_kzalloc(&pdev->dev, sizeof(*ctl), GFP_KERNEL);
	473	if (!ctl)
	474	return -ENOMEM;
	475
	476	ctl->base = devm_platform_ioremap_resource(pdev, 0);
	477	if (IS_ERR(ctl->base))
	478	return PTR_ERR(ctl->base);
	479
	480	clk = devm_clk_get(&pdev->dev, NULL);
	481	if (IS_ERR(clk)) {
	482	dev_err(&pdev->dev, "clk_get failed with %ld\n", PTR_ERR(clk));
	483	return PTR_ERR(clk);
	484	}
	485
a3933625 NS	486	ret = clk_prepare_enable(clk);
	487	if (ret)
	488	return ret;
	489
	490	ret = devm_add_action_or_reset(&pdev->dev, axi_fan_control_clk_disable, clk);
	491	if (ret)
	492	return ret;
	493
8412b410 NS	494	ctl->clk_rate = clk_get_rate(clk);
	495	if (!ctl->clk_rate)
	496	return -EINVAL;
	497
	498	version = axi_ioread(ADI_AXI_REG_VERSION, ctl);
	499	if (ADI_AXI_PCORE_VER_MAJOR(version) !=
	500	ADI_AXI_PCORE_VER_MAJOR(((u32 )id->data))) {
	501	dev_err(&pdev->dev, "Major version mismatch. Expected %d.%.2d.%c, Reported %d.%.2d.%c\n",
	502	ADI_AXI_PCORE_VER_MAJOR(((u32 )id->data)),
	503	ADI_AXI_PCORE_VER_MINOR(((u32 )id->data)),
	504	ADI_AXI_PCORE_VER_PATCH(((u32 )id->data)),
	505	ADI_AXI_PCORE_VER_MAJOR(version),
	506	ADI_AXI_PCORE_VER_MINOR(version),
	507	ADI_AXI_PCORE_VER_PATCH(version));
	508	return -ENODEV;
	509	}
	510
	511	ctl->irq = platform_get_irq(pdev, 0);
	512	if (ctl->irq < 0)
	513	return ctl->irq;
	514
	515	ret = devm_request_threaded_irq(&pdev->dev, ctl->irq, NULL,
	516	axi_fan_control_irq_handler,
	517	IRQF_ONESHOT \| IRQF_TRIGGER_HIGH,
	518	pdev->driver_override, ctl);
	519	if (ret) {
	520	dev_err(&pdev->dev, "failed to request an irq, %d", ret);
	521	return ret;
	522	}
	523
	524	ret = axi_fan_control_init(ctl, pdev->dev.of_node);
	525	if (ret) {
	526	dev_err(&pdev->dev, "Failed to initialize device\n");
	527	return ret;
	528	}
	529
	530	ctl->hdev = devm_hwmon_device_register_with_info(&pdev->dev,
	531	name,
	532	ctl,
	533	&axi_chip_info,
2aee7e67	534	axi_fan_control_groups);
8412b410 NS	535
	536	return PTR_ERR_OR_ZERO(ctl->hdev);
	537	}
	538
	539	static struct platform_driver axi_fan_control_driver = {
	540	.driver = {
	541	.name = "axi_fan_control_driver",
	542	.of_match_table = axi_fan_control_of_match,
	543	},
	544	.probe = axi_fan_control_probe,
	545	};
	546	module_platform_driver(axi_fan_control_driver);
	547
	548	MODULE_AUTHOR("Nuno Sa <nuno.sa@analog.com>");
	549	MODULE_DESCRIPTION("Analog Devices Fan Control HDL CORE driver");
	550	MODULE_LICENSE("GPL");