Commit | Line | Data |
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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1c301fc5 JC |
2 | /* |
3 | * adt7475 - Thermal sensor driver for the ADT7475 chip and derivatives | |
4 | * Copyright (C) 2007-2008, Advanced Micro Devices, Inc. | |
5 | * Copyright (C) 2008 Jordan Crouse <jordan@cosmicpenguin.net> | |
6 | * Copyright (C) 2008 Hans de Goede <hdegoede@redhat.com> | |
7c81c60f | 7 | * Copyright (C) 2009 Jean Delvare <jdelvare@suse.de> |
3d849981 | 8 | * |
1c301fc5 | 9 | * Derived from the lm83 driver by Jean Delvare |
1c301fc5 JC |
10 | */ |
11 | ||
12 | #include <linux/module.h> | |
4e2496e4 | 13 | #include <linux/of_device.h> |
1c301fc5 JC |
14 | #include <linux/init.h> |
15 | #include <linux/slab.h> | |
16 | #include <linux/i2c.h> | |
17 | #include <linux/hwmon.h> | |
18 | #include <linux/hwmon-sysfs.h> | |
54fe4671 | 19 | #include <linux/hwmon-vid.h> |
1c301fc5 | 20 | #include <linux/err.h> |
dcd8f392 | 21 | #include <linux/jiffies.h> |
2ecff397 | 22 | #include <linux/of.h> |
e4651640 | 23 | #include <linux/util_macros.h> |
1c301fc5 JC |
24 | |
25 | /* Indexes for the sysfs hooks */ | |
26 | ||
27 | #define INPUT 0 | |
28 | #define MIN 1 | |
29 | #define MAX 2 | |
30 | #define CONTROL 3 | |
31 | #define OFFSET 3 | |
32 | #define AUTOMIN 4 | |
33 | #define THERM 5 | |
34 | #define HYSTERSIS 6 | |
35 | ||
9ed5bc24 GR |
36 | /* |
37 | * These are unique identifiers for the sysfs functions - unlike the | |
38 | * numbers above, these are not also indexes into an array | |
39 | */ | |
1c301fc5 JC |
40 | |
41 | #define ALARM 9 | |
42 | #define FAULT 10 | |
43 | ||
44 | /* 7475 Common Registers */ | |
45 | ||
d07ca4ad JD |
46 | #define REG_DEVREV2 0x12 /* ADT7490 only */ |
47 | ||
3d849981 JD |
48 | #define REG_VTT 0x1E /* ADT7490 only */ |
49 | #define REG_EXTEND3 0x1F /* ADT7490 only */ | |
50 | ||
cffb9dd0 | 51 | #define REG_VOLTAGE_BASE 0x20 |
1c301fc5 JC |
52 | #define REG_TEMP_BASE 0x25 |
53 | #define REG_TACH_BASE 0x28 | |
54 | #define REG_PWM_BASE 0x30 | |
55 | #define REG_PWM_MAX_BASE 0x38 | |
56 | ||
57 | #define REG_DEVID 0x3D | |
58 | #define REG_VENDID 0x3E | |
d656b6fd | 59 | #define REG_DEVID2 0x3F |
1c301fc5 | 60 | |
4abdf38d CP |
61 | #define REG_CONFIG1 0x40 |
62 | ||
1c301fc5 JC |
63 | #define REG_STATUS1 0x41 |
64 | #define REG_STATUS2 0x42 | |
65 | ||
d8d2ee07 JD |
66 | #define REG_VID 0x43 /* ADT7476 only */ |
67 | ||
cffb9dd0 JD |
68 | #define REG_VOLTAGE_MIN_BASE 0x44 |
69 | #define REG_VOLTAGE_MAX_BASE 0x45 | |
1c301fc5 JC |
70 | |
71 | #define REG_TEMP_MIN_BASE 0x4E | |
72 | #define REG_TEMP_MAX_BASE 0x4F | |
73 | ||
74 | #define REG_TACH_MIN_BASE 0x54 | |
75 | ||
76 | #define REG_PWM_CONFIG_BASE 0x5C | |
77 | ||
78 | #define REG_TEMP_TRANGE_BASE 0x5F | |
79 | ||
1d58f5ef CP |
80 | #define REG_ENHANCE_ACOUSTICS1 0x62 |
81 | #define REG_ENHANCE_ACOUSTICS2 0x63 | |
82 | ||
1c301fc5 JC |
83 | #define REG_PWM_MIN_BASE 0x64 |
84 | ||
85 | #define REG_TEMP_TMIN_BASE 0x67 | |
86 | #define REG_TEMP_THERM_BASE 0x6A | |
87 | ||
88 | #define REG_REMOTE1_HYSTERSIS 0x6D | |
89 | #define REG_REMOTE2_HYSTERSIS 0x6E | |
90 | ||
91 | #define REG_TEMP_OFFSET_BASE 0x70 | |
92 | ||
ebfaf1fb JD |
93 | #define REG_CONFIG2 0x73 |
94 | ||
1c301fc5 JC |
95 | #define REG_EXTEND1 0x76 |
96 | #define REG_EXTEND2 0x77 | |
378933c9 JD |
97 | |
98 | #define REG_CONFIG3 0x78 | |
1c301fc5 | 99 | #define REG_CONFIG5 0x7C |
f99318b2 JD |
100 | #define REG_CONFIG4 0x7D |
101 | ||
3d849981 JD |
102 | #define REG_STATUS4 0x81 /* ADT7490 only */ |
103 | ||
104 | #define REG_VTT_MIN 0x84 /* ADT7490 only */ | |
105 | #define REG_VTT_MAX 0x86 /* ADT7490 only */ | |
106 | ||
d8d2ee07 JD |
107 | #define VID_VIDSEL 0x80 /* ADT7476 only */ |
108 | ||
ebfaf1fb JD |
109 | #define CONFIG2_ATTN 0x20 |
110 | ||
378933c9 JD |
111 | #define CONFIG3_SMBALERT 0x01 |
112 | #define CONFIG3_THERM 0x02 | |
113 | ||
114 | #define CONFIG4_PINFUNC 0x03 | |
7b8664f1 CP |
115 | #define CONFIG4_THERM 0x01 |
116 | #define CONFIG4_SMBALERT 0x02 | |
f99318b2 | 117 | #define CONFIG4_MAXDUTY 0x08 |
ebfaf1fb JD |
118 | #define CONFIG4_ATTN_IN10 0x30 |
119 | #define CONFIG4_ATTN_IN43 0xC0 | |
1c301fc5 JC |
120 | |
121 | #define CONFIG5_TWOSCOMP 0x01 | |
122 | #define CONFIG5_TEMPOFFSET 0x02 | |
54fe4671 | 123 | #define CONFIG5_VIDGPIO 0x10 /* ADT7476 only */ |
1c301fc5 JC |
124 | |
125 | /* ADT7475 Settings */ | |
126 | ||
cffb9dd0 | 127 | #define ADT7475_VOLTAGE_COUNT 5 /* Not counting Vtt */ |
1c301fc5 JC |
128 | #define ADT7475_TEMP_COUNT 3 |
129 | #define ADT7475_TACH_COUNT 4 | |
130 | #define ADT7475_PWM_COUNT 3 | |
131 | ||
132 | /* Macro to read the registers */ | |
133 | ||
134 | #define adt7475_read(reg) i2c_smbus_read_byte_data(client, (reg)) | |
135 | ||
136 | /* Macros to easily index the registers */ | |
137 | ||
138 | #define TACH_REG(idx) (REG_TACH_BASE + ((idx) * 2)) | |
139 | #define TACH_MIN_REG(idx) (REG_TACH_MIN_BASE + ((idx) * 2)) | |
140 | ||
141 | #define PWM_REG(idx) (REG_PWM_BASE + (idx)) | |
142 | #define PWM_MAX_REG(idx) (REG_PWM_MAX_BASE + (idx)) | |
143 | #define PWM_MIN_REG(idx) (REG_PWM_MIN_BASE + (idx)) | |
144 | #define PWM_CONFIG_REG(idx) (REG_PWM_CONFIG_BASE + (idx)) | |
145 | ||
146 | #define VOLTAGE_REG(idx) (REG_VOLTAGE_BASE + (idx)) | |
147 | #define VOLTAGE_MIN_REG(idx) (REG_VOLTAGE_MIN_BASE + ((idx) * 2)) | |
148 | #define VOLTAGE_MAX_REG(idx) (REG_VOLTAGE_MAX_BASE + ((idx) * 2)) | |
149 | ||
150 | #define TEMP_REG(idx) (REG_TEMP_BASE + (idx)) | |
151 | #define TEMP_MIN_REG(idx) (REG_TEMP_MIN_BASE + ((idx) * 2)) | |
152 | #define TEMP_MAX_REG(idx) (REG_TEMP_MAX_BASE + ((idx) * 2)) | |
153 | #define TEMP_TMIN_REG(idx) (REG_TEMP_TMIN_BASE + (idx)) | |
154 | #define TEMP_THERM_REG(idx) (REG_TEMP_THERM_BASE + (idx)) | |
155 | #define TEMP_OFFSET_REG(idx) (REG_TEMP_OFFSET_BASE + (idx)) | |
156 | #define TEMP_TRANGE_REG(idx) (REG_TEMP_TRANGE_BASE + (idx)) | |
157 | ||
918ee91c | 158 | static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, I2C_CLIENT_END }; |
1c301fc5 | 159 | |
e5e9f44c | 160 | enum chips { adt7473, adt7475, adt7476, adt7490 }; |
1c301fc5 JC |
161 | |
162 | static const struct i2c_device_id adt7475_id[] = { | |
b180d050 | 163 | { "adt7473", adt7473 }, |
1c301fc5 | 164 | { "adt7475", adt7475 }, |
d8d2ee07 | 165 | { "adt7476", adt7476 }, |
3d849981 | 166 | { "adt7490", adt7490 }, |
1c301fc5 JC |
167 | { } |
168 | }; | |
169 | MODULE_DEVICE_TABLE(i2c, adt7475_id); | |
170 | ||
fe339dbf | 171 | static const struct of_device_id __maybe_unused adt7475_of_match[] = { |
4e2496e4 JMC |
172 | { |
173 | .compatible = "adi,adt7473", | |
174 | .data = (void *)adt7473 | |
175 | }, | |
176 | { | |
177 | .compatible = "adi,adt7475", | |
178 | .data = (void *)adt7475 | |
179 | }, | |
180 | { | |
181 | .compatible = "adi,adt7476", | |
182 | .data = (void *)adt7476 | |
183 | }, | |
184 | { | |
185 | .compatible = "adi,adt7490", | |
186 | .data = (void *)adt7490 | |
187 | }, | |
188 | { }, | |
189 | }; | |
190 | MODULE_DEVICE_TABLE(of, adt7475_of_match); | |
191 | ||
1c301fc5 | 192 | struct adt7475_data { |
c64fce7f | 193 | struct i2c_client *client; |
1c301fc5 JC |
194 | struct mutex lock; |
195 | ||
196 | unsigned long measure_updated; | |
b36fb171 | 197 | bool valid; |
1c301fc5 | 198 | |
2ecff397 | 199 | u8 config2; |
f99318b2 | 200 | u8 config4; |
1c301fc5 | 201 | u8 config5; |
cffb9dd0 | 202 | u8 has_voltage; |
ebfaf1fb | 203 | u8 bypass_attn; /* Bypass voltage attenuator */ |
378933c9 JD |
204 | u8 has_pwm2:1; |
205 | u8 has_fan4:1; | |
54fe4671 | 206 | u8 has_vid:1; |
3d849981 | 207 | u32 alarms; |
cffb9dd0 | 208 | u16 voltage[3][6]; |
1c301fc5 JC |
209 | u16 temp[7][3]; |
210 | u16 tach[2][4]; | |
211 | u8 pwm[4][3]; | |
212 | u8 range[3]; | |
213 | u8 pwmctl[3]; | |
214 | u8 pwmchan[3]; | |
1d58f5ef | 215 | u8 enh_acoustics[2]; |
54fe4671 JD |
216 | |
217 | u8 vid; | |
218 | u8 vrm; | |
c64fce7f | 219 | const struct attribute_group *groups[9]; |
1c301fc5 JC |
220 | }; |
221 | ||
222 | static struct i2c_driver adt7475_driver; | |
223 | static struct adt7475_data *adt7475_update_device(struct device *dev); | |
224 | static void adt7475_read_hystersis(struct i2c_client *client); | |
225 | static void adt7475_read_pwm(struct i2c_client *client, int index); | |
226 | ||
227 | /* Given a temp value, convert it to register value */ | |
228 | ||
229 | static inline u16 temp2reg(struct adt7475_data *data, long val) | |
230 | { | |
231 | u16 ret; | |
232 | ||
233 | if (!(data->config5 & CONFIG5_TWOSCOMP)) { | |
2a844c14 | 234 | val = clamp_val(val, -64000, 191000); |
1c301fc5 JC |
235 | ret = (val + 64500) / 1000; |
236 | } else { | |
2a844c14 | 237 | val = clamp_val(val, -128000, 127000); |
1c301fc5 JC |
238 | if (val < -500) |
239 | ret = (256500 + val) / 1000; | |
240 | else | |
241 | ret = (val + 500) / 1000; | |
242 | } | |
243 | ||
244 | return ret << 2; | |
245 | } | |
246 | ||
247 | /* Given a register value, convert it to a real temp value */ | |
248 | ||
249 | static inline int reg2temp(struct adt7475_data *data, u16 reg) | |
250 | { | |
251 | if (data->config5 & CONFIG5_TWOSCOMP) { | |
252 | if (reg >= 512) | |
253 | return (reg - 1024) * 250; | |
254 | else | |
255 | return reg * 250; | |
256 | } else | |
257 | return (reg - 256) * 250; | |
258 | } | |
259 | ||
260 | static inline int tach2rpm(u16 tach) | |
261 | { | |
262 | if (tach == 0 || tach == 0xFFFF) | |
263 | return 0; | |
264 | ||
265 | return (90000 * 60) / tach; | |
266 | } | |
267 | ||
268 | static inline u16 rpm2tach(unsigned long rpm) | |
269 | { | |
270 | if (rpm == 0) | |
271 | return 0; | |
272 | ||
2a844c14 | 273 | return clamp_val((90000 * 60) / rpm, 1, 0xFFFF); |
1c301fc5 JC |
274 | } |
275 | ||
cffb9dd0 JD |
276 | /* Scaling factors for voltage inputs, taken from the ADT7490 datasheet */ |
277 | static const int adt7473_in_scaling[ADT7475_VOLTAGE_COUNT + 1][2] = { | |
278 | { 45, 94 }, /* +2.5V */ | |
279 | { 175, 525 }, /* Vccp */ | |
280 | { 68, 71 }, /* Vcc */ | |
281 | { 93, 47 }, /* +5V */ | |
282 | { 120, 20 }, /* +12V */ | |
283 | { 45, 45 }, /* Vtt */ | |
284 | }; | |
1c301fc5 | 285 | |
ebfaf1fb | 286 | static inline int reg2volt(int channel, u16 reg, u8 bypass_attn) |
1c301fc5 | 287 | { |
cffb9dd0 | 288 | const int *r = adt7473_in_scaling[channel]; |
1c301fc5 | 289 | |
ebfaf1fb JD |
290 | if (bypass_attn & (1 << channel)) |
291 | return DIV_ROUND_CLOSEST(reg * 2250, 1024); | |
cffb9dd0 | 292 | return DIV_ROUND_CLOSEST(reg * (r[0] + r[1]) * 2250, r[1] * 1024); |
1c301fc5 JC |
293 | } |
294 | ||
ebfaf1fb | 295 | static inline u16 volt2reg(int channel, long volt, u8 bypass_attn) |
1c301fc5 | 296 | { |
cffb9dd0 JD |
297 | const int *r = adt7473_in_scaling[channel]; |
298 | long reg; | |
299 | ||
ebfaf1fb | 300 | if (bypass_attn & (1 << channel)) |
cf3ca187 | 301 | reg = DIV_ROUND_CLOSEST(volt * 1024, 2250); |
ebfaf1fb | 302 | else |
cf3ca187 LP |
303 | reg = DIV_ROUND_CLOSEST(volt * r[1] * 1024, |
304 | (r[0] + r[1]) * 2250); | |
2a844c14 | 305 | return clamp_val(reg, 0, 1023) & (0xff << 2); |
1c301fc5 JC |
306 | } |
307 | ||
f196dec6 | 308 | static int adt7475_read_word(struct i2c_client *client, int reg) |
1c301fc5 | 309 | { |
f196dec6 | 310 | int val1, val2; |
1c301fc5 | 311 | |
f196dec6 DC |
312 | val1 = i2c_smbus_read_byte_data(client, reg); |
313 | if (val1 < 0) | |
314 | return val1; | |
315 | val2 = i2c_smbus_read_byte_data(client, reg + 1); | |
316 | if (val2 < 0) | |
317 | return val2; | |
1c301fc5 | 318 | |
f196dec6 | 319 | return val1 | (val2 << 8); |
1c301fc5 JC |
320 | } |
321 | ||
322 | static void adt7475_write_word(struct i2c_client *client, int reg, u16 val) | |
323 | { | |
324 | i2c_smbus_write_byte_data(client, reg + 1, val >> 8); | |
325 | i2c_smbus_write_byte_data(client, reg, val & 0xFF); | |
326 | } | |
327 | ||
c24f9ba9 | 328 | static ssize_t voltage_show(struct device *dev, struct device_attribute *attr, |
1c301fc5 JC |
329 | char *buf) |
330 | { | |
331 | struct adt7475_data *data = adt7475_update_device(dev); | |
332 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
333 | unsigned short val; | |
334 | ||
4afec79f TI |
335 | if (IS_ERR(data)) |
336 | return PTR_ERR(data); | |
337 | ||
1c301fc5 JC |
338 | switch (sattr->nr) { |
339 | case ALARM: | |
340 | return sprintf(buf, "%d\n", | |
cffb9dd0 | 341 | (data->alarms >> sattr->index) & 1); |
1c301fc5 JC |
342 | default: |
343 | val = data->voltage[sattr->nr][sattr->index]; | |
ebfaf1fb JD |
344 | return sprintf(buf, "%d\n", |
345 | reg2volt(sattr->index, val, data->bypass_attn)); | |
1c301fc5 JC |
346 | } |
347 | } | |
348 | ||
c24f9ba9 GR |
349 | static ssize_t voltage_store(struct device *dev, |
350 | struct device_attribute *attr, const char *buf, | |
351 | size_t count) | |
1c301fc5 JC |
352 | { |
353 | ||
354 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
c64fce7f GM |
355 | struct adt7475_data *data = dev_get_drvdata(dev); |
356 | struct i2c_client *client = data->client; | |
1c301fc5 JC |
357 | unsigned char reg; |
358 | long val; | |
359 | ||
179c4fdb | 360 | if (kstrtol(buf, 10, &val)) |
1c301fc5 JC |
361 | return -EINVAL; |
362 | ||
363 | mutex_lock(&data->lock); | |
364 | ||
ebfaf1fb JD |
365 | data->voltage[sattr->nr][sattr->index] = |
366 | volt2reg(sattr->index, val, data->bypass_attn); | |
1c301fc5 | 367 | |
3d849981 JD |
368 | if (sattr->index < ADT7475_VOLTAGE_COUNT) { |
369 | if (sattr->nr == MIN) | |
370 | reg = VOLTAGE_MIN_REG(sattr->index); | |
371 | else | |
372 | reg = VOLTAGE_MAX_REG(sattr->index); | |
373 | } else { | |
374 | if (sattr->nr == MIN) | |
375 | reg = REG_VTT_MIN; | |
376 | else | |
377 | reg = REG_VTT_MAX; | |
378 | } | |
1c301fc5 JC |
379 | |
380 | i2c_smbus_write_byte_data(client, reg, | |
381 | data->voltage[sattr->nr][sattr->index] >> 2); | |
382 | mutex_unlock(&data->lock); | |
383 | ||
384 | return count; | |
385 | } | |
386 | ||
c24f9ba9 | 387 | static ssize_t temp_show(struct device *dev, struct device_attribute *attr, |
1c301fc5 JC |
388 | char *buf) |
389 | { | |
390 | struct adt7475_data *data = adt7475_update_device(dev); | |
391 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
392 | int out; | |
393 | ||
4afec79f TI |
394 | if (IS_ERR(data)) |
395 | return PTR_ERR(data); | |
396 | ||
1c301fc5 JC |
397 | switch (sattr->nr) { |
398 | case HYSTERSIS: | |
399 | mutex_lock(&data->lock); | |
400 | out = data->temp[sattr->nr][sattr->index]; | |
401 | if (sattr->index != 1) | |
402 | out = (out >> 4) & 0xF; | |
403 | else | |
404 | out = (out & 0xF); | |
9ed5bc24 GR |
405 | /* |
406 | * Show the value as an absolute number tied to | |
407 | * THERM | |
408 | */ | |
1c301fc5 JC |
409 | out = reg2temp(data, data->temp[THERM][sattr->index]) - |
410 | out * 1000; | |
411 | mutex_unlock(&data->lock); | |
412 | break; | |
413 | ||
414 | case OFFSET: | |
9ed5bc24 GR |
415 | /* |
416 | * Offset is always 2's complement, regardless of the | |
417 | * setting in CONFIG5 | |
418 | */ | |
1c301fc5 JC |
419 | mutex_lock(&data->lock); |
420 | out = (s8)data->temp[sattr->nr][sattr->index]; | |
421 | if (data->config5 & CONFIG5_TEMPOFFSET) | |
422 | out *= 1000; | |
423 | else | |
424 | out *= 500; | |
425 | mutex_unlock(&data->lock); | |
426 | break; | |
427 | ||
428 | case ALARM: | |
429 | out = (data->alarms >> (sattr->index + 4)) & 1; | |
430 | break; | |
431 | ||
432 | case FAULT: | |
433 | /* Note - only for remote1 and remote2 */ | |
cf312e07 | 434 | out = !!(data->alarms & (sattr->index ? 0x8000 : 0x4000)); |
1c301fc5 JC |
435 | break; |
436 | ||
437 | default: | |
438 | /* All other temp values are in the configured format */ | |
439 | out = reg2temp(data, data->temp[sattr->nr][sattr->index]); | |
440 | } | |
441 | ||
442 | return sprintf(buf, "%d\n", out); | |
443 | } | |
444 | ||
c24f9ba9 GR |
445 | static ssize_t temp_store(struct device *dev, struct device_attribute *attr, |
446 | const char *buf, size_t count) | |
1c301fc5 JC |
447 | { |
448 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
c64fce7f GM |
449 | struct adt7475_data *data = dev_get_drvdata(dev); |
450 | struct i2c_client *client = data->client; | |
1c301fc5 JC |
451 | unsigned char reg = 0; |
452 | u8 out; | |
453 | int temp; | |
454 | long val; | |
455 | ||
179c4fdb | 456 | if (kstrtol(buf, 10, &val)) |
1c301fc5 JC |
457 | return -EINVAL; |
458 | ||
459 | mutex_lock(&data->lock); | |
460 | ||
461 | /* We need the config register in all cases for temp <-> reg conv. */ | |
462 | data->config5 = adt7475_read(REG_CONFIG5); | |
463 | ||
464 | switch (sattr->nr) { | |
465 | case OFFSET: | |
466 | if (data->config5 & CONFIG5_TEMPOFFSET) { | |
2a844c14 | 467 | val = clamp_val(val, -63000, 127000); |
1c301fc5 JC |
468 | out = data->temp[OFFSET][sattr->index] = val / 1000; |
469 | } else { | |
2a844c14 | 470 | val = clamp_val(val, -63000, 64000); |
1c301fc5 JC |
471 | out = data->temp[OFFSET][sattr->index] = val / 500; |
472 | } | |
473 | break; | |
474 | ||
475 | case HYSTERSIS: | |
9ed5bc24 GR |
476 | /* |
477 | * The value will be given as an absolute value, turn it | |
478 | * into an offset based on THERM | |
479 | */ | |
1c301fc5 JC |
480 | |
481 | /* Read fresh THERM and HYSTERSIS values from the chip */ | |
482 | data->temp[THERM][sattr->index] = | |
483 | adt7475_read(TEMP_THERM_REG(sattr->index)) << 2; | |
484 | adt7475_read_hystersis(client); | |
485 | ||
486 | temp = reg2temp(data, data->temp[THERM][sattr->index]); | |
2a844c14 | 487 | val = clamp_val(val, temp - 15000, temp); |
1c301fc5 JC |
488 | val = (temp - val) / 1000; |
489 | ||
490 | if (sattr->index != 1) { | |
491 | data->temp[HYSTERSIS][sattr->index] &= 0xF0; | |
492 | data->temp[HYSTERSIS][sattr->index] |= (val & 0xF) << 4; | |
493 | } else { | |
494 | data->temp[HYSTERSIS][sattr->index] &= 0x0F; | |
495 | data->temp[HYSTERSIS][sattr->index] |= (val & 0xF); | |
496 | } | |
497 | ||
498 | out = data->temp[HYSTERSIS][sattr->index]; | |
499 | break; | |
500 | ||
501 | default: | |
502 | data->temp[sattr->nr][sattr->index] = temp2reg(data, val); | |
503 | ||
9ed5bc24 GR |
504 | /* |
505 | * We maintain an extra 2 digits of precision for simplicity | |
506 | * - shift those back off before writing the value | |
507 | */ | |
1c301fc5 JC |
508 | out = (u8) (data->temp[sattr->nr][sattr->index] >> 2); |
509 | } | |
510 | ||
511 | switch (sattr->nr) { | |
512 | case MIN: | |
513 | reg = TEMP_MIN_REG(sattr->index); | |
514 | break; | |
515 | case MAX: | |
516 | reg = TEMP_MAX_REG(sattr->index); | |
517 | break; | |
518 | case OFFSET: | |
519 | reg = TEMP_OFFSET_REG(sattr->index); | |
520 | break; | |
521 | case AUTOMIN: | |
522 | reg = TEMP_TMIN_REG(sattr->index); | |
523 | break; | |
524 | case THERM: | |
525 | reg = TEMP_THERM_REG(sattr->index); | |
526 | break; | |
527 | case HYSTERSIS: | |
528 | if (sattr->index != 2) | |
529 | reg = REG_REMOTE1_HYSTERSIS; | |
530 | else | |
531 | reg = REG_REMOTE2_HYSTERSIS; | |
532 | ||
533 | break; | |
534 | } | |
535 | ||
536 | i2c_smbus_write_byte_data(client, reg, out); | |
537 | ||
538 | mutex_unlock(&data->lock); | |
539 | return count; | |
540 | } | |
541 | ||
8f05bcc3 CP |
542 | /* Assuming CONFIG6[SLOW] is 0 */ |
543 | static const int ad7475_st_map[] = { | |
544 | 37500, 18800, 12500, 7500, 4700, 3100, 1600, 800, | |
545 | }; | |
546 | ||
c24f9ba9 GR |
547 | static ssize_t temp_st_show(struct device *dev, struct device_attribute *attr, |
548 | char *buf) | |
8f05bcc3 CP |
549 | { |
550 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
c64fce7f | 551 | struct adt7475_data *data = dev_get_drvdata(dev); |
8f05bcc3 CP |
552 | long val; |
553 | ||
554 | switch (sattr->index) { | |
555 | case 0: | |
556 | val = data->enh_acoustics[0] & 0xf; | |
557 | break; | |
558 | case 1: | |
559 | val = (data->enh_acoustics[1] >> 4) & 0xf; | |
560 | break; | |
561 | case 2: | |
562 | default: | |
563 | val = data->enh_acoustics[1] & 0xf; | |
564 | break; | |
565 | } | |
566 | ||
567 | if (val & 0x8) | |
568 | return sprintf(buf, "%d\n", ad7475_st_map[val & 0x7]); | |
569 | else | |
570 | return sprintf(buf, "0\n"); | |
571 | } | |
572 | ||
c24f9ba9 GR |
573 | static ssize_t temp_st_store(struct device *dev, |
574 | struct device_attribute *attr, const char *buf, | |
575 | size_t count) | |
8f05bcc3 CP |
576 | { |
577 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
c64fce7f GM |
578 | struct adt7475_data *data = dev_get_drvdata(dev); |
579 | struct i2c_client *client = data->client; | |
8f05bcc3 CP |
580 | unsigned char reg; |
581 | int shift, idx; | |
582 | ulong val; | |
583 | ||
584 | if (kstrtoul(buf, 10, &val)) | |
585 | return -EINVAL; | |
586 | ||
587 | switch (sattr->index) { | |
588 | case 0: | |
589 | reg = REG_ENHANCE_ACOUSTICS1; | |
590 | shift = 0; | |
591 | idx = 0; | |
592 | break; | |
593 | case 1: | |
594 | reg = REG_ENHANCE_ACOUSTICS2; | |
595 | shift = 0; | |
596 | idx = 1; | |
597 | break; | |
598 | case 2: | |
599 | default: | |
600 | reg = REG_ENHANCE_ACOUSTICS2; | |
601 | shift = 4; | |
602 | idx = 1; | |
603 | break; | |
604 | } | |
605 | ||
606 | if (val > 0) { | |
607 | val = find_closest_descending(val, ad7475_st_map, | |
608 | ARRAY_SIZE(ad7475_st_map)); | |
609 | val |= 0x8; | |
610 | } | |
611 | ||
612 | mutex_lock(&data->lock); | |
613 | ||
614 | data->enh_acoustics[idx] &= ~(0xf << shift); | |
615 | data->enh_acoustics[idx] |= (val << shift); | |
616 | ||
617 | i2c_smbus_write_byte_data(client, reg, data->enh_acoustics[idx]); | |
618 | ||
619 | mutex_unlock(&data->lock); | |
620 | ||
621 | return count; | |
622 | } | |
623 | ||
9ed5bc24 GR |
624 | /* |
625 | * Table of autorange values - the user will write the value in millidegrees, | |
626 | * and we'll convert it | |
627 | */ | |
1c301fc5 JC |
628 | static const int autorange_table[] = { |
629 | 2000, 2500, 3330, 4000, 5000, 6670, 8000, | |
630 | 10000, 13330, 16000, 20000, 26670, 32000, 40000, | |
631 | 53330, 80000 | |
632 | }; | |
633 | ||
c24f9ba9 | 634 | static ssize_t point2_show(struct device *dev, struct device_attribute *attr, |
1c301fc5 JC |
635 | char *buf) |
636 | { | |
637 | struct adt7475_data *data = adt7475_update_device(dev); | |
638 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
639 | int out, val; | |
640 | ||
4afec79f TI |
641 | if (IS_ERR(data)) |
642 | return PTR_ERR(data); | |
643 | ||
1c301fc5 JC |
644 | mutex_lock(&data->lock); |
645 | out = (data->range[sattr->index] >> 4) & 0x0F; | |
646 | val = reg2temp(data, data->temp[AUTOMIN][sattr->index]); | |
647 | mutex_unlock(&data->lock); | |
648 | ||
649 | return sprintf(buf, "%d\n", val + autorange_table[out]); | |
650 | } | |
651 | ||
c24f9ba9 GR |
652 | static ssize_t point2_store(struct device *dev, struct device_attribute *attr, |
653 | const char *buf, size_t count) | |
1c301fc5 | 654 | { |
c64fce7f GM |
655 | struct adt7475_data *data = dev_get_drvdata(dev); |
656 | struct i2c_client *client = data->client; | |
1c301fc5 JC |
657 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); |
658 | int temp; | |
659 | long val; | |
660 | ||
179c4fdb | 661 | if (kstrtol(buf, 10, &val)) |
1c301fc5 JC |
662 | return -EINVAL; |
663 | ||
664 | mutex_lock(&data->lock); | |
665 | ||
666 | /* Get a fresh copy of the needed registers */ | |
667 | data->config5 = adt7475_read(REG_CONFIG5); | |
668 | data->temp[AUTOMIN][sattr->index] = | |
669 | adt7475_read(TEMP_TMIN_REG(sattr->index)) << 2; | |
670 | data->range[sattr->index] = | |
671 | adt7475_read(TEMP_TRANGE_REG(sattr->index)); | |
672 | ||
9ed5bc24 GR |
673 | /* |
674 | * The user will write an absolute value, so subtract the start point | |
675 | * to figure the range | |
676 | */ | |
1c301fc5 | 677 | temp = reg2temp(data, data->temp[AUTOMIN][sattr->index]); |
2a844c14 | 678 | val = clamp_val(val, temp + autorange_table[0], |
1c301fc5 JC |
679 | temp + autorange_table[ARRAY_SIZE(autorange_table) - 1]); |
680 | val -= temp; | |
681 | ||
682 | /* Find the nearest table entry to what the user wrote */ | |
e4651640 | 683 | val = find_closest(val, autorange_table, ARRAY_SIZE(autorange_table)); |
1c301fc5 JC |
684 | |
685 | data->range[sattr->index] &= ~0xF0; | |
686 | data->range[sattr->index] |= val << 4; | |
687 | ||
688 | i2c_smbus_write_byte_data(client, TEMP_TRANGE_REG(sattr->index), | |
689 | data->range[sattr->index]); | |
690 | ||
691 | mutex_unlock(&data->lock); | |
692 | return count; | |
693 | } | |
694 | ||
c24f9ba9 | 695 | static ssize_t tach_show(struct device *dev, struct device_attribute *attr, |
1c301fc5 JC |
696 | char *buf) |
697 | { | |
698 | struct adt7475_data *data = adt7475_update_device(dev); | |
699 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
700 | int out; | |
701 | ||
4afec79f TI |
702 | if (IS_ERR(data)) |
703 | return PTR_ERR(data); | |
704 | ||
1c301fc5 JC |
705 | if (sattr->nr == ALARM) |
706 | out = (data->alarms >> (sattr->index + 10)) & 1; | |
707 | else | |
708 | out = tach2rpm(data->tach[sattr->nr][sattr->index]); | |
709 | ||
710 | return sprintf(buf, "%d\n", out); | |
711 | } | |
712 | ||
c24f9ba9 GR |
713 | static ssize_t tach_store(struct device *dev, struct device_attribute *attr, |
714 | const char *buf, size_t count) | |
1c301fc5 JC |
715 | { |
716 | ||
717 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
c64fce7f GM |
718 | struct adt7475_data *data = dev_get_drvdata(dev); |
719 | struct i2c_client *client = data->client; | |
1c301fc5 JC |
720 | unsigned long val; |
721 | ||
179c4fdb | 722 | if (kstrtoul(buf, 10, &val)) |
1c301fc5 JC |
723 | return -EINVAL; |
724 | ||
725 | mutex_lock(&data->lock); | |
726 | ||
727 | data->tach[MIN][sattr->index] = rpm2tach(val); | |
728 | ||
729 | adt7475_write_word(client, TACH_MIN_REG(sattr->index), | |
730 | data->tach[MIN][sattr->index]); | |
731 | ||
732 | mutex_unlock(&data->lock); | |
733 | return count; | |
734 | } | |
735 | ||
c24f9ba9 | 736 | static ssize_t pwm_show(struct device *dev, struct device_attribute *attr, |
1c301fc5 JC |
737 | char *buf) |
738 | { | |
739 | struct adt7475_data *data = adt7475_update_device(dev); | |
740 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
741 | ||
4afec79f TI |
742 | if (IS_ERR(data)) |
743 | return PTR_ERR(data); | |
744 | ||
1c301fc5 JC |
745 | return sprintf(buf, "%d\n", data->pwm[sattr->nr][sattr->index]); |
746 | } | |
747 | ||
c24f9ba9 | 748 | static ssize_t pwmchan_show(struct device *dev, struct device_attribute *attr, |
1c301fc5 JC |
749 | char *buf) |
750 | { | |
751 | struct adt7475_data *data = adt7475_update_device(dev); | |
752 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
753 | ||
4afec79f TI |
754 | if (IS_ERR(data)) |
755 | return PTR_ERR(data); | |
756 | ||
1c301fc5 JC |
757 | return sprintf(buf, "%d\n", data->pwmchan[sattr->index]); |
758 | } | |
759 | ||
c24f9ba9 | 760 | static ssize_t pwmctrl_show(struct device *dev, struct device_attribute *attr, |
1c301fc5 JC |
761 | char *buf) |
762 | { | |
763 | struct adt7475_data *data = adt7475_update_device(dev); | |
764 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
765 | ||
4afec79f TI |
766 | if (IS_ERR(data)) |
767 | return PTR_ERR(data); | |
768 | ||
1c301fc5 JC |
769 | return sprintf(buf, "%d\n", data->pwmctl[sattr->index]); |
770 | } | |
771 | ||
c24f9ba9 GR |
772 | static ssize_t pwm_store(struct device *dev, struct device_attribute *attr, |
773 | const char *buf, size_t count) | |
1c301fc5 JC |
774 | { |
775 | ||
776 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
c64fce7f GM |
777 | struct adt7475_data *data = dev_get_drvdata(dev); |
778 | struct i2c_client *client = data->client; | |
1c301fc5 JC |
779 | unsigned char reg = 0; |
780 | long val; | |
781 | ||
179c4fdb | 782 | if (kstrtol(buf, 10, &val)) |
1c301fc5 JC |
783 | return -EINVAL; |
784 | ||
785 | mutex_lock(&data->lock); | |
786 | ||
787 | switch (sattr->nr) { | |
788 | case INPUT: | |
789 | /* Get a fresh value for CONTROL */ | |
790 | data->pwm[CONTROL][sattr->index] = | |
791 | adt7475_read(PWM_CONFIG_REG(sattr->index)); | |
792 | ||
9ed5bc24 GR |
793 | /* |
794 | * If we are not in manual mode, then we shouldn't allow | |
795 | * the user to set the pwm speed | |
796 | */ | |
1c301fc5 JC |
797 | if (((data->pwm[CONTROL][sattr->index] >> 5) & 7) != 7) { |
798 | mutex_unlock(&data->lock); | |
799 | return count; | |
800 | } | |
801 | ||
802 | reg = PWM_REG(sattr->index); | |
803 | break; | |
804 | ||
805 | case MIN: | |
806 | reg = PWM_MIN_REG(sattr->index); | |
807 | break; | |
808 | ||
809 | case MAX: | |
810 | reg = PWM_MAX_REG(sattr->index); | |
811 | break; | |
812 | } | |
813 | ||
2a844c14 | 814 | data->pwm[sattr->nr][sattr->index] = clamp_val(val, 0, 0xFF); |
1c301fc5 JC |
815 | i2c_smbus_write_byte_data(client, reg, |
816 | data->pwm[sattr->nr][sattr->index]); | |
1d58f5ef CP |
817 | mutex_unlock(&data->lock); |
818 | ||
819 | return count; | |
820 | } | |
821 | ||
c24f9ba9 | 822 | static ssize_t stall_disable_show(struct device *dev, |
1d58f5ef CP |
823 | struct device_attribute *attr, char *buf) |
824 | { | |
825 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
c64fce7f GM |
826 | struct adt7475_data *data = dev_get_drvdata(dev); |
827 | ||
1d58f5ef CP |
828 | u8 mask = BIT(5 + sattr->index); |
829 | ||
830 | return sprintf(buf, "%d\n", !!(data->enh_acoustics[0] & mask)); | |
831 | } | |
832 | ||
c24f9ba9 GR |
833 | static ssize_t stall_disable_store(struct device *dev, |
834 | struct device_attribute *attr, | |
835 | const char *buf, size_t count) | |
1d58f5ef CP |
836 | { |
837 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
c64fce7f GM |
838 | struct adt7475_data *data = dev_get_drvdata(dev); |
839 | struct i2c_client *client = data->client; | |
1d58f5ef CP |
840 | long val; |
841 | u8 mask = BIT(5 + sattr->index); | |
842 | ||
843 | if (kstrtol(buf, 10, &val)) | |
844 | return -EINVAL; | |
845 | ||
846 | mutex_lock(&data->lock); | |
847 | ||
848 | data->enh_acoustics[0] &= ~mask; | |
849 | if (val) | |
850 | data->enh_acoustics[0] |= mask; | |
851 | ||
852 | i2c_smbus_write_byte_data(client, REG_ENHANCE_ACOUSTICS1, | |
853 | data->enh_acoustics[0]); | |
1c301fc5 JC |
854 | |
855 | mutex_unlock(&data->lock); | |
856 | ||
857 | return count; | |
858 | } | |
859 | ||
860 | /* Called by set_pwmctrl and set_pwmchan */ | |
861 | ||
862 | static int hw_set_pwm(struct i2c_client *client, int index, | |
863 | unsigned int pwmctl, unsigned int pwmchan) | |
864 | { | |
865 | struct adt7475_data *data = i2c_get_clientdata(client); | |
866 | long val = 0; | |
867 | ||
868 | switch (pwmctl) { | |
869 | case 0: | |
870 | val = 0x03; /* Run at full speed */ | |
871 | break; | |
872 | case 1: | |
873 | val = 0x07; /* Manual mode */ | |
874 | break; | |
875 | case 2: | |
876 | switch (pwmchan) { | |
877 | case 1: | |
878 | /* Remote1 controls PWM */ | |
879 | val = 0x00; | |
880 | break; | |
881 | case 2: | |
882 | /* local controls PWM */ | |
883 | val = 0x01; | |
884 | break; | |
885 | case 4: | |
886 | /* remote2 controls PWM */ | |
887 | val = 0x02; | |
888 | break; | |
889 | case 6: | |
890 | /* local/remote2 control PWM */ | |
891 | val = 0x05; | |
892 | break; | |
893 | case 7: | |
894 | /* All three control PWM */ | |
895 | val = 0x06; | |
896 | break; | |
897 | default: | |
898 | return -EINVAL; | |
899 | } | |
900 | break; | |
901 | default: | |
902 | return -EINVAL; | |
903 | } | |
904 | ||
905 | data->pwmctl[index] = pwmctl; | |
906 | data->pwmchan[index] = pwmchan; | |
907 | ||
908 | data->pwm[CONTROL][index] &= ~0xE0; | |
909 | data->pwm[CONTROL][index] |= (val & 7) << 5; | |
910 | ||
911 | i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(index), | |
912 | data->pwm[CONTROL][index]); | |
913 | ||
914 | return 0; | |
915 | } | |
916 | ||
c24f9ba9 GR |
917 | static ssize_t pwmchan_store(struct device *dev, |
918 | struct device_attribute *attr, const char *buf, | |
919 | size_t count) | |
1c301fc5 JC |
920 | { |
921 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
c64fce7f GM |
922 | struct adt7475_data *data = dev_get_drvdata(dev); |
923 | struct i2c_client *client = data->client; | |
1c301fc5 JC |
924 | int r; |
925 | long val; | |
926 | ||
179c4fdb | 927 | if (kstrtol(buf, 10, &val)) |
1c301fc5 JC |
928 | return -EINVAL; |
929 | ||
930 | mutex_lock(&data->lock); | |
931 | /* Read Modify Write PWM values */ | |
932 | adt7475_read_pwm(client, sattr->index); | |
933 | r = hw_set_pwm(client, sattr->index, data->pwmctl[sattr->index], val); | |
934 | if (r) | |
935 | count = r; | |
936 | mutex_unlock(&data->lock); | |
937 | ||
938 | return count; | |
939 | } | |
940 | ||
c24f9ba9 GR |
941 | static ssize_t pwmctrl_store(struct device *dev, |
942 | struct device_attribute *attr, const char *buf, | |
943 | size_t count) | |
1c301fc5 JC |
944 | { |
945 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
c64fce7f GM |
946 | struct adt7475_data *data = dev_get_drvdata(dev); |
947 | struct i2c_client *client = data->client; | |
1c301fc5 JC |
948 | int r; |
949 | long val; | |
950 | ||
179c4fdb | 951 | if (kstrtol(buf, 10, &val)) |
1c301fc5 JC |
952 | return -EINVAL; |
953 | ||
954 | mutex_lock(&data->lock); | |
955 | /* Read Modify Write PWM values */ | |
956 | adt7475_read_pwm(client, sattr->index); | |
957 | r = hw_set_pwm(client, sattr->index, val, data->pwmchan[sattr->index]); | |
958 | if (r) | |
959 | count = r; | |
960 | mutex_unlock(&data->lock); | |
961 | ||
962 | return count; | |
963 | } | |
964 | ||
965 | /* List of frequencies for the PWM */ | |
966 | static const int pwmfreq_table[] = { | |
3490c92a | 967 | 11, 14, 22, 29, 35, 44, 58, 88, 22500 |
1c301fc5 JC |
968 | }; |
969 | ||
c24f9ba9 | 970 | static ssize_t pwmfreq_show(struct device *dev, struct device_attribute *attr, |
1c301fc5 JC |
971 | char *buf) |
972 | { | |
973 | struct adt7475_data *data = adt7475_update_device(dev); | |
974 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
9d19371d | 975 | int idx; |
1c301fc5 | 976 | |
4afec79f TI |
977 | if (IS_ERR(data)) |
978 | return PTR_ERR(data); | |
9d19371d DC |
979 | idx = clamp_val(data->range[sattr->index] & 0xf, 0, |
980 | ARRAY_SIZE(pwmfreq_table) - 1); | |
4afec79f | 981 | |
9d19371d | 982 | return sprintf(buf, "%d\n", pwmfreq_table[idx]); |
1c301fc5 JC |
983 | } |
984 | ||
c24f9ba9 GR |
985 | static ssize_t pwmfreq_store(struct device *dev, |
986 | struct device_attribute *attr, const char *buf, | |
987 | size_t count) | |
1c301fc5 JC |
988 | { |
989 | struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); | |
c64fce7f GM |
990 | struct adt7475_data *data = dev_get_drvdata(dev); |
991 | struct i2c_client *client = data->client; | |
1c301fc5 JC |
992 | int out; |
993 | long val; | |
994 | ||
179c4fdb | 995 | if (kstrtol(buf, 10, &val)) |
1c301fc5 JC |
996 | return -EINVAL; |
997 | ||
e4651640 | 998 | out = find_closest(val, pwmfreq_table, ARRAY_SIZE(pwmfreq_table)); |
1c301fc5 JC |
999 | |
1000 | mutex_lock(&data->lock); | |
1001 | ||
1002 | data->range[sattr->index] = | |
1003 | adt7475_read(TEMP_TRANGE_REG(sattr->index)); | |
3490c92a | 1004 | data->range[sattr->index] &= ~0xf; |
1c301fc5 JC |
1005 | data->range[sattr->index] |= out; |
1006 | ||
1007 | i2c_smbus_write_byte_data(client, TEMP_TRANGE_REG(sattr->index), | |
1008 | data->range[sattr->index]); | |
1009 | ||
1010 | mutex_unlock(&data->lock); | |
1011 | return count; | |
1012 | } | |
1013 | ||
1d05303c JL |
1014 | static ssize_t pwm_use_point2_pwm_at_crit_show(struct device *dev, |
1015 | struct device_attribute *devattr, | |
1016 | char *buf) | |
f99318b2 JD |
1017 | { |
1018 | struct adt7475_data *data = adt7475_update_device(dev); | |
9d19371d DC |
1019 | |
1020 | if (IS_ERR(data)) | |
1021 | return PTR_ERR(data); | |
1022 | ||
f99318b2 JD |
1023 | return sprintf(buf, "%d\n", !!(data->config4 & CONFIG4_MAXDUTY)); |
1024 | } | |
1025 | ||
1d05303c JL |
1026 | static ssize_t pwm_use_point2_pwm_at_crit_store(struct device *dev, |
1027 | struct device_attribute *devattr, | |
1028 | const char *buf, size_t count) | |
f99318b2 | 1029 | { |
c64fce7f GM |
1030 | struct adt7475_data *data = dev_get_drvdata(dev); |
1031 | struct i2c_client *client = data->client; | |
f99318b2 JD |
1032 | long val; |
1033 | ||
179c4fdb | 1034 | if (kstrtol(buf, 10, &val)) |
f99318b2 JD |
1035 | return -EINVAL; |
1036 | if (val != 0 && val != 1) | |
1037 | return -EINVAL; | |
1038 | ||
1039 | mutex_lock(&data->lock); | |
1040 | data->config4 = i2c_smbus_read_byte_data(client, REG_CONFIG4); | |
1041 | if (val) | |
1042 | data->config4 |= CONFIG4_MAXDUTY; | |
1043 | else | |
1044 | data->config4 &= ~CONFIG4_MAXDUTY; | |
1045 | i2c_smbus_write_byte_data(client, REG_CONFIG4, data->config4); | |
1046 | mutex_unlock(&data->lock); | |
1047 | ||
1048 | return count; | |
1049 | } | |
1050 | ||
1d05303c | 1051 | static ssize_t vrm_show(struct device *dev, struct device_attribute *devattr, |
54fe4671 JD |
1052 | char *buf) |
1053 | { | |
1054 | struct adt7475_data *data = dev_get_drvdata(dev); | |
1055 | return sprintf(buf, "%d\n", (int)data->vrm); | |
1056 | } | |
1057 | ||
1d05303c JL |
1058 | static ssize_t vrm_store(struct device *dev, struct device_attribute *devattr, |
1059 | const char *buf, size_t count) | |
54fe4671 JD |
1060 | { |
1061 | struct adt7475_data *data = dev_get_drvdata(dev); | |
1062 | long val; | |
1063 | ||
179c4fdb | 1064 | if (kstrtol(buf, 10, &val)) |
54fe4671 JD |
1065 | return -EINVAL; |
1066 | if (val < 0 || val > 255) | |
1067 | return -EINVAL; | |
1068 | data->vrm = val; | |
1069 | ||
1070 | return count; | |
1071 | } | |
1072 | ||
1d05303c JL |
1073 | static ssize_t cpu0_vid_show(struct device *dev, |
1074 | struct device_attribute *devattr, char *buf) | |
54fe4671 JD |
1075 | { |
1076 | struct adt7475_data *data = adt7475_update_device(dev); | |
4afec79f TI |
1077 | |
1078 | if (IS_ERR(data)) | |
1079 | return PTR_ERR(data); | |
1080 | ||
54fe4671 JD |
1081 | return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm)); |
1082 | } | |
1083 | ||
c24f9ba9 GR |
1084 | static SENSOR_DEVICE_ATTR_2_RO(in0_input, voltage, INPUT, 0); |
1085 | static SENSOR_DEVICE_ATTR_2_RW(in0_max, voltage, MAX, 0); | |
1086 | static SENSOR_DEVICE_ATTR_2_RW(in0_min, voltage, MIN, 0); | |
1087 | static SENSOR_DEVICE_ATTR_2_RO(in0_alarm, voltage, ALARM, 0); | |
1088 | static SENSOR_DEVICE_ATTR_2_RO(in1_input, voltage, INPUT, 1); | |
1089 | static SENSOR_DEVICE_ATTR_2_RW(in1_max, voltage, MAX, 1); | |
1090 | static SENSOR_DEVICE_ATTR_2_RW(in1_min, voltage, MIN, 1); | |
1091 | static SENSOR_DEVICE_ATTR_2_RO(in1_alarm, voltage, ALARM, 1); | |
1092 | static SENSOR_DEVICE_ATTR_2_RO(in2_input, voltage, INPUT, 2); | |
1093 | static SENSOR_DEVICE_ATTR_2_RW(in2_max, voltage, MAX, 2); | |
1094 | static SENSOR_DEVICE_ATTR_2_RW(in2_min, voltage, MIN, 2); | |
1095 | static SENSOR_DEVICE_ATTR_2_RO(in2_alarm, voltage, ALARM, 2); | |
1096 | static SENSOR_DEVICE_ATTR_2_RO(in3_input, voltage, INPUT, 3); | |
1097 | static SENSOR_DEVICE_ATTR_2_RW(in3_max, voltage, MAX, 3); | |
1098 | static SENSOR_DEVICE_ATTR_2_RW(in3_min, voltage, MIN, 3); | |
1099 | static SENSOR_DEVICE_ATTR_2_RO(in3_alarm, voltage, ALARM, 3); | |
1100 | static SENSOR_DEVICE_ATTR_2_RO(in4_input, voltage, INPUT, 4); | |
1101 | static SENSOR_DEVICE_ATTR_2_RW(in4_max, voltage, MAX, 4); | |
1102 | static SENSOR_DEVICE_ATTR_2_RW(in4_min, voltage, MIN, 4); | |
1103 | static SENSOR_DEVICE_ATTR_2_RO(in4_alarm, voltage, ALARM, 8); | |
1104 | static SENSOR_DEVICE_ATTR_2_RO(in5_input, voltage, INPUT, 5); | |
1105 | static SENSOR_DEVICE_ATTR_2_RW(in5_max, voltage, MAX, 5); | |
1106 | static SENSOR_DEVICE_ATTR_2_RW(in5_min, voltage, MIN, 5); | |
1107 | static SENSOR_DEVICE_ATTR_2_RO(in5_alarm, voltage, ALARM, 31); | |
1108 | static SENSOR_DEVICE_ATTR_2_RO(temp1_input, temp, INPUT, 0); | |
1109 | static SENSOR_DEVICE_ATTR_2_RO(temp1_alarm, temp, ALARM, 0); | |
1110 | static SENSOR_DEVICE_ATTR_2_RO(temp1_fault, temp, FAULT, 0); | |
1111 | static SENSOR_DEVICE_ATTR_2_RW(temp1_max, temp, MAX, 0); | |
1112 | static SENSOR_DEVICE_ATTR_2_RW(temp1_min, temp, MIN, 0); | |
1113 | static SENSOR_DEVICE_ATTR_2_RW(temp1_offset, temp, OFFSET, 0); | |
1114 | static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_point1_temp, temp, AUTOMIN, 0); | |
1115 | static SENSOR_DEVICE_ATTR_2_RW(temp1_auto_point2_temp, point2, 0, 0); | |
1116 | static SENSOR_DEVICE_ATTR_2_RW(temp1_crit, temp, THERM, 0); | |
1117 | static SENSOR_DEVICE_ATTR_2_RW(temp1_crit_hyst, temp, HYSTERSIS, 0); | |
1118 | static SENSOR_DEVICE_ATTR_2_RW(temp1_smoothing, temp_st, 0, 0); | |
1119 | static SENSOR_DEVICE_ATTR_2_RO(temp2_input, temp, INPUT, 1); | |
1120 | static SENSOR_DEVICE_ATTR_2_RO(temp2_alarm, temp, ALARM, 1); | |
1121 | static SENSOR_DEVICE_ATTR_2_RW(temp2_max, temp, MAX, 1); | |
1122 | static SENSOR_DEVICE_ATTR_2_RW(temp2_min, temp, MIN, 1); | |
1123 | static SENSOR_DEVICE_ATTR_2_RW(temp2_offset, temp, OFFSET, 1); | |
1124 | static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_point1_temp, temp, AUTOMIN, 1); | |
1125 | static SENSOR_DEVICE_ATTR_2_RW(temp2_auto_point2_temp, point2, 0, 1); | |
1126 | static SENSOR_DEVICE_ATTR_2_RW(temp2_crit, temp, THERM, 1); | |
1127 | static SENSOR_DEVICE_ATTR_2_RW(temp2_crit_hyst, temp, HYSTERSIS, 1); | |
1128 | static SENSOR_DEVICE_ATTR_2_RW(temp2_smoothing, temp_st, 0, 1); | |
1129 | static SENSOR_DEVICE_ATTR_2_RO(temp3_input, temp, INPUT, 2); | |
1130 | static SENSOR_DEVICE_ATTR_2_RO(temp3_alarm, temp, ALARM, 2); | |
1131 | static SENSOR_DEVICE_ATTR_2_RO(temp3_fault, temp, FAULT, 2); | |
1132 | static SENSOR_DEVICE_ATTR_2_RW(temp3_max, temp, MAX, 2); | |
1133 | static SENSOR_DEVICE_ATTR_2_RW(temp3_min, temp, MIN, 2); | |
1134 | static SENSOR_DEVICE_ATTR_2_RW(temp3_offset, temp, OFFSET, 2); | |
1135 | static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_point1_temp, temp, AUTOMIN, 2); | |
1136 | static SENSOR_DEVICE_ATTR_2_RW(temp3_auto_point2_temp, point2, 0, 2); | |
1137 | static SENSOR_DEVICE_ATTR_2_RW(temp3_crit, temp, THERM, 2); | |
1138 | static SENSOR_DEVICE_ATTR_2_RW(temp3_crit_hyst, temp, HYSTERSIS, 2); | |
1139 | static SENSOR_DEVICE_ATTR_2_RW(temp3_smoothing, temp_st, 0, 2); | |
1140 | static SENSOR_DEVICE_ATTR_2_RO(fan1_input, tach, INPUT, 0); | |
1141 | static SENSOR_DEVICE_ATTR_2_RW(fan1_min, tach, MIN, 0); | |
1142 | static SENSOR_DEVICE_ATTR_2_RO(fan1_alarm, tach, ALARM, 0); | |
1143 | static SENSOR_DEVICE_ATTR_2_RO(fan2_input, tach, INPUT, 1); | |
1144 | static SENSOR_DEVICE_ATTR_2_RW(fan2_min, tach, MIN, 1); | |
1145 | static SENSOR_DEVICE_ATTR_2_RO(fan2_alarm, tach, ALARM, 1); | |
1146 | static SENSOR_DEVICE_ATTR_2_RO(fan3_input, tach, INPUT, 2); | |
1147 | static SENSOR_DEVICE_ATTR_2_RW(fan3_min, tach, MIN, 2); | |
1148 | static SENSOR_DEVICE_ATTR_2_RO(fan3_alarm, tach, ALARM, 2); | |
1149 | static SENSOR_DEVICE_ATTR_2_RO(fan4_input, tach, INPUT, 3); | |
1150 | static SENSOR_DEVICE_ATTR_2_RW(fan4_min, tach, MIN, 3); | |
1151 | static SENSOR_DEVICE_ATTR_2_RO(fan4_alarm, tach, ALARM, 3); | |
1152 | static SENSOR_DEVICE_ATTR_2_RW(pwm1, pwm, INPUT, 0); | |
1153 | static SENSOR_DEVICE_ATTR_2_RW(pwm1_freq, pwmfreq, INPUT, 0); | |
1154 | static SENSOR_DEVICE_ATTR_2_RW(pwm1_enable, pwmctrl, INPUT, 0); | |
1155 | static SENSOR_DEVICE_ATTR_2_RW(pwm1_auto_channels_temp, pwmchan, INPUT, 0); | |
1156 | static SENSOR_DEVICE_ATTR_2_RW(pwm1_auto_point1_pwm, pwm, MIN, 0); | |
1157 | static SENSOR_DEVICE_ATTR_2_RW(pwm1_auto_point2_pwm, pwm, MAX, 0); | |
1158 | static SENSOR_DEVICE_ATTR_2_RW(pwm1_stall_disable, stall_disable, 0, 0); | |
1159 | static SENSOR_DEVICE_ATTR_2_RW(pwm2, pwm, INPUT, 1); | |
1160 | static SENSOR_DEVICE_ATTR_2_RW(pwm2_freq, pwmfreq, INPUT, 1); | |
1161 | static SENSOR_DEVICE_ATTR_2_RW(pwm2_enable, pwmctrl, INPUT, 1); | |
1162 | static SENSOR_DEVICE_ATTR_2_RW(pwm2_auto_channels_temp, pwmchan, INPUT, 1); | |
1163 | static SENSOR_DEVICE_ATTR_2_RW(pwm2_auto_point1_pwm, pwm, MIN, 1); | |
1164 | static SENSOR_DEVICE_ATTR_2_RW(pwm2_auto_point2_pwm, pwm, MAX, 1); | |
1165 | static SENSOR_DEVICE_ATTR_2_RW(pwm2_stall_disable, stall_disable, 0, 1); | |
1166 | static SENSOR_DEVICE_ATTR_2_RW(pwm3, pwm, INPUT, 2); | |
1167 | static SENSOR_DEVICE_ATTR_2_RW(pwm3_freq, pwmfreq, INPUT, 2); | |
1168 | static SENSOR_DEVICE_ATTR_2_RW(pwm3_enable, pwmctrl, INPUT, 2); | |
1169 | static SENSOR_DEVICE_ATTR_2_RW(pwm3_auto_channels_temp, pwmchan, INPUT, 2); | |
1170 | static SENSOR_DEVICE_ATTR_2_RW(pwm3_auto_point1_pwm, pwm, MIN, 2); | |
1171 | static SENSOR_DEVICE_ATTR_2_RW(pwm3_auto_point2_pwm, pwm, MAX, 2); | |
1172 | static SENSOR_DEVICE_ATTR_2_RW(pwm3_stall_disable, stall_disable, 0, 2); | |
1c301fc5 | 1173 | |
f99318b2 | 1174 | /* Non-standard name, might need revisiting */ |
1d05303c | 1175 | static DEVICE_ATTR_RW(pwm_use_point2_pwm_at_crit); |
f99318b2 | 1176 | |
1d05303c JL |
1177 | static DEVICE_ATTR_RW(vrm); |
1178 | static DEVICE_ATTR_RO(cpu0_vid); | |
54fe4671 | 1179 | |
1c301fc5 JC |
1180 | static struct attribute *adt7475_attrs[] = { |
1181 | &sensor_dev_attr_in1_input.dev_attr.attr, | |
1182 | &sensor_dev_attr_in1_max.dev_attr.attr, | |
1183 | &sensor_dev_attr_in1_min.dev_attr.attr, | |
1184 | &sensor_dev_attr_in1_alarm.dev_attr.attr, | |
1185 | &sensor_dev_attr_in2_input.dev_attr.attr, | |
1186 | &sensor_dev_attr_in2_max.dev_attr.attr, | |
1187 | &sensor_dev_attr_in2_min.dev_attr.attr, | |
1188 | &sensor_dev_attr_in2_alarm.dev_attr.attr, | |
1189 | &sensor_dev_attr_temp1_input.dev_attr.attr, | |
1190 | &sensor_dev_attr_temp1_alarm.dev_attr.attr, | |
1191 | &sensor_dev_attr_temp1_fault.dev_attr.attr, | |
1192 | &sensor_dev_attr_temp1_max.dev_attr.attr, | |
1193 | &sensor_dev_attr_temp1_min.dev_attr.attr, | |
1194 | &sensor_dev_attr_temp1_offset.dev_attr.attr, | |
1195 | &sensor_dev_attr_temp1_auto_point1_temp.dev_attr.attr, | |
1196 | &sensor_dev_attr_temp1_auto_point2_temp.dev_attr.attr, | |
1197 | &sensor_dev_attr_temp1_crit.dev_attr.attr, | |
1198 | &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr, | |
8f05bcc3 | 1199 | &sensor_dev_attr_temp1_smoothing.dev_attr.attr, |
1c301fc5 JC |
1200 | &sensor_dev_attr_temp2_input.dev_attr.attr, |
1201 | &sensor_dev_attr_temp2_alarm.dev_attr.attr, | |
1202 | &sensor_dev_attr_temp2_max.dev_attr.attr, | |
1203 | &sensor_dev_attr_temp2_min.dev_attr.attr, | |
1204 | &sensor_dev_attr_temp2_offset.dev_attr.attr, | |
1205 | &sensor_dev_attr_temp2_auto_point1_temp.dev_attr.attr, | |
1206 | &sensor_dev_attr_temp2_auto_point2_temp.dev_attr.attr, | |
1207 | &sensor_dev_attr_temp2_crit.dev_attr.attr, | |
1208 | &sensor_dev_attr_temp2_crit_hyst.dev_attr.attr, | |
8f05bcc3 | 1209 | &sensor_dev_attr_temp2_smoothing.dev_attr.attr, |
1c301fc5 JC |
1210 | &sensor_dev_attr_temp3_input.dev_attr.attr, |
1211 | &sensor_dev_attr_temp3_fault.dev_attr.attr, | |
1212 | &sensor_dev_attr_temp3_alarm.dev_attr.attr, | |
1213 | &sensor_dev_attr_temp3_max.dev_attr.attr, | |
1214 | &sensor_dev_attr_temp3_min.dev_attr.attr, | |
1215 | &sensor_dev_attr_temp3_offset.dev_attr.attr, | |
1216 | &sensor_dev_attr_temp3_auto_point1_temp.dev_attr.attr, | |
1217 | &sensor_dev_attr_temp3_auto_point2_temp.dev_attr.attr, | |
1218 | &sensor_dev_attr_temp3_crit.dev_attr.attr, | |
1219 | &sensor_dev_attr_temp3_crit_hyst.dev_attr.attr, | |
8f05bcc3 | 1220 | &sensor_dev_attr_temp3_smoothing.dev_attr.attr, |
1c301fc5 JC |
1221 | &sensor_dev_attr_fan1_input.dev_attr.attr, |
1222 | &sensor_dev_attr_fan1_min.dev_attr.attr, | |
1223 | &sensor_dev_attr_fan1_alarm.dev_attr.attr, | |
1224 | &sensor_dev_attr_fan2_input.dev_attr.attr, | |
1225 | &sensor_dev_attr_fan2_min.dev_attr.attr, | |
1226 | &sensor_dev_attr_fan2_alarm.dev_attr.attr, | |
1227 | &sensor_dev_attr_fan3_input.dev_attr.attr, | |
1228 | &sensor_dev_attr_fan3_min.dev_attr.attr, | |
1229 | &sensor_dev_attr_fan3_alarm.dev_attr.attr, | |
1c301fc5 JC |
1230 | &sensor_dev_attr_pwm1.dev_attr.attr, |
1231 | &sensor_dev_attr_pwm1_freq.dev_attr.attr, | |
1232 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, | |
84d2a314 | 1233 | &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr, |
1c301fc5 JC |
1234 | &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, |
1235 | &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr, | |
1d58f5ef | 1236 | &sensor_dev_attr_pwm1_stall_disable.dev_attr.attr, |
1c301fc5 JC |
1237 | &sensor_dev_attr_pwm3.dev_attr.attr, |
1238 | &sensor_dev_attr_pwm3_freq.dev_attr.attr, | |
1239 | &sensor_dev_attr_pwm3_enable.dev_attr.attr, | |
84d2a314 | 1240 | &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr, |
1c301fc5 JC |
1241 | &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, |
1242 | &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr, | |
1d58f5ef | 1243 | &sensor_dev_attr_pwm3_stall_disable.dev_attr.attr, |
f99318b2 | 1244 | &dev_attr_pwm_use_point2_pwm_at_crit.attr, |
1c301fc5 JC |
1245 | NULL, |
1246 | }; | |
1247 | ||
378933c9 JD |
1248 | static struct attribute *fan4_attrs[] = { |
1249 | &sensor_dev_attr_fan4_input.dev_attr.attr, | |
1250 | &sensor_dev_attr_fan4_min.dev_attr.attr, | |
1251 | &sensor_dev_attr_fan4_alarm.dev_attr.attr, | |
1252 | NULL | |
1253 | }; | |
1254 | ||
1255 | static struct attribute *pwm2_attrs[] = { | |
1256 | &sensor_dev_attr_pwm2.dev_attr.attr, | |
1257 | &sensor_dev_attr_pwm2_freq.dev_attr.attr, | |
1258 | &sensor_dev_attr_pwm2_enable.dev_attr.attr, | |
1259 | &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr, | |
1260 | &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, | |
1261 | &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr, | |
1d58f5ef | 1262 | &sensor_dev_attr_pwm2_stall_disable.dev_attr.attr, |
378933c9 JD |
1263 | NULL |
1264 | }; | |
1265 | ||
378933c9 | 1266 | static struct attribute *in0_attrs[] = { |
3d849981 JD |
1267 | &sensor_dev_attr_in0_input.dev_attr.attr, |
1268 | &sensor_dev_attr_in0_max.dev_attr.attr, | |
1269 | &sensor_dev_attr_in0_min.dev_attr.attr, | |
1270 | &sensor_dev_attr_in0_alarm.dev_attr.attr, | |
378933c9 JD |
1271 | NULL |
1272 | }; | |
1273 | ||
d8d2ee07 | 1274 | static struct attribute *in3_attrs[] = { |
3d849981 JD |
1275 | &sensor_dev_attr_in3_input.dev_attr.attr, |
1276 | &sensor_dev_attr_in3_max.dev_attr.attr, | |
1277 | &sensor_dev_attr_in3_min.dev_attr.attr, | |
1278 | &sensor_dev_attr_in3_alarm.dev_attr.attr, | |
d8d2ee07 JD |
1279 | NULL |
1280 | }; | |
1281 | ||
1282 | static struct attribute *in4_attrs[] = { | |
3d849981 JD |
1283 | &sensor_dev_attr_in4_input.dev_attr.attr, |
1284 | &sensor_dev_attr_in4_max.dev_attr.attr, | |
1285 | &sensor_dev_attr_in4_min.dev_attr.attr, | |
1286 | &sensor_dev_attr_in4_alarm.dev_attr.attr, | |
d8d2ee07 JD |
1287 | NULL |
1288 | }; | |
1289 | ||
1290 | static struct attribute *in5_attrs[] = { | |
3d849981 JD |
1291 | &sensor_dev_attr_in5_input.dev_attr.attr, |
1292 | &sensor_dev_attr_in5_max.dev_attr.attr, | |
1293 | &sensor_dev_attr_in5_min.dev_attr.attr, | |
1294 | &sensor_dev_attr_in5_alarm.dev_attr.attr, | |
1295 | NULL | |
1296 | }; | |
1297 | ||
54fe4671 JD |
1298 | static struct attribute *vid_attrs[] = { |
1299 | &dev_attr_cpu0_vid.attr, | |
1300 | &dev_attr_vrm.attr, | |
1301 | NULL | |
1302 | }; | |
1303 | ||
f5397be8 AY |
1304 | static const struct attribute_group adt7475_attr_group = { .attrs = adt7475_attrs }; |
1305 | static const struct attribute_group fan4_attr_group = { .attrs = fan4_attrs }; | |
1306 | static const struct attribute_group pwm2_attr_group = { .attrs = pwm2_attrs }; | |
1307 | static const struct attribute_group in0_attr_group = { .attrs = in0_attrs }; | |
1308 | static const struct attribute_group in3_attr_group = { .attrs = in3_attrs }; | |
1309 | static const struct attribute_group in4_attr_group = { .attrs = in4_attrs }; | |
1310 | static const struct attribute_group in5_attr_group = { .attrs = in5_attrs }; | |
1311 | static const struct attribute_group vid_attr_group = { .attrs = vid_attrs }; | |
1c301fc5 | 1312 | |
310ec792 | 1313 | static int adt7475_detect(struct i2c_client *client, |
1c301fc5 JC |
1314 | struct i2c_board_info *info) |
1315 | { | |
1316 | struct i2c_adapter *adapter = client->adapter; | |
d656b6fd | 1317 | int vendid, devid, devid2; |
b180d050 | 1318 | const char *name; |
1c301fc5 JC |
1319 | |
1320 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | |
1321 | return -ENODEV; | |
1322 | ||
b180d050 | 1323 | vendid = adt7475_read(REG_VENDID); |
d656b6fd JD |
1324 | devid2 = adt7475_read(REG_DEVID2); |
1325 | if (vendid != 0x41 || /* Analog Devices */ | |
1326 | (devid2 & 0xf8) != 0x68) | |
1327 | return -ENODEV; | |
b180d050 | 1328 | |
d656b6fd JD |
1329 | devid = adt7475_read(REG_DEVID); |
1330 | if (devid == 0x73) | |
b180d050 | 1331 | name = "adt7473"; |
d656b6fd | 1332 | else if (devid == 0x75 && client->addr == 0x2e) |
b180d050 | 1333 | name = "adt7475"; |
d8d2ee07 JD |
1334 | else if (devid == 0x76) |
1335 | name = "adt7476"; | |
3d849981 JD |
1336 | else if ((devid2 & 0xfc) == 0x6c) |
1337 | name = "adt7490"; | |
b180d050 JD |
1338 | else { |
1339 | dev_dbg(&adapter->dev, | |
d8d2ee07 | 1340 | "Couldn't detect an ADT7473/75/76/90 part at " |
b180d050 | 1341 | "0x%02x\n", (unsigned int)client->addr); |
52df6440 | 1342 | return -ENODEV; |
1c301fc5 JC |
1343 | } |
1344 | ||
f2f394db | 1345 | strscpy(info->type, name, I2C_NAME_SIZE); |
1c301fc5 JC |
1346 | |
1347 | return 0; | |
1348 | } | |
1349 | ||
702afead | 1350 | static int adt7475_update_limits(struct i2c_client *client) |
5cf943ed TI |
1351 | { |
1352 | struct adt7475_data *data = i2c_get_clientdata(client); | |
1353 | int i; | |
702afead | 1354 | int ret; |
5cf943ed | 1355 | |
702afead TI |
1356 | ret = adt7475_read(REG_CONFIG4); |
1357 | if (ret < 0) | |
1358 | return ret; | |
1359 | data->config4 = ret; | |
1360 | ||
1361 | ret = adt7475_read(REG_CONFIG5); | |
1362 | if (ret < 0) | |
1363 | return ret; | |
1364 | data->config5 = ret; | |
5cf943ed TI |
1365 | |
1366 | for (i = 0; i < ADT7475_VOLTAGE_COUNT; i++) { | |
1367 | if (!(data->has_voltage & (1 << i))) | |
1368 | continue; | |
1369 | /* Adjust values so they match the input precision */ | |
702afead TI |
1370 | ret = adt7475_read(VOLTAGE_MIN_REG(i)); |
1371 | if (ret < 0) | |
1372 | return ret; | |
1373 | data->voltage[MIN][i] = ret << 2; | |
1374 | ||
1375 | ret = adt7475_read(VOLTAGE_MAX_REG(i)); | |
1376 | if (ret < 0) | |
1377 | return ret; | |
1378 | data->voltage[MAX][i] = ret << 2; | |
5cf943ed TI |
1379 | } |
1380 | ||
1381 | if (data->has_voltage & (1 << 5)) { | |
702afead TI |
1382 | ret = adt7475_read(REG_VTT_MIN); |
1383 | if (ret < 0) | |
1384 | return ret; | |
1385 | data->voltage[MIN][5] = ret << 2; | |
1386 | ||
1387 | ret = adt7475_read(REG_VTT_MAX); | |
1388 | if (ret < 0) | |
1389 | return ret; | |
1390 | data->voltage[MAX][5] = ret << 2; | |
5cf943ed TI |
1391 | } |
1392 | ||
1393 | for (i = 0; i < ADT7475_TEMP_COUNT; i++) { | |
1394 | /* Adjust values so they match the input precision */ | |
702afead TI |
1395 | ret = adt7475_read(TEMP_MIN_REG(i)); |
1396 | if (ret < 0) | |
1397 | return ret; | |
1398 | data->temp[MIN][i] = ret << 2; | |
1399 | ||
1400 | ret = adt7475_read(TEMP_MAX_REG(i)); | |
1401 | if (ret < 0) | |
1402 | return ret; | |
1403 | data->temp[MAX][i] = ret << 2; | |
1404 | ||
1405 | ret = adt7475_read(TEMP_TMIN_REG(i)); | |
1406 | if (ret < 0) | |
1407 | return ret; | |
1408 | data->temp[AUTOMIN][i] = ret << 2; | |
1409 | ||
1410 | ret = adt7475_read(TEMP_THERM_REG(i)); | |
1411 | if (ret < 0) | |
1412 | return ret; | |
1413 | data->temp[THERM][i] = ret << 2; | |
1414 | ||
1415 | ret = adt7475_read(TEMP_OFFSET_REG(i)); | |
1416 | if (ret < 0) | |
1417 | return ret; | |
1418 | data->temp[OFFSET][i] = ret; | |
5cf943ed TI |
1419 | } |
1420 | adt7475_read_hystersis(client); | |
1421 | ||
1422 | for (i = 0; i < ADT7475_TACH_COUNT; i++) { | |
1423 | if (i == 3 && !data->has_fan4) | |
1424 | continue; | |
702afead TI |
1425 | ret = adt7475_read_word(client, TACH_MIN_REG(i)); |
1426 | if (ret < 0) | |
1427 | return ret; | |
1428 | data->tach[MIN][i] = ret; | |
5cf943ed TI |
1429 | } |
1430 | ||
1431 | for (i = 0; i < ADT7475_PWM_COUNT; i++) { | |
1432 | if (i == 1 && !data->has_pwm2) | |
1433 | continue; | |
702afead TI |
1434 | ret = adt7475_read(PWM_MAX_REG(i)); |
1435 | if (ret < 0) | |
1436 | return ret; | |
1437 | data->pwm[MAX][i] = ret; | |
1438 | ||
1439 | ret = adt7475_read(PWM_MIN_REG(i)); | |
1440 | if (ret < 0) | |
1441 | return ret; | |
1442 | data->pwm[MIN][i] = ret; | |
5cf943ed TI |
1443 | /* Set the channel and control information */ |
1444 | adt7475_read_pwm(client, i); | |
1445 | } | |
1446 | ||
702afead TI |
1447 | ret = adt7475_read(TEMP_TRANGE_REG(0)); |
1448 | if (ret < 0) | |
1449 | return ret; | |
1450 | data->range[0] = ret; | |
1451 | ||
1452 | ret = adt7475_read(TEMP_TRANGE_REG(1)); | |
1453 | if (ret < 0) | |
1454 | return ret; | |
1455 | data->range[1] = ret; | |
1456 | ||
1457 | ret = adt7475_read(TEMP_TRANGE_REG(2)); | |
1458 | if (ret < 0) | |
1459 | return ret; | |
1460 | data->range[2] = ret; | |
1461 | ||
1462 | return 0; | |
5cf943ed TI |
1463 | } |
1464 | ||
7b8664f1 CP |
1465 | static int load_config3(const struct i2c_client *client, const char *propname) |
1466 | { | |
1467 | const char *function; | |
1468 | u8 config3; | |
1469 | int ret; | |
1470 | ||
1471 | ret = of_property_read_string(client->dev.of_node, propname, &function); | |
1472 | if (!ret) { | |
1473 | ret = adt7475_read(REG_CONFIG3); | |
1474 | if (ret < 0) | |
1475 | return ret; | |
1476 | ||
1477 | config3 = ret & ~CONFIG3_SMBALERT; | |
1478 | if (!strcmp("pwm2", function)) | |
1479 | ; | |
1480 | else if (!strcmp("smbalert#", function)) | |
1481 | config3 |= CONFIG3_SMBALERT; | |
1482 | else | |
1483 | return -EINVAL; | |
1484 | ||
1485 | return i2c_smbus_write_byte_data(client, REG_CONFIG3, config3); | |
1486 | } | |
1487 | ||
1488 | return 0; | |
1489 | } | |
1490 | ||
1491 | static int load_config4(const struct i2c_client *client, const char *propname) | |
1492 | { | |
1493 | const char *function; | |
1494 | u8 config4; | |
1495 | int ret; | |
1496 | ||
1497 | ret = of_property_read_string(client->dev.of_node, propname, &function); | |
1498 | if (!ret) { | |
1499 | ret = adt7475_read(REG_CONFIG4); | |
1500 | if (ret < 0) | |
1501 | return ret; | |
1502 | ||
1503 | config4 = ret & ~CONFIG4_PINFUNC; | |
1504 | ||
1505 | if (!strcmp("tach4", function)) | |
1506 | ; | |
1507 | else if (!strcmp("therm#", function)) | |
1508 | config4 |= CONFIG4_THERM; | |
1509 | else if (!strcmp("smbalert#", function)) | |
1510 | config4 |= CONFIG4_SMBALERT; | |
1511 | else if (!strcmp("gpio", function)) | |
1512 | config4 |= CONFIG4_PINFUNC; | |
1513 | else | |
1514 | return -EINVAL; | |
1515 | ||
1516 | return i2c_smbus_write_byte_data(client, REG_CONFIG4, config4); | |
1517 | } | |
1518 | ||
1519 | return 0; | |
1520 | } | |
1521 | ||
1522 | static int load_config(const struct i2c_client *client, enum chips chip) | |
1523 | { | |
1524 | int err; | |
1525 | const char *prop1, *prop2; | |
1526 | ||
1527 | switch (chip) { | |
1528 | case adt7473: | |
1529 | case adt7475: | |
1530 | prop1 = "adi,pin5-function"; | |
1531 | prop2 = "adi,pin9-function"; | |
1532 | break; | |
1533 | case adt7476: | |
1534 | case adt7490: | |
1535 | prop1 = "adi,pin10-function"; | |
1536 | prop2 = "adi,pin14-function"; | |
1537 | break; | |
1538 | } | |
1539 | ||
1540 | err = load_config3(client, prop1); | |
1541 | if (err) { | |
1542 | dev_err(&client->dev, "failed to configure %s\n", prop1); | |
1543 | return err; | |
1544 | } | |
1545 | ||
1546 | err = load_config4(client, prop2); | |
1547 | if (err) { | |
1548 | dev_err(&client->dev, "failed to configure %s\n", prop2); | |
1549 | return err; | |
1550 | } | |
1551 | ||
1552 | return 0; | |
1553 | } | |
1554 | ||
2ecff397 LS |
1555 | static int set_property_bit(const struct i2c_client *client, char *property, |
1556 | u8 *config, u8 bit_index) | |
1557 | { | |
1558 | u32 prop_value = 0; | |
1559 | int ret = of_property_read_u32(client->dev.of_node, property, | |
1560 | &prop_value); | |
1561 | ||
1562 | if (!ret) { | |
1563 | if (prop_value) | |
1564 | *config |= (1 << bit_index); | |
1565 | else | |
1566 | *config &= ~(1 << bit_index); | |
1567 | } | |
1568 | ||
1569 | return ret; | |
1570 | } | |
1571 | ||
d45cd804 | 1572 | static int load_attenuators(const struct i2c_client *client, enum chips chip, |
2ecff397 LS |
1573 | struct adt7475_data *data) |
1574 | { | |
d45cd804 CP |
1575 | switch (chip) { |
1576 | case adt7476: | |
1577 | case adt7490: | |
2ecff397 LS |
1578 | set_property_bit(client, "adi,bypass-attenuator-in0", |
1579 | &data->config4, 4); | |
1580 | set_property_bit(client, "adi,bypass-attenuator-in1", | |
1581 | &data->config4, 5); | |
1582 | set_property_bit(client, "adi,bypass-attenuator-in3", | |
1583 | &data->config4, 6); | |
1584 | set_property_bit(client, "adi,bypass-attenuator-in4", | |
1585 | &data->config4, 7); | |
1586 | ||
d45cd804 CP |
1587 | return i2c_smbus_write_byte_data(client, REG_CONFIG4, |
1588 | data->config4); | |
1589 | case adt7473: | |
1590 | case adt7475: | |
2ecff397 LS |
1591 | set_property_bit(client, "adi,bypass-attenuator-in1", |
1592 | &data->config2, 5); | |
1593 | ||
d45cd804 CP |
1594 | return i2c_smbus_write_byte_data(client, REG_CONFIG2, |
1595 | data->config2); | |
2ecff397 LS |
1596 | } |
1597 | ||
1598 | return 0; | |
1599 | } | |
1600 | ||
86da28ee CP |
1601 | static int adt7475_set_pwm_polarity(struct i2c_client *client) |
1602 | { | |
1603 | u32 states[ADT7475_PWM_COUNT]; | |
1604 | int ret, i; | |
1605 | u8 val; | |
1606 | ||
1607 | ret = of_property_read_u32_array(client->dev.of_node, | |
1608 | "adi,pwm-active-state", states, | |
1609 | ARRAY_SIZE(states)); | |
1610 | if (ret) | |
1611 | return ret; | |
1612 | ||
1613 | for (i = 0; i < ADT7475_PWM_COUNT; i++) { | |
1614 | ret = adt7475_read(PWM_CONFIG_REG(i)); | |
1615 | if (ret < 0) | |
1616 | return ret; | |
1617 | val = ret; | |
1618 | if (states[i]) | |
1619 | val &= ~BIT(4); | |
1620 | else | |
1621 | val |= BIT(4); | |
1622 | ||
1623 | ret = i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(i), val); | |
1624 | if (ret) | |
1625 | return ret; | |
1626 | } | |
1627 | ||
1628 | return 0; | |
1629 | } | |
1630 | ||
67487038 | 1631 | static int adt7475_probe(struct i2c_client *client) |
1c301fc5 | 1632 | { |
4e2496e4 | 1633 | enum chips chip; |
99b8c83a | 1634 | static const char * const names[] = { |
d07ca4ad JD |
1635 | [adt7473] = "ADT7473", |
1636 | [adt7475] = "ADT7475", | |
d8d2ee07 | 1637 | [adt7476] = "ADT7476", |
d07ca4ad JD |
1638 | [adt7490] = "ADT7490", |
1639 | }; | |
1640 | ||
1c301fc5 | 1641 | struct adt7475_data *data; |
c64fce7f GM |
1642 | struct device *hwmon_dev; |
1643 | int i, ret = 0, revision, group_num = 0; | |
2ecff397 | 1644 | u8 config3; |
67487038 | 1645 | const struct i2c_device_id *id = i2c_match_id(adt7475_id, client); |
1c301fc5 | 1646 | |
e3ecb2ee | 1647 | data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL); |
1c301fc5 JC |
1648 | if (data == NULL) |
1649 | return -ENOMEM; | |
1650 | ||
1651 | mutex_init(&data->lock); | |
c64fce7f | 1652 | data->client = client; |
1c301fc5 JC |
1653 | i2c_set_clientdata(client, data); |
1654 | ||
4e2496e4 JMC |
1655 | if (client->dev.of_node) |
1656 | chip = (enum chips)of_device_get_match_data(&client->dev); | |
1657 | else | |
1658 | chip = id->driver_data; | |
1659 | ||
cffb9dd0 | 1660 | /* Initialize device-specific values */ |
4e2496e4 | 1661 | switch (chip) { |
d8d2ee07 JD |
1662 | case adt7476: |
1663 | data->has_voltage = 0x0e; /* in1 to in3 */ | |
1664 | revision = adt7475_read(REG_DEVID2) & 0x07; | |
1665 | break; | |
3d849981 | 1666 | case adt7490: |
378933c9 JD |
1667 | data->has_voltage = 0x3e; /* in1 to in5 */ |
1668 | revision = adt7475_read(REG_DEVID2) & 0x03; | |
d07ca4ad JD |
1669 | if (revision == 0x03) |
1670 | revision += adt7475_read(REG_DEVREV2); | |
3d849981 | 1671 | break; |
cffb9dd0 JD |
1672 | default: |
1673 | data->has_voltage = 0x06; /* in1, in2 */ | |
378933c9 JD |
1674 | revision = adt7475_read(REG_DEVID2) & 0x07; |
1675 | } | |
1676 | ||
7b8664f1 CP |
1677 | ret = load_config(client, chip); |
1678 | if (ret) | |
1679 | return ret; | |
1680 | ||
378933c9 JD |
1681 | config3 = adt7475_read(REG_CONFIG3); |
1682 | /* Pin PWM2 may alternatively be used for ALERT output */ | |
1683 | if (!(config3 & CONFIG3_SMBALERT)) | |
1684 | data->has_pwm2 = 1; | |
1685 | /* Meaning of this bit is inverted for the ADT7473-1 */ | |
1686 | if (id->driver_data == adt7473 && revision >= 1) | |
1687 | data->has_pwm2 = !data->has_pwm2; | |
1688 | ||
1689 | data->config4 = adt7475_read(REG_CONFIG4); | |
1690 | /* Pin TACH4 may alternatively be used for THERM */ | |
1691 | if ((data->config4 & CONFIG4_PINFUNC) == 0x0) | |
1692 | data->has_fan4 = 1; | |
1693 | ||
9ed5bc24 GR |
1694 | /* |
1695 | * THERM configuration is more complex on the ADT7476 and ADT7490, | |
1696 | * because 2 different pins (TACH4 and +2.5 Vin) can be used for | |
1697 | * this function | |
1698 | */ | |
378933c9 JD |
1699 | if (id->driver_data == adt7490) { |
1700 | if ((data->config4 & CONFIG4_PINFUNC) == 0x1 && | |
1701 | !(config3 & CONFIG3_THERM)) | |
1702 | data->has_fan4 = 1; | |
d8d2ee07 JD |
1703 | } |
1704 | if (id->driver_data == adt7476 || id->driver_data == adt7490) { | |
378933c9 JD |
1705 | if (!(config3 & CONFIG3_THERM) || |
1706 | (data->config4 & CONFIG4_PINFUNC) == 0x1) | |
1707 | data->has_voltage |= (1 << 0); /* in0 */ | |
cffb9dd0 JD |
1708 | } |
1709 | ||
9ed5bc24 GR |
1710 | /* |
1711 | * On the ADT7476, the +12V input pin may instead be used as VID5, | |
1712 | * and VID pins may alternatively be used as GPIO | |
1713 | */ | |
d8d2ee07 JD |
1714 | if (id->driver_data == adt7476) { |
1715 | u8 vid = adt7475_read(REG_VID); | |
1716 | if (!(vid & VID_VIDSEL)) | |
1717 | data->has_voltage |= (1 << 4); /* in4 */ | |
54fe4671 JD |
1718 | |
1719 | data->has_vid = !(adt7475_read(REG_CONFIG5) & CONFIG5_VIDGPIO); | |
d8d2ee07 JD |
1720 | } |
1721 | ||
ebfaf1fb | 1722 | /* Voltage attenuators can be bypassed, globally or individually */ |
2ecff397 LS |
1723 | data->config2 = adt7475_read(REG_CONFIG2); |
1724 | ret = load_attenuators(client, chip, data); | |
1725 | if (ret) | |
1726 | dev_warn(&client->dev, "Error configuring attenuator bypass\n"); | |
1727 | ||
1728 | if (data->config2 & CONFIG2_ATTN) { | |
ebfaf1fb JD |
1729 | data->bypass_attn = (0x3 << 3) | 0x3; |
1730 | } else { | |
1731 | data->bypass_attn = ((data->config4 & CONFIG4_ATTN_IN10) >> 4) | | |
1732 | ((data->config4 & CONFIG4_ATTN_IN43) >> 3); | |
1733 | } | |
1734 | data->bypass_attn &= data->has_voltage; | |
1735 | ||
9ed5bc24 GR |
1736 | /* |
1737 | * Call adt7475_read_pwm for all pwm's as this will reprogram any | |
1738 | * pwm's which are disabled to manual mode with 0% duty cycle | |
1739 | */ | |
1c301fc5 JC |
1740 | for (i = 0; i < ADT7475_PWM_COUNT; i++) |
1741 | adt7475_read_pwm(client, i); | |
1742 | ||
86da28ee CP |
1743 | ret = adt7475_set_pwm_polarity(client); |
1744 | if (ret && ret != -EINVAL) | |
1745 | dev_warn(&client->dev, "Error configuring pwm polarity\n"); | |
1746 | ||
4abdf38d CP |
1747 | /* Start monitoring */ |
1748 | switch (chip) { | |
1749 | case adt7475: | |
1750 | case adt7476: | |
1751 | i2c_smbus_write_byte_data(client, REG_CONFIG1, | |
1752 | adt7475_read(REG_CONFIG1) | 0x01); | |
1753 | break; | |
1754 | default: | |
1755 | break; | |
1756 | } | |
1757 | ||
c64fce7f | 1758 | data->groups[group_num++] = &adt7475_attr_group; |
1c301fc5 | 1759 | |
378933c9 JD |
1760 | /* Features that can be disabled individually */ |
1761 | if (data->has_fan4) { | |
c64fce7f | 1762 | data->groups[group_num++] = &fan4_attr_group; |
378933c9 JD |
1763 | } |
1764 | if (data->has_pwm2) { | |
c64fce7f | 1765 | data->groups[group_num++] = &pwm2_attr_group; |
378933c9 JD |
1766 | } |
1767 | if (data->has_voltage & (1 << 0)) { | |
c64fce7f | 1768 | data->groups[group_num++] = &in0_attr_group; |
378933c9 | 1769 | } |
d8d2ee07 | 1770 | if (data->has_voltage & (1 << 3)) { |
c64fce7f | 1771 | data->groups[group_num++] = &in3_attr_group; |
d8d2ee07 JD |
1772 | } |
1773 | if (data->has_voltage & (1 << 4)) { | |
c64fce7f | 1774 | data->groups[group_num++] = &in4_attr_group; |
d8d2ee07 JD |
1775 | } |
1776 | if (data->has_voltage & (1 << 5)) { | |
c64fce7f | 1777 | data->groups[group_num++] = &in5_attr_group; |
d8d2ee07 | 1778 | } |
54fe4671 JD |
1779 | if (data->has_vid) { |
1780 | data->vrm = vid_which_vrm(); | |
c64fce7f | 1781 | data->groups[group_num] = &vid_attr_group; |
54fe4671 | 1782 | } |
378933c9 | 1783 | |
c64fce7f GM |
1784 | /* register device with all the acquired attributes */ |
1785 | hwmon_dev = devm_hwmon_device_register_with_groups(&client->dev, | |
1786 | client->name, data, | |
1787 | data->groups); | |
1788 | ||
1789 | if (IS_ERR(hwmon_dev)) { | |
1790 | ret = PTR_ERR(hwmon_dev); | |
1791 | return ret; | |
1c301fc5 JC |
1792 | } |
1793 | ||
d07ca4ad JD |
1794 | dev_info(&client->dev, "%s device, revision %d\n", |
1795 | names[id->driver_data], revision); | |
d8d2ee07 | 1796 | if ((data->has_voltage & 0x11) || data->has_fan4 || data->has_pwm2) |
54fe4671 | 1797 | dev_info(&client->dev, "Optional features:%s%s%s%s%s\n", |
d07ca4ad | 1798 | (data->has_voltage & (1 << 0)) ? " in0" : "", |
d8d2ee07 | 1799 | (data->has_voltage & (1 << 4)) ? " in4" : "", |
d07ca4ad | 1800 | data->has_fan4 ? " fan4" : "", |
54fe4671 JD |
1801 | data->has_pwm2 ? " pwm2" : "", |
1802 | data->has_vid ? " vid" : ""); | |
ebfaf1fb JD |
1803 | if (data->bypass_attn) |
1804 | dev_info(&client->dev, "Bypassing attenuators on:%s%s%s%s\n", | |
1805 | (data->bypass_attn & (1 << 0)) ? " in0" : "", | |
1806 | (data->bypass_attn & (1 << 1)) ? " in1" : "", | |
1807 | (data->bypass_attn & (1 << 3)) ? " in3" : "", | |
1808 | (data->bypass_attn & (1 << 4)) ? " in4" : ""); | |
d07ca4ad | 1809 | |
5cf943ed | 1810 | /* Limits and settings, should never change update more than once */ |
4afec79f TI |
1811 | ret = adt7475_update_limits(client); |
1812 | if (ret) | |
c64fce7f | 1813 | return ret; |
1c301fc5 JC |
1814 | |
1815 | return 0; | |
1816 | } | |
1817 | ||
1818 | static struct i2c_driver adt7475_driver = { | |
1819 | .class = I2C_CLASS_HWMON, | |
1820 | .driver = { | |
1821 | .name = "adt7475", | |
4e2496e4 | 1822 | .of_match_table = of_match_ptr(adt7475_of_match), |
1c301fc5 | 1823 | }, |
67487038 | 1824 | .probe_new = adt7475_probe, |
1c301fc5 JC |
1825 | .id_table = adt7475_id, |
1826 | .detect = adt7475_detect, | |
c3813d6a | 1827 | .address_list = normal_i2c, |
1c301fc5 JC |
1828 | }; |
1829 | ||
1830 | static void adt7475_read_hystersis(struct i2c_client *client) | |
1831 | { | |
1832 | struct adt7475_data *data = i2c_get_clientdata(client); | |
1833 | ||
1834 | data->temp[HYSTERSIS][0] = (u16) adt7475_read(REG_REMOTE1_HYSTERSIS); | |
1835 | data->temp[HYSTERSIS][1] = data->temp[HYSTERSIS][0]; | |
1836 | data->temp[HYSTERSIS][2] = (u16) adt7475_read(REG_REMOTE2_HYSTERSIS); | |
1837 | } | |
1838 | ||
1839 | static void adt7475_read_pwm(struct i2c_client *client, int index) | |
1840 | { | |
1841 | struct adt7475_data *data = i2c_get_clientdata(client); | |
1842 | unsigned int v; | |
1843 | ||
1844 | data->pwm[CONTROL][index] = adt7475_read(PWM_CONFIG_REG(index)); | |
1845 | ||
9ed5bc24 GR |
1846 | /* |
1847 | * Figure out the internal value for pwmctrl and pwmchan | |
1848 | * based on the current settings | |
1849 | */ | |
1c301fc5 JC |
1850 | v = (data->pwm[CONTROL][index] >> 5) & 7; |
1851 | ||
1852 | if (v == 3) | |
1853 | data->pwmctl[index] = 0; | |
1854 | else if (v == 7) | |
1855 | data->pwmctl[index] = 1; | |
1856 | else if (v == 4) { | |
9ed5bc24 GR |
1857 | /* |
1858 | * The fan is disabled - we don't want to | |
1859 | * support that, so change to manual mode and | |
1860 | * set the duty cycle to 0 instead | |
1861 | */ | |
1c301fc5 JC |
1862 | data->pwm[INPUT][index] = 0; |
1863 | data->pwm[CONTROL][index] &= ~0xE0; | |
1864 | data->pwm[CONTROL][index] |= (7 << 5); | |
1865 | ||
1866 | i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(index), | |
1867 | data->pwm[INPUT][index]); | |
1868 | ||
1869 | i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(index), | |
1870 | data->pwm[CONTROL][index]); | |
1871 | ||
1872 | data->pwmctl[index] = 1; | |
1873 | } else { | |
1874 | data->pwmctl[index] = 2; | |
1875 | ||
1876 | switch (v) { | |
1877 | case 0: | |
1878 | data->pwmchan[index] = 1; | |
1879 | break; | |
1880 | case 1: | |
1881 | data->pwmchan[index] = 2; | |
1882 | break; | |
1883 | case 2: | |
1884 | data->pwmchan[index] = 4; | |
1885 | break; | |
1886 | case 5: | |
1887 | data->pwmchan[index] = 6; | |
1888 | break; | |
1889 | case 6: | |
1890 | data->pwmchan[index] = 7; | |
1891 | break; | |
1892 | } | |
1893 | } | |
1894 | } | |
1895 | ||
702afead | 1896 | static int adt7475_update_measure(struct device *dev) |
1c301fc5 | 1897 | { |
c64fce7f GM |
1898 | struct adt7475_data *data = dev_get_drvdata(dev); |
1899 | struct i2c_client *client = data->client; | |
3d849981 | 1900 | u16 ext; |
1c301fc5 | 1901 | int i; |
702afead TI |
1902 | int ret; |
1903 | ||
1904 | ret = adt7475_read(REG_STATUS2); | |
1905 | if (ret < 0) | |
1906 | return ret; | |
1907 | data->alarms = ret << 8; | |
1c301fc5 | 1908 | |
702afead TI |
1909 | ret = adt7475_read(REG_STATUS1); |
1910 | if (ret < 0) | |
1911 | return ret; | |
1912 | data->alarms |= ret; | |
1913 | ||
1914 | ret = adt7475_read(REG_EXTEND2); | |
1915 | if (ret < 0) | |
1916 | return ret; | |
1917 | ||
1918 | ext = (ret << 8); | |
1919 | ||
1920 | ret = adt7475_read(REG_EXTEND1); | |
1921 | if (ret < 0) | |
1922 | return ret; | |
1923 | ||
1924 | ext |= ret; | |
5cf943ed | 1925 | |
5cf943ed TI |
1926 | for (i = 0; i < ADT7475_VOLTAGE_COUNT; i++) { |
1927 | if (!(data->has_voltage & (1 << i))) | |
1928 | continue; | |
702afead TI |
1929 | ret = adt7475_read(VOLTAGE_REG(i)); |
1930 | if (ret < 0) | |
1931 | return ret; | |
5cf943ed | 1932 | data->voltage[INPUT][i] = |
702afead | 1933 | (ret << 2) | |
5cf943ed TI |
1934 | ((ext >> (i * 2)) & 3); |
1935 | } | |
1c301fc5 | 1936 | |
702afead TI |
1937 | for (i = 0; i < ADT7475_TEMP_COUNT; i++) { |
1938 | ret = adt7475_read(TEMP_REG(i)); | |
1939 | if (ret < 0) | |
1940 | return ret; | |
5cf943ed | 1941 | data->temp[INPUT][i] = |
702afead | 1942 | (ret << 2) | |
5cf943ed | 1943 | ((ext >> ((i + 5) * 2)) & 3); |
702afead | 1944 | } |
54fe4671 | 1945 | |
5cf943ed | 1946 | if (data->has_voltage & (1 << 5)) { |
702afead TI |
1947 | ret = adt7475_read(REG_STATUS4); |
1948 | if (ret < 0) | |
1949 | return ret; | |
1950 | data->alarms |= ret << 24; | |
1951 | ||
1952 | ret = adt7475_read(REG_EXTEND3); | |
1953 | if (ret < 0) | |
1954 | return ret; | |
1955 | ext = ret; | |
1956 | ||
1957 | ret = adt7475_read(REG_VTT); | |
1958 | if (ret < 0) | |
1959 | return ret; | |
1960 | data->voltage[INPUT][5] = ret << 2 | | |
5cf943ed | 1961 | ((ext >> 4) & 3); |
1c301fc5 JC |
1962 | } |
1963 | ||
5cf943ed TI |
1964 | for (i = 0; i < ADT7475_TACH_COUNT; i++) { |
1965 | if (i == 3 && !data->has_fan4) | |
1966 | continue; | |
702afead TI |
1967 | ret = adt7475_read_word(client, TACH_REG(i)); |
1968 | if (ret < 0) | |
1969 | return ret; | |
1970 | data->tach[INPUT][i] = ret; | |
5cf943ed | 1971 | } |
3d849981 | 1972 | |
5cf943ed TI |
1973 | /* Updated by hw when in auto mode */ |
1974 | for (i = 0; i < ADT7475_PWM_COUNT; i++) { | |
1975 | if (i == 1 && !data->has_pwm2) | |
1976 | continue; | |
702afead TI |
1977 | ret = adt7475_read(PWM_REG(i)); |
1978 | if (ret < 0) | |
1979 | return ret; | |
1980 | data->pwm[INPUT][i] = ret; | |
5cf943ed | 1981 | } |
1c301fc5 | 1982 | |
702afead TI |
1983 | if (data->has_vid) { |
1984 | ret = adt7475_read(REG_VID); | |
1985 | if (ret < 0) | |
1986 | return ret; | |
1987 | data->vid = ret & 0x3f; | |
1988 | } | |
1989 | ||
1990 | return 0; | |
5cf943ed | 1991 | } |
1c301fc5 | 1992 | |
5cf943ed TI |
1993 | static struct adt7475_data *adt7475_update_device(struct device *dev) |
1994 | { | |
c64fce7f | 1995 | struct adt7475_data *data = dev_get_drvdata(dev); |
4afec79f | 1996 | int ret; |
1c301fc5 | 1997 | |
5cf943ed | 1998 | mutex_lock(&data->lock); |
1c301fc5 | 1999 | |
5cf943ed TI |
2000 | /* Measurement values update every 2 seconds */ |
2001 | if (time_after(jiffies, data->measure_updated + HZ * 2) || | |
2002 | !data->valid) { | |
4afec79f TI |
2003 | ret = adt7475_update_measure(dev); |
2004 | if (ret) { | |
2005 | data->valid = false; | |
2006 | mutex_unlock(&data->lock); | |
2007 | return ERR_PTR(ret); | |
2008 | } | |
5cf943ed | 2009 | data->measure_updated = jiffies; |
b36fb171 | 2010 | data->valid = true; |
1c301fc5 JC |
2011 | } |
2012 | ||
2013 | mutex_unlock(&data->lock); | |
2014 | ||
2015 | return data; | |
2016 | } | |
2017 | ||
f0967eea | 2018 | module_i2c_driver(adt7475_driver); |
1c301fc5 JC |
2019 | |
2020 | MODULE_AUTHOR("Advanced Micro Devices, Inc"); | |
2021 | MODULE_DESCRIPTION("adt7475 driver"); | |
2022 | MODULE_LICENSE("GPL"); |