Commit | Line | Data |
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2b27bdcc | 1 | // SPDX-License-Identifier: GPL-2.0-only |
b209e047 SR |
2 | /* OMAP SSI driver. |
3 | * | |
4 | * Copyright (C) 2010 Nokia Corporation. All rights reserved. | |
5 | * Copyright (C) 2014 Sebastian Reichel <sre@kernel.org> | |
6 | * | |
7 | * Contact: Carlos Chinea <carlos.chinea@nokia.com> | |
b209e047 SR |
8 | */ |
9 | ||
10 | #include <linux/compiler.h> | |
11 | #include <linux/err.h> | |
12 | #include <linux/ioport.h> | |
13 | #include <linux/io.h> | |
b209e047 SR |
14 | #include <linux/clk.h> |
15 | #include <linux/device.h> | |
16 | #include <linux/platform_device.h> | |
17 | #include <linux/dma-mapping.h> | |
18 | #include <linux/dmaengine.h> | |
19 | #include <linux/delay.h> | |
32a31bd4 | 20 | #include <linux/hsi/ssi_protocol.h> |
b209e047 SR |
21 | #include <linux/seq_file.h> |
22 | #include <linux/scatterlist.h> | |
23 | #include <linux/interrupt.h> | |
24 | #include <linux/spinlock.h> | |
25 | #include <linux/debugfs.h> | |
ac8e3ff3 | 26 | #include <linux/pinctrl/consumer.h> |
b209e047 | 27 | #include <linux/pm_runtime.h> |
7ebf243a | 28 | #include <linux/of.h> |
b209e047 SR |
29 | #include <linux/of_platform.h> |
30 | #include <linux/hsi/hsi.h> | |
31 | #include <linux/idr.h> | |
32 | ||
33 | #include "omap_ssi_regs.h" | |
34 | #include "omap_ssi.h" | |
35 | ||
36 | /* For automatically allocated device IDs */ | |
37 | static DEFINE_IDA(platform_omap_ssi_ida); | |
38 | ||
39 | #ifdef CONFIG_DEBUG_FS | |
3a658e09 | 40 | static int ssi_regs_show(struct seq_file *m, void *p __maybe_unused) |
b209e047 SR |
41 | { |
42 | struct hsi_controller *ssi = m->private; | |
43 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
44 | void __iomem *sys = omap_ssi->sys; | |
45 | ||
46 | pm_runtime_get_sync(ssi->device.parent); | |
47 | seq_printf(m, "REVISION\t: 0x%08x\n", readl(sys + SSI_REVISION_REG)); | |
48 | seq_printf(m, "SYSCONFIG\t: 0x%08x\n", readl(sys + SSI_SYSCONFIG_REG)); | |
49 | seq_printf(m, "SYSSTATUS\t: 0x%08x\n", readl(sys + SSI_SYSSTATUS_REG)); | |
ea88f717 | 50 | pm_runtime_put(ssi->device.parent); |
b209e047 SR |
51 | |
52 | return 0; | |
53 | } | |
54 | ||
3a658e09 | 55 | static int ssi_gdd_regs_show(struct seq_file *m, void *p __maybe_unused) |
b209e047 SR |
56 | { |
57 | struct hsi_controller *ssi = m->private; | |
58 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
59 | void __iomem *gdd = omap_ssi->gdd; | |
60 | void __iomem *sys = omap_ssi->sys; | |
61 | int lch; | |
62 | ||
63 | pm_runtime_get_sync(ssi->device.parent); | |
64 | ||
65 | seq_printf(m, "GDD_MPU_STATUS\t: 0x%08x\n", | |
66 | readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG)); | |
67 | seq_printf(m, "GDD_MPU_ENABLE\t: 0x%08x\n\n", | |
68 | readl(sys + SSI_GDD_MPU_IRQ_ENABLE_REG)); | |
69 | seq_printf(m, "HW_ID\t\t: 0x%08x\n", | |
70 | readl(gdd + SSI_GDD_HW_ID_REG)); | |
71 | seq_printf(m, "PPORT_ID\t: 0x%08x\n", | |
72 | readl(gdd + SSI_GDD_PPORT_ID_REG)); | |
73 | seq_printf(m, "MPORT_ID\t: 0x%08x\n", | |
74 | readl(gdd + SSI_GDD_MPORT_ID_REG)); | |
75 | seq_printf(m, "TEST\t\t: 0x%08x\n", | |
76 | readl(gdd + SSI_GDD_TEST_REG)); | |
77 | seq_printf(m, "GCR\t\t: 0x%08x\n", | |
78 | readl(gdd + SSI_GDD_GCR_REG)); | |
79 | ||
80 | for (lch = 0; lch < SSI_MAX_GDD_LCH; lch++) { | |
81 | seq_printf(m, "\nGDD LCH %d\n=========\n", lch); | |
82 | seq_printf(m, "CSDP\t\t: 0x%04x\n", | |
83 | readw(gdd + SSI_GDD_CSDP_REG(lch))); | |
84 | seq_printf(m, "CCR\t\t: 0x%04x\n", | |
85 | readw(gdd + SSI_GDD_CCR_REG(lch))); | |
86 | seq_printf(m, "CICR\t\t: 0x%04x\n", | |
87 | readw(gdd + SSI_GDD_CICR_REG(lch))); | |
88 | seq_printf(m, "CSR\t\t: 0x%04x\n", | |
89 | readw(gdd + SSI_GDD_CSR_REG(lch))); | |
90 | seq_printf(m, "CSSA\t\t: 0x%08x\n", | |
91 | readl(gdd + SSI_GDD_CSSA_REG(lch))); | |
92 | seq_printf(m, "CDSA\t\t: 0x%08x\n", | |
93 | readl(gdd + SSI_GDD_CDSA_REG(lch))); | |
94 | seq_printf(m, "CEN\t\t: 0x%04x\n", | |
95 | readw(gdd + SSI_GDD_CEN_REG(lch))); | |
96 | seq_printf(m, "CSAC\t\t: 0x%04x\n", | |
97 | readw(gdd + SSI_GDD_CSAC_REG(lch))); | |
98 | seq_printf(m, "CDAC\t\t: 0x%04x\n", | |
99 | readw(gdd + SSI_GDD_CDAC_REG(lch))); | |
100 | seq_printf(m, "CLNK_CTRL\t: 0x%04x\n", | |
101 | readw(gdd + SSI_GDD_CLNK_CTRL_REG(lch))); | |
102 | } | |
103 | ||
ea88f717 | 104 | pm_runtime_put(ssi->device.parent); |
b209e047 SR |
105 | |
106 | return 0; | |
107 | } | |
108 | ||
3a658e09 YL |
109 | DEFINE_SHOW_ATTRIBUTE(ssi_regs); |
110 | DEFINE_SHOW_ATTRIBUTE(ssi_gdd_regs); | |
b209e047 | 111 | |
0845e1f2 | 112 | static int ssi_debug_add_ctrl(struct hsi_controller *ssi) |
b209e047 SR |
113 | { |
114 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
115 | struct dentry *dir; | |
116 | ||
117 | /* SSI controller */ | |
118 | omap_ssi->dir = debugfs_create_dir(dev_name(&ssi->device), NULL); | |
3fd276e9 WY |
119 | if (!omap_ssi->dir) |
120 | return -ENOMEM; | |
b209e047 SR |
121 | |
122 | debugfs_create_file("regs", S_IRUGO, omap_ssi->dir, ssi, | |
123 | &ssi_regs_fops); | |
124 | /* SSI GDD (DMA) */ | |
125 | dir = debugfs_create_dir("gdd", omap_ssi->dir); | |
3fd276e9 | 126 | if (!dir) |
b209e047 SR |
127 | goto rback; |
128 | debugfs_create_file("regs", S_IRUGO, dir, ssi, &ssi_gdd_regs_fops); | |
129 | ||
130 | return 0; | |
131 | rback: | |
132 | debugfs_remove_recursive(omap_ssi->dir); | |
133 | ||
3fd276e9 | 134 | return -ENOMEM; |
b209e047 SR |
135 | } |
136 | ||
137 | static void ssi_debug_remove_ctrl(struct hsi_controller *ssi) | |
138 | { | |
139 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
140 | ||
141 | debugfs_remove_recursive(omap_ssi->dir); | |
142 | } | |
143 | #endif /* CONFIG_DEBUG_FS */ | |
144 | ||
145 | /* | |
146 | * FIXME: Horrible HACK needed until we remove the useless wakeline test | |
147 | * in the CMT. To be removed !!!! | |
148 | */ | |
149 | void ssi_waketest(struct hsi_client *cl, unsigned int enable) | |
150 | { | |
151 | struct hsi_port *port = hsi_get_port(cl); | |
152 | struct omap_ssi_port *omap_port = hsi_port_drvdata(port); | |
153 | struct hsi_controller *ssi = to_hsi_controller(port->device.parent); | |
154 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
155 | ||
156 | omap_port->wktest = !!enable; | |
157 | if (omap_port->wktest) { | |
158 | pm_runtime_get_sync(ssi->device.parent); | |
159 | writel_relaxed(SSI_WAKE(0), | |
160 | omap_ssi->sys + SSI_SET_WAKE_REG(port->num)); | |
161 | } else { | |
162 | writel_relaxed(SSI_WAKE(0), | |
163 | omap_ssi->sys + SSI_CLEAR_WAKE_REG(port->num)); | |
ea88f717 | 164 | pm_runtime_put(ssi->device.parent); |
b209e047 SR |
165 | } |
166 | } | |
167 | EXPORT_SYMBOL_GPL(ssi_waketest); | |
168 | ||
169 | static void ssi_gdd_complete(struct hsi_controller *ssi, unsigned int lch) | |
170 | { | |
171 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
172 | struct hsi_msg *msg = omap_ssi->gdd_trn[lch].msg; | |
173 | struct hsi_port *port = to_hsi_port(msg->cl->device.parent); | |
174 | struct omap_ssi_port *omap_port = hsi_port_drvdata(port); | |
175 | unsigned int dir; | |
176 | u32 csr; | |
177 | u32 val; | |
178 | ||
179 | spin_lock(&omap_ssi->lock); | |
180 | ||
181 | val = readl(omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG); | |
182 | val &= ~SSI_GDD_LCH(lch); | |
183 | writel_relaxed(val, omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG); | |
184 | ||
185 | if (msg->ttype == HSI_MSG_READ) { | |
186 | dir = DMA_FROM_DEVICE; | |
187 | val = SSI_DATAAVAILABLE(msg->channel); | |
ea88f717 | 188 | pm_runtime_put(omap_port->pdev); |
b209e047 SR |
189 | } else { |
190 | dir = DMA_TO_DEVICE; | |
191 | val = SSI_DATAACCEPT(msg->channel); | |
192 | /* Keep clocks reference for write pio event */ | |
193 | } | |
194 | dma_unmap_sg(&ssi->device, msg->sgt.sgl, msg->sgt.nents, dir); | |
195 | csr = readw(omap_ssi->gdd + SSI_GDD_CSR_REG(lch)); | |
196 | omap_ssi->gdd_trn[lch].msg = NULL; /* release GDD lch */ | |
197 | dev_dbg(&port->device, "DMA completed ch %d ttype %d\n", | |
198 | msg->channel, msg->ttype); | |
199 | spin_unlock(&omap_ssi->lock); | |
200 | if (csr & SSI_CSR_TOUR) { /* Timeout error */ | |
201 | msg->status = HSI_STATUS_ERROR; | |
202 | msg->actual_len = 0; | |
203 | spin_lock(&omap_port->lock); | |
204 | list_del(&msg->link); /* Dequeue msg */ | |
205 | spin_unlock(&omap_port->lock); | |
4e552310 SR |
206 | |
207 | list_add_tail(&msg->link, &omap_port->errqueue); | |
208 | schedule_delayed_work(&omap_port->errqueue_work, 0); | |
b209e047 SR |
209 | return; |
210 | } | |
211 | spin_lock(&omap_port->lock); | |
212 | val |= readl(omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0)); | |
213 | writel_relaxed(val, omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0)); | |
214 | spin_unlock(&omap_port->lock); | |
215 | ||
216 | msg->status = HSI_STATUS_COMPLETED; | |
217 | msg->actual_len = sg_dma_len(msg->sgt.sgl); | |
218 | } | |
219 | ||
220 | static void ssi_gdd_tasklet(unsigned long dev) | |
221 | { | |
222 | struct hsi_controller *ssi = (struct hsi_controller *)dev; | |
223 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
224 | void __iomem *sys = omap_ssi->sys; | |
225 | unsigned int lch; | |
226 | u32 status_reg; | |
227 | ||
927d3f8f SR |
228 | pm_runtime_get(ssi->device.parent); |
229 | ||
230 | if (!pm_runtime_active(ssi->device.parent)) { | |
231 | dev_warn(ssi->device.parent, "ssi_gdd_tasklet called without runtime PM!\n"); | |
232 | pm_runtime_put(ssi->device.parent); | |
233 | return; | |
234 | } | |
b209e047 SR |
235 | |
236 | status_reg = readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG); | |
237 | for (lch = 0; lch < SSI_MAX_GDD_LCH; lch++) { | |
238 | if (status_reg & SSI_GDD_LCH(lch)) | |
239 | ssi_gdd_complete(ssi, lch); | |
240 | } | |
241 | writel_relaxed(status_reg, sys + SSI_GDD_MPU_IRQ_STATUS_REG); | |
242 | status_reg = readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG); | |
243 | ||
ea88f717 | 244 | pm_runtime_put(ssi->device.parent); |
b209e047 SR |
245 | |
246 | if (status_reg) | |
247 | tasklet_hi_schedule(&omap_ssi->gdd_tasklet); | |
248 | else | |
249 | enable_irq(omap_ssi->gdd_irq); | |
250 | ||
251 | } | |
252 | ||
253 | static irqreturn_t ssi_gdd_isr(int irq, void *ssi) | |
254 | { | |
255 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
256 | ||
257 | tasklet_hi_schedule(&omap_ssi->gdd_tasklet); | |
258 | disable_irq_nosync(irq); | |
259 | ||
260 | return IRQ_HANDLED; | |
261 | } | |
262 | ||
263 | static unsigned long ssi_get_clk_rate(struct hsi_controller *ssi) | |
264 | { | |
265 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
266 | unsigned long rate = clk_get_rate(omap_ssi->fck); | |
267 | return rate; | |
268 | } | |
269 | ||
4bcf7414 SR |
270 | static int ssi_clk_event(struct notifier_block *nb, unsigned long event, |
271 | void *data) | |
272 | { | |
273 | struct omap_ssi_controller *omap_ssi = container_of(nb, | |
274 | struct omap_ssi_controller, fck_nb); | |
275 | struct hsi_controller *ssi = to_hsi_controller(omap_ssi->dev); | |
276 | struct clk_notifier_data *clk_data = data; | |
277 | struct omap_ssi_port *omap_port; | |
278 | int i; | |
279 | ||
280 | switch (event) { | |
281 | case PRE_RATE_CHANGE: | |
282 | dev_dbg(&ssi->device, "pre rate change\n"); | |
283 | ||
284 | for (i = 0; i < ssi->num_ports; i++) { | |
285 | omap_port = omap_ssi->port[i]; | |
286 | ||
287 | if (!omap_port) | |
288 | continue; | |
289 | ||
290 | /* Workaround for SWBREAK + CAwake down race in CMT */ | |
cb70e4c1 | 291 | disable_irq(omap_port->wake_irq); |
4bcf7414 SR |
292 | |
293 | /* stop all ssi communication */ | |
294 | pinctrl_pm_select_idle_state(omap_port->pdev); | |
295 | udelay(1); /* wait for racing frames */ | |
296 | } | |
297 | ||
298 | break; | |
299 | case ABORT_RATE_CHANGE: | |
300 | dev_dbg(&ssi->device, "abort rate change\n"); | |
df561f66 | 301 | fallthrough; |
4bcf7414 SR |
302 | case POST_RATE_CHANGE: |
303 | dev_dbg(&ssi->device, "post rate change (%lu -> %lu)\n", | |
304 | clk_data->old_rate, clk_data->new_rate); | |
3210b4fc | 305 | omap_ssi->fck_rate = DIV_ROUND_CLOSEST(clk_data->new_rate, 1000); /* kHz */ |
4bcf7414 SR |
306 | |
307 | for (i = 0; i < ssi->num_ports; i++) { | |
308 | omap_port = omap_ssi->port[i]; | |
309 | ||
310 | if (!omap_port) | |
311 | continue; | |
312 | ||
313 | omap_ssi_port_update_fclk(ssi, omap_port); | |
314 | ||
315 | /* resume ssi communication */ | |
316 | pinctrl_pm_select_default_state(omap_port->pdev); | |
cb70e4c1 | 317 | enable_irq(omap_port->wake_irq); |
4bcf7414 SR |
318 | } |
319 | ||
320 | break; | |
321 | default: | |
322 | break; | |
323 | } | |
324 | ||
325 | return NOTIFY_DONE; | |
326 | } | |
327 | ||
0845e1f2 | 328 | static int ssi_get_iomem(struct platform_device *pd, |
b209e047 SR |
329 | const char *name, void __iomem **pbase, dma_addr_t *phy) |
330 | { | |
331 | struct resource *mem; | |
b209e047 SR |
332 | void __iomem *base; |
333 | struct hsi_controller *ssi = platform_get_drvdata(pd); | |
334 | ||
335 | mem = platform_get_resource_byname(pd, IORESOURCE_MEM, name); | |
16bd5865 SS |
336 | base = devm_ioremap_resource(&ssi->device, mem); |
337 | if (IS_ERR(base)) | |
338 | return PTR_ERR(base); | |
339 | ||
b209e047 SR |
340 | *pbase = base; |
341 | ||
342 | if (phy) | |
343 | *phy = mem->start; | |
344 | ||
345 | return 0; | |
346 | } | |
347 | ||
0845e1f2 | 348 | static int ssi_add_controller(struct hsi_controller *ssi, |
b209e047 SR |
349 | struct platform_device *pd) |
350 | { | |
351 | struct omap_ssi_controller *omap_ssi; | |
352 | int err; | |
353 | ||
354 | omap_ssi = devm_kzalloc(&ssi->device, sizeof(*omap_ssi), GFP_KERNEL); | |
0fbad7c8 | 355 | if (!omap_ssi) |
b209e047 | 356 | return -ENOMEM; |
b209e047 | 357 | |
fa72d143 | 358 | err = ida_alloc(&platform_omap_ssi_ida, GFP_KERNEL); |
6bf6ded3 | 359 | if (err < 0) |
41fff6e1 | 360 | return err; |
6bf6ded3 | 361 | ssi->id = err; |
b209e047 SR |
362 | |
363 | ssi->owner = THIS_MODULE; | |
364 | ssi->device.parent = &pd->dev; | |
365 | dev_set_name(&ssi->device, "ssi%d", ssi->id); | |
366 | hsi_controller_set_drvdata(ssi, omap_ssi); | |
367 | omap_ssi->dev = &ssi->device; | |
368 | err = ssi_get_iomem(pd, "sys", &omap_ssi->sys, NULL); | |
369 | if (err < 0) | |
370 | goto out_err; | |
371 | err = ssi_get_iomem(pd, "gdd", &omap_ssi->gdd, NULL); | |
372 | if (err < 0) | |
373 | goto out_err; | |
b74d4954 | 374 | err = platform_get_irq_byname(pd, "gdd_mpu"); |
c1030cd4 | 375 | if (err < 0) |
b209e047 | 376 | goto out_err; |
b74d4954 | 377 | omap_ssi->gdd_irq = err; |
b209e047 SR |
378 | tasklet_init(&omap_ssi->gdd_tasklet, ssi_gdd_tasklet, |
379 | (unsigned long)ssi); | |
380 | err = devm_request_irq(&ssi->device, omap_ssi->gdd_irq, ssi_gdd_isr, | |
381 | 0, "gdd_mpu", ssi); | |
382 | if (err < 0) { | |
383 | dev_err(&ssi->device, "Request GDD IRQ %d failed (%d)", | |
384 | omap_ssi->gdd_irq, err); | |
385 | goto out_err; | |
386 | } | |
387 | ||
4a8557de ME |
388 | omap_ssi->port = devm_kcalloc(&ssi->device, ssi->num_ports, |
389 | sizeof(*omap_ssi->port), GFP_KERNEL); | |
b209e047 SR |
390 | if (!omap_ssi->port) { |
391 | err = -ENOMEM; | |
392 | goto out_err; | |
393 | } | |
394 | ||
395 | omap_ssi->fck = devm_clk_get(&ssi->device, "ssi_ssr_fck"); | |
396 | if (IS_ERR(omap_ssi->fck)) { | |
397 | dev_err(&pd->dev, "Could not acquire clock \"ssi_ssr_fck\": %li\n", | |
398 | PTR_ERR(omap_ssi->fck)); | |
399 | err = -ENODEV; | |
400 | goto out_err; | |
401 | } | |
402 | ||
4bcf7414 SR |
403 | omap_ssi->fck_nb.notifier_call = ssi_clk_event; |
404 | omap_ssi->fck_nb.priority = INT_MAX; | |
405 | clk_notifier_register(omap_ssi->fck, &omap_ssi->fck_nb); | |
406 | ||
b209e047 SR |
407 | /* TODO: find register, which can be used to detect context loss */ |
408 | omap_ssi->get_loss = NULL; | |
409 | ||
410 | omap_ssi->max_speed = UINT_MAX; | |
411 | spin_lock_init(&omap_ssi->lock); | |
412 | err = hsi_register_controller(ssi); | |
413 | ||
414 | if (err < 0) | |
415 | goto out_err; | |
416 | ||
417 | return 0; | |
418 | ||
419 | out_err: | |
fa72d143 | 420 | ida_free(&platform_omap_ssi_ida, ssi->id); |
b209e047 SR |
421 | return err; |
422 | } | |
423 | ||
0845e1f2 | 424 | static int ssi_hw_init(struct hsi_controller *ssi) |
b209e047 SR |
425 | { |
426 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
b209e047 SR |
427 | int err; |
428 | ||
aa57e77b | 429 | err = pm_runtime_resume_and_get(ssi->device.parent); |
b209e047 SR |
430 | if (err < 0) { |
431 | dev_err(&ssi->device, "runtime PM failed %d\n", err); | |
432 | return err; | |
433 | } | |
8621e620 | 434 | /* Resetting GDD */ |
b209e047 | 435 | writel_relaxed(SSI_SWRESET, omap_ssi->gdd + SSI_GDD_GRST_REG); |
3210b4fc | 436 | /* Get FCK rate in kHz */ |
b209e047 | 437 | omap_ssi->fck_rate = DIV_ROUND_CLOSEST(ssi_get_clk_rate(ssi), 1000); |
3210b4fc | 438 | dev_dbg(&ssi->device, "SSI fck rate %lu kHz\n", omap_ssi->fck_rate); |
b6616be3 | 439 | |
b209e047 SR |
440 | writel_relaxed(SSI_CLK_AUTOGATING_ON, omap_ssi->sys + SSI_GDD_GCR_REG); |
441 | omap_ssi->gdd_gcr = SSI_CLK_AUTOGATING_ON; | |
442 | pm_runtime_put_sync(ssi->device.parent); | |
443 | ||
444 | return 0; | |
445 | } | |
446 | ||
447 | static void ssi_remove_controller(struct hsi_controller *ssi) | |
448 | { | |
449 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
450 | int id = ssi->id; | |
451 | tasklet_kill(&omap_ssi->gdd_tasklet); | |
452 | hsi_unregister_controller(ssi); | |
4bcf7414 | 453 | clk_notifier_unregister(omap_ssi->fck, &omap_ssi->fck_nb); |
fa72d143 | 454 | ida_free(&platform_omap_ssi_ida, id); |
b209e047 SR |
455 | } |
456 | ||
457 | static inline int ssi_of_get_available_ports_count(const struct device_node *np) | |
458 | { | |
459 | struct device_node *child; | |
460 | int num = 0; | |
461 | ||
462 | for_each_available_child_of_node(np, child) | |
463 | if (of_device_is_compatible(child, "ti,omap3-ssi-port")) | |
464 | num++; | |
465 | ||
466 | return num; | |
467 | } | |
468 | ||
469 | static int ssi_remove_ports(struct device *dev, void *c) | |
470 | { | |
471 | struct platform_device *pdev = to_platform_device(dev); | |
472 | ||
2a57aba8 SR |
473 | if (!dev->of_node) |
474 | return 0; | |
475 | ||
476 | of_node_clear_flag(dev->of_node, OF_POPULATED); | |
b209e047 SR |
477 | of_device_unregister(pdev); |
478 | ||
479 | return 0; | |
480 | } | |
481 | ||
0845e1f2 | 482 | static int ssi_probe(struct platform_device *pd) |
b209e047 SR |
483 | { |
484 | struct platform_device *childpdev; | |
485 | struct device_node *np = pd->dev.of_node; | |
486 | struct device_node *child; | |
487 | struct hsi_controller *ssi; | |
488 | int err; | |
489 | int num_ports; | |
490 | ||
491 | if (!np) { | |
492 | dev_err(&pd->dev, "missing device tree data\n"); | |
493 | return -EINVAL; | |
494 | } | |
495 | ||
496 | num_ports = ssi_of_get_available_ports_count(np); | |
497 | ||
498 | ssi = hsi_alloc_controller(num_ports, GFP_KERNEL); | |
499 | if (!ssi) { | |
500 | dev_err(&pd->dev, "No memory for controller\n"); | |
501 | return -ENOMEM; | |
502 | } | |
503 | ||
504 | platform_set_drvdata(pd, ssi); | |
505 | ||
506 | err = ssi_add_controller(ssi, pd); | |
1aff514e YY |
507 | if (err < 0) { |
508 | hsi_put_controller(ssi); | |
b209e047 | 509 | goto out1; |
1aff514e | 510 | } |
b209e047 | 511 | |
b209e047 SR |
512 | pm_runtime_enable(&pd->dev); |
513 | ||
514 | err = ssi_hw_init(ssi); | |
515 | if (err < 0) | |
516 | goto out2; | |
517 | #ifdef CONFIG_DEBUG_FS | |
518 | err = ssi_debug_add_ctrl(ssi); | |
519 | if (err < 0) | |
520 | goto out2; | |
521 | #endif | |
522 | ||
523 | for_each_available_child_of_node(np, child) { | |
524 | if (!of_device_is_compatible(child, "ti,omap3-ssi-port")) | |
525 | continue; | |
526 | ||
527 | childpdev = of_platform_device_create(child, NULL, &pd->dev); | |
528 | if (!childpdev) { | |
529 | err = -ENODEV; | |
530 | dev_err(&pd->dev, "failed to create ssi controller port\n"); | |
9a2ea132 | 531 | of_node_put(child); |
b209e047 SR |
532 | goto out3; |
533 | } | |
534 | } | |
535 | ||
536 | dev_info(&pd->dev, "ssi controller %d initialized (%d ports)!\n", | |
537 | ssi->id, num_ports); | |
538 | return err; | |
539 | out3: | |
540 | device_for_each_child(&pd->dev, NULL, ssi_remove_ports); | |
541 | out2: | |
542 | ssi_remove_controller(ssi); | |
f5181c35 | 543 | pm_runtime_disable(&pd->dev); |
b209e047 SR |
544 | out1: |
545 | platform_set_drvdata(pd, NULL); | |
b209e047 SR |
546 | |
547 | return err; | |
548 | } | |
549 | ||
94eabddc | 550 | static void ssi_remove(struct platform_device *pd) |
b209e047 SR |
551 | { |
552 | struct hsi_controller *ssi = platform_get_drvdata(pd); | |
553 | ||
f704e110 SR |
554 | /* cleanup of of_platform_populate() call */ |
555 | device_for_each_child(&pd->dev, NULL, ssi_remove_ports); | |
556 | ||
b209e047 SR |
557 | #ifdef CONFIG_DEBUG_FS |
558 | ssi_debug_remove_ctrl(ssi); | |
559 | #endif | |
560 | ssi_remove_controller(ssi); | |
561 | platform_set_drvdata(pd, NULL); | |
562 | ||
563 | pm_runtime_disable(&pd->dev); | |
b209e047 SR |
564 | } |
565 | ||
96a1c18a | 566 | #ifdef CONFIG_PM |
b209e047 SR |
567 | static int omap_ssi_runtime_suspend(struct device *dev) |
568 | { | |
569 | struct hsi_controller *ssi = dev_get_drvdata(dev); | |
570 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
571 | ||
572 | dev_dbg(dev, "runtime suspend!\n"); | |
573 | ||
574 | if (omap_ssi->get_loss) | |
575 | omap_ssi->loss_count = | |
576 | omap_ssi->get_loss(ssi->device.parent); | |
577 | ||
578 | return 0; | |
579 | } | |
580 | ||
581 | static int omap_ssi_runtime_resume(struct device *dev) | |
582 | { | |
583 | struct hsi_controller *ssi = dev_get_drvdata(dev); | |
584 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | |
585 | ||
586 | dev_dbg(dev, "runtime resume!\n"); | |
587 | ||
588 | if ((omap_ssi->get_loss) && (omap_ssi->loss_count == | |
589 | omap_ssi->get_loss(ssi->device.parent))) | |
590 | return 0; | |
591 | ||
592 | writel_relaxed(omap_ssi->gdd_gcr, omap_ssi->gdd + SSI_GDD_GCR_REG); | |
593 | ||
594 | return 0; | |
595 | } | |
596 | ||
597 | static const struct dev_pm_ops omap_ssi_pm_ops = { | |
598 | SET_RUNTIME_PM_OPS(omap_ssi_runtime_suspend, omap_ssi_runtime_resume, | |
599 | NULL) | |
600 | }; | |
601 | ||
602 | #define DEV_PM_OPS (&omap_ssi_pm_ops) | |
603 | #else | |
604 | #define DEV_PM_OPS NULL | |
605 | #endif | |
606 | ||
607 | #ifdef CONFIG_OF | |
608 | static const struct of_device_id omap_ssi_of_match[] = { | |
609 | { .compatible = "ti,omap3-ssi", }, | |
610 | {}, | |
611 | }; | |
612 | MODULE_DEVICE_TABLE(of, omap_ssi_of_match); | |
613 | #else | |
614 | #define omap_ssi_of_match NULL | |
615 | #endif | |
616 | ||
617 | static struct platform_driver ssi_pdriver = { | |
0845e1f2 | 618 | .probe = ssi_probe, |
94eabddc | 619 | .remove_new = ssi_remove, |
b209e047 SR |
620 | .driver = { |
621 | .name = "omap_ssi", | |
b209e047 SR |
622 | .pm = DEV_PM_OPS, |
623 | .of_match_table = omap_ssi_of_match, | |
624 | }, | |
625 | }; | |
626 | ||
0fae1989 SR |
627 | static int __init ssi_init(void) { |
628 | int ret; | |
629 | ||
630 | ret = platform_driver_register(&ssi_pdriver); | |
631 | if (ret) | |
632 | return ret; | |
633 | ||
3ffa9f71 YC |
634 | ret = platform_driver_register(&ssi_port_pdriver); |
635 | if (ret) { | |
636 | platform_driver_unregister(&ssi_pdriver); | |
637 | return ret; | |
638 | } | |
639 | ||
640 | return 0; | |
0fae1989 SR |
641 | } |
642 | module_init(ssi_init); | |
643 | ||
644 | static void __exit ssi_exit(void) { | |
645 | platform_driver_unregister(&ssi_port_pdriver); | |
646 | platform_driver_unregister(&ssi_pdriver); | |
647 | } | |
648 | module_exit(ssi_exit); | |
b209e047 SR |
649 | |
650 | MODULE_ALIAS("platform:omap_ssi"); | |
651 | MODULE_AUTHOR("Carlos Chinea <carlos.chinea@nokia.com>"); | |
652 | MODULE_AUTHOR("Sebastian Reichel <sre@kernel.org>"); | |
653 | MODULE_DESCRIPTION("Synchronous Serial Interface Driver"); | |
654 | MODULE_LICENSE("GPL v2"); |