[linux-2.6-block.git] / drivers / gpu / ipu-v3 / ipu-smfc.c

/*
 * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */
#define DEBUG
#include <linux/export.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/errno.h>
#include <linux/spinlock.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <video/imx-ipu-v3.h>

#include "ipu-prv.h"

struct ipu_smfc_priv {
	void __iomem *base;
	spinlock_t lock;
};

/*SMFC Registers */
#define SMFC_MAP	0x0000
#define SMFC_WMC	0x0004
#define SMFC_BS		0x0008

int ipu_smfc_set_burstsize(struct ipu_soc *ipu, int channel, int burstsize)
{
	struct ipu_smfc_priv *smfc = ipu->smfc_priv;
	unsigned long flags;
	u32 val, shift;

	spin_lock_irqsave(&smfc->lock, flags);

	shift = channel * 4;
	val = readl(smfc->base + SMFC_BS);
	val &= ~(0xf << shift);
	val |= burstsize << shift;
	writel(val, smfc->base + SMFC_BS);

	spin_unlock_irqrestore(&smfc->lock, flags);

	return 0;
}
EXPORT_SYMBOL_GPL(ipu_smfc_set_burstsize);

int ipu_smfc_map_channel(struct ipu_soc *ipu, int channel, int csi_id, int mipi_id)
{
	struct ipu_smfc_priv *smfc = ipu->smfc_priv;
	unsigned long flags;
	u32 val, shift;

	spin_lock_irqsave(&smfc->lock, flags);

	shift = channel * 3;
	val = readl(smfc->base + SMFC_MAP);
	val &= ~(0x7 << shift);
	val |= ((csi_id << 2) | mipi_id) << shift;
	writel(val, smfc->base + SMFC_MAP);

	spin_unlock_irqrestore(&smfc->lock, flags);

	return 0;
}
EXPORT_SYMBOL_GPL(ipu_smfc_map_channel);

int ipu_smfc_enable(struct ipu_soc *ipu)
{
	return ipu_module_enable(ipu, IPU_CONF_SMFC_EN);
}
EXPORT_SYMBOL_GPL(ipu_smfc_enable);

int ipu_smfc_disable(struct ipu_soc *ipu)
{
	return ipu_module_disable(ipu, IPU_CONF_SMFC_EN);
}
EXPORT_SYMBOL_GPL(ipu_smfc_disable);

int ipu_smfc_init(struct ipu_soc *ipu, struct device *dev,
		  unsigned long base)
{
	struct ipu_smfc_priv *smfc;

	smfc = devm_kzalloc(dev, sizeof(*smfc), GFP_KERNEL);
	if (!smfc)
		return -ENOMEM;

	ipu->smfc_priv = smfc;
	spin_lock_init(&smfc->lock);

	smfc->base = devm_ioremap(dev, base, PAGE_SIZE);
	if (!smfc->base)
		return -ENOMEM;

	pr_debug("%s: ioremap 0x%08lx -> %p\n", __func__, base, smfc->base);

	return 0;
}

void ipu_smfc_exit(struct ipu_soc *ipu)
{
}
Commit	Line	Data
35de925f PZ	1	/*
	2	* Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11	#define DEBUG
	12	#include <linux/export.h>
	13	#include <linux/types.h>
	14	#include <linux/init.h>
	15	#include <linux/io.h>
	16	#include <linux/errno.h>
	17	#include <linux/spinlock.h>
	18	#include <linux/delay.h>
	19	#include <linux/clk.h>
	20	#include <video/imx-ipu-v3.h>
	21
	22	#include "ipu-prv.h"
	23
	24	struct ipu_smfc_priv {
	25	void __iomem *base;
	26	spinlock_t lock;
	27	};
	28
	29	/SMFC Registers /
	30	#define SMFC_MAP 0x0000
	31	#define SMFC_WMC 0x0004
	32	#define SMFC_BS 0x0008
	33
	34	int ipu_smfc_set_burstsize(struct ipu_soc *ipu, int channel, int burstsize)
	35	{
	36	struct ipu_smfc_priv *smfc = ipu->smfc_priv;
	37	unsigned long flags;
	38	u32 val, shift;
	39
	40	spin_lock_irqsave(&smfc->lock, flags);
	41
	42	shift = channel * 4;
	43	val = readl(smfc->base + SMFC_BS);
	44	val &= ~(0xf << shift);
	45	val \|= burstsize << shift;
	46	writel(val, smfc->base + SMFC_BS);
	47
	48	spin_unlock_irqrestore(&smfc->lock, flags);
	49
	50	return 0;
	51	}
	52	EXPORT_SYMBOL_GPL(ipu_smfc_set_burstsize);
	53
	54	int ipu_smfc_map_channel(struct ipu_soc *ipu, int channel, int csi_id, int mipi_id)
	55	{
	56	struct ipu_smfc_priv *smfc = ipu->smfc_priv;
	57	unsigned long flags;
	58	u32 val, shift;
	59
	60	spin_lock_irqsave(&smfc->lock, flags);
	61
	62	shift = channel * 3;
	63	val = readl(smfc->base + SMFC_MAP);
	64	val &= ~(0x7 << shift);
65	val \|= ((csi_id << 2) \| mipi_id) << shift;
66	writel(val, smfc->base + SMFC_MAP);
67
68	spin_unlock_irqrestore(&smfc->lock, flags);
69
70	return 0;
71	}
72	EXPORT_SYMBOL_GPL(ipu_smfc_map_channel);
73
fc435355 SL	74	int ipu_smfc_enable(struct ipu_soc *ipu)
	75	{
	76	return ipu_module_enable(ipu, IPU_CONF_SMFC_EN);
	77	}
	78	EXPORT_SYMBOL_GPL(ipu_smfc_enable);
	79
	80	int ipu_smfc_disable(struct ipu_soc *ipu)
	81	{
	82	return ipu_module_disable(ipu, IPU_CONF_SMFC_EN);
	83	}
	84	EXPORT_SYMBOL_GPL(ipu_smfc_disable);
	85
35de925f PZ	86	int ipu_smfc_init(struct ipu_soc ipu, struct device dev,
	87	unsigned long base)
	88	{
	89	struct ipu_smfc_priv *smfc;
	90
	91	smfc = devm_kzalloc(dev, sizeof(*smfc), GFP_KERNEL);
	92	if (!smfc)
	93	return -ENOMEM;
	94
	95	ipu->smfc_priv = smfc;
	96	spin_lock_init(&smfc->lock);
	97
	98	smfc->base = devm_ioremap(dev, base, PAGE_SIZE);
	99	if (!smfc->base)
	100	return -ENOMEM;
	101
	102	pr_debug("%s: ioremap 0x%08lx -> %p\n", __func__, base, smfc->base);
	103
	104	return 0;
	105	}
	106
	107	void ipu_smfc_exit(struct ipu_soc *ipu)
	108	{
	109	}