Commit | Line | Data |
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d8f4a9ed TR |
1 | /* |
2 | * Copyright (C) 2012 Avionic Design GmbH | |
d43f81cb | 3 | * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved. |
d8f4a9ed TR |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | */ | |
9 | ||
4231c6b0 TB |
10 | #ifndef HOST1X_DRM_H |
11 | #define HOST1X_DRM_H 1 | |
d8f4a9ed TR |
12 | |
13 | #include <drm/drmP.h> | |
14 | #include <drm/drm_crtc_helper.h> | |
15 | #include <drm/drm_edid.h> | |
16 | #include <drm/drm_fb_helper.h> | |
d8f4a9ed | 17 | #include <drm/drm_fixed.h> |
d43f81cb TB |
18 | #include <uapi/drm/tegra_drm.h> |
19 | ||
20 | #include "host1x.h" | |
d8f4a9ed | 21 | |
de2ba664 AM |
22 | struct tegra_fb { |
23 | struct drm_framebuffer base; | |
24 | struct tegra_bo **planes; | |
25 | unsigned int num_planes; | |
26 | }; | |
27 | ||
28 | struct tegra_fbdev { | |
29 | struct drm_fb_helper base; | |
30 | struct tegra_fb *fb; | |
31 | }; | |
32 | ||
c89c0ea6 | 33 | struct host1x_drm { |
d8f4a9ed TR |
34 | struct drm_device *drm; |
35 | struct device *dev; | |
d8f4a9ed TR |
36 | |
37 | struct mutex drm_clients_lock; | |
38 | struct list_head drm_clients; | |
39 | struct list_head drm_active; | |
40 | ||
41 | struct mutex clients_lock; | |
42 | struct list_head clients; | |
43 | ||
de2ba664 | 44 | struct tegra_fbdev *fbdev; |
d8f4a9ed TR |
45 | }; |
46 | ||
47 | struct host1x_client; | |
48 | ||
d43f81cb TB |
49 | struct host1x_drm_context { |
50 | struct host1x_client *client; | |
51 | struct host1x_channel *channel; | |
52 | struct list_head list; | |
53 | }; | |
54 | ||
d8f4a9ed TR |
55 | struct host1x_client_ops { |
56 | int (*drm_init)(struct host1x_client *client, struct drm_device *drm); | |
57 | int (*drm_exit)(struct host1x_client *client); | |
d43f81cb TB |
58 | int (*open_channel)(struct host1x_client *client, |
59 | struct host1x_drm_context *context); | |
60 | void (*close_channel)(struct host1x_drm_context *context); | |
61 | int (*submit)(struct host1x_drm_context *context, | |
62 | struct drm_tegra_submit *args, struct drm_device *drm, | |
63 | struct drm_file *file); | |
64 | }; | |
65 | ||
66 | struct host1x_drm_file { | |
67 | struct list_head contexts; | |
d8f4a9ed TR |
68 | }; |
69 | ||
70 | struct host1x_client { | |
c89c0ea6 | 71 | struct host1x_drm *host1x; |
d8f4a9ed TR |
72 | struct device *dev; |
73 | ||
74 | const struct host1x_client_ops *ops; | |
75 | ||
d43f81cb TB |
76 | enum host1x_class class; |
77 | struct host1x_channel *channel; | |
78 | ||
79 | struct host1x_syncpt **syncpts; | |
80 | unsigned int num_syncpts; | |
81 | ||
d8f4a9ed TR |
82 | struct list_head list; |
83 | }; | |
84 | ||
c89c0ea6 AM |
85 | extern int host1x_drm_init(struct host1x_drm *host1x, struct drm_device *drm); |
86 | extern int host1x_drm_exit(struct host1x_drm *host1x); | |
d8f4a9ed | 87 | |
c89c0ea6 | 88 | extern int host1x_register_client(struct host1x_drm *host1x, |
d8f4a9ed | 89 | struct host1x_client *client); |
c89c0ea6 | 90 | extern int host1x_unregister_client(struct host1x_drm *host1x, |
d8f4a9ed TR |
91 | struct host1x_client *client); |
92 | ||
93 | struct tegra_output; | |
94 | ||
95 | struct tegra_dc { | |
96 | struct host1x_client client; | |
d8f4a9ed | 97 | struct device *dev; |
d18d3033 | 98 | spinlock_t lock; |
d8f4a9ed TR |
99 | |
100 | struct drm_crtc base; | |
101 | int pipe; | |
102 | ||
103 | struct clk *clk; | |
d8f4a9ed TR |
104 | void __iomem *regs; |
105 | int irq; | |
106 | ||
107 | struct tegra_output *rgb; | |
108 | ||
109 | struct list_head list; | |
110 | ||
111 | struct drm_info_list *debugfs_files; | |
112 | struct drm_minor *minor; | |
113 | struct dentry *debugfs; | |
3c03c46a TR |
114 | |
115 | /* page-flip handling */ | |
116 | struct drm_pending_vblank_event *event; | |
d8f4a9ed TR |
117 | }; |
118 | ||
119 | static inline struct tegra_dc *host1x_client_to_dc(struct host1x_client *client) | |
120 | { | |
121 | return container_of(client, struct tegra_dc, client); | |
122 | } | |
123 | ||
124 | static inline struct tegra_dc *to_tegra_dc(struct drm_crtc *crtc) | |
125 | { | |
126 | return container_of(crtc, struct tegra_dc, base); | |
127 | } | |
128 | ||
129 | static inline void tegra_dc_writel(struct tegra_dc *dc, unsigned long value, | |
130 | unsigned long reg) | |
131 | { | |
132 | writel(value, dc->regs + (reg << 2)); | |
133 | } | |
134 | ||
135 | static inline unsigned long tegra_dc_readl(struct tegra_dc *dc, | |
136 | unsigned long reg) | |
137 | { | |
138 | return readl(dc->regs + (reg << 2)); | |
139 | } | |
140 | ||
f34bc787 TR |
141 | struct tegra_dc_window { |
142 | struct { | |
143 | unsigned int x; | |
144 | unsigned int y; | |
145 | unsigned int w; | |
146 | unsigned int h; | |
147 | } src; | |
148 | struct { | |
149 | unsigned int x; | |
150 | unsigned int y; | |
151 | unsigned int w; | |
152 | unsigned int h; | |
153 | } dst; | |
154 | unsigned int bits_per_pixel; | |
155 | unsigned int format; | |
156 | unsigned int stride[2]; | |
157 | unsigned long base[3]; | |
158 | }; | |
159 | ||
160 | /* from dc.c */ | |
161 | extern unsigned int tegra_dc_format(uint32_t format); | |
162 | extern int tegra_dc_setup_window(struct tegra_dc *dc, unsigned int index, | |
163 | const struct tegra_dc_window *window); | |
6e5ff998 TR |
164 | extern void tegra_dc_enable_vblank(struct tegra_dc *dc); |
165 | extern void tegra_dc_disable_vblank(struct tegra_dc *dc); | |
3c03c46a TR |
166 | extern void tegra_dc_cancel_page_flip(struct drm_crtc *crtc, |
167 | struct drm_file *file); | |
f34bc787 | 168 | |
d8f4a9ed TR |
169 | struct tegra_output_ops { |
170 | int (*enable)(struct tegra_output *output); | |
171 | int (*disable)(struct tegra_output *output); | |
172 | int (*setup_clock)(struct tegra_output *output, struct clk *clk, | |
173 | unsigned long pclk); | |
174 | int (*check_mode)(struct tegra_output *output, | |
175 | struct drm_display_mode *mode, | |
176 | enum drm_mode_status *status); | |
177 | }; | |
178 | ||
179 | enum tegra_output_type { | |
180 | TEGRA_OUTPUT_RGB, | |
edec4af4 | 181 | TEGRA_OUTPUT_HDMI, |
d8f4a9ed TR |
182 | }; |
183 | ||
184 | struct tegra_output { | |
185 | struct device_node *of_node; | |
186 | struct device *dev; | |
187 | ||
188 | const struct tegra_output_ops *ops; | |
189 | enum tegra_output_type type; | |
190 | ||
191 | struct i2c_adapter *ddc; | |
192 | const struct edid *edid; | |
193 | unsigned int hpd_irq; | |
194 | int hpd_gpio; | |
195 | ||
196 | struct drm_encoder encoder; | |
197 | struct drm_connector connector; | |
198 | }; | |
199 | ||
200 | static inline struct tegra_output *encoder_to_output(struct drm_encoder *e) | |
201 | { | |
202 | return container_of(e, struct tegra_output, encoder); | |
203 | } | |
204 | ||
205 | static inline struct tegra_output *connector_to_output(struct drm_connector *c) | |
206 | { | |
207 | return container_of(c, struct tegra_output, connector); | |
208 | } | |
209 | ||
210 | static inline int tegra_output_enable(struct tegra_output *output) | |
211 | { | |
212 | if (output && output->ops && output->ops->enable) | |
213 | return output->ops->enable(output); | |
214 | ||
215 | return output ? -ENOSYS : -EINVAL; | |
216 | } | |
217 | ||
218 | static inline int tegra_output_disable(struct tegra_output *output) | |
219 | { | |
220 | if (output && output->ops && output->ops->disable) | |
221 | return output->ops->disable(output); | |
222 | ||
223 | return output ? -ENOSYS : -EINVAL; | |
224 | } | |
225 | ||
226 | static inline int tegra_output_setup_clock(struct tegra_output *output, | |
227 | struct clk *clk, unsigned long pclk) | |
228 | { | |
229 | if (output && output->ops && output->ops->setup_clock) | |
230 | return output->ops->setup_clock(output, clk, pclk); | |
231 | ||
232 | return output ? -ENOSYS : -EINVAL; | |
233 | } | |
234 | ||
235 | static inline int tegra_output_check_mode(struct tegra_output *output, | |
236 | struct drm_display_mode *mode, | |
237 | enum drm_mode_status *status) | |
238 | { | |
239 | if (output && output->ops && output->ops->check_mode) | |
240 | return output->ops->check_mode(output, mode, status); | |
241 | ||
242 | return output ? -ENOSYS : -EINVAL; | |
243 | } | |
244 | ||
245 | /* from rgb.c */ | |
246 | extern int tegra_dc_rgb_probe(struct tegra_dc *dc); | |
247 | extern int tegra_dc_rgb_init(struct drm_device *drm, struct tegra_dc *dc); | |
248 | extern int tegra_dc_rgb_exit(struct tegra_dc *dc); | |
249 | ||
250 | /* from output.c */ | |
251 | extern int tegra_output_parse_dt(struct tegra_output *output); | |
252 | extern int tegra_output_init(struct drm_device *drm, struct tegra_output *output); | |
253 | extern int tegra_output_exit(struct tegra_output *output); | |
254 | ||
d8f4a9ed | 255 | /* from fb.c */ |
de2ba664 AM |
256 | struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer, |
257 | unsigned int index); | |
d8f4a9ed TR |
258 | extern int tegra_drm_fb_init(struct drm_device *drm); |
259 | extern void tegra_drm_fb_exit(struct drm_device *drm); | |
de2ba664 | 260 | extern void tegra_fbdev_restore_mode(struct tegra_fbdev *fbdev); |
d8f4a9ed | 261 | |
d8f4a9ed TR |
262 | extern struct drm_driver tegra_drm_driver; |
263 | ||
4231c6b0 | 264 | #endif /* HOST1X_DRM_H */ |