drm/xe: Only allow 1 ufence per exec / bind IOCTL
[linux-block.git] / drivers / gpu / drm / xe / xe_sync.h
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1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2021 Intel Corporation
4 */
5
6#ifndef _XE_SYNC_H_
7#define _XE_SYNC_H_
8
9#include "xe_sync_types.h"
10
11struct xe_device;
eb9702ad 12struct xe_exec_queue;
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13struct xe_file;
14struct xe_sched_job;
eb9702ad 15struct xe_vm;
dd08ebf6 16
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17#define SYNC_PARSE_FLAG_EXEC BIT(0)
18#define SYNC_PARSE_FLAG_LR_MODE BIT(1)
eb9702ad 19#define SYNC_PARSE_FLAG_DISALLOW_USER_FENCE BIT(2)
53bf60f6 20
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21int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
22 struct xe_sync_entry *sync,
23 struct drm_xe_sync __user *sync_user,
53bf60f6 24 unsigned int flags);
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25int xe_sync_entry_wait(struct xe_sync_entry *sync);
26int xe_sync_entry_add_deps(struct xe_sync_entry *sync,
27 struct xe_sched_job *job);
f3e9b1f4 28void xe_sync_entry_signal(struct xe_sync_entry *sync,
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29 struct xe_sched_job *job,
30 struct dma_fence *fence);
31void xe_sync_entry_cleanup(struct xe_sync_entry *sync);
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32struct dma_fence *
33xe_sync_in_fence_get(struct xe_sync_entry *sync, int num_sync,
34 struct xe_exec_queue *q, struct xe_vm *vm);
dd08ebf6 35
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36static inline bool xe_sync_is_ufence(struct xe_sync_entry *sync)
37{
38 return !!sync->ufence;
39}
40
dd08ebf6 41#endif