x86/vmware: Add a header file for hypercall definitions
[linux-2.6-block.git] / drivers / gpu / drm / vmwgfx / vmwgfx_scrn.c
CommitLineData
dff96888 1// SPDX-License-Identifier: GPL-2.0 OR MIT
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2/**************************************************************************
3 *
dff96888 4 * Copyright 2011-2015 VMware, Inc., Palo Alto, CA., USA
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5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_kms.h"
3cb9ae4f 29#include <drm/drm_plane_helper.h>
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30#include <drm/drm_atomic.h>
31#include <drm/drm_atomic_helper.h>
61c21387 32#include <drm/drm_damage_helper.h>
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33
34
35#define vmw_crtc_to_sou(x) \
36 container_of(x, struct vmw_screen_object_unit, base.crtc)
37#define vmw_encoder_to_sou(x) \
38 container_of(x, struct vmw_screen_object_unit, base.encoder)
39#define vmw_connector_to_sou(x) \
40 container_of(x, struct vmw_screen_object_unit, base.connector)
41
10b1e0ca
TH
42/**
43 * struct vmw_kms_sou_surface_dirty - Closure structure for
44 * blit surface to screen command.
45 * @base: The base type we derive from. Used by vmw_kms_helper_dirty().
46 * @left: Left side of bounding box.
47 * @right: Right side of bounding box.
48 * @top: Top side of bounding box.
49 * @bottom: Bottom side of bounding box.
50 * @dst_x: Difference between source clip rects and framebuffer coordinates.
51 * @dst_y: Difference between source clip rects and framebuffer coordinates.
52 * @sid: Surface id of surface to copy from.
53 */
54struct vmw_kms_sou_surface_dirty {
55 struct vmw_kms_dirty base;
56 s32 left, right, top, bottom;
57 s32 dst_x, dst_y;
58 u32 sid;
59};
60
61/*
62 * SVGA commands that are used by this code. Please see the device headers
63 * for explanation.
64 */
65struct vmw_kms_sou_readback_blit {
66 uint32 header;
67 SVGAFifoCmdBlitScreenToGMRFB body;
68};
69
f1d34bfd 70struct vmw_kms_sou_bo_blit {
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71 uint32 header;
72 SVGAFifoCmdBlitGMRFBToScreen body;
73};
74
75struct vmw_kms_sou_dirty_cmd {
76 SVGA3dCmdHeader header;
77 SVGA3dCmdBlitSurfaceToScreen body;
78};
79
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DR
80struct vmw_kms_sou_define_gmrfb {
81 uint32_t header;
82 SVGAFifoCmdDefineGMRFB body;
83};
84
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85/**
86 * Display unit using screen objects.
87 */
88struct vmw_screen_object_unit {
89 struct vmw_display_unit base;
90
91 unsigned long buffer_size; /**< Size of allocated buffer */
f1d34bfd 92 struct vmw_buffer_object *buffer; /**< Backing store buffer */
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93
94 bool defined;
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95};
96
97static void vmw_sou_destroy(struct vmw_screen_object_unit *sou)
98{
c8261a96 99 vmw_du_cleanup(&sou->base);
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100 kfree(sou);
101}
102
103
104/*
105 * Screen Object Display Unit CRTC functions
106 */
107
108static void vmw_sou_crtc_destroy(struct drm_crtc *crtc)
109{
110 vmw_sou_destroy(vmw_crtc_to_sou(crtc));
111}
112
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113/**
114 * Send the fifo command to create a screen.
115 */
116static int vmw_sou_fifo_create(struct vmw_private *dev_priv,
117 struct vmw_screen_object_unit *sou,
3e79ecda 118 int x, int y,
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119 struct drm_display_mode *mode)
120{
121 size_t fifo_size;
122
123 struct {
124 struct {
125 uint32_t cmdType;
126 } header;
127 SVGAScreenObject obj;
128 } *cmd;
129
130 BUG_ON(!sou->buffer);
131
132 fifo_size = sizeof(*cmd);
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DR
133 cmd = VMW_FIFO_RESERVE(dev_priv, fifo_size);
134 if (unlikely(cmd == NULL))
56d1c78d 135 return -ENOMEM;
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136
137 memset(cmd, 0, fifo_size);
138 cmd->header.cmdType = SVGA_CMD_DEFINE_SCREEN;
139 cmd->obj.structSize = sizeof(SVGAScreenObject);
140 cmd->obj.id = sou->base.unit;
141 cmd->obj.flags = SVGA_SCREEN_HAS_ROOT |
142 (sou->base.unit == 0 ? SVGA_SCREEN_IS_PRIMARY : 0);
143 cmd->obj.size.width = mode->hdisplay;
144 cmd->obj.size.height = mode->vdisplay;
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145 cmd->obj.root.x = x;
146 cmd->obj.root.y = y;
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147 sou->base.set_gui_x = cmd->obj.root.x;
148 sou->base.set_gui_y = cmd->obj.root.y;
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149
150 /* Ok to assume that buffer is pinned in vram */
b37a6b9a 151 vmw_bo_get_guest_ptr(&sou->buffer->base, &cmd->obj.backingStore.ptr);
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152 cmd->obj.backingStore.pitch = mode->hdisplay * 4;
153
154 vmw_fifo_commit(dev_priv, fifo_size);
155
156 sou->defined = true;
157
158 return 0;
159}
160
161/**
162 * Send the fifo command to destroy a screen.
163 */
164static int vmw_sou_fifo_destroy(struct vmw_private *dev_priv,
165 struct vmw_screen_object_unit *sou)
166{
167 size_t fifo_size;
168 int ret;
169
170 struct {
171 struct {
172 uint32_t cmdType;
173 } header;
174 SVGAFifoCmdDestroyScreen body;
175 } *cmd;
176
177 /* no need to do anything */
178 if (unlikely(!sou->defined))
179 return 0;
180
181 fifo_size = sizeof(*cmd);
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DR
182 cmd = VMW_FIFO_RESERVE(dev_priv, fifo_size);
183 if (unlikely(cmd == NULL))
56d1c78d 184 return -ENOMEM;
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185
186 memset(cmd, 0, fifo_size);
187 cmd->header.cmdType = SVGA_CMD_DESTROY_SCREEN;
188 cmd->body.screenId = sou->base.unit;
189
190 vmw_fifo_commit(dev_priv, fifo_size);
191
192 /* Force sync */
193 ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ);
194 if (unlikely(ret != 0))
195 DRM_ERROR("Failed to sync with HW");
196 else
197 sou->defined = false;
198
199 return ret;
200}
201
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202/**
203 * vmw_sou_crtc_mode_set_nofb - Create new screen
204 *
205 * @crtc: CRTC associated with the new screen
206 *
207 * This function creates/destroys a screen. This function cannot fail, so if
208 * somehow we run into a failure, just do the best we can to get out.
209 */
210static void vmw_sou_crtc_mode_set_nofb(struct drm_crtc *crtc)
211{
212 struct vmw_private *dev_priv;
213 struct vmw_screen_object_unit *sou;
214 struct vmw_framebuffer *vfb;
215 struct drm_framebuffer *fb;
216 struct drm_plane_state *ps;
217 struct vmw_plane_state *vps;
218 int ret;
219
3e79ecda 220 sou = vmw_crtc_to_sou(crtc);
06ec4190 221 dev_priv = vmw_priv(crtc->dev);
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222 ps = crtc->primary->state;
223 fb = ps->fb;
224 vps = vmw_plane_state_to_vps(ps);
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225
226 vfb = (fb) ? vmw_framebuffer_to_vfb(fb) : NULL;
227
228 if (sou->defined) {
229 ret = vmw_sou_fifo_destroy(dev_priv, sou);
230 if (ret) {
231 DRM_ERROR("Failed to destroy Screen Object\n");
232 return;
233 }
234 }
235
236 if (vfb) {
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237 struct drm_connector_state *conn_state;
238 struct vmw_connector_state *vmw_conn_state;
239 int x, y;
240
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241 sou->buffer = vps->bo;
242 sou->buffer_size = vps->bo_size;
06ec4190 243
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244 conn_state = sou->base.connector.state;
245 vmw_conn_state = vmw_connector_state_to_vcs(conn_state);
246
247 x = vmw_conn_state->gui_x;
248 y = vmw_conn_state->gui_y;
06ec4190 249
3e79ecda 250 ret = vmw_sou_fifo_create(dev_priv, sou, x, y, &crtc->mode);
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251 if (ret)
252 DRM_ERROR("Failed to define Screen Object %dx%d\n",
253 crtc->x, crtc->y);
254
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255 } else {
256 sou->buffer = NULL;
257 sou->buffer_size = 0;
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258 }
259}
260
261/**
262 * vmw_sou_crtc_helper_prepare - Noop
263 *
264 * @crtc: CRTC associated with the new screen
265 *
266 * Prepares the CRTC for a mode set, but we don't need to do anything here.
267 */
268static void vmw_sou_crtc_helper_prepare(struct drm_crtc *crtc)
269{
270}
271
272/**
0b20a0f8 273 * vmw_sou_crtc_atomic_enable - Noop
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274 *
275 * @crtc: CRTC associated with the new screen
276 *
277 * This is called after a mode set has been completed.
278 */
0b20a0f8
LP
279static void vmw_sou_crtc_atomic_enable(struct drm_crtc *crtc,
280 struct drm_crtc_state *old_state)
06ec4190
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281{
282}
283
284/**
64581714 285 * vmw_sou_crtc_atomic_disable - Turns off CRTC
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286 *
287 * @crtc: CRTC to be turned off
288 */
64581714
LP
289static void vmw_sou_crtc_atomic_disable(struct drm_crtc *crtc,
290 struct drm_crtc_state *old_state)
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291{
292 struct vmw_private *dev_priv;
293 struct vmw_screen_object_unit *sou;
294 int ret;
295
296
297 if (!crtc) {
298 DRM_ERROR("CRTC is NULL\n");
299 return;
300 }
301
302 sou = vmw_crtc_to_sou(crtc);
303 dev_priv = vmw_priv(crtc->dev);
304
305 if (sou->defined) {
306 ret = vmw_sou_fifo_destroy(dev_priv, sou);
307 if (ret)
308 DRM_ERROR("Failed to destroy Screen Object\n");
309 }
310}
311
d7955fcf 312static const struct drm_crtc_funcs vmw_screen_object_crtc_funcs = {
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313 .gamma_set = vmw_du_crtc_gamma_set,
314 .destroy = vmw_sou_crtc_destroy,
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315 .reset = vmw_du_crtc_reset,
316 .atomic_duplicate_state = vmw_du_crtc_duplicate_state,
317 .atomic_destroy_state = vmw_du_crtc_destroy_state,
b4fa61ba 318 .set_config = drm_atomic_helper_set_config,
9a01135b 319 .page_flip = drm_atomic_helper_page_flip,
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320};
321
322/*
323 * Screen Object Display Unit encoder functions
324 */
325
326static void vmw_sou_encoder_destroy(struct drm_encoder *encoder)
327{
328 vmw_sou_destroy(vmw_encoder_to_sou(encoder));
329}
330
d7955fcf 331static const struct drm_encoder_funcs vmw_screen_object_encoder_funcs = {
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332 .destroy = vmw_sou_encoder_destroy,
333};
334
335/*
336 * Screen Object Display Unit connector functions
337 */
338
339static void vmw_sou_connector_destroy(struct drm_connector *connector)
340{
341 vmw_sou_destroy(vmw_connector_to_sou(connector));
342}
343
d7955fcf 344static const struct drm_connector_funcs vmw_sou_connector_funcs = {
56d1c78d 345 .dpms = vmw_du_connector_dpms,
d17e67de
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346 .detect = vmw_du_connector_detect,
347 .fill_modes = vmw_du_connector_fill_modes,
56d1c78d 348 .destroy = vmw_sou_connector_destroy,
d7721ca7 349 .reset = vmw_du_connector_reset,
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350 .atomic_duplicate_state = vmw_du_connector_duplicate_state,
351 .atomic_destroy_state = vmw_du_connector_destroy_state,
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352};
353
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354
355static const struct
356drm_connector_helper_funcs vmw_sou_connector_helper_funcs = {
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357};
358
359
360
36cc79bc
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361/*
362 * Screen Object Display Plane Functions
363 */
364
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365/**
366 * vmw_sou_primary_plane_cleanup_fb - Frees sou backing buffer
367 *
368 * @plane: display plane
369 * @old_state: Contains the FB to clean up
370 *
371 * Unpins the display surface
372 *
373 * Returns 0 on success
374 */
375static void
376vmw_sou_primary_plane_cleanup_fb(struct drm_plane *plane,
377 struct drm_plane_state *old_state)
378{
379 struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
20fb5a63
TH
380 struct drm_crtc *crtc = plane->state->crtc ?
381 plane->state->crtc : old_state->crtc;
060e2ad5 382
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TH
383 if (vps->bo)
384 vmw_bo_unpin(vmw_priv(crtc->dev), vps->bo, false);
385 vmw_bo_unreference(&vps->bo);
386 vps->bo_size = 0;
060e2ad5
SY
387
388 vmw_du_plane_cleanup_fb(plane, old_state);
389}
390
391
392/**
393 * vmw_sou_primary_plane_prepare_fb - allocate backing buffer
394 *
395 * @plane: display plane
396 * @new_state: info on the new plane state, including the FB
397 *
398 * The SOU backing buffer is our equivalent of the display plane.
399 *
400 * Returns 0 on success
401 */
402static int
403vmw_sou_primary_plane_prepare_fb(struct drm_plane *plane,
404 struct drm_plane_state *new_state)
405{
406 struct drm_framebuffer *new_fb = new_state->fb;
407 struct drm_crtc *crtc = plane->state->crtc ?: new_state->crtc;
408 struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
409 struct vmw_private *dev_priv;
410 size_t size;
411 int ret;
412
413
414 if (!new_fb) {
f1d34bfd
TH
415 vmw_bo_unreference(&vps->bo);
416 vps->bo_size = 0;
060e2ad5
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417
418 return 0;
419 }
420
421 size = new_state->crtc_w * new_state->crtc_h * 4;
20fb5a63 422 dev_priv = vmw_priv(crtc->dev);
060e2ad5 423
f1d34bfd
TH
424 if (vps->bo) {
425 if (vps->bo_size == size) {
20fb5a63
TH
426 /*
427 * Note that this might temporarily up the pin-count
428 * to 2, until cleanup_fb() is called.
429 */
f1d34bfd 430 return vmw_bo_pin_in_vram(dev_priv, vps->bo,
20fb5a63
TH
431 true);
432 }
060e2ad5 433
f1d34bfd
TH
434 vmw_bo_unreference(&vps->bo);
435 vps->bo_size = 0;
060e2ad5
SY
436 }
437
f1d34bfd
TH
438 vps->bo = kzalloc(sizeof(*vps->bo), GFP_KERNEL);
439 if (!vps->bo)
060e2ad5
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440 return -ENOMEM;
441
060e2ad5
SY
442 vmw_svga_enable(dev_priv);
443
444 /* After we have alloced the backing store might not be able to
445 * resume the overlays, this is preferred to failing to alloc.
446 */
447 vmw_overlay_pause_all(dev_priv);
f1d34bfd 448 ret = vmw_bo_init(dev_priv, vps->bo, size,
060e2ad5 449 &vmw_vram_ne_placement,
f1d34bfd 450 false, &vmw_bo_bo_free);
060e2ad5 451 vmw_overlay_resume_all(dev_priv);
20fb5a63 452 if (ret) {
f1d34bfd 453 vps->bo = NULL; /* vmw_bo_init frees on error */
20fb5a63
TH
454 return ret;
455 }
060e2ad5 456
f1d34bfd 457 vps->bo_size = size;
91ba9f28 458
20fb5a63
TH
459 /*
460 * TTM already thinks the buffer is pinned, but make sure the
461 * pin_count is upped.
462 */
f1d34bfd 463 return vmw_bo_pin_in_vram(dev_priv, vps->bo, true);
060e2ad5
SY
464}
465
5d35abad
DR
466static uint32_t vmw_sou_bo_fifo_size(struct vmw_du_update_plane *update,
467 uint32_t num_hits)
468{
469 return sizeof(struct vmw_kms_sou_define_gmrfb) +
470 sizeof(struct vmw_kms_sou_bo_blit) * num_hits;
471}
472
473static uint32_t vmw_sou_bo_define_gmrfb(struct vmw_du_update_plane *update,
474 void *cmd)
475{
476 struct vmw_framebuffer_bo *vfbbo =
477 container_of(update->vfb, typeof(*vfbbo), base);
478 struct vmw_kms_sou_define_gmrfb *gmr = cmd;
479 int depth = update->vfb->base.format->depth;
480
481 /* Emulate RGBA support, contrary to svga_reg.h this is not
482 * supported by hosts. This is only a problem if we are reading
483 * this value later and expecting what we uploaded back.
484 */
485 if (depth == 32)
486 depth = 24;
487
488 gmr->header = SVGA_CMD_DEFINE_GMRFB;
489
490 gmr->body.format.bitsPerPixel = update->vfb->base.format->cpp[0] * 8;
491 gmr->body.format.colorDepth = depth;
492 gmr->body.format.reserved = 0;
493 gmr->body.bytesPerLine = update->vfb->base.pitches[0];
494 vmw_bo_get_guest_ptr(&vfbbo->buffer->base, &gmr->body.ptr);
495
496 return sizeof(*gmr);
497}
498
499static uint32_t vmw_sou_bo_populate_clip(struct vmw_du_update_plane *update,
500 void *cmd, struct drm_rect *clip,
501 uint32_t fb_x, uint32_t fb_y)
502{
503 struct vmw_kms_sou_bo_blit *blit = cmd;
504
505 blit->header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
506 blit->body.destScreenId = update->du->unit;
507 blit->body.srcOrigin.x = fb_x;
508 blit->body.srcOrigin.y = fb_y;
509 blit->body.destRect.left = clip->x1;
510 blit->body.destRect.top = clip->y1;
511 blit->body.destRect.right = clip->x2;
512 blit->body.destRect.bottom = clip->y2;
513
514 return sizeof(*blit);
515}
516
517static uint32_t vmw_stud_bo_post_clip(struct vmw_du_update_plane *update,
518 void *cmd, struct drm_rect *bb)
519{
520 return 0;
521}
522
523/**
524 * vmw_sou_plane_update_bo - Update display unit for bo backed fb.
525 * @dev_priv: Device private.
526 * @plane: Plane state.
527 * @old_state: Old plane state.
528 * @vfb: Framebuffer which is blitted to display unit.
529 * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj.
530 * The returned fence pointer may be NULL in which case the device
531 * has already synchronized.
532 *
533 * Return: 0 on success or a negative error code on failure.
534 */
535static int vmw_sou_plane_update_bo(struct vmw_private *dev_priv,
536 struct drm_plane *plane,
537 struct drm_plane_state *old_state,
538 struct vmw_framebuffer *vfb,
539 struct vmw_fence_obj **out_fence)
540{
541 struct vmw_du_update_plane_buffer bo_update;
542
543 memset(&bo_update, 0, sizeof(struct vmw_du_update_plane_buffer));
544 bo_update.base.plane = plane;
545 bo_update.base.old_state = old_state;
546 bo_update.base.dev_priv = dev_priv;
547 bo_update.base.du = vmw_crtc_to_du(plane->state->crtc);
548 bo_update.base.vfb = vfb;
549 bo_update.base.out_fence = out_fence;
550 bo_update.base.mutex = NULL;
551 bo_update.base.cpu_blit = false;
552 bo_update.base.intr = true;
553
554 bo_update.base.calc_fifo_size = vmw_sou_bo_fifo_size;
555 bo_update.base.post_prepare = vmw_sou_bo_define_gmrfb;
556 bo_update.base.clip = vmw_sou_bo_populate_clip;
557 bo_update.base.post_clip = vmw_stud_bo_post_clip;
558
559 return vmw_du_helper_plane_update(&bo_update.base);
560}
561
43d1e627
DR
562static uint32_t vmw_sou_surface_fifo_size(struct vmw_du_update_plane *update,
563 uint32_t num_hits)
564{
565 return sizeof(struct vmw_kms_sou_dirty_cmd) + sizeof(SVGASignedRect) *
566 num_hits;
567}
568
569static uint32_t vmw_sou_surface_post_prepare(struct vmw_du_update_plane *update,
570 void *cmd)
571{
572 struct vmw_du_update_plane_surface *srf_update;
573
574 srf_update = container_of(update, typeof(*srf_update), base);
575
576 /*
577 * SOU SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN is special in the sense that
578 * its bounding box is filled before iterating over all the clips. So
579 * store the FIFO start address and revisit to fill the details.
580 */
581 srf_update->cmd_start = cmd;
582
583 return 0;
584}
585
586static uint32_t vmw_sou_surface_pre_clip(struct vmw_du_update_plane *update,
587 void *cmd, uint32_t num_hits)
588{
589 struct vmw_kms_sou_dirty_cmd *blit = cmd;
590 struct vmw_framebuffer_surface *vfbs;
591
592 vfbs = container_of(update->vfb, typeof(*vfbs), base);
593
594 blit->header.id = SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN;
595 blit->header.size = sizeof(blit->body) + sizeof(SVGASignedRect) *
596 num_hits;
597
598 blit->body.srcImage.sid = vfbs->surface->res.id;
599 blit->body.destScreenId = update->du->unit;
600
601 /* Update the source and destination bounding box later in post_clip */
602 blit->body.srcRect.left = 0;
603 blit->body.srcRect.top = 0;
604 blit->body.srcRect.right = 0;
605 blit->body.srcRect.bottom = 0;
606
607 blit->body.destRect.left = 0;
608 blit->body.destRect.top = 0;
609 blit->body.destRect.right = 0;
610 blit->body.destRect.bottom = 0;
611
612 return sizeof(*blit);
613}
614
615static uint32_t vmw_sou_surface_clip_rect(struct vmw_du_update_plane *update,
616 void *cmd, struct drm_rect *clip,
617 uint32_t src_x, uint32_t src_y)
618{
619 SVGASignedRect *rect = cmd;
620
621 /*
622 * rects are relative to dest bounding box rect on screen object, so
623 * translate to it later in post_clip
624 */
625 rect->left = clip->x1;
626 rect->top = clip->y1;
627 rect->right = clip->x2;
628 rect->bottom = clip->y2;
629
630 return sizeof(*rect);
631}
632
633static uint32_t vmw_sou_surface_post_clip(struct vmw_du_update_plane *update,
634 void *cmd, struct drm_rect *bb)
635{
636 struct vmw_du_update_plane_surface *srf_update;
637 struct drm_plane_state *state = update->plane->state;
638 struct drm_rect src_bb;
639 struct vmw_kms_sou_dirty_cmd *blit;
640 SVGASignedRect *rect;
641 uint32_t num_hits;
642 int translate_src_x;
643 int translate_src_y;
644 int i;
645
646 srf_update = container_of(update, typeof(*srf_update), base);
647
648 blit = srf_update->cmd_start;
649 rect = (SVGASignedRect *)&blit[1];
650
651 num_hits = (blit->header.size - sizeof(blit->body))/
652 sizeof(SVGASignedRect);
653
654 src_bb = *bb;
655
656 /* To translate bb back to fb src coord */
657 translate_src_x = (state->src_x >> 16) - state->crtc_x;
658 translate_src_y = (state->src_y >> 16) - state->crtc_y;
659
660 drm_rect_translate(&src_bb, translate_src_x, translate_src_y);
661
662 blit->body.srcRect.left = src_bb.x1;
663 blit->body.srcRect.top = src_bb.y1;
664 blit->body.srcRect.right = src_bb.x2;
665 blit->body.srcRect.bottom = src_bb.y2;
666
667 blit->body.destRect.left = bb->x1;
668 blit->body.destRect.top = bb->y1;
669 blit->body.destRect.right = bb->x2;
670 blit->body.destRect.bottom = bb->y2;
671
672 /* rects are relative to dest bb rect */
673 for (i = 0; i < num_hits; i++) {
674 rect->left -= bb->x1;
675 rect->top -= bb->y1;
676 rect->right -= bb->x1;
677 rect->bottom -= bb->y1;
678 rect++;
679 }
680
681 return 0;
682}
683
684/**
685 * vmw_sou_plane_update_surface - Update display unit for surface backed fb.
686 * @dev_priv: Device private.
687 * @plane: Plane state.
688 * @old_state: Old plane state.
689 * @vfb: Framebuffer which is blitted to display unit
690 * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj.
691 * The returned fence pointer may be NULL in which case the device
692 * has already synchronized.
693 *
694 * Return: 0 on success or a negative error code on failure.
695 */
696static int vmw_sou_plane_update_surface(struct vmw_private *dev_priv,
697 struct drm_plane *plane,
698 struct drm_plane_state *old_state,
699 struct vmw_framebuffer *vfb,
700 struct vmw_fence_obj **out_fence)
701{
702 struct vmw_du_update_plane_surface srf_update;
703
704 memset(&srf_update, 0, sizeof(struct vmw_du_update_plane_surface));
705 srf_update.base.plane = plane;
706 srf_update.base.old_state = old_state;
707 srf_update.base.dev_priv = dev_priv;
708 srf_update.base.du = vmw_crtc_to_du(plane->state->crtc);
709 srf_update.base.vfb = vfb;
710 srf_update.base.out_fence = out_fence;
711 srf_update.base.mutex = &dev_priv->cmdbuf_mutex;
712 srf_update.base.cpu_blit = false;
713 srf_update.base.intr = true;
714
715 srf_update.base.calc_fifo_size = vmw_sou_surface_fifo_size;
716 srf_update.base.post_prepare = vmw_sou_surface_post_prepare;
717 srf_update.base.pre_clip = vmw_sou_surface_pre_clip;
718 srf_update.base.clip = vmw_sou_surface_clip_rect;
719 srf_update.base.post_clip = vmw_sou_surface_post_clip;
720
721 return vmw_du_helper_plane_update(&srf_update.base);
722}
060e2ad5
SY
723
724static void
725vmw_sou_primary_plane_atomic_update(struct drm_plane *plane,
726 struct drm_plane_state *old_state)
727{
b0119cb9 728 struct drm_crtc *crtc = plane->state->crtc;
aa64b3f1
DR
729 struct drm_pending_vblank_event *event = NULL;
730 struct vmw_fence_obj *fence = NULL;
731 int ret;
732
31da2df8 733 /* In case of device error, maintain consistent atomic state */
aa64b3f1
DR
734 if (crtc && plane->state->fb) {
735 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
736 struct vmw_framebuffer *vfb =
737 vmw_framebuffer_to_vfb(plane->state->fb);
aa64b3f1 738
f1d34bfd 739 if (vfb->bo)
67a51b3d
DR
740 ret = vmw_sou_plane_update_bo(dev_priv, plane,
741 old_state, vfb, &fence);
aa64b3f1 742 else
67a51b3d
DR
743 ret = vmw_sou_plane_update_surface(dev_priv, plane,
744 old_state, vfb,
745 &fence);
aa64b3f1
DR
746 if (ret != 0)
747 DRM_ERROR("Failed to update screen.\n");
aa64b3f1 748 } else {
31da2df8 749 /* Do nothing when fb and crtc is NULL (blank crtc) */
aa64b3f1
DR
750 return;
751 }
752
31da2df8 753 /* For error case vblank event is send from vmw_du_crtc_atomic_flush */
aa64b3f1 754 event = crtc->state->event;
aa64b3f1
DR
755 if (event && fence) {
756 struct drm_file *file_priv = event->base.file_priv;
757
758 ret = vmw_event_fence_action_queue(file_priv,
759 fence,
760 &event->base,
761 &event->event.vbl.tv_sec,
762 &event->event.vbl.tv_usec,
763 true);
764
765 if (unlikely(ret != 0))
766 DRM_ERROR("Failed to queue event on fence.\n");
767 else
768 crtc->state->event = NULL;
769 }
770
771 if (fence)
772 vmw_fence_obj_unreference(&fence);
060e2ad5
SY
773}
774
775
36cc79bc 776static const struct drm_plane_funcs vmw_sou_plane_funcs = {
b0119cb9
SY
777 .update_plane = drm_atomic_helper_update_plane,
778 .disable_plane = drm_atomic_helper_disable_plane,
36cc79bc 779 .destroy = vmw_du_primary_plane_destroy,
cc5ec459
SY
780 .reset = vmw_du_plane_reset,
781 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
782 .atomic_destroy_state = vmw_du_plane_destroy_state,
36cc79bc
SY
783};
784
785static const struct drm_plane_funcs vmw_sou_cursor_funcs = {
b0119cb9
SY
786 .update_plane = drm_atomic_helper_update_plane,
787 .disable_plane = drm_atomic_helper_disable_plane,
36cc79bc 788 .destroy = vmw_du_cursor_plane_destroy,
cc5ec459
SY
789 .reset = vmw_du_plane_reset,
790 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
791 .atomic_destroy_state = vmw_du_plane_destroy_state,
36cc79bc
SY
792};
793
06ec4190
SY
794/*
795 * Atomic Helpers
796 */
060e2ad5
SY
797static const struct
798drm_plane_helper_funcs vmw_sou_cursor_plane_helper_funcs = {
799 .atomic_check = vmw_du_cursor_plane_atomic_check,
800 .atomic_update = vmw_du_cursor_plane_atomic_update,
801 .prepare_fb = vmw_du_cursor_plane_prepare_fb,
802 .cleanup_fb = vmw_du_plane_cleanup_fb,
803};
804
805static const struct
806drm_plane_helper_funcs vmw_sou_primary_plane_helper_funcs = {
807 .atomic_check = vmw_du_primary_plane_atomic_check,
808 .atomic_update = vmw_sou_primary_plane_atomic_update,
809 .prepare_fb = vmw_sou_primary_plane_prepare_fb,
810 .cleanup_fb = vmw_sou_primary_plane_cleanup_fb,
811};
812
06ec4190
SY
813static const struct drm_crtc_helper_funcs vmw_sou_crtc_helper_funcs = {
814 .prepare = vmw_sou_crtc_helper_prepare,
06ec4190
SY
815 .mode_set_nofb = vmw_sou_crtc_mode_set_nofb,
816 .atomic_check = vmw_du_crtc_atomic_check,
817 .atomic_begin = vmw_du_crtc_atomic_begin,
818 .atomic_flush = vmw_du_crtc_atomic_flush,
0b20a0f8 819 .atomic_enable = vmw_sou_crtc_atomic_enable,
64581714 820 .atomic_disable = vmw_sou_crtc_atomic_disable,
06ec4190
SY
821};
822
36cc79bc 823
56d1c78d
JB
824static int vmw_sou_init(struct vmw_private *dev_priv, unsigned unit)
825{
826 struct vmw_screen_object_unit *sou;
827 struct drm_device *dev = dev_priv->dev;
828 struct drm_connector *connector;
829 struct drm_encoder *encoder;
cc5ec459 830 struct drm_plane *primary, *cursor;
56d1c78d 831 struct drm_crtc *crtc;
36cc79bc 832 int ret;
56d1c78d
JB
833
834 sou = kzalloc(sizeof(*sou), GFP_KERNEL);
835 if (!sou)
836 return -ENOMEM;
837
838 sou->base.unit = unit;
839 crtc = &sou->base.crtc;
840 encoder = &sou->base.encoder;
841 connector = &sou->base.connector;
cc5ec459
SY
842 primary = &sou->base.primary;
843 cursor = &sou->base.cursor;
56d1c78d 844
56d1c78d 845 sou->base.pref_active = (unit == 0);
eb4f923b
JB
846 sou->base.pref_width = dev_priv->initial_width;
847 sou->base.pref_height = dev_priv->initial_height;
56d1c78d 848 sou->base.pref_mode = NULL;
9c2542a4
SY
849
850 /*
851 * Remove this after enabling atomic because property values can
852 * only exist in a state object
853 */
2e69b25b 854 sou->base.is_implicit = false;
56d1c78d 855
36cc79bc 856 /* Initialize primary plane */
cc5ec459
SY
857 vmw_du_plane_reset(primary);
858
36cc79bc
SY
859 ret = drm_universal_plane_init(dev, &sou->base.primary,
860 0, &vmw_sou_plane_funcs,
861 vmw_primary_plane_formats,
862 ARRAY_SIZE(vmw_primary_plane_formats),
e6fc3b68 863 NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
36cc79bc
SY
864 if (ret) {
865 DRM_ERROR("Failed to initialize primary plane");
866 goto err_free;
867 }
868
060e2ad5 869 drm_plane_helper_add(primary, &vmw_sou_primary_plane_helper_funcs);
61c21387 870 drm_plane_enable_fb_damage_clips(primary);
060e2ad5 871
36cc79bc 872 /* Initialize cursor plane */
cc5ec459
SY
873 vmw_du_plane_reset(cursor);
874
36cc79bc
SY
875 ret = drm_universal_plane_init(dev, &sou->base.cursor,
876 0, &vmw_sou_cursor_funcs,
877 vmw_cursor_plane_formats,
878 ARRAY_SIZE(vmw_cursor_plane_formats),
e6fc3b68 879 NULL, DRM_PLANE_TYPE_CURSOR, NULL);
36cc79bc
SY
880 if (ret) {
881 DRM_ERROR("Failed to initialize cursor plane");
882 drm_plane_cleanup(&sou->base.primary);
883 goto err_free;
884 }
885
060e2ad5
SY
886 drm_plane_helper_add(cursor, &vmw_sou_cursor_plane_helper_funcs);
887
888 vmw_du_connector_reset(connector);
36cc79bc
SY
889 ret = drm_connector_init(dev, connector, &vmw_sou_connector_funcs,
890 DRM_MODE_CONNECTOR_VIRTUAL);
891 if (ret) {
892 DRM_ERROR("Failed to initialize connector\n");
893 goto err_free;
894 }
895
d947d1b7 896 drm_connector_helper_add(connector, &vmw_sou_connector_helper_funcs);
56d1c78d
JB
897 connector->status = vmw_du_connector_detect(connector, true);
898
36cc79bc
SY
899 ret = drm_encoder_init(dev, encoder, &vmw_screen_object_encoder_funcs,
900 DRM_MODE_ENCODER_VIRTUAL, NULL);
901 if (ret) {
902 DRM_ERROR("Failed to initialize encoder\n");
903 goto err_free_connector;
904 }
905
cde4c44d 906 (void) drm_connector_attach_encoder(connector, encoder);
56d1c78d
JB
907 encoder->possible_crtcs = (1 << unit);
908 encoder->possible_clones = 0;
909
36cc79bc
SY
910 ret = drm_connector_register(connector);
911 if (ret) {
912 DRM_ERROR("Failed to register connector\n");
913 goto err_free_encoder;
914 }
6a0a7a9e 915
d7721ca7
SY
916
917 vmw_du_crtc_reset(crtc);
36cc79bc
SY
918 ret = drm_crtc_init_with_planes(dev, crtc, &sou->base.primary,
919 &sou->base.cursor,
920 &vmw_screen_object_crtc_funcs, NULL);
921 if (ret) {
922 DRM_ERROR("Failed to initialize CRTC\n");
923 goto err_free_unregister;
924 }
56d1c78d 925
06ec4190
SY
926 drm_crtc_helper_add(crtc, &vmw_sou_crtc_helper_funcs);
927
56d1c78d
JB
928 drm_mode_crtc_set_gamma_size(crtc, 256);
929
578e609a
TH
930 drm_object_attach_property(&connector->base,
931 dev_priv->hotplug_mode_update_property, 1);
932 drm_object_attach_property(&connector->base,
933 dev->mode_config.suggested_x_property, 0);
934 drm_object_attach_property(&connector->base,
935 dev->mode_config.suggested_y_property, 0);
56d1c78d 936 return 0;
36cc79bc
SY
937
938err_free_unregister:
939 drm_connector_unregister(connector);
940err_free_encoder:
941 drm_encoder_cleanup(encoder);
942err_free_connector:
943 drm_connector_cleanup(connector);
944err_free:
945 kfree(sou);
946 return ret;
56d1c78d
JB
947}
948
c8261a96 949int vmw_kms_sou_init_display(struct vmw_private *dev_priv)
56d1c78d
JB
950{
951 struct drm_device *dev = dev_priv->dev;
74b5ea30 952 int i, ret;
56d1c78d 953
29a16e95 954 if (!(dev_priv->capabilities & SVGA_CAP_SCREEN_OBJECT_2)) {
56d1c78d
JB
955 DRM_INFO("Not using screen objects,"
956 " missing cap SCREEN_OBJECT_2\n");
957 return -ENOSYS;
958 }
959
960 ret = -ENOMEM;
56d1c78d
JB
961
962 ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS);
963 if (unlikely(ret != 0))
75c06855 964 return ret;
56d1c78d 965
56d1c78d
JB
966 for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i)
967 vmw_sou_init(dev_priv, i);
968
c8261a96
SY
969 dev_priv->active_display_unit = vmw_du_screen_object;
970
971 DRM_INFO("Screen Objects Display Unit initialized\n");
56d1c78d
JB
972
973 return 0;
56d1c78d
JB
974}
975
f1d34bfd 976static int do_bo_define_gmrfb(struct vmw_private *dev_priv,
c8261a96 977 struct vmw_framebuffer *framebuffer)
b5ec427e 978{
f1d34bfd
TH
979 struct vmw_buffer_object *buf =
980 container_of(framebuffer, struct vmw_framebuffer_bo,
10b1e0ca 981 base)->buffer;
b00c600e 982 int depth = framebuffer->base.format->depth;
c8261a96
SY
983 struct {
984 uint32_t header;
985 SVGAFifoCmdDefineGMRFB body;
986 } *cmd;
b5ec427e 987
c8261a96
SY
988 /* Emulate RGBA support, contrary to svga_reg.h this is not
989 * supported by hosts. This is only a problem if we are reading
990 * this value later and expecting what we uploaded back.
991 */
992 if (depth == 32)
993 depth = 24;
b5ec427e 994
11c45419
DR
995 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
996 if (!cmd)
c8261a96 997 return -ENOMEM;
c8261a96 998
c8261a96 999 cmd->header = SVGA_CMD_DEFINE_GMRFB;
272725c7 1000 cmd->body.format.bitsPerPixel = framebuffer->base.format->cpp[0] * 8;
c8261a96
SY
1001 cmd->body.format.colorDepth = depth;
1002 cmd->body.format.reserved = 0;
1003 cmd->body.bytesPerLine = framebuffer->base.pitches[0];
10b1e0ca
TH
1004 /* Buffer is reserved in vram or GMR */
1005 vmw_bo_get_guest_ptr(&buf->base, &cmd->body.ptr);
1006 vmw_fifo_commit(dev_priv, sizeof(*cmd));
1007
1008 return 0;
1009}
1010
1011/**
1012 * vmw_sou_surface_fifo_commit - Callback to fill in and submit a
1013 * blit surface to screen command.
1014 *
1015 * @dirty: The closure structure.
1016 *
1017 * Fills in the missing fields in the command, and translates the cliprects
1018 * to match the destination bounding box encoded.
1019 */
1020static void vmw_sou_surface_fifo_commit(struct vmw_kms_dirty *dirty)
1021{
1022 struct vmw_kms_sou_surface_dirty *sdirty =
1023 container_of(dirty, typeof(*sdirty), base);
1024 struct vmw_kms_sou_dirty_cmd *cmd = dirty->cmd;
1025 s32 trans_x = dirty->unit->crtc.x - sdirty->dst_x;
1026 s32 trans_y = dirty->unit->crtc.y - sdirty->dst_y;
1027 size_t region_size = dirty->num_hits * sizeof(SVGASignedRect);
1028 SVGASignedRect *blit = (SVGASignedRect *) &cmd[1];
1029 int i;
1030
fea7dd54
TH
1031 if (!dirty->num_hits) {
1032 vmw_fifo_commit(dirty->dev_priv, 0);
1033 return;
1034 }
1035
10b1e0ca
TH
1036 cmd->header.id = SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN;
1037 cmd->header.size = sizeof(cmd->body) + region_size;
1038
1039 /*
1040 * Use the destination bounding box to specify destination - and
1041 * source bounding regions.
1042 */
1043 cmd->body.destRect.left = sdirty->left;
1044 cmd->body.destRect.right = sdirty->right;
1045 cmd->body.destRect.top = sdirty->top;
1046 cmd->body.destRect.bottom = sdirty->bottom;
1047
1048 cmd->body.srcRect.left = sdirty->left + trans_x;
1049 cmd->body.srcRect.right = sdirty->right + trans_x;
1050 cmd->body.srcRect.top = sdirty->top + trans_y;
1051 cmd->body.srcRect.bottom = sdirty->bottom + trans_y;
1052
1053 cmd->body.srcImage.sid = sdirty->sid;
1054 cmd->body.destScreenId = dirty->unit->unit;
1055
1056 /* Blits are relative to the destination rect. Translate. */
1057 for (i = 0; i < dirty->num_hits; ++i, ++blit) {
1058 blit->left -= sdirty->left;
1059 blit->right -= sdirty->left;
1060 blit->top -= sdirty->top;
1061 blit->bottom -= sdirty->top;
1062 }
1063
1064 vmw_fifo_commit(dirty->dev_priv, region_size + sizeof(*cmd));
1065
1066 sdirty->left = sdirty->top = S32_MAX;
1067 sdirty->right = sdirty->bottom = S32_MIN;
1068}
1069
1070/**
1071 * vmw_sou_surface_clip - Callback to encode a blit surface to screen cliprect.
1072 *
1073 * @dirty: The closure structure
1074 *
1075 * Encodes a SVGASignedRect cliprect and updates the bounding box of the
1076 * BLIT_SURFACE_TO_SCREEN command.
1077 */
1078static void vmw_sou_surface_clip(struct vmw_kms_dirty *dirty)
1079{
1080 struct vmw_kms_sou_surface_dirty *sdirty =
1081 container_of(dirty, typeof(*sdirty), base);
1082 struct vmw_kms_sou_dirty_cmd *cmd = dirty->cmd;
1083 SVGASignedRect *blit = (SVGASignedRect *) &cmd[1];
1084
1085 /* Destination rect. */
1086 blit += dirty->num_hits;
1087 blit->left = dirty->unit_x1;
1088 blit->top = dirty->unit_y1;
1089 blit->right = dirty->unit_x2;
1090 blit->bottom = dirty->unit_y2;
1091
1092 /* Destination bounding box */
1093 sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1);
1094 sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1);
1095 sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2);
1096 sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2);
1097
1098 dirty->num_hits++;
1099}
1100
1101/**
1102 * vmw_kms_sou_do_surface_dirty - Dirty part of a surface backed framebuffer
1103 *
1104 * @dev_priv: Pointer to the device private structure.
1105 * @framebuffer: Pointer to the surface-buffer backed framebuffer.
1106 * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
1107 * @vclips: Alternate array of clip rects. Either @clips or @vclips must
1108 * be NULL.
1109 * @srf: Pointer to surface to blit from. If NULL, the surface attached
1110 * to @framebuffer will be used.
1111 * @dest_x: X coordinate offset to align @srf with framebuffer coordinates.
1112 * @dest_y: Y coordinate offset to align @srf with framebuffer coordinates.
1113 * @num_clips: Number of clip rects in @clips.
1114 * @inc: Increment to use when looping over @clips.
1115 * @out_fence: If non-NULL, will return a ref-counted pointer to a
1116 * struct vmw_fence_obj. The returned fence pointer may be NULL in which
1117 * case the device has already synchronized.
91e9f352 1118 * @crtc: If crtc is passed, perform surface dirty on that crtc only.
10b1e0ca
TH
1119 *
1120 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
1121 * interrupted.
1122 */
1123int vmw_kms_sou_do_surface_dirty(struct vmw_private *dev_priv,
1124 struct vmw_framebuffer *framebuffer,
1125 struct drm_clip_rect *clips,
1126 struct drm_vmw_rect *vclips,
1127 struct vmw_resource *srf,
1128 s32 dest_x,
1129 s32 dest_y,
1130 unsigned num_clips, int inc,
91e9f352
DR
1131 struct vmw_fence_obj **out_fence,
1132 struct drm_crtc *crtc)
10b1e0ca
TH
1133{
1134 struct vmw_framebuffer_surface *vfbs =
1135 container_of(framebuffer, typeof(*vfbs), base);
1136 struct vmw_kms_sou_surface_dirty sdirty;
2724b2d5 1137 DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
10b1e0ca
TH
1138 int ret;
1139
1140 if (!srf)
1141 srf = &vfbs->surface->res;
1142
a9f58c45
TH
1143 ret = vmw_validation_add_resource(&val_ctx, srf, 0, VMW_RES_DIRTY_NONE,
1144 NULL, NULL);
10b1e0ca
TH
1145 if (ret)
1146 return ret;
1147
2724b2d5
TH
1148 ret = vmw_validation_prepare(&val_ctx, &dev_priv->cmdbuf_mutex, true);
1149 if (ret)
1150 goto out_unref;
1151
10b1e0ca
TH
1152 sdirty.base.fifo_commit = vmw_sou_surface_fifo_commit;
1153 sdirty.base.clip = vmw_sou_surface_clip;
1154 sdirty.base.dev_priv = dev_priv;
1155 sdirty.base.fifo_reserve_size = sizeof(struct vmw_kms_sou_dirty_cmd) +
1156 sizeof(SVGASignedRect) * num_clips;
91e9f352 1157 sdirty.base.crtc = crtc;
c8261a96 1158
10b1e0ca
TH
1159 sdirty.sid = srf->id;
1160 sdirty.left = sdirty.top = S32_MAX;
1161 sdirty.right = sdirty.bottom = S32_MIN;
1162 sdirty.dst_x = dest_x;
1163 sdirty.dst_y = dest_y;
c8261a96 1164
10b1e0ca
TH
1165 ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
1166 dest_x, dest_y, num_clips, inc,
1167 &sdirty.base);
2724b2d5
TH
1168 vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence,
1169 NULL);
c8261a96
SY
1170
1171 return ret;
2724b2d5
TH
1172
1173out_unref:
1174 vmw_validation_unref_lists(&val_ctx);
1175 return ret;
b5ec427e
JB
1176}
1177
10b1e0ca 1178/**
f1d34bfd 1179 * vmw_sou_bo_fifo_commit - Callback to submit a set of readback clips.
10b1e0ca
TH
1180 *
1181 * @dirty: The closure structure.
1182 *
1183 * Commits a previously built command buffer of readback clips.
1184 */
f1d34bfd 1185static void vmw_sou_bo_fifo_commit(struct vmw_kms_dirty *dirty)
10b1e0ca 1186{
fea7dd54
TH
1187 if (!dirty->num_hits) {
1188 vmw_fifo_commit(dirty->dev_priv, 0);
1189 return;
1190 }
1191
10b1e0ca 1192 vmw_fifo_commit(dirty->dev_priv,
f1d34bfd 1193 sizeof(struct vmw_kms_sou_bo_blit) *
10b1e0ca
TH
1194 dirty->num_hits);
1195}
1196
1197/**
f1d34bfd 1198 * vmw_sou_bo_clip - Callback to encode a readback cliprect.
10b1e0ca
TH
1199 *
1200 * @dirty: The closure structure
1201 *
1202 * Encodes a BLIT_GMRFB_TO_SCREEN cliprect.
1203 */
f1d34bfd 1204static void vmw_sou_bo_clip(struct vmw_kms_dirty *dirty)
10b1e0ca 1205{
f1d34bfd 1206 struct vmw_kms_sou_bo_blit *blit = dirty->cmd;
10b1e0ca
TH
1207
1208 blit += dirty->num_hits;
1209 blit->header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
1210 blit->body.destScreenId = dirty->unit->unit;
1211 blit->body.srcOrigin.x = dirty->fb_x;
1212 blit->body.srcOrigin.y = dirty->fb_y;
1213 blit->body.destRect.left = dirty->unit_x1;
1214 blit->body.destRect.top = dirty->unit_y1;
1215 blit->body.destRect.right = dirty->unit_x2;
1216 blit->body.destRect.bottom = dirty->unit_y2;
1217 dirty->num_hits++;
1218}
1219
1220/**
f1d34bfd 1221 * vmw_kms_do_bo_dirty - Dirty part of a buffer-object backed framebuffer
10b1e0ca
TH
1222 *
1223 * @dev_priv: Pointer to the device private structure.
f1d34bfd 1224 * @framebuffer: Pointer to the buffer-object backed framebuffer.
10b1e0ca 1225 * @clips: Array of clip rects.
897b8180
TH
1226 * @vclips: Alternate array of clip rects. Either @clips or @vclips must
1227 * be NULL.
10b1e0ca
TH
1228 * @num_clips: Number of clip rects in @clips.
1229 * @increment: Increment to use when looping over @clips.
1230 * @interruptible: Whether to perform waits interruptible if possible.
1231 * @out_fence: If non-NULL, will return a ref-counted pointer to a
1232 * struct vmw_fence_obj. The returned fence pointer may be NULL in which
1233 * case the device has already synchronized.
f1d34bfd 1234 * @crtc: If crtc is passed, perform bo dirty on that crtc only.
10b1e0ca
TH
1235 *
1236 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
1237 * interrupted.
1238 */
f1d34bfd 1239int vmw_kms_sou_do_bo_dirty(struct vmw_private *dev_priv,
c8261a96 1240 struct vmw_framebuffer *framebuffer,
c8261a96 1241 struct drm_clip_rect *clips,
897b8180 1242 struct drm_vmw_rect *vclips,
c8261a96 1243 unsigned num_clips, int increment,
10b1e0ca 1244 bool interruptible,
91e9f352
DR
1245 struct vmw_fence_obj **out_fence,
1246 struct drm_crtc *crtc)
b5ec427e 1247{
f1d34bfd
TH
1248 struct vmw_buffer_object *buf =
1249 container_of(framebuffer, struct vmw_framebuffer_bo,
10b1e0ca
TH
1250 base)->buffer;
1251 struct vmw_kms_dirty dirty;
2724b2d5 1252 DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
10b1e0ca 1253 int ret;
b5ec427e 1254
2724b2d5 1255 ret = vmw_validation_add_bo(&val_ctx, buf, false, false);
10b1e0ca
TH
1256 if (ret)
1257 return ret;
b5ec427e 1258
2724b2d5
TH
1259 ret = vmw_validation_prepare(&val_ctx, NULL, interruptible);
1260 if (ret)
1261 goto out_unref;
1262
f1d34bfd 1263 ret = do_bo_define_gmrfb(dev_priv, framebuffer);
c8261a96 1264 if (unlikely(ret != 0))
10b1e0ca 1265 goto out_revert;
c8261a96 1266
91e9f352 1267 dirty.crtc = crtc;
f1d34bfd
TH
1268 dirty.fifo_commit = vmw_sou_bo_fifo_commit;
1269 dirty.clip = vmw_sou_bo_clip;
1270 dirty.fifo_reserve_size = sizeof(struct vmw_kms_sou_bo_blit) *
10b1e0ca 1271 num_clips;
897b8180 1272 ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
10b1e0ca 1273 0, 0, num_clips, increment, &dirty);
2724b2d5
TH
1274 vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence,
1275 NULL);
c8261a96 1276
10b1e0ca 1277 return ret;
c8261a96 1278
10b1e0ca 1279out_revert:
2724b2d5
TH
1280 vmw_validation_revert(&val_ctx);
1281out_unref:
1282 vmw_validation_unref_lists(&val_ctx);
c8261a96 1283
10b1e0ca
TH
1284 return ret;
1285}
c8261a96 1286
c8261a96 1287
10b1e0ca
TH
1288/**
1289 * vmw_sou_readback_fifo_commit - Callback to submit a set of readback clips.
1290 *
1291 * @dirty: The closure structure.
1292 *
1293 * Commits a previously built command buffer of readback clips.
1294 */
1295static void vmw_sou_readback_fifo_commit(struct vmw_kms_dirty *dirty)
1296{
fea7dd54
TH
1297 if (!dirty->num_hits) {
1298 vmw_fifo_commit(dirty->dev_priv, 0);
1299 return;
1300 }
1301
10b1e0ca
TH
1302 vmw_fifo_commit(dirty->dev_priv,
1303 sizeof(struct vmw_kms_sou_readback_blit) *
1304 dirty->num_hits);
b5ec427e 1305}
c8261a96 1306
10b1e0ca
TH
1307/**
1308 * vmw_sou_readback_clip - Callback to encode a readback cliprect.
1309 *
1310 * @dirty: The closure structure
1311 *
1312 * Encodes a BLIT_SCREEN_TO_GMRFB cliprect.
1313 */
1314static void vmw_sou_readback_clip(struct vmw_kms_dirty *dirty)
1315{
1316 struct vmw_kms_sou_readback_blit *blit = dirty->cmd;
1317
1318 blit += dirty->num_hits;
1319 blit->header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
1320 blit->body.srcScreenId = dirty->unit->unit;
1321 blit->body.destOrigin.x = dirty->fb_x;
1322 blit->body.destOrigin.y = dirty->fb_y;
1323 blit->body.srcRect.left = dirty->unit_x1;
1324 blit->body.srcRect.top = dirty->unit_y1;
1325 blit->body.srcRect.right = dirty->unit_x2;
1326 blit->body.srcRect.bottom = dirty->unit_y2;
1327 dirty->num_hits++;
1328}
1329
1330/**
1331 * vmw_kms_sou_readback - Perform a readback from the screen object system to
f1d34bfd 1332 * a buffer-object backed framebuffer.
10b1e0ca
TH
1333 *
1334 * @dev_priv: Pointer to the device private structure.
1335 * @file_priv: Pointer to a struct drm_file identifying the caller.
1336 * Must be set to NULL if @user_fence_rep is NULL.
f1d34bfd 1337 * @vfb: Pointer to the buffer-object backed framebuffer.
10b1e0ca
TH
1338 * @user_fence_rep: User-space provided structure for fence information.
1339 * Must be set to non-NULL if @file_priv is non-NULL.
1340 * @vclips: Array of clip rects.
1341 * @num_clips: Number of clip rects in @vclips.
91e9f352 1342 * @crtc: If crtc is passed, readback on that crtc only.
10b1e0ca
TH
1343 *
1344 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
1345 * interrupted.
1346 */
1347int vmw_kms_sou_readback(struct vmw_private *dev_priv,
1348 struct drm_file *file_priv,
1349 struct vmw_framebuffer *vfb,
1350 struct drm_vmw_fence_rep __user *user_fence_rep,
1351 struct drm_vmw_rect *vclips,
91e9f352
DR
1352 uint32_t num_clips,
1353 struct drm_crtc *crtc)
10b1e0ca 1354{
f1d34bfd
TH
1355 struct vmw_buffer_object *buf =
1356 container_of(vfb, struct vmw_framebuffer_bo, base)->buffer;
10b1e0ca 1357 struct vmw_kms_dirty dirty;
2724b2d5 1358 DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
10b1e0ca
TH
1359 int ret;
1360
2724b2d5 1361 ret = vmw_validation_add_bo(&val_ctx, buf, false, false);
10b1e0ca
TH
1362 if (ret)
1363 return ret;
1364
2724b2d5
TH
1365 ret = vmw_validation_prepare(&val_ctx, NULL, true);
1366 if (ret)
1367 goto out_unref;
1368
f1d34bfd 1369 ret = do_bo_define_gmrfb(dev_priv, vfb);
10b1e0ca
TH
1370 if (unlikely(ret != 0))
1371 goto out_revert;
1372
91e9f352 1373 dirty.crtc = crtc;
10b1e0ca
TH
1374 dirty.fifo_commit = vmw_sou_readback_fifo_commit;
1375 dirty.clip = vmw_sou_readback_clip;
1376 dirty.fifo_reserve_size = sizeof(struct vmw_kms_sou_readback_blit) *
1377 num_clips;
1378 ret = vmw_kms_helper_dirty(dev_priv, vfb, NULL, vclips,
1379 0, 0, num_clips, 1, &dirty);
2724b2d5
TH
1380 vmw_kms_helper_validation_finish(dev_priv, file_priv, &val_ctx, NULL,
1381 user_fence_rep);
10b1e0ca
TH
1382
1383 return ret;
1384
1385out_revert:
2724b2d5
TH
1386 vmw_validation_revert(&val_ctx);
1387out_unref:
1388 vmw_validation_unref_lists(&val_ctx);
1389
10b1e0ca
TH
1390 return ret;
1391}