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dff96888 | 1 | // SPDX-License-Identifier: GPL-2.0 OR MIT |
56d1c78d JB |
2 | /************************************************************************** |
3 | * | |
dff96888 | 4 | * Copyright 2011-2015 VMware, Inc., Palo Alto, CA., USA |
56d1c78d JB |
5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | |
7 | * copy of this software and associated documentation files (the | |
8 | * "Software"), to deal in the Software without restriction, including | |
9 | * without limitation the rights to use, copy, modify, merge, publish, | |
10 | * distribute, sub license, and/or sell copies of the Software, and to | |
11 | * permit persons to whom the Software is furnished to do so, subject to | |
12 | * the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice (including the | |
15 | * next paragraph) shall be included in all copies or substantial portions | |
16 | * of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | |
21 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, | |
22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR | |
23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE | |
24 | * USE OR OTHER DEALINGS IN THE SOFTWARE. | |
25 | * | |
26 | **************************************************************************/ | |
27 | ||
d7721ca7 SY |
28 | #include <drm/drm_atomic.h> |
29 | #include <drm/drm_atomic_helper.h> | |
61c21387 | 30 | #include <drm/drm_damage_helper.h> |
d5c1f011 SR |
31 | #include <drm/drm_fourcc.h> |
32 | #include <drm/drm_plane_helper.h> | |
33 | #include <drm/drm_vblank.h> | |
56d1c78d | 34 | |
d5c1f011 | 35 | #include "vmwgfx_kms.h" |
56d1c78d JB |
36 | |
37 | #define vmw_crtc_to_sou(x) \ | |
38 | container_of(x, struct vmw_screen_object_unit, base.crtc) | |
39 | #define vmw_encoder_to_sou(x) \ | |
40 | container_of(x, struct vmw_screen_object_unit, base.encoder) | |
41 | #define vmw_connector_to_sou(x) \ | |
42 | container_of(x, struct vmw_screen_object_unit, base.connector) | |
43 | ||
10b1e0ca TH |
44 | /** |
45 | * struct vmw_kms_sou_surface_dirty - Closure structure for | |
46 | * blit surface to screen command. | |
47 | * @base: The base type we derive from. Used by vmw_kms_helper_dirty(). | |
48 | * @left: Left side of bounding box. | |
49 | * @right: Right side of bounding box. | |
50 | * @top: Top side of bounding box. | |
51 | * @bottom: Bottom side of bounding box. | |
52 | * @dst_x: Difference between source clip rects and framebuffer coordinates. | |
53 | * @dst_y: Difference between source clip rects and framebuffer coordinates. | |
54 | * @sid: Surface id of surface to copy from. | |
55 | */ | |
56 | struct vmw_kms_sou_surface_dirty { | |
57 | struct vmw_kms_dirty base; | |
58 | s32 left, right, top, bottom; | |
59 | s32 dst_x, dst_y; | |
60 | u32 sid; | |
61 | }; | |
62 | ||
63 | /* | |
64 | * SVGA commands that are used by this code. Please see the device headers | |
65 | * for explanation. | |
66 | */ | |
67 | struct vmw_kms_sou_readback_blit { | |
68 | uint32 header; | |
69 | SVGAFifoCmdBlitScreenToGMRFB body; | |
70 | }; | |
71 | ||
f1d34bfd | 72 | struct vmw_kms_sou_bo_blit { |
10b1e0ca TH |
73 | uint32 header; |
74 | SVGAFifoCmdBlitGMRFBToScreen body; | |
75 | }; | |
76 | ||
77 | struct vmw_kms_sou_dirty_cmd { | |
78 | SVGA3dCmdHeader header; | |
79 | SVGA3dCmdBlitSurfaceToScreen body; | |
80 | }; | |
81 | ||
5d35abad DR |
82 | struct vmw_kms_sou_define_gmrfb { |
83 | uint32_t header; | |
84 | SVGAFifoCmdDefineGMRFB body; | |
85 | }; | |
86 | ||
56d1c78d JB |
87 | /** |
88 | * Display unit using screen objects. | |
89 | */ | |
90 | struct vmw_screen_object_unit { | |
91 | struct vmw_display_unit base; | |
92 | ||
93 | unsigned long buffer_size; /**< Size of allocated buffer */ | |
f1d34bfd | 94 | struct vmw_buffer_object *buffer; /**< Backing store buffer */ |
56d1c78d JB |
95 | |
96 | bool defined; | |
56d1c78d JB |
97 | }; |
98 | ||
99 | static void vmw_sou_destroy(struct vmw_screen_object_unit *sou) | |
100 | { | |
c8261a96 | 101 | vmw_du_cleanup(&sou->base); |
56d1c78d JB |
102 | kfree(sou); |
103 | } | |
104 | ||
105 | ||
106 | /* | |
107 | * Screen Object Display Unit CRTC functions | |
108 | */ | |
109 | ||
110 | static void vmw_sou_crtc_destroy(struct drm_crtc *crtc) | |
111 | { | |
112 | vmw_sou_destroy(vmw_crtc_to_sou(crtc)); | |
113 | } | |
114 | ||
56d1c78d JB |
115 | /** |
116 | * Send the fifo command to create a screen. | |
117 | */ | |
118 | static int vmw_sou_fifo_create(struct vmw_private *dev_priv, | |
119 | struct vmw_screen_object_unit *sou, | |
3e79ecda | 120 | int x, int y, |
56d1c78d JB |
121 | struct drm_display_mode *mode) |
122 | { | |
123 | size_t fifo_size; | |
124 | ||
125 | struct { | |
126 | struct { | |
127 | uint32_t cmdType; | |
128 | } header; | |
129 | SVGAScreenObject obj; | |
130 | } *cmd; | |
131 | ||
132 | BUG_ON(!sou->buffer); | |
133 | ||
134 | fifo_size = sizeof(*cmd); | |
11c45419 DR |
135 | cmd = VMW_FIFO_RESERVE(dev_priv, fifo_size); |
136 | if (unlikely(cmd == NULL)) | |
56d1c78d | 137 | return -ENOMEM; |
56d1c78d JB |
138 | |
139 | memset(cmd, 0, fifo_size); | |
140 | cmd->header.cmdType = SVGA_CMD_DEFINE_SCREEN; | |
141 | cmd->obj.structSize = sizeof(SVGAScreenObject); | |
142 | cmd->obj.id = sou->base.unit; | |
143 | cmd->obj.flags = SVGA_SCREEN_HAS_ROOT | | |
144 | (sou->base.unit == 0 ? SVGA_SCREEN_IS_PRIMARY : 0); | |
145 | cmd->obj.size.width = mode->hdisplay; | |
146 | cmd->obj.size.height = mode->vdisplay; | |
3e79ecda DR |
147 | cmd->obj.root.x = x; |
148 | cmd->obj.root.y = y; | |
6dd687b4 TH |
149 | sou->base.set_gui_x = cmd->obj.root.x; |
150 | sou->base.set_gui_y = cmd->obj.root.y; | |
56d1c78d JB |
151 | |
152 | /* Ok to assume that buffer is pinned in vram */ | |
b37a6b9a | 153 | vmw_bo_get_guest_ptr(&sou->buffer->base, &cmd->obj.backingStore.ptr); |
56d1c78d JB |
154 | cmd->obj.backingStore.pitch = mode->hdisplay * 4; |
155 | ||
156 | vmw_fifo_commit(dev_priv, fifo_size); | |
157 | ||
158 | sou->defined = true; | |
159 | ||
160 | return 0; | |
161 | } | |
162 | ||
163 | /** | |
164 | * Send the fifo command to destroy a screen. | |
165 | */ | |
166 | static int vmw_sou_fifo_destroy(struct vmw_private *dev_priv, | |
167 | struct vmw_screen_object_unit *sou) | |
168 | { | |
169 | size_t fifo_size; | |
170 | int ret; | |
171 | ||
172 | struct { | |
173 | struct { | |
174 | uint32_t cmdType; | |
175 | } header; | |
176 | SVGAFifoCmdDestroyScreen body; | |
177 | } *cmd; | |
178 | ||
179 | /* no need to do anything */ | |
180 | if (unlikely(!sou->defined)) | |
181 | return 0; | |
182 | ||
183 | fifo_size = sizeof(*cmd); | |
11c45419 DR |
184 | cmd = VMW_FIFO_RESERVE(dev_priv, fifo_size); |
185 | if (unlikely(cmd == NULL)) | |
56d1c78d | 186 | return -ENOMEM; |
56d1c78d JB |
187 | |
188 | memset(cmd, 0, fifo_size); | |
189 | cmd->header.cmdType = SVGA_CMD_DESTROY_SCREEN; | |
190 | cmd->body.screenId = sou->base.unit; | |
191 | ||
192 | vmw_fifo_commit(dev_priv, fifo_size); | |
193 | ||
194 | /* Force sync */ | |
195 | ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ); | |
196 | if (unlikely(ret != 0)) | |
197 | DRM_ERROR("Failed to sync with HW"); | |
198 | else | |
199 | sou->defined = false; | |
200 | ||
201 | return ret; | |
202 | } | |
203 | ||
06ec4190 SY |
204 | /** |
205 | * vmw_sou_crtc_mode_set_nofb - Create new screen | |
206 | * | |
207 | * @crtc: CRTC associated with the new screen | |
208 | * | |
209 | * This function creates/destroys a screen. This function cannot fail, so if | |
210 | * somehow we run into a failure, just do the best we can to get out. | |
211 | */ | |
212 | static void vmw_sou_crtc_mode_set_nofb(struct drm_crtc *crtc) | |
213 | { | |
214 | struct vmw_private *dev_priv; | |
215 | struct vmw_screen_object_unit *sou; | |
216 | struct vmw_framebuffer *vfb; | |
217 | struct drm_framebuffer *fb; | |
218 | struct drm_plane_state *ps; | |
219 | struct vmw_plane_state *vps; | |
220 | int ret; | |
221 | ||
3e79ecda | 222 | sou = vmw_crtc_to_sou(crtc); |
06ec4190 | 223 | dev_priv = vmw_priv(crtc->dev); |
3e79ecda DR |
224 | ps = crtc->primary->state; |
225 | fb = ps->fb; | |
226 | vps = vmw_plane_state_to_vps(ps); | |
06ec4190 SY |
227 | |
228 | vfb = (fb) ? vmw_framebuffer_to_vfb(fb) : NULL; | |
229 | ||
230 | if (sou->defined) { | |
231 | ret = vmw_sou_fifo_destroy(dev_priv, sou); | |
232 | if (ret) { | |
233 | DRM_ERROR("Failed to destroy Screen Object\n"); | |
234 | return; | |
235 | } | |
236 | } | |
237 | ||
238 | if (vfb) { | |
3e79ecda DR |
239 | struct drm_connector_state *conn_state; |
240 | struct vmw_connector_state *vmw_conn_state; | |
241 | int x, y; | |
242 | ||
f1d34bfd TH |
243 | sou->buffer = vps->bo; |
244 | sou->buffer_size = vps->bo_size; | |
06ec4190 | 245 | |
9d9486e4 TH |
246 | conn_state = sou->base.connector.state; |
247 | vmw_conn_state = vmw_connector_state_to_vcs(conn_state); | |
248 | ||
249 | x = vmw_conn_state->gui_x; | |
250 | y = vmw_conn_state->gui_y; | |
06ec4190 | 251 | |
3e79ecda | 252 | ret = vmw_sou_fifo_create(dev_priv, sou, x, y, &crtc->mode); |
06ec4190 SY |
253 | if (ret) |
254 | DRM_ERROR("Failed to define Screen Object %dx%d\n", | |
255 | crtc->x, crtc->y); | |
256 | ||
06ec4190 SY |
257 | } else { |
258 | sou->buffer = NULL; | |
259 | sou->buffer_size = 0; | |
06ec4190 SY |
260 | } |
261 | } | |
262 | ||
263 | /** | |
264 | * vmw_sou_crtc_helper_prepare - Noop | |
265 | * | |
266 | * @crtc: CRTC associated with the new screen | |
267 | * | |
268 | * Prepares the CRTC for a mode set, but we don't need to do anything here. | |
269 | */ | |
270 | static void vmw_sou_crtc_helper_prepare(struct drm_crtc *crtc) | |
271 | { | |
272 | } | |
273 | ||
274 | /** | |
0b20a0f8 | 275 | * vmw_sou_crtc_atomic_enable - Noop |
06ec4190 SY |
276 | * |
277 | * @crtc: CRTC associated with the new screen | |
278 | * | |
279 | * This is called after a mode set has been completed. | |
280 | */ | |
0b20a0f8 | 281 | static void vmw_sou_crtc_atomic_enable(struct drm_crtc *crtc, |
351f950d | 282 | struct drm_atomic_state *state) |
06ec4190 SY |
283 | { |
284 | } | |
285 | ||
286 | /** | |
64581714 | 287 | * vmw_sou_crtc_atomic_disable - Turns off CRTC |
06ec4190 SY |
288 | * |
289 | * @crtc: CRTC to be turned off | |
290 | */ | |
64581714 | 291 | static void vmw_sou_crtc_atomic_disable(struct drm_crtc *crtc, |
351f950d | 292 | struct drm_atomic_state *state) |
06ec4190 SY |
293 | { |
294 | struct vmw_private *dev_priv; | |
295 | struct vmw_screen_object_unit *sou; | |
296 | int ret; | |
297 | ||
298 | ||
299 | if (!crtc) { | |
300 | DRM_ERROR("CRTC is NULL\n"); | |
301 | return; | |
302 | } | |
303 | ||
304 | sou = vmw_crtc_to_sou(crtc); | |
305 | dev_priv = vmw_priv(crtc->dev); | |
306 | ||
307 | if (sou->defined) { | |
308 | ret = vmw_sou_fifo_destroy(dev_priv, sou); | |
309 | if (ret) | |
310 | DRM_ERROR("Failed to destroy Screen Object\n"); | |
311 | } | |
312 | } | |
313 | ||
d7955fcf | 314 | static const struct drm_crtc_funcs vmw_screen_object_crtc_funcs = { |
56d1c78d JB |
315 | .gamma_set = vmw_du_crtc_gamma_set, |
316 | .destroy = vmw_sou_crtc_destroy, | |
9c2542a4 SY |
317 | .reset = vmw_du_crtc_reset, |
318 | .atomic_duplicate_state = vmw_du_crtc_duplicate_state, | |
319 | .atomic_destroy_state = vmw_du_crtc_destroy_state, | |
b4fa61ba | 320 | .set_config = drm_atomic_helper_set_config, |
9a01135b | 321 | .page_flip = drm_atomic_helper_page_flip, |
4bebe91a TZ |
322 | .get_vblank_counter = vmw_get_vblank_counter, |
323 | .enable_vblank = vmw_enable_vblank, | |
324 | .disable_vblank = vmw_disable_vblank, | |
56d1c78d JB |
325 | }; |
326 | ||
327 | /* | |
328 | * Screen Object Display Unit encoder functions | |
329 | */ | |
330 | ||
331 | static void vmw_sou_encoder_destroy(struct drm_encoder *encoder) | |
332 | { | |
333 | vmw_sou_destroy(vmw_encoder_to_sou(encoder)); | |
334 | } | |
335 | ||
d7955fcf | 336 | static const struct drm_encoder_funcs vmw_screen_object_encoder_funcs = { |
56d1c78d JB |
337 | .destroy = vmw_sou_encoder_destroy, |
338 | }; | |
339 | ||
340 | /* | |
341 | * Screen Object Display Unit connector functions | |
342 | */ | |
343 | ||
344 | static void vmw_sou_connector_destroy(struct drm_connector *connector) | |
345 | { | |
346 | vmw_sou_destroy(vmw_connector_to_sou(connector)); | |
347 | } | |
348 | ||
d7955fcf | 349 | static const struct drm_connector_funcs vmw_sou_connector_funcs = { |
56d1c78d | 350 | .dpms = vmw_du_connector_dpms, |
d17e67de TR |
351 | .detect = vmw_du_connector_detect, |
352 | .fill_modes = vmw_du_connector_fill_modes, | |
56d1c78d | 353 | .destroy = vmw_sou_connector_destroy, |
d7721ca7 | 354 | .reset = vmw_du_connector_reset, |
8a510a5c RC |
355 | .atomic_duplicate_state = vmw_du_connector_duplicate_state, |
356 | .atomic_destroy_state = vmw_du_connector_destroy_state, | |
56d1c78d JB |
357 | }; |
358 | ||
d947d1b7 SY |
359 | |
360 | static const struct | |
361 | drm_connector_helper_funcs vmw_sou_connector_helper_funcs = { | |
d947d1b7 SY |
362 | }; |
363 | ||
364 | ||
365 | ||
36cc79bc SY |
366 | /* |
367 | * Screen Object Display Plane Functions | |
368 | */ | |
369 | ||
060e2ad5 SY |
370 | /** |
371 | * vmw_sou_primary_plane_cleanup_fb - Frees sou backing buffer | |
372 | * | |
373 | * @plane: display plane | |
374 | * @old_state: Contains the FB to clean up | |
375 | * | |
376 | * Unpins the display surface | |
377 | * | |
378 | * Returns 0 on success | |
379 | */ | |
380 | static void | |
381 | vmw_sou_primary_plane_cleanup_fb(struct drm_plane *plane, | |
382 | struct drm_plane_state *old_state) | |
383 | { | |
384 | struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state); | |
20fb5a63 TH |
385 | struct drm_crtc *crtc = plane->state->crtc ? |
386 | plane->state->crtc : old_state->crtc; | |
060e2ad5 | 387 | |
f1d34bfd TH |
388 | if (vps->bo) |
389 | vmw_bo_unpin(vmw_priv(crtc->dev), vps->bo, false); | |
390 | vmw_bo_unreference(&vps->bo); | |
391 | vps->bo_size = 0; | |
060e2ad5 SY |
392 | |
393 | vmw_du_plane_cleanup_fb(plane, old_state); | |
394 | } | |
395 | ||
396 | ||
397 | /** | |
398 | * vmw_sou_primary_plane_prepare_fb - allocate backing buffer | |
399 | * | |
400 | * @plane: display plane | |
401 | * @new_state: info on the new plane state, including the FB | |
402 | * | |
403 | * The SOU backing buffer is our equivalent of the display plane. | |
404 | * | |
405 | * Returns 0 on success | |
406 | */ | |
407 | static int | |
408 | vmw_sou_primary_plane_prepare_fb(struct drm_plane *plane, | |
409 | struct drm_plane_state *new_state) | |
410 | { | |
411 | struct drm_framebuffer *new_fb = new_state->fb; | |
412 | struct drm_crtc *crtc = plane->state->crtc ?: new_state->crtc; | |
413 | struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state); | |
414 | struct vmw_private *dev_priv; | |
415 | size_t size; | |
416 | int ret; | |
417 | ||
418 | ||
419 | if (!new_fb) { | |
f1d34bfd TH |
420 | vmw_bo_unreference(&vps->bo); |
421 | vps->bo_size = 0; | |
060e2ad5 SY |
422 | |
423 | return 0; | |
424 | } | |
425 | ||
426 | size = new_state->crtc_w * new_state->crtc_h * 4; | |
20fb5a63 | 427 | dev_priv = vmw_priv(crtc->dev); |
060e2ad5 | 428 | |
f1d34bfd TH |
429 | if (vps->bo) { |
430 | if (vps->bo_size == size) { | |
20fb5a63 TH |
431 | /* |
432 | * Note that this might temporarily up the pin-count | |
433 | * to 2, until cleanup_fb() is called. | |
434 | */ | |
f1d34bfd | 435 | return vmw_bo_pin_in_vram(dev_priv, vps->bo, |
20fb5a63 TH |
436 | true); |
437 | } | |
060e2ad5 | 438 | |
f1d34bfd TH |
439 | vmw_bo_unreference(&vps->bo); |
440 | vps->bo_size = 0; | |
060e2ad5 SY |
441 | } |
442 | ||
f1d34bfd TH |
443 | vps->bo = kzalloc(sizeof(*vps->bo), GFP_KERNEL); |
444 | if (!vps->bo) | |
060e2ad5 SY |
445 | return -ENOMEM; |
446 | ||
060e2ad5 SY |
447 | vmw_svga_enable(dev_priv); |
448 | ||
449 | /* After we have alloced the backing store might not be able to | |
450 | * resume the overlays, this is preferred to failing to alloc. | |
451 | */ | |
452 | vmw_overlay_pause_all(dev_priv); | |
f1d34bfd | 453 | ret = vmw_bo_init(dev_priv, vps->bo, size, |
fbe86ca5 CK |
454 | &vmw_vram_placement, |
455 | false, true, &vmw_bo_bo_free); | |
060e2ad5 | 456 | vmw_overlay_resume_all(dev_priv); |
20fb5a63 | 457 | if (ret) { |
f1d34bfd | 458 | vps->bo = NULL; /* vmw_bo_init frees on error */ |
20fb5a63 TH |
459 | return ret; |
460 | } | |
060e2ad5 | 461 | |
f1d34bfd | 462 | vps->bo_size = size; |
91ba9f28 | 463 | |
20fb5a63 TH |
464 | /* |
465 | * TTM already thinks the buffer is pinned, but make sure the | |
466 | * pin_count is upped. | |
467 | */ | |
f1d34bfd | 468 | return vmw_bo_pin_in_vram(dev_priv, vps->bo, true); |
060e2ad5 SY |
469 | } |
470 | ||
5d35abad DR |
471 | static uint32_t vmw_sou_bo_fifo_size(struct vmw_du_update_plane *update, |
472 | uint32_t num_hits) | |
473 | { | |
474 | return sizeof(struct vmw_kms_sou_define_gmrfb) + | |
475 | sizeof(struct vmw_kms_sou_bo_blit) * num_hits; | |
476 | } | |
477 | ||
478 | static uint32_t vmw_sou_bo_define_gmrfb(struct vmw_du_update_plane *update, | |
479 | void *cmd) | |
480 | { | |
481 | struct vmw_framebuffer_bo *vfbbo = | |
482 | container_of(update->vfb, typeof(*vfbbo), base); | |
483 | struct vmw_kms_sou_define_gmrfb *gmr = cmd; | |
484 | int depth = update->vfb->base.format->depth; | |
485 | ||
486 | /* Emulate RGBA support, contrary to svga_reg.h this is not | |
487 | * supported by hosts. This is only a problem if we are reading | |
488 | * this value later and expecting what we uploaded back. | |
489 | */ | |
490 | if (depth == 32) | |
491 | depth = 24; | |
492 | ||
493 | gmr->header = SVGA_CMD_DEFINE_GMRFB; | |
494 | ||
495 | gmr->body.format.bitsPerPixel = update->vfb->base.format->cpp[0] * 8; | |
496 | gmr->body.format.colorDepth = depth; | |
497 | gmr->body.format.reserved = 0; | |
498 | gmr->body.bytesPerLine = update->vfb->base.pitches[0]; | |
499 | vmw_bo_get_guest_ptr(&vfbbo->buffer->base, &gmr->body.ptr); | |
500 | ||
501 | return sizeof(*gmr); | |
502 | } | |
503 | ||
504 | static uint32_t vmw_sou_bo_populate_clip(struct vmw_du_update_plane *update, | |
505 | void *cmd, struct drm_rect *clip, | |
506 | uint32_t fb_x, uint32_t fb_y) | |
507 | { | |
508 | struct vmw_kms_sou_bo_blit *blit = cmd; | |
509 | ||
510 | blit->header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN; | |
511 | blit->body.destScreenId = update->du->unit; | |
512 | blit->body.srcOrigin.x = fb_x; | |
513 | blit->body.srcOrigin.y = fb_y; | |
514 | blit->body.destRect.left = clip->x1; | |
515 | blit->body.destRect.top = clip->y1; | |
516 | blit->body.destRect.right = clip->x2; | |
517 | blit->body.destRect.bottom = clip->y2; | |
518 | ||
519 | return sizeof(*blit); | |
520 | } | |
521 | ||
522 | static uint32_t vmw_stud_bo_post_clip(struct vmw_du_update_plane *update, | |
523 | void *cmd, struct drm_rect *bb) | |
524 | { | |
525 | return 0; | |
526 | } | |
527 | ||
528 | /** | |
529 | * vmw_sou_plane_update_bo - Update display unit for bo backed fb. | |
530 | * @dev_priv: Device private. | |
531 | * @plane: Plane state. | |
532 | * @old_state: Old plane state. | |
533 | * @vfb: Framebuffer which is blitted to display unit. | |
534 | * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj. | |
535 | * The returned fence pointer may be NULL in which case the device | |
536 | * has already synchronized. | |
537 | * | |
538 | * Return: 0 on success or a negative error code on failure. | |
539 | */ | |
540 | static int vmw_sou_plane_update_bo(struct vmw_private *dev_priv, | |
541 | struct drm_plane *plane, | |
542 | struct drm_plane_state *old_state, | |
543 | struct vmw_framebuffer *vfb, | |
544 | struct vmw_fence_obj **out_fence) | |
545 | { | |
546 | struct vmw_du_update_plane_buffer bo_update; | |
547 | ||
548 | memset(&bo_update, 0, sizeof(struct vmw_du_update_plane_buffer)); | |
549 | bo_update.base.plane = plane; | |
550 | bo_update.base.old_state = old_state; | |
551 | bo_update.base.dev_priv = dev_priv; | |
552 | bo_update.base.du = vmw_crtc_to_du(plane->state->crtc); | |
553 | bo_update.base.vfb = vfb; | |
554 | bo_update.base.out_fence = out_fence; | |
555 | bo_update.base.mutex = NULL; | |
556 | bo_update.base.cpu_blit = false; | |
557 | bo_update.base.intr = true; | |
558 | ||
559 | bo_update.base.calc_fifo_size = vmw_sou_bo_fifo_size; | |
560 | bo_update.base.post_prepare = vmw_sou_bo_define_gmrfb; | |
561 | bo_update.base.clip = vmw_sou_bo_populate_clip; | |
562 | bo_update.base.post_clip = vmw_stud_bo_post_clip; | |
563 | ||
564 | return vmw_du_helper_plane_update(&bo_update.base); | |
565 | } | |
566 | ||
43d1e627 DR |
567 | static uint32_t vmw_sou_surface_fifo_size(struct vmw_du_update_plane *update, |
568 | uint32_t num_hits) | |
569 | { | |
570 | return sizeof(struct vmw_kms_sou_dirty_cmd) + sizeof(SVGASignedRect) * | |
571 | num_hits; | |
572 | } | |
573 | ||
574 | static uint32_t vmw_sou_surface_post_prepare(struct vmw_du_update_plane *update, | |
575 | void *cmd) | |
576 | { | |
577 | struct vmw_du_update_plane_surface *srf_update; | |
578 | ||
579 | srf_update = container_of(update, typeof(*srf_update), base); | |
580 | ||
581 | /* | |
582 | * SOU SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN is special in the sense that | |
583 | * its bounding box is filled before iterating over all the clips. So | |
584 | * store the FIFO start address and revisit to fill the details. | |
585 | */ | |
586 | srf_update->cmd_start = cmd; | |
587 | ||
588 | return 0; | |
589 | } | |
590 | ||
591 | static uint32_t vmw_sou_surface_pre_clip(struct vmw_du_update_plane *update, | |
592 | void *cmd, uint32_t num_hits) | |
593 | { | |
594 | struct vmw_kms_sou_dirty_cmd *blit = cmd; | |
595 | struct vmw_framebuffer_surface *vfbs; | |
596 | ||
597 | vfbs = container_of(update->vfb, typeof(*vfbs), base); | |
598 | ||
599 | blit->header.id = SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN; | |
600 | blit->header.size = sizeof(blit->body) + sizeof(SVGASignedRect) * | |
601 | num_hits; | |
602 | ||
603 | blit->body.srcImage.sid = vfbs->surface->res.id; | |
604 | blit->body.destScreenId = update->du->unit; | |
605 | ||
606 | /* Update the source and destination bounding box later in post_clip */ | |
607 | blit->body.srcRect.left = 0; | |
608 | blit->body.srcRect.top = 0; | |
609 | blit->body.srcRect.right = 0; | |
610 | blit->body.srcRect.bottom = 0; | |
611 | ||
612 | blit->body.destRect.left = 0; | |
613 | blit->body.destRect.top = 0; | |
614 | blit->body.destRect.right = 0; | |
615 | blit->body.destRect.bottom = 0; | |
616 | ||
617 | return sizeof(*blit); | |
618 | } | |
619 | ||
620 | static uint32_t vmw_sou_surface_clip_rect(struct vmw_du_update_plane *update, | |
621 | void *cmd, struct drm_rect *clip, | |
622 | uint32_t src_x, uint32_t src_y) | |
623 | { | |
624 | SVGASignedRect *rect = cmd; | |
625 | ||
626 | /* | |
627 | * rects are relative to dest bounding box rect on screen object, so | |
628 | * translate to it later in post_clip | |
629 | */ | |
630 | rect->left = clip->x1; | |
631 | rect->top = clip->y1; | |
632 | rect->right = clip->x2; | |
633 | rect->bottom = clip->y2; | |
634 | ||
635 | return sizeof(*rect); | |
636 | } | |
637 | ||
638 | static uint32_t vmw_sou_surface_post_clip(struct vmw_du_update_plane *update, | |
639 | void *cmd, struct drm_rect *bb) | |
640 | { | |
641 | struct vmw_du_update_plane_surface *srf_update; | |
642 | struct drm_plane_state *state = update->plane->state; | |
643 | struct drm_rect src_bb; | |
644 | struct vmw_kms_sou_dirty_cmd *blit; | |
645 | SVGASignedRect *rect; | |
646 | uint32_t num_hits; | |
647 | int translate_src_x; | |
648 | int translate_src_y; | |
649 | int i; | |
650 | ||
651 | srf_update = container_of(update, typeof(*srf_update), base); | |
652 | ||
653 | blit = srf_update->cmd_start; | |
654 | rect = (SVGASignedRect *)&blit[1]; | |
655 | ||
656 | num_hits = (blit->header.size - sizeof(blit->body))/ | |
657 | sizeof(SVGASignedRect); | |
658 | ||
659 | src_bb = *bb; | |
660 | ||
661 | /* To translate bb back to fb src coord */ | |
662 | translate_src_x = (state->src_x >> 16) - state->crtc_x; | |
663 | translate_src_y = (state->src_y >> 16) - state->crtc_y; | |
664 | ||
665 | drm_rect_translate(&src_bb, translate_src_x, translate_src_y); | |
666 | ||
667 | blit->body.srcRect.left = src_bb.x1; | |
668 | blit->body.srcRect.top = src_bb.y1; | |
669 | blit->body.srcRect.right = src_bb.x2; | |
670 | blit->body.srcRect.bottom = src_bb.y2; | |
671 | ||
672 | blit->body.destRect.left = bb->x1; | |
673 | blit->body.destRect.top = bb->y1; | |
674 | blit->body.destRect.right = bb->x2; | |
675 | blit->body.destRect.bottom = bb->y2; | |
676 | ||
677 | /* rects are relative to dest bb rect */ | |
678 | for (i = 0; i < num_hits; i++) { | |
679 | rect->left -= bb->x1; | |
680 | rect->top -= bb->y1; | |
681 | rect->right -= bb->x1; | |
682 | rect->bottom -= bb->y1; | |
683 | rect++; | |
684 | } | |
685 | ||
686 | return 0; | |
687 | } | |
688 | ||
689 | /** | |
690 | * vmw_sou_plane_update_surface - Update display unit for surface backed fb. | |
691 | * @dev_priv: Device private. | |
692 | * @plane: Plane state. | |
693 | * @old_state: Old plane state. | |
694 | * @vfb: Framebuffer which is blitted to display unit | |
695 | * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj. | |
696 | * The returned fence pointer may be NULL in which case the device | |
697 | * has already synchronized. | |
698 | * | |
699 | * Return: 0 on success or a negative error code on failure. | |
700 | */ | |
701 | static int vmw_sou_plane_update_surface(struct vmw_private *dev_priv, | |
702 | struct drm_plane *plane, | |
703 | struct drm_plane_state *old_state, | |
704 | struct vmw_framebuffer *vfb, | |
705 | struct vmw_fence_obj **out_fence) | |
706 | { | |
707 | struct vmw_du_update_plane_surface srf_update; | |
708 | ||
709 | memset(&srf_update, 0, sizeof(struct vmw_du_update_plane_surface)); | |
710 | srf_update.base.plane = plane; | |
711 | srf_update.base.old_state = old_state; | |
712 | srf_update.base.dev_priv = dev_priv; | |
713 | srf_update.base.du = vmw_crtc_to_du(plane->state->crtc); | |
714 | srf_update.base.vfb = vfb; | |
715 | srf_update.base.out_fence = out_fence; | |
716 | srf_update.base.mutex = &dev_priv->cmdbuf_mutex; | |
717 | srf_update.base.cpu_blit = false; | |
718 | srf_update.base.intr = true; | |
719 | ||
720 | srf_update.base.calc_fifo_size = vmw_sou_surface_fifo_size; | |
721 | srf_update.base.post_prepare = vmw_sou_surface_post_prepare; | |
722 | srf_update.base.pre_clip = vmw_sou_surface_pre_clip; | |
723 | srf_update.base.clip = vmw_sou_surface_clip_rect; | |
724 | srf_update.base.post_clip = vmw_sou_surface_post_clip; | |
725 | ||
726 | return vmw_du_helper_plane_update(&srf_update.base); | |
727 | } | |
060e2ad5 SY |
728 | |
729 | static void | |
730 | vmw_sou_primary_plane_atomic_update(struct drm_plane *plane, | |
731 | struct drm_plane_state *old_state) | |
732 | { | |
b0119cb9 | 733 | struct drm_crtc *crtc = plane->state->crtc; |
aa64b3f1 DR |
734 | struct drm_pending_vblank_event *event = NULL; |
735 | struct vmw_fence_obj *fence = NULL; | |
736 | int ret; | |
737 | ||
31da2df8 | 738 | /* In case of device error, maintain consistent atomic state */ |
aa64b3f1 DR |
739 | if (crtc && plane->state->fb) { |
740 | struct vmw_private *dev_priv = vmw_priv(crtc->dev); | |
741 | struct vmw_framebuffer *vfb = | |
742 | vmw_framebuffer_to_vfb(plane->state->fb); | |
aa64b3f1 | 743 | |
f1d34bfd | 744 | if (vfb->bo) |
67a51b3d DR |
745 | ret = vmw_sou_plane_update_bo(dev_priv, plane, |
746 | old_state, vfb, &fence); | |
aa64b3f1 | 747 | else |
67a51b3d DR |
748 | ret = vmw_sou_plane_update_surface(dev_priv, plane, |
749 | old_state, vfb, | |
750 | &fence); | |
aa64b3f1 DR |
751 | if (ret != 0) |
752 | DRM_ERROR("Failed to update screen.\n"); | |
aa64b3f1 | 753 | } else { |
31da2df8 | 754 | /* Do nothing when fb and crtc is NULL (blank crtc) */ |
aa64b3f1 DR |
755 | return; |
756 | } | |
757 | ||
31da2df8 | 758 | /* For error case vblank event is send from vmw_du_crtc_atomic_flush */ |
aa64b3f1 | 759 | event = crtc->state->event; |
aa64b3f1 DR |
760 | if (event && fence) { |
761 | struct drm_file *file_priv = event->base.file_priv; | |
762 | ||
763 | ret = vmw_event_fence_action_queue(file_priv, | |
764 | fence, | |
765 | &event->base, | |
766 | &event->event.vbl.tv_sec, | |
767 | &event->event.vbl.tv_usec, | |
768 | true); | |
769 | ||
770 | if (unlikely(ret != 0)) | |
771 | DRM_ERROR("Failed to queue event on fence.\n"); | |
772 | else | |
773 | crtc->state->event = NULL; | |
774 | } | |
775 | ||
776 | if (fence) | |
777 | vmw_fence_obj_unreference(&fence); | |
060e2ad5 SY |
778 | } |
779 | ||
780 | ||
36cc79bc | 781 | static const struct drm_plane_funcs vmw_sou_plane_funcs = { |
b0119cb9 SY |
782 | .update_plane = drm_atomic_helper_update_plane, |
783 | .disable_plane = drm_atomic_helper_disable_plane, | |
36cc79bc | 784 | .destroy = vmw_du_primary_plane_destroy, |
cc5ec459 SY |
785 | .reset = vmw_du_plane_reset, |
786 | .atomic_duplicate_state = vmw_du_plane_duplicate_state, | |
787 | .atomic_destroy_state = vmw_du_plane_destroy_state, | |
36cc79bc SY |
788 | }; |
789 | ||
790 | static const struct drm_plane_funcs vmw_sou_cursor_funcs = { | |
b0119cb9 SY |
791 | .update_plane = drm_atomic_helper_update_plane, |
792 | .disable_plane = drm_atomic_helper_disable_plane, | |
36cc79bc | 793 | .destroy = vmw_du_cursor_plane_destroy, |
cc5ec459 SY |
794 | .reset = vmw_du_plane_reset, |
795 | .atomic_duplicate_state = vmw_du_plane_duplicate_state, | |
796 | .atomic_destroy_state = vmw_du_plane_destroy_state, | |
36cc79bc SY |
797 | }; |
798 | ||
06ec4190 SY |
799 | /* |
800 | * Atomic Helpers | |
801 | */ | |
060e2ad5 SY |
802 | static const struct |
803 | drm_plane_helper_funcs vmw_sou_cursor_plane_helper_funcs = { | |
804 | .atomic_check = vmw_du_cursor_plane_atomic_check, | |
805 | .atomic_update = vmw_du_cursor_plane_atomic_update, | |
806 | .prepare_fb = vmw_du_cursor_plane_prepare_fb, | |
807 | .cleanup_fb = vmw_du_plane_cleanup_fb, | |
808 | }; | |
809 | ||
810 | static const struct | |
811 | drm_plane_helper_funcs vmw_sou_primary_plane_helper_funcs = { | |
812 | .atomic_check = vmw_du_primary_plane_atomic_check, | |
813 | .atomic_update = vmw_sou_primary_plane_atomic_update, | |
814 | .prepare_fb = vmw_sou_primary_plane_prepare_fb, | |
815 | .cleanup_fb = vmw_sou_primary_plane_cleanup_fb, | |
816 | }; | |
817 | ||
06ec4190 SY |
818 | static const struct drm_crtc_helper_funcs vmw_sou_crtc_helper_funcs = { |
819 | .prepare = vmw_sou_crtc_helper_prepare, | |
06ec4190 SY |
820 | .mode_set_nofb = vmw_sou_crtc_mode_set_nofb, |
821 | .atomic_check = vmw_du_crtc_atomic_check, | |
822 | .atomic_begin = vmw_du_crtc_atomic_begin, | |
823 | .atomic_flush = vmw_du_crtc_atomic_flush, | |
0b20a0f8 | 824 | .atomic_enable = vmw_sou_crtc_atomic_enable, |
64581714 | 825 | .atomic_disable = vmw_sou_crtc_atomic_disable, |
06ec4190 SY |
826 | }; |
827 | ||
36cc79bc | 828 | |
56d1c78d JB |
829 | static int vmw_sou_init(struct vmw_private *dev_priv, unsigned unit) |
830 | { | |
831 | struct vmw_screen_object_unit *sou; | |
832 | struct drm_device *dev = dev_priv->dev; | |
833 | struct drm_connector *connector; | |
834 | struct drm_encoder *encoder; | |
cc5ec459 | 835 | struct drm_plane *primary, *cursor; |
56d1c78d | 836 | struct drm_crtc *crtc; |
36cc79bc | 837 | int ret; |
56d1c78d JB |
838 | |
839 | sou = kzalloc(sizeof(*sou), GFP_KERNEL); | |
840 | if (!sou) | |
841 | return -ENOMEM; | |
842 | ||
843 | sou->base.unit = unit; | |
844 | crtc = &sou->base.crtc; | |
845 | encoder = &sou->base.encoder; | |
846 | connector = &sou->base.connector; | |
cc5ec459 SY |
847 | primary = &sou->base.primary; |
848 | cursor = &sou->base.cursor; | |
56d1c78d | 849 | |
56d1c78d | 850 | sou->base.pref_active = (unit == 0); |
eb4f923b JB |
851 | sou->base.pref_width = dev_priv->initial_width; |
852 | sou->base.pref_height = dev_priv->initial_height; | |
56d1c78d | 853 | sou->base.pref_mode = NULL; |
9c2542a4 SY |
854 | |
855 | /* | |
856 | * Remove this after enabling atomic because property values can | |
857 | * only exist in a state object | |
858 | */ | |
2e69b25b | 859 | sou->base.is_implicit = false; |
56d1c78d | 860 | |
36cc79bc SY |
861 | /* Initialize primary plane */ |
862 | ret = drm_universal_plane_init(dev, &sou->base.primary, | |
863 | 0, &vmw_sou_plane_funcs, | |
864 | vmw_primary_plane_formats, | |
865 | ARRAY_SIZE(vmw_primary_plane_formats), | |
e6fc3b68 | 866 | NULL, DRM_PLANE_TYPE_PRIMARY, NULL); |
36cc79bc SY |
867 | if (ret) { |
868 | DRM_ERROR("Failed to initialize primary plane"); | |
869 | goto err_free; | |
870 | } | |
871 | ||
060e2ad5 | 872 | drm_plane_helper_add(primary, &vmw_sou_primary_plane_helper_funcs); |
61c21387 | 873 | drm_plane_enable_fb_damage_clips(primary); |
060e2ad5 | 874 | |
36cc79bc SY |
875 | /* Initialize cursor plane */ |
876 | ret = drm_universal_plane_init(dev, &sou->base.cursor, | |
877 | 0, &vmw_sou_cursor_funcs, | |
878 | vmw_cursor_plane_formats, | |
879 | ARRAY_SIZE(vmw_cursor_plane_formats), | |
e6fc3b68 | 880 | NULL, DRM_PLANE_TYPE_CURSOR, NULL); |
36cc79bc SY |
881 | if (ret) { |
882 | DRM_ERROR("Failed to initialize cursor plane"); | |
883 | drm_plane_cleanup(&sou->base.primary); | |
884 | goto err_free; | |
885 | } | |
886 | ||
060e2ad5 SY |
887 | drm_plane_helper_add(cursor, &vmw_sou_cursor_plane_helper_funcs); |
888 | ||
36cc79bc SY |
889 | ret = drm_connector_init(dev, connector, &vmw_sou_connector_funcs, |
890 | DRM_MODE_CONNECTOR_VIRTUAL); | |
891 | if (ret) { | |
892 | DRM_ERROR("Failed to initialize connector\n"); | |
893 | goto err_free; | |
894 | } | |
895 | ||
d947d1b7 | 896 | drm_connector_helper_add(connector, &vmw_sou_connector_helper_funcs); |
56d1c78d JB |
897 | connector->status = vmw_du_connector_detect(connector, true); |
898 | ||
36cc79bc SY |
899 | ret = drm_encoder_init(dev, encoder, &vmw_screen_object_encoder_funcs, |
900 | DRM_MODE_ENCODER_VIRTUAL, NULL); | |
901 | if (ret) { | |
902 | DRM_ERROR("Failed to initialize encoder\n"); | |
903 | goto err_free_connector; | |
904 | } | |
905 | ||
cde4c44d | 906 | (void) drm_connector_attach_encoder(connector, encoder); |
56d1c78d JB |
907 | encoder->possible_crtcs = (1 << unit); |
908 | encoder->possible_clones = 0; | |
909 | ||
36cc79bc SY |
910 | ret = drm_connector_register(connector); |
911 | if (ret) { | |
912 | DRM_ERROR("Failed to register connector\n"); | |
913 | goto err_free_encoder; | |
914 | } | |
6a0a7a9e | 915 | |
36cc79bc SY |
916 | ret = drm_crtc_init_with_planes(dev, crtc, &sou->base.primary, |
917 | &sou->base.cursor, | |
918 | &vmw_screen_object_crtc_funcs, NULL); | |
919 | if (ret) { | |
920 | DRM_ERROR("Failed to initialize CRTC\n"); | |
921 | goto err_free_unregister; | |
922 | } | |
56d1c78d | 923 | |
06ec4190 SY |
924 | drm_crtc_helper_add(crtc, &vmw_sou_crtc_helper_funcs); |
925 | ||
56d1c78d JB |
926 | drm_mode_crtc_set_gamma_size(crtc, 256); |
927 | ||
578e609a TH |
928 | drm_object_attach_property(&connector->base, |
929 | dev_priv->hotplug_mode_update_property, 1); | |
930 | drm_object_attach_property(&connector->base, | |
931 | dev->mode_config.suggested_x_property, 0); | |
932 | drm_object_attach_property(&connector->base, | |
933 | dev->mode_config.suggested_y_property, 0); | |
56d1c78d | 934 | return 0; |
36cc79bc SY |
935 | |
936 | err_free_unregister: | |
937 | drm_connector_unregister(connector); | |
938 | err_free_encoder: | |
939 | drm_encoder_cleanup(encoder); | |
940 | err_free_connector: | |
941 | drm_connector_cleanup(connector); | |
942 | err_free: | |
943 | kfree(sou); | |
944 | return ret; | |
56d1c78d JB |
945 | } |
946 | ||
c8261a96 | 947 | int vmw_kms_sou_init_display(struct vmw_private *dev_priv) |
56d1c78d JB |
948 | { |
949 | struct drm_device *dev = dev_priv->dev; | |
74b5ea30 | 950 | int i, ret; |
56d1c78d | 951 | |
29a16e95 | 952 | if (!(dev_priv->capabilities & SVGA_CAP_SCREEN_OBJECT_2)) { |
56d1c78d JB |
953 | DRM_INFO("Not using screen objects," |
954 | " missing cap SCREEN_OBJECT_2\n"); | |
955 | return -ENOSYS; | |
956 | } | |
957 | ||
958 | ret = -ENOMEM; | |
56d1c78d JB |
959 | |
960 | ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS); | |
961 | if (unlikely(ret != 0)) | |
75c06855 | 962 | return ret; |
56d1c78d | 963 | |
56d1c78d JB |
964 | for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) |
965 | vmw_sou_init(dev_priv, i); | |
966 | ||
c8261a96 SY |
967 | dev_priv->active_display_unit = vmw_du_screen_object; |
968 | ||
1338441c RS |
969 | drm_mode_config_reset(dev); |
970 | ||
c8261a96 | 971 | DRM_INFO("Screen Objects Display Unit initialized\n"); |
56d1c78d JB |
972 | |
973 | return 0; | |
56d1c78d JB |
974 | } |
975 | ||
f1d34bfd | 976 | static int do_bo_define_gmrfb(struct vmw_private *dev_priv, |
c8261a96 | 977 | struct vmw_framebuffer *framebuffer) |
b5ec427e | 978 | { |
f1d34bfd TH |
979 | struct vmw_buffer_object *buf = |
980 | container_of(framebuffer, struct vmw_framebuffer_bo, | |
10b1e0ca | 981 | base)->buffer; |
b00c600e | 982 | int depth = framebuffer->base.format->depth; |
c8261a96 SY |
983 | struct { |
984 | uint32_t header; | |
985 | SVGAFifoCmdDefineGMRFB body; | |
986 | } *cmd; | |
b5ec427e | 987 | |
c8261a96 SY |
988 | /* Emulate RGBA support, contrary to svga_reg.h this is not |
989 | * supported by hosts. This is only a problem if we are reading | |
990 | * this value later and expecting what we uploaded back. | |
991 | */ | |
992 | if (depth == 32) | |
993 | depth = 24; | |
b5ec427e | 994 | |
11c45419 DR |
995 | cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd)); |
996 | if (!cmd) | |
c8261a96 | 997 | return -ENOMEM; |
c8261a96 | 998 | |
c8261a96 | 999 | cmd->header = SVGA_CMD_DEFINE_GMRFB; |
272725c7 | 1000 | cmd->body.format.bitsPerPixel = framebuffer->base.format->cpp[0] * 8; |
c8261a96 SY |
1001 | cmd->body.format.colorDepth = depth; |
1002 | cmd->body.format.reserved = 0; | |
1003 | cmd->body.bytesPerLine = framebuffer->base.pitches[0]; | |
10b1e0ca TH |
1004 | /* Buffer is reserved in vram or GMR */ |
1005 | vmw_bo_get_guest_ptr(&buf->base, &cmd->body.ptr); | |
1006 | vmw_fifo_commit(dev_priv, sizeof(*cmd)); | |
1007 | ||
1008 | return 0; | |
1009 | } | |
1010 | ||
1011 | /** | |
1012 | * vmw_sou_surface_fifo_commit - Callback to fill in and submit a | |
1013 | * blit surface to screen command. | |
1014 | * | |
1015 | * @dirty: The closure structure. | |
1016 | * | |
1017 | * Fills in the missing fields in the command, and translates the cliprects | |
1018 | * to match the destination bounding box encoded. | |
1019 | */ | |
1020 | static void vmw_sou_surface_fifo_commit(struct vmw_kms_dirty *dirty) | |
1021 | { | |
1022 | struct vmw_kms_sou_surface_dirty *sdirty = | |
1023 | container_of(dirty, typeof(*sdirty), base); | |
1024 | struct vmw_kms_sou_dirty_cmd *cmd = dirty->cmd; | |
1025 | s32 trans_x = dirty->unit->crtc.x - sdirty->dst_x; | |
1026 | s32 trans_y = dirty->unit->crtc.y - sdirty->dst_y; | |
1027 | size_t region_size = dirty->num_hits * sizeof(SVGASignedRect); | |
1028 | SVGASignedRect *blit = (SVGASignedRect *) &cmd[1]; | |
1029 | int i; | |
1030 | ||
fea7dd54 TH |
1031 | if (!dirty->num_hits) { |
1032 | vmw_fifo_commit(dirty->dev_priv, 0); | |
1033 | return; | |
1034 | } | |
1035 | ||
10b1e0ca TH |
1036 | cmd->header.id = SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN; |
1037 | cmd->header.size = sizeof(cmd->body) + region_size; | |
1038 | ||
1039 | /* | |
1040 | * Use the destination bounding box to specify destination - and | |
1041 | * source bounding regions. | |
1042 | */ | |
1043 | cmd->body.destRect.left = sdirty->left; | |
1044 | cmd->body.destRect.right = sdirty->right; | |
1045 | cmd->body.destRect.top = sdirty->top; | |
1046 | cmd->body.destRect.bottom = sdirty->bottom; | |
1047 | ||
1048 | cmd->body.srcRect.left = sdirty->left + trans_x; | |
1049 | cmd->body.srcRect.right = sdirty->right + trans_x; | |
1050 | cmd->body.srcRect.top = sdirty->top + trans_y; | |
1051 | cmd->body.srcRect.bottom = sdirty->bottom + trans_y; | |
1052 | ||
1053 | cmd->body.srcImage.sid = sdirty->sid; | |
1054 | cmd->body.destScreenId = dirty->unit->unit; | |
1055 | ||
1056 | /* Blits are relative to the destination rect. Translate. */ | |
1057 | for (i = 0; i < dirty->num_hits; ++i, ++blit) { | |
1058 | blit->left -= sdirty->left; | |
1059 | blit->right -= sdirty->left; | |
1060 | blit->top -= sdirty->top; | |
1061 | blit->bottom -= sdirty->top; | |
1062 | } | |
1063 | ||
1064 | vmw_fifo_commit(dirty->dev_priv, region_size + sizeof(*cmd)); | |
1065 | ||
1066 | sdirty->left = sdirty->top = S32_MAX; | |
1067 | sdirty->right = sdirty->bottom = S32_MIN; | |
1068 | } | |
1069 | ||
1070 | /** | |
1071 | * vmw_sou_surface_clip - Callback to encode a blit surface to screen cliprect. | |
1072 | * | |
1073 | * @dirty: The closure structure | |
1074 | * | |
1075 | * Encodes a SVGASignedRect cliprect and updates the bounding box of the | |
1076 | * BLIT_SURFACE_TO_SCREEN command. | |
1077 | */ | |
1078 | static void vmw_sou_surface_clip(struct vmw_kms_dirty *dirty) | |
1079 | { | |
1080 | struct vmw_kms_sou_surface_dirty *sdirty = | |
1081 | container_of(dirty, typeof(*sdirty), base); | |
1082 | struct vmw_kms_sou_dirty_cmd *cmd = dirty->cmd; | |
1083 | SVGASignedRect *blit = (SVGASignedRect *) &cmd[1]; | |
1084 | ||
1085 | /* Destination rect. */ | |
1086 | blit += dirty->num_hits; | |
1087 | blit->left = dirty->unit_x1; | |
1088 | blit->top = dirty->unit_y1; | |
1089 | blit->right = dirty->unit_x2; | |
1090 | blit->bottom = dirty->unit_y2; | |
1091 | ||
1092 | /* Destination bounding box */ | |
1093 | sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1); | |
1094 | sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1); | |
1095 | sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2); | |
1096 | sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2); | |
1097 | ||
1098 | dirty->num_hits++; | |
1099 | } | |
1100 | ||
1101 | /** | |
1102 | * vmw_kms_sou_do_surface_dirty - Dirty part of a surface backed framebuffer | |
1103 | * | |
1104 | * @dev_priv: Pointer to the device private structure. | |
1105 | * @framebuffer: Pointer to the surface-buffer backed framebuffer. | |
1106 | * @clips: Array of clip rects. Either @clips or @vclips must be NULL. | |
1107 | * @vclips: Alternate array of clip rects. Either @clips or @vclips must | |
1108 | * be NULL. | |
1109 | * @srf: Pointer to surface to blit from. If NULL, the surface attached | |
1110 | * to @framebuffer will be used. | |
1111 | * @dest_x: X coordinate offset to align @srf with framebuffer coordinates. | |
1112 | * @dest_y: Y coordinate offset to align @srf with framebuffer coordinates. | |
1113 | * @num_clips: Number of clip rects in @clips. | |
1114 | * @inc: Increment to use when looping over @clips. | |
1115 | * @out_fence: If non-NULL, will return a ref-counted pointer to a | |
1116 | * struct vmw_fence_obj. The returned fence pointer may be NULL in which | |
1117 | * case the device has already synchronized. | |
91e9f352 | 1118 | * @crtc: If crtc is passed, perform surface dirty on that crtc only. |
10b1e0ca TH |
1119 | * |
1120 | * Returns 0 on success, negative error code on failure. -ERESTARTSYS if | |
1121 | * interrupted. | |
1122 | */ | |
1123 | int vmw_kms_sou_do_surface_dirty(struct vmw_private *dev_priv, | |
1124 | struct vmw_framebuffer *framebuffer, | |
1125 | struct drm_clip_rect *clips, | |
1126 | struct drm_vmw_rect *vclips, | |
1127 | struct vmw_resource *srf, | |
1128 | s32 dest_x, | |
1129 | s32 dest_y, | |
1130 | unsigned num_clips, int inc, | |
91e9f352 DR |
1131 | struct vmw_fence_obj **out_fence, |
1132 | struct drm_crtc *crtc) | |
10b1e0ca TH |
1133 | { |
1134 | struct vmw_framebuffer_surface *vfbs = | |
1135 | container_of(framebuffer, typeof(*vfbs), base); | |
1136 | struct vmw_kms_sou_surface_dirty sdirty; | |
2724b2d5 | 1137 | DECLARE_VAL_CONTEXT(val_ctx, NULL, 0); |
10b1e0ca TH |
1138 | int ret; |
1139 | ||
1140 | if (!srf) | |
1141 | srf = &vfbs->surface->res; | |
1142 | ||
a9f58c45 TH |
1143 | ret = vmw_validation_add_resource(&val_ctx, srf, 0, VMW_RES_DIRTY_NONE, |
1144 | NULL, NULL); | |
10b1e0ca TH |
1145 | if (ret) |
1146 | return ret; | |
1147 | ||
2724b2d5 TH |
1148 | ret = vmw_validation_prepare(&val_ctx, &dev_priv->cmdbuf_mutex, true); |
1149 | if (ret) | |
1150 | goto out_unref; | |
1151 | ||
10b1e0ca TH |
1152 | sdirty.base.fifo_commit = vmw_sou_surface_fifo_commit; |
1153 | sdirty.base.clip = vmw_sou_surface_clip; | |
1154 | sdirty.base.dev_priv = dev_priv; | |
1155 | sdirty.base.fifo_reserve_size = sizeof(struct vmw_kms_sou_dirty_cmd) + | |
1156 | sizeof(SVGASignedRect) * num_clips; | |
91e9f352 | 1157 | sdirty.base.crtc = crtc; |
c8261a96 | 1158 | |
10b1e0ca TH |
1159 | sdirty.sid = srf->id; |
1160 | sdirty.left = sdirty.top = S32_MAX; | |
1161 | sdirty.right = sdirty.bottom = S32_MIN; | |
1162 | sdirty.dst_x = dest_x; | |
1163 | sdirty.dst_y = dest_y; | |
c8261a96 | 1164 | |
10b1e0ca TH |
1165 | ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips, |
1166 | dest_x, dest_y, num_clips, inc, | |
1167 | &sdirty.base); | |
2724b2d5 TH |
1168 | vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence, |
1169 | NULL); | |
c8261a96 SY |
1170 | |
1171 | return ret; | |
2724b2d5 TH |
1172 | |
1173 | out_unref: | |
1174 | vmw_validation_unref_lists(&val_ctx); | |
1175 | return ret; | |
b5ec427e JB |
1176 | } |
1177 | ||
10b1e0ca | 1178 | /** |
f1d34bfd | 1179 | * vmw_sou_bo_fifo_commit - Callback to submit a set of readback clips. |
10b1e0ca TH |
1180 | * |
1181 | * @dirty: The closure structure. | |
1182 | * | |
1183 | * Commits a previously built command buffer of readback clips. | |
1184 | */ | |
f1d34bfd | 1185 | static void vmw_sou_bo_fifo_commit(struct vmw_kms_dirty *dirty) |
10b1e0ca | 1186 | { |
fea7dd54 TH |
1187 | if (!dirty->num_hits) { |
1188 | vmw_fifo_commit(dirty->dev_priv, 0); | |
1189 | return; | |
1190 | } | |
1191 | ||
10b1e0ca | 1192 | vmw_fifo_commit(dirty->dev_priv, |
f1d34bfd | 1193 | sizeof(struct vmw_kms_sou_bo_blit) * |
10b1e0ca TH |
1194 | dirty->num_hits); |
1195 | } | |
1196 | ||
1197 | /** | |
f1d34bfd | 1198 | * vmw_sou_bo_clip - Callback to encode a readback cliprect. |
10b1e0ca TH |
1199 | * |
1200 | * @dirty: The closure structure | |
1201 | * | |
1202 | * Encodes a BLIT_GMRFB_TO_SCREEN cliprect. | |
1203 | */ | |
f1d34bfd | 1204 | static void vmw_sou_bo_clip(struct vmw_kms_dirty *dirty) |
10b1e0ca | 1205 | { |
f1d34bfd | 1206 | struct vmw_kms_sou_bo_blit *blit = dirty->cmd; |
10b1e0ca TH |
1207 | |
1208 | blit += dirty->num_hits; | |
1209 | blit->header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN; | |
1210 | blit->body.destScreenId = dirty->unit->unit; | |
1211 | blit->body.srcOrigin.x = dirty->fb_x; | |
1212 | blit->body.srcOrigin.y = dirty->fb_y; | |
1213 | blit->body.destRect.left = dirty->unit_x1; | |
1214 | blit->body.destRect.top = dirty->unit_y1; | |
1215 | blit->body.destRect.right = dirty->unit_x2; | |
1216 | blit->body.destRect.bottom = dirty->unit_y2; | |
1217 | dirty->num_hits++; | |
1218 | } | |
1219 | ||
1220 | /** | |
f1d34bfd | 1221 | * vmw_kms_do_bo_dirty - Dirty part of a buffer-object backed framebuffer |
10b1e0ca TH |
1222 | * |
1223 | * @dev_priv: Pointer to the device private structure. | |
f1d34bfd | 1224 | * @framebuffer: Pointer to the buffer-object backed framebuffer. |
10b1e0ca | 1225 | * @clips: Array of clip rects. |
897b8180 TH |
1226 | * @vclips: Alternate array of clip rects. Either @clips or @vclips must |
1227 | * be NULL. | |
10b1e0ca TH |
1228 | * @num_clips: Number of clip rects in @clips. |
1229 | * @increment: Increment to use when looping over @clips. | |
1230 | * @interruptible: Whether to perform waits interruptible if possible. | |
1231 | * @out_fence: If non-NULL, will return a ref-counted pointer to a | |
1232 | * struct vmw_fence_obj. The returned fence pointer may be NULL in which | |
1233 | * case the device has already synchronized. | |
f1d34bfd | 1234 | * @crtc: If crtc is passed, perform bo dirty on that crtc only. |
10b1e0ca TH |
1235 | * |
1236 | * Returns 0 on success, negative error code on failure. -ERESTARTSYS if | |
1237 | * interrupted. | |
1238 | */ | |
f1d34bfd | 1239 | int vmw_kms_sou_do_bo_dirty(struct vmw_private *dev_priv, |
c8261a96 | 1240 | struct vmw_framebuffer *framebuffer, |
c8261a96 | 1241 | struct drm_clip_rect *clips, |
897b8180 | 1242 | struct drm_vmw_rect *vclips, |
c8261a96 | 1243 | unsigned num_clips, int increment, |
10b1e0ca | 1244 | bool interruptible, |
91e9f352 DR |
1245 | struct vmw_fence_obj **out_fence, |
1246 | struct drm_crtc *crtc) | |
b5ec427e | 1247 | { |
f1d34bfd TH |
1248 | struct vmw_buffer_object *buf = |
1249 | container_of(framebuffer, struct vmw_framebuffer_bo, | |
10b1e0ca TH |
1250 | base)->buffer; |
1251 | struct vmw_kms_dirty dirty; | |
2724b2d5 | 1252 | DECLARE_VAL_CONTEXT(val_ctx, NULL, 0); |
10b1e0ca | 1253 | int ret; |
b5ec427e | 1254 | |
2724b2d5 | 1255 | ret = vmw_validation_add_bo(&val_ctx, buf, false, false); |
10b1e0ca TH |
1256 | if (ret) |
1257 | return ret; | |
b5ec427e | 1258 | |
2724b2d5 TH |
1259 | ret = vmw_validation_prepare(&val_ctx, NULL, interruptible); |
1260 | if (ret) | |
1261 | goto out_unref; | |
1262 | ||
f1d34bfd | 1263 | ret = do_bo_define_gmrfb(dev_priv, framebuffer); |
c8261a96 | 1264 | if (unlikely(ret != 0)) |
10b1e0ca | 1265 | goto out_revert; |
c8261a96 | 1266 | |
91e9f352 | 1267 | dirty.crtc = crtc; |
f1d34bfd TH |
1268 | dirty.fifo_commit = vmw_sou_bo_fifo_commit; |
1269 | dirty.clip = vmw_sou_bo_clip; | |
1270 | dirty.fifo_reserve_size = sizeof(struct vmw_kms_sou_bo_blit) * | |
10b1e0ca | 1271 | num_clips; |
897b8180 | 1272 | ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips, |
10b1e0ca | 1273 | 0, 0, num_clips, increment, &dirty); |
2724b2d5 TH |
1274 | vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence, |
1275 | NULL); | |
c8261a96 | 1276 | |
10b1e0ca | 1277 | return ret; |
c8261a96 | 1278 | |
10b1e0ca | 1279 | out_revert: |
2724b2d5 TH |
1280 | vmw_validation_revert(&val_ctx); |
1281 | out_unref: | |
1282 | vmw_validation_unref_lists(&val_ctx); | |
c8261a96 | 1283 | |
10b1e0ca TH |
1284 | return ret; |
1285 | } | |
c8261a96 | 1286 | |
c8261a96 | 1287 | |
10b1e0ca TH |
1288 | /** |
1289 | * vmw_sou_readback_fifo_commit - Callback to submit a set of readback clips. | |
1290 | * | |
1291 | * @dirty: The closure structure. | |
1292 | * | |
1293 | * Commits a previously built command buffer of readback clips. | |
1294 | */ | |
1295 | static void vmw_sou_readback_fifo_commit(struct vmw_kms_dirty *dirty) | |
1296 | { | |
fea7dd54 TH |
1297 | if (!dirty->num_hits) { |
1298 | vmw_fifo_commit(dirty->dev_priv, 0); | |
1299 | return; | |
1300 | } | |
1301 | ||
10b1e0ca TH |
1302 | vmw_fifo_commit(dirty->dev_priv, |
1303 | sizeof(struct vmw_kms_sou_readback_blit) * | |
1304 | dirty->num_hits); | |
b5ec427e | 1305 | } |
c8261a96 | 1306 | |
10b1e0ca TH |
1307 | /** |
1308 | * vmw_sou_readback_clip - Callback to encode a readback cliprect. | |
1309 | * | |
1310 | * @dirty: The closure structure | |
1311 | * | |
1312 | * Encodes a BLIT_SCREEN_TO_GMRFB cliprect. | |
1313 | */ | |
1314 | static void vmw_sou_readback_clip(struct vmw_kms_dirty *dirty) | |
1315 | { | |
1316 | struct vmw_kms_sou_readback_blit *blit = dirty->cmd; | |
1317 | ||
1318 | blit += dirty->num_hits; | |
1319 | blit->header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB; | |
1320 | blit->body.srcScreenId = dirty->unit->unit; | |
1321 | blit->body.destOrigin.x = dirty->fb_x; | |
1322 | blit->body.destOrigin.y = dirty->fb_y; | |
1323 | blit->body.srcRect.left = dirty->unit_x1; | |
1324 | blit->body.srcRect.top = dirty->unit_y1; | |
1325 | blit->body.srcRect.right = dirty->unit_x2; | |
1326 | blit->body.srcRect.bottom = dirty->unit_y2; | |
1327 | dirty->num_hits++; | |
1328 | } | |
1329 | ||
1330 | /** | |
1331 | * vmw_kms_sou_readback - Perform a readback from the screen object system to | |
f1d34bfd | 1332 | * a buffer-object backed framebuffer. |
10b1e0ca TH |
1333 | * |
1334 | * @dev_priv: Pointer to the device private structure. | |
1335 | * @file_priv: Pointer to a struct drm_file identifying the caller. | |
1336 | * Must be set to NULL if @user_fence_rep is NULL. | |
f1d34bfd | 1337 | * @vfb: Pointer to the buffer-object backed framebuffer. |
10b1e0ca TH |
1338 | * @user_fence_rep: User-space provided structure for fence information. |
1339 | * Must be set to non-NULL if @file_priv is non-NULL. | |
1340 | * @vclips: Array of clip rects. | |
1341 | * @num_clips: Number of clip rects in @vclips. | |
91e9f352 | 1342 | * @crtc: If crtc is passed, readback on that crtc only. |
10b1e0ca TH |
1343 | * |
1344 | * Returns 0 on success, negative error code on failure. -ERESTARTSYS if | |
1345 | * interrupted. | |
1346 | */ | |
1347 | int vmw_kms_sou_readback(struct vmw_private *dev_priv, | |
1348 | struct drm_file *file_priv, | |
1349 | struct vmw_framebuffer *vfb, | |
1350 | struct drm_vmw_fence_rep __user *user_fence_rep, | |
1351 | struct drm_vmw_rect *vclips, | |
91e9f352 DR |
1352 | uint32_t num_clips, |
1353 | struct drm_crtc *crtc) | |
10b1e0ca | 1354 | { |
f1d34bfd TH |
1355 | struct vmw_buffer_object *buf = |
1356 | container_of(vfb, struct vmw_framebuffer_bo, base)->buffer; | |
10b1e0ca | 1357 | struct vmw_kms_dirty dirty; |
2724b2d5 | 1358 | DECLARE_VAL_CONTEXT(val_ctx, NULL, 0); |
10b1e0ca TH |
1359 | int ret; |
1360 | ||
2724b2d5 | 1361 | ret = vmw_validation_add_bo(&val_ctx, buf, false, false); |
10b1e0ca TH |
1362 | if (ret) |
1363 | return ret; | |
1364 | ||
2724b2d5 TH |
1365 | ret = vmw_validation_prepare(&val_ctx, NULL, true); |
1366 | if (ret) | |
1367 | goto out_unref; | |
1368 | ||
f1d34bfd | 1369 | ret = do_bo_define_gmrfb(dev_priv, vfb); |
10b1e0ca TH |
1370 | if (unlikely(ret != 0)) |
1371 | goto out_revert; | |
1372 | ||
91e9f352 | 1373 | dirty.crtc = crtc; |
10b1e0ca TH |
1374 | dirty.fifo_commit = vmw_sou_readback_fifo_commit; |
1375 | dirty.clip = vmw_sou_readback_clip; | |
1376 | dirty.fifo_reserve_size = sizeof(struct vmw_kms_sou_readback_blit) * | |
1377 | num_clips; | |
1378 | ret = vmw_kms_helper_dirty(dev_priv, vfb, NULL, vclips, | |
1379 | 0, 0, num_clips, 1, &dirty); | |
2724b2d5 TH |
1380 | vmw_kms_helper_validation_finish(dev_priv, file_priv, &val_ctx, NULL, |
1381 | user_fence_rep); | |
10b1e0ca TH |
1382 | |
1383 | return ret; | |
1384 | ||
1385 | out_revert: | |
2724b2d5 TH |
1386 | vmw_validation_revert(&val_ctx); |
1387 | out_unref: | |
1388 | vmw_validation_unref_lists(&val_ctx); | |
1389 | ||
10b1e0ca TH |
1390 | return ret; |
1391 | } |