drm/vmwgfx: Rework screen target page flips v2
[linux-2.6-block.git] / drivers / gpu / drm / vmwgfx / vmwgfx_kms.c
CommitLineData
fb1d9738
JB
1/**************************************************************************
2 *
54fbde8a 3 * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
fb1d9738
JB
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_kms.h"
29
56d1c78d 30
fb1d9738
JB
31/* Might need a hrtimer here? */
32#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
33
c8261a96 34void vmw_du_cleanup(struct vmw_display_unit *du)
fb1d9738
JB
35{
36 if (du->cursor_surface)
37 vmw_surface_unreference(&du->cursor_surface);
38 if (du->cursor_dmabuf)
39 vmw_dmabuf_unreference(&du->cursor_dmabuf);
34ea3d38 40 drm_connector_unregister(&du->connector);
fb1d9738
JB
41 drm_crtc_cleanup(&du->crtc);
42 drm_encoder_cleanup(&du->encoder);
43 drm_connector_cleanup(&du->connector);
44}
45
46/*
47 * Display Unit Cursor functions
48 */
49
50int vmw_cursor_update_image(struct vmw_private *dev_priv,
51 u32 *image, u32 width, u32 height,
52 u32 hotspotX, u32 hotspotY)
53{
54 struct {
55 u32 cmd;
56 SVGAFifoCmdDefineAlphaCursor cursor;
57 } *cmd;
58 u32 image_size = width * height * 4;
59 u32 cmd_size = sizeof(*cmd) + image_size;
60
61 if (!image)
62 return -EINVAL;
63
64 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
65 if (unlikely(cmd == NULL)) {
66 DRM_ERROR("Fifo reserve failed.\n");
67 return -ENOMEM;
68 }
69
70 memset(cmd, 0, sizeof(*cmd));
71
72 memcpy(&cmd[1], image, image_size);
73
b9eb1a61
TH
74 cmd->cmd = SVGA_CMD_DEFINE_ALPHA_CURSOR;
75 cmd->cursor.id = 0;
76 cmd->cursor.width = width;
77 cmd->cursor.height = height;
78 cmd->cursor.hotspotX = hotspotX;
79 cmd->cursor.hotspotY = hotspotY;
fb1d9738 80
4e0858a6 81 vmw_fifo_commit_flush(dev_priv, cmd_size);
fb1d9738
JB
82
83 return 0;
84}
85
6a91d97e
JB
86int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
87 struct vmw_dma_buffer *dmabuf,
88 u32 width, u32 height,
89 u32 hotspotX, u32 hotspotY)
90{
91 struct ttm_bo_kmap_obj map;
92 unsigned long kmap_offset;
93 unsigned long kmap_num;
94 void *virtual;
95 bool dummy;
96 int ret;
97
98 kmap_offset = 0;
99 kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
100
ee3939e0 101 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, NULL);
6a91d97e
JB
102 if (unlikely(ret != 0)) {
103 DRM_ERROR("reserve failed\n");
104 return -EINVAL;
105 }
106
107 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
108 if (unlikely(ret != 0))
109 goto err_unreserve;
110
111 virtual = ttm_kmap_obj_virtual(&map, &dummy);
112 ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
113 hotspotX, hotspotY);
114
115 ttm_bo_kunmap(&map);
116err_unreserve:
117 ttm_bo_unreserve(&dmabuf->base);
118
119 return ret;
120}
121
122
fb1d9738
JB
123void vmw_cursor_update_position(struct vmw_private *dev_priv,
124 bool show, int x, int y)
125{
b76ff5ea 126 u32 *fifo_mem = dev_priv->mmio_virt;
fb1d9738
JB
127 uint32_t count;
128
b76ff5ea
TH
129 vmw_mmio_write(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
130 vmw_mmio_write(x, fifo_mem + SVGA_FIFO_CURSOR_X);
131 vmw_mmio_write(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
132 count = vmw_mmio_read(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
133 vmw_mmio_write(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
fb1d9738
JB
134}
135
8fbf9d92
TH
136
137/*
138 * vmw_du_crtc_cursor_set2 - Driver cursor_set2 callback.
139 */
140int vmw_du_crtc_cursor_set2(struct drm_crtc *crtc, struct drm_file *file_priv,
141 uint32_t handle, uint32_t width, uint32_t height,
142 int32_t hot_x, int32_t hot_y)
fb1d9738
JB
143{
144 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
fb1d9738
JB
145 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
146 struct vmw_surface *surface = NULL;
147 struct vmw_dma_buffer *dmabuf = NULL;
8fbf9d92 148 s32 hotspot_x, hotspot_y;
fb1d9738
JB
149 int ret;
150
bfb89928
DV
151 /*
152 * FIXME: Unclear whether there's any global state touched by the
153 * cursor_set function, especially vmw_cursor_update_position looks
154 * suspicious. For now take the easy route and reacquire all locks. We
155 * can do this since the caller in the drm core doesn't check anything
156 * which is protected by any looks.
157 */
21e88620 158 drm_modeset_unlock_crtc(crtc);
bfb89928 159 drm_modeset_lock_all(dev_priv->dev);
8fbf9d92
TH
160 hotspot_x = hot_x + du->hotspot_x;
161 hotspot_y = hot_y + du->hotspot_y;
bfb89928 162
baa91d64 163 /* A lot of the code assumes this */
bfb89928
DV
164 if (handle && (width != 64 || height != 64)) {
165 ret = -EINVAL;
166 goto out;
167 }
baa91d64 168
fb1d9738 169 if (handle) {
a5d0f576
VS
170 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
171
e7ac9211
JB
172 ret = vmw_user_lookup_handle(dev_priv, tfile,
173 handle, &surface, &dmabuf);
174 if (ret) {
175 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
bfb89928
DV
176 ret = -EINVAL;
177 goto out;
fb1d9738
JB
178 }
179 }
180
e7ac9211
JB
181 /* need to do this before taking down old image */
182 if (surface && !surface->snooper.image) {
183 DRM_ERROR("surface not suitable for cursor\n");
184 vmw_surface_unreference(&surface);
bfb89928
DV
185 ret = -EINVAL;
186 goto out;
e7ac9211
JB
187 }
188
fb1d9738
JB
189 /* takedown old cursor */
190 if (du->cursor_surface) {
191 du->cursor_surface->snooper.crtc = NULL;
192 vmw_surface_unreference(&du->cursor_surface);
193 }
194 if (du->cursor_dmabuf)
195 vmw_dmabuf_unreference(&du->cursor_dmabuf);
196
197 /* setup new image */
8fbf9d92 198 ret = 0;
fb1d9738
JB
199 if (surface) {
200 /* vmw_user_surface_lookup takes one reference */
201 du->cursor_surface = surface;
202
203 du->cursor_surface->snooper.crtc = crtc;
204 du->cursor_age = du->cursor_surface->snooper.age;
8fbf9d92
TH
205 ret = vmw_cursor_update_image(dev_priv, surface->snooper.image,
206 64, 64, hotspot_x, hotspot_y);
fb1d9738 207 } else if (dmabuf) {
fb1d9738
JB
208 /* vmw_user_surface_lookup takes one reference */
209 du->cursor_dmabuf = dmabuf;
210
6a91d97e 211 ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
8fbf9d92 212 hotspot_x, hotspot_y);
fb1d9738
JB
213 } else {
214 vmw_cursor_update_position(dev_priv, false, 0, 0);
bfb89928 215 goto out;
fb1d9738
JB
216 }
217
8fbf9d92
TH
218 if (!ret) {
219 vmw_cursor_update_position(dev_priv, true,
220 du->cursor_x + hotspot_x,
221 du->cursor_y + hotspot_y);
222 du->core_hotspot_x = hot_x;
223 du->core_hotspot_y = hot_y;
224 }
fb1d9738 225
bfb89928
DV
226out:
227 drm_modeset_unlock_all(dev_priv->dev);
4d02e2de 228 drm_modeset_lock_crtc(crtc, crtc->cursor);
bfb89928
DV
229
230 return ret;
fb1d9738
JB
231}
232
233int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
234{
235 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
236 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
237 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
238
239 du->cursor_x = x + crtc->x;
240 du->cursor_y = y + crtc->y;
241
dac35663
DV
242 /*
243 * FIXME: Unclear whether there's any global state touched by the
244 * cursor_set function, especially vmw_cursor_update_position looks
245 * suspicious. For now take the easy route and reacquire all locks. We
246 * can do this since the caller in the drm core doesn't check anything
247 * which is protected by any looks.
248 */
21e88620 249 drm_modeset_unlock_crtc(crtc);
dac35663
DV
250 drm_modeset_lock_all(dev_priv->dev);
251
fb1d9738 252 vmw_cursor_update_position(dev_priv, shown,
8fbf9d92
TH
253 du->cursor_x + du->hotspot_x +
254 du->core_hotspot_x,
255 du->cursor_y + du->hotspot_y +
256 du->core_hotspot_y);
fb1d9738 257
dac35663 258 drm_modeset_unlock_all(dev_priv->dev);
4d02e2de 259 drm_modeset_lock_crtc(crtc, crtc->cursor);
dac35663 260
fb1d9738
JB
261 return 0;
262}
263
264void vmw_kms_cursor_snoop(struct vmw_surface *srf,
265 struct ttm_object_file *tfile,
266 struct ttm_buffer_object *bo,
267 SVGA3dCmdHeader *header)
268{
269 struct ttm_bo_kmap_obj map;
270 unsigned long kmap_offset;
271 unsigned long kmap_num;
272 SVGA3dCopyBox *box;
273 unsigned box_count;
274 void *virtual;
275 bool dummy;
276 struct vmw_dma_cmd {
277 SVGA3dCmdHeader header;
278 SVGA3dCmdSurfaceDMA dma;
279 } *cmd;
2ac86371 280 int i, ret;
fb1d9738
JB
281
282 cmd = container_of(header, struct vmw_dma_cmd, header);
283
284 /* No snooper installed */
285 if (!srf->snooper.image)
286 return;
287
288 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
289 DRM_ERROR("face and mipmap for cursors should never != 0\n");
290 return;
291 }
292
293 if (cmd->header.size < 64) {
294 DRM_ERROR("at least one full copy box must be given\n");
295 return;
296 }
297
298 box = (SVGA3dCopyBox *)&cmd[1];
299 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
300 sizeof(SVGA3dCopyBox);
301
2ac86371 302 if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
fb1d9738
JB
303 box->x != 0 || box->y != 0 || box->z != 0 ||
304 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
2ac86371 305 box->d != 1 || box_count != 1) {
fb1d9738 306 /* TODO handle none page aligned offsets */
2ac86371
JB
307 /* TODO handle more dst & src != 0 */
308 /* TODO handle more then one copy */
309 DRM_ERROR("Cant snoop dma request for cursor!\n");
310 DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
311 box->srcx, box->srcy, box->srcz,
312 box->x, box->y, box->z,
313 box->w, box->h, box->d, box_count,
314 cmd->dma.guest.ptr.offset);
fb1d9738
JB
315 return;
316 }
317
318 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
319 kmap_num = (64*64*4) >> PAGE_SHIFT;
320
ee3939e0 321 ret = ttm_bo_reserve(bo, true, false, false, NULL);
fb1d9738
JB
322 if (unlikely(ret != 0)) {
323 DRM_ERROR("reserve failed\n");
324 return;
325 }
326
327 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
328 if (unlikely(ret != 0))
329 goto err_unreserve;
330
331 virtual = ttm_kmap_obj_virtual(&map, &dummy);
332
2ac86371
JB
333 if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
334 memcpy(srf->snooper.image, virtual, 64*64*4);
335 } else {
336 /* Image is unsigned pointer. */
337 for (i = 0; i < box->h; i++)
338 memcpy(srf->snooper.image + i * 64,
339 virtual + i * cmd->dma.guest.pitch,
340 box->w * 4);
341 }
342
fb1d9738
JB
343 srf->snooper.age++;
344
fb1d9738
JB
345 ttm_bo_kunmap(&map);
346err_unreserve:
347 ttm_bo_unreserve(bo);
348}
349
8fbf9d92
TH
350/**
351 * vmw_kms_legacy_hotspot_clear - Clear legacy hotspots
352 *
353 * @dev_priv: Pointer to the device private struct.
354 *
355 * Clears all legacy hotspots.
356 */
357void vmw_kms_legacy_hotspot_clear(struct vmw_private *dev_priv)
358{
359 struct drm_device *dev = dev_priv->dev;
360 struct vmw_display_unit *du;
361 struct drm_crtc *crtc;
362
363 drm_modeset_lock_all(dev);
364 drm_for_each_crtc(crtc, dev) {
365 du = vmw_crtc_to_du(crtc);
366
367 du->hotspot_x = 0;
368 du->hotspot_y = 0;
369 }
370 drm_modeset_unlock_all(dev);
371}
372
fb1d9738
JB
373void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
374{
375 struct drm_device *dev = dev_priv->dev;
376 struct vmw_display_unit *du;
377 struct drm_crtc *crtc;
378
379 mutex_lock(&dev->mode_config.mutex);
380
381 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
382 du = vmw_crtc_to_du(crtc);
383 if (!du->cursor_surface ||
384 du->cursor_age == du->cursor_surface->snooper.age)
385 continue;
386
387 du->cursor_age = du->cursor_surface->snooper.age;
388 vmw_cursor_update_image(dev_priv,
389 du->cursor_surface->snooper.image,
8fbf9d92
TH
390 64, 64,
391 du->hotspot_x + du->core_hotspot_x,
392 du->hotspot_y + du->core_hotspot_y);
fb1d9738
JB
393 }
394
395 mutex_unlock(&dev->mode_config.mutex);
396}
397
398/*
399 * Generic framebuffer code
400 */
401
fb1d9738
JB
402/*
403 * Surface framebuffer code
404 */
405
847c5964 406static void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
fb1d9738 407{
3a939a5e 408 struct vmw_framebuffer_surface *vfbs =
fb1d9738 409 vmw_framebuffer_to_vfbs(framebuffer);
3a939a5e 410
fb1d9738 411 drm_framebuffer_cleanup(framebuffer);
3a939a5e 412 vmw_surface_unreference(&vfbs->surface);
a278724a
TH
413 if (vfbs->base.user_obj)
414 ttm_base_object_unref(&vfbs->base.user_obj);
fb1d9738 415
3a939a5e 416 kfree(vfbs);
fb1d9738
JB
417}
418
847c5964 419static int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
02b00162 420 struct drm_file *file_priv,
fb1d9738
JB
421 unsigned flags, unsigned color,
422 struct drm_clip_rect *clips,
423 unsigned num_clips)
424{
425 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
426 struct vmw_framebuffer_surface *vfbs =
427 vmw_framebuffer_to_vfbs(framebuffer);
fb1d9738 428 struct drm_clip_rect norect;
5deb65cf 429 int ret, inc = 1;
fb1d9738 430
c8261a96
SY
431 /* Legacy Display Unit does not support 3D */
432 if (dev_priv->active_display_unit == vmw_du_legacy)
01e81419
JB
433 return -EINVAL;
434
73e9efd4
VS
435 drm_modeset_lock_all(dev_priv->dev);
436
294adf7d 437 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
73e9efd4
VS
438 if (unlikely(ret != 0)) {
439 drm_modeset_unlock_all(dev_priv->dev);
3a939a5e 440 return ret;
73e9efd4 441 }
3a939a5e 442
fb1d9738
JB
443 if (!num_clips) {
444 num_clips = 1;
445 clips = &norect;
446 norect.x1 = norect.y1 = 0;
447 norect.x2 = framebuffer->width;
448 norect.y2 = framebuffer->height;
449 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
450 num_clips /= 2;
451 inc = 2; /* skip source rects */
452 }
453
c8261a96 454 if (dev_priv->active_display_unit == vmw_du_screen_object)
10b1e0ca
TH
455 ret = vmw_kms_sou_do_surface_dirty(dev_priv, &vfbs->base,
456 clips, NULL, NULL, 0, 0,
457 num_clips, inc, NULL);
35c05125 458 else
6bf6bf03
TH
459 ret = vmw_kms_stdu_surface_dirty(dev_priv, &vfbs->base,
460 clips, NULL, NULL, 0, 0,
461 num_clips, inc, NULL);
fb1d9738 462
3eab3d9e 463 vmw_fifo_flush(dev_priv, false);
294adf7d 464 ttm_read_unlock(&dev_priv->reservation_sem);
73e9efd4
VS
465
466 drm_modeset_unlock_all(dev_priv->dev);
467
fb1d9738
JB
468 return 0;
469}
470
10b1e0ca
TH
471/**
472 * vmw_kms_readback - Perform a readback from the screen system to
473 * a dma-buffer backed framebuffer.
474 *
475 * @dev_priv: Pointer to the device private structure.
476 * @file_priv: Pointer to a struct drm_file identifying the caller.
477 * Must be set to NULL if @user_fence_rep is NULL.
478 * @vfb: Pointer to the dma-buffer backed framebuffer.
479 * @user_fence_rep: User-space provided structure for fence information.
480 * Must be set to non-NULL if @file_priv is non-NULL.
481 * @vclips: Array of clip rects.
482 * @num_clips: Number of clip rects in @vclips.
483 *
484 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
485 * interrupted.
486 */
487int vmw_kms_readback(struct vmw_private *dev_priv,
488 struct drm_file *file_priv,
489 struct vmw_framebuffer *vfb,
490 struct drm_vmw_fence_rep __user *user_fence_rep,
491 struct drm_vmw_rect *vclips,
492 uint32_t num_clips)
493{
494 switch (dev_priv->active_display_unit) {
495 case vmw_du_screen_object:
496 return vmw_kms_sou_readback(dev_priv, file_priv, vfb,
497 user_fence_rep, vclips, num_clips);
6bf6bf03
TH
498 case vmw_du_screen_target:
499 return vmw_kms_stdu_dma(dev_priv, file_priv, vfb,
500 user_fence_rep, NULL, vclips, num_clips,
501 1, false, true);
10b1e0ca
TH
502 default:
503 WARN_ONCE(true,
504 "Readback called with invalid display system.\n");
6bf6bf03 505}
10b1e0ca
TH
506
507 return -ENOSYS;
508}
509
510
d7955fcf 511static const struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
fb1d9738
JB
512 .destroy = vmw_framebuffer_surface_destroy,
513 .dirty = vmw_framebuffer_surface_dirty,
fb1d9738
JB
514};
515
d3216a0c
TH
516static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
517 struct vmw_surface *surface,
518 struct vmw_framebuffer **out,
519 const struct drm_mode_fb_cmd
f89c6c32
SY
520 *mode_cmd,
521 bool is_dmabuf_proxy)
fb1d9738
JB
522
523{
524 struct drm_device *dev = dev_priv->dev;
525 struct vmw_framebuffer_surface *vfbs;
d3216a0c 526 enum SVGA3dSurfaceFormat format;
fb1d9738
JB
527 int ret;
528
c8261a96
SY
529 /* 3D is only supported on HWv8 and newer hosts */
530 if (dev_priv->active_display_unit == vmw_du_legacy)
01e81419
JB
531 return -ENOSYS;
532
d3216a0c
TH
533 /*
534 * Sanity checks.
535 */
536
e7ac9211
JB
537 /* Surface must be marked as a scanout. */
538 if (unlikely(!surface->scanout))
539 return -EINVAL;
540
d3216a0c
TH
541 if (unlikely(surface->mip_levels[0] != 1 ||
542 surface->num_sizes != 1 ||
b360a3ce
TH
543 surface->base_size.width < mode_cmd->width ||
544 surface->base_size.height < mode_cmd->height ||
545 surface->base_size.depth != 1)) {
d3216a0c
TH
546 DRM_ERROR("Incompatible surface dimensions "
547 "for requested mode.\n");
548 return -EINVAL;
549 }
550
551 switch (mode_cmd->depth) {
552 case 32:
553 format = SVGA3D_A8R8G8B8;
554 break;
555 case 24:
556 format = SVGA3D_X8R8G8B8;
557 break;
558 case 16:
559 format = SVGA3D_R5G6B5;
560 break;
561 case 15:
562 format = SVGA3D_A1R5G5B5;
563 break;
564 default:
565 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
566 return -EINVAL;
567 }
568
d80efd5c
TH
569 /*
570 * For DX, surface format validation is done when surface->scanout
571 * is set.
572 */
573 if (!dev_priv->has_dx && format != surface->format) {
d3216a0c
TH
574 DRM_ERROR("Invalid surface format for requested mode.\n");
575 return -EINVAL;
576 }
577
fb1d9738
JB
578 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
579 if (!vfbs) {
580 ret = -ENOMEM;
581 goto out_err1;
582 }
583
fb1d9738 584 /* XXX get the first 3 from the surface info */
d3216a0c 585 vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 586 vfbs->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH
587 vfbs->base.base.depth = mode_cmd->depth;
588 vfbs->base.base.width = mode_cmd->width;
589 vfbs->base.base.height = mode_cmd->height;
05c95018 590 vfbs->surface = vmw_surface_reference(surface);
90ff18bc 591 vfbs->base.user_handle = mode_cmd->handle;
f89c6c32 592 vfbs->is_dmabuf_proxy = is_dmabuf_proxy;
3a939a5e 593
fb1d9738
JB
594 *out = &vfbs->base;
595
80f0b5af
DV
596 ret = drm_framebuffer_init(dev, &vfbs->base.base,
597 &vmw_framebuffer_surface_funcs);
598 if (ret)
05c95018 599 goto out_err2;
80f0b5af 600
fb1d9738
JB
601 return 0;
602
fb1d9738 603out_err2:
05c95018 604 vmw_surface_unreference(&surface);
fb1d9738
JB
605 kfree(vfbs);
606out_err1:
607 return ret;
608}
609
610/*
611 * Dmabuf framebuffer code
612 */
613
847c5964 614static void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
fb1d9738
JB
615{
616 struct vmw_framebuffer_dmabuf *vfbd =
617 vmw_framebuffer_to_vfbd(framebuffer);
618
619 drm_framebuffer_cleanup(framebuffer);
620 vmw_dmabuf_unreference(&vfbd->buffer);
a278724a
TH
621 if (vfbd->base.user_obj)
622 ttm_base_object_unref(&vfbd->base.user_obj);
fb1d9738
JB
623
624 kfree(vfbd);
625}
626
847c5964 627static int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
02b00162 628 struct drm_file *file_priv,
fb1d9738
JB
629 unsigned flags, unsigned color,
630 struct drm_clip_rect *clips,
631 unsigned num_clips)
632{
633 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
5deb65cf
JB
634 struct vmw_framebuffer_dmabuf *vfbd =
635 vmw_framebuffer_to_vfbd(framebuffer);
fb1d9738 636 struct drm_clip_rect norect;
5deb65cf 637 int ret, increment = 1;
fb1d9738 638
73e9efd4
VS
639 drm_modeset_lock_all(dev_priv->dev);
640
294adf7d 641 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
73e9efd4
VS
642 if (unlikely(ret != 0)) {
643 drm_modeset_unlock_all(dev_priv->dev);
3a939a5e 644 return ret;
73e9efd4 645 }
3a939a5e 646
df1c93ba 647 if (!num_clips) {
fb1d9738
JB
648 num_clips = 1;
649 clips = &norect;
650 norect.x1 = norect.y1 = 0;
651 norect.x2 = framebuffer->width;
652 norect.y2 = framebuffer->height;
653 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
654 num_clips /= 2;
655 increment = 2;
656 }
657
6bf6bf03
TH
658 switch (dev_priv->active_display_unit) {
659 case vmw_du_screen_target:
660 ret = vmw_kms_stdu_dma(dev_priv, NULL, &vfbd->base, NULL,
661 clips, NULL, num_clips, increment,
662 true, true);
663 break;
664 case vmw_du_screen_object:
10b1e0ca 665 ret = vmw_kms_sou_do_dmabuf_dirty(dev_priv, &vfbd->base,
897b8180
TH
666 clips, NULL, num_clips,
667 increment, true, NULL);
6bf6bf03 668 break;
352b20dc
TH
669 case vmw_du_legacy:
670 ret = vmw_kms_ldu_do_dmabuf_dirty(dev_priv, &vfbd->base, 0, 0,
671 clips, num_clips, increment);
672 break;
6bf6bf03 673 default:
352b20dc
TH
674 ret = -EINVAL;
675 WARN_ONCE(true, "Dirty called with invalid display system.\n");
6bf6bf03 676 break;
56d1c78d 677 }
fb1d9738 678
3eab3d9e 679 vmw_fifo_flush(dev_priv, false);
294adf7d 680 ttm_read_unlock(&dev_priv->reservation_sem);
73e9efd4
VS
681
682 drm_modeset_unlock_all(dev_priv->dev);
683
5deb65cf 684 return ret;
fb1d9738
JB
685}
686
d7955fcf 687static const struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
fb1d9738
JB
688 .destroy = vmw_framebuffer_dmabuf_destroy,
689 .dirty = vmw_framebuffer_dmabuf_dirty,
fb1d9738
JB
690};
691
497a3ff9
JB
692/**
693 * Pin the dmabuffer to the start of vram.
694 */
fd006a43 695static int vmw_framebuffer_pin(struct vmw_framebuffer *vfb)
fb1d9738
JB
696{
697 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
fd006a43 698 struct vmw_dma_buffer *buf;
fb1d9738
JB
699 int ret;
700
fd006a43
TH
701 buf = vfb->dmabuf ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
702 vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.backup;
fb1d9738 703
fd006a43
TH
704 if (!buf)
705 return 0;
fb1d9738 706
fd006a43
TH
707 switch (dev_priv->active_display_unit) {
708 case vmw_du_legacy:
709 vmw_overlay_pause_all(dev_priv);
710 ret = vmw_dmabuf_pin_in_start_of_vram(dev_priv, buf, false);
711 vmw_overlay_resume_all(dev_priv);
712 break;
713 case vmw_du_screen_object:
714 case vmw_du_screen_target:
715 if (vfb->dmabuf)
716 return vmw_dmabuf_pin_in_vram_or_gmr(dev_priv, buf,
717 false);
fb1d9738 718
fd006a43
TH
719 return vmw_dmabuf_pin_in_placement(dev_priv, buf,
720 &vmw_mob_placement, false);
721 default:
722 return -EINVAL;
723 }
316ab13a 724
fd006a43 725 return ret;
fb1d9738
JB
726}
727
fd006a43 728static int vmw_framebuffer_unpin(struct vmw_framebuffer *vfb)
fb1d9738
JB
729{
730 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
fd006a43 731 struct vmw_dma_buffer *buf;
fb1d9738 732
fd006a43
TH
733 buf = vfb->dmabuf ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
734 vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.backup;
fb1d9738 735
fd006a43 736 if (WARN_ON(!buf))
fb1d9738 737 return 0;
fb1d9738 738
fd006a43 739 return vmw_dmabuf_unpin(dev_priv, buf, false);
fb1d9738
JB
740}
741
f89c6c32
SY
742/**
743 * vmw_create_dmabuf_proxy - create a proxy surface for the DMA buf
744 *
745 * @dev: DRM device
746 * @mode_cmd: parameters for the new surface
747 * @dmabuf_mob: MOB backing the DMA buf
748 * @srf_out: newly created surface
749 *
750 * When the content FB is a DMA buf, we create a surface as a proxy to the
751 * same buffer. This way we can do a surface copy rather than a surface DMA.
752 * This is a more efficient approach
753 *
754 * RETURNS:
755 * 0 on success, error code otherwise
756 */
757static int vmw_create_dmabuf_proxy(struct drm_device *dev,
fd006a43 758 const struct drm_mode_fb_cmd *mode_cmd,
f89c6c32
SY
759 struct vmw_dma_buffer *dmabuf_mob,
760 struct vmw_surface **srf_out)
761{
762 uint32_t format;
763 struct drm_vmw_size content_base_size;
6bf6bf03 764 struct vmw_resource *res;
a50e2bf5 765 unsigned int bytes_pp;
f89c6c32
SY
766 int ret;
767
f89c6c32
SY
768 switch (mode_cmd->depth) {
769 case 32:
770 case 24:
771 format = SVGA3D_X8R8G8B8;
a50e2bf5 772 bytes_pp = 4;
f89c6c32
SY
773 break;
774
775 case 16:
776 case 15:
777 format = SVGA3D_R5G6B5;
a50e2bf5 778 bytes_pp = 2;
f89c6c32
SY
779 break;
780
781 case 8:
782 format = SVGA3D_P8;
a50e2bf5 783 bytes_pp = 1;
f89c6c32
SY
784 break;
785
786 default:
787 DRM_ERROR("Invalid framebuffer format %d\n", mode_cmd->depth);
788 return -EINVAL;
789 }
790
a50e2bf5 791 content_base_size.width = mode_cmd->pitch / bytes_pp;
f89c6c32
SY
792 content_base_size.height = mode_cmd->height;
793 content_base_size.depth = 1;
794
795 ret = vmw_surface_gb_priv_define(dev,
796 0, /* kernel visible only */
797 0, /* flags */
798 format,
799 true, /* can be a scanout buffer */
800 1, /* num of mip levels */
801 0,
d80efd5c 802 0,
f89c6c32
SY
803 content_base_size,
804 srf_out);
805 if (ret) {
806 DRM_ERROR("Failed to allocate proxy content buffer\n");
807 return ret;
fb1d9738
JB
808 }
809
6bf6bf03 810 res = &(*srf_out)->res;
f89c6c32 811
6bf6bf03
TH
812 /* Reserve and switch the backing mob. */
813 mutex_lock(&res->dev_priv->cmdbuf_mutex);
814 (void) vmw_resource_reserve(res, false, true);
815 vmw_dmabuf_unreference(&res->backup);
816 res->backup = vmw_dmabuf_reference(dmabuf_mob);
817 res->backup_offset = 0;
d80efd5c 818 vmw_resource_unreserve(res, false, NULL, 0);
6bf6bf03 819 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
f89c6c32 820
6bf6bf03 821 return 0;
fb1d9738
JB
822}
823
f89c6c32
SY
824
825
d3216a0c
TH
826static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
827 struct vmw_dma_buffer *dmabuf,
828 struct vmw_framebuffer **out,
829 const struct drm_mode_fb_cmd
830 *mode_cmd)
fb1d9738
JB
831
832{
833 struct drm_device *dev = dev_priv->dev;
834 struct vmw_framebuffer_dmabuf *vfbd;
d3216a0c 835 unsigned int requested_size;
fb1d9738
JB
836 int ret;
837
d3216a0c
TH
838 requested_size = mode_cmd->height * mode_cmd->pitch;
839 if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
840 DRM_ERROR("Screen buffer object size is too small "
841 "for requested mode.\n");
842 return -EINVAL;
843 }
844
c337ada7 845 /* Limited framebuffer color depth support for screen objects */
c8261a96 846 if (dev_priv->active_display_unit == vmw_du_screen_object) {
c337ada7
JB
847 switch (mode_cmd->depth) {
848 case 32:
849 case 24:
850 /* Only support 32 bpp for 32 and 24 depth fbs */
851 if (mode_cmd->bpp == 32)
852 break;
853
854 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
855 mode_cmd->depth, mode_cmd->bpp);
856 return -EINVAL;
857 case 16:
858 case 15:
859 /* Only support 16 bpp for 16 and 15 depth fbs */
860 if (mode_cmd->bpp == 16)
861 break;
862
863 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
864 mode_cmd->depth, mode_cmd->bpp);
865 return -EINVAL;
866 default:
867 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
868 return -EINVAL;
869 }
870 }
871
fb1d9738
JB
872 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
873 if (!vfbd) {
874 ret = -ENOMEM;
875 goto out_err1;
876 }
877
d3216a0c 878 vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 879 vfbd->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH
880 vfbd->base.base.depth = mode_cmd->depth;
881 vfbd->base.base.width = mode_cmd->width;
882 vfbd->base.base.height = mode_cmd->height;
2fcd5a73 883 vfbd->base.dmabuf = true;
05c95018 884 vfbd->buffer = vmw_dmabuf_reference(dmabuf);
90ff18bc 885 vfbd->base.user_handle = mode_cmd->handle;
fb1d9738
JB
886 *out = &vfbd->base;
887
80f0b5af
DV
888 ret = drm_framebuffer_init(dev, &vfbd->base.base,
889 &vmw_framebuffer_dmabuf_funcs);
890 if (ret)
05c95018 891 goto out_err2;
80f0b5af 892
fb1d9738
JB
893 return 0;
894
fb1d9738 895out_err2:
05c95018 896 vmw_dmabuf_unreference(&dmabuf);
fb1d9738
JB
897 kfree(vfbd);
898out_err1:
899 return ret;
900}
901
fd006a43
TH
902/**
903 * vmw_kms_new_framebuffer - Create a new framebuffer.
904 *
905 * @dev_priv: Pointer to device private struct.
906 * @dmabuf: Pointer to dma buffer to wrap the kms framebuffer around.
907 * Either @dmabuf or @surface must be NULL.
908 * @surface: Pointer to a surface to wrap the kms framebuffer around.
909 * Either @dmabuf or @surface must be NULL.
910 * @only_2d: No presents will occur to this dma buffer based framebuffer. This
911 * Helps the code to do some important optimizations.
912 * @mode_cmd: Frame-buffer metadata.
fb1d9738 913 */
fd006a43
TH
914struct vmw_framebuffer *
915vmw_kms_new_framebuffer(struct vmw_private *dev_priv,
916 struct vmw_dma_buffer *dmabuf,
917 struct vmw_surface *surface,
918 bool only_2d,
919 const struct drm_mode_fb_cmd *mode_cmd)
fb1d9738 920{
fb1d9738 921 struct vmw_framebuffer *vfb = NULL;
fd006a43 922 bool is_dmabuf_proxy = false;
fb1d9738
JB
923 int ret;
924
fd006a43
TH
925 /*
926 * We cannot use the SurfaceDMA command in an non-accelerated VM,
927 * therefore, wrap the DMA buf in a surface so we can use the
928 * SurfaceCopy command.
929 */
930 if (dmabuf && only_2d &&
931 dev_priv->active_display_unit == vmw_du_screen_target) {
932 ret = vmw_create_dmabuf_proxy(dev_priv->dev, mode_cmd,
933 dmabuf, &surface);
934 if (ret)
935 return ERR_PTR(ret);
936
937 is_dmabuf_proxy = true;
938 }
939
940 /* Create the new framebuffer depending one what we have */
05c95018 941 if (surface) {
fd006a43
TH
942 ret = vmw_kms_new_framebuffer_surface(dev_priv, surface, &vfb,
943 mode_cmd,
944 is_dmabuf_proxy);
05c95018
SY
945
946 /*
947 * vmw_create_dmabuf_proxy() adds a reference that is no longer
948 * needed
949 */
950 if (is_dmabuf_proxy)
951 vmw_surface_unreference(&surface);
952 } else if (dmabuf) {
fd006a43
TH
953 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, dmabuf, &vfb,
954 mode_cmd);
05c95018 955 } else {
fd006a43 956 BUG();
05c95018 957 }
fd006a43
TH
958
959 if (ret)
960 return ERR_PTR(ret);
961
962 vfb->pin = vmw_framebuffer_pin;
963 vfb->unpin = vmw_framebuffer_unpin;
964
965 return vfb;
966}
967
fb1d9738
JB
968/*
969 * Generic Kernel modesetting functions
970 */
971
972static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
973 struct drm_file *file_priv,
1eb83451 974 const struct drm_mode_fb_cmd2 *mode_cmd2)
fb1d9738
JB
975{
976 struct vmw_private *dev_priv = vmw_priv(dev);
977 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
978 struct vmw_framebuffer *vfb = NULL;
979 struct vmw_surface *surface = NULL;
980 struct vmw_dma_buffer *bo = NULL;
90ff18bc 981 struct ttm_base_object *user_obj;
308e5bcb 982 struct drm_mode_fb_cmd mode_cmd;
fb1d9738
JB
983 int ret;
984
308e5bcb
JB
985 mode_cmd.width = mode_cmd2->width;
986 mode_cmd.height = mode_cmd2->height;
987 mode_cmd.pitch = mode_cmd2->pitches[0];
988 mode_cmd.handle = mode_cmd2->handles[0];
248dbc23 989 drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
308e5bcb
JB
990 &mode_cmd.bpp);
991
d3216a0c
TH
992 /**
993 * This code should be conditioned on Screen Objects not being used.
994 * If screen objects are used, we can allocate a GMR to hold the
995 * requested framebuffer.
996 */
997
8a783896 998 if (!vmw_kms_validate_mode_vram(dev_priv,
1a464cbb
LT
999 mode_cmd.pitch,
1000 mode_cmd.height)) {
c8261a96 1001 DRM_ERROR("Requested mode exceed bounding box limit.\n");
d9826409 1002 return ERR_PTR(-ENOMEM);
d3216a0c
TH
1003 }
1004
90ff18bc
TH
1005 /*
1006 * Take a reference on the user object of the resource
1007 * backing the kms fb. This ensures that user-space handle
1008 * lookups on that resource will always work as long as
1009 * it's registered with a kms framebuffer. This is important,
1010 * since vmw_execbuf_process identifies resources in the
1011 * command stream using user-space handles.
1012 */
1013
308e5bcb 1014 user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
90ff18bc
TH
1015 if (unlikely(user_obj == NULL)) {
1016 DRM_ERROR("Could not locate requested kms frame buffer.\n");
1017 return ERR_PTR(-ENOENT);
1018 }
1019
d3216a0c
TH
1020 /**
1021 * End conditioned code.
1022 */
1023
e7ac9211
JB
1024 /* returns either a dmabuf or surface */
1025 ret = vmw_user_lookup_handle(dev_priv, tfile,
4cf73129 1026 mode_cmd.handle,
e7ac9211 1027 &surface, &bo);
fb1d9738 1028 if (ret)
e7ac9211
JB
1029 goto err_out;
1030
fd006a43
TH
1031 vfb = vmw_kms_new_framebuffer(dev_priv, bo, surface,
1032 !(dev_priv->capabilities & SVGA_CAP_3D),
1033 &mode_cmd);
1034 if (IS_ERR(vfb)) {
1035 ret = PTR_ERR(vfb);
1036 goto err_out;
1037 }
e7ac9211
JB
1038
1039err_out:
1040 /* vmw_user_lookup_handle takes one ref so does new_fb */
1041 if (bo)
1042 vmw_dmabuf_unreference(&bo);
1043 if (surface)
1044 vmw_surface_unreference(&surface);
fb1d9738
JB
1045
1046 if (ret) {
1047 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
90ff18bc 1048 ttm_base_object_unref(&user_obj);
cce13ff7 1049 return ERR_PTR(ret);
90ff18bc
TH
1050 } else
1051 vfb->user_obj = user_obj;
fb1d9738
JB
1052
1053 return &vfb->base;
1054}
1055
e6ecefaa 1056static const struct drm_mode_config_funcs vmw_kms_funcs = {
fb1d9738 1057 .fb_create = vmw_kms_fb_create,
fb1d9738
JB
1058};
1059
b9eb1a61
TH
1060static int vmw_kms_generic_present(struct vmw_private *dev_priv,
1061 struct drm_file *file_priv,
1062 struct vmw_framebuffer *vfb,
1063 struct vmw_surface *surface,
1064 uint32_t sid,
1065 int32_t destX, int32_t destY,
1066 struct drm_vmw_rect *clips,
1067 uint32_t num_clips)
2fcd5a73 1068{
10b1e0ca
TH
1069 return vmw_kms_sou_do_surface_dirty(dev_priv, vfb, NULL, clips,
1070 &surface->res, destX, destY,
1071 num_clips, 1, NULL);
2fcd5a73
JB
1072}
1073
6bf6bf03 1074
2fcd5a73
JB
1075int vmw_kms_present(struct vmw_private *dev_priv,
1076 struct drm_file *file_priv,
1077 struct vmw_framebuffer *vfb,
1078 struct vmw_surface *surface,
1079 uint32_t sid,
1080 int32_t destX, int32_t destY,
1081 struct drm_vmw_rect *clips,
1082 uint32_t num_clips)
1083{
35c05125 1084 int ret;
2fcd5a73 1085
6bf6bf03
TH
1086 switch (dev_priv->active_display_unit) {
1087 case vmw_du_screen_target:
1088 ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL, clips,
1089 &surface->res, destX, destY,
1090 num_clips, 1, NULL);
1091 break;
1092 case vmw_du_screen_object:
1093 ret = vmw_kms_generic_present(dev_priv, file_priv, vfb, surface,
1094 sid, destX, destY, clips,
1095 num_clips);
1096 break;
1097 default:
1098 WARN_ONCE(true,
1099 "Present called with invalid display system.\n");
1100 ret = -ENOSYS;
1101 break;
2fcd5a73 1102 }
35c05125
SY
1103 if (ret)
1104 return ret;
2fcd5a73 1105
35c05125 1106 vmw_fifo_flush(dev_priv, false);
2fcd5a73 1107
35c05125 1108 return 0;
2fcd5a73
JB
1109}
1110
fb1d9738
JB
1111int vmw_kms_init(struct vmw_private *dev_priv)
1112{
1113 struct drm_device *dev = dev_priv->dev;
1114 int ret;
1115
1116 drm_mode_config_init(dev);
1117 dev->mode_config.funcs = &vmw_kms_funcs;
3bef3572
JB
1118 dev->mode_config.min_width = 1;
1119 dev->mode_config.min_height = 1;
65ade7d3
SY
1120 dev->mode_config.max_width = dev_priv->texture_max_width;
1121 dev->mode_config.max_height = dev_priv->texture_max_height;
fb1d9738 1122
35c05125
SY
1123 ret = vmw_kms_stdu_init_display(dev_priv);
1124 if (ret) {
1125 ret = vmw_kms_sou_init_display(dev_priv);
1126 if (ret) /* Fallback */
1127 ret = vmw_kms_ldu_init_display(dev_priv);
1128 }
fb1d9738 1129
c8261a96 1130 return ret;
fb1d9738
JB
1131}
1132
1133int vmw_kms_close(struct vmw_private *dev_priv)
1134{
c8261a96
SY
1135 int ret;
1136
fb1d9738
JB
1137 /*
1138 * Docs says we should take the lock before calling this function
1139 * but since it destroys encoders and our destructor calls
1140 * drm_encoder_cleanup which takes the lock we deadlock.
1141 */
1142 drm_mode_config_cleanup(dev_priv->dev);
c8261a96
SY
1143 if (dev_priv->active_display_unit == vmw_du_screen_object)
1144 ret = vmw_kms_sou_close_display(dev_priv);
35c05125
SY
1145 else if (dev_priv->active_display_unit == vmw_du_screen_target)
1146 ret = vmw_kms_stdu_close_display(dev_priv);
c0d18316 1147 else
c8261a96
SY
1148 ret = vmw_kms_ldu_close_display(dev_priv);
1149
1150 return ret;
fb1d9738
JB
1151}
1152
1153int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1154 struct drm_file *file_priv)
1155{
1156 struct drm_vmw_cursor_bypass_arg *arg = data;
1157 struct vmw_display_unit *du;
fb1d9738
JB
1158 struct drm_crtc *crtc;
1159 int ret = 0;
1160
1161
1162 mutex_lock(&dev->mode_config.mutex);
1163 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1164
1165 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1166 du = vmw_crtc_to_du(crtc);
1167 du->hotspot_x = arg->xhot;
1168 du->hotspot_y = arg->yhot;
1169 }
1170
1171 mutex_unlock(&dev->mode_config.mutex);
1172 return 0;
1173 }
1174
a4cd5d68
RC
1175 crtc = drm_crtc_find(dev, arg->crtc_id);
1176 if (!crtc) {
4ae87ff0 1177 ret = -ENOENT;
fb1d9738
JB
1178 goto out;
1179 }
1180
fb1d9738
JB
1181 du = vmw_crtc_to_du(crtc);
1182
1183 du->hotspot_x = arg->xhot;
1184 du->hotspot_y = arg->yhot;
1185
1186out:
1187 mutex_unlock(&dev->mode_config.mutex);
1188
1189 return ret;
1190}
1191
0bef23f9 1192int vmw_kms_write_svga(struct vmw_private *vmw_priv,
d7e1958d 1193 unsigned width, unsigned height, unsigned pitch,
6558429b 1194 unsigned bpp, unsigned depth)
fb1d9738 1195{
d7e1958d
JB
1196 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1197 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1198 else if (vmw_fifo_have_pitchlock(vmw_priv))
b76ff5ea
TH
1199 vmw_mmio_write(pitch, vmw_priv->mmio_virt +
1200 SVGA_FIFO_PITCHLOCK);
d7e1958d
JB
1201 vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1202 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
6558429b 1203 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
0bef23f9
MD
1204
1205 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1206 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1207 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1208 return -EINVAL;
1209 }
1210
1211 return 0;
d7e1958d 1212}
fb1d9738 1213
d7e1958d
JB
1214int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1215{
7c4f7780
TH
1216 struct vmw_vga_topology_state *save;
1217 uint32_t i;
1218
fb1d9738
JB
1219 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1220 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
7c4f7780 1221 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
d7e1958d
JB
1222 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1223 vmw_priv->vga_pitchlock =
7c4f7780 1224 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
d7e1958d 1225 else if (vmw_fifo_have_pitchlock(vmw_priv))
b76ff5ea
TH
1226 vmw_priv->vga_pitchlock = vmw_mmio_read(vmw_priv->mmio_virt +
1227 SVGA_FIFO_PITCHLOCK);
7c4f7780
TH
1228
1229 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1230 return 0;
fb1d9738 1231
7c4f7780
TH
1232 vmw_priv->num_displays = vmw_read(vmw_priv,
1233 SVGA_REG_NUM_GUEST_DISPLAYS);
1234
029e50bf
TH
1235 if (vmw_priv->num_displays == 0)
1236 vmw_priv->num_displays = 1;
1237
7c4f7780
TH
1238 for (i = 0; i < vmw_priv->num_displays; ++i) {
1239 save = &vmw_priv->vga_save[i];
1240 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1241 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1242 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1243 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1244 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1245 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1246 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
30c78bb8
TH
1247 if (i == 0 && vmw_priv->num_displays == 1 &&
1248 save->width == 0 && save->height == 0) {
1249
1250 /*
1251 * It should be fairly safe to assume that these
1252 * values are uninitialized.
1253 */
1254
1255 save->width = vmw_priv->vga_width - save->pos_x;
1256 save->height = vmw_priv->vga_height - save->pos_y;
1257 }
7c4f7780 1258 }
30c78bb8 1259
fb1d9738
JB
1260 return 0;
1261}
1262
1263int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1264{
7c4f7780
TH
1265 struct vmw_vga_topology_state *save;
1266 uint32_t i;
1267
fb1d9738
JB
1268 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1269 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
7c4f7780 1270 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
d7e1958d
JB
1271 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1272 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1273 vmw_priv->vga_pitchlock);
1274 else if (vmw_fifo_have_pitchlock(vmw_priv))
b76ff5ea
TH
1275 vmw_mmio_write(vmw_priv->vga_pitchlock,
1276 vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
fb1d9738 1277
7c4f7780
TH
1278 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1279 return 0;
1280
1281 for (i = 0; i < vmw_priv->num_displays; ++i) {
1282 save = &vmw_priv->vga_save[i];
1283 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1284 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1285 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1286 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1287 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1288 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1289 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1290 }
1291
fb1d9738
JB
1292 return 0;
1293}
d8bd19d2 1294
e133e737
TH
1295bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1296 uint32_t pitch,
1297 uint32_t height)
1298{
35c05125
SY
1299 return ((u64) pitch * (u64) height) < (u64)
1300 ((dev_priv->active_display_unit == vmw_du_screen_target) ?
1301 dev_priv->prim_bb_mem : dev_priv->vram_size);
e133e737
TH
1302}
1303
1c482ab3
JB
1304
1305/**
1306 * Function called by DRM code called with vbl_lock held.
1307 */
88e72717 1308u32 vmw_get_vblank_counter(struct drm_device *dev, unsigned int pipe)
7a1c2f6c
TH
1309{
1310 return 0;
1311}
626ab771 1312
1c482ab3
JB
1313/**
1314 * Function called by DRM code called with vbl_lock held.
1315 */
88e72717 1316int vmw_enable_vblank(struct drm_device *dev, unsigned int pipe)
1c482ab3
JB
1317{
1318 return -ENOSYS;
1319}
1320
1321/**
1322 * Function called by DRM code called with vbl_lock held.
1323 */
88e72717 1324void vmw_disable_vblank(struct drm_device *dev, unsigned int pipe)
1c482ab3
JB
1325{
1326}
1327
626ab771
JB
1328
1329/*
1330 * Small shared kms functions.
1331 */
1332
847c5964 1333static int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
626ab771
JB
1334 struct drm_vmw_rect *rects)
1335{
1336 struct drm_device *dev = dev_priv->dev;
1337 struct vmw_display_unit *du;
1338 struct drm_connector *con;
626ab771
JB
1339
1340 mutex_lock(&dev->mode_config.mutex);
1341
1342#if 0
6ea77d13
TH
1343 {
1344 unsigned int i;
1345
1346 DRM_INFO("%s: new layout ", __func__);
1347 for (i = 0; i < num; i++)
1348 DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1349 rects[i].w, rects[i].h);
1350 DRM_INFO("\n");
1351 }
626ab771
JB
1352#endif
1353
1354 list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1355 du = vmw_connector_to_du(con);
1356 if (num > du->unit) {
1357 du->pref_width = rects[du->unit].w;
1358 du->pref_height = rects[du->unit].h;
1359 du->pref_active = true;
cd2b89e7
TH
1360 du->gui_x = rects[du->unit].x;
1361 du->gui_y = rects[du->unit].y;
626ab771
JB
1362 } else {
1363 du->pref_width = 800;
1364 du->pref_height = 600;
1365 du->pref_active = false;
1366 }
1367 con->status = vmw_du_connector_detect(con, true);
1368 }
1369
1370 mutex_unlock(&dev->mode_config.mutex);
1371
1372 return 0;
1373}
1374
626ab771
JB
1375void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1376 u16 *r, u16 *g, u16 *b,
1377 uint32_t start, uint32_t size)
1378{
1379 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1380 int i;
1381
1382 for (i = 0; i < size; i++) {
1383 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1384 r[i], g[i], b[i]);
1385 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1386 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1387 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1388 }
1389}
1390
9a69a9ac 1391int vmw_du_connector_dpms(struct drm_connector *connector, int mode)
626ab771 1392{
9a69a9ac 1393 return 0;
626ab771
JB
1394}
1395
626ab771
JB
1396enum drm_connector_status
1397vmw_du_connector_detect(struct drm_connector *connector, bool force)
1398{
1399 uint32_t num_displays;
1400 struct drm_device *dev = connector->dev;
1401 struct vmw_private *dev_priv = vmw_priv(dev);
cd2b89e7 1402 struct vmw_display_unit *du = vmw_connector_to_du(connector);
626ab771 1403
626ab771 1404 num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
626ab771 1405
cd2b89e7
TH
1406 return ((vmw_connector_to_du(connector)->unit < num_displays &&
1407 du->pref_active) ?
626ab771
JB
1408 connector_status_connected : connector_status_disconnected);
1409}
1410
1411static struct drm_display_mode vmw_kms_connector_builtin[] = {
1412 /* 640x480@60Hz */
1413 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1414 752, 800, 0, 480, 489, 492, 525, 0,
1415 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1416 /* 800x600@60Hz */
1417 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1418 968, 1056, 0, 600, 601, 605, 628, 0,
1419 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1420 /* 1024x768@60Hz */
1421 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1422 1184, 1344, 0, 768, 771, 777, 806, 0,
1423 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1424 /* 1152x864@75Hz */
1425 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1426 1344, 1600, 0, 864, 865, 868, 900, 0,
1427 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1428 /* 1280x768@60Hz */
1429 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1430 1472, 1664, 0, 768, 771, 778, 798, 0,
1431 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1432 /* 1280x800@60Hz */
1433 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1434 1480, 1680, 0, 800, 803, 809, 831, 0,
1435 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1436 /* 1280x960@60Hz */
1437 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1438 1488, 1800, 0, 960, 961, 964, 1000, 0,
1439 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1440 /* 1280x1024@60Hz */
1441 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1442 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1443 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1444 /* 1360x768@60Hz */
1445 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1446 1536, 1792, 0, 768, 771, 777, 795, 0,
1447 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1448 /* 1440x1050@60Hz */
1449 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1450 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1451 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1452 /* 1440x900@60Hz */
1453 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1454 1672, 1904, 0, 900, 903, 909, 934, 0,
1455 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1456 /* 1600x1200@60Hz */
1457 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1458 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1459 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1460 /* 1680x1050@60Hz */
1461 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1462 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1463 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1464 /* 1792x1344@60Hz */
1465 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1466 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1467 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1468 /* 1853x1392@60Hz */
1469 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1470 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1471 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1472 /* 1920x1200@60Hz */
1473 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1474 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1475 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1476 /* 1920x1440@60Hz */
1477 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1478 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1479 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1480 /* 2560x1600@60Hz */
1481 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1482 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1483 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1484 /* Terminate */
1485 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1486};
1487
1543b4dd
TH
1488/**
1489 * vmw_guess_mode_timing - Provide fake timings for a
1490 * 60Hz vrefresh mode.
1491 *
1492 * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
1493 * members filled in.
1494 */
a278724a 1495void vmw_guess_mode_timing(struct drm_display_mode *mode)
1543b4dd
TH
1496{
1497 mode->hsync_start = mode->hdisplay + 50;
1498 mode->hsync_end = mode->hsync_start + 50;
1499 mode->htotal = mode->hsync_end + 50;
1500
1501 mode->vsync_start = mode->vdisplay + 50;
1502 mode->vsync_end = mode->vsync_start + 50;
1503 mode->vtotal = mode->vsync_end + 50;
1504
1505 mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1506 mode->vrefresh = drm_mode_vrefresh(mode);
1507}
1508
1509
626ab771
JB
1510int vmw_du_connector_fill_modes(struct drm_connector *connector,
1511 uint32_t max_width, uint32_t max_height)
1512{
1513 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1514 struct drm_device *dev = connector->dev;
1515 struct vmw_private *dev_priv = vmw_priv(dev);
1516 struct drm_display_mode *mode = NULL;
1517 struct drm_display_mode *bmode;
1518 struct drm_display_mode prefmode = { DRM_MODE("preferred",
1519 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1520 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1521 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1522 };
1523 int i;
9a72384d
SY
1524 u32 assumed_bpp = 2;
1525
1526 /*
1527 * If using screen objects, then assume 32-bpp because that's what the
1528 * SVGA device is assuming
1529 */
c8261a96 1530 if (dev_priv->active_display_unit == vmw_du_screen_object)
9a72384d 1531 assumed_bpp = 4;
626ab771 1532
35c05125
SY
1533 if (dev_priv->active_display_unit == vmw_du_screen_target) {
1534 max_width = min(max_width, dev_priv->stdu_max_width);
1535 max_height = min(max_height, dev_priv->stdu_max_height);
1536 }
1537
626ab771 1538 /* Add preferred mode */
c8261a96
SY
1539 mode = drm_mode_duplicate(dev, &prefmode);
1540 if (!mode)
1541 return 0;
1542 mode->hdisplay = du->pref_width;
1543 mode->vdisplay = du->pref_height;
1544 vmw_guess_mode_timing(mode);
626ab771 1545
c8261a96
SY
1546 if (vmw_kms_validate_mode_vram(dev_priv,
1547 mode->hdisplay * assumed_bpp,
1548 mode->vdisplay)) {
1549 drm_mode_probed_add(connector, mode);
1550 } else {
1551 drm_mode_destroy(dev, mode);
1552 mode = NULL;
1553 }
55bde5b2 1554
c8261a96
SY
1555 if (du->pref_mode) {
1556 list_del_init(&du->pref_mode->head);
1557 drm_mode_destroy(dev, du->pref_mode);
626ab771
JB
1558 }
1559
c8261a96
SY
1560 /* mode might be null here, this is intended */
1561 du->pref_mode = mode;
1562
626ab771
JB
1563 for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1564 bmode = &vmw_kms_connector_builtin[i];
1565 if (bmode->hdisplay > max_width ||
1566 bmode->vdisplay > max_height)
1567 continue;
1568
9a72384d
SY
1569 if (!vmw_kms_validate_mode_vram(dev_priv,
1570 bmode->hdisplay * assumed_bpp,
626ab771
JB
1571 bmode->vdisplay))
1572 continue;
1573
1574 mode = drm_mode_duplicate(dev, bmode);
1575 if (!mode)
1576 return 0;
1577 mode->vrefresh = drm_mode_vrefresh(mode);
1578
1579 drm_mode_probed_add(connector, mode);
1580 }
1581
6af3e656 1582 drm_mode_connector_list_update(connector);
f6b05004
TH
1583 /* Move the prefered mode first, help apps pick the right mode. */
1584 drm_mode_sort(&connector->modes);
626ab771
JB
1585
1586 return 1;
1587}
1588
1589int vmw_du_connector_set_property(struct drm_connector *connector,
1590 struct drm_property *property,
1591 uint64_t val)
1592{
1593 return 0;
1594}
cd2b89e7
TH
1595
1596
1597int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
1598 struct drm_file *file_priv)
1599{
1600 struct vmw_private *dev_priv = vmw_priv(dev);
1601 struct drm_vmw_update_layout_arg *arg =
1602 (struct drm_vmw_update_layout_arg *)data;
cd2b89e7
TH
1603 void __user *user_rects;
1604 struct drm_vmw_rect *rects;
1605 unsigned rects_size;
1606 int ret;
1607 int i;
65ade7d3 1608 u64 total_pixels = 0;
cd2b89e7 1609 struct drm_mode_config *mode_config = &dev->mode_config;
c8261a96 1610 struct drm_vmw_rect bounding_box = {0};
cd2b89e7 1611
cd2b89e7
TH
1612 if (!arg->num_outputs) {
1613 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
1614 vmw_du_update_layout(dev_priv, 1, &def_rect);
5151adb3 1615 return 0;
cd2b89e7
TH
1616 }
1617
1618 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
bab9efc2
XW
1619 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
1620 GFP_KERNEL);
5151adb3
TH
1621 if (unlikely(!rects))
1622 return -ENOMEM;
cd2b89e7
TH
1623
1624 user_rects = (void __user *)(unsigned long)arg->rects;
1625 ret = copy_from_user(rects, user_rects, rects_size);
1626 if (unlikely(ret != 0)) {
1627 DRM_ERROR("Failed to get rects.\n");
1628 ret = -EFAULT;
1629 goto out_free;
1630 }
1631
1632 for (i = 0; i < arg->num_outputs; ++i) {
bab9efc2
XW
1633 if (rects[i].x < 0 ||
1634 rects[i].y < 0 ||
1635 rects[i].x + rects[i].w > mode_config->max_width ||
1636 rects[i].y + rects[i].h > mode_config->max_height) {
cd2b89e7
TH
1637 DRM_ERROR("Invalid GUI layout.\n");
1638 ret = -EINVAL;
1639 goto out_free;
1640 }
c8261a96
SY
1641
1642 /*
1643 * bounding_box.w and bunding_box.h are used as
1644 * lower-right coordinates
1645 */
1646 if (rects[i].x + rects[i].w > bounding_box.w)
1647 bounding_box.w = rects[i].x + rects[i].w;
1648
1649 if (rects[i].y + rects[i].h > bounding_box.h)
1650 bounding_box.h = rects[i].y + rects[i].h;
65ade7d3
SY
1651
1652 total_pixels += (u64) rects[i].w * (u64) rects[i].h;
cd2b89e7
TH
1653 }
1654
65ade7d3
SY
1655 if (dev_priv->active_display_unit == vmw_du_screen_target) {
1656 /*
1657 * For Screen Targets, the limits for a toplogy are:
1658 * 1. Bounding box (assuming 32bpp) must be < prim_bb_mem
1659 * 2. Total pixels (assuming 32bpp) must be < prim_bb_mem
1660 */
1661 u64 bb_mem = bounding_box.w * bounding_box.h * 4;
1662 u64 pixel_mem = total_pixels * 4;
1663
1664 if (bb_mem > dev_priv->prim_bb_mem) {
1665 DRM_ERROR("Topology is beyond supported limits.\n");
35c05125
SY
1666 ret = -EINVAL;
1667 goto out_free;
1668 }
1669
65ade7d3
SY
1670 if (pixel_mem > dev_priv->prim_bb_mem) {
1671 DRM_ERROR("Combined output size too large\n");
1672 ret = -EINVAL;
1673 goto out_free;
1674 }
cd2b89e7
TH
1675 }
1676
1677 vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
1678
1679out_free:
1680 kfree(rects);
cd2b89e7
TH
1681 return ret;
1682}
1a4b172a
TH
1683
1684/**
1685 * vmw_kms_helper_dirty - Helper to build commands and perform actions based
1686 * on a set of cliprects and a set of display units.
1687 *
1688 * @dev_priv: Pointer to a device private structure.
1689 * @framebuffer: Pointer to the framebuffer on which to perform the actions.
1690 * @clips: A set of struct drm_clip_rect. Either this os @vclips must be NULL.
1691 * Cliprects are given in framebuffer coordinates.
1692 * @vclips: A set of struct drm_vmw_rect cliprects. Either this or @clips must
1693 * be NULL. Cliprects are given in source coordinates.
1694 * @dest_x: X coordinate offset for the crtc / destination clip rects.
1695 * @dest_y: Y coordinate offset for the crtc / destination clip rects.
1696 * @num_clips: Number of cliprects in the @clips or @vclips array.
1697 * @increment: Integer with which to increment the clip counter when looping.
1698 * Used to skip a predetermined number of clip rects.
1699 * @dirty: Closure structure. See the description of struct vmw_kms_dirty.
1700 */
1701int vmw_kms_helper_dirty(struct vmw_private *dev_priv,
1702 struct vmw_framebuffer *framebuffer,
1703 const struct drm_clip_rect *clips,
1704 const struct drm_vmw_rect *vclips,
1705 s32 dest_x, s32 dest_y,
1706 int num_clips,
1707 int increment,
1708 struct vmw_kms_dirty *dirty)
1709{
1710 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1711 struct drm_crtc *crtc;
1712 u32 num_units = 0;
1713 u32 i, k;
1a4b172a
TH
1714
1715 dirty->dev_priv = dev_priv;
1716
1717 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1718 if (crtc->primary->fb != &framebuffer->base)
1719 continue;
1720 units[num_units++] = vmw_crtc_to_du(crtc);
1721 }
1722
1723 for (k = 0; k < num_units; k++) {
1724 struct vmw_display_unit *unit = units[k];
1725 s32 crtc_x = unit->crtc.x;
1726 s32 crtc_y = unit->crtc.y;
1727 s32 crtc_width = unit->crtc.mode.hdisplay;
1728 s32 crtc_height = unit->crtc.mode.vdisplay;
1729 const struct drm_clip_rect *clips_ptr = clips;
1730 const struct drm_vmw_rect *vclips_ptr = vclips;
1731
1732 dirty->unit = unit;
1733 if (dirty->fifo_reserve_size > 0) {
1734 dirty->cmd = vmw_fifo_reserve(dev_priv,
1735 dirty->fifo_reserve_size);
1736 if (!dirty->cmd) {
1737 DRM_ERROR("Couldn't reserve fifo space "
1738 "for dirty blits.\n");
f3b8c0ca 1739 return -ENOMEM;
1a4b172a
TH
1740 }
1741 memset(dirty->cmd, 0, dirty->fifo_reserve_size);
1742 }
1743 dirty->num_hits = 0;
1744 for (i = 0; i < num_clips; i++, clips_ptr += increment,
1745 vclips_ptr += increment) {
1746 s32 clip_left;
1747 s32 clip_top;
1748
1749 /*
1750 * Select clip array type. Note that integer type
1751 * in @clips is unsigned short, whereas in @vclips
1752 * it's 32-bit.
1753 */
1754 if (clips) {
1755 dirty->fb_x = (s32) clips_ptr->x1;
1756 dirty->fb_y = (s32) clips_ptr->y1;
1757 dirty->unit_x2 = (s32) clips_ptr->x2 + dest_x -
1758 crtc_x;
1759 dirty->unit_y2 = (s32) clips_ptr->y2 + dest_y -
1760 crtc_y;
1761 } else {
1762 dirty->fb_x = vclips_ptr->x;
1763 dirty->fb_y = vclips_ptr->y;
1764 dirty->unit_x2 = dirty->fb_x + vclips_ptr->w +
1765 dest_x - crtc_x;
1766 dirty->unit_y2 = dirty->fb_y + vclips_ptr->h +
1767 dest_y - crtc_y;
1768 }
1769
1770 dirty->unit_x1 = dirty->fb_x + dest_x - crtc_x;
1771 dirty->unit_y1 = dirty->fb_y + dest_y - crtc_y;
1772
1773 /* Skip this clip if it's outside the crtc region */
1774 if (dirty->unit_x1 >= crtc_width ||
1775 dirty->unit_y1 >= crtc_height ||
1776 dirty->unit_x2 <= 0 || dirty->unit_y2 <= 0)
1777 continue;
1778
1779 /* Clip right and bottom to crtc limits */
1780 dirty->unit_x2 = min_t(s32, dirty->unit_x2,
1781 crtc_width);
1782 dirty->unit_y2 = min_t(s32, dirty->unit_y2,
1783 crtc_height);
1784
1785 /* Clip left and top to crtc limits */
1786 clip_left = min_t(s32, dirty->unit_x1, 0);
1787 clip_top = min_t(s32, dirty->unit_y1, 0);
1788 dirty->unit_x1 -= clip_left;
1789 dirty->unit_y1 -= clip_top;
1790 dirty->fb_x -= clip_left;
1791 dirty->fb_y -= clip_top;
1792
1793 dirty->clip(dirty);
1794 }
1795
1796 dirty->fifo_commit(dirty);
1797 }
1798
1799 return 0;
1800}
1801
1802/**
1803 * vmw_kms_helper_buffer_prepare - Reserve and validate a buffer object before
1804 * command submission.
1805 *
1806 * @dev_priv. Pointer to a device private structure.
1807 * @buf: The buffer object
1808 * @interruptible: Whether to perform waits as interruptible.
1809 * @validate_as_mob: Whether the buffer should be validated as a MOB. If false,
1810 * The buffer will be validated as a GMR. Already pinned buffers will not be
1811 * validated.
1812 *
1813 * Returns 0 on success, negative error code on failure, -ERESTARTSYS if
1814 * interrupted by a signal.
1815 */
1816int vmw_kms_helper_buffer_prepare(struct vmw_private *dev_priv,
1817 struct vmw_dma_buffer *buf,
1818 bool interruptible,
1819 bool validate_as_mob)
1820{
1821 struct ttm_buffer_object *bo = &buf->base;
1822 int ret;
1823
b9eb1a61 1824 ttm_bo_reserve(bo, false, false, interruptible, NULL);
1a4b172a
TH
1825 ret = vmw_validate_single_buffer(dev_priv, bo, interruptible,
1826 validate_as_mob);
1827 if (ret)
1828 ttm_bo_unreserve(bo);
1829
1830 return ret;
1831}
1832
1833/**
1834 * vmw_kms_helper_buffer_revert - Undo the actions of
1835 * vmw_kms_helper_buffer_prepare.
1836 *
1837 * @res: Pointer to the buffer object.
1838 *
1839 * Helper to be used if an error forces the caller to undo the actions of
1840 * vmw_kms_helper_buffer_prepare.
1841 */
1842void vmw_kms_helper_buffer_revert(struct vmw_dma_buffer *buf)
1843{
1844 if (buf)
1845 ttm_bo_unreserve(&buf->base);
1846}
1847
1848/**
1849 * vmw_kms_helper_buffer_finish - Unreserve and fence a buffer object after
1850 * kms command submission.
1851 *
1852 * @dev_priv: Pointer to a device private structure.
1853 * @file_priv: Pointer to a struct drm_file representing the caller's
1854 * connection. Must be set to NULL if @user_fence_rep is NULL, and conversely
1855 * if non-NULL, @user_fence_rep must be non-NULL.
1856 * @buf: The buffer object.
1857 * @out_fence: Optional pointer to a fence pointer. If non-NULL, a
1858 * ref-counted fence pointer is returned here.
1859 * @user_fence_rep: Optional pointer to a user-space provided struct
1860 * drm_vmw_fence_rep. If provided, @file_priv must also be provided and the
1861 * function copies fence data to user-space in a fail-safe manner.
1862 */
1863void vmw_kms_helper_buffer_finish(struct vmw_private *dev_priv,
1864 struct drm_file *file_priv,
1865 struct vmw_dma_buffer *buf,
1866 struct vmw_fence_obj **out_fence,
1867 struct drm_vmw_fence_rep __user *
1868 user_fence_rep)
1869{
1870 struct vmw_fence_obj *fence;
1871 uint32_t handle;
1872 int ret;
1873
1874 ret = vmw_execbuf_fence_commands(file_priv, dev_priv, &fence,
1875 file_priv ? &handle : NULL);
1876 if (buf)
1877 vmw_fence_single_bo(&buf->base, fence);
1878 if (file_priv)
1879 vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv),
1880 ret, user_fence_rep, fence,
1881 handle);
1882 if (out_fence)
1883 *out_fence = fence;
1884 else
1885 vmw_fence_obj_unreference(&fence);
1886
1887 vmw_kms_helper_buffer_revert(buf);
1888}
1889
1890
1891/**
1892 * vmw_kms_helper_resource_revert - Undo the actions of
1893 * vmw_kms_helper_resource_prepare.
1894 *
1895 * @res: Pointer to the resource. Typically a surface.
1896 *
1897 * Helper to be used if an error forces the caller to undo the actions of
1898 * vmw_kms_helper_resource_prepare.
1899 */
1900void vmw_kms_helper_resource_revert(struct vmw_resource *res)
1901{
1902 vmw_kms_helper_buffer_revert(res->backup);
d80efd5c 1903 vmw_resource_unreserve(res, false, NULL, 0);
1a4b172a
TH
1904 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1905}
1906
1907/**
1908 * vmw_kms_helper_resource_prepare - Reserve and validate a resource before
1909 * command submission.
1910 *
1911 * @res: Pointer to the resource. Typically a surface.
1912 * @interruptible: Whether to perform waits as interruptible.
1913 *
1914 * Reserves and validates also the backup buffer if a guest-backed resource.
1915 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
1916 * interrupted by a signal.
1917 */
1918int vmw_kms_helper_resource_prepare(struct vmw_resource *res,
1919 bool interruptible)
1920{
1921 int ret = 0;
1922
1923 if (interruptible)
1924 ret = mutex_lock_interruptible(&res->dev_priv->cmdbuf_mutex);
1925 else
1926 mutex_lock(&res->dev_priv->cmdbuf_mutex);
1927
1928 if (unlikely(ret != 0))
1929 return -ERESTARTSYS;
1930
1931 ret = vmw_resource_reserve(res, interruptible, false);
1932 if (ret)
1933 goto out_unlock;
1934
1935 if (res->backup) {
1936 ret = vmw_kms_helper_buffer_prepare(res->dev_priv, res->backup,
1937 interruptible,
1938 res->dev_priv->has_mob);
1939 if (ret)
1940 goto out_unreserve;
1941 }
1942 ret = vmw_resource_validate(res);
1943 if (ret)
1944 goto out_revert;
1945 return 0;
1946
1947out_revert:
1948 vmw_kms_helper_buffer_revert(res->backup);
1949out_unreserve:
d80efd5c 1950 vmw_resource_unreserve(res, false, NULL, 0);
1a4b172a
TH
1951out_unlock:
1952 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1953 return ret;
1954}
1955
1956/**
1957 * vmw_kms_helper_resource_finish - Unreserve and fence a resource after
1958 * kms command submission.
1959 *
1960 * @res: Pointer to the resource. Typically a surface.
1961 * @out_fence: Optional pointer to a fence pointer. If non-NULL, a
1962 * ref-counted fence pointer is returned here.
1963 */
1964void vmw_kms_helper_resource_finish(struct vmw_resource *res,
1965 struct vmw_fence_obj **out_fence)
1966{
1967 if (res->backup || out_fence)
1968 vmw_kms_helper_buffer_finish(res->dev_priv, NULL, res->backup,
1969 out_fence, NULL);
1970
d80efd5c 1971 vmw_resource_unreserve(res, false, NULL, 0);
1a4b172a
TH
1972 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1973}
6bf6bf03
TH
1974
1975/**
1976 * vmw_kms_update_proxy - Helper function to update a proxy surface from
1977 * its backing MOB.
1978 *
1979 * @res: Pointer to the surface resource
1980 * @clips: Clip rects in framebuffer (surface) space.
1981 * @num_clips: Number of clips in @clips.
1982 * @increment: Integer with which to increment the clip counter when looping.
1983 * Used to skip a predetermined number of clip rects.
1984 *
1985 * This function makes sure the proxy surface is updated from its backing MOB
1986 * using the region given by @clips. The surface resource @res and its backing
1987 * MOB needs to be reserved and validated on call.
1988 */
1989int vmw_kms_update_proxy(struct vmw_resource *res,
1990 const struct drm_clip_rect *clips,
1991 unsigned num_clips,
1992 int increment)
1993{
1994 struct vmw_private *dev_priv = res->dev_priv;
1995 struct drm_vmw_size *size = &vmw_res_to_srf(res)->base_size;
1996 struct {
1997 SVGA3dCmdHeader header;
1998 SVGA3dCmdUpdateGBImage body;
1999 } *cmd;
2000 SVGA3dBox *box;
2001 size_t copy_size = 0;
2002 int i;
2003
2004 if (!clips)
2005 return 0;
2006
2007 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd) * num_clips);
2008 if (!cmd) {
2009 DRM_ERROR("Couldn't reserve fifo space for proxy surface "
2010 "update.\n");
2011 return -ENOMEM;
2012 }
2013
2014 for (i = 0; i < num_clips; ++i, clips += increment, ++cmd) {
2015 box = &cmd->body.box;
2016
2017 cmd->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
2018 cmd->header.size = sizeof(cmd->body);
2019 cmd->body.image.sid = res->id;
2020 cmd->body.image.face = 0;
2021 cmd->body.image.mipmap = 0;
2022
2023 if (clips->x1 > size->width || clips->x2 > size->width ||
2024 clips->y1 > size->height || clips->y2 > size->height) {
2025 DRM_ERROR("Invalid clips outsize of framebuffer.\n");
2026 return -EINVAL;
2027 }
2028
2029 box->x = clips->x1;
2030 box->y = clips->y1;
2031 box->z = 0;
2032 box->w = clips->x2 - clips->x1;
2033 box->h = clips->y2 - clips->y1;
2034 box->d = 1;
2035
2036 copy_size += sizeof(*cmd);
2037 }
2038
2039 vmw_fifo_commit(dev_priv, copy_size);
2040
2041 return 0;
2042}
a278724a
TH
2043
2044int vmw_kms_fbdev_init_data(struct vmw_private *dev_priv,
2045 unsigned unit,
2046 u32 max_width,
2047 u32 max_height,
2048 struct drm_connector **p_con,
2049 struct drm_crtc **p_crtc,
2050 struct drm_display_mode **p_mode)
2051{
2052 struct drm_connector *con;
2053 struct vmw_display_unit *du;
2054 struct drm_display_mode *mode;
2055 int i = 0;
2056
2057 list_for_each_entry(con, &dev_priv->dev->mode_config.connector_list,
2058 head) {
2059 if (i == unit)
2060 break;
2061
2062 ++i;
2063 }
2064
2065 if (i != unit) {
2066 DRM_ERROR("Could not find initial display unit.\n");
2067 return -EINVAL;
2068 }
2069
2070 if (list_empty(&con->modes))
2071 (void) vmw_du_connector_fill_modes(con, max_width, max_height);
2072
2073 if (list_empty(&con->modes)) {
2074 DRM_ERROR("Could not find initial display mode.\n");
2075 return -EINVAL;
2076 }
2077
2078 du = vmw_connector_to_du(con);
2079 *p_con = con;
2080 *p_crtc = &du->crtc;
2081
2082 list_for_each_entry(mode, &con->modes, head) {
2083 if (mode->type & DRM_MODE_TYPE_PREFERRED)
2084 break;
2085 }
2086
2087 if (mode->type & DRM_MODE_TYPE_PREFERRED)
2088 *p_mode = mode;
2089 else {
2090 WARN_ONCE(true, "Could not find initial preferred mode.\n");
2091 *p_mode = list_first_entry(&con->modes,
2092 struct drm_display_mode,
2093 head);
2094 }
2095
2096 return 0;
2097}