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drm/vmwgfx: Implement fbdev on kms v2
[linux-2.6-block.git] / drivers / gpu / drm / vmwgfx / vmwgfx_kms.c
CommitLineData
fb1d9738
JB		 1/**************************************************************************
2 *
c8261a96 3 * Copyright © 2009-2014 VMware, Inc., Palo Alto, CA., USA
fb1d9738
JB		 4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_kms.h"
29
56d1c78d 30
fb1d9738
JB		 31/* Might need a hrtimer here? */
32#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
33
c8261a96 34void vmw_du_cleanup(struct vmw_display_unit *du)
fb1d9738
JB		 35{
36 if (du->cursor_surface)
37 vmw_surface_unreference(&du->cursor_surface);
38 if (du->cursor_dmabuf)
39 vmw_dmabuf_unreference(&du->cursor_dmabuf);
34ea3d38 40 drm_connector_unregister(&du->connector);
fb1d9738
JB		 41 drm_crtc_cleanup(&du->crtc);
42 drm_encoder_cleanup(&du->encoder);
43 drm_connector_cleanup(&du->connector);
44}
45
46/*
47 * Display Unit Cursor functions
48 */
49
50int vmw_cursor_update_image(struct vmw_private *dev_priv,
51 u32 *image, u32 width, u32 height,
52 u32 hotspotX, u32 hotspotY)
53{
54 struct {
55 u32 cmd;
56 SVGAFifoCmdDefineAlphaCursor cursor;
57 } *cmd;
58 u32 image_size = width * height * 4;
59 u32 cmd_size = sizeof(*cmd) + image_size;
60
61 if (!image)
62 return -EINVAL;
63
64 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
65 if (unlikely(cmd == NULL)) {
66 DRM_ERROR("Fifo reserve failed.\n");
67 return -ENOMEM;
68 }
69
70 memset(cmd, 0, sizeof(*cmd));
71
72 memcpy(&cmd[1], image, image_size);
73
74 cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
75 cmd->cursor.id = cpu_to_le32(0);
76 cmd->cursor.width = cpu_to_le32(width);
77 cmd->cursor.height = cpu_to_le32(height);
78 cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
79 cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
80
81 vmw_fifo_commit(dev_priv, cmd_size);
82
83 return 0;
84}
85
6a91d97e
JB		 86int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
87 struct vmw_dma_buffer *dmabuf,
88 u32 width, u32 height,
89 u32 hotspotX, u32 hotspotY)
90{
91 struct ttm_bo_kmap_obj map;
92 unsigned long kmap_offset;
93 unsigned long kmap_num;
94 void *virtual;
95 bool dummy;
96 int ret;
97
98 kmap_offset = 0;
99 kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
100
ee3939e0 101 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, NULL);
6a91d97e
JB		 102 if (unlikely(ret != 0)) {
103 DRM_ERROR("reserve failed\n");
104 return -EINVAL;
105 }
106
107 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
108 if (unlikely(ret != 0))
109 goto err_unreserve;
110
111 virtual = ttm_kmap_obj_virtual(&map, &dummy);
112 ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
113 hotspotX, hotspotY);
114
115 ttm_bo_kunmap(&map);
116err_unreserve:
117 ttm_bo_unreserve(&dmabuf->base);
118
119 return ret;
120}
121
122
fb1d9738
JB		 123void vmw_cursor_update_position(struct vmw_private *dev_priv,
124 bool show, int x, int y)
125{
126 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
127 uint32_t count;
128
129 iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
130 iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
131 iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
132 count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
133 iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
134}
135
136int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
137 uint32_t handle, uint32_t width, uint32_t height)
138{
139 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
fb1d9738
JB		 140 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
141 struct vmw_surface *surface = NULL;
142 struct vmw_dma_buffer *dmabuf = NULL;
143 int ret;
144
bfb89928
DV		 145 /*
146 * FIXME: Unclear whether there's any global state touched by the
147 * cursor_set function, especially vmw_cursor_update_position looks
148 * suspicious. For now take the easy route and reacquire all locks. We
149 * can do this since the caller in the drm core doesn't check anything
150 * which is protected by any looks.
151 */
21e88620 152 drm_modeset_unlock_crtc(crtc);
bfb89928
DV		 153 drm_modeset_lock_all(dev_priv->dev);
154
baa91d64 155 /* A lot of the code assumes this */
bfb89928
DV		 156 if (handle && (width != 64 || height != 64)) {
157 ret = -EINVAL;
158 goto out;
159 }
baa91d64 160
fb1d9738 161 if (handle) {
a5d0f576
VS		 162 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
163
e7ac9211
JB		 164 ret = vmw_user_lookup_handle(dev_priv, tfile,
165 handle, &surface, &dmabuf);
166 if (ret) {
167 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
bfb89928
DV		 168 ret = -EINVAL;
169 goto out;
fb1d9738
JB		 170 }
171 }
172
e7ac9211
JB		 173 /* need to do this before taking down old image */
174 if (surface && !surface->snooper.image) {
175 DRM_ERROR("surface not suitable for cursor\n");
176 vmw_surface_unreference(&surface);
bfb89928
DV		 177 ret = -EINVAL;
178 goto out;
e7ac9211
JB		 179 }
180
fb1d9738
JB		 181 /* takedown old cursor */
182 if (du->cursor_surface) {
183 du->cursor_surface->snooper.crtc = NULL;
184 vmw_surface_unreference(&du->cursor_surface);
185 }
186 if (du->cursor_dmabuf)
187 vmw_dmabuf_unreference(&du->cursor_dmabuf);
188
189 /* setup new image */
190 if (surface) {
191 /* vmw_user_surface_lookup takes one reference */
192 du->cursor_surface = surface;
193
194 du->cursor_surface->snooper.crtc = crtc;
195 du->cursor_age = du->cursor_surface->snooper.age;
196 vmw_cursor_update_image(dev_priv, surface->snooper.image,
197 64, 64, du->hotspot_x, du->hotspot_y);
198 } else if (dmabuf) {
fb1d9738
JB		 199 /* vmw_user_surface_lookup takes one reference */
200 du->cursor_dmabuf = dmabuf;
201
6a91d97e
JB		 202 ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
203 du->hotspot_x, du->hotspot_y);
fb1d9738
JB		 204 } else {
205 vmw_cursor_update_position(dev_priv, false, 0, 0);
bfb89928
DV		 206 ret = 0;
207 goto out;
fb1d9738
JB		 208 }
209
da7653d6
TH		 210 vmw_cursor_update_position(dev_priv, true,
211 du->cursor_x + du->hotspot_x,
212 du->cursor_y + du->hotspot_y);
fb1d9738 213
bfb89928
DV		 214 ret = 0;
215out:
216 drm_modeset_unlock_all(dev_priv->dev);
4d02e2de 217 drm_modeset_lock_crtc(crtc, crtc->cursor);
bfb89928
DV		 218
219 return ret;
fb1d9738
JB		 220}
221
222int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
223{
224 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
225 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
226 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
227
228 du->cursor_x = x + crtc->x;
229 du->cursor_y = y + crtc->y;
230
dac35663
DV		 231 /*
232 * FIXME: Unclear whether there's any global state touched by the
233 * cursor_set function, especially vmw_cursor_update_position looks
234 * suspicious. For now take the easy route and reacquire all locks. We
235 * can do this since the caller in the drm core doesn't check anything
236 * which is protected by any looks.
237 */
21e88620 238 drm_modeset_unlock_crtc(crtc);
dac35663
DV		 239 drm_modeset_lock_all(dev_priv->dev);
240
fb1d9738 241 vmw_cursor_update_position(dev_priv, shown,
da7653d6
TH		 242 du->cursor_x + du->hotspot_x,
243 du->cursor_y + du->hotspot_y);
fb1d9738 244
dac35663 245 drm_modeset_unlock_all(dev_priv->dev);
4d02e2de 246 drm_modeset_lock_crtc(crtc, crtc->cursor);
dac35663 247
fb1d9738
JB		 248 return 0;
249}
250
251void vmw_kms_cursor_snoop(struct vmw_surface *srf,
252 struct ttm_object_file *tfile,
253 struct ttm_buffer_object *bo,
254 SVGA3dCmdHeader *header)
255{
256 struct ttm_bo_kmap_obj map;
257 unsigned long kmap_offset;
258 unsigned long kmap_num;
259 SVGA3dCopyBox *box;
260 unsigned box_count;
261 void *virtual;
262 bool dummy;
263 struct vmw_dma_cmd {
264 SVGA3dCmdHeader header;
265 SVGA3dCmdSurfaceDMA dma;
266 } *cmd;
2ac86371 267 int i, ret;
fb1d9738
JB		 268
269 cmd = container_of(header, struct vmw_dma_cmd, header);
270
271 /* No snooper installed */
272 if (!srf->snooper.image)
273 return;
274
275 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
276 DRM_ERROR("face and mipmap for cursors should never != 0\n");
277 return;
278 }
279
280 if (cmd->header.size < 64) {
281 DRM_ERROR("at least one full copy box must be given\n");
282 return;
283 }
284
285 box = (SVGA3dCopyBox *)&cmd[1];
286 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
287 sizeof(SVGA3dCopyBox);
288
2ac86371 289 if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
fb1d9738
JB		 290 box->x != 0 || box->y != 0 || box->z != 0 ||
291 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
2ac86371 292 box->d != 1 || box_count != 1) {
fb1d9738 293 /* TODO handle none page aligned offsets */
2ac86371
JB		 294 /* TODO handle more dst & src != 0 */
295 /* TODO handle more then one copy */
296 DRM_ERROR("Cant snoop dma request for cursor!\n");
297 DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
298 box->srcx, box->srcy, box->srcz,
299 box->x, box->y, box->z,
300 box->w, box->h, box->d, box_count,
301 cmd->dma.guest.ptr.offset);
fb1d9738
JB		 302 return;
303 }
304
305 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
306 kmap_num = (64*64*4) >> PAGE_SHIFT;
307
ee3939e0 308 ret = ttm_bo_reserve(bo, true, false, false, NULL);
fb1d9738
JB		 309 if (unlikely(ret != 0)) {
310 DRM_ERROR("reserve failed\n");
311 return;
312 }
313
314 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
315 if (unlikely(ret != 0))
316 goto err_unreserve;
317
318 virtual = ttm_kmap_obj_virtual(&map, &dummy);
319
2ac86371
JB		 320 if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
321 memcpy(srf->snooper.image, virtual, 64*64*4);
322 } else {
323 /* Image is unsigned pointer. */
324 for (i = 0; i < box->h; i++)
325 memcpy(srf->snooper.image + i * 64,
326 virtual + i * cmd->dma.guest.pitch,
327 box->w * 4);
328 }
329
fb1d9738
JB		 330 srf->snooper.age++;
331
fb1d9738
JB		 332 ttm_bo_kunmap(&map);
333err_unreserve:
334 ttm_bo_unreserve(bo);
335}
336
337void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
338{
339 struct drm_device *dev = dev_priv->dev;
340 struct vmw_display_unit *du;
341 struct drm_crtc *crtc;
342
343 mutex_lock(&dev->mode_config.mutex);
344
345 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
346 du = vmw_crtc_to_du(crtc);
347 if (!du->cursor_surface ||
348 du->cursor_age == du->cursor_surface->snooper.age)
349 continue;
350
351 du->cursor_age = du->cursor_surface->snooper.age;
352 vmw_cursor_update_image(dev_priv,
353 du->cursor_surface->snooper.image,
354 64, 64, du->hotspot_x, du->hotspot_y);
355 }
356
357 mutex_unlock(&dev->mode_config.mutex);
358}
359
360/*
361 * Generic framebuffer code
362 */
363
fb1d9738
JB		 364/*
365 * Surface framebuffer code
366 */
367
847c5964 368static void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
fb1d9738 369{
3a939a5e 370 struct vmw_framebuffer_surface *vfbs =
fb1d9738 371 vmw_framebuffer_to_vfbs(framebuffer);
3a939a5e 372
fb1d9738 373 drm_framebuffer_cleanup(framebuffer);
3a939a5e 374 vmw_surface_unreference(&vfbs->surface);
a278724a
TH		 375 if (vfbs->base.user_obj)
376 ttm_base_object_unref(&vfbs->base.user_obj);
fb1d9738 377
3a939a5e 378 kfree(vfbs);
fb1d9738
JB		 379}
380
847c5964 381static int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
02b00162 382 struct drm_file *file_priv,
fb1d9738
JB		 383 unsigned flags, unsigned color,
384 struct drm_clip_rect *clips,
385 unsigned num_clips)
386{
387 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
388 struct vmw_framebuffer_surface *vfbs =
389 vmw_framebuffer_to_vfbs(framebuffer);
fb1d9738 390 struct drm_clip_rect norect;
5deb65cf 391 int ret, inc = 1;
fb1d9738 392
c8261a96
SY		 393 /* Legacy Display Unit does not support 3D */
394 if (dev_priv->active_display_unit == vmw_du_legacy)
01e81419
JB		 395 return -EINVAL;
396
73e9efd4
VS		 397 drm_modeset_lock_all(dev_priv->dev);
398
294adf7d 399 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
73e9efd4
VS		 400 if (unlikely(ret != 0)) {
401 drm_modeset_unlock_all(dev_priv->dev);
3a939a5e 402 return ret;
73e9efd4 403 }
3a939a5e 404
fb1d9738
JB		 405 if (!num_clips) {
406 num_clips = 1;
407 clips = &norect;
408 norect.x1 = norect.y1 = 0;
409 norect.x2 = framebuffer->width;
410 norect.y2 = framebuffer->height;
411 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
412 num_clips /= 2;
413 inc = 2; /* skip source rects */
414 }
415
c8261a96 416 if (dev_priv->active_display_unit == vmw_du_screen_object)
10b1e0ca
TH		 417 ret = vmw_kms_sou_do_surface_dirty(dev_priv, &vfbs->base,
418 clips, NULL, NULL, 0, 0,
419 num_clips, inc, NULL);
35c05125 420 else
6bf6bf03
TH		 421 ret = vmw_kms_stdu_surface_dirty(dev_priv, &vfbs->base,
422 clips, NULL, NULL, 0, 0,
423 num_clips, inc, NULL);
fb1d9738 424
3eab3d9e 425 vmw_fifo_flush(dev_priv, false);
294adf7d 426 ttm_read_unlock(&dev_priv->reservation_sem);
73e9efd4
VS		 427
428 drm_modeset_unlock_all(dev_priv->dev);
429
fb1d9738
JB		 430 return 0;
431}
432
10b1e0ca
TH		 433/**
434 * vmw_kms_readback - Perform a readback from the screen system to
435 * a dma-buffer backed framebuffer.
436 *
437 * @dev_priv: Pointer to the device private structure.
438 * @file_priv: Pointer to a struct drm_file identifying the caller.
439 * Must be set to NULL if @user_fence_rep is NULL.
440 * @vfb: Pointer to the dma-buffer backed framebuffer.
441 * @user_fence_rep: User-space provided structure for fence information.
442 * Must be set to non-NULL if @file_priv is non-NULL.
443 * @vclips: Array of clip rects.
444 * @num_clips: Number of clip rects in @vclips.
445 *
446 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
447 * interrupted.
448 */
449int vmw_kms_readback(struct vmw_private *dev_priv,
450 struct drm_file *file_priv,
451 struct vmw_framebuffer *vfb,
452 struct drm_vmw_fence_rep __user *user_fence_rep,
453 struct drm_vmw_rect *vclips,
454 uint32_t num_clips)
455{
456 switch (dev_priv->active_display_unit) {
457 case vmw_du_screen_object:
458 return vmw_kms_sou_readback(dev_priv, file_priv, vfb,
459 user_fence_rep, vclips, num_clips);
6bf6bf03
TH		 460 case vmw_du_screen_target:
461 return vmw_kms_stdu_dma(dev_priv, file_priv, vfb,
462 user_fence_rep, NULL, vclips, num_clips,
463 1, false, true);
10b1e0ca
TH		 464 default:
465 WARN_ONCE(true,
466 "Readback called with invalid display system.\n");
6bf6bf03 467}
10b1e0ca
TH		 468
469 return -ENOSYS;
470}
471
472
fb1d9738
JB		 473static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
474 .destroy = vmw_framebuffer_surface_destroy,
475 .dirty = vmw_framebuffer_surface_dirty,
fb1d9738
JB		 476};
477
d3216a0c
TH		 478static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
479 struct vmw_surface *surface,
480 struct vmw_framebuffer **out,
481 const struct drm_mode_fb_cmd
f89c6c32
SY		 482 *mode_cmd,
483 bool is_dmabuf_proxy)
fb1d9738
JB		 484
485{
486 struct drm_device *dev = dev_priv->dev;
487 struct vmw_framebuffer_surface *vfbs;
d3216a0c 488 enum SVGA3dSurfaceFormat format;
fb1d9738
JB		 489 int ret;
490
c8261a96
SY		 491 /* 3D is only supported on HWv8 and newer hosts */
492 if (dev_priv->active_display_unit == vmw_du_legacy)
01e81419
JB		 493 return -ENOSYS;
494
d3216a0c
TH		 495 /*
496 * Sanity checks.
497 */
498
e7ac9211
JB		 499 /* Surface must be marked as a scanout. */
500 if (unlikely(!surface->scanout))
501 return -EINVAL;
502
d3216a0c
TH		 503 if (unlikely(surface->mip_levels[0] != 1 ||
504 surface->num_sizes != 1 ||
b360a3ce
TH		 505 surface->base_size.width < mode_cmd->width ||
506 surface->base_size.height < mode_cmd->height ||
507 surface->base_size.depth != 1)) {
d3216a0c
TH		 508 DRM_ERROR("Incompatible surface dimensions "
509 "for requested mode.\n");
510 return -EINVAL;
511 }
512
513 switch (mode_cmd->depth) {
514 case 32:
515 format = SVGA3D_A8R8G8B8;
516 break;
517 case 24:
518 format = SVGA3D_X8R8G8B8;
519 break;
520 case 16:
521 format = SVGA3D_R5G6B5;
522 break;
523 case 15:
524 format = SVGA3D_A1R5G5B5;
525 break;
526 default:
527 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
528 return -EINVAL;
529 }
530
531 if (unlikely(format != surface->format)) {
532 DRM_ERROR("Invalid surface format for requested mode.\n");
533 return -EINVAL;
534 }
535
fb1d9738
JB		 536 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
537 if (!vfbs) {
538 ret = -ENOMEM;
539 goto out_err1;
540 }
541
fb1d9738
JB		 542 if (!vmw_surface_reference(surface)) {
543 DRM_ERROR("failed to reference surface %p\n", surface);
80f0b5af
DV		 544 ret = -EINVAL;
545 goto out_err2;
fb1d9738
JB		 546 }
547
548 /* XXX get the first 3 from the surface info */
d3216a0c 549 vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 550 vfbs->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH		 551 vfbs->base.base.depth = mode_cmd->depth;
552 vfbs->base.base.width = mode_cmd->width;
553 vfbs->base.base.height = mode_cmd->height;
fb1d9738 554 vfbs->surface = surface;
90ff18bc 555 vfbs->base.user_handle = mode_cmd->handle;
f89c6c32 556 vfbs->is_dmabuf_proxy = is_dmabuf_proxy;
3a939a5e 557
fb1d9738
JB		 558 *out = &vfbs->base;
559
80f0b5af
DV		 560 ret = drm_framebuffer_init(dev, &vfbs->base.base,
561 &vmw_framebuffer_surface_funcs);
562 if (ret)
563 goto out_err3;
564
fb1d9738
JB		 565 return 0;
566
567out_err3:
80f0b5af 568 vmw_surface_unreference(&surface);
fb1d9738
JB		 569out_err2:
570 kfree(vfbs);
571out_err1:
572 return ret;
573}
574
575/*
576 * Dmabuf framebuffer code
577 */
578
847c5964 579static void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
fb1d9738
JB		 580{
581 struct vmw_framebuffer_dmabuf *vfbd =
582 vmw_framebuffer_to_vfbd(framebuffer);
583
584 drm_framebuffer_cleanup(framebuffer);
585 vmw_dmabuf_unreference(&vfbd->buffer);
a278724a
TH		 586 if (vfbd->base.user_obj)
587 ttm_base_object_unref(&vfbd->base.user_obj);
fb1d9738
JB		 588
589 kfree(vfbd);
590}
591
847c5964 592static int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
02b00162 593 struct drm_file *file_priv,
fb1d9738
JB		 594 unsigned flags, unsigned color,
595 struct drm_clip_rect *clips,
596 unsigned num_clips)
597{
598 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
5deb65cf
JB		 599 struct vmw_framebuffer_dmabuf *vfbd =
600 vmw_framebuffer_to_vfbd(framebuffer);
fb1d9738 601 struct drm_clip_rect norect;
5deb65cf 602 int ret, increment = 1;
fb1d9738 603
73e9efd4
VS		 604 drm_modeset_lock_all(dev_priv->dev);
605
294adf7d 606 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
73e9efd4
VS		 607 if (unlikely(ret != 0)) {
608 drm_modeset_unlock_all(dev_priv->dev);
3a939a5e 609 return ret;
73e9efd4 610 }
3a939a5e 611
df1c93ba 612 if (!num_clips) {
fb1d9738
JB		 613 num_clips = 1;
614 clips = &norect;
615 norect.x1 = norect.y1 = 0;
616 norect.x2 = framebuffer->width;
617 norect.y2 = framebuffer->height;
618 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
619 num_clips /= 2;
620 increment = 2;
621 }
622
6bf6bf03
TH		 623 switch (dev_priv->active_display_unit) {
624 case vmw_du_screen_target:
625 ret = vmw_kms_stdu_dma(dev_priv, NULL, &vfbd->base, NULL,
626 clips, NULL, num_clips, increment,
627 true, true);
628 break;
629 case vmw_du_screen_object:
10b1e0ca 630 ret = vmw_kms_sou_do_dmabuf_dirty(dev_priv, &vfbd->base,
c8261a96 631 clips, num_clips, increment,
10b1e0ca 632 true,
c8261a96 633 NULL);
6bf6bf03
TH		 634 break;
635 default:
636 ret = -ENOSYS;
637 WARN_ONCE(true,
638 "Dirty called with invalid display system.\n");
639 break;
56d1c78d 640 }
fb1d9738 641
3eab3d9e 642 vmw_fifo_flush(dev_priv, false);
294adf7d 643 ttm_read_unlock(&dev_priv->reservation_sem);
73e9efd4
VS		 644
645 drm_modeset_unlock_all(dev_priv->dev);
646
5deb65cf 647 return ret;
fb1d9738
JB		 648}
649
650static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
651 .destroy = vmw_framebuffer_dmabuf_destroy,
652 .dirty = vmw_framebuffer_dmabuf_dirty,
fb1d9738
JB		 653};
654
497a3ff9
JB		 655/**
656 * Pin the dmabuffer to the start of vram.
657 */
fd006a43 658static int vmw_framebuffer_pin(struct vmw_framebuffer *vfb)
fb1d9738
JB		 659{
660 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
fd006a43 661 struct vmw_dma_buffer *buf;
fb1d9738
JB		 662 int ret;
663
fd006a43
TH		 664 buf = vfb->dmabuf ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
665 vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.backup;
fb1d9738 666
fd006a43
TH		 667 if (!buf)
668 return 0;
fb1d9738 669
fd006a43
TH		 670 switch (dev_priv->active_display_unit) {
671 case vmw_du_legacy:
672 vmw_overlay_pause_all(dev_priv);
673 ret = vmw_dmabuf_pin_in_start_of_vram(dev_priv, buf, false);
674 vmw_overlay_resume_all(dev_priv);
675 break;
676 case vmw_du_screen_object:
677 case vmw_du_screen_target:
678 if (vfb->dmabuf)
679 return vmw_dmabuf_pin_in_vram_or_gmr(dev_priv, buf,
680 false);
fb1d9738 681
fd006a43
TH		 682 return vmw_dmabuf_pin_in_placement(dev_priv, buf,
683 &vmw_mob_placement, false);
684 default:
685 return -EINVAL;
686 }
316ab13a 687
fd006a43 688 return ret;
fb1d9738
JB		 689}
690
fd006a43 691static int vmw_framebuffer_unpin(struct vmw_framebuffer *vfb)
fb1d9738
JB		 692{
693 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
fd006a43 694 struct vmw_dma_buffer *buf;
fb1d9738 695
fd006a43
TH		 696 buf = vfb->dmabuf ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
697 vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.backup;
698
699 if (WARN_ON(!buf))
fb1d9738 700 return 0;
fb1d9738 701
fd006a43 702 return vmw_dmabuf_unpin(dev_priv, buf, false);
fb1d9738
JB		 703}
704
f89c6c32
SY		 705/**
706 * vmw_create_dmabuf_proxy - create a proxy surface for the DMA buf
707 *
708 * @dev: DRM device
709 * @mode_cmd: parameters for the new surface
710 * @dmabuf_mob: MOB backing the DMA buf
711 * @srf_out: newly created surface
712 *
713 * When the content FB is a DMA buf, we create a surface as a proxy to the
714 * same buffer. This way we can do a surface copy rather than a surface DMA.
715 * This is a more efficient approach
716 *
717 * RETURNS:
718 * 0 on success, error code otherwise
719 */
720static int vmw_create_dmabuf_proxy(struct drm_device *dev,
fd006a43 721 const struct drm_mode_fb_cmd *mode_cmd,
f89c6c32
SY		 722 struct vmw_dma_buffer *dmabuf_mob,
723 struct vmw_surface **srf_out)
724{
725 uint32_t format;
726 struct drm_vmw_size content_base_size;
6bf6bf03 727 struct vmw_resource *res;
f89c6c32
SY		 728 int ret;
729
f89c6c32
SY		 730 switch (mode_cmd->depth) {
731 case 32:
732 case 24:
733 format = SVGA3D_X8R8G8B8;
734 break;
735
736 case 16:
737 case 15:
738 format = SVGA3D_R5G6B5;
739 break;
740
741 case 8:
742 format = SVGA3D_P8;
743 break;
744
745 default:
746 DRM_ERROR("Invalid framebuffer format %d\n", mode_cmd->depth);
747 return -EINVAL;
748 }
749
750 content_base_size.width = mode_cmd->width;
751 content_base_size.height = mode_cmd->height;
752 content_base_size.depth = 1;
753
754 ret = vmw_surface_gb_priv_define(dev,
755 0, /* kernel visible only */
756 0, /* flags */
757 format,
758 true, /* can be a scanout buffer */
759 1, /* num of mip levels */
760 0,
761 content_base_size,
762 srf_out);
763 if (ret) {
764 DRM_ERROR("Failed to allocate proxy content buffer\n");
765 return ret;
766 }
767
6bf6bf03 768 res = &(*srf_out)->res;
f89c6c32 769
6bf6bf03
TH		 770 /* Reserve and switch the backing mob. */
771 mutex_lock(&res->dev_priv->cmdbuf_mutex);
772 (void) vmw_resource_reserve(res, false, true);
773 vmw_dmabuf_unreference(&res->backup);
774 res->backup = vmw_dmabuf_reference(dmabuf_mob);
775 res->backup_offset = 0;
776 vmw_resource_unreserve(res, NULL, 0);
777 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
f89c6c32 778
6bf6bf03 779 return 0;
f89c6c32
SY		 780}
781
782
783
d3216a0c
TH		 784static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
785 struct vmw_dma_buffer *dmabuf,
786 struct vmw_framebuffer **out,
787 const struct drm_mode_fb_cmd
788 *mode_cmd)
fb1d9738
JB		 789
790{
791 struct drm_device *dev = dev_priv->dev;
792 struct vmw_framebuffer_dmabuf *vfbd;
d3216a0c 793 unsigned int requested_size;
fb1d9738
JB		 794 int ret;
795
d3216a0c
TH		 796 requested_size = mode_cmd->height * mode_cmd->pitch;
797 if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
798 DRM_ERROR("Screen buffer object size is too small "
799 "for requested mode.\n");
800 return -EINVAL;
801 }
802
c337ada7 803 /* Limited framebuffer color depth support for screen objects */
c8261a96 804 if (dev_priv->active_display_unit == vmw_du_screen_object) {
c337ada7
JB		 805 switch (mode_cmd->depth) {
806 case 32:
807 case 24:
808 /* Only support 32 bpp for 32 and 24 depth fbs */
809 if (mode_cmd->bpp == 32)
810 break;
811
812 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
813 mode_cmd->depth, mode_cmd->bpp);
814 return -EINVAL;
815 case 16:
816 case 15:
817 /* Only support 16 bpp for 16 and 15 depth fbs */
818 if (mode_cmd->bpp == 16)
819 break;
820
821 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
822 mode_cmd->depth, mode_cmd->bpp);
823 return -EINVAL;
824 default:
825 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
826 return -EINVAL;
827 }
828 }
829
fb1d9738
JB		 830 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
831 if (!vfbd) {
832 ret = -ENOMEM;
833 goto out_err1;
834 }
835
fb1d9738
JB		 836 if (!vmw_dmabuf_reference(dmabuf)) {
837 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
80f0b5af
DV		 838 ret = -EINVAL;
839 goto out_err2;
fb1d9738
JB		 840 }
841
d3216a0c 842 vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 843 vfbd->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH		 844 vfbd->base.base.depth = mode_cmd->depth;
845 vfbd->base.base.width = mode_cmd->width;
846 vfbd->base.base.height = mode_cmd->height;
2fcd5a73 847 vfbd->base.dmabuf = true;
fb1d9738 848 vfbd->buffer = dmabuf;
90ff18bc 849 vfbd->base.user_handle = mode_cmd->handle;
fb1d9738
JB		 850 *out = &vfbd->base;
851
80f0b5af
DV		 852 ret = drm_framebuffer_init(dev, &vfbd->base.base,
853 &vmw_framebuffer_dmabuf_funcs);
854 if (ret)
855 goto out_err3;
856
fb1d9738
JB		 857 return 0;
858
859out_err3:
80f0b5af 860 vmw_dmabuf_unreference(&dmabuf);
fb1d9738
JB		 861out_err2:
862 kfree(vfbd);
863out_err1:
864 return ret;
865}
866
fd006a43
TH		 867/**
868 * vmw_kms_new_framebuffer - Create a new framebuffer.
869 *
870 * @dev_priv: Pointer to device private struct.
871 * @dmabuf: Pointer to dma buffer to wrap the kms framebuffer around.
872 * Either @dmabuf or @surface must be NULL.
873 * @surface: Pointer to a surface to wrap the kms framebuffer around.
874 * Either @dmabuf or @surface must be NULL.
875 * @only_2d: No presents will occur to this dma buffer based framebuffer. This
876 * Helps the code to do some important optimizations.
877 * @mode_cmd: Frame-buffer metadata.
878 */
879struct vmw_framebuffer *
880vmw_kms_new_framebuffer(struct vmw_private *dev_priv,
881 struct vmw_dma_buffer *dmabuf,
882 struct vmw_surface *surface,
883 bool only_2d,
884 const struct drm_mode_fb_cmd *mode_cmd)
885{
886 struct vmw_framebuffer *vfb;
887 bool is_dmabuf_proxy = false;
888 int ret;
889
890 /*
891 * We cannot use the SurfaceDMA command in an non-accelerated VM,
892 * therefore, wrap the DMA buf in a surface so we can use the
893 * SurfaceCopy command.
894 */
895 if (dmabuf && only_2d &&
896 dev_priv->active_display_unit == vmw_du_screen_target) {
897 ret = vmw_create_dmabuf_proxy(dev_priv->dev, mode_cmd,
898 dmabuf, &surface);
899 if (ret)
900 return ERR_PTR(ret);
901
902 is_dmabuf_proxy = true;
903 }
904
905 /* Create the new framebuffer depending one what we have */
906 if (surface)
907 ret = vmw_kms_new_framebuffer_surface(dev_priv, surface, &vfb,
908 mode_cmd,
909 is_dmabuf_proxy);
910 else if (dmabuf)
911 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, dmabuf, &vfb,
912 mode_cmd);
913 else
914 BUG();
915
916 if (ret)
917 return ERR_PTR(ret);
918
919 vfb->pin = vmw_framebuffer_pin;
920 vfb->unpin = vmw_framebuffer_unpin;
921
922 return vfb;
923}
924
fb1d9738
JB		 925/*
926 * Generic Kernel modesetting functions
927 */
928
929static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
930 struct drm_file *file_priv,
308e5bcb 931 struct drm_mode_fb_cmd2 *mode_cmd2)
fb1d9738
JB		 932{
933 struct vmw_private *dev_priv = vmw_priv(dev);
934 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
935 struct vmw_framebuffer *vfb = NULL;
936 struct vmw_surface *surface = NULL;
937 struct vmw_dma_buffer *bo = NULL;
90ff18bc 938 struct ttm_base_object *user_obj;
308e5bcb 939 struct drm_mode_fb_cmd mode_cmd;
fb1d9738
JB		 940 int ret;
941
308e5bcb
JB		 942 mode_cmd.width = mode_cmd2->width;
943 mode_cmd.height = mode_cmd2->height;
944 mode_cmd.pitch = mode_cmd2->pitches[0];
945 mode_cmd.handle = mode_cmd2->handles[0];
248dbc23 946 drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
308e5bcb
JB		 947 &mode_cmd.bpp);
948
d3216a0c
TH		 949 /**
950 * This code should be conditioned on Screen Objects not being used.
951 * If screen objects are used, we can allocate a GMR to hold the
952 * requested framebuffer.
953 */
954
8a783896 955 if (!vmw_kms_validate_mode_vram(dev_priv,
1a464cbb
LT		 956 mode_cmd.pitch,
957 mode_cmd.height)) {
c8261a96 958 DRM_ERROR("Requested mode exceed bounding box limit.\n");
d9826409 959 return ERR_PTR(-ENOMEM);
d3216a0c
TH		 960 }
961
90ff18bc
TH		 962 /*
963 * Take a reference on the user object of the resource
964 * backing the kms fb. This ensures that user-space handle
965 * lookups on that resource will always work as long as
966 * it's registered with a kms framebuffer. This is important,
967 * since vmw_execbuf_process identifies resources in the
968 * command stream using user-space handles.
969 */
970
308e5bcb 971 user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
90ff18bc
TH		 972 if (unlikely(user_obj == NULL)) {
973 DRM_ERROR("Could not locate requested kms frame buffer.\n");
974 return ERR_PTR(-ENOENT);
975 }
976
d3216a0c
TH		 977 /**
978 * End conditioned code.
979 */
980
e7ac9211
JB		 981 /* returns either a dmabuf or surface */
982 ret = vmw_user_lookup_handle(dev_priv, tfile,
4cf73129 983 mode_cmd.handle,
e7ac9211 984 &surface, &bo);
fb1d9738 985 if (ret)
e7ac9211
JB		 986 goto err_out;
987
fd006a43
TH		 988 vfb = vmw_kms_new_framebuffer(dev_priv, bo, surface,
989 !(dev_priv->capabilities & SVGA_CAP_3D),
990 &mode_cmd);
991 if (IS_ERR(vfb)) {
992 ret = PTR_ERR(vfb);
993 goto err_out;
994 }
e7ac9211
JB		 995
996err_out:
997 /* vmw_user_lookup_handle takes one ref so does new_fb */
998 if (bo)
999 vmw_dmabuf_unreference(&bo);
1000 if (surface)
1001 vmw_surface_unreference(&surface);
fb1d9738
JB		 1002
1003 if (ret) {
1004 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
90ff18bc 1005 ttm_base_object_unref(&user_obj);
cce13ff7 1006 return ERR_PTR(ret);
90ff18bc
TH		 1007 } else
1008 vfb->user_obj = user_obj;
fb1d9738
JB		 1009
1010 return &vfb->base;
1011}
1012
e6ecefaa 1013static const struct drm_mode_config_funcs vmw_kms_funcs = {
fb1d9738 1014 .fb_create = vmw_kms_fb_create,
fb1d9738
JB		 1015};
1016
c8261a96 1017int vmw_kms_generic_present(struct vmw_private *dev_priv,
2fcd5a73
JB		 1018 struct drm_file *file_priv,
1019 struct vmw_framebuffer *vfb,
1020 struct vmw_surface *surface,
1021 uint32_t sid,
1022 int32_t destX, int32_t destY,
1023 struct drm_vmw_rect *clips,
1024 uint32_t num_clips)
1025{
10b1e0ca
TH		 1026 return vmw_kms_sou_do_surface_dirty(dev_priv, vfb, NULL, clips,
1027 &surface->res, destX, destY,
1028 num_clips, 1, NULL);
2fcd5a73
JB		 1029}
1030
6bf6bf03 1031
c8261a96
SY		 1032int vmw_kms_present(struct vmw_private *dev_priv,
1033 struct drm_file *file_priv,
1034 struct vmw_framebuffer *vfb,
1035 struct vmw_surface *surface,
1036 uint32_t sid,
1037 int32_t destX, int32_t destY,
1038 struct drm_vmw_rect *clips,
1039 uint32_t num_clips)
1040{
35c05125
SY		 1041 int ret;
1042
6bf6bf03
TH		 1043 switch (dev_priv->active_display_unit) {
1044 case vmw_du_screen_target:
1045 ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL, clips,
1046 &surface->res, destX, destY,
1047 num_clips, 1, NULL);
1048 break;
1049 case vmw_du_screen_object:
1050 ret = vmw_kms_generic_present(dev_priv, file_priv, vfb, surface,
1051 sid, destX, destY, clips,
1052 num_clips);
1053 break;
1054 default:
1055 WARN_ONCE(true,
1056 "Present called with invalid display system.\n");
1057 ret = -ENOSYS;
1058 break;
1059 }
35c05125
SY		 1060 if (ret)
1061 return ret;
1062
1063 vmw_fifo_flush(dev_priv, false);
1064
1065 return 0;
c8261a96
SY		 1066}
1067
fb1d9738
JB		 1068int vmw_kms_init(struct vmw_private *dev_priv)
1069{
1070 struct drm_device *dev = dev_priv->dev;
1071 int ret;
1072
1073 drm_mode_config_init(dev);
1074 dev->mode_config.funcs = &vmw_kms_funcs;
3bef3572
JB		 1075 dev->mode_config.min_width = 1;
1076 dev->mode_config.min_height = 1;
7e71f8a5
JB		 1077 /* assumed largest fb size */
1078 dev->mode_config.max_width = 8192;
1079 dev->mode_config.max_height = 8192;
fb1d9738 1080
35c05125
SY		 1081 ret = vmw_kms_stdu_init_display(dev_priv);
1082 if (ret) {
1083 ret = vmw_kms_sou_init_display(dev_priv);
1084 if (ret) /* Fallback */
1085 ret = vmw_kms_ldu_init_display(dev_priv);
1086 }
fb1d9738 1087
c8261a96 1088 return ret;
fb1d9738
JB		 1089}
1090
1091int vmw_kms_close(struct vmw_private *dev_priv)
1092{
c8261a96
SY		 1093 int ret;
1094
fb1d9738
JB		 1095 /*
1096 * Docs says we should take the lock before calling this function
1097 * but since it destroys encoders and our destructor calls
1098 * drm_encoder_cleanup which takes the lock we deadlock.
1099 */
1100 drm_mode_config_cleanup(dev_priv->dev);
c8261a96
SY		 1101 if (dev_priv->active_display_unit == vmw_du_screen_object)
1102 ret = vmw_kms_sou_close_display(dev_priv);
35c05125
SY		 1103 else if (dev_priv->active_display_unit == vmw_du_screen_target)
1104 ret = vmw_kms_stdu_close_display(dev_priv);
c0d18316 1105 else
c8261a96
SY		 1106 ret = vmw_kms_ldu_close_display(dev_priv);
1107
1108 return ret;
fb1d9738
JB		 1109}
1110
1111int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1112 struct drm_file *file_priv)
1113{
1114 struct drm_vmw_cursor_bypass_arg *arg = data;
1115 struct vmw_display_unit *du;
fb1d9738
JB		 1116 struct drm_crtc *crtc;
1117 int ret = 0;
1118
1119
1120 mutex_lock(&dev->mode_config.mutex);
1121 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1122
1123 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1124 du = vmw_crtc_to_du(crtc);
1125 du->hotspot_x = arg->xhot;
1126 du->hotspot_y = arg->yhot;
1127 }
1128
1129 mutex_unlock(&dev->mode_config.mutex);
1130 return 0;
1131 }
1132
a4cd5d68
RC		 1133 crtc = drm_crtc_find(dev, arg->crtc_id);
1134 if (!crtc) {
4ae87ff0 1135 ret = -ENOENT;
fb1d9738
JB		 1136 goto out;
1137 }
1138
fb1d9738
JB		 1139 du = vmw_crtc_to_du(crtc);
1140
1141 du->hotspot_x = arg->xhot;
1142 du->hotspot_y = arg->yhot;
1143
1144out:
1145 mutex_unlock(&dev->mode_config.mutex);
1146
1147 return ret;
1148}
1149
0bef23f9 1150int vmw_kms_write_svga(struct vmw_private *vmw_priv,
d7e1958d 1151 unsigned width, unsigned height, unsigned pitch,
6558429b 1152 unsigned bpp, unsigned depth)
fb1d9738 1153{
d7e1958d
JB		 1154 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1155 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1156 else if (vmw_fifo_have_pitchlock(vmw_priv))
1157 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1158 vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1159 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
6558429b 1160 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
0bef23f9
MD		 1161
1162 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1163 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1164 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1165 return -EINVAL;
1166 }
1167
1168 return 0;
d7e1958d 1169}
fb1d9738 1170
d7e1958d
JB		 1171int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1172{
7c4f7780
TH		 1173 struct vmw_vga_topology_state *save;
1174 uint32_t i;
1175
fb1d9738
JB		 1176 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1177 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
7c4f7780 1178 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
d7e1958d
JB		 1179 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1180 vmw_priv->vga_pitchlock =
7c4f7780 1181 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
d7e1958d 1182 else if (vmw_fifo_have_pitchlock(vmw_priv))
7c4f7780 1183 vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
c8261a96 1184 SVGA_FIFO_PITCHLOCK);
7c4f7780
TH		 1185
1186 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1187 return 0;
fb1d9738 1188
7c4f7780
TH		 1189 vmw_priv->num_displays = vmw_read(vmw_priv,
1190 SVGA_REG_NUM_GUEST_DISPLAYS);
1191
029e50bf
TH		 1192 if (vmw_priv->num_displays == 0)
1193 vmw_priv->num_displays = 1;
1194
7c4f7780
TH		 1195 for (i = 0; i < vmw_priv->num_displays; ++i) {
1196 save = &vmw_priv->vga_save[i];
1197 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1198 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1199 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1200 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1201 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1202 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1203 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
30c78bb8
TH		 1204 if (i == 0 && vmw_priv->num_displays == 1 &&
1205 save->width == 0 && save->height == 0) {
1206
1207 /*
1208 * It should be fairly safe to assume that these
1209 * values are uninitialized.
1210 */
1211
1212 save->width = vmw_priv->vga_width - save->pos_x;
1213 save->height = vmw_priv->vga_height - save->pos_y;
1214 }
7c4f7780 1215 }
30c78bb8 1216
fb1d9738
JB		 1217 return 0;
1218}
1219
1220int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1221{
7c4f7780
TH		 1222 struct vmw_vga_topology_state *save;
1223 uint32_t i;
1224
fb1d9738
JB		 1225 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1226 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
7c4f7780 1227 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
d7e1958d
JB		 1228 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1229 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1230 vmw_priv->vga_pitchlock);
1231 else if (vmw_fifo_have_pitchlock(vmw_priv))
1232 iowrite32(vmw_priv->vga_pitchlock,
1233 vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
fb1d9738 1234
7c4f7780
TH		 1235 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1236 return 0;
1237
1238 for (i = 0; i < vmw_priv->num_displays; ++i) {
1239 save = &vmw_priv->vga_save[i];
1240 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1241 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1242 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1243 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1244 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1245 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1246 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1247 }
1248
fb1d9738
JB		 1249 return 0;
1250}
d8bd19d2 1251
e133e737
TH		 1252bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1253 uint32_t pitch,
1254 uint32_t height)
1255{
35c05125
SY		 1256 return ((u64) pitch * (u64) height) < (u64)
1257 ((dev_priv->active_display_unit == vmw_du_screen_target) ?
1258 dev_priv->prim_bb_mem : dev_priv->vram_size);
e133e737
TH		 1259}
1260
1c482ab3
JB		 1261
1262/**
1263 * Function called by DRM code called with vbl_lock held.
1264 */
7a1c2f6c
TH		 1265u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
1266{
1267 return 0;
1268}
626ab771 1269
1c482ab3
JB		 1270/**
1271 * Function called by DRM code called with vbl_lock held.
1272 */
1273int vmw_enable_vblank(struct drm_device *dev, int crtc)
1274{
1275 return -ENOSYS;
1276}
1277
1278/**
1279 * Function called by DRM code called with vbl_lock held.
1280 */
1281void vmw_disable_vblank(struct drm_device *dev, int crtc)
1282{
1283}
1284
626ab771
JB		 1285
1286/*
1287 * Small shared kms functions.
1288 */
1289
847c5964 1290static int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
626ab771
JB		 1291 struct drm_vmw_rect *rects)
1292{
1293 struct drm_device *dev = dev_priv->dev;
1294 struct vmw_display_unit *du;
1295 struct drm_connector *con;
626ab771
JB		 1296
1297 mutex_lock(&dev->mode_config.mutex);
1298
1299#if 0
6ea77d13
TH		 1300 {
1301 unsigned int i;
1302
1303 DRM_INFO("%s: new layout ", __func__);
1304 for (i = 0; i < num; i++)
1305 DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1306 rects[i].w, rects[i].h);
1307 DRM_INFO("\n");
1308 }
626ab771
JB		 1309#endif
1310
1311 list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1312 du = vmw_connector_to_du(con);
1313 if (num > du->unit) {
1314 du->pref_width = rects[du->unit].w;
1315 du->pref_height = rects[du->unit].h;
1316 du->pref_active = true;
cd2b89e7
TH		 1317 du->gui_x = rects[du->unit].x;
1318 du->gui_y = rects[du->unit].y;
626ab771
JB		 1319 } else {
1320 du->pref_width = 800;
1321 du->pref_height = 600;
1322 du->pref_active = false;
1323 }
1324 con->status = vmw_du_connector_detect(con, true);
1325 }
1326
1327 mutex_unlock(&dev->mode_config.mutex);
1328
1329 return 0;
1330}
1331
1332void vmw_du_crtc_save(struct drm_crtc *crtc)
1333{
1334}
1335
1336void vmw_du_crtc_restore(struct drm_crtc *crtc)
1337{
1338}
1339
1340void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1341 u16 *r, u16 *g, u16 *b,
1342 uint32_t start, uint32_t size)
1343{
1344 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1345 int i;
1346
1347 for (i = 0; i < size; i++) {
1348 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1349 r[i], g[i], b[i]);
1350 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1351 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1352 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1353 }
1354}
1355
1356void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
1357{
1358}
1359
1360void vmw_du_connector_save(struct drm_connector *connector)
1361{
1362}
1363
1364void vmw_du_connector_restore(struct drm_connector *connector)
1365{
1366}
1367
1368enum drm_connector_status
1369vmw_du_connector_detect(struct drm_connector *connector, bool force)
1370{
1371 uint32_t num_displays;
1372 struct drm_device *dev = connector->dev;
1373 struct vmw_private *dev_priv = vmw_priv(dev);
cd2b89e7 1374 struct vmw_display_unit *du = vmw_connector_to_du(connector);
626ab771 1375
626ab771 1376 num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
626ab771 1377
cd2b89e7
TH		 1378 return ((vmw_connector_to_du(connector)->unit < num_displays &&
1379 du->pref_active) ?
626ab771
JB		 1380 connector_status_connected : connector_status_disconnected);
1381}
1382
1383static struct drm_display_mode vmw_kms_connector_builtin[] = {
1384 /* 640x480@60Hz */
1385 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1386 752, 800, 0, 480, 489, 492, 525, 0,
1387 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1388 /* 800x600@60Hz */
1389 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1390 968, 1056, 0, 600, 601, 605, 628, 0,
1391 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1392 /* 1024x768@60Hz */
1393 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1394 1184, 1344, 0, 768, 771, 777, 806, 0,
1395 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1396 /* 1152x864@75Hz */
1397 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1398 1344, 1600, 0, 864, 865, 868, 900, 0,
1399 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1400 /* 1280x768@60Hz */
1401 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1402 1472, 1664, 0, 768, 771, 778, 798, 0,
1403 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1404 /* 1280x800@60Hz */
1405 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1406 1480, 1680, 0, 800, 803, 809, 831, 0,
1407 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1408 /* 1280x960@60Hz */
1409 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1410 1488, 1800, 0, 960, 961, 964, 1000, 0,
1411 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1412 /* 1280x1024@60Hz */
1413 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1414 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1415 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1416 /* 1360x768@60Hz */
1417 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1418 1536, 1792, 0, 768, 771, 777, 795, 0,
1419 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1420 /* 1440x1050@60Hz */
1421 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1422 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1423 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1424 /* 1440x900@60Hz */
1425 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1426 1672, 1904, 0, 900, 903, 909, 934, 0,
1427 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1428 /* 1600x1200@60Hz */
1429 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1430 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1431 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1432 /* 1680x1050@60Hz */
1433 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1434 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1435 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1436 /* 1792x1344@60Hz */
1437 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1438 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1439 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1440 /* 1853x1392@60Hz */
1441 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1442 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1443 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1444 /* 1920x1200@60Hz */
1445 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1446 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1447 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1448 /* 1920x1440@60Hz */
1449 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1450 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1451 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1452 /* 2560x1600@60Hz */
1453 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1454 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1455 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1456 /* Terminate */
1457 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1458};
1459
1543b4dd
TH		 1460/**
1461 * vmw_guess_mode_timing - Provide fake timings for a
1462 * 60Hz vrefresh mode.
1463 *
1464 * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
1465 * members filled in.
1466 */
a278724a 1467void vmw_guess_mode_timing(struct drm_display_mode *mode)
1543b4dd
TH		 1468{
1469 mode->hsync_start = mode->hdisplay + 50;
1470 mode->hsync_end = mode->hsync_start + 50;
1471 mode->htotal = mode->hsync_end + 50;
1472
1473 mode->vsync_start = mode->vdisplay + 50;
1474 mode->vsync_end = mode->vsync_start + 50;
1475 mode->vtotal = mode->vsync_end + 50;
1476
1477 mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1478 mode->vrefresh = drm_mode_vrefresh(mode);
1479}
1480
1481
626ab771
JB		 1482int vmw_du_connector_fill_modes(struct drm_connector *connector,
1483 uint32_t max_width, uint32_t max_height)
1484{
1485 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1486 struct drm_device *dev = connector->dev;
1487 struct vmw_private *dev_priv = vmw_priv(dev);
1488 struct drm_display_mode *mode = NULL;
1489 struct drm_display_mode *bmode;
1490 struct drm_display_mode prefmode = { DRM_MODE("preferred",
1491 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1492 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1493 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1494 };
1495 int i;
9a72384d
SY		 1496 u32 assumed_bpp = 2;
1497
1498 /*
1499 * If using screen objects, then assume 32-bpp because that's what the
1500 * SVGA device is assuming
1501 */
c8261a96 1502 if (dev_priv->active_display_unit == vmw_du_screen_object)
9a72384d 1503 assumed_bpp = 4;
626ab771 1504
35c05125
SY		 1505 if (dev_priv->active_display_unit == vmw_du_screen_target) {
1506 max_width = min(max_width, dev_priv->stdu_max_width);
1507 max_height = min(max_height, dev_priv->stdu_max_height);
1508 }
1509
626ab771 1510 /* Add preferred mode */
c8261a96
SY		 1511 mode = drm_mode_duplicate(dev, &prefmode);
1512 if (!mode)
1513 return 0;
1514 mode->hdisplay = du->pref_width;
1515 mode->vdisplay = du->pref_height;
1516 vmw_guess_mode_timing(mode);
626ab771 1517
c8261a96
SY		 1518 if (vmw_kms_validate_mode_vram(dev_priv,
1519 mode->hdisplay * assumed_bpp,
1520 mode->vdisplay)) {
1521 drm_mode_probed_add(connector, mode);
1522 } else {
1523 drm_mode_destroy(dev, mode);
1524 mode = NULL;
1525 }
55bde5b2 1526
c8261a96
SY		 1527 if (du->pref_mode) {
1528 list_del_init(&du->pref_mode->head);
1529 drm_mode_destroy(dev, du->pref_mode);
626ab771
JB		 1530 }
1531
c8261a96
SY		 1532 /* mode might be null here, this is intended */
1533 du->pref_mode = mode;
1534
626ab771
JB		 1535 for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1536 bmode = &vmw_kms_connector_builtin[i];
1537 if (bmode->hdisplay > max_width ||
1538 bmode->vdisplay > max_height)
1539 continue;
1540
9a72384d
SY		 1541 if (!vmw_kms_validate_mode_vram(dev_priv,
1542 bmode->hdisplay * assumed_bpp,
626ab771
JB		 1543 bmode->vdisplay))
1544 continue;
1545
1546 mode = drm_mode_duplicate(dev, bmode);
1547 if (!mode)
1548 return 0;
1549 mode->vrefresh = drm_mode_vrefresh(mode);
1550
1551 drm_mode_probed_add(connector, mode);
1552 }
1553
d41025c0
JB		 1554 /* Move the prefered mode first, help apps pick the right mode. */
1555 if (du->pref_mode)
1556 list_move(&du->pref_mode->head, &connector->probed_modes);
1557
b87577b7 1558 drm_mode_connector_list_update(connector, true);
626ab771
JB		 1559
1560 return 1;
1561}
1562
1563int vmw_du_connector_set_property(struct drm_connector *connector,
1564 struct drm_property *property,
1565 uint64_t val)
1566{
1567 return 0;
1568}
cd2b89e7
TH		 1569
1570
1571int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
1572 struct drm_file *file_priv)
1573{
1574 struct vmw_private *dev_priv = vmw_priv(dev);
1575 struct drm_vmw_update_layout_arg *arg =
1576 (struct drm_vmw_update_layout_arg *)data;
cd2b89e7
TH		 1577 void __user *user_rects;
1578 struct drm_vmw_rect *rects;
1579 unsigned rects_size;
1580 int ret;
1581 int i;
1582 struct drm_mode_config *mode_config = &dev->mode_config;
c8261a96 1583 struct drm_vmw_rect bounding_box = {0};
cd2b89e7 1584
cd2b89e7
TH		 1585 if (!arg->num_outputs) {
1586 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
1587 vmw_du_update_layout(dev_priv, 1, &def_rect);
5151adb3 1588 return 0;
cd2b89e7
TH		 1589 }
1590
1591 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
bab9efc2
XW		 1592 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
1593 GFP_KERNEL);
5151adb3
TH		 1594 if (unlikely(!rects))
1595 return -ENOMEM;
cd2b89e7
TH		 1596
1597 user_rects = (void __user *)(unsigned long)arg->rects;
1598 ret = copy_from_user(rects, user_rects, rects_size);
1599 if (unlikely(ret != 0)) {
1600 DRM_ERROR("Failed to get rects.\n");
1601 ret = -EFAULT;
1602 goto out_free;
1603 }
1604
1605 for (i = 0; i < arg->num_outputs; ++i) {
bab9efc2
XW		 1606 if (rects[i].x < 0 ||
1607 rects[i].y < 0 ||
1608 rects[i].x + rects[i].w > mode_config->max_width ||
1609 rects[i].y + rects[i].h > mode_config->max_height) {
cd2b89e7
TH		 1610 DRM_ERROR("Invalid GUI layout.\n");
1611 ret = -EINVAL;
1612 goto out_free;
1613 }
c8261a96
SY		 1614
1615 /*
1616 * bounding_box.w and bunding_box.h are used as
1617 * lower-right coordinates
1618 */
1619 if (rects[i].x + rects[i].w > bounding_box.w)
1620 bounding_box.w = rects[i].x + rects[i].w;
1621
1622 if (rects[i].y + rects[i].h > bounding_box.h)
1623 bounding_box.h = rects[i].y + rects[i].h;
cd2b89e7
TH		 1624 }
1625
35c05125
SY		 1626 /*
1627 * For Screen Target Display Unit, all the displays must fit
1628 * inside of maximum texture size.
1629 */
1630 if (dev_priv->active_display_unit == vmw_du_screen_target)
1631 if (bounding_box.w > dev_priv->texture_max_width ||
1632 bounding_box.h > dev_priv->texture_max_height) {
1633 DRM_ERROR("Layout exceeds maximum texture size\n");
1634 ret = -EINVAL;
1635 goto out_free;
1636 }
1637
1638
cd2b89e7
TH		 1639 vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
1640
1641out_free:
1642 kfree(rects);
cd2b89e7
TH		 1643 return ret;
1644}
1a4b172a
TH		 1645
1646/**
1647 * vmw_kms_helper_dirty - Helper to build commands and perform actions based
1648 * on a set of cliprects and a set of display units.
1649 *
1650 * @dev_priv: Pointer to a device private structure.
1651 * @framebuffer: Pointer to the framebuffer on which to perform the actions.
1652 * @clips: A set of struct drm_clip_rect. Either this os @vclips must be NULL.
1653 * Cliprects are given in framebuffer coordinates.
1654 * @vclips: A set of struct drm_vmw_rect cliprects. Either this or @clips must
1655 * be NULL. Cliprects are given in source coordinates.
1656 * @dest_x: X coordinate offset for the crtc / destination clip rects.
1657 * @dest_y: Y coordinate offset for the crtc / destination clip rects.
1658 * @num_clips: Number of cliprects in the @clips or @vclips array.
1659 * @increment: Integer with which to increment the clip counter when looping.
1660 * Used to skip a predetermined number of clip rects.
1661 * @dirty: Closure structure. See the description of struct vmw_kms_dirty.
1662 */
1663int vmw_kms_helper_dirty(struct vmw_private *dev_priv,
1664 struct vmw_framebuffer *framebuffer,
1665 const struct drm_clip_rect *clips,
1666 const struct drm_vmw_rect *vclips,
1667 s32 dest_x, s32 dest_y,
1668 int num_clips,
1669 int increment,
1670 struct vmw_kms_dirty *dirty)
1671{
1672 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1673 struct drm_crtc *crtc;
1674 u32 num_units = 0;
1675 u32 i, k;
1676 int ret;
1677
1678 dirty->dev_priv = dev_priv;
1679
1680 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1681 if (crtc->primary->fb != &framebuffer->base)
1682 continue;
1683 units[num_units++] = vmw_crtc_to_du(crtc);
1684 }
1685
1686 for (k = 0; k < num_units; k++) {
1687 struct vmw_display_unit *unit = units[k];
1688 s32 crtc_x = unit->crtc.x;
1689 s32 crtc_y = unit->crtc.y;
1690 s32 crtc_width = unit->crtc.mode.hdisplay;
1691 s32 crtc_height = unit->crtc.mode.vdisplay;
1692 const struct drm_clip_rect *clips_ptr = clips;
1693 const struct drm_vmw_rect *vclips_ptr = vclips;
1694
1695 dirty->unit = unit;
1696 if (dirty->fifo_reserve_size > 0) {
1697 dirty->cmd = vmw_fifo_reserve(dev_priv,
1698 dirty->fifo_reserve_size);
1699 if (!dirty->cmd) {
1700 DRM_ERROR("Couldn't reserve fifo space "
1701 "for dirty blits.\n");
1702 return ret;
1703 }
1704 memset(dirty->cmd, 0, dirty->fifo_reserve_size);
1705 }
1706 dirty->num_hits = 0;
1707 for (i = 0; i < num_clips; i++, clips_ptr += increment,
1708 vclips_ptr += increment) {
1709 s32 clip_left;
1710 s32 clip_top;
1711
1712 /*
1713 * Select clip array type. Note that integer type
1714 * in @clips is unsigned short, whereas in @vclips
1715 * it's 32-bit.
1716 */
1717 if (clips) {
1718 dirty->fb_x = (s32) clips_ptr->x1;
1719 dirty->fb_y = (s32) clips_ptr->y1;
1720 dirty->unit_x2 = (s32) clips_ptr->x2 + dest_x -
1721 crtc_x;
1722 dirty->unit_y2 = (s32) clips_ptr->y2 + dest_y -
1723 crtc_y;
1724 } else {
1725 dirty->fb_x = vclips_ptr->x;
1726 dirty->fb_y = vclips_ptr->y;
1727 dirty->unit_x2 = dirty->fb_x + vclips_ptr->w +
1728 dest_x - crtc_x;
1729 dirty->unit_y2 = dirty->fb_y + vclips_ptr->h +
1730 dest_y - crtc_y;
1731 }
1732
1733 dirty->unit_x1 = dirty->fb_x + dest_x - crtc_x;
1734 dirty->unit_y1 = dirty->fb_y + dest_y - crtc_y;
1735
1736 /* Skip this clip if it's outside the crtc region */
1737 if (dirty->unit_x1 >= crtc_width ||
1738 dirty->unit_y1 >= crtc_height ||
1739 dirty->unit_x2 <= 0 || dirty->unit_y2 <= 0)
1740 continue;
1741
1742 /* Clip right and bottom to crtc limits */
1743 dirty->unit_x2 = min_t(s32, dirty->unit_x2,
1744 crtc_width);
1745 dirty->unit_y2 = min_t(s32, dirty->unit_y2,
1746 crtc_height);
1747
1748 /* Clip left and top to crtc limits */
1749 clip_left = min_t(s32, dirty->unit_x1, 0);
1750 clip_top = min_t(s32, dirty->unit_y1, 0);
1751 dirty->unit_x1 -= clip_left;
1752 dirty->unit_y1 -= clip_top;
1753 dirty->fb_x -= clip_left;
1754 dirty->fb_y -= clip_top;
1755
1756 dirty->clip(dirty);
1757 }
1758
1759 dirty->fifo_commit(dirty);
1760 }
1761
1762 return 0;
1763}
1764
1765/**
1766 * vmw_kms_helper_buffer_prepare - Reserve and validate a buffer object before
1767 * command submission.
1768 *
1769 * @dev_priv. Pointer to a device private structure.
1770 * @buf: The buffer object
1771 * @interruptible: Whether to perform waits as interruptible.
1772 * @validate_as_mob: Whether the buffer should be validated as a MOB. If false,
1773 * The buffer will be validated as a GMR. Already pinned buffers will not be
1774 * validated.
1775 *
1776 * Returns 0 on success, negative error code on failure, -ERESTARTSYS if
1777 * interrupted by a signal.
1778 */
1779int vmw_kms_helper_buffer_prepare(struct vmw_private *dev_priv,
1780 struct vmw_dma_buffer *buf,
1781 bool interruptible,
1782 bool validate_as_mob)
1783{
1784 struct ttm_buffer_object *bo = &buf->base;
1785 int ret;
1786
1787 ttm_bo_reserve(bo, false, false, interruptible, 0);
1788 ret = vmw_validate_single_buffer(dev_priv, bo, interruptible,
1789 validate_as_mob);
1790 if (ret)
1791 ttm_bo_unreserve(bo);
1792
1793 return ret;
1794}
1795
1796/**
1797 * vmw_kms_helper_buffer_revert - Undo the actions of
1798 * vmw_kms_helper_buffer_prepare.
1799 *
1800 * @res: Pointer to the buffer object.
1801 *
1802 * Helper to be used if an error forces the caller to undo the actions of
1803 * vmw_kms_helper_buffer_prepare.
1804 */
1805void vmw_kms_helper_buffer_revert(struct vmw_dma_buffer *buf)
1806{
1807 if (buf)
1808 ttm_bo_unreserve(&buf->base);
1809}
1810
1811/**
1812 * vmw_kms_helper_buffer_finish - Unreserve and fence a buffer object after
1813 * kms command submission.
1814 *
1815 * @dev_priv: Pointer to a device private structure.
1816 * @file_priv: Pointer to a struct drm_file representing the caller's
1817 * connection. Must be set to NULL if @user_fence_rep is NULL, and conversely
1818 * if non-NULL, @user_fence_rep must be non-NULL.
1819 * @buf: The buffer object.
1820 * @out_fence: Optional pointer to a fence pointer. If non-NULL, a
1821 * ref-counted fence pointer is returned here.
1822 * @user_fence_rep: Optional pointer to a user-space provided struct
1823 * drm_vmw_fence_rep. If provided, @file_priv must also be provided and the
1824 * function copies fence data to user-space in a fail-safe manner.
1825 */
1826void vmw_kms_helper_buffer_finish(struct vmw_private *dev_priv,
1827 struct drm_file *file_priv,
1828 struct vmw_dma_buffer *buf,
1829 struct vmw_fence_obj **out_fence,
1830 struct drm_vmw_fence_rep __user *
1831 user_fence_rep)
1832{
1833 struct vmw_fence_obj *fence;
1834 uint32_t handle;
1835 int ret;
1836
1837 ret = vmw_execbuf_fence_commands(file_priv, dev_priv, &fence,
1838 file_priv ? &handle : NULL);
1839 if (buf)
1840 vmw_fence_single_bo(&buf->base, fence);
1841 if (file_priv)
1842 vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv),
1843 ret, user_fence_rep, fence,
1844 handle);
1845 if (out_fence)
1846 *out_fence = fence;
1847 else
1848 vmw_fence_obj_unreference(&fence);
1849
1850 vmw_kms_helper_buffer_revert(buf);
1851}
1852
1853
1854/**
1855 * vmw_kms_helper_resource_revert - Undo the actions of
1856 * vmw_kms_helper_resource_prepare.
1857 *
1858 * @res: Pointer to the resource. Typically a surface.
1859 *
1860 * Helper to be used if an error forces the caller to undo the actions of
1861 * vmw_kms_helper_resource_prepare.
1862 */
1863void vmw_kms_helper_resource_revert(struct vmw_resource *res)
1864{
1865 vmw_kms_helper_buffer_revert(res->backup);
1866 vmw_resource_unreserve(res, NULL, 0);
1867 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1868}
1869
1870/**
1871 * vmw_kms_helper_resource_prepare - Reserve and validate a resource before
1872 * command submission.
1873 *
1874 * @res: Pointer to the resource. Typically a surface.
1875 * @interruptible: Whether to perform waits as interruptible.
1876 *
1877 * Reserves and validates also the backup buffer if a guest-backed resource.
1878 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
1879 * interrupted by a signal.
1880 */
1881int vmw_kms_helper_resource_prepare(struct vmw_resource *res,
1882 bool interruptible)
1883{
1884 int ret = 0;
1885
1886 if (interruptible)
1887 ret = mutex_lock_interruptible(&res->dev_priv->cmdbuf_mutex);
1888 else
1889 mutex_lock(&res->dev_priv->cmdbuf_mutex);
1890
1891 if (unlikely(ret != 0))
1892 return -ERESTARTSYS;
1893
1894 ret = vmw_resource_reserve(res, interruptible, false);
1895 if (ret)
1896 goto out_unlock;
1897
1898 if (res->backup) {
1899 ret = vmw_kms_helper_buffer_prepare(res->dev_priv, res->backup,
1900 interruptible,
1901 res->dev_priv->has_mob);
1902 if (ret)
1903 goto out_unreserve;
1904 }
1905 ret = vmw_resource_validate(res);
1906 if (ret)
1907 goto out_revert;
1908 return 0;
1909
1910out_revert:
1911 vmw_kms_helper_buffer_revert(res->backup);
1912out_unreserve:
1913 vmw_resource_unreserve(res, NULL, 0);
1914out_unlock:
1915 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1916 return ret;
1917}
1918
1919/**
1920 * vmw_kms_helper_resource_finish - Unreserve and fence a resource after
1921 * kms command submission.
1922 *
1923 * @res: Pointer to the resource. Typically a surface.
1924 * @out_fence: Optional pointer to a fence pointer. If non-NULL, a
1925 * ref-counted fence pointer is returned here.
1926 */
1927void vmw_kms_helper_resource_finish(struct vmw_resource *res,
1928 struct vmw_fence_obj **out_fence)
1929{
1930 if (res->backup || out_fence)
1931 vmw_kms_helper_buffer_finish(res->dev_priv, NULL, res->backup,
1932 out_fence, NULL);
1933
1934 vmw_resource_unreserve(res, NULL, 0);
1935 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1936}
6bf6bf03
TH		 1937
1938/**
1939 * vmw_kms_update_proxy - Helper function to update a proxy surface from
1940 * its backing MOB.
1941 *
1942 * @res: Pointer to the surface resource
1943 * @clips: Clip rects in framebuffer (surface) space.
1944 * @num_clips: Number of clips in @clips.
1945 * @increment: Integer with which to increment the clip counter when looping.
1946 * Used to skip a predetermined number of clip rects.
1947 *
1948 * This function makes sure the proxy surface is updated from its backing MOB
1949 * using the region given by @clips. The surface resource @res and its backing
1950 * MOB needs to be reserved and validated on call.
1951 */
1952int vmw_kms_update_proxy(struct vmw_resource *res,
1953 const struct drm_clip_rect *clips,
1954 unsigned num_clips,
1955 int increment)
1956{
1957 struct vmw_private *dev_priv = res->dev_priv;
1958 struct drm_vmw_size *size = &vmw_res_to_srf(res)->base_size;
1959 struct {
1960 SVGA3dCmdHeader header;
1961 SVGA3dCmdUpdateGBImage body;
1962 } *cmd;
1963 SVGA3dBox *box;
1964 size_t copy_size = 0;
1965 int i;
1966
1967 if (!clips)
1968 return 0;
1969
1970 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd) * num_clips);
1971 if (!cmd) {
1972 DRM_ERROR("Couldn't reserve fifo space for proxy surface "
1973 "update.\n");
1974 return -ENOMEM;
1975 }
1976
1977 for (i = 0; i < num_clips; ++i, clips += increment, ++cmd) {
1978 box = &cmd->body.box;
1979
1980 cmd->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1981 cmd->header.size = sizeof(cmd->body);
1982 cmd->body.image.sid = res->id;
1983 cmd->body.image.face = 0;
1984 cmd->body.image.mipmap = 0;
1985
1986 if (clips->x1 > size->width || clips->x2 > size->width ||
1987 clips->y1 > size->height || clips->y2 > size->height) {
1988 DRM_ERROR("Invalid clips outsize of framebuffer.\n");
1989 return -EINVAL;
1990 }
1991
1992 box->x = clips->x1;
1993 box->y = clips->y1;
1994 box->z = 0;
1995 box->w = clips->x2 - clips->x1;
1996 box->h = clips->y2 - clips->y1;
1997 box->d = 1;
1998
1999 copy_size += sizeof(*cmd);
2000 }
2001
2002 vmw_fifo_commit(dev_priv, copy_size);
2003
2004 return 0;
2005}
a278724a
TH		 2006
2007int vmw_kms_fbdev_init_data(struct vmw_private *dev_priv,
2008 unsigned unit,
2009 u32 max_width,
2010 u32 max_height,
2011 struct drm_connector **p_con,
2012 struct drm_crtc **p_crtc,
2013 struct drm_display_mode **p_mode)
2014{
2015 struct drm_connector *con;
2016 struct vmw_display_unit *du;
2017 struct drm_display_mode *mode;
2018 int i = 0;
2019
2020 list_for_each_entry(con, &dev_priv->dev->mode_config.connector_list,
2021 head) {
2022 if (i == unit)
2023 break;
2024
2025 ++i;
2026 }
2027
2028 if (i != unit) {
2029 DRM_ERROR("Could not find initial display unit.\n");
2030 return -EINVAL;
2031 }
2032
2033 if (list_empty(&con->modes))
2034 (void) vmw_du_connector_fill_modes(con, max_width, max_height);
2035
2036 if (list_empty(&con->modes)) {
2037 DRM_ERROR("Could not find initial display mode.\n");
2038 return -EINVAL;
2039 }
2040
2041 du = vmw_connector_to_du(con);
2042 *p_con = con;
2043 *p_crtc = &du->crtc;
2044
2045 list_for_each_entry(mode, &con->modes, head) {
2046 if (mode->type & DRM_MODE_TYPE_PREFERRED)
2047 break;
2048 }
2049
2050 if (mode->type & DRM_MODE_TYPE_PREFERRED)
2051 *p_mode = mode;
2052 else {
2053 WARN_ONCE(true, "Could not find initial preferred mode.\n");
2054 *p_mode = list_first_entry(&con->modes,
2055 struct drm_display_mode,
2056 head);
2057 }
2058
2059 return 0;
2060}
Linux 6.x block layer and io_uring tree(s)